WO2018086438A1

WO2018086438A1 - Multi-path connection structure for mipi interface

Info

Publication number: WO2018086438A1
Application number: PCT/CN2017/106139
Authority: WO
Inventors: 罗强军; 成转鹏
Original assignee: 深圳市道通智能航空技术有限公司
Priority date: 2016-11-11
Filing date: 2017-10-13
Publication date: 2018-05-17
Also published as: CN206472223U

Abstract

Disclosed is a multi-path connection structure for an MIPI interface, comprising an image processing chip, MIPI switches, and image sensors. The MIPI switches are connected to the image processing chip; the image sensors are connected to the MIPI switches. By means of the method, embodiments of the present application can achieve the connection to MIPI analog switches by means of an MIPI interface, implement extension of the MIPI interface, and then achieve the connection of image sensors to input ends of the MIPI analog switches, thus implementing the connection of a plurality of image sensors to one MIPI interface. By connecting MIPI switches to an MIPI interface and an image sensor selection end, a selection end of an image processing chip can send a control signal to control the opening/closing of the MIPI switches, so that signals transmitted on image sensors connected to the MIPI switches can be obtained.

Description

A MIPI interface multi-connection structure

Technical field

The embodiments of the present application relate to the field of integrated circuits, and in particular, to a MIPI interface multiple connection structure.

Background technique

MIPI (Mobile Industry Processor Interface) is a consortium established by ARM, Nokia, ST, TI and other companies in 2003 to interface internal electronic devices such as cameras, display interfaces, and RF/baseband interfaces. Standardization, which reduces the complexity of electronic device design and increases design flexibility. The advantage of the unified interface standard is that electronic device manufacturers can flexibly select different chips and modules from the market as needed, and it is faster and more convenient to change the design and function.

With the continuous development of artificial intelligence technology, drones and robots need to collect more image information in the surrounding area for autonomous intelligent operation. VR (Virtual Reality) needs to collect multiple images at the same time for image stitching. Access multi-channel image sensor to collect data.

However, current image processing ICs usually have only one or two MIPI interfaces, which are far from satisfying the number of image sensors that are connected.

Application content

The technical problem to be solved by the embodiments of the present application is to provide an MIPI multi-way connection structure, which can expand the MIPI interface and access multiple image sensors.

To solve the above technical problem, a technical solution adopted by the present application is to provide a MIPI interface multiple connection structure, including: an image processing chip, an MIPI switch, and an image sensor, wherein the MIPI switch is connected to the image processing chip; An image sensor is connected to the MIPI switch.

The image processing chip further includes an MIPI interface, and the MIPI interface is connected to the MIPI switch.

The MIPI switch is an MIPI analog switch, and the MIPI analog switch further includes two signal inputs and a signal output.

The signal output end of the MIPI analog switch is connected to the MIPI interface, and the two signal input ends of the MIPI analog switch are respectively connected to the image sensor.

Wherein, the two signal input ends of the MIPI analog switch are respectively connected with the output ends of the two MIPI analog switches to form a rear stage MIPI analog switch, and the signal output ends of each MIPI switch of the latter stage MIPI analog switch are respectively compared with the previous one. The signal input terminals of the level MIPI analog switches are connected, and a parallel connection structure is formed between the MIPI analog switches connected to the signal input ends of the previous stage MIPI switches.

The MIPI switch is an FPGA chip, and the FPGA chip further includes at least one MIPI sub-switch. When the at least one MIPI sub-switch is multiple, each MIPI sub-switch is connected in parallel.

The image sensor is connected in parallel to the MIPI sub-switch of the FPGA chip.

The image processing chip further includes an image sensor selection end, and the image sensor selection end is connected to the MIPI sub-switch.

The image sensor selection end is connected to the MIPI analog switch or the FPGA chip.

In order to solve the above technical problem, another technical solution adopted by the present application is to provide a drone, which includes a fuselage, and a MIPI interface multi-connection structure as described above.

The beneficial effects of the embodiments of the present application are: different from the prior art, the embodiment of the present application can expand the MIPI interface by connecting the MIPI analog switch on the MIPI interface, and then connect on the input end of the MIPI analog switch. The image sensor enables multiple image sensors to be connected to one MIPI interface. By connecting the MIPI switch to the MIPI interface and the image sensor selection end, the image processing chip selection terminal can issue a control signal to control the opening and closing of the MIPI switch, thereby acquiring the signal transmitted by the image sensor connected to the MIPI switch. Or by connecting the FPGA chip to the MIPI interface and the image sensor selection end, the image processing chip selection end can issue a control signal to control the opening and closing of the MIPI sub-switch, thereby acquiring the signal transmitted by the image sensor connected to the MIPI sub-switch. A plurality of image sensors can be simultaneously connected to a MIPI interface for MIPI connection The port is expanded.

DRAWINGS

1a is a schematic structural diagram of a MIPI interface multi-way connection structure provided by a first embodiment of the present application;

1b is a schematic structural diagram of still another MIPI interface multi-path connection structure provided by the first embodiment of the present application;

2 is a schematic structural diagram of a MIPI interface multi-path connection structure according to a second embodiment of the present application;

FIG. 3 is a schematic diagram of a drone provided by a third embodiment of the present application.

detailed description

In order to facilitate the understanding of the present application, the present application will be described in more detail below with reference to the accompanying drawings and specific embodiments. It is to be noted that when an element is described as being "fixed" to another element, it can be directly on the other element, or one or more central elements can be present. When an element is referred to as "connected" to another element, it can be a <RTI ID=0.0> </ RTI> </ RTI> <RTIgt; The terms "vertical," "horizontal," "left," "right," and the like, as used in this specification, are for the purpose of illustration.

Unless otherwise defined, all technical and scientific terms used in the specification are the same meaning The terms used in the specification of the present application are for the purpose of describing the specific embodiments, and are not intended to limit the application. The term "and/or" used in this specification includes any and all combinations of one or more of the associated listed items.

Embodiment 1

Referring to FIG. 1a, a MIPI interface multiple connection structure provided by the first embodiment of the present application includes: an image processing chip 11, an MIPI analog switch 12, and an image sensor 13. The image processing chip 11 further includes an MIPI interface 111. The MIPI analog switch 12 is connected to the MIPI interface 111, and the image sensor 13 is connected to the MIPI analog switch 12.

The MIPI analog switch 12 includes two signal input terminals 121 and a signal output terminal 122. The signal output terminal 122 is connected to the MIPI interface 111, and the two signal input terminals 121 are respectively connected to the two image sensors 13. The image sensor 13 may be a CCD (Charge Coupled Device) sensor or a CMOS (Complementary Metal-Oxide Semiconductor) sensor, and the camera or the camera lens includes one or more image sensors. The image processing chip 11 may be a graphics processor (GPU), a microcontroller (MCU), a digital signal processor (DSP), a central processing unit (CPU), a field programmable logic gate array (FPGA), or the like.

Further, two MIPI analog switches 12 may be respectively connected to the two signal input terminals 121 to form a two-stage MIPI analog switch 12, and the signal output end 122 of each MIPI switch 12 of the second-level MIPI analog switch 12 is respectively compared with the previous level MIPI. The signal input terminal 121 of the analog switch 12 is connected, and the parallel connection structure is formed between the MIPI analog switches 12 connected to the signal input terminal 121 of the previous stage MIPI switch 12. By analogy, the second signal input terminal of each MIPI analog switch 12 of the previous stage is respectively connected with the second MIPI analog switch 12 to form the latter level MIPI analog switch 12. The number of MIPI analog switches 12 of the latter stage is the previous level. The number of MIPI analog switches 12 is twice. The image sensor 13 is connected to the two signal input terminals 121 of each of the MIPI analog switches 12 of the last stage to form a structure in which the multi-level MIPI analog switch 12 is connected to the image sensor 13. Optionally, the MIPI interface 111 on the image processing chip 11 may be one or more; the signal input end 121 of the MIPI analog switch 12 may be one or more, and the signal output end 122 may be at least one. Referring to FIG. 1b, optionally, the image processing chip 11 of the MIPI interface multiple connection structure may further include an image sensor selection terminal 112 connected to the MIPI analog switch 12. The image sensor selection segment 112 is coupled to the secondary MIPI analog switch 12 and to the MIPI analog switch 12 connected to the second and MIPI analog switch 12.

After the image sensor selection terminal 112 of the image processing chip 11 is connected to the MIPI analog switch 12, the image sensor selection signal can be issued to select the MIPI analog switch 12, and the path of the selected MIPI analog switch 12 is connected and connected. The image sensor 13 on the last stage MIPI analog switch 12 is connected to the MIPI interface 111 via the MIPI analog switch 12, and the signal on the image sensor 13 can pass through the connected MIPI analog switch 12 Transfer to the MIPI interface 111.

In operation, the signal transmitted by the image sensor 13 can be transmitted to the MIPI interface 121 of the image processing chip 11 through each stage of the MIPI switch 12.

Different from the prior art, by connecting the MIPI analog switch 12 on the MIPI interface 111, the extension of the MIPI interface 111 can be performed, and then the image sensor 13 is connected to the input end 121 of the MIPI analog switch, which can be implemented in a MIPI interface 111. A plurality of image sensors 13 are connected to each other.

Embodiment 2

Referring to FIG. 2, a MIPI interface multiple connection structure provided by the second embodiment of the present application includes: an image processing chip 21, an FPGA chip 22, and an image sensor 23; the FPGA chip 22 is connected to the image processing chip 21, and the image sensor 23 is connected. On the FPGA chip 22.

The image processing chip 21 further includes an image sensor selection terminal 211 and an MIPI interface 212. The image sensor selection terminal 211 and the MIPI interface 212 are respectively connected to the FPGA chip.

The FPGA chip 22 (Field-Programmable Gate Array) includes at least one MIPI sub-switch 221. When there are multiple MIPI sub-switches 221, each sub-MIPI switch 221 is connected in parallel and connected in series. To the MIPI interface 212, an image sensor 23 is connected in parallel to each sub-MIPI switch 221.

After the image sensor selection terminal 211 of the image processing chip 21 is connected to the FPGA chip 22, the image sensor selection signal can be issued to select the MIPI sub-switch 221, and the selected MIPI sub-switch 221 is connected and connected to the MIPI sub-switch 221. Image sensor 23 is coupled to MIPI interface 212 via a connected MIPI sub-switch 221, and signals on image sensor 23 can be transmitted to MIPI interface 212 via a connected MIPI sub-switch 221.

Optionally, the image sensor selection terminal 211 and the MIPI switch 212 on the image processing chip 21 may be one or more.

Different from the prior art, by connecting the FPGA chip 22 with the MIPI interface 212 and the image sensor selection terminal 211, the image processing chip selection terminal 211 can issue a control signal to control the opening and closing of the MIPI sub-switch 221, thereby being able to obtain the connection at the MIPI. The signal transmitted by the image sensor 23 on the sub-switch 221. A plurality of image sensors 23 can be simultaneously connected to a MIPI interface 212 to expand the MIPI interface 212.

In the first embodiment and the second embodiment, the image processing chip collects the information of the image sensor in a time-sharing manner; when the information input amount of the image sensor is smaller than the processing capability of the image processing chip, the information of the image sensor may be synthesized by using the integrated circuit first. The above purpose can also be achieved by simultaneously outputting the MIPI interface signal to the image processor and then restoring it to several image sensor information through the image processor.

Embodiment 3

Referring to FIG. 3, the embodiment provides a UAV 3, and the UAV 3 includes a body 31, and a MIPI interface multi-way connection structure according to Embodiment 1 and Embodiment 2. The MIPI interface multiple connection structure is disposed in an internal cavity of the body 31.

It should be noted that the preferred embodiments of the present application are given in the specification and the drawings of the present application, but the present application can be implemented in many different forms, and is not limited to the embodiments described in the present specification. These embodiments are not intended to be limiting of the scope of the present application, and the embodiments are provided to make the understanding of the disclosure of the present application more comprehensive. Further, each of the above technical features is further combined with each other to form various embodiments that are not listed above, and are considered to be within the scope of the specification of the present application; further, those skilled in the art can improve or change according to the above description. All such improvements and modifications are intended to fall within the scope of the appended claims.

Claims

A MIPI interface multiple connection structure, comprising: an image processing chip, an MIPI switch and an image sensor, wherein the MIPI switch is connected to the image processing chip; and the image sensor is connected to the MIPI switch.
The MIPI interface multiple connection structure according to claim 1, wherein the image processing chip further comprises an MIPI interface, and the MIPI interface is connected to the MIPI switch.
The MIPI interface multiple connection structure according to claim 2, wherein the MIPI switch is an MIPI analog switch, and the MIPI analog switch further includes two signal input ends and a signal output end.
The MIPI interface multiple connection structure according to claim 3, wherein a signal output end of the MIPI analog switch is connected to the MIPI interface, and two signal input ends of the MIPI analog switch are respectively connected to the image sensor connection.
The MIPI interface multi-way connection structure according to claim 3, wherein the output terminals of the two MIPI analog switches are respectively connected to the two signal input ends of the MIPI analog switch to form a rear-level MIPI analog switch, and the latter stage. The signal output end of each MIPI switch of the MIPI analog switch is respectively connected with the signal input end of the previous stage MIPI analog switch, and the parallel connection structure is formed between the MIPI analog switches connected to the signal input end of the previous stage MIPI switch.
The MIPI interface multiplex connection structure according to claim 2, wherein the MIPI switch is an FPGA chip, and the FPGA chip further includes at least one MIPI sub-switch, and when the at least one MIPI sub-switch is multiple, Each MIPI sub-switch is connected in parallel.
The MIPI interface multiple connection structure according to claim 6, wherein the image sensor is connected in parallel to the MIPI sub-switch of the FPGA chip.
The MIPI interface multiple connection structure according to claim 3 or 6, wherein the image processing chip further comprises an image sensor selection end, and the image sensor selection end is connected to the MIPI sub-switch.
The MIPI interface multiple connection structure according to claim 8, wherein the image sensor selection end is connected to an MIPI analog switch or an FPGA chip.
A drone, characterized in that the drone includes a fuselage, and the MIPI interface multi-way connection structure according to any of claims 1-9.