WO2018080724A1

WO2018080724A1 - Single carrier physical layer block interleaver

Info

Publication number: WO2018080724A1
Application number: PCT/US2017/054283
Authority: WO
Inventors: Iaroslav P. Gagiev; Artyom LOMAYEV; Alexander Maltsev; Michael Genossar; Carlos Cordeiro
Original assignee: Intel Corporation
Priority date: 2016-10-26
Filing date: 2017-09-29
Publication date: 2018-05-03

Abstract

This disclosure describes systems, methods, and devices related to a single carrier (SC) physical layer (PHY) block interleaver. A device may determine one or more modulated symbols to be transmitted on a transmission medium. The device may determine to divide the one or more modulated symbols into one or more modulated symbol blocks. The device may generate one or more interleaved symbol blocks by interleaving, using an interleaver device, the one or more modulated symbol blocks. The device may append one or more guard intervals to the one or more interleaved symbol blocks. The device may cause to send the one or more interleaved symbol blocks with the appended guard intervals.

Description

SINGLE CARRIER PHYSICAL LAYER BLOCK INTERLEAVER

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of U.S. Provisional Application No. 62/413,058, filed October 26, 2016, the disclosure of which is incorporated herein by reference as if set forth in full. TECHNICAL FIELD

[0002] This disclosure generally relates to systems and methods for wireless communications and, more particularly, to a single carrier (SC) physical layer (PHY) block interleaver.

BACKGROUND

[0003] Wireless devices are becoming widely prevalent and are increasingly requesting access to wireless channels. The growing density of wireless deployments requires increased network and spectrum availability. Wireless devices may communicate with each other using directional transmission techniques, including but not limited to beamforming techniques. Wireless devices may communicate over a next generation 60 GHz (NG60) network, an enhanced directional multi-gigabit (EDMG) network, and/or any other network.

BRIEF DESCRIPTION OF THE DRAWINGS

[0004] FIG. 1 depicts a network diagram illustrating an example network environment for a single carrier (SC) physical layer (PHY) block interleaver system, in accordance with one or more example embodiments of the present disclosure.

[0005] FIG. 2A depicts an illustrative block diagram for an SC PHY pipeline defined in IEEE 802.1 lad/ay.

[0006] FIG. 2B depicts an illustrative graph showing performance degradation due to colored noise.

[0007] FIG. 3 depicts an illustrative block diagram for an SC PHY block interleaver system, in accordance with one or more example embodiments of the present disclosure.

[0008] FIG. 4 depicts an illustrative SC symbol blocking frame structure, in accordance with one or more example embodiments of the present disclosure.

[0009] FIG. 5 depicts an illustrative block diagram for an SC PHY block interleaver system, in accordance with one or more example embodiments of the present disclosure. [0010] FIG. 6 depicts an illustrative graph showing performance enhancement using an SC PHY block interleaver system, in accordance with one or more example embodiments of the present disclosure.

[0011] FIG. 7 A depicts a flow diagram of an illustrative process for an SC PHY block interleaver system, in accordance with one or more example embodiments of the present disclosure.

[0012] FIG. 7B depicts a flow diagram of an illustrative process for an SC PHY block interleaver system, in accordance with one or more example embodiments of the present disclosure.

[0013] FIG. 8 illustrates a functional diagram of an example communication station that may be suitable for use as a user device, in accordance with one or more example embodiments of the present disclosure.

[0014] FIG. 9 is a block diagram of an example machine upon which any of one or more techniques (e.g., methods) may be performed, in accordance with one or more example embodiments of the present disclosure.

DETAILED DESCRIPTION

[0015] Example embodiments described herein provide certain systems, methods, and devices for a single carrier (SC) physical layer (PHY) block interleaver system. The following description and the drawings sufficiently illustrate specific embodiments to enable those skilled in the art to practice them. Other embodiments may incorporate structural, logical, electrical, process, and other changes. Portions and features of some embodiments may be included in, or substituted for, those of other embodiments. Embodiments set forth in the claims encompass all available equivalents of those claims.

[0016] IEEE 802.11 is a set of medium access control (MAC) and PHY specifications for implementing wireless local area network (WLAN) communication. At the PHY level, signal processing and modulation techniques are implemented. PHY defines the relationship between a device and a transmission medium (e.g., establishing/terminating connections to a communication medium, modulation and/or conversion between digital data and signals over a communication channel).

[0017] Devices may communicate over a next generation 60 GHz (NG60) network, an enhanced directional multi-gigabit (EDMG) network, and/or any other network. Devices operating in EDMG may be referred to herein as EDMG devices. This may include user devices, and/or access point (APs) or other devices capable of communicating in accordance with a communication standard, including but not limited to IEEE 802.11 ad and/or IEEE 802. Hay.

[0018] The IEEE 802.1 lay task group (TGay) is currently developing an amendment that will define modifications to the IEEE 802.11 PHY and MAC to enable stations operating in the license-exempt bands above 45 GHz a maximum throughput of at least 20 Gbps.

[0019] TGay is currently developing a new standard in the mmWave (60 GHz) band which is an evolution of the IEEE 802.11ad standard also known as WiGig. IEEE 802. Hay proposes to increase the transmission data rate applying multiple-input multiple-output (MIMO) and channel bonding techniques.

[0020] Along with MIMO and channel bonding techniques, EDMG PHY will define high order modulations, including 64 quadrature amplitude modulation (64-QAM) and 256 quadrature amplitude modulation (256-QAM).

[0021] Example embodiments of the present disclosure relate to systems, methods, and devices for an SC PHY block interleaver system to enhance high order modulation transmission in frequency selective channels.

[0022] A directional multi-gigabit (DMG) communications may involve one or more directional links to communicate at a rate of multiple gigabits per second, for example, at least 1 gigabit per second, 7 gigabits per second, or any other rate. An amendment to a DMG operation in a 60 GHz band, e.g., according to an IEEE 802. Had standard, may be defined, for example, by an IEEE 802.1 lay project.

[0023] In some demonstrative embodiments, one or more devices may be configured to communicate over a NG60 network, an EDMG network, and/or any other network. For example, the one or more devices may be configured to communicate over the NG60 or EDMG networks.

[0024] In one embodiment, an SC PHY block interleaver system may facilitate a block interleaver design for SC PHY. This design may enhance system performance in frequency selective channels. The interleaver may provide gain for all modulation types. However, the most prominent effect is achieved for high order modulations including 64-QAM and 256- QAM, for example, for a high signal-to-noise ratio (SNR) region.

[0025] In one embodiment, an SC PHY block interleaver system may break correlation of the post equalizer noise and residual inter-symbol interference (ISI) at the output of a linear minimum mean square error (LMMSE) receiver. The gain may be achieved from the fact that the low-density parity-check (LDPC) decoder operates with essentially white noise, and introduction of correlation due to equalization may significantly degrade its performance. The impact of "colored" noise becomes significant for a high SNR region, which may prevent high order modulation selection in frequency selective channels.

[0026] In one embodiment, the interleaver operates on a block-by-block basis. That is, it interleaves each data block only. Each data block may contain one or more symbols. The data block is then input to the interleaver. Each data block occupies an element of the interleaver.

[0027] The above descriptions are for purposes of illustration and are not meant to be limiting. Numerous other examples, configurations, processes, etc., may exist, some of which are described in greater detail below. Example embodiments will now be described with reference to the accompanying figures.

[0028] FIG. 1 is a network diagram illustrating an example network environment, in accordance with one or more example embodiments of the present disclosure. Wireless network 100 may include one or more user device(s) 120 and one or more access point(s) (AP) 102, which may communicate in accordance with IEEE 802.11 communication standards, such as the IEEE 802.11ad and/or IEEE 802.11ay specifications. The user device(s) 120 may be referred to as stations (STAs). The user device(s) 120 may be mobile devices that are non- stationary and do not have fixed locations. Although the AP 102 is shown to be communicating on multiple antennas with the user devices 120, it should be understood that this is only for illustrative purposes and that any user device 120 may also communicate using multiple antennas with other user devices 120 and/or the AP 102.

[0029] One or more illustrative user device(s) 120 and/or AP 102 may be operable by one or more user(s) 110. The user device(s) 120 (e.g., 124, 126, or 128) and/or AP 102 may include any suitable processor-driven device including, but not limited to, a mobile device or a non- mobile, e.g., a static, device. For example, user device(s) 120 and/or AP 102 may include, a user equipment (UE), a station (STA), an access point (AP), a personal computer (PC), a wearable wireless device (e.g., bracelet, watch, glasses, ring, etc.), a desktop computer, a mobile computer, a laptop computer, an ultrabook^tm computer, a notebook computer, a tablet computer, a server computer, a handheld computer, a handheld device, an internet of things (IoT) device, a sensor device, a PDA device, a handheld PDA device, an on-board device, an off-board device, a hybrid device (e.g., combining cellular phone functionalities with PDA device functionalities), a consumer device, a vehicular device, a non-vehicular device, a mobile or portable device, a non-mobile or non-portable device, a mobile phone, a cellular telephone, a PCS device, a PDA device which incorporates a wireless communication device, a mobile or portable GPS device, a DVB device, a relatively small computing device, a non-desktop computer, a "carry small live large" (CSLL) device, an ultra mobile device (UMD), an ultra mobile PC (UMPC), a mobile internet device (MID), an "origami" device or computing device, a device that supports dynamically composable computing (DCC), a context- aware device, a video device, an audio device, an A/V device, a set-top-box (STB), a blu-ray disc (BD) player, a BD recorder, a digital video disc (DVD) player, a high definition (HD) DVD player, a DVD recorder, a HD DVD recorder, a personal video recorder (PVR), a broadcast HD receiver, a video source, an audio source, a video sink, an audio sink, a stereo tuner, a broadcast radio receiver, a flat panel display, a personal media player (PMP), a digital video camera (DVC), a digital audio player, a speaker, an audio receiver, an audio amplifier, a gaming device, a data source, a data sink, a digital still camera (DSC), a media player, a smartphone, a television, a music player, or the like. It is understood that the above is a list of devices. However, other devices, including smart devices such as lamps, climate control, car components, household components, appliances, etc. may also be included in this list.

[0030] Any of the user device(s) 120 (e.g., user devices 124, 126, 128), and AP 102 may be configured to communicate with each other via one or more communications networks 130 and/or 135 wirelessly or wired. Any of the communications networks 130 and/or 135 may include, but not limited to, any one of a combination of different types of suitable communications networks such as, for example, broadcasting networks, cable networks, public networks (e.g., the Internet), private networks, wireless networks, cellular networks, or any other suitable private and/or public networks. Further, any of the communications networks 130 and/or 135 may have any suitable communication range associated therewith and may include, for example, global networks (e.g., the Internet), metropolitan area networks (MANs), wide area networks (WANs), local area networks (LANs), or personal area networks (PANs). In addition, any of the communications networks 130 and/or 135 may include any type of medium over which network traffic may be carried including, but not limited to, coaxial cable, twisted-pair wire, optical fiber, a hybrid fiber coaxial (HFC) medium, microwave terrestrial transceivers, radio frequency communication mediums, white space communication mediums, ultra-high frequency communication mediums, satellite communication mediums, or any combination thereof.

[0031] Any of the user device(s) 120 (e.g., user devices 124, 126, 128), and AP 102 may include one or more communications antennas. The one or more communications antennas may be any suitable type of antennas corresponding to the communications protocols used by the user device(s) 120 (e.g., user devices 124, 126 and 128), and AP 102. Some non-limiting examples of suitable communications antennas include Wi-Fi antennas, Institute of Electrical and Electronics Engineers (IEEE) 802.11 family of standards compatible antennas, directional antennas, non-directional antennas, dipole antennas, folded dipole antennas, patch- antennas, multiple-input multiple-output (MIMO) antennas, omnidirectional antennas, quasi- omnidirectional antennas, or the like. The one or more communications antennas may be communicatively coupled to a radio component to transmit and/or receive signals, such as communications signals to and/or from the user devices 120 and/or AP 102.

[0032] Any of the user device(s) 120 (e.g., user devices 124, 126, 128), and AP 102 may be configured to perform directional transmission and/or directional reception in conjunction with wirelessly communicating in a wireless network. Any of the user device(s) 120 (e.g., user devices 124, 126, 128), and AP 102 may be configured to perform such directional transmission and/or reception using a set of multiple antenna arrays (e.g., DMG antenna arrays or the like). Each of the multiple antenna arrays may be used for transmission and/or reception in a particular respective direction or range of directions. Any of the user device(s) 120 (e.g., user devices 124, 126, 128), and AP 102 may be configured to perform any given directional transmission towards one or more defined transmit sectors. Any of the user device(s) 120 (e.g., user devices 124, 126, 128), and AP 102 may be configured to perform any given directional reception from one or more defined receive sectors.

[0033] MIMO beamforming in a wireless network may be accomplished using RF beamforming and/or digital beamforming. In some embodiments, in performing a given MIMO transmission, user devices 120 and/or AP 102 may be configured to use all or a subset of its one or more communications antennas to perform MIMO beamforming.

[0034] Any of the user devices 120 (e.g., user devices 124, 126, 128), and AP 102 may include any suitable radio and/or transceiver for transmitting and/or receiving radio frequency (RF) signals in the bandwidth and/or channels corresponding to the communications protocols utilized by any of the user device(s) 120 and AP 102 to communicate with each other. The radio components may include hardware and/or software to modulate and/or demodulate communications signals according to pre-established transmission protocols. The radio components may further have hardware and/or software instructions to communicate via one or more Wi-Fi and/or Wi-Fi direct protocols, as standardized by the Institute of Electrical and Electronics Engineers (IEEE) 802.11 standards. In certain example embodiments, the radio component, in cooperation with the communications antennas, may be configured to communicate via 2.4 GHz channels (e.g., 802.11b, 802. l lg, 802.11η, 802.1 lax), 5 GHz channels (e.g., 802.11η, 802.1 lac, 802.1 lax), or 60 GHz channels (e.g., 802.1 lad). In some embodiments, non-Wi-Fi protocols may be used for communications between devices, such as Bluetooth, dedicated short-range communication (DSRC), Ultra- High Frequency (UHF) (e.g. IEEE 802.1 laf, IEEE 802.22), white band frequency (e.g., white spaces), or other packetized radio communications. The radio component may include any known receiver and baseband suitable for communicating via the communications protocols. The radio component may further include a low noise amplifier (LNA), additional signal amplifiers, an analog-to-digital (A/D) converter, one or more buffers, and digital baseband.

[0035] Some demonstrative embodiments may be used in conjunction with a wireless communication network communicating over a frequency band of 60 GHz. However, other embodiments may be implemented utilizing any other suitable wireless communication frequency bands, for example, an extremely high frequency (EHF) band (the millimeter wave (mmWave) frequency band), a frequency band within the frequency band of between 20 GHz and 300 GHz, a WLAN frequency band, a WPAN frequency band, a frequency band according to the WGA specification, and the like.

[0036] The phrases "directional multi-gigabit (DMG)" and "directional band (DBand)", as used herein, may relate to a frequency band wherein the channel starting frequency is above 45 GHz. In one example, DMG communications may involve one or more directional links to communicate at a rate of multiple gigabits per second, for example, at least 1 gigabit per second, 7 gigabits per second, or any other rate.

[0037] In some demonstrative embodiments, the user device(s) 120 and/or the AP 102 may be configured to operate in accordance with one or more specifications, including one or more IEEE 802.11 specifications (e.g., an IEEE 802.11ad specification, an IEEE 802. Hay specification, and/or any other specification and/or protocol). For example, an amendment to a DMG operation in the 60 GHz band, according to an IEEE 802.1 lad standard, may be defined, for example, by an IEEE 802.1 lay project.

[0038] It is understood that a basic service set (BSS) provides the basic building block of an 802.11 wireless LAN. For example, in an infrastructure mode, a single access point (AP) together with all associated stations (STAs) is called a BSS.

[0039] Quadrature amplitude modulation (QAM) is a form of modulation that is a combination of phase modulation and amplitude modulation. The QAM scheme represents bits as points in a quadrant grid known as a constellation map. A constellation is a graph of the phase and amplitude modulation points in a given modulation scheme. Since QAM is usually square, some of these are rare— the most common forms are 16-QAM, 64-QAM and 256-QAM. By moving to a higher-order constellation, it is possible to transmit more bits per symbol.

[0040] Interleaving is a technique that performs reordering of data that is to be transmitted from one communication device to another communication device so that consecutive bytes of data are distributed over a larger sequence of data to reduce the effect of burst errors. The inputs to the interleaver are interleaved, and the outputs are the results of the interleaved inputs. The number of inputs is the same as the number of outputs. During interleaving, the positions of the data bits are dispersed before transmission so that any corrupted information can be recovered at the receiver by rearranging the data. In that sense, a block interleaver is a device that performs interleaving of data, whereas a de-interleaver is always associated with every interleaver and restores the original input data sequence. For example, in a receiver, a de-interleaver performs the reverse function of an interleaver.

[0041] Single carrier transmission means one radio frequency (RF) carrier is used to carry the information. Hence, information in the form of bits is carried by one single RF carrier. Orthogonal frequency-division multiplexing (OFDM), also known as multicarrier transmission or modulation, uses multiple carrier signals at different frequencies, sending some of the bits on each channel.

[0042] In a wide spectrum frequency, only the middle frequency of the spectrum is used. Basically, 64-QAM symbols are taken in time domain and are placed with a sampling rate, and then a convolution is performed using a shaping filter. This process forms a spectrum in the frequency domain in order to meet the mask requirement. Then, the carrier frequency is used to carry the signal in 60 GHz. The bandwidth of a channel associated with a single carrier may be equal to 2.16 GHz. The 2.16 GHz channel may then be carried over using a single carrier as opposed to dividing into subcarriers.

[0043] Channel bonding occurs when two adjacent channels within a given frequency band are combined to increase throughput between two or more wireless devices. This bonding effectively doubles the amount of available bandwidth. For example, using two 2.16 GHz channels may be bonded together to form a 4.32 GHz channel. In this case, the number of bonded channels is 2, which is designated as NCB- NCB refers to the integer number of 2.16 GHz channels over which an EDMG physical layer convergence protocol data unit (PPDU) is transmitted, where 1 < NCB≤ 4.

[0044] Data transmission may be composed of one or more data blocks, each prepended with a guard interval. In IEEE 802.11 ad, there is only one data block with a length equal to 448 symbols. The data blocks are interlaced with guard intervals of a length of 64 symbols. Hence, the length of the data block plus the length of the guard interval is 512 symbols (448 + 64). However, IEEE 802.1 lad does not use interleaving of any of the data blocks.

[0045] A frame to be transmitted from one device to another may be made up of one or more fields (e.g., L-STF, L-CEF, EDMG-STF, EDMG-CEF, or any other fields within a frame). The one or more fields may be represented by one or more symbols. These one or more symbols may be grouped together to form a symbol block. Here, this block is also referred to herein as a data symbol block, a symbol block, or a block. Therefore, there may be one or more data symbol blocks that are composed of one or more of symbols.

[0046] In one embodiment, and with reference to FIG. 1 , there is shown an EDMG PPDU for single channel (2.16 GHz) transmission; for example, a general frame format for the EDMG PPDU 140. The preamble 142 of the EDMG PPDU 140 includes, at least in part, a legacy short training field (L-STF), a legacy channel estimation field (L-CEF), a legacy header (L-Header), a new EDMG-Header-A, an EDMG-STF, an EDMG-CEF, and an EDMG-Header-B. Beside the preamble 142, the EDMG PPDU 140 may include a data part and optional automatic gain control (AGC) and beamforming training units (TRNs). It is understood that the above acronyms may be different and are not to be construed as a limitation because other acronyms may be used for the fields included in an EDMG PPDU 140.

[0047] The AP(s) 102 may comprise an interleaver device and a de-interleaver device as part of its transmit and receive chains respectively. Similarly, the user device(s) 120 may comprise an interleaver device and a de-interleaver device as part of its transmit and receive chains respectively. When an AP 102 wants to transmit a frame to one or more user devices 120, the AP 102 may pass data through one or more devices in preparation for transmission. For example, the AP 102 may use its interleaver device to interleave one or more data symbol blocks which may be comprised of a number of data symbols. The AP 102 may use these data symbol blocks as inputs to the interleaver device. The AP 102 may insert or append guard intervals around the interleaved data symbol blocks before transmitting the frame to a user device 120.

[0048] When a user device 120 receives the frame, the user device 120 may use one or more devices on its receive chain to process the frame to retrieve the data. For example, the user device 120 may use the de-interleaver device to de-interleave the interleaved data symbol blocks. The de-interleaver device restores the original data block sent by the AP 102. That is, the de-interleaver device performs the reverse function of the interleaver device. It should be understood that the reverse direction of a data transmission from user devices 120 to the AP 102 may use the same approach by first performing interleaving using an interleaver on the user device 120 and de-interleaving using a de-interleaver device on the AP 102.

[0049] FIG. 2A depicts an illustrative block diagram for an SC PHY pipeline defined in IEEE 802.11 ad/ay.

[0050] Colored noise may have an impact on the LDPC code performance. For example, the impact of colored flicker noise on the LDPC performance may be significant and may cause about a 0.5 dB signal-to-noise ratio (SNR) loss even for binary phase shift keying (BPSK) modulation.

[0051] In one embodiment, an SC PHY block interleaver system may mitigate the impact of colored noise in an SC PHY system by means of proper interleaver design.

[0052] Referring to FIG. 2A, there is shown a simplified SC PHY pipeline defined in IEEE 802.1 lad/ay. For example, a transmitter (e.g., an AP 202) and a receiver (e.g., a user device 220) may utilize a transmit side and a receive side. It should be noted that although an AP is shown as a transmitter and a user device is shown as a receiver, these roles may be reversed since each of these devices is capable of transmitting and receiving. In essence, each of the AP 202 and the user device 220 may be a transmitter and a receiver.

[0053] In the example of FIG. 2A, the transmitter side 204 includes one or more devices that are used to prepare signals for transmission over the air. For example, the transmitter side may include, at least in part, a scrambler device, an LDPC encoder device, a constellation mapper device, an add guard interval (GI) device, a pulse shaping filter device, and a digital to analog converter (DAC) and analog radio frequency (RF) conversions device. The receiver side 206 may include, at least in part, analog RF conversions and an analog to digital converter (ADC) device, a discrete Fourier transformation (DFT) block device, an equalizer (LMMSE) device, an inverse discrete Fourier transformation (IDFT) block device, a GI removal device, a constellation de-mapper device, an LDPC decoder device, and a descrambler device. The signal between the transmitter and the receiver may experience an impact of frequency selective channel and additive white Gaussian noise (AWGN).

[0054] The operations performed by the IDFT, the equalizer, and the DFT devices represent a circular convolution of the SC time domain signal with some equivalent equalizer filter. This filter de-convolves the payload signal and eliminates the impact of multi-path propagation.

[0055] However, at the same time, the equalizer filter affects additive noise. It can enhance post equalizer noise variance, which leads to system performance degradation. Moreover, the de-convolution with the equalizer filter makes additive noise correlated or "colored." The typical correlation time depends on the propagation channel properties.

[0056] The LDPC decoding algorithm essentially assumes that the additive noise is uncorrected or "white" in nature. The equalizer makes noise "colored" which leads to the system performance degradation.

[0057] FIG. 2B depicts an illustrative graph showing performance degradation due to colored noise.

[0058] FIG. 2B shows performance degradation for 64-QAM modulation and an LDPC encoding rate of 5/8. The simulations are performed in a Rayleigh channel with a root-mean- square (RMS) delay spread equal to 3 nanoseconds. As shown in FIG. 2B, the degradation for PER = 10^"2 can be up to about 2.8 dB (from about 27 dB to about 24.2 dB).

[0059] FIG. 3 depicts an illustrative block diagram for an SC PHY block interleaver system, in accordance with one or more example embodiments of the present disclosure.

[0060] Referring to FIG. 3, there is shown a transmitter side on an AP 302 and a receiver side on a user device 320. That is, signals sent from the AP 302 go through the transmitter side on the AP 302, and the signals received by the user device 320 go through the receiver side on the user device 320.

[0061] In one embodiment, the user device 320 and the AP 302 may include one or more interleavers (in the transmission chain) and one or more de-interleavers (in the receiving chain not shown for the AP side but shown on the user device 320). That is, the AP 302 may comprise an interleaver device and a de-interleaver device as part of its transmit and receive chains respectively. Similarly, the user device 320 may comprise an interleaver device and a de-interleaver device as part of its transmit and receive chains respectively. When the AP 302 wants to transmit a frame to one or more user devices 320, the AP 302 may pass data through one or more devices in preparation for transmission. For example, the AP 302 may use the interleaver 304 to interleave one or more data symbol blocks, which may be comprised of a number of data symbols. The AP 302 may use these data symbol blocks as inputs to the interleaver 304. The AP 302 may insert or append guard intervals around the interleaved data symbol blocks before transmitting the frame to a user device 320.

[0062] When a user device 320 receives the frame, the user device 320 may use one or more devices on its receive chain to process the frame to retrieve the data. For example, the user device 320 may use the de-interleaver 308 to de-interleave the interleaved data symbol blocks. The de-interleaver 308 restores the original data block sent by the AP 302. That is, the de-interleaver 308 performs the reverse function of the interleaver 304. It should be understood that the reverse direction of a data transmission from the user device 320 to the AP 302 may use the same approach by first performing interleaving using an interleaver on the user device 320 and de-interleaving using a de-interleaver on the AP 302.

[0063] In one embodiment, an SC PHY block interleaver system may facilitate a block interleaver design for an SC PHY. An SC PHY block interleaver design for an SC PHY may be designed for various modulation methods such as QAM or non-uniform constellation (NUC), for example, 64-QAM/64-NUC constellations. Simulation analysis has proven that the use of an interleaver in an SC PHY block provides significant signal-to-noise ratio (SNR) gain in selective frequency channels.

[0064] In one embodiment and as shown in FIG. 3, an SC PHY block interleaver system may include a block interleaver device (e.g., interleaver 304) placed after the constellation mapper 306 at the transmitter side and before the "add guard interval" device. FIG. 3 shows an SC PHY pipeline with an interleaver 304 and a de-interleaver 308.

[0065] Referring to FIG. 4, there is shown a typical SC symbol block frame 400 structure, in accordance with one or more example embodiments of the present disclosure.

[0066] In one embodiment, modulated QAM symbols coming out of the constellation mapper device 306 of FIG. 3 may be divided into a number of SC symbol blocks before going through the interleaver device 304 of FIG. 3. The SC symbol block frame 400 may be comprised of one or more SC symbol blocks 401, which may be comprised of GI 404 and SC data symbol block 402. Each SC data symbol block 402 may have a length of N data symbols, where N is a positive integer. Each SC data symbol block 402 may be prepended by GI block 404 having a length NQI- In essence, the interleaver 304 may interleave on a symbol-block-by-symbol-block basis.

[0067] The SC symbol block frame 400 may be fed into the interleaver 304. The interleaver 304 may operate on a single block of length N QAM symbols (e.g., SC data symbol block 402). Assuming that modulation with M bits per constellation point is used, then the block has N*M bits in total.

[0068] The IEEE 802.11 ad/ay standards define the SC symbol block of length N = 448 QAM symbols and NQI = 64. This may provide a DFT size equal to 512. In one embodiment, the interleaver 304 may distribute the adjacent highly correlated equalized QAM symbols over different LDPC codewords. In the 802.1 lad/ay standards, the LDPC codeword length is equal to 672 bits. If each symbol is comprised of six bits, then each codeword may contain 112 symbols. For example, for 64-QAM modulation, the codeword length is equal to 112 symbols when a symbol is comprised of six bits. The SC symbol block may contain one or more codewords. Continuing with the above example, that may mean that four codewords belong to the same SC symbol block (e.g., 448 = 112 * 4).

[0069] In one embodiment, when the interleaved symbol block frame arrives at the receiver device (e.g., a user device), one or more devices on the receive chain of FIG. 3 may operate on the interleaved symbol block frame. For example, an equalizer device (e.g., the equalizer device 310 of FIG. 3) may process each interleaved SC symbol block separately taking the DFT of size NGI + N (e.g., 64 + 448), which is typically a power of 2.

[0070] It is understood that the above descriptions are for purposes of illustration and are not meant to be limiting.

[0071] FIG. 5 depicts an illustrative block diagram for an SC PHY block interleaver system, in accordance with one or more example embodiments of the present disclosure.

[0072] In one embodiment, an SC PHY block interleaver system may utilize an interleaver device that may provide efficient noise sample decorrelation. The interleaver device may perform row-by-row writing (into memory and into elements of the interleaver device) on the QAM symbol basis from 1 to Nx and column-by-column reading on the QAM symbol basis from 1 to Ny. The SC block length should be decomposed as follows: N = Nx * Ny, where N may be equal to 448 data symbols (or any other number of data symbols).

[0073] Referring to FIG. 5, there is shown an SC PHY block interleaver 500 design that may be defined in a number of rows 506 (Nx) and a number of columns 508 (Ny) resulting in Nx multiplied by Ny (i.e., Nx * Ny) number of cells or elements that contain blocks of symbols that may be written in each of the cells or elements in direction 502. That is, each element does not contain a single QAM symbol, but rather a group of symbols. The SC PHY block interleaver 500 may then generate outputs by reading out the blocks of symbols in direction 504. The SC PHY block interleaver 500 cells may be designated as (x, y), where x and y are integers that identify each of the rows and each of columns respectively. The SC PHY block interleaver 500 may receive inputs 530 and generate outputs 540 after the blocks of symbols have been interleaved using the SC PHY block interleaver 500. In other words, the SC PHY block interleaver 500 performs row-by-row writing and column-by-column reading (or vice versa). Since a de-interleaver is always associated with every interleaver that restores the original input data sequence on the receiving side, the de-interleaver performs column-by-column writing and row-by-row reading (or vice versa).

[0074] In one embodiment, the SC PHY block interleaver 500 may be defined for various modulation methods such as quadrature amplitude modulation (QAM) or any other modulation method. For example, the SC PHY block interleaver 500 may be defined for 64- QAM and 256-QAM modulation, or other modulations. Blocks of symbols contain a number of symbols that may be modulated according to 64-QAM, 256-QAM, or any other modulation. For example, a block may contain eight 64-QAM symbols. The SC PHY block interleaver 500 may perform modulated complex symbols interleaving inside the SC PHY block interleaver 500, and its parameters may depend on the N_SPB and N_CB parameters. N_SPB defines the number of 64-QAM symbols per block (or 256-QAM symbols per block), and N_CB defines the number of channel bonding. For example, if the number of symbols per block is 448 and N_CB = 1, this may indicate that there are 448 64-QAM symbols that need to be inputted as one element into the SC PHY block interleaver 500. For example, in the case of 64-QAM modulation, N = Nx * Ny = 448, Nx = 4 and Ny = 112.

[0075] The de-interleaver (e.g., the de-interleaver 308 of FIG. 3) may perform an inverse operation, that is, writing in a column-by-column basis and reading in a row-by-row basis. This may distribute the adjacent noise samples over different codewords. It is understood that the above descriptions are for purposes of illustration and are not meant to be limiting.

[0076] FIG. 6 depicts an illustrative graph showing performance enhancement, in accordance with one or more example embodiments of the present disclosure.

[0077] Referring to FIG. 6, there is shown interleaver performance enhancement for 64- QAM modulation with an LDPC rate of 5/8 in a Rayleigh 3 nanoseconds channel. The interleaver device may have parameters (Nx = 4, Ny = 112).

[0078] In the illustrative graph of FIG. 6, utilizing an interleaver device significantly enhances the performance and introduces a performance gain of about 2.5 dB. The SNR gap to the ideal performance with uncorrected noise is equal to only about 0.3 dB.

[0079] In the case of channel bonding, the parameters for 64-QAM can be selected as follows: Nx = N_CB * 4, Ny = 112. The number of codewords per SC symbol block may be proportional to the N_CB factor. N_CB may be equal to 1, 2, 3 and 4 or any other integer positive number. This may provide a more efficient distribution over the contention windows (CWs).

[0080] In the case of a double codeword size of 1344 bits, the interleaver parameters for 64-QAM modulation may be selected as follows: Nx = N_CB * 2, Ny = 224. N_CB may be equal to 1, 2, 3 and 4 or any other integer positive number. It is understood that the above descriptions are for purposes of illustration and are not meant to be limiting.

[0081] FIG. 7A depicts a flow diagram of an illustrative process 700 for an SC PHY block interleaver system, in accordance with one or more example embodiments of the present disclosure. [0082] At block 702, a device (e.g., the user device(s) 120 and/or the AP 102 of FIG. 1) may determine one or more modulated symbols to be transmitted on a transmission medium. A frame to be transmitted from one device to another may be made up of one or more fields. The one or more fields may be represented by one or more symbols. These one or more symbols may be grouped together to form a symbol block. Here, this block is also referred to herein as a data symbol block, a symbol block, or a block. Therefore, there may be one or more data symbol blocks that are composed of one or more symbols.

[0083] At block 704, the device may group the one or more modulated symbols into one or more modulated symbol blocks to use as inputs to an interleaver device. Since at the PHY level, a constellation mapper device results in modulated symbols, these modulated symbols are grouped into modulated symbol blocks that have a predetermined length that may be based on a DFT size (e.g., 512 symbols) or another length. The one or more modulated symbols are modulated using a 64 quadrature amplitude modulation (64-QAM) or a 256 quadrature amplitude modulation (256-QAM).

[0084] At block 706, the device may interleave, using the interleaver device, the one or more modulated symbol blocks to generate one or more interleaved symbol blocks.

[0085] The device may interleave the one or more modulated symbol blocks on a block- by-block basis. That is, it interleaves one data block at a time. Each data block may contain one or more symbols. The data block is then input to the interleaver. Each data block occupies an element of the interleaver.

[0086] The interleaver device may be represented by an interleaver matrix having one or more elements associated with one or more memory locations, wherein a size of the interleaver matrix is determined by a first number of rows multiplied by a second number of columns. The first number of rows is associated with a channel bonding factor, wherein the second number of columns is associated with a size of a codeword. The interleaver device may provide efficient noise sample decorrelation. The interleaver device may perform row- by-row writing on the QAM symbol basis from 1 to Nx and column-by-column reading on the QAM symbol basis from 1 to Ny. The SC block length should be decomposed as follows: N = Nx * Ny, where N may be equal to 448 data symbols (or any other number of data symbols). In case of channel bonding, the parameters for 64-QAM can be selected as follows: Nx = NCB * 4, Ny = 112. The number of codewords per SC symbol block may be proportional to the NCB factor. NCB may be equal to 1, 2, 3 and 4 or any other integer positive number. This may provide a more efficient distribution over the CWs. In the case of a double codeword size of 1344 bits, the interleaver parameters for 64-QAM modulation may be selected as follows: Nx = NCB * 2, Ny = 224. NCB may be equal to 1, 2, 3 and 4 or any other integer positive number. When interleaving, the interleaving device may write the one or more modulated symbol blocks into the interleaver matrix on a row-by-row basis. Then on the output side, the interleaver device may read the one or more modulated symbol blocks out of the interleaver matrix on a column-by-column basis.

[0087] The number of symbols within a first modulated symbol block of the one or more modulated symbol blocks is equal to a size of a first guard interval of the one or more guard intervals subtracted from a discrete Fourier transfer (DFT) size. For example, the length of the data block plus the length of the guard interval may be 512 symbols (448 + 64). Hence, the length of a data block in this case is 512 - 64, which is 448 symbols. In this case, the DFT size is equal to 512 symbols.

[0088] At block 708, the device may append one or more guard intervals to the one or more interleaved symbol blocks. The data blocks are interlaced with guard intervals of a length of 64 symbols. Hence, the length of the data block plus the length of the guard interval is 512 symbols. In this case, the size of the first guard interval is equal to 64 symbols.

[0089] At block 710, the device may cause to send the one or more interleaved symbol blocks with the appended guard intervals. When the interleaved symbol blocks are appended with a GI, they go through a pulse shaping and DAC for preparation to be transmitted at the PHY level to another device. When a receiving device receives the transmission, the receiving device may use one or more devices on its receive chain to process the frame to retrieve the data. For example, the user device 120 may use the de-interleaver device to de- interleave the interleaved data symbol blocks. The de-interleaver device restores the original data block sent by the AP 102. That is, the de-interleaver device performs the reverse function of the interleaver device. It should be understood that the reverse direction of a data transmission from user devices 120 to the AP 102 may use the same approach by first performing interleaving using an interleaver on the user device 120 and de-interleaving using a de-interleaver device on the AP 102.

[0090] It is understood that the above descriptions are for purposes of illustration and are not meant to be limiting.

[0091] FIG. 7B illustrates a flow diagram of an illustrative process 750 for an SC PHY block interleaver system, in accordance with one or more example embodiments of the present disclosure. [0092] At block 752, a device (e.g., the user device(s) 120 and/or the AP 102 of FIG. 1) may determine one or more interleaved symbol blocks with appended one or more guard intervals received on a transmission medium. For example, the device may use one or more devices on its receive chain to process the one or more interleaved symbol blocks to retrieve data.

[0093] At block 754, the device may determine to remove the one or more guard intervals. The one or more guard intervals are removed using a "remove GI" device on the receive chain of a receiving device. The interleaved symbol blocks are interlaced with guard intervals of a length of 64 symbols. Hence, the length of the data block plus the length of the guard interval is 512 symbols. In this case, the size of the first guard interval is equal to 64 symbols.

[0094] At block 756, the device may de-interleave, by a de-interleaver device, the one or more interleaved symbol blocks to generate one or more modulated symbols blocks. During interleaving, the positions of the data bits are dispersed before transmission so that any corrupted information can be recovered at the receiver by rearranging the data. In that sense, a block interleaver is a device that performs interleaving of data, whereas a de-interleaver is always associated with every interleaver and restores the original input data sequence. For example, in a receiver, a de-interleaver performs the reverse function of an interleaver. For example, a de-interleaver device in a user device 120 (or an AP 102) may de-interleave the interleaved data symbol blocks. The de-interleaver device restores the original data block transmitted and received by the receiving device. That is, the de-interleaver device performs the reverse function of the interleaver device. Since a de-interleaver is always associated with every interleaver that restores the original input data sequence on the receiving side, the de-interleaver performs column-by-column writing and row-by-row reading (or vice versa).

[0095] It is understood that the above descriptions are for purposes of illustration and are not meant to be limiting.

[0096] FIG. 8 shows a functional diagram of an exemplary communication station 800 in accordance with some embodiments. In one embodiment, FIG. 8 illustrates a functional block diagram of a communication station that may be suitable for use as an AP 102 (FIG. 1) or a user device 120 (FIG. 1) in accordance with some embodiments. The communication station 800 may also be suitable for use as a handheld device, a mobile device, a cellular telephone, a smartphone, a tablet, a netbook, a wireless terminal, a laptop computer, a wearable computer device, a femtocell, a high data rate (HDR) subscriber station, an access point, an access terminal, or other personal communication system (PCS) device. [0097] The communication station 800 may include communications circuitry 802 and a transceiver 810 for transmitting and receiving signals to and from other communication stations using one or more antennas 801. The communications circuitry 802 may include circuitry that can operate the physical layer (PHY) communications and/or media access control (MAC) communications for controlling access to the wireless medium, and/or any other communications layers for transmitting and receiving signals. The communication station 800 may also include processing circuitry 806 and memory 808 arranged to perform the operations described herein. In some embodiments, the communications circuitry 802 and the processing circuitry 806 may be configured to perform operations detailed in FIGs. 1, 2A, 2B, 3, 4, 5, 6, 7A, and 7B.

[0098] In accordance with some embodiments, the communications circuitry 802 may be arranged to contend for a wireless medium and configure frames or packets for communicating over the wireless medium. The communications circuitry 802 may be arranged to transmit and receive signals. The communications circuitry 802 may also include circuitry for modulation/demodulation, upconversion/downconversion, filtering, amplification, etc. In some embodiments, the processing circuitry 806 of the communication station 800 may include one or more processors. In other embodiments, two or more antennas 801 may be coupled to the communications circuitry 802 arranged for sending and receiving signals. The memory 808 may store information for configuring the processing circuitry 806 to perform operations for configuring and transmitting message frames and performing the various operations described herein. The memory 808 may include any type of memory, including non-transitory memory, for storing information in a form readable by a machine (e.g., a computer). For example, the memory 808 may include a computer-readable storage device, read-only memory (ROM), random-access memory (RAM), magnetic disk storage media, optical storage media, flash-memory devices and other storage devices and media.

[0099] In some embodiments, the communication station 800 may be part of a portable wireless communication device, such as a personal digital assistant (PDA), a laptop or portable computer with wireless communication capability, a web tablet, a wireless telephone, a smartphone, a wireless headset, a pager, an instant messaging device, a digital camera, an access point, a television, a medical device (e.g., a heart rate monitor, a blood pressure monitor, etc.), a wearable computer device, or another device that may receive and/or transmit information wirelessly. [00100] In some embodiments, the communication station 800 may include one or more antennas 801. The antennas 801 may include one or more directional or omnidirectional antennas, including, for example, dipole antennas, monopole antennas, patch antennas, loop antennas, microstrip antennas, or other types of antennas suitable for transmission of RF signals. In some embodiments, instead of two or more antennas, a single antenna with multiple apertures may be used. In these embodiments, each aperture may be considered a separate antenna. In some multiple-input multiple-output (MIMO) embodiments, the antennas may be effectively separated for spatial diversity and the different channel characteristics that may result between each of the antennas and the antennas of a transmitting station.

[00101] In some embodiments, the communication station 800 may include one or more of a keyboard, a display, a non-volatile memory port, multiple antennas, a graphics processor, an application processor, speakers, and other mobile device elements. The display may be an LCD screen including a touch screen.

[00102] Although the communication station 800 is illustrated as having several separate functional elements, two or more of the functional elements may be combined and may be implemented by combinations of software-configured elements, such as processing elements including digital signal processors (DSPs), and/or other hardware elements. For example, some elements may include one or more microprocessors, DSPs, field-programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), radio-frequency integrated circuits (RFICs) and combinations of various hardware and logic circuitry for performing at least the functions described herein. In some embodiments, the functional elements of the communication station 800 may refer to one or more processes operating on one or more processing elements.

[00103] Certain embodiments may be implemented in one or a combination of hardware, firmware, and software. Other embodiments may also be implemented as instructions stored on a computer-readable storage device, which may be read and executed by at least one processor to perform the operations described herein. A computer-readable storage device may include any non-transitory memory mechanism for storing information in a form readable by a machine (e.g., a computer). For example, a computer-readable storage device may include read-only memory (ROM), random-access memory (RAM), magnetic disk storage media, optical storage media, flash- memory devices, and other storage devices and media. In some embodiments, the communication station 800 may include one or more processors and may be configured with instructions stored on a computer-readable storage device memory.

[00104] FIG. 9 illustrates a block diagram of an example of a machine 900 or system upon which any one or more of the techniques (e.g., methodologies) discussed herein may be performed. In other embodiments, the machine 900 may operate as a standalone device or may be connected (e.g., networked) to other machines. In a networked deployment, the machine 900 may operate in the capacity of a server machine, a client machine, or both in server-client network environments. In an example, the machine 900 may act as a peer machine in peer-to-peer (P2P) (or other distributed) network environments. The machine 900 may be a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile telephone, a wearable computer device, a web appliance, a network router, a switch or bridge, or any machine capable of executing instructions (sequential or otherwise) that specify actions to be taken by that machine, such as a base station. Further, while only a single machine is illustrated, the term "machine" shall also be taken to include any collection of machines that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methodologies discussed herein, such as cloud computing, software as a service (SaaS), or other computer cluster configurations.

[00105] Examples, as described herein, may include or may operate on logic or a number of components, modules, or mechanisms. Modules are tangible entities (e.g., hardware) capable of performing specified operations when operating. A module includes hardware. In an example, the hardware may be specifically configured to carry out a specific operation (e.g., hardwired). In another example, the hardware may include configurable execution units (e.g., transistors, circuits, etc.) and a computer readable medium containing instructions where the instructions configure the execution units to carry out a specific operation when in operation. The configuring may occur under the direction of the executions units or a loading mechanism. Accordingly, the execution units are communicatively coupled to the computer-readable medium when the device is operating. In this example, the execution units may be a member of more than one module. For example, under operation, the execution units may be configured by a first set of instructions to implement a first module at one point in time and reconfigured by a second set of instructions to implement a second module at a second point in time. [00106] The machine (e.g., computer system) 900 may include a hardware processor 902 (e.g., a central processing unit (CPU), a graphics processing unit (GPU), a hardware processor core, or any combination thereof), a main memory 904 and a static memory 906, some or all of which may communicate with each other via an interlink (e.g., bus) 908. The machine 900 may further include a power management device 932, a graphics display device 910, an alphanumeric input device 912 (e.g., a keyboard), and a user interface (UI) navigation device 914 (e.g., a mouse). In an example, the graphics display device 910, alphanumeric input device 912, and UI navigation device 914 may be a touch screen display. The machine 900 may additionally include a storage device (i.e., drive unit) 916, a signal generation device 918 (e.g., a speaker), a SC PHY block interleaver device 919, a network interface device/transceiver 920 coupled to antenna(s) 930, and one or more sensors 928, such as a global positioning system (GPS) sensor, a compass, an accelerometer, or other sensor. The machine 900 may include an output controller 934, such as a serial (e.g., universal serial bus (USB), parallel, or other wired or wireless (e.g., infrared (IR), near field communication (NFC), etc.) connection to communicate with or control one or more peripheral devices (e.g., a printer, a card reader, etc.)).

[00107] The storage device 916 may include a machine readable medium 922 on which is stored one or more sets of data structures or instructions 924 (e.g., software) embodying or utilized by any one or more of the techniques or functions described herein. The instructions 924 may also reside, completely or at least partially, within the main memory 904, within the static memory 906, or within the hardware processor 902 during execution thereof by the machine 900. In an example, one or any combination of the hardware processor 902, the main memory 904, the static memory 906, or the storage device 916 may constitute machine-readable media.

[00108] The SC PHY block interleaver device 919 may carry out or perform any of the operations and processes (e.g., processes 700 and 750) described and shown above. For example, the SC PHY block interleaver device 919 may be configured to facilitate a block interleaver design for SC PHY. This design may enhance system performance in frequency selective channels. The interleaver may provide gain for all modulation types. However, the most prominent effect is achieved for high order modulations including 64-QAM and 256- QAM, for example, for a high SNR region.

[00109] The SC PHY block interleaver device 919 may break correlation of the post equalizer noise and residual inter-symbol interference (ISI) at the output of a linear minimum mean square error (LMMSE) receiver. The gain may be achieved from the fact that the low- density parity-check (LDPC) decoder operates with essentially white noise, and introduction of correlation due to equalization may significantly degrade its performance. The impact of "colored" noise becomes significant for a high SNR region, which may prevent high order modulation selection in frequency selective channels.

[00110] The SC PHY block interleaver device 919 may operate on a block-by-block basis. That is, it interleaves one data block at a time. Each data block may contain one or more symbols. The data block is then input to the interleaver. Each data block occupies an element of the SC PHY block interleaver device 919.

[00111] The SC PHY block interleaver device 919 may perform row-by-row writing on the QAM symbol basis from 1 to Nx and column-by-column reading on the QAM symbol basis from 1 to Ny. The SC block length should be decomposed as follows: N = Nx * Ny, where N may be equal to 448 data symbols (or any other number of data symbols).

[00112] It is understood that the above are only a subset of what the SC PHY block interleaver device 919 may be configured to perform and that other functions included throughout this disclosure may also be performed by the SC PHY block interleaver device 919.

[00113] While the machine-readable medium 922 is illustrated as a single medium, the term "machine-readable medium" may include a single medium or multiple media (e.g., a centralized or distributed database, and/or associated caches and servers) configured to store the one or more instructions 924.

[00114] Various embodiments may be implemented fully or partially in software and/or firmware. This software and/or firmware may take the form of instructions contained in or on a non-transitory computer-readable storage medium. Those instructions may then be read and executed by one or more processors to enable performance of the operations described herein. The instructions may be in any suitable form, such as but not limited to source code, compiled code, interpreted code, executable code, static code, dynamic code, and the like. Such a computer-readable medium may include any tangible non-transitory medium for storing information in a form readable by one or more computers, such as but not limited to read only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; a flash memory, etc.

[00115] The term "machine-readable medium" may include any medium that is capable of storing, encoding, or carrying instructions for execution by the machine 900 and that cause the machine 900 to perform any one or more of the techniques of the present disclosure, or that is capable of storing, encoding, or carrying data structures used by or associated with such instructions. Non-limiting machine-readable medium examples may include solid-state memories and optical and magnetic media. In an example, a massed machine -readable medium includes a machine-readable medium with a plurality of particles having resting mass. Specific examples of massed machine-readable media may include non-volatile memory, such as semiconductor memory devices (e.g., electrically programmable read-only memory (EPROM), or electrically erasable programmable readonly memory (EEPROM)) and flash memory devices; magnetic disks, such as internal hard disks and removable disks; magneto-optical disks; and CD-ROM and DVD- ROM disks.

[00116] The instructions 924 may further be transmitted or received over a communications network 926 using a transmission medium via the network interface device/transceiver 920 utilizing any one of a number of transfer protocols (e.g., frame relay, internet protocol (IP), transmission control protocol (TCP), user datagram protocol (UDP), hypertext transfer protocol (HTTP), etc.). Example communications networks may include a local area network (LAN), a wide area network (WAN), a packet data network (e.g., the Internet), mobile telephone networks (e.g., cellular networks), plain old telephone (POTS) networks, wireless data networks (e.g., Institute of Electrical and Electronics Engineers (IEEE) 802.11 family of standards known as Wi-Fi®, IEEE 802.16 family of standards known as WiMax®), IEEE 802.15.4 family of standards, and peer-to-peer (P2P) networks, among others. In an example, the network interface device/transceiver 920 may include one or more physical jacks (e.g., Ethernet, coaxial, or phone jacks) or one or more antennas to connect to the communications network 926. In an example, the network interface device/transceiver 920 may include a plurality of antennas to wirelessly communicate using at least one of single-input multiple-output (SIMO), multiple-input multiple-output (MIMO), or multiple-input single-output (MISO) techniques. The term "transmission medium" shall be taken to include any intangible medium that is capable of storing, encoding, or carrying instructions for execution by the machine 900 and includes digital or analog communications signals or other intangible media to facilitate communication of such software. The operations and processes described and shown above may be carried out or performed in any suitable order as desired in various implementations. Additionally, in certain implementations, at least a portion of the operations may be carried out in parallel. Furthermore, in certain implementations, less than or more than the operations described may be performed.

[00117] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. The terms "computing device," "user device," "communication station," "station," "handheld device," "mobile device," "wireless device" and "user equipment" (UE) as used herein refers to a wireless communication device such as a cellular telephone, a smartphone, a tablet, a netbook, a wireless terminal, a laptop computer, a femtocell, a high data rate (HDR) subscriber station, an access point, a printer, a point of sale device, an access terminal, or other personal communication system (PCS) device. The device may be either mobile or stationary.

[00118] As used within this document, the term "communicate" is intended to include transmitting, or receiving, or both transmitting and receiving. This may be particularly useful in claims when describing the organization of data that is being transmitted by one device and received by another, but only the functionality of one of those devices is required to infringe the claim. Similarly, the bidirectional exchange of data between two devices (both devices transmit and receive during the exchange) may be described as "communicating," when only the functionality of one of those devices is being claimed. The term "communicating" as used herein with respect to a wireless communication signal includes transmitting the wireless communication signal and/or receiving the wireless communication signal. For example, a wireless communication unit, which is capable of communicating a wireless communication signal, may include a wireless transmitter to transmit the wireless communication signal to at least one other wireless communication unit, and/or a wireless communication receiver to receive the wireless communication signal from at least one other wireless communication unit.

[00119] As used herein, unless otherwise specified, the use of the ordinal adjectives "first," "second," "third," etc., to describe a common object, merely indicates that different instances of like objects are being referred to and are not intended to imply that the objects so described must be in a given sequence, either temporally, spatially, in ranking, or in any other manner.

[00120] The term "access point" (AP) as used herein may be a fixed station. An access point may also be referred to as an access node, a base station, or some other similar terminology known in the art. An access terminal may also be called a mobile station, user equipment (UE), a wireless communication device, or some other similar terminology known in the art. Embodiments disclosed herein generally pertain to wireless networks. Some embodiments may relate to wireless networks that operate in accordance with one of the IEEE 802.11 standards. [00121] Some embodiments may be used in conjunction with various devices and systems, for example, a personal computer (PC), a desktop computer, a mobile computer, a laptop computer, a notebook computer, a tablet computer, a server computer, a handheld computer, a handheld device, a personal digital assistant (PDA) device, a handheld PDA device, an on- board device, an off-board device, a hybrid device, a vehicular device, a non-vehicular device, a mobile or portable device, a consumer device, a non-mobile or non-portable device, a wireless communication station, a wireless communication device, a wireless access point (AP), a wired or wireless router, a wired or wireless modem, a video device, an audio device, an audio- video (A/V) device, a wired or wireless network, a wireless area network, a wireless video area network (WVAN), a local area network (LAN), a wireless LAN (WLAN), a personal area network (PAN), a wireless PAN (WPAN), and the like.

[00122] Some embodiments may be used in conjunction with one way and/or two-way radio communication systems, cellular radio-telephone communication systems, a mobile phone, a cellular telephone, a wireless telephone, a personal communication system (PCS) device, a PDA device which incorporates a wireless communication device, a mobile or portable global positioning system (GPS) device, a device which incorporates a GPS receiver or transceiver or chip, a device which incorporates an RFID element or chip, a multiple input multiple output (MIMO) transceiver or device, a single input multiple output (SIMO) transceiver or device, a multiple input single output (MISO) transceiver or device, a device having one or more internal antennas and/or external antennas, digital video broadcast (DVB) devices or systems, multi-standard radio devices or systems, a wired or wireless handheld device, e.g., a smartphone, a wireless application protocol (WAP) device, or the like.

[00123] Some embodiments may be used in conjunction with one or more types of wireless communication signals and/or systems following one or more wireless communication protocols, for example, radio frequency (RF), infrared (IR), frequency- division multiplexing (FDM), orthogonal FDM (OFDM), time-division multiplexing (TDM), time-division multiple access (TDMA), extended TDMA (E-TDMA), general packet radio service (GPRS), extended GPRS, code-division multiple access (CDMA), wideband CDMA (WCDMA), CDMA 2000, single-carrier CDMA, multi-carrier CDMA, multi-carrier modulation (MDM), discrete multi-tone (DMT), Bluetooth®, global positioning system (GPS), Wi-Fi, Wi-Max, ZigBee, ultra-wideband (UWB), global system for mobile communications (GSM), 2G, 2.5G, 3G, 3.5G, 4G, fifth generation (5G) mobile networks, 3GPP, long term evolution (LTE), LTE advanced, enhanced data rates for GSM Evolution (EDGE), or the like. Other embodiments may be used in various other devices, systems, and/or networks.

[00124] According to example embodiments of the disclosure, there may be a device. The device may include memory and processing circuitry configured to determine one or more modulated symbols to be transmitted on a transmission medium. The processing circuitry may be further configured to group the one or more modulated symbols into one or more modulated symbol blocks to use as inputs to an interleaver device. The processing circuitry may be further configured to interleave, using the interleaver device, the one or more modulated symbol blocks to generate one or more interleaved symbol blocks. The processing circuitry may be further configured to append one or more guard intervals to the one or more interleaved symbol blocks. The processing circuitry may be further configured to cause to send the one or more interleaved symbol blocks with the appended guard intervals.

[00125] The implementations may include one or more of the following features. The one or more modulated symbols are modulated using a 64 quadrature amplitude modulation (64- QAM) or a 256 quadrature amplitude modulation (256-QAM). To interleave the one or more modulated symbol blocks comprises the processing circuitry being further configured to interleave the one or more modulated symbol blocks on a block by block basis. The processing circuitry may be further configured to define the interleaver device by an interleaver matrix having one or more elements associated with one or more memory locations, wherein a size of the interleaver matrix is determined by a first number of rows and a second number of columns. The first number of rows is associated with a channel bonding factor and wherein the second number of columns is associated with a size of a codeword. To interleave the one or more modulated symbol blocks comprises the processing circuitry being further configured to write the one or more modulated symbol blocks into the interleaver matrix on a row by row basis. The processing circuitry may be further configured to read the one or more modulated symbol blocks out of the interleaver matrix on a column by column basis. A number of symbols within a first modulated symbol block of the one or more modulated symbol blocks is equal to a size of a first guard interval of the one or more guard intervals subtracted from a discrete Fourier transfer (DFT) size. The DFT size is equal to 512 symbols. A size of the first guard interval is equal to 64 symbols. The device may further include a transceiver configured to transmit and receive wireless signals. The device may further include one or more antennas coupled to the transceiver.

[00126] According to example embodiments of the disclosure, there may be a device. The device may include memory and processing circuitry configured to determining one or more interleaved symbol blocks with appended one or more guard intervals received on a transmission medium. The processing circuitry may be further configured to determining to remove the appended one or more guard intervals. The processing circuitry may be further configured to de-interleaving, by a de-interleaver device, the one or more interleaved symbol blocks to generate one or more modulated symbols blocks.

[00127] The implementations may include one or more of the following features. The one or more modulated symbols are modulated using a 64 quadrature amplitude modulation (64- QAM) or a 256 quadrature amplitude modulation (256-QAM). To generate the one or more modulated symbol blocks comprises the operations for de-interleaving the one or more interleaved symbol blocks on a block by block basis. The processing circuitry for de- interleaving the one or more interleaved symbol blocks may be further configured to write the one or more modulated symbol blocks into the de-interleaver matrix on a row by row basis. The processing circuitry may be further configured to read the one or more modulated symbol blocks out of the de-interleaver matrix on a column by column basis. The processing circuity may be further configured to define the de-interleaver device by a de-interleaver matrix having one or more elements associated with one or more memory locations, wherein a size of the de-interleaver matrix is determined by a first number of rows and a second number of columns. The first number of rows is associated with a channel bonding factor and wherein the second number of columns is associated with a size of a codeword. The device may further include a transceiver configured to transmit and receive wireless signals. The device may further include one or more antennas coupled to the transceiver.

[00128] According to example embodiments of the disclosure, there may be a non-transitory computer-readable medium storing computer-executable instructions which, when executed by a processor, cause the processor to perform operations. The operations may include determining one or more interleaved symbol blocks with appended one or more guard intervals received on a transmission medium. The operations may include determining to remove the appended one or more guard intervals. The operations may include de-interleaving, by a de- interleaver device, the one or more interleaved symbol blocks to generate one or more modulated symbols blocks.

[00129] The implementations may include one or more of the following features. The one or more modulated symbols are modulated using a 64 quadrature amplitude modulation (64- QAM) or a 256 quadrature amplitude modulation (256-QAM). To generate the one or more modulated symbol blocks comprises the operations for de-interleaving the one or more interleaved symbol blocks on a block by block basis. The operations for de-interleaving the one or more interleaved symbol blocks comprise writing the one or more modulated symbol blocks into the de-interleaver matrix on a row by row basis. The operations may include reading the one or more modulated symbol blocks out of the de-interleaver matrix on a column by column basis. The operations further comprise defining the de-interleaver device by a de-interleaver matrix having one or more elements associated with one or more memory locations, wherein a size of the de-interleaver matrix is determined by a first number of rows and a second number of columns. The first number of rows is associated with a channel bonding factor and wherein the second number of columns is associated with a size of a codeword.

[00130] A non-transitory computer-readable medium storing computer-executable instructions which when executed by one or more processors result in performing operations may include determining one or more modulated symbols to be transmitted on a transmission medium. The operations may include grouping the one or more modulated symbols into one or more modulated symbol blocks to use as inputs to an interleaver device. The operations may include interleaving, using the interleaver device, the one or more modulated symbol blocks to generate one or more interleaved symbol blocks. The operations may include append one or more guard intervals to the one or more interleaved symbol blocks. The operations may include causing to send the one or more interleaved symbol blocks with the appended guard intervals.

[00131] The implementations may include one or more of the following features. The one or more modulated symbols are modulated using a 64 quadrature amplitude modulation (64- QAM) or a 256 quadrature amplitude modulation (256-QAM). To interleave the one or more modulated symbol blocks comprises the operations further comprise interleaving the one or more modulated symbol blocks on a block by block basis. The operations further comprise defining the interleaver device by an interleaver matrix having one or more elements associated with one or more memory locations, wherein a size of the interleaver matrix is determined by a first number of rows and a second number of columns. The first number of rows is associated with a channel bonding factor and wherein the second number of columns is associated with a size of a codeword. To interleave the one or more modulated symbol blocks comprises the operations may further comprise writing the one or more modulated symbol blocks into the interleaver matrix on a row by row basis. The operations may include reading the one or more modulated symbol blocks out of the interleaver matrix on a column by column basis. A number of symbols within a first modulated symbol block of the one or more modulated symbol blocks is equal to a size of a first guard interval of the one or more guard intervals subtracted from a discrete Fourier transfer (DFT) size. The DFT size is equal to 512 symbols. A size of the first guard interval is equal to 64 symbols.

[00132] According to example embodiments of the disclosure, there may include a method. The method may include determining one or more modulated symbols to be transmitted on a transmission medium. The method may include grouping the one or more modulated symbols into one or more modulated symbol blocks to use as inputs to an interleaver device. The method may include interleaving, using the interleaver device, the one or more modulated symbol blocks to generate one or more interleaved symbol blocks. The method may include append one or more guard intervals to the one or more interleaved symbol blocks. The method may include causing to send the one or more interleaved symbol blocks with the appended guard intervals.

[00133] The implementations may include one or more of the following features. The one or more modulated symbols are modulated using a 64 quadrature amplitude modulation (64- QAM) or a 256 quadrature amplitude modulation (256-QAM). Interleaving the one or more modulated symbol blocks comprises interleaving the one or more modulated symbol blocks on a block by block basis. The method may further include defining the interleaver device by an interleaver matrix having one or more elements associated with one or more memory locations, wherein a size of the interleaver matrix is determined by a first number of rows and a second number of columns. The first number of rows is associated with a channel bonding factor and wherein the second number of columns is associated with a size of a codeword. To interleave the one or more modulated symbol blocks comprises writing the one or more modulated symbol blocks into the interleaver matrix on a row by row basis. The method may include reading the one or more modulated symbol blocks out of the interleaver matrix on a column by column basis. A number of symbols within a first modulated symbol block of the one or more modulated symbol blocks is equal to a size of a first guard interval of the one or more guard intervals subtracted from a discrete Fourier transfer (DFT) size. The DFT size is equal to 512 symbols. A size of the first guard interval is equal to 64 symbols.

[00134] According to example embodiments of the disclosure, there may include a method. The method may include determining one or more interleaved symbol blocks with appended one or more guard intervals received on a transmission medium. The method may include determining to remove the appended one or more guard intervals. The method may include de-interleaving, by a de-interleaver device, the one or more interleaved symbol blocks to generate one or more modulated symbols blocks. The implementations may include one or more of the following features. The one or more modulated symbols are modulated using a 64 quadrature amplitude modulation (64-QAM) or a 256 quadrature amplitude modulation (256-QAM). To generate the one or more modulated symbol blocks comprises de- interleaving the one or more interleaved symbol blocks on a block by block basis. De- interleaving the one or more interleaved symbol blocks comprises writing the one or more modulated symbol blocks into the de-interleaver matrix on a row by row basis. The method may include reading the one or more modulated symbol blocks out of the de-interleaver matrix on a column by column basis. Defining the de-interleaver device by a de-interleaver matrix having one or more elements associated with one or more memory locations, wherein a size of the de-interleaver matrix is determined by a first number of rows and a second number of columns. The first number of rows is associated with a channel bonding factor and wherein the second number of columns is associated with a size of a codeword.

[00135] In example embodiments of the disclosure, there may be an apparatus. The apparatus may include means for determining one or more modulated symbols to be transmitted on a transmission medium. The apparatus may include means for grouping the one or more modulated symbols into one or more modulated symbol blocks to use as inputs to an interleaver device. The apparatus may include means for interleaving, using the interleaver device, the one or more modulated symbol blocks to generate one or more interleaved symbol blocks. The apparatus may include append one or more guard intervals to the one or more interleaved symbol blocks. The apparatus may include means for causing to send the one or more interleaved symbol blocks with the appended guard intervals.

[00136] The implementations may include one or more of the following features. The one or more modulated symbols are modulated using a 64 quadrature amplitude modulation (64- QAM) or a 256 quadrature amplitude modulation (256-QAM). The means for interleaving the one or more modulated symbol blocks may comprise interleaving the one or more modulated symbol blocks on a block by block basis. The apparatus may further include means for defining the interleaver device by an interleaver matrix having one or more elements associated with one or more memory locations, wherein a size of the interleaver matrix is determined by a first number of rows and a second number of columns. The first number of rows is associated with a channel bonding factor and wherein the second number of columns is associated with a size of a codeword. To interleave the one or more modulated symbol blocks comprises means for writing the one or more modulated symbol blocks into the interleaver matrix on a row by row basis and means for reading the one or more modulated symbol blocks out of the interleaver matrix on a column by column basis. A number of symbols within a first modulated symbol block of the one or more modulated symbol blocks is equal to a size of a first guard interval of the one or more guard intervals subtracted from a discrete Fourier transfer (DFT) size. The DFT size is equal to 512 symbols. A size of the first guard interval is equal to 64 symbols.

[00137] In example embodiments of the disclosure, there may be an apparatus. The apparatus may include means for determining one or more interleaved symbol blocks with appended one or more guard intervals received on a transmission medium. The apparatus may include means for determining to remove the appended one or more guard intervals. The apparatus may include means for de-interleaving, by a de-interleaver device, the one or more interleaved symbol blocks to generate one or more modulated symbols blocks.

[00138] The implementations may include one or more of the following features. The one or more modulated symbols are modulated using a 64 quadrature amplitude modulation (64- QAM) or a 256 quadrature amplitude modulation (256-QAM). To generate the one or more modulated symbol blocks comprises means for de-interleaving the one or more interleaved symbol blocks on a block by block basis. The means for de-interleaving the one or more interleaved symbol blocks comprise means for writing the one or more modulated symbol blocks into the de-interleaver matrix on a row by row basis. The means for de-interleaving the one or more interleaved symbol blocks comprise means for reading the one or more modulated symbol blocks out of the de-interleaver matrix on a column by column basis. The apparatus may further include means for defining the de-interleaver device by a de- interleaver matrix having one or more elements associated with one or more memory locations, wherein a size of the de-interleaver matrix is determined by a first number of rows and a second number of columns. The first number of rows is associated with a channel bonding factor and wherein the second number of columns is associated with a size of a codeword. An apparatus may include means for performing a method as claimed in any of the preceding claims.

[00139] Certain aspects of the disclosure are described above with reference to block and flow diagrams of systems, methods, apparatuses, and/or computer program products according to various implementations. It will be understood that one or more blocks of the block diagrams and flow diagrams, and combinations of blocks in the block diagrams and the flow diagrams, respectively, may be implemented by computer-executable program instructions. Likewise, some blocks of the block diagrams and flow diagrams may not necessarily need to be performed in the order presented, or may not necessarily need to be performed at all, according to some implementations. [00140] These computer-executable program instructions may be loaded onto a special- purpose computer or other particular machine, a processor, or other programmable data processing apparatus to produce a particular machine, such that the instructions that execute on the computer, processor, or other programmable data processing apparatus create means for implementing one or more functions specified in the flow diagram block or blocks. These computer program instructions may also be stored in a computer-readable storage media or memory that may direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable storage media produce an article of manufacture including instruction means that implement one or more functions specified in the flow diagram block or blocks. As an example, certain implementations may provide for a computer program product, comprising a computer- readable storage medium having a computer-readable program code or program instructions implemented therein, said computer-readable program code adapted to be executed to implement one or more functions specified in the flow diagram block or blocks. The computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational elements or steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions that execute on the computer or other programmable apparatus provide elements or steps for implementing the functions specified in the flow diagram block or blocks.

[00141] Accordingly, blocks of the block diagrams and flow diagrams support combinations of means for performing the specified functions, combinations of elements or steps for performing the specified functions and program instruction means for performing the specified functions. It will also be understood that each block of the block diagrams and flow diagrams, and combinations of blocks in the block diagrams and flow diagrams, may be implemented by special-purpose, hardware-based computer systems that perform the specified functions, elements or steps, or combinations of special-purpose hardware and computer instructions.

[00142] Conditional language, such as, among others, "can," "could," "might," or "may," unless specifically stated otherwise, or otherwise understood within the context as used, is generally intended to convey that certain implementations could include, while other implementations do not include, certain features, elements, and/or operations. Thus, such conditional language is not generally intended to imply that features, elements, and/or operations are in any way required for one or more implementations or that one or more implementations necessarily include logic for deciding, with or without user input or prompting, whether these features, elements, and/or operations are included or are to be performed in any particular implementation.

[00143] Many modifications and other implementations of the disclosure set forth herein will be apparent having the benefit of the teachings presented in the foregoing descriptions and the associated drawings. Therefore, it is to be understood that the disclosure is not to be limited to the specific implementations disclosed and that modifications and other implementations are intended to be included within the scope of the appended claims. Although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.

Claims

CLAIMS What is claimed is:

1. A device, the device comprising: memory and processing circuitry, configured to: determine one or more modulated symbols to be transmitted on a transmission medium; group the one or more modulated symbols into one or more modulated symbol blocks to use as inputs to an interleaver device;

interleave, using the interleaver device, the one or more modulated symbol blocks to generate one or more interleaved symbol blocks;

append one or more guard intervals to the one or more interleaved symbol blocks;

and

cause to send the one or more interleaved symbol blocks with the appended guard intervals.

2. The device of claim 1, wherein the one or more modulated symbols are modulated using a 64 quadrature amplitude modulation (64-QAM) or a 256 quadrature amplitude modulation (256-QAM).

3. The device of claim 1, wherein to interleave the one or more modulated symbol blocks comprises the processing circuitry being further configured to interleave the one or more modulated symbol blocks on a block by block basis.

4. The device of claim 1, wherein the processing circuitry is further configured to define the interleaver device by an interleaver matrix having one or more elements associated with one or more memory locations, wherein a size of the interleaver matrix is determined by a first number of rows and a second number of columns.

5. The device of claim 4, wherein the first number of rows is associated with a channel bonding factor and wherein the second number of columns is associated with a size of a codeword.

6. The device of claim 4, wherein to interleave the one or more modulated symbol blocks comprises the processing circuitry being further configured to: write the one or more modulated symbol blocks into the interleaver matrix on a row by row basis; and

read the one or more modulated symbol blocks out of the interleaver matrix on a column by column basis.

7. The device of claim 1, wherein a number of symbols within a first modulated symbol block of the one or more modulated symbol blocks is equal to a size of a first guard interval of the one or more guard intervals subtracted from a discrete Fourier transfer (DFT) size.

8. The device of claim 7, wherein the DFT size is equal to 512 symbols.

9. The device of claim 7, wherein a size of the first guard interval is equal to 64 symbols.

10. The device of claim 1, further comprising a transceiver configured to transmit and receive wireless signals.

11. The device of any one of claims 1-10, further comprising one or more antennas coupled to the transceiver.

12. A non-transitory computer-readable medium storing computer-executable instructions which when executed by one or more processors result in performing operations comprising:

determining one or more interleaved symbol blocks with appended one or more guard intervals received on a transmission medium;

determining to remove the appended one or more guard intervals; and de-interleaving, by a de-interleaver device, the one or more interleaved symbol blocks to generate one or more modulated symbols blocks.

13. The non-transitory computer-readable medium of claim 12, wherein the one or more modulated symbols are modulated using a 64 quadrature amplitude modulation (64-QAM) or a 256 quadrature amplitude modulation (256-QAM).

14. The non-transitory computer-readable medium of claim 12, wherein to generate the one or more modulated symbol blocks comprises the operations for de-interleaving the one or more interleaved symbol blocks on a block by block basis.

15. The non- transitory computer-readable medium of claim 12, wherein the operations for de-interleaving the one or more interleaved symbol blocks comprise:

writing the one or more modulated symbol blocks into the de-interleaver matrix on a row by row basis; and

read the one or more modulated symbol blocks out of the de-interleaver matrix on a column by column basis.

16. The non-transitory computer-readable medium of claim 12, wherein the operations further comprise defining the de-interleaver device by a de-interleaver matrix having one or more elements associated with one or more memory locations, wherein a size of the de- interleaver matrix is determined by a first number of rows and a second number of columns.

17. The non-transitory computer-readable medium of any one of claims 12-16, wherein the first number of rows is associated with a channel bonding factor and wherein the second number of columns is associated with a size of a codeword.

18. A method comprising:

determining one or more modulated symbols to be transmitted on a transmission medium;

grouping the one or more modulated symbols into one or more modulated symbol blocks to use as inputs to an interleaver device;

interleaving, using the interleaver device, the one or more modulated symbol blocks to generate one or more interleaved symbol blocks;

and

causing to send the one or more interleaved symbol blocks with the appended guard intervals.

19. The method of claim 18, wherein the one or more modulated symbols are modulates using a modulated using a 64 quadrature amplitude modulation (64-QAM) or a 256 quadrature amplitude modulation (256-QAM).

20. The method of claim 18, wherein interleaving the one or more modulated symbol blocks comprises interleaving the one or more modulated symbol blocks on a block by block basis.

21. The method of claim 18, further comprising defining the interleaver device by an interleaver matrix having one or more elements associated with one or more memory locations, wherein a size of the interleaver matrix is determined by a first number of rows and a second number of columns.

22. The method of claim 21, wherein the first number of rows is associated with a channel bonding factor and wherein the second number of columns is associated with a size of a codeword.

23. The method of claim 21, wherein to interleave the one or more modulated symbol blocks comprises:

writing the one or more modulated symbol blocks into the interleaver matrix on a row by row basis; and

reading the one or more modulated symbol blocks out of the interleaver matrix on a column by column basis.

24. The method of claim 18, wherein a number of symbols within a first modulated symbol block of the one or more modulated symbol blocks is equal to a size of a first guard interval of the one or more guard intervals subtracted from a discrete Fourier transfer (DFT) size.

25. The method of any one of claims 18-24, wherein the DFT size is equal to 512 symbols.