WO2018072438A1 - Phy interleaving method and device, and computer storage medium - Google Patents

Abstract

Disclosed are a PHY interleaving method and device, and a computer storage medium. The method comprises: caching a k-th piece of PHY data in N pieces of PHY data in a k-th storage unit, the k-th storage unit comprising m storage subunits, m and N being natural numbers greater than 0, and k being a natural number greater than 0 and less than or equal to N; deleting a storage portion, in the k-th storage unit, corresponding to unavailable timeslots of the m storage subunits according to an effective timeslot n_k occupied by the k-th piece of PHY data to reconstitute a new k-th storage unit, n_k being a natural number greater than 0 and less than or equal to a preset upper limit; continuing using a (k+1)-th piece of PHY data to constitute a new (k+1)-th storage unit until k is equal to N; separately storing first data stored in a (2i-1)-th storage subunit in each storage subunit corresponding to the N pieces of PHY data in a first matrix according to a preset rule, and storing second data stored in a 2i-th storage subunit in a second matrix for interleaving, and obtaining an interleaved (2i-1)-th group of interleaving data or 2i-th group of interleaving data, i being greater than or equal 1 and less than or equal to m/2.

Description

PHY interleaving method, device and computer storage medium

Cross-reference to related applications

The present application is filed on the basis of the Chinese Patent Application No. PCT Application No.

Technical field

The present invention relates to a transmission technology in the field of communication technologies, and in particular, to a PHY (Physical Layer) interleaving method, apparatus, and computer storage medium.

Background technique

The interleaving technique is a technique of spreading successive bits, that is, by transmitting successive bits in a message in a non-sequential manner, thereby solving the problem that a deep fading valley with a long duration affects successive strings of bits. The flexible Ethernet protocol (FLexE protocol) was proposed to make the interface rate no longer fixed. The FLexE protocol maps to the ODU (Oracle Database Unloader) in three modes: sensing mode, non-perceiving mode, and summary mode. Among them, the sensing mode is mainly applied to the case where the customer service bandwidth is not an integer multiple of the FlexE PHYs, and the transmission network transmits the FlexE PHYs in the sensing mode, and each PHY in the FlexE is independently transmitted in the transmission network. Because the customer service bandwidth in the perceptual mode is not an integer multiple of the FlexE PHYs, the transport network cannot transmit the entire FLexE group, and there are some unavailable time slots in the FlexE PHYs. In the prior art, a logical decision method is often used to solve the problem of interleaving binding of multiple PHYs in the perceptual mode of FlexE, that is, the obtained output after interleaving through the possible results of each of the data interleavings listed in advance. The results were analyzed and judged.

In the process of implementing the present invention, the inventors have found that at least the following problems exist in the prior art:

In the existing PHY interleaving method, although the interleaved obtained output result can be analyzed and judged to realize the interleaving of the PHY data by the possible result of each of the data interleavings listed in advance, the sensing mode is acquired by the prior art. The implementation process of interleaved data of multiple PHYs is complicated, and due to the problem of unavailable time slots in FlexE PHYs in the sensing mode, the interleaving speed of multiple PHYs in the FlexE sensing mode implemented by the prior art is slow.

Summary of the invention

The embodiment of the invention provides a PHY interleaving method, device and computer storage medium, which can reduce the complexity of bit width splicing in PHY interleaving, and realize the interleaving function by a simple method, which is fast and easy to implement.

To achieve the above objective, the technical solution of the embodiment of the present invention is implemented as follows:

The embodiment of the invention provides a PHY interleaving method and device, including:

The kth PHY data of the N PHY data is buffered in a kth storage unit, where the kth storage unit includes m storage subunits; wherein m, N are natural numbers greater than 0, and k is greater than 0 and less than a natural number equal to N;

Deleting a storage portion corresponding to an unavailable time slot of m storage subunits in the kth storage unit according to the effective time slot n _k occupied by the kth PHY data, and reconstructing a new kth storage unit; wherein, n _k a natural number greater than 0 and less than or equal to the preset upper limit;

Continue to construct the new k+1th memory cell for the k+1th PHY data until k is equal to N;

And storing first data stored in the 2i-1th storage subunit of each of the storage subunits corresponding to the N PHY data in the first matrix according to a preset rule, and storing the 2ith storage subunit The second data is stored in the second matrix for interleaving, and the interleaved 2i-1 group interleaved data or the 2ith group interleaved data is obtained, where i is greater than or equal to 1 and less than or equal to m/2.

In an embodiment, the valid time slot n _k occupied by the kth PHY data deletes a storage portion corresponding to an unavailable time slot of m storage subunits in the kth storage unit, and reconstructs a new k storage unit, also includes:

Filling the first storage subunit of the new kth memory cell such that the effective time slot of the first storage subunit of the new kth memory cell is _nk .

In an embodiment, the first data stored in the 2i-1th storage subunit in each of the storage subunits corresponding to the N PHY data is stored in the first matrix according to a preset rule, and The second data stored in the 2ith storage subunit is stored in the second matrix for interleaving, and the interleaved 2i-1 group interleaved data or the 2ith group of interleaved data is obtained, including:

And storing first data stored in the 2i-1th storage subunit in each storage subunit corresponding to the N PHY data in the first matrix;

After the first matrix stores the first data, output the interleaved 2i-1 group of interleaved data;

When starting to output the 2i-1th set of interleaved data, start storing the second data stored in the 2ith storage subunit in each of the storage subunits corresponding to the N PHY data in the second In the matrix;

After the second matrix stores the second data, outputting the second set of interleaved data after the interleaving;

When starting to output the 2ith group of interleaved data, start to add i to 1 and continue interleaving the data stored in the next storage subunit in each of the storage subunits corresponding to the N PHY data until i equals m /2 so far.

In an embodiment, the first data stored by the 2i-1th storage subunit in each storage subunit corresponding to the N PHY data is stored in the first matrix, include:

Storing the first data stored in the 2i-1th storage subunit in each of the storage subunits corresponding to the N PHY data in the first matrix according to an arrangement order of the N PHY data in.

In an embodiment, the second data stored by the 2ith storage subunit in each storage subunit corresponding to the N PHY data is stored in the second matrix, and includes:

And storing the second data stored in the 2ith storage subunit in each of the storage subunits corresponding to the N PHY data in the second matrix according to an arrangement order of the N PHY data.

In an embodiment, the step of adding i to 1 continues to interleave data stored in a next storage subunit in each of the storage subunits corresponding to the N PHY data until i equals m/2. ,Also includes:

Obtaining m sets of interleaved data output by the first matrix and the second matrix.

The embodiment of the invention provides a PHY interleaving device, including:

a buffer unit configured to buffer a kth PHY data of the N PHY data in a kth storage unit, where the kth storage unit includes m storage subunits; wherein m and N are natural numbers greater than 0, k a natural number greater than 0 and less than or equal to N;

a reconstruction unit configured to delete a storage portion corresponding to an unavailable time slot of the m storage subunits in the kth storage unit according to the effective time slot n _k occupied by the kth PHY data, and reconstruct a new kth storage a unit; wherein n _k is a natural number greater than 0 and less than or equal to a preset upper limit; and continuing to construct a new k+1th storage unit for the k+1th PHY data until k is equal to N;

The interleaving unit is configured to store the first data stored in the 2i-1th storage subunit of each of the storage subunits corresponding to the N PHY data in the first matrix according to a preset rule, and store the 2i The second data stored in the storage subunits is stored in the second matrix for interleaving, and the interleaved 2i-1 group interleaved data or the 2ith group interleaved data is obtained, where i is greater than or equal to 1 and less than or equal to m/2.

In an embodiment, the reconstruction unit is further configured to fill a first storage subunit of the new kth storage unit, so that a valid time slot of the first storage subunit of the new kth storage unit is n _k .

In an embodiment, the interleaving unit includes:

a first storage subunit, configured to store, in the first matrix, first data stored in the 2i-1th storage subunit in each storage subunit corresponding to the N PHY data, and notify a first output subunit and a second storage subunit;

The first output subunit is configured to output, after the first matrix stores the first data, the interleaved second i-1 group interleaved data;

The second storage subunit is configured to start, when the first output subunit starts outputting the 2i-1th group of interleaved data, start the foregoing in each storage subunit corresponding to the N PHY data The second data stored by the 2ith storage subunit is stored in the second matrix, and notifies the second output subunit and the first storage subunit;

The second output subunit is configured to output, after the second matrix stores the second data, the interleaved 2i group of interleaved data;

The first storage subunit is further configured to, when the second output subunit starts outputting the 2ith group of interleaved data, start adding i to 1 and continue each storage subunit corresponding to the N PHY data The data stored in the next storage subunit in the cell is interleaved until i equals m/2.

In an embodiment, the first storage subunit is specifically configured to store the 2i-1th storage in each storage subunit corresponding to the N PHY data according to an arrangement order of the N PHY data The first data stored by the subunit is stored in the first matrix.

In an embodiment, the second storage subunit is specifically configured to: in the order of the N PHY data, the 2ith storage subunit in each storage subunit corresponding to the N PHY data The stored second data is stored in the second matrix.

In an embodiment, the interleaving unit is further configured to obtain m sets of interleaved data output by the first matrix and the second matrix.

The embodiment of the present invention further provides a computer storage medium, wherein the computer storage medium stores computer executable instructions, and the computer executable instructions are used to execute the PHY interleaving method according to the embodiment of the present invention.

It can be seen that, in the technical solution of the embodiment of the present invention, the kth PHY data of the N PHY data is cached in the kth storage unit including m storage subunits, where m and N are natural numbers greater than 0. , k is a natural number greater than 0 and less than or equal to N; reconstructing a new kth storage unit by deleting the storage portion corresponding to the unavailable time slots of the m storage subunits in the kth storage unit; respectively, N PHYs according to a preset rule The data is stored in the first matrix and the second matrix for interleaving, and the interleaved m sets of interleaved data are obtained, where i is greater than or equal to 1 and less than or equal to m/2. That is to say, in the technical solution proposed by the present invention, the storage sub-unit can be reconstructed by deleting the unavailable time slot after buffering the data of the PHY, and the data in the storage sub-unit is stored in two matrices in turn to obtain the interleaved The data. Obviously, compared with the prior art, a PHY interleaving method, device and computer storage medium proposed by the embodiments of the present invention can reduce the complexity of bit width splicing in PHY interleaving, and implement the interleaving function in a simple manner, which is fast and Easy to implement.

DRAWINGS

1 is a schematic flowchart of an implementation process of a PHY interlace method according to an embodiment of the present invention;

2 is a schematic diagram of a kth PHY data forming a new kth storage unit according to an embodiment of the present invention;

3 is a schematic diagram of five PHY data constituting five new storage units according to an embodiment of the present invention;

4 is a schematic flowchart of an implementation process of obtaining interleaved data by using a PHY interleaving method according to an embodiment of the present invention;

FIG. 5 is a flowchart of an implementation of acquiring an interlace data according to a preset rule according to an embodiment of the present invention;

FIG. 6 is a schematic diagram of acquiring interleaved data according to an arrangement order of five PHY data according to an embodiment of the present invention; FIG.

FIG. 7 is a schematic diagram of a first component structure of a PHY interleaving apparatus according to an embodiment of the present invention; FIG.

FIG. 8 is a schematic diagram of a second component structure of a PHY interleaving apparatus according to an embodiment of the present invention.

detailed description

The technical solutions in the embodiments of the present invention will be clearly and completely described in the following with reference to the accompanying drawings.

Embodiment 1

In the specific embodiment of the present invention, FIG. 1 is a schematic flowchart of an implementation process of a PHY interleaving method according to an embodiment of the present invention. As shown in FIG. 1, the PHY interleaving method may include the following steps:

Step 101: Cache the kth PHY data of the N PHY data in the kth storage unit, where the kth storage unit includes m storage subunits; wherein m and N are natural numbers greater than 0, and k is greater than 0 and A natural number less than or equal to N.

In a specific embodiment of the present invention, for the kth PHY data of the N PHY data, the kth PHY data may be buffered in the kth storage unit having m storage subunits. Where m and N are natural numbers greater than 0, and k is a natural number greater than 0 and less than or equal to N.

As an embodiment, in the specific embodiment of the present invention, the number m of the storage subunits in the kth storage unit is a fixed value that has no correlation with k. In this embodiment, the value of m is preferentially selected as m= 1024, that is, the kth PHY data of the N PHY data is buffered in the kth storage unit having 1024 storage subunits.

As an embodiment, in a specific embodiment of the present invention, the storage subunit in the kth storage unit is a storage subunit storing PHY data, and the embodiment preferentially selects a block composed of 20 storage parts of 66 bits in size. The block is a storage subunit, that is, the kth PHY data among the N PHY data is buffered in the kth storage unit having m blocks.

Step 102: Deleting a storage portion corresponding to an unavailable time slot of m storage subunits in the kth storage unit according to the valid time slot n _k occupied by the kth PHY data, and reconstructing a new kth storage unit; wherein n _k is A natural number greater than 0 and less than or equal to the preset upper limit.

In a particular embodiment of the invention, since the unavailable time slots present in the storage subunits increase the complexity of data interleaving, the unavailable time slots in the storage subunits need to be deleted. When the effective time slot occupied by the kth PHY data is n _k , the storage portion corresponding to the unavailable time slots of the m storage subunits in the kth storage unit is deleted according to n _k , so that m valid time slots are n The storage subunit of _k constitutes a new kth memory location corresponding to the kth PHY data.

As an embodiment, in a specific embodiment of the present invention, each of the N PHY data has a valid time slot corresponding to the PHY data, and the effective time slot occupied by the kth PHY data is n. _k is a natural number greater than 0 and less than or equal to the preset upper limit value. Since the storage subunit block has 20 storage portions having a size of 66 bits, the present embodiment preferably optimizes the effective time of the kth PHY data. The gap n _k is a natural number greater than 0 and less than or equal to 20.

As an embodiment, in the specific embodiment of the present invention, since the PHY data is not stored in the first storage subunit of the kth storage unit, only one storage portion is occupied, and the time slot can be used as 1. The available time slot of the first storage subunit of the new kth memory cell after deleting the unavailable time slot is also 1, so that when the effective time slot n _k occupied by the kth PHY data is deleted, the kth memory cell is deleted. After storing the storage portion corresponding to the unavailable time slot of the sub-unit, selecting the first storage sub-unit of the new k-th storage unit, and filling the first storage sub-unit of the new _k -th storage unit with n _k -1 storage In part, the available time slot of the first storage subunit of the new kth memory location is also _nk .

For example, FIG. 2 is a schematic diagram of a kth PHY data forming a new kth storage unit in the embodiment of the present invention. As shown in FIG. 2, when the effective time slot of the kth PHY data is n _k , the deletion is performed according to n _k k storing the storage portion corresponding to the unavailable time slots of the m storage subunits, and filling the n _k -1 storage portions in the first storage subunit, thereby forming a new kth storage unit, wherein the new kth storage The effective time slots of the m storage subunits in the unit are both n _k .

Step 103: Continue to construct the new k+1th storage unit for the k+1th PHY data until k is equal to N.

In a specific embodiment of the present invention, the operations of step 101 and step 102 are performed for each of the N PHY data, so that each PHY data of all N PHY data is buffered in the corresponding new storage. In the m storage subunits of the unit. For example, FIG. 3 is a schematic diagram of five new PHY data forming five new storage units according to an embodiment of the present invention. As shown in FIG. 3, the effective time slots of five PHY data are n ₁ , n ₂ , n ₃ , and n _{4 , respectively.} And n ₅ , respectively, deleting, according to the valid time slot, the m storage subunits corresponding to each PHY data, deleting the unavailable time slots and filling the storage part in the first operation subunit, thereby forming five new storage units, wherein The valid time slots of the m memory subunits of the five new memory cells are n ₁ , n ₂ , n ₃ , n ₄ , n _{5 , respectively} .

Step 104: Store first data stored in the 2i-1th storage subunit in each storage subunit corresponding to the N PHY data in the first matrix according to the preset rule, and store the 2ith storage subunit The stored second data is stored in the second matrix for interleaving, and the interleaved 2i-1 group interleaved data or the 2ith group interleaved data is obtained, where i is greater than or equal to 1 and less than or equal to m/2.

In a specific embodiment of the present invention, the first data stored in the 2i-1th storage subunit in each of the storage subunits corresponding to the N PHY data is stored in the first matrix, and the first matrix outputs the interleaved Data, thereby acquiring the interleaved 2i-1 set of interleaved data; similarly, storing the second data stored in the 2ith storage subunit of each of the storage subunits corresponding to the N PHY data in the second matrix, The second matrix outputs the interleaved data to obtain the interleaved 2i-group interleaved data. Where i is greater than or equal to 1 and less than or equal to m/2.

It should be noted that the first data stored in the 2i-1th storage subunit in each storage subunit corresponding to the N PHY data is cached in the 2i-1th storage subunit corresponding to one PHY data. The PHY data, in the same way, the second data stored in the 2ith storage subunit in each of the storage subunits corresponding to the N PHY data is the PHY buffered in the 2ith storage subunit corresponding to one PHY data data.

As an embodiment, in a specific embodiment of the present invention, the first matrix and the second matrix may be two sets of shift registers, and when the storage subunit has 20 saves of 66 bits When storing a partial block, the size of the above two shift registers should be n*20*66bit, where n is the number of PHY data that needs to be interleaved. For example, when five PHY data are interleaved, the size of the shift register is 5*20*66 bits.

As an embodiment, the above step 104 is continued until i is incremented by 1, until i is equal to m/2. FIG. 4 is a schematic diagram of an implementation process for obtaining interleaved data by using a PHY interleaving method according to an embodiment of the present invention. As shown in FIG. 4, a PHY interleaving method according to an embodiment of the present invention further includes: Step 105. details as follows:

Step 105: Obtain m sets of interleaved data output by the first matrix and the second matrix.

In a specific embodiment of the present invention, when each of the N PHY data is buffered in a storage unit having m storage subunits, after the N PHY data is interleaved, the first pass can be obtained. The matrix and the interleaved total m sets of interleaved data of the second matrix output. For example, when each of the N PHY data is buffered in a storage unit having 1024 storage subunits, after the N PHY data are subjected to the interleaving process, the interleaving after the output through the first matrix and the second matrix can be obtained. A total of 1024 sets of interleaved data.

Embodiment 2

Based on the first embodiment, FIG. 5 is a flowchart of an implementation method for acquiring interleaved data according to a preset rule according to an embodiment of the present invention. As shown in FIG. 5, the method for acquiring interleaved data according to a preset rule may include the following steps:

Step 104a: Store first data stored in the 2i-1th storage subunit in each of the storage subunits corresponding to the N PHY data in the first matrix.

In a specific embodiment of the present invention, when i is greater than or equal to 1 and less than or equal to m/2, the first data stored in the 2i-1th storage subunit corresponding to each PHY data is stored in the first matrix, thereby The first data stored in the 2i-1th storage subunit of each of the storage subunits corresponding to all of the N PHY data may be stored in the first matrix.

Step 104b, after the first matrix stores the first data, output the 2i-1 group after the interleaving Weave data.

In a specific embodiment of the present invention, after the first data stored in the 2i-1th storage subunit in each of the storage subunits corresponding to all the N PHY data is stored in the first matrix, the first matrix output The interleaved data obtains the 2i-1th interleaved data after the first matrix interleaving.

Step 104c: When starting to output the 2i-1th set of interleaved data, start storing the second data stored in the 2ith storage subunit in each of the storage subunits corresponding to the N PHY data in the second matrix.

In a specific embodiment of the present invention, the second data stored in the 2ith storage subunit corresponding to each PHY data is started to be stored in the second data while the first matrix starts interleaving the 2i-1th group of interleaved data. In the matrix, the second data stored in the 2ith storage subunit of each of the storage subunits corresponding to all N PHY data can be stored in the second matrix.

Step 104d: After the second matrix stores the second data, output the interleaved 2i-group interleaved data.

In a specific embodiment of the present invention, after the second data stored in the 2ith storage subunit in each of the storage subunits corresponding to all the N PHY data is stored in the second matrix, the second matrix output is interleaved. The data, that is, the 2i-group interleaved data after the second matrix interleaving is obtained.

Step 104e, when starting to output the 2i-group interleave data, start to add i to 1 and continue interleaving the data stored in the next storage sub-unit in each of the storage sub-units corresponding to the N PHY data until i is equal to m/ 2 so far.

In a specific embodiment of the present invention, the second storage subunit in each of the storage subunits corresponding to the N PHY data is started after i is incremented by 1 while the second matrix starts interleaving the 2ith set of interleaved data. The stored data is subjected to the operations of steps 104a to 104d until the data in each of the storage sub-units corresponding to the N PHY data is stored in the first matrix or the second matrix and the interleaved data is obtained.

According to the foregoing analysis, it is possible to store the N PHY data into the first matrix or the second matrix for interleaving according to the preset rules, and obtain the interleaved data by using the foregoing steps 104a to 104e.

As an embodiment, in a specific embodiment of the present invention, the first data stored in the 2i-1th storage subunit in each of the storage subunits corresponding to the N PHY data may be stored in the first method by using multiple methods. In a matrix, the embodiment of the present invention preferably stores the first data stored in the 2i-1th storage subunit in each of the storage subunits corresponding to the N PHY data in the first matrix according to the arrangement order of the N PHY data. . For example, FIG. 6 is a schematic diagram of acquiring interleaved data according to an arrangement order of five PHY data according to an embodiment of the present invention. As shown in FIG. 6, when the effective time slots of five PHY data are respectively n ₁ , n ₂ , and n ₃ , n ₄ , n ₅ , the first data stored in the 2i-1th storage subunit of the first PHY is stored from the 0 address of the first matrix, and the 2i-1th storage subunit of the second PHY is stored. The first data is stored from the n ₁ address of the first matrix, and the first data stored in the 2i-1th storage subunit of the third PHY is stored from the n ₁ +n ₂ address of the first matrix, and so on, The first data stored in the 2i-1th storage subunit of the 5th PHY is stored from the n ₁ + n ₂ + n ₃ + n ₄ address of the first matrix.

As an embodiment, in a specific embodiment of the present invention, the second data stored in the 2ith storage subunit in each of the storage subunits corresponding to the N PHY data may be stored in the second matrix by using multiple methods. The embodiment of the present invention preferably stores the second data stored in the 2ith storage subunit in each of the storage subunits corresponding to the N PHY data in the second matrix according to the arrangement order of the N PHY data. For example, as shown in FIG. 6 above, when the effective time slots of the five PHY data are n ₁ , n ₂ , n ₃ , n ₄ , and n ₅ , respectively, the second i_th storage subunit of the first PHY stores the first The second data is stored from the 0 address of the second matrix, and the second data stored in the 2ith storage subunit of the second PHY is stored from the n ₁ address of the second matrix, and the 2ith storage subunit of the third PHY The stored second data is stored from the n ₁ + n ₂ address of the second matrix, and so on, and the second data stored in the 2ith storage subunit of the 5th PHY is n ₁ + n ₂ + from the second matrix The n ₃ +n ₄ address starts to be stored.

The PHY interleaving method of the embodiment of the present invention caches the kth PHY data of the N PHY data in the kth storage unit including m storage subunits, where m and N are natural numbers greater than 0, and k is greater than 0. And a natural number less than or equal to N; reconstructing a new kth storage unit by deleting a storage portion corresponding to the unavailable time slots of the m storage subunits in the kth storage unit; respectively storing N PHY data in the first according to a preset rule Interleaving is performed in the matrix and the second matrix, and the interleaved m sets of interleaved data are obtained, where i is greater than or equal to 1 and less than or equal to m/2. That is to say, in the technical solution proposed by the present invention, the storage sub-unit can be reconstructed by deleting the unavailable time slot after buffering the data of the PHY, and the data in the storage sub-unit is stored in two matrices in turn to obtain the interleaved The data. Obviously, compared with the prior art, the PHY interleaving method proposed by the embodiment of the present invention can reduce the complexity of bit width splicing in PHY interleaving, and implement the interleaving function in a simple manner, which is fast and easy to implement.

Embodiment 3

FIG. 7 is a schematic diagram of a first component structure of a PHY interleaving apparatus according to an embodiment of the present invention. As shown in FIG. 7, the PHY interleaving apparatus includes: a buffer unit 101, a reconstruction unit 102, and an interleaving unit 103;

The buffer unit 101 is configured to buffer the kth PHY data of the N PHY data in the kth storage unit, where the kth storage unit includes m storage subunits; wherein m and N are natural numbers greater than 0, where k is A natural number greater than 0 and less than or equal to N.

In a specific embodiment of the present invention, for the kth PHY data of the N PHY data, the buffer unit 101 may buffer the kth PHY data in the kth storage unit having m storage subunits. Where m and N are natural numbers greater than 0, and k is a natural number greater than 0 and less than or equal to N.

As an embodiment, in the specific embodiment of the present invention, the number m of the storage subunits in the kth storage unit is a fixed value that has no correlation with k. In this embodiment, the value of m is preferred. m=1024 is selected, that is, the kth PHY data of the N PHY data is buffered in the kth storage unit having 1024 storage subunits.

As an embodiment, in a specific embodiment of the present invention, the storage subunit in the kth storage unit is a storage subunit storing PHY data, and the embodiment preferentially selects a block composed of 20 storage parts of 66 bits in size. For the storage subunit, the buffer unit 101 buffers the kth PHY data of the N PHY data in the kth storage unit having m blocks.

The reconstruction unit 102 is configured to delete the storage portion corresponding to the unavailable time slots of the m storage subunits in the kth storage unit according to the valid time slot n _k occupied by the kth PHY data, and reconstruct a new kth storage unit; , n _k is a natural number greater than 0 and less than or equal to the preset upper limit.

In a specific embodiment of the present invention, since the unavailable time slots existing in the storage subunit increase the complexity of data interleaving, it is necessary to delete the unavailable time slots in the storage subunit. When the effective time slot occupied by the kth PHY data is n _k , the reconstruction unit 102 deletes the storage portion corresponding to the unavailable time slots of the m storage subunits in the kth storage unit according to n _k , so that m valid times The storage sub-unit having a slot of n _k constitutes a new k-th storage unit corresponding to the k-th PHY data.

As an embodiment, in a specific embodiment of the present invention, each of the N PHY data has a valid time slot corresponding to the PHY data, and the effective time slot occupied by the kth PHY data is n. _k is a natural number greater than 0 and less than or equal to the preset upper limit value. Since the storage subunit block has 20 storage portions having a size of 66 bits, the effective time slot n _k occupied by the kth PHY data is preferably A natural number greater than 0 and less than or equal to 20.

As an embodiment, in a specific embodiment of the present invention, the reconstruction unit 102 is further configured to fill the first storage subunit of the new kth storage unit, so that the first storage subunit of the new kth storage unit The effective time slot is n _k . Since the PHY data is not stored in the first storage subunit of the kth storage unit, only one storage portion is occupied, and the time slot is 1, and the first time of the new kth storage unit after the unavailable time slot is deleted. The available time slot of the storage subunit is also 1, so when the reconstruction unit 102 deletes the storage portion corresponding to the unavailable time slot of the m storage subunits in the kth storage unit according to the effective time slot n _k occupied by the kth PHY data Thereafter, the reconstruction unit 102 selects the first storage subunit of the new kth storage unit, and fills the n _k -1 storage portion in the first storage subunit of the new kth storage unit, so that the new kth storage unit The available time slot of the first memory subunit is also n _k . That is, the reconstruction unit 102 fills the first storage sub-unit of the new k-th storage unit, so that the effective time slot of the first storage sub-unit of the new k-th storage unit is n _k .

For example, as shown in FIG. 2 above, when the effective time slot of the kth PHY data is _nk , the storage portion corresponding to the unavailable time slot of the m storage subunits in the kth storage unit is deleted according to _nk , and One storage sub-unit is filled with n _k -1 storage portions to constitute a new _k -th storage unit, wherein the effective time slots of the m storage sub-units in the new k-th storage unit are all n _k .

As an embodiment, in a specific embodiment of the present invention, the buffer unit 101 and the reconstruction unit 102 perform operations of buffering data and reconstructing a storage unit for each of the N PHY data, thereby making all N Each PHY data of the PHY data is buffered in m storage subunits of the corresponding new storage unit. For example, as shown in FIG. 3 above, the effective time slots of the five PHY data are n ₁ , n ₂ , n ₃ , n ₄ , and n ₅ , respectively, and the m memory pairs corresponding to each PHY data according to the effective time slots. The unit performs an operation of deleting the unavailable time slot and filling the storage portion in the first operation sub-unit to form five new storage units, wherein the effective time slots of the m storage sub-units of the five new storage units are respectively n ₁ , n ₂ , n ₃ , n ₄ , n ₅ .

The interleaving unit 103 is configured to store the first data stored in the 2i-1th storage subunit in each of the storage subunits corresponding to the N PHY data in the first matrix according to a preset rule, and store the 2ith The second data stored in the storage subunit is stored in the second matrix for interleaving, and the interleaved 2i-1 group interleaved data or the 2ith group interleaved data is obtained, where i is greater than or equal to 1 and less than or equal to m/2.

In a specific embodiment of the present invention, the interleaving unit 103 stores the first data stored in the 2i-1th storage subunit in each of the storage subunits corresponding to the N PHY data in the first matrix, and the first matrix output Interleaved data to obtain interleaved 2i-1 sets of interleaved data; The interleaving unit 103 stores the second data stored in the 2ith storage subunit of each of the storage subunits corresponding to the N PHY data in the second matrix, and the second matrix outputs the interleaved data, thereby acquiring the interleaved The 2i group interleaves the data. Where i is greater than or equal to 1 and less than or equal to m/2.

It should be noted that the first data stored in the 2i-1th storage subunit in each storage subunit corresponding to the N PHY data is cached in the 2i-1th storage subunit corresponding to one PHY data. The PHY data, in the same way, the second data stored in the 2ith storage subunit in each of the storage subunits corresponding to the N PHY data is the PHY buffered in the 2ith storage subunit corresponding to one PHY data data.

As an embodiment, in a specific embodiment of the present invention, the first matrix and the second matrix may be two sets of shift registers, and when the storage subunit is a block having 20 storage portions of 66 bits, then The size of the above two shift registers should be n*20*66bit, where n is the number of PHY data that needs to be interleaved. For example, when five PHY data are interleaved, the size of the shift register is 5*20*66 bits.

As an embodiment, in a specific embodiment of the present invention, the interleaving unit 103 is further configured to: when each of the N PHY data is buffered in a storage unit having m storage subunits, the interleaving unit 103 After the N PHY data is interleaved, the interleaved total m sets of interleaved data output through the first matrix and the second matrix can be obtained. For example, when each of the N PHY data is buffered in a storage unit having 1024 storage subunits, after the N PHY data are subjected to the interleaving process, the interleaving after the output through the first matrix and the second matrix can be obtained. A total of 1024 sets of interleaved data.

Embodiment 4

Based on the third embodiment, FIG. 8 is a schematic diagram of a second component structure of a PHY interleaving apparatus according to an embodiment of the present invention. As shown in FIG. 8, the interleaving unit 103 includes: a first storage subunit 1031, a first output subunit 1032, and a second. a storage subunit 1033 and a second output subunit 1034; wherein

The first storage subunit 1031 is configured to store each of the N PHY data The first data stored in the 2i-1th storage subunit of the element is stored in the first matrix, and the first output subunit and the second storage subunit are notified.

In a specific embodiment of the present invention, when i is greater than or equal to 1 and less than or equal to m/2, the first storage subunit 1031 stores the first data stored in the 2i-1th storage subunit corresponding to each PHY data in In the first matrix, first data stored in the 2i-1th storage subunit in each of the storage subunits corresponding to all N PHY data may be stored in the first matrix.

The first output subunit 1032 is configured to output the interleaved 2i-1th set of interleaved data after the first matrix stores the first data.

In a specific embodiment of the present invention, after the first data stored in the 2i-1th storage subunit in each of the storage subunits corresponding to all the N PHY data is stored in the first matrix, the first output sub The unit 1032 outputs the first matrix interleaved data, that is, obtains the 2i-1th group of interleaved data after the first matrix interleaving.

The second storage subunit 1033 is configured to start storing the 2ith storage subunit in each of the storage subunits corresponding to the N PHY data when the first output subunit starts to output the 2i-1th group of interleaved data. The two data are stored in the second matrix and notify the second output subunit and the first storage subunit.

In a specific embodiment of the present invention, the second storage subunit 1033 starts storing the 2ith storage subunit corresponding to each PHY data while the first matrix starts interleaving the 2i-1th group of interleaved data. The two data are stored in the second matrix, so that the second data stored in the 2ith storage subunit in each of the storage subunits corresponding to all the N PHY data can be stored in the second matrix.

The second output subunit 1034 is configured to output the interleaved 2ith set of interleaved data after the second matrix stores the second data.

In a specific embodiment of the present invention, when the second data stored in the 2ith storage subunit in each of the storage subunits corresponding to all the N PHY data is stored in the second matrix, the second The output sub-unit 1034 outputs the second matrix-interleaved data, that is, obtains the 2i-group interleaved data after the second matrix interleaving.

The first storage sub-unit 1031 is further configured to, when the second output sub-unit starts to output the 2i-group interleave data, start adding i to 1 and continue to the next storage sub-cell in each of the storage sub-units corresponding to the N PHY data. The data stored by the unit is interleaved until i equals m/2.

In a specific embodiment of the present invention, after the second matrix starts interleaving the 2ith group of interleaved data, the next storage of each of the storage subunits corresponding to the N PHY data is started after i is incremented by 1. The data stored by the unit is interleaved until the data in each of the storage sub-units corresponding to the N PHY data is stored in the first matrix or the second matrix and the interleaved data is obtained.

As an embodiment, in a specific embodiment of the present invention, the first storage subunit 1031 may store the 2i-1th storage subunits in each of the storage subunits corresponding to the N PHY data by using various methods. The first data is stored in the first matrix. The embodiment of the present invention preferably stores the first data stored in the 2i-1th storage subunit of each of the storage subunits corresponding to the N PHY data according to the arrangement order of the N PHY data. Stored in the first matrix. For example, as shown in FIG. 6 above, when the valid time slots of the five PHY data are n ₁ , n ₂ , n ₃ , n ₄ , and n ₅ respectively, the 2i-1th storage subunit of the first PHY is stored. The first data is stored from the 0 address of the first matrix, and the first data stored in the 2i-1th storage subunit of the second PHY is stored from the n ₁ address of the first matrix, and the 2i of the third PHY is stored. - The first data stored in the storage subunit is stored from the n ₁ + n ₂ address of the first matrix, and so on, and the first data stored in the 2i-1th storage subunit of the 5th PHY is from the first The n ₁ +n ₂ +n ₃ +n ₄ addresses of the matrix are stored. That is, the first storage sub-unit 1031 stores the first data stored in the 2i-1th storage sub-unit of each of the storage sub-units corresponding to the N PHY data in the first matrix in the order of the N PHY data.

As an embodiment, in a specific embodiment of the present invention, the second storage subunit 1033 may store the second ii of the storage subunits corresponding to the N PHY data by a plurality of methods. The data is stored in the second matrix. The embodiment of the present invention preferably stores the second data stored in the 2ith storage subunit of each of the storage subunits corresponding to the N PHY data in the second order of the N PHY data. In the matrix. For example, as shown in FIG. 6 above, when the effective time slots of the five PHY data are n ₁ , n ₂ , n ₃ , n ₄ , and n ₅ , respectively, the second i_th storage subunit of the first PHY stores the first The second data is stored from the 0 address of the second matrix, and the second data stored in the 2ith storage subunit of the second PHY is stored from the n ₁ address of the second matrix, and the 2ith storage subunit of the third PHY The stored second data is stored from the n ₁ + n ₂ address of the second matrix, and so on, and the second data stored in the 2ith storage subunit of the 5th PHY is n ₁ + n ₂ + from the second matrix The n ₃ +n ₄ address starts to be stored. That is, the second storage subunit 1033 stores the second data stored in the 2ith storage subunit of each of the storage subunits corresponding to the N PHY data in the second matrix in the order of the N PHY data.

In practical applications, the buffer unit 101, the reconstruction unit 102, and the interleaving unit 103 may each be a central processing unit (CPU), a microprocessor (MPU, a digital processor unit), and a digital signal processor located on the PHY interleaving device. (DSP, Digital Signal Processor), or Field-Programmable Gate Array (FPGA) implementation.

In the PHY interleaving apparatus of the embodiment of the present invention, the buffer unit 101 buffers the kth PHY data of the N PHY data in the kth storage unit including m storage subunits, where m and N are natural numbers greater than 0, k a natural number greater than 0 and less than or equal to N; the reconstruction unit 102 reconstructs a new kth storage unit by deleting a storage portion corresponding to the unavailable time slots of the m storage subunits in the kth storage unit; the interleaving unit 103 according to a preset rule The N PHY data are respectively stored in the first matrix and the second matrix for interleaving, and the interleaved m sets of interleaved data are obtained, where i is greater than or equal to 1 and less than or equal to m/2. That is to say, in the technical solution proposed by the present invention, the storage sub-unit can be reconstructed by deleting the unavailable time slot after buffering the data of the PHY, and the data in the storage sub-unit is stored in two matrices in turn to obtain the interleaved Number according to. Obviously, compared with the prior art, the PHY interleaving apparatus proposed by the embodiment of the present invention can reduce the complexity of bit width splicing in PHY interleaving, and realize the interleaving function by a simple method, which is fast and easy to implement.

The embodiment of the invention further describes a computer storage medium, wherein the computer storage medium stores computer executable instructions, and the computer executable instructions are used to execute the PHY interleaving method described in the foregoing embodiments.

Those skilled in the art will appreciate that embodiments of the present invention can be provided as a method, system, or computer program product. Accordingly, the present invention can take the form of a hardware embodiment, a software embodiment, or a combination of software and hardware. Moreover, the invention can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) including computer usable program code.

The present invention has been described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (system), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or FIG. These computer program instructions can be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing device to produce a machine for the execution of instructions for execution by a processor of a computer or other programmable data processing device. Means for implementing the functions specified in one or more of the flow or in a block or blocks of the flow chart.

The computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device. The apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.

These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on the computer or other programmable device to produce the computer The implemented processing, such as instructions executed on a computer or other programmable device, provides steps for implementing the functions specified in one or more blocks of the flowchart or in a block or blocks of the flowchart.

The above is only the preferred embodiment of the present invention and is not intended to limit the scope of the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and scope of the present invention are included in the scope of the present invention.

Industrial applicability

The technical solution of the embodiment of the present invention can reconstruct the storage sub-unit by deleting the unavailable time slot after buffering the data of the PHY, and store the data in the storage sub-unit in two matrices in turn to obtain the interleaved data, so that the data can be obtained. Reduce the complexity of bit width splicing in PHY interleaving, and realize the interleaving function in a simple way, which is fast and easy to implement.

Claims (13)

1. A PHY interleaving method, the method comprising:

   The kth PHY data of the N PHY data is buffered in a kth storage unit, where the kth storage unit includes m storage subunits; wherein m, N are natural numbers greater than 0, and k is greater than 0 and less than a natural number equal to N;

   Deleting a storage portion corresponding to an unavailable time slot of m storage subunits in the kth storage unit according to the effective time slot n _k occupied by the kth PHY data, and reconstructing a new kth storage unit; wherein, n _k a natural number greater than 0 and less than or equal to the preset upper limit;

   Continue to construct the new k+1th memory cell for the k+1th PHY data until k is equal to N;

   And storing first data stored in the 2i-1th storage subunit of each of the storage subunits corresponding to the N PHY data in the first matrix according to a preset rule, and storing the 2ith storage subunit The second data is stored in the second matrix for interleaving, and the interleaved 2i-1 group interleaved data or the 2ith group interleaved data is obtained, where i is greater than or equal to 1 and less than or equal to m/2.
2. The method according to claim 1, wherein said deleting a storage portion corresponding to an unavailable time slot of m storage subunits in said kth storage unit according to a valid time slot _nk occupied by said kth PHY data , reconstituting the new kth storage unit, also includes:

   Filling the first storage subunit of the new kth memory cell such that the effective time slot of the first storage subunit of the new kth memory cell is _nk .
3. The method according to claim 1, wherein the first data stored in the 2i-1th storage subunit in each of the storage subunits corresponding to the N PHY data is stored in the first according to a preset rule. In a matrix, and storing the second data stored in the 2ith storage subunit in the second matrix for interleaving, and acquiring the interleaved 2i-1 group interleaved data or the 2i group interleaved data, including:

   The 2i-1th storage sub-unit in each of the storage sub-units corresponding to the N PHY data The first data stored by the unit is stored in the first matrix;

   After the first matrix stores the first data, output the interleaved 2i-1 group of interleaved data;

   When starting to output the 2i-1th set of interleaved data, start storing the second data stored in the 2ith storage subunit in each of the storage subunits corresponding to the N PHY data in the second In the matrix;

   After the second matrix stores the second data, outputting the second set of interleaved data after the interleaving;

   When starting to output the 2ith group of interleaved data, start to add i to 1 and continue interleaving the data stored in the next storage subunit in each of the storage subunits corresponding to the N PHY data until i equals m /2 so far.
4. The method according to claim 3, wherein said storing said first data stored in said 2i-1th storage subunit in each of said storage subunits corresponding to said N PHY data is said The first matrix includes:

   Storing the first data stored in the 2i-1th storage subunit in each of the storage subunits corresponding to the N PHY data in the first matrix according to an arrangement order of the N PHY data in.
5. The method of claim 3, wherein the second data stored by the 2ith storage subunit in each of the storage subunits corresponding to the N PHY data is stored in the second matrix, include:

   And storing the second data stored in the 2ith storage subunit in each of the storage subunits corresponding to the N PHY data in the second matrix according to an arrangement order of the N PHY data.
6. The method according to any one of claims 3 to 5, wherein the start of adding i to 1 continues with the next storage subunit in each of the storage subunits corresponding to the N PHY data The stored data is interleaved until i equals m/2, and includes:

   Obtaining m sets of interleaved data output by the first matrix and the second matrix.
7. A PHY interleaving device, the device comprising:

   a buffer unit configured to buffer a kth PHY data of the N PHY data in a kth storage unit, where the kth storage unit includes m storage subunits; wherein m and N are natural numbers greater than 0, k a natural number greater than 0 and less than or equal to N;

   a reconstruction unit configured to delete a storage portion corresponding to an unavailable time slot of the m storage subunits in the kth storage unit according to the effective time slot n _k occupied by the kth PHY data, and reconstruct a new kth storage a unit; wherein n _k is a natural number greater than 0 and less than or equal to a preset upper limit; and continuing to construct a new k+1th storage unit for the k+1th PHY data until k is equal to N;

   The interleaving unit is configured to store the first data stored in the 2i-1th storage subunit of each of the storage subunits corresponding to the N PHY data in the first matrix according to a preset rule, and store the 2i The second data stored in the storage subunits is stored in the second matrix for interleaving, and the interleaved 2i-1 group interleaved data or the 2ith group interleaved data is obtained, where i is greater than or equal to 1 and less than or equal to m/2.
8. The apparatus according to claim 7, wherein

   The reconstruction unit is further configured to fill a first storage subunit of the new kth storage unit, such that an effective time slot of the first storage subunit of the new kth storage unit is _nk .
9. The apparatus according to claim 7, wherein the interleaving unit comprises:

   a first storage subunit, configured to store, in the first matrix, first data stored in the 2i-1th storage subunit in each storage subunit corresponding to the N PHY data, and notify a first output subunit and a second storage subunit;

   The first output subunit is configured to output, after the first matrix stores the first data, the interleaved second i-1 group interleaved data;

   The second storage subunit is configured to start, when the first output subunit starts outputting the 2i-1th group of interleaved data, start the foregoing in each storage subunit corresponding to the N PHY data The second data stored by the 2ith storage subunit is stored in the second matrix, and notifies the second output subunit and the first storage subunit;

   The second output subunit is configured to output, after the second matrix stores the second data, the interleaved 2i group of interleaved data;

   The first storage subunit is further configured to, when the second output subunit starts outputting the 2ith group of interleaved data, start adding i to 1 and continue each storage subunit corresponding to the N PHY data The data stored in the next storage subunit in the cell is interleaved until i equals m/2.
10. The apparatus according to claim 9, wherein

    The first storage subunit is configured to store the second i-1 storage subunits in each of the storage subunits corresponding to the N PHY data according to an arrangement order of the N PHY data The first data is stored in the first matrix.
11. The apparatus according to claim 9, wherein

    The second storage subunit is specifically configured to store the second storage subunit in each of the storage subunits corresponding to the N PHY data according to an arrangement order of the N PHY data The two data are stored in the second matrix.
12. The apparatus according to any one of claims 9 to 11, wherein

    The interleaving unit is further configured to obtain m sets of interleaved data output by the first matrix and the second matrix.
13. A computer storage medium having stored therein computer executable instructions for performing the PHY interleaving method of any one of claims 1 to 6.

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