WO2018069319A1 - Method for producing a multi-layered printed circuit - Google Patents
Method for producing a multi-layered printed circuit Download PDFInfo
- Publication number
- WO2018069319A1 WO2018069319A1 PCT/EP2017/075812 EP2017075812W WO2018069319A1 WO 2018069319 A1 WO2018069319 A1 WO 2018069319A1 EP 2017075812 W EP2017075812 W EP 2017075812W WO 2018069319 A1 WO2018069319 A1 WO 2018069319A1
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- WIPO (PCT)
- Prior art keywords
- printed circuit
- layer
- circuit board
- contact points
- contact
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4046—Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
- H05K3/462—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar double-sided circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09481—Via in pad; Pad over filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/063—Lamination of preperforated insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
Definitions
- Printed circuit boards are carriers for electronic components. They serve the mechanical attachment and connection of the electronic components.
- a circuit board is made of electrically insulating material with conductive connections adhering thereto, the tracks. Fiber-reinforced plastic is common as insulating material.
- the tracks are usually etched from a thin layer of copper.
- the components are soldered to solder pads, the so-called contact pads, or in pads.
- PCB types There are a variety of different PCB types. For example, one-sided and two-sided printed circuit boards are known in which electrically conductive connections are applied either only on one surface or on the two opposite surfaces of the printed circuit boards.
- multilayer printed circuit boards or multi-layer printed circuit boards are arranged in multiple layers both on and inside the circuit board. To produce several thin circuit boards are glued to each other with so-called prepregs. These multilayer printed circuit boards can have up to 48 layers. In the field of automotive applications 4 to 8 layers are common. Connections of the connecting layers between the individual layers are by means of so-called
- the copper layers can be galvanically reinforced after etching in order to achieve the desired layer thickness.
- metallic protective and contact layers made of tin, nickel or gold can be applied galvanically on partial surfaces or the entire copper surface. Then a solder mask is applied, which covers the tracks and leaves only the solder joints.
- multilayer printed circuit boards is also associated with a variety of wet chemical processes. For example, after the pressing of a multilayer layer structure into the outer material layer (s) introduced holes are filled by wet-chemical processes, so as to establish a contact individual conductor or connecting layers. As part of a wet chemical process usually copper is deposited in a galvanic. In addition to high demands on process safety, a wet-chemical process is also associated with many ecological aspects. In these acids, alkalis, toxic chemicals are used. Partly the disposal of hazardous waste is required.
- DE 694 31 740 T2 discloses the production of a multilayer wiring board in which, according to FIGS. 7 and 8, a plurality of printed circuit board layers are pressed together, wherein contact points of the printed circuit board layers are connected to plated-through holes.
- the pads are provided with connection pads or bumps, both of which are multilayer coated using electrolytic nickel plating and electrolytic gold plating. Layering and in the case of the connection bumps with additional electrolytic tin plating and electrolytic gold plating are produced in sequence. These are very complicated wet chemical processes.
- the object is achieved by a method for producing a multilayer printed circuit board in which the individual printed circuit ⁇ tenlagen are provided with metallic conductor structures having contact points, which have a uniform thickness of at least 5ym over the PCB surface, and at least a first printed circuit board layer holes metallized with Has walls which are in electrical contact with the contact points of the metallic conductor structure or form such a contact point, in which
- a structured pre-preg position is applied to the first printed circuit board layer, leaving the contact points of the metallic conductor structures free,
- the metal of the contact points is remelted at a temperature above its melting temperature.
- the connections between the printed circuit board layers and possibly their bores for the production of plated-through holes in the printed circuit board are produced by the direct contact of the contact points of the printed circuit board layers.
- the metal of the contact points is remelted by pressure and heat during pressing, so that the contact points of different circuit board layers connect by forming intermetallic boundary layers, without further material would be necessary.
- step e) the stack is heated up to a temperature above the
- step g) Melting temperature of the metal of the contact points heated and this remelted, wherein the step g) is omitted.
- the holes are filled with a material from the group of materials solder, adhesive, polymer or sintered material after step e) in a step e x ) and this then remelted or cured.
- the holes can be completely filled.
- FIGS. 1 to 8 show the individual steps of a first variant of the method according to the invention
- FIGS. 9 to 11 show a first alternative to the steps of FIG
- FIGS. 12 and 13 show a second alternative to the steps of FIGS.
- FIGS. 14 and 15 show a third alternative to the steps of FIGS.
- a first variant of the method according to the invention for producing a multilayer printed circuit board with plated-through holes is shown in a schematic manner.
- the dimensions of the individual components are not measured ⁇ scale, but should only illustrate the procedure.
- the first printed circuit board layer 3 which is cleaned, etched and dried before laying, has in a conventional manner conductor track structures and contact surfaces and holes 5 with metallized walls.
- the edges of the bore wall metallization lying on the printed circuit board outer side and further regions to be connected to other printed circuit board layers are formed as contact points 4 with a minimum thickness of 5ym, so that the two contact points 4 of two adjacent circuit board layers 3, 7 to be joined together have a total thickness of have at least 10ym.
- the contact points are released 4 on the first printed circuit board layer 3, the prepreg 1 is applied to the first patterned conductor ⁇ board layer 3 of FIG. 3, so that in particular through the holes 2.
- a second structured printed circuit board layer 7 is positioned on the prepreg layer 1. This stack construction is processed in a subsequent pressing step according to FIGS. 5 and 6 (with vacuum assistance).
- a solder stop layer 8 is applied to the surfaces of the stack and optionally structured. Subsequently, as shown in FIG. 8, a remelting of the metal of the contact points 4. If, as shown in FIG. 8 worked with remelting, the
- FIGS. 9 to 11 the process is shown when, prior to the application of the solder stop layer 8 and the remelting of the metal of the contact points 4, a filling material 9 is introduced into the bores 5.
- the filler 9 may be a solder, an adhesive, a polymer or a sintered material, which is remelted or cured after introduction.
- a Lotstopptik 8 is applied to the outer surfaces of the resulting circuit board, which can also be done in a known manner by lamination, spin or curtain coating as in the other variants.
- FIGS. 14 and 15 show a third variant of the method according to the invention, which is a combination of the first and the second variant, in which the remelting of the Metal of the contact points 4 takes place during the pressing and then before applying a Lotstopp Mrs Rock ⁇ material 9 is introduced into the holes 5.
- the invention takes advantage provided with bores, ready struc tured ⁇ as mechanically and electrically connecting printed circuit board layers (inner and outer layers) to form throughput contacts in multilayer printed circuit boards.
- an electrical connection is created during the pressing of the aforementioned circuit board layers or in a downstream temperature process (soldering or curing) in addition to the mechanical one. It completely eliminates any form of galvanic generation of the electrical feedthroughs.
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention relates to a method for producing a multilayered printed circuit, the individual printed circuit layers (3, 7) being provided with metallic conductor structures having contact points (4) that have a uniform thickness of at least 5 µm across the printed circuit surface and at least the first printed circuit layer (3, 7) having bores (5) with metalized walls that are in electrical contact with the contact points (4) of the metallic conductor structure or form such a contact point (4). The method comprises the following steps: a) a structured prepreg layer (1) is applied to a first printed circuit layer (3), said structured prepreg layer exposing the contact points (4) of the metallic conductor structures, b) applying a second printed circuit layer (7) to the prepreg layer (1), c) if necessary, applying additional prepreg and printed circuit layers to the stack formed, d) laminating the at least two printed circuit layers (3, 7) and the at least one prepreg layer (1) such that contact points (4) of the first printed circuit layer (3) and of the printed circuit layer (7) to be connected come into contact, e) heating, during lamination, the stack to a temperature below the melting temperature of the metal of the contact points (4), f) applying a solder resist layer (8) to each outer layer of the stack, and g) subsequently remelting the metal of the contact points (4) at a temperature above the melting temperature thereof.
Description
Beschreibung description
Verfahren zur Herstellung einer mehrlagigen Leiterplatte Leiterplatten sind Träger für elektronische Bauelemente. Sie dienen der mechanischen Befestigung und Verbindung der elektronischen Bauelemente. Eine Leiterplatte besteht aus elektrisch isolierendem Material mit daran haftenden, leitenden Verbindungen, den Leiterbahnen. Als isolierendes Material ist fa- serverstärkter Kunststoff üblich. Die Leiterbahnen werden zumeist aus einer dünnen Schicht Kupfer geätzt. Die Bauelemente werden auf Lötflächen, den sogenannten Kontaktpads, oder in Lötaugen gelötet. Es gibt eine Vielzahl an unterschiedlichen Leiterplattenarten. Beispielsweise sind einseitige und zweiseitige Leiterplatten bekannt, bei denen elektrisch leitende Verbindungen entweder nur auf einer Oberfläche oder auf den beiden gegenüberliegenden Oberflächen der Leiterplatten aufgebracht sind. Bei sogenannten Multilayer-Leiterplatten oder mehrlagigen Leiterplatten sind Leiterzugstrukturen in mehreren Lagen sowohl auf als auch im Inneren der Leiterplatte angeordnet. Zur Herstellung werden mehrere dünne Leiterplatten mit sogenannten Prepregs aufeinander geklebt. Diese mehrlagigen Leiterplatten können bis zu 48 Schichten aufweisen. Im Umfeld von Automobilen Anwendungen sind 4 bis 8 Lagen verbreitet. Verbindungen der Verbindungsschichten zwischen den einzelnen Lagen werden mittels sogenannter Method for producing a multilayer printed circuit board Printed circuit boards are carriers for electronic components. They serve the mechanical attachment and connection of the electronic components. A circuit board is made of electrically insulating material with conductive connections adhering thereto, the tracks. Fiber-reinforced plastic is common as insulating material. The tracks are usually etched from a thin layer of copper. The components are soldered to solder pads, the so-called contact pads, or in pads. There are a variety of different PCB types. For example, one-sided and two-sided printed circuit boards are known in which electrically conductive connections are applied either only on one surface or on the two opposite surfaces of the printed circuit boards. In so-called multilayer printed circuit boards or multi-layer printed circuit boards Leiterzugstrukturen are arranged in multiple layers both on and inside the circuit board. To produce several thin circuit boards are glued to each other with so-called prepregs. These multilayer printed circuit boards can have up to 48 layers. In the field of automotive applications 4 to 8 layers are common. Connections of the connecting layers between the individual layers are by means of so-called
Durchkontaktierungen realisiert. Die Herstellung von einseitigen oder doppelseitigen, optional durchkontaktierten, Leiterplatten erfolgt üblicherweise photochemisch. Die Herstellung der Leiterbahnen erfolgt in der Regel photolithographisch, indem eine dünne Schicht lichtempfind¬ lichen Photolacks auf die Oberfläche der zunächst vollständig metallisierten Leiterplatte aufgebracht wird. Nach der Be¬ lichtung des Photolacks durch eine Maske mit dem gewünschten Layout der Leiterzugstruktur sind je nach verwendetem Photolack entweder die belichteten oder die unbelichteten Anteile des Lacks
löslich in einer passenden Entwickler- Lösung und werden entfernt. Wird die so behandelte Leiterplatte in eine geeignete Ätzlösung eingebracht, so wird nur der freigelegte Teil der metallisierten Oberfläche angegriffen. Die vom Photolack be- deckten Anteile bleiben erhalten, weil der Lack beständig gegen die Ätzlösung ist. Anschließend können die Kupferschichten nach dem Ätzen galvanisch verstärkt werden, um die gewünschte Schichtstärke zu erzielen. Zusätzlich können galvanisch auf Teilflächen oder der gesamten Kupferfläche metallische Schutz- und Kontaktschichten aus Zinn, Nickel oder Gold aufgebracht werden. Danach wird ein Lötstopplack aufgebracht, der die Leiterbahnen abdeckt und nur die Lötstellen freilässt. Realized through contacts. The production of single-sided or double-sided, optionally plated-through, printed circuit boards is usually photochemical. The manufacture of the conductor tracks is performed by photolithography, as a rule, by a thin layer lichtempfind ¬ union photoresist is applied to the surface of the first fully metallized circuit board. After loading ¬ clearing of the photoresist through a mask with the desired layout of the trace pattern are depending on the photoresist, either the exposed or the unexposed portions of the lacquer soluble in a suitable developer solution and are removed. If the circuit board thus treated is introduced into a suitable etching solution, only the exposed part of the metallized surface is attacked. The parts covered by the photoresist are retained because the resist is resistant to the etching solution. Subsequently, the copper layers can be galvanically reinforced after etching in order to achieve the desired layer thickness. In addition, metallic protective and contact layers made of tin, nickel or gold can be applied galvanically on partial surfaces or the entire copper surface. Then a solder mask is applied, which covers the tracks and leaves only the solder joints.
Die Herstellung mehrlagiger Leiterplatten ist darüber hinaus mit einer Vielzahl von nasschemischen Prozessen verbunden. Beispielsweise werden nach dem Verpressen eines aus mehreren Lagen bestehenden Schichtaufbaus in die äußeren Materialschicht (en) eingebrachte Bohrungen mittels nasschemischer Prozesse gefüllt, um so eine Kontaktierung einzelner Leiter- oder Verbindungslagen herzustellen. Im Rahmen eines nasschemischen Prozesses wird in einer Galvanik üblicherweise Kupfer abgeschieden. Neben hohen Anforderungen an die Prozesssicherheit ist ein nasschemischer Prozess auch mit vielen ökologischen Aspekten verbunden. Bei diesen werden Säuren, Laugen, toxische Chemikalien eingesetzt. Teilweise ist die Entsorgung von Sondermüll erforderlich. The production of multilayer printed circuit boards is also associated with a variety of wet chemical processes. For example, after the pressing of a multilayer layer structure into the outer material layer (s) introduced holes are filled by wet-chemical processes, so as to establish a contact individual conductor or connecting layers. As part of a wet chemical process usually copper is deposited in a galvanic. In addition to high demands on process safety, a wet-chemical process is also associated with many ecological aspects. In these acids, alkalis, toxic chemicals are used. Partly the disposal of hazardous waste is required.
Es wäre daher wünschenswert, wenn die Herstellung einer mehrlagigen Leiterplatte mit einer möglichst geringen Anzahl an nasschemischen Prozessen erfolgen könnte. It would therefore be desirable if the production of a multilayer printed circuit board with the least possible number of wet-chemical processes could take place.
Die DE 694 31 740 T2 offenbart die Herstellung einer mehrlagigen Verdrahtungsplatine, bei der gemäß der dortigen Figuren 7 und 8 mehrere Leiterplattenlagen miteinander verpresst werden, wobei Kontaktstellen der Leiterplattenlagen mit Durchkontaktierungen verbunden sind. Die Kontaktstellen werden mit Verbindungskontaktstellen oder Verbindungskontakthöckern versehen, die beide durch Mehrlagenbeschichten unter Anwendung von elektrolytischer Nickelbeschichtung und elektrolytischer Goldbe-
Schichtung und im Falle der Verbindungskontakthöcker mit zusätzlicher elektrolytischer Zinnbeschichtung und elektrolytischer Goldbeschichtung der Reihe nach erzeugt werden. Dies sind sehr aufwändige nasschemische Verfahren. DE 694 31 740 T2 discloses the production of a multilayer wiring board in which, according to FIGS. 7 and 8, a plurality of printed circuit board layers are pressed together, wherein contact points of the printed circuit board layers are connected to plated-through holes. The pads are provided with connection pads or bumps, both of which are multilayer coated using electrolytic nickel plating and electrolytic gold plating. Layering and in the case of the connection bumps with additional electrolytic tin plating and electrolytic gold plating are produced in sequence. These are very complicated wet chemical processes.
Es ist die Aufgabe der Erfindung, diesen Nachteil zu vermeiden. It is the object of the invention to avoid this disadvantage.
Die Aufgabe wird gelöst durch ein Verfahren zum Herstellen einer mehrlagigen Leiterplatte, bei der die einzelnen Leiterplat¬ tenlagen mit metallischen Leiterstrukturen versehen sind, die Kontaktstellen aufweisen, die über die Leiterplattenoberfläche eine gleichmäßige Dicke von mindestens 5ym haben, und zumindest eine erste Leiterplattenlage Bohrungen mit metallisierten Wänden aufweist, die mit den Kontaktstellen der metallischen Leiterstruktur in elektrischem Kontakt sind oder eine solche Kontaktstelle bilden, bei dem The object is achieved by a method for producing a multilayer printed circuit board in which the individual printed circuit ¬ tenlagen are provided with metallic conductor structures having contact points, which have a uniform thickness of at least 5ym over the PCB surface, and at least a first printed circuit board layer holes metallized with Has walls which are in electrical contact with the contact points of the metallic conductor structure or form such a contact point, in which
a) auf die erste Leiterplattenlage eine strukturierte Pre- preglage aufgebracht wird, die Kontaktstellen der metallischen Leiterstrukturen freilässt, a) a structured pre-preg position is applied to the first printed circuit board layer, leaving the contact points of the metallic conductor structures free,
b) auf die Prepreglage eine zweite Leiterplattenlage auf¬ gebracht wird, b) is placed on the prepreg layer, a second printed circuit board layer on ¬,
c) auf diesen Stapel gegebenenfalls weitere Prepreg- und Leiterplattenlagen aufgebracht werden, c) if appropriate, additional prepreg and printed circuit board layers are applied to this stack,
d) die zumindest zwei Leiterplattenlagen und die zumindest eine Prepreglage verpresst werden, so dass zu verbindende Kontaktstellen der ersten Leiterplattenlage und der zweiten Leiterplattenlage in Kontakt kommen, d) the at least two printed circuit board layers and the at least one prepreg layer are pressed so that contact points to be connected of the first printed circuit board layer and the second printed circuit board layer come into contact,
e) während des Verpressens der Stapel bis zu einer Temperatur unterhalb der Schmelztemperatur des Metalls der Kontaktstellen aufgeheizt wird, e) is heated during the compression of the stack up to a temperature below the melting point of the metal of the contact points,
f) auf die Außenlagen des Stapels jeweils eine Lotstoppschicht aufgebracht wird, f) a solder stop layer is applied to the outer layers of the stack,
g) und anschließend das Metall der Kontaktstellen bei einer Temperatur oberhalb dessen Schmelztemperatur umgeschmolzen wird .
Es werden also die Verbindungen zwischen den Leiterplattenlagen und ggf. deren Bohrungen zur Herstellung von Durchkontaktie- rungen in der Leiterplatte durch den direkten Kontakt der Kontaktstellen der Leiterplattenlagen hergestellt. Es wird das Metall der Kontaktstellen durch Druck und Wärmeeinwirkung beim Verpressen umgeschmolzen, so dass sich die Kontaktstellen verschiedener Leiterplattenlagen durch Bildung intermetallischer Grenzschichten verbinden, ohne dass weiteres Material nötig wäre. g) and then the metal of the contact points is remelted at a temperature above its melting temperature. Thus, the connections between the printed circuit board layers and possibly their bores for the production of plated-through holes in the printed circuit board are produced by the direct contact of the contact points of the printed circuit board layers. The metal of the contact points is remelted by pressure and heat during pressing, so that the contact points of different circuit board layers connect by forming intermetallic boundary layers, without further material would be necessary.
Auf diese Weise lassen sich sehr einfach Durchkontaktierungen durch die gesamte Leiterplatte oder auch nur bis zu Lei¬ terstrukturen auf einer Innenlage realisieren, indem lediglich das Metall der durch den Rand der Bohrungswandmetallisierung erzeugten Kontaktstellen durch Druck und Wärme zu einer intermetallischen Grenzschicht verpresst werden. In this way it is very easy vias through the entire board, or even up to Lei ¬ terstrukturen realized on an inner layer by only the metal of the contact points generated by the edge of Bohrungswandmetallisierung are pressed by pressure and heat to an intermetallic barrier layer.
In einer Variante des erfindungsgemäßen Verfahrens wird im Schritt e) der Stapel bis zu einer Temperatur über der In a variant of the method according to the invention, in step e) the stack is heated up to a temperature above the
Schmelztemperatur des Metalls der Kontaktstellen aufgeheizt und dieses dabei umgeschmolzen, wobei der Schritt g) entfällt. Melting temperature of the metal of the contact points heated and this remelted, wherein the step g) is omitted.
Das Verpressen und Umschmelzen erfolgt also in einem Arbeitsgang . In einer Weiterbildung der Erfindung werden nach dem Schritt e) bei einem Schritt ex) die Bohrungen mit einem Material aus der Gruppe der Materialien Lot, Klebstoff, Polymer oder Sinterwerkstoff aufgefüllt und dieses anschließend umgeschmolzen bzw. ausgehärtet . The pressing and remelting takes place in one operation. In a development of the invention, the holes are filled with a material from the group of materials solder, adhesive, polymer or sintered material after step e) in a step e x ) and this then remelted or cured.
Damit können die Bohrungen ggf. komplett gefüllt werden. If necessary, the holes can be completely filled.
Die Erfindung soll nachfolgend anhand von Ausführungsbeispielen mit Hilfe von Figuren näher beschrieben werden. Dabei zeigen The invention will be described below with reference to exemplary embodiments with the aid of figures. Show
Figuren 1 bis 8 die einzelnen Schritte einer ersten Variante des erfindungsgemäßen Verfahrens,
Figuren 9 bis 11 eine erste Alternative zu den Schritten der FIGS. 1 to 8 show the individual steps of a first variant of the method according to the invention, FIGS. 9 to 11 show a first alternative to the steps of FIG
Figuren 7 bis 8, FIGS. 7 to 8,
Figuren 12 und 13 eine zweite Alternative zu den Schritten der FIGS. 12 and 13 show a second alternative to the steps of FIGS
Figuren 7 bis 8, FIGS. 7 to 8,
Figuren 14 und 15 eine dritte Alternative zu den Schritten der FIGS. 14 and 15 show a third alternative to the steps of FIGS
Figuren 7 bis 8. In den Fig. 1 bis 8 ist eine erste Variante des erfindungsgemäßen Verfahrens zur Herstellung einer mehrlagigen Leiterplatte mit Durchkontaktierungen in schematischer Weise dargestellt. Die Abmessungen der einzelnen Bestandteile sind dabei nicht ma߬ stäblich, sondern sollen lediglich die Vorgehensweise ver- deutlichen. FIGS. 7 to 8. In FIGS. 1 to 8, a first variant of the method according to the invention for producing a multilayer printed circuit board with plated-through holes is shown in a schematic manner. The dimensions of the individual components are not measured ¬ scale, but should only illustrate the procedure.
Fig. 1 zeigt eine Prepreglage 1, die gemäß Fig. 2 strukturiert wird, indem in die Prepreglage 1 durch Bohren, Stanzen, Schneiden etc. Öffnungen 2 eingebracht werden, die die für die zu er- zeugenden Durchkontaktierungen benötigten Anschlussflächen auf einer ersten strukturierten Leiterplattenlage 3 gemäß Fig. 3 freigeben sollen. Die erste Leiterplattenlage 3, die vor dem Verlegen gereinigt, angeätzt und getrocknet wird, weist dabei in herkömmlicher Weise Leiterbahnstrukturen und Kontaktflächen sowie Bohrungen 5 mit metallisierten Wänden auf. 1 shows a prepreg layer 1, which is patterned according to FIG. 2, in that openings 2 are introduced into the prepreg layer 1 by drilling, punching, cutting, etc., which provide the connection surfaces required for the vias to be produced on a first structured circuit board layer 3 to share according to FIG. 3. The first printed circuit board layer 3, which is cleaned, etched and dried before laying, has in a conventional manner conductor track structures and contact surfaces and holes 5 with metallized walls.
In erfindungsgemäßer Weise sind die an der Leiterplattenla- geaußenseite liegenden Ränder der Bohrungswandmetallisierung und weitere mit anderen Leiterplattenlagen zu verbindende Bereiche als Kontaktstellen 4 mit einer Mindestdicke von 5ym gebildet, so dass die zwei miteinander zu verbindenden Kontaktstellen 4 zweier benachbarter Leiterplattenlagen 3, 7 eine Gesamtdicke von mindestens 10ym haben. Die Prepreglage 1 wird auf die erste strukturierte Leiter¬ plattenlage 3 der Fig. 3 aufgebracht, so dass insbesondere durch die Öffnungen 2 die Kontaktstellen 4 auf der ersten Leiterplattenlage 3 freigelassen werden.
Gemäß Fig. 4 wird eine zweite strukturierte Leiterplattenlage 7 auf der Prepreglage 1 positioniert. Dieser Stapelaufbau wird in einem anschließenden Verpressschritt gemäß Fig. 5 und 6 (mit Vakuumunterstützung) verarbeitet . In accordance with the invention, the edges of the bore wall metallization lying on the printed circuit board outer side and further regions to be connected to other printed circuit board layers are formed as contact points 4 with a minimum thickness of 5ym, so that the two contact points 4 of two adjacent circuit board layers 3, 7 to be joined together have a total thickness of have at least 10ym. The contact points are released 4 on the first printed circuit board layer 3, the prepreg 1 is applied to the first patterned conductor ¬ board layer 3 of FIG. 3, so that in particular through the holes 2. According to FIG. 4, a second structured printed circuit board layer 7 is positioned on the prepreg layer 1. This stack construction is processed in a subsequent pressing step according to FIGS. 5 and 6 (with vacuum assistance).
Gemäß Fig. 7 wird eine Lotstoppschicht 8 auf die Oberflächen des Stapels aufgebracht und ggf. strukturiert. Anschließend erfolgt gemäß Fig. 8 ein Umschmelzen des Metalls der Kontaktstellen 4. Wird gemäß Fig. 8 mit Umschmelzphase gearbeitet, wird dieAccording to FIG. 7, a solder stop layer 8 is applied to the surfaces of the stack and optionally structured. Subsequently, as shown in FIG. 8, a remelting of the metal of the contact points 4. If, as shown in FIG. 8 worked with remelting, the
Temperatur des Pressguts am Ende des Pressprofils, nach dem Aushärten der Prepreglage 1 und vor dem Abkühlen kurzzeitig auf oberhalb der Schmelztemperatur des Metalls der Kontaktstellen 4 gebracht . Temperature of the pressed material at the end of the pressing profile, after curing of the prepreg layer 1 and before cooling briefly brought above above the melting temperature of the metal of the contact points 4.
In den Figuren 9 bis 11 ist der Vorgang gezeigt, wenn vor dem Aufbringen der Lotstoppschicht 8 und dem Umschmelzen des Metalls der Kontaktstellen 4 ein Füllmaterial 9 in die Bohrungen 5 eingebracht wird. Das Füllmaterial 9 kann dabei ein Lot, ein Klebstoff, ein Polymer oder ein Sinterwerkstoff sein, der nach dem Einbringen umgeschmolzen bzw. ausgehärtet wird. In FIGS. 9 to 11, the process is shown when, prior to the application of the solder stop layer 8 and the remelting of the metal of the contact points 4, a filling material 9 is introduced into the bores 5. The filler 9 may be a solder, an adhesive, a polymer or a sintered material, which is remelted or cured after introduction.
Daran anschließend wird wiederum eine Lotstoppschicht 8 auf die Außenflächen der entstandenen Leiterplatte aufgebracht, was in bekannter Weise durch Laminieren, Schleudern oder Vorhanggießen wie in den anderen Varianten auch erfolgen kann. Subsequently, in turn, a Lotstoppschicht 8 is applied to the outer surfaces of the resulting circuit board, which can also be done in a known manner by lamination, spin or curtain coating as in the other variants.
In den Figuren 12 und 13 ist eine weitere Variante des er¬ findungsgemäßen Verfahrens dargestellt, bei dem das Umschmelzen des Metalls der Kontaktstellen 4 vor dem Aufbringen der Lotstoppschicht 8 erfolgt . Hier wird bereits während des Verpressens die Temperatur über die Schmelzphase des Materials der Kon¬ taktstellen 4 erhöht, so dass die intermetallischen Grenzschichten entstehen können In the figures 12 and 13 a further variant of he ¬ inventive method is shown in which takes place the remelting of the metal of the contact pads 4 before application of the solder resist layer. 8 Here, the temperature is already increased during the pressing over the melting phase of the material of the con ¬ tact stations 4, so that the intermetallic boundary layers can arise
In den Figuren 14 und 15 ist schließlich eine dritte Variante des erfindungsgemäßen Verfahrens gezeigt, die eine Kombination der ersten und der zweiten Variante ist, bei der das Umschmelzen des
Metalls der Kontaktstellen 4 während des Verpressens erfolgt und anschließend vor dem Aufbringen einer Lotstoppschicht Füll¬ material 9 in die Bohrungen 5 eingebracht wird. Die Erfindung nutzt mit Bohrungen versehene, fertig struktu¬ rierte als mechanisch und elektrisch zu verbindende Leiterplattenlagen (Innen- und Außenlagen) zur Bildung von Durch- kontaktierungen in mehrlagigen Leiterplatten. Durch den Einsatz von strukturierten Prepreglagen und ausreichend dicken Kon- taktstellen wird während des Verpressens der zuvor genannten Leiterplattenlagen bzw. in einem nachgelagerten Temperatur- prozess (Löten oder Aushärten) neben der mechanischen eine elektrische Verbindung erzeugt. Es entfällt gänzlich jede Form der galvanischen Erzeugung der elektrischen Durchkontaktie- rungen.
Finally, FIGS. 14 and 15 show a third variant of the method according to the invention, which is a combination of the first and the second variant, in which the remelting of the Metal of the contact points 4 takes place during the pressing and then before applying a Lotstoppschicht Füll ¬ material 9 is introduced into the holes 5. The invention takes advantage provided with bores, ready struc tured ¬ as mechanically and electrically connecting printed circuit board layers (inner and outer layers) to form throughput contacts in multilayer printed circuit boards. Through the use of structured prepreg layers and sufficiently thick contact points, an electrical connection is created during the pressing of the aforementioned circuit board layers or in a downstream temperature process (soldering or curing) in addition to the mechanical one. It completely eliminates any form of galvanic generation of the electrical feedthroughs.
Claims
1. Verfahren zum Herstellen einer mehrlagigen Leiterplatte, bei der die einzelnen Leiterplattenlagen (3, 7) mit metallischen Leiterstrukturen versehen sind, die Kontaktstellen (4) aufweisen, die über die Leiterplattenoberfläche eine gleichmäßige Dicke von mindestens 5ym haben, und zumindest eine erste Leiterplattenlage (3, 7) Bohrungen (5) mit metallisierten Wänden aufweist, die mit den Kontaktstellen (4) der metallischen Leiterstruktur in elektrischem Kontakt sind oder eine solche Kontaktstelle (4) bilden, bei dem A method of producing a multilayer printed circuit board in which the individual circuit board layers (3, 7) are provided with metallic conductor structures having contact points (4) which have a uniform thickness of at least 5 μm over the circuit board surface, and at least a first circuit board layer (3). 3, 7) has bores (5) with metallized walls, which are in electrical contact with the contact points (4) of the metallic conductor structure or form such a contact point (4), in which
a) auf die erste Leiterplattenlage (3) eine strukturierte Prepreglage (1) aufgebracht wird, die Kontaktstellen (4) der metallischen Leiterstrukturen freilässt, a) on the first printed circuit board layer (3) a structured prepreg layer (1) is applied, the contact points (4) of the metallic conductor structures leaves free,
b) auf die Prepreglage (1) eine zweite Leiterplattenlage (7) aufgebracht wird, b) a second printed circuit board layer (7) is applied to the prepreg layer (1),
c) auf diesen Stapel gegebenenfalls weitere Prepreg- und Leiterplattenlagen aufgebracht werden, c) if appropriate, additional prepreg and printed circuit board layers are applied to this stack,
d) die zumindest zwei Leiterplattenlagen (3, 7) und die zumindest eine Prepreglage (1) verpresst werden, so dass zu verbindende Kontaktstellen (4) der ersten Leiterplattenlage (3) und der zweiten Leiterplattenlage (7) in Kontakt kommen, e) während des Verpressens der Stapel bis zu einer Temperatur unterhalb der Schmelztemperatur des Metalls der Kontaktstellen (4) aufgeheizt wird, d) the at least two printed circuit board layers (3, 7) and the at least one prepreg layer (1) are pressed so that contact points (4) to be connected come into contact with the first printed circuit board layer (3) and the second printed circuit board layer (7), e) during the compression of the stack is heated up to a temperature below the melting temperature of the metal of the contact points (4),
f) auf die Außenlagen des Stapels jeweils eine Lotstoppschicht (8) aufgebracht wird, f) a solder stop layer (8) is applied to the outer layers of the stack,
g) und anschließend das Metall der Kontaktstellen (4) bei einer Temperatur oberhalb dessen Schmelztemperatur umgeschmolzen wird. g) and then the metal of the contact points (4) is remelted at a temperature above its melting temperature.
2. Verfahren nach Anspruch 1, bei dem im Schritt e) der Stapel bis zu einer Temperatur über der Schmelztemperatur des Metalls der Kontaktstellen (4) aufgeheizt wird und dieses dabei um- geschmolzen wird und der Schritt g) entfällt. 2. The method of claim 1, wherein in step e) the stack is heated up to a temperature above the melting temperature of the metal of the contact points (4) and this is remelted and the step g) is omitted.
3. Verfahren nach Anspruch 1 oder 2, bei dem nach dem Schritt e) bei einem Schritt ex) die Bohrungen (5) mit einem Material (9)
aus der Gruppe der Materialien Lot, Klebstoff, Polymer oder Sinterwerkstoff aufgefüllt und dieses anschließend umge¬ schmolzen bzw. ausgehärtet wird.
3. The method of claim 1 or 2, wherein after step e) at a step e x ) the bores (5) with a material (9) filled from the group of materials solder, adhesive, polymer or sintered material and this subsequently umge ¬ molten or cured.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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DE102016219733.9 | 2016-10-11 | ||
DE102016219733.9A DE102016219733A1 (en) | 2016-10-11 | 2016-10-11 | Method for producing a multilayer printed circuit board |
Publications (1)
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WO2018069319A1 true WO2018069319A1 (en) | 2018-04-19 |
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PCT/EP2017/075812 WO2018069319A1 (en) | 2016-10-11 | 2017-10-10 | Method for producing a multi-layered printed circuit |
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WO (1) | WO2018069319A1 (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03289195A (en) * | 1990-04-06 | 1991-12-19 | Casio Comput Co Ltd | Manufacture of multilayer circuit board |
DE19842590A1 (en) * | 1998-09-17 | 2000-04-13 | Daimler Chrysler Ag | Process for the production of circuit arrangements |
DE69431740T2 (en) | 1993-04-21 | 2003-04-24 | Nec Corp., Tokio/Tokyo | Multi-layer wiring board and its manufacture |
US20080110016A1 (en) * | 2006-11-14 | 2008-05-15 | Endicott Interconnect Technologies, Inc. | Method of making circuitized substrate with solder paste connections |
-
2016
- 2016-10-11 DE DE102016219733.9A patent/DE102016219733A1/en not_active Ceased
-
2017
- 2017-10-10 WO PCT/EP2017/075812 patent/WO2018069319A1/en active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03289195A (en) * | 1990-04-06 | 1991-12-19 | Casio Comput Co Ltd | Manufacture of multilayer circuit board |
DE69431740T2 (en) | 1993-04-21 | 2003-04-24 | Nec Corp., Tokio/Tokyo | Multi-layer wiring board and its manufacture |
DE19842590A1 (en) * | 1998-09-17 | 2000-04-13 | Daimler Chrysler Ag | Process for the production of circuit arrangements |
US20080110016A1 (en) * | 2006-11-14 | 2008-05-15 | Endicott Interconnect Technologies, Inc. | Method of making circuitized substrate with solder paste connections |
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