WO2018040164A1 - 显示电路及具有该显示电路的液晶显示屏 - Google Patents

显示电路及具有该显示电路的液晶显示屏 Download PDF

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Publication number
WO2018040164A1
WO2018040164A1 PCT/CN2016/100325 CN2016100325W WO2018040164A1 WO 2018040164 A1 WO2018040164 A1 WO 2018040164A1 CN 2016100325 W CN2016100325 W CN 2016100325W WO 2018040164 A1 WO2018040164 A1 WO 2018040164A1
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Prior art keywords
field effect
effect transistor
circuit
drain
gate
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PCT/CN2016/100325
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English (en)
French (fr)
Inventor
郭平昇
王添鸿
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US15/308,349 priority Critical patent/US10276115B2/en
Publication of WO2018040164A1 publication Critical patent/WO2018040164A1/zh
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3692—Details of drivers for data electrodes suitable for passive matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0272—Details of drivers for data electrodes, the drivers communicating data to the pixels by means of a current
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0289—Details of voltage level shifters arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery

Definitions

  • the present invention relates to the field of liquid crystal displays, and more particularly to a display circuit and a liquid crystal display having the same.
  • the liquid crystal display is very popular because of its small size, light weight and superior display quality.
  • the existing liquid crystal display comprises a scanning circuit, the scanning circuit comprises a plurality of voltage stabilizing circuits, each voltage stabilizing circuit comprises a field effect transistor, a voltage difference Vgs between the gate and the source of the field effect transistor and a drain of the FET
  • the source current Ids constitutes a curve which appears to the right when the FET is used for a long time, which may cause the picture displayed on the liquid crystal display to be abnormal.
  • the present invention provides a display circuit and a liquid crystal display panel for improving the stability of a voltage stabilizing circuit.
  • the present invention provides a display circuit, a display circuit, the display circuit includes a plurality of scan circuits, a display unit, a level shifter and a counter control register, each scan circuit including a first voltage regulator circuit,
  • the first voltage stabilizing circuit includes a first field effect transistor and a second field effect transistor, the sources of the two field effect transistors are connected to the level shifter, and the plurality of scan circuits are used in the first time period And sequentially transmitting a first group of scan signals to the display unit, and sequentially transmitting a second group of scan signals to the display unit in a second time period, wherein the counter control register is configured to be in the first time period and the first Sending a control signal to the level shifter in a time difference between the two time periods, the level shifter is configured to convert the control signal into a high level signal to the sources of the two FETs The two FETs are reverse biased to increase the stability of the voltage stabilizing circuit.
  • a drain of the first FET is connected to the display unit, and a gate of the first FET and a gate of the second FET are connected to a first pull-up circuit.
  • each scan circuit further includes a third FET, the gate of the first FET and the gate of the second FET are connected to the drain of the third FET,
  • the third field effect transistor The source is connected to the level shifter, and the drain of the second field effect transistor and the gate of the third field effect transistor are connected to a precharge circuit.
  • each scanning circuit further includes a second voltage stabilizing circuit and a fourth field effect transistor
  • the second voltage stabilizing circuit includes a fifth field effect transistor, and a sixth field effect transistor
  • the fourth field effect transistor a gate is connected to the gate of the third field effect transistor
  • a source of the fourth field effect transistor is connected to the level shifter
  • a drain of the fourth field effect transistor is connected to a second pull up a circuit
  • a source of the fifth field effect transistor and a source of the sixth field effect transistor are connected to the level shifter
  • a gate of the fifth field effect transistor and the sixth field effect transistor a gate is connected to the drain of the fourth field effect transistor
  • a drain of the fifth field effect transistor is connected to a drain of the first field effect transistor
  • a drain of the sixth field effect transistor is connected Pre-charge circuit.
  • each scan circuit further includes a seventh FET, a gate of the seventh FET is connected to the precharge circuit, and a drain of the seventh FET is used to connect a clock signal circuit.
  • a source of the seventh field effect transistor is connected to a drain of the first field effect transistor.
  • the second pull-up circuit is a Darlington circuit.
  • the first pull-up circuit is a Darlington circuit.
  • the present invention also provides a liquid crystal display comprising the display circuit described above.
  • the counter control register of the present invention transmits a control signal to the level shifter in a time difference between the first time period and the second time period, the level shifter to the control signal Turning a high level signal and transmitting the source of the two FETs to the scan circuit reverse biases the two FETs, thereby improving the stability of the voltage stabilizing circuit and the display of the display unit Stability.
  • FIG. 1 is a circuit connection diagram of a preferred embodiment of a liquid crystal display of the present invention.
  • FIG. 2 is a circuit connection diagram of a scanning circuit of a preferred embodiment of a display circuit of a liquid crystal display of the present invention.
  • FIG. 3 is a signal timing diagram of a preferred embodiment of a display circuit of a liquid crystal display according to the present invention.
  • FIG. 4 is a graph showing Vgs-Ids of a field effect transistor of a preferred embodiment of a display circuit of a liquid crystal display of the present invention.
  • a preferred embodiment of the display circuit of the liquid crystal display panel of the present invention includes a plurality of scanning circuits 10, a level shifter 20, a counter control register (TCON) 30, and a display unit 50. .
  • Each scanning circuit 10 includes seven FETs M11, M12, M13, M14, M15, M16, M17, and the sources of the FETs M11, M12, M13, M14, M15, M16 are connected to each other and connected to each other.
  • the level shifter 20 is described.
  • the sources of the field effect transistors M11, M12, M13, M14, M15, M16 are also connected to the display unit 50 through a pull-down circuit 40.
  • a gate of the FET M11 and a gate of the FET M12 are connected to a drain of the FET M13, and a drain of the FET M11 is connected to the display unit 50, the field The drain of the effect transistor M13 is connected to the pull-up circuit.
  • the drain of the field effect transistor M12 is connected to the precharge circuit 15.
  • the gate of the field effect transistor M13 is connected to the precharge circuit 15.
  • the gate of the FET M14 is connected to the gate of the FET M13, and the drain of the FET M14 is connected to the pull-up circuit.
  • the pull-up circuit is a Darlington circuit. 13.
  • the gate of the FET M15 is connected to the drain of the FET M14, the drain of the FET M15 is connected to the drain of the FET M11, and the gate of the FET M16 is connected.
  • the source of the effect transistor M17 is connected to the drain of the field effect transistor M11, and the drain of the field effect transistor M17 is used to connect the clock signal circuit 19 to receive a clock signal.
  • the field effect transistors M11 and M12 constitute a first voltage stabilizing circuit, and the field effect transistors M15 and M16 constitute a second voltage stabilizing circuit.
  • the plurality of scanning circuits 10 sequentially send a set of high-level scan signals G1, G2, ..., Gn to the display unit, each Two adjacent scan signals are separated by a fixed period of time, and in the next period T1, the plurality of scan circuits 10 sequentially send scan signals G1, G2, ..., Gn to the display unit, the two
  • the counter control register 30 sends a control signal to the level shifter 20 in the time difference T2, and the level shifter 20 converts the control signal into one
  • the high-level signal Vss is sent to the scanning circuit 10 to reverse-bias the FETs M11, M12, M15, M16, and the gates and sources of the FETs M11, M12, M15, M16 the voltage difference V GS between the electrode becomes small, so that the current I ds is the voltage difference between V GS of the FET M11, M12, M15,
  • the Darlington circuit 13 In the time difference T2, the Darlington circuit 13 outputs a control signal to turn off the FETs M11, M12, M15, M16 to ensure the stability of the scanning signals G1, G2, ..., Gn.
  • the pull-down circuit 40 is configured to pull down the scan signal to become a low level after the high level of the scan signal sent by the scan circuit 10 continues for a period of time.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Liquid Crystal (AREA)

Abstract

一种显示电路及具有该显示电路的液晶显示屏，显示电路包括多个扫描电路（10）、一显示单元（50）、一电平位移器（20）及一计数器控制寄存器（30），每一扫描电路（10）包括第一稳压电路，第一稳压电路包括第一场效应管及第二场效应管，两个场效应管的源极连接电平位移器（20），多个扫描电路（10）用于在第一时间段依次发送第一组扫描信号给显示单元（50），并在第二时间段依次发送第二组扫描信号给显示单元（50），计数器控制寄存器（30）用于在第一时间段与第二时间段之间的时间差中发送一控制信号给电平位移器（20），电平位移器（20）用于将控制信号转成一高电平信号给两个场效应管的源极使两个场效应管反向偏置而提升所述稳压电路的稳定性。

Description

显示电路及具有该显示电路的液晶显示屏 技术领域
本发明涉及液晶显示屏领域，尤其涉及一种显示电路及具有该显示电路的液晶显示屏。
背景技术
液晶显示屏因其体积小，重量轻，显示质量优越而深受人们的喜爱。现有液晶显示屏包括扫描电路，所述扫描电路包括多个稳压电路，每一稳压电路包括场效应管，场效应管的栅极和源极的电压差Vgs与场效应管漏极与源极的电流Ids构成曲线，该曲线在场效应管过长时间使用中出现向右移动，从而会使液晶显示屏显示的画面异常。
发明内容
为克服现有技术的不足，本发明提供一种提高稳压电路稳定性的显示电路及液晶显示屏。
本发明提供一种显示电路，一种显示电路，所述显示电路包括多个扫描电路、一显示单元、一电平位移器及一计数器控制寄存器，每一扫描电路包括第一稳压电路，所述第一稳压电路包括第一场效应管及第二场效应管，所述两个场效应管的源极连接所述电平位移器，所述多个扫描电路用于在第一时间段依次发送第一组扫描信号给所述显示单元，并在第二时间段依次发送第二组扫描信号给所述显示单元，所述计数器控制寄存器用于在所述第一时间段与所述第二时间段之间的时间差中发送一控制信号给所述电平位移器，所述电平位移器用于将所述控制信号转成一高电平信号给所述两个场效应管的源极使所述两个场效应管反向偏置而提升所述稳压电路的稳定性。
进一步地，所述第一场效应管的漏极连接所述显示单元，所述第一场效应管的栅极及所述第二场效应管的栅极均连接一第一上拉电路。
进一步地，每一扫描电路还包括一第三场效应管，所述第一场效应管的栅极及所述第二场效应管的栅极均连接所述第三场效应管的漏极，所述第三场效应管 的源极连接所述电平位移器，所述第二场效应管的漏极及所述第三场效应管的栅极均连接预充电电路。
进一步地，每一扫描电路还包括第二稳压电路及第四场效应管，所述第二稳压电路包括第五场效应管、及第六场效应管，所述第四场效应管的栅极连接所述第三场效应管的栅极，所述第四场效应管的源极连接所述所述电平位移器，所述第四场效应管的漏极连接一第二上拉电路，所述第五场效应管的源极及所述第六场效应管的源极均连接所述电平位移器，所述第五场效应管的栅极及所述第六场效应管的栅极均连接所述第四场效应管的漏极，所述第五场效应管的漏极连接所述第一场效应管的漏极，所述第六场效应管的漏极连接所述预充电电路。
进一步地，每一扫描电路还包括第七场效应管，所述第七场效应管的栅极连接所述预充电电路，所述第七场效应管的漏极用于连接一时钟信号电路而接收一时钟信号，所述第七场效应管的源极连接所述第一场效应管的漏极。
进一步地，所述第二上拉电路为达灵顿电路。
进一步地，所述第一上拉电路为达灵顿电路。
本发明还提供一液晶显示屏，所述液晶显示屏包括上述的显示电路。
本发明的有益效果：本发明的计数器控制寄存器在第一时间段与第二时间段之间的时间差中发送一控制信号给所述电平位移器，所述电平位移器将所述控制信号转成一高电平信号并发送给扫描电路的两个场效应管的源极使所述两个场效应管反向偏置，从而提升所述稳压电路的稳定性以及显示单元显示的画面的稳定性。
附图说明
图1为本发明液晶显示屏较佳实施方式的电路连接图。
图2为本发明液晶显示屏的显示电路较佳实施方式的扫描电路的电路连接图。
图3为本发明液晶显示屏的显示电路较佳实施方式的信号时序图。
图4为本发明液晶显示屏的显示电路较佳实施方式的场效应管的Vgs-Ids的曲线图。
具体实施方式
下面，将结合附图对本发明各实施例作详细介绍。
请参阅图1及图2，本发明液晶显示屏的显示电路较佳实施方式包括多个扫描电路10、一电平位移器(Level shifter)20、一计数器控制寄存器(TCON)30及显示单元50。
每一扫描电路10包括七个场效应管M11、M12、M13、M14、M15、M16、M17，所述场效应管M11、M12、M13、M14、M15、M16的源极相互连接，并连接所述电平位移器20。所述场效应管M11、M12、M13、M14、M15、M16的源极还通过一下拉电路40连接所述显示单元50。所述场效应管M11的栅极与所述场效应管M12的栅极均连接所述场效应管M13的漏极，所述场效应管M11的漏极连接所述显示单元50，所述场效应管M13的漏极连接上拉电路。所述场效应管M12的漏极连接预充电电路15。所述场效应管M13的栅极连接所述预充电电路15。
所述场效应管M14的栅极连接所述场效应管M13的栅极，所述场效应管M14的漏极连接上拉电路，在本实施例中，所述上拉电路为达灵顿电路13。
所述场效应管M15的栅极连接所述场效应管M14的漏极，所述场效应管M15的漏极连接所述场效应管M11的漏极，所述场效应管M16的栅极连接所述场效应管M14的漏极，所述场效应管M16的漏极连接所述场效应管M12的漏极，所述场效应管M17的栅极连接所述场效应管M12，所述场效应管M17的源极连接所述场效应管M11的漏极，所述场效应管M17的漏极用于连接时钟信号电路19而接收时钟信号。
所述场效应管M11、M12构成第一稳压电路，所述场效应管M15、M16构成第二稳压电路。
请参阅图3及图4，在使用过程中，在一时间段T0中，所述多个扫描电路 10依次给所述显示单元发送一组高电平的扫描信号G1、G2、…Gn，每两个相邻的扫描信号之间间隔一固定时间段，并在下一时间段T1中，所述多个扫描电路10再次依次给所述显示单元发送扫描信号G1、G2、…Gn，所述两个时间段之间有个时间差T0，所述计数器控制寄存器30在所述时间差T2中发送一控制信号给所述电平位移器20，所述电平位移器20将所述控制信号转成一高点平信号Vss而发送给所述扫描电路10，从而使所述场效应管M11、M12、M15、M16反向偏置，所述场效应管M11、M12、M15、M16的栅极与源极之间的电压差VGS变小，从而电压差VGS与所述场效应管M11、M12、M15、M16的漏极与源极之间的电流Ids形成的关系曲线会向左平移(A0到A1)，这样增强所述第一稳压电路、第二稳压电路的稳定，从而改善所述扫描电路10输出给所述显示单元50的扫描信号，提高所述显示单元50显示画面的稳定性。在时间差T2中，所述达灵顿电路13输出控制信号使所述场效应管M11、M12、M15、M16均截止，以确保扫描信号G1、G2、…Gn的稳定性。所述下拉电路40用于在所述扫描电路10发送的扫描信号的高电平持续一段时间后拉低所述扫描信号而变成低电平。
虽然已经参照特定实施例示出并描述了本发明，但是本领域的技术人员将理解：在不脱离由权利要求及其等同物限定的本发明的精神和范围的情况下，可在此进行形式和细节上的各种变化。

Claims (14)

  1. 一种显示电路，其中，所述显示电路包括多个扫描电路、一显示单元、一电平位移器及一计数器控制寄存器，每一扫描电路包括第一稳压电路，所述第一稳压电路包括第一场效应管及第二场效应管，所述两个场效应管的源极连接所述电平位移器，所述多个扫描电路用于在第一时间段依次发送第一组扫描信号给所述显示单元，并在第二时间段依次发送第二组扫描信号给所述显示单元，所述计数器控制寄存器用于在所述第一时间段与所述第二时间段之间的时间差中发送一控制信号给所述电平位移器，所述电平位移器用于将所述控制信号转成一高电平信号给所述两个场效应管的源极使所述两个场效应管反向偏置而提升所述稳压电路的稳定性。
  2. 根据权利要求1所述的显示电路，其中，所述第一场效应管的漏极连接所述显示单元，所述第一场效应管的栅极及所述第二场效应管的栅极均连接一第一上拉电路。
  3. 根据权利要求2所述的显示电路，其中，每一扫描电路还包括一第三场效应管，所述第一场效应管的栅极及所述第二场效应管的栅极均连接所述第三场效应管的漏极，所述第三场效应管的源极连接所述电平位移器，所述第二场效应管的漏极及所述第三场效应管的栅极均连接预充电电路。
  4. 根据权利要求3所述的显示电路，其中，每一扫描电路还包括第二稳压电路及第四场效应管，所述第二稳压电路包括第五场效应管、及第六场效应管，所述第四场效应管的栅极连接所述第三场效应管的栅极，所述第四场效应管的源极连接所述电平位移器，所述第四场效应管的漏极连接一第二上拉电路，所述第五场效应管的源极及所述第六场效应管的源极均连接所述电平位移器，所述第五场效应管的栅极及所述第六场效应管的栅极均连接所述第四场效应管的漏极，所述第五场效应管的漏极连接所述第一场效应管的漏极，所述第六场效应管的漏极连接所述预充电电路。
  5. 根据权利要求4所述的显示电路，其中，每一扫描电路还包括第七场效应管，所述第七场效应管的栅极连接所述预充电电路，所述第七场效应管的漏极用于连接一时钟信号电路而接收一时钟信号，所述第七场效应管的源极连接所述第一场效应管的漏极。
  6. 根据权利要求4所述的显示电路，其中，所述第二上拉电路为达灵顿电路。
  7. 根据权利要求2所述的显示电路，其中，所述第一上拉电路为达灵顿电路。
  8. 一种液晶显示屏，其中，所述液晶显示屏包括一种显示电路，所述显示电路包括多个扫描电路、一显示单元、一电平位移器及一计数器控制寄存器，每一扫描电路包括第一稳压电路，所述第一稳压电路包括第一场效应管及第二场效应管，所述两个场效应管的源极连接所述电平位移器，所述多个扫描电路用于在第一时间段依次发送第一组扫描信号给所述显示单元，并在第二时间段依次发送第二组扫描信号给所述显示单元，所述计数器控制寄存器用于在所述第一时间段与所述第二时间段之间的时间差中发送一控制信号给所述电平位移器，所述电平位移器用于将所述控制信号转成一高电平信号给所述两个场效应管的源极使所述两个场效应管反向偏置而提升所述稳压电路的稳定性。
  9. 根据权利要求8所述的液晶显示屏，其中，所述第一场效应管的漏极连接所述显示单元，所述第一场效应管的栅极及所述第二场效应管的栅极均连接一第一上拉电路。
  10. 根据权利要求9所述的液晶显示屏，其中，每一扫描电路还包括一第三场效应管，所述第一场效应管的栅极及所述第二场效应管的栅极均连接所述第三场效应管的漏极，所述第三场效应管的源极连接所述电平位移器，所述第二场效应管的漏极及所述第三场效应管的栅极均连接预充电电路。
  11. 根据权利要求10所述的液晶显示屏，其中，每一扫描电路还包括第二稳压电路及第四场效应管，所述第二稳压电路包括第五场效应管、及第六场效应管，所述第四场效应管的栅极连接所述第三场效应管的栅极，所述第四场效应管的源极连接所述电平位移器，所述第四场效应管的漏极连接一第二上拉电路，所述第五场效应管的源极及所述第六场效应管的源极均连接所述电平位移器，所述第五场效应管的栅极及所述第六场效应管的栅极均连接所述第四场效应管的漏极，所述第五场效应管的漏极连接所述第一场效应管的漏极，所述第六场效应管的漏极连接所述预充电电路。
  12. 根据权利要求11所述的液晶显示屏，其中，每一扫描电路还包括第七场效应管，所述第七场效应管的栅极连接所述预充电电路，所述第七场效应管的漏极用于连接一时钟信号电路而接收一时钟信号，所述第七场效应管的源极连接所述第一场效应管的漏极。
  13. 根据权利要求11所述的液晶显示屏，其中，所述第二上拉电路为达灵顿电路。
  14. 根据权利要求9所述的液晶显示屏，其中，所述第一上拉电路为达灵顿电路。
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