WO2018036627A1 - Amplificateur intégré - Google Patents

Amplificateur intégré Download PDF

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Publication number
WO2018036627A1
WO2018036627A1 PCT/EP2016/070034 EP2016070034W WO2018036627A1 WO 2018036627 A1 WO2018036627 A1 WO 2018036627A1 EP 2016070034 W EP2016070034 W EP 2016070034W WO 2018036627 A1 WO2018036627 A1 WO 2018036627A1
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WO
WIPO (PCT)
Prior art keywords
cancellation
signal
integrated amplifier
input
output
Prior art date
Application number
PCT/EP2016/070034
Other languages
English (en)
Inventor
Anders Emericks
Original Assignee
Huawei Technologies Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co., Ltd. filed Critical Huawei Technologies Co., Ltd.
Priority to PCT/EP2016/070034 priority Critical patent/WO2018036627A1/fr
Priority to CN201680088735.1A priority patent/CN109643973B/zh
Publication of WO2018036627A1 publication Critical patent/WO2018036627A1/fr

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3223—Modifications of amplifiers to reduce non-linear distortion using feed-forward
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/195—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2201/00—Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32—Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3218—Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion the main amplifier or error amplifier being a feedforward amplifier

Definitions

  • the present invention relates to an integrated amplifier comprising an amplifying circuit.
  • High linearity radiofrequency (RF) amplifiers are an important part in telecommunication systems.
  • RF radiofrequency
  • Several different high linearity RF amplifiers are available on the market.
  • high linearity amplifiers on the market that comprise a single transistor, manufactured on a gallium arsenide (GaAs) substrate.
  • Transistors on a GaAs substrate have very good performance; one of these being that they have a high linearity.
  • processes for manufacturing of RF amplifiers using GaAs are expensive and are not suitable for system integration.
  • Transistors on silicon germanium (SiGe) substrates usually have lower linearity.
  • SiGe silicon germanium
  • different techniques are used. Some of the techniques make use of a differential pair in the amplifier to cross feed signals to achieve cancellation of intermodulation tones.
  • Another technique is to use a biasing circuit to either feedback or feed forward signals with the purpose to linearize the amplifier.
  • An objective of embodiments of the present invention is to provide an integrated amplifier which diminishes the problems with conventional solutions.
  • Another objective of the present invention is to provide an integrated amplifier which provides amplification of an input signal comprising fundamental tones, wherein the amplitude of the intermodulation tones is considerably lower than what is the case using integrated amplifiers according to conventional solutions.
  • Intermodulation is the amplitude modulation of signals containing two or more different frequencies, caused by nonlinearities in the integrated amplifier.
  • an integrated amplifier comprising an input configured to receive an input signal, an output configured to output an output signal, an amplifying circuit, and a cancellation circuit, wherein the amplifying circuit is configured to provide an amplified input signal based on the input signal, wherein the amplified input signal comprises fundamental tones and intermodulation tones, wherein the cancellation circuit is configured to provide a cancellation signal based on the input signal, wherein the cancellation signal comprises fundamental tones and intermodulation tones, and wherein the integrated amplifier is configured to provide the output signal based on a sum of the amplified input signal and the cancellation signal, so that the intermodulation tones of the amplified input signal are attenuated by the intermodulation tones of the cancellation signal.
  • the amplifying circuit as well as the cancellation circuit is connected between the input and the output.
  • the intermodulation tones caused by an input signal having fundamental tones and non-linarites in the amplifying circuit are attenuated.
  • the degree of attenuation of the intermodulation tones of the amplified input signal is dependent on the amplitude of the intermodulation tones of the cancellation signal.
  • the phase of the cancellation signal is opposite to the phase of the amplified input signal. In this way the attenuation of the intermodulation tones of the amplified input signal is optimized.
  • a first ratio is the amplitude of the fundamental tones of the cancellation signal divided by the amplitude of the intermodulation tones of the cancellation signal
  • a second ratio is the amplitude of the fundamental tones of the amplified input signal divided by the amplitude of the intermodulation tones of the amplified input signal, wherein the second ratio is larger than the first ratio.
  • the amplitude of the intermodulation tones of the cancellation signal and the amplitude of the intermodulation tones of the amplified input signal are of the same magnitude.
  • the amplitude of the intermodulation tones of the cancellation signal is equal to the amplitude of the intermodulation tones of the amplified input signal so that the intermodulation tones of the amplified input signal are cancelled completely.
  • the cancellation circuit comprises a cancellation transistor and a cancellation output, wherein the cancellation circuit is configured to output the cancellation signal on the cancellation output.
  • a transistor is a preferable device for creation of the cancellation signal as the cancellation circuit then may be arranged to have a nonlinear behavior similar to the nonlinear behavior of the amplifying circuit.
  • the cancellation circuit comprises a cancellation input, a cancellation impedance and a current source, wherein the cancellation transistor comprises an input terminal and an output terminal, wherein the output terminal is connected to the cancellation output, wherein the input terminal is connected to the current source, and wherein the input terminal is connected, via the cancellation impedance, to the cancellation input.
  • the cancellation signal will be provided as a current. It is then preferable that the amplified input signal is also provided as a current as this will enable simple adding of the cancellation signal and the amplified input signal. It is of course possible also to convert the cancellation signal and the amplified input signal to voltages before adding the amplified input signal and the cancellation signal.
  • the cancellation circuit receives the input signal on the cancellation input.
  • the current through the current source is essentially constant.
  • the current through the current source is the sum of the current through the cancellation transistor and the current through the cancellation impedance. When the input signal increases the current through the cancellation impedance also increases. When the current through the cancellation impedance increases the current through the cancellation transistor, and thus also to the cancellation output, decreases.
  • the phase of the current to the cancellation output will thus be opposite to the phase of the input signal.
  • the amplified input signal increases, i.e., the current to the amplifying output.
  • the current in the form of the cancellation signal will be added to the current in the form of the amplified input signal to create the output signal.
  • the phase of the amplified input signal will thus be essentially in phase with the input signal but opposite in phase to the cancellation signal. Due to the nonlinear behavior of the cancellation transistor the cancellation signal will have intermodulation tones similar to the amplified input signal.
  • the cancellation signal will have large intermodulation tones and small fundamental tones. This is opposite to the design of the amplifying circuit which is configured to have as small intermodulation tones as possible. With the described dimensioning of the cancellation circuit the cancellation signal will primarily attenuate the intermodulation tones.
  • the current source is programmable. By having the current source programmable it is possible to tune the integrated amplifier to maximize the attenuation of the intermodulation tones.
  • a seventh possible implementation form of the integrated amplifier according to the fifth or the sixth possible implementation forms comprises an impedance buffer (e.g. a buffer amplifier) connected between the input and the cancellation input.
  • the impedance buffer minimizes the effect of the cancellation circuit on the input signal.
  • the current source comprises a cancellation supply and a supply resistor, and the supply resistor is connected between the cancellation supply and the cancellation input terminal.
  • the cancellation impedance comprises a resistor connected in series with a capacitor. The capacitor will pass alternating current (AC) signals between different direct current (DC) levels.
  • At least one of the resistor and the capacitor are programmable. By having one or both of the resistor and the capacitor programmable it is possible to tune the integrated amplifier to optimize the attenuation of the intermodulation tones.
  • the amplifying circuit comprises an amplifying transistor, wherein the cancellation transistor is of the same type as the amplifying transistor.
  • the cancellation transistor is of the same type as the amplifying transistor.
  • the cancellation transistor is matched to the amplifying transistor with regard to at least one of: a temperature during operation, a current density during operation, and a manufacturing process, i.e. that the manufacturing process of the cancellation transistor is matched to the manufacturing process of the amplifying transistor.
  • a temperature during operation a current density during operation
  • a manufacturing process i.e. that the manufacturing process of the cancellation transistor is matched to the manufacturing process of the amplifying transistor.
  • a thirteenth possible implementation form of the integrated amplifier according to anyone of the fifth to the twelfth possible implementation forms comprises an input impedance and a first supply, wherein the amplifying circuit comprises an amplifying input, and wherein the input impedance is connected between the amplifying input and the first supply.
  • the input impedance determines the behavior of the amplifying circuit.
  • the supply may be a voltage supply.
  • the input impedance is matched to the cancellation impedance. The matching of the input impedance to the cancellation impedance is done to assure that the phase difference between the amplified input signal and the cancellation signal is as close to 180 degrees as possible.
  • a fifteenth possible implementation form of the integrated amplifier according to any one of the fifth to the fourteenth possible implementation forms comprises a bias, wherein the cancellation transistor comprises a cancellation control terminal connected to the bias. This is a supply for the base/gate of the transistor.
  • the cancellation circuit is controlled using the collector and emitter, the cancellation control terminal is provided with a predetermined bias signal.
  • a sixteenth possible implementation form of the integrated amplifier according to any one of the first to the fifteenth possible implementation forms or to the first aspect as such, comprises a second supply and a load connected between the second supply and the output.
  • the load ensures a possible voltage swing on the output.
  • a communication device for a wireless communication system comprising an integrated amplifier according to anyone of the first to sixteenth possible implementation forms or to the first aspect as such.
  • Figure 1 shows an integrated amplifier according to an embodiment of the invention.
  • Figure 2 shows an integrated amplifier according to an embodiment of the invention providing a possible implementation of the integrated amplifier shown schematically in Fig.1 .
  • Figure 3a shows in more detail a possible implementation of the cancellation circuit in the integrated amplifier shown in Figure 2.
  • Figure 3b shows in more detail a possible implementation of the cancellation circuit in the integrated amplifier shown in Figure 2.
  • Figure 4 shows a simplified picture of the cancellation of the intermodulation tones in the amplified input signal Samp.
  • Fig. 5 shows schematically a communication device in a wireless communication system.
  • FIG. 1 shows an integrated amplifier 100 according to an embodiment of the invention.
  • the integrated amplifier 100 comprises an input 102 configured to receive an input signal Sin, an output 104 configured to output an output signal Sout, an amplifying circuit 106 with an amplifying output 1 12 and an amplifying control input 168, and a cancellation circuit 1 14 with a cancellation output 124 and a cancellation input 1 16.
  • the signals at the amplifying output 1 12, and the cancellation output 124 are added to generate the signal Sout on output 104.
  • the amplifying control input 168 and the cancellation input 1 16 are both connected to the input 102.
  • the amplifying circuit 106 is configured to provide on the amplifying output 1 12 an amplified input signal Samp based on the input signal Sin.
  • the amplified input signal Samp comprises fundamental tones and intermodulation tones.
  • the cancellation circuit 1 14 is configured to provide a cancellation signal Sc based on the input signal Sin, wherein the cancellation signal Sc comprises fundamental tones and intermodulation tones.
  • the integrated amplifier 100 is configured to provide the output signal Sout as the sum of the amplified input signal Samp and the cancellation signal Sc.
  • the intermodulation tones of the amplified input signal Samp are attenuated by the intermodulation tones of the cancellation signal Sc.
  • FIG. 2 shows an integrated amplifier 100 according to an embodiment of the invention.
  • the integrated amplifier 100 shown in Fig. 2 provides a possible implementation of the integrated amplifier 100 shown in Fig. 1 .
  • the integrated amplifier 100 comprises an input 102 configured to receive an input signal Sin, an output 104 configured to output an output signal current Sout, an amplifying circuit 106 with an amplifying output 1 12 and an amplifying input 1 10, and a cancellation circuit 1 14 with a cancellation output 124 and a cancellation input 1 16.
  • the amplifying output 1 12, and the cancellation output 124 are both connected to the output 104.
  • the amplifying control input 168 and the cancellation input 1 16 are both connected to the input 102.
  • the amplifying circuit 106 is configured to provide on the amplifying output 1 12 an amplified input signal current Samp based on the input signal Sin.
  • the current in the form of the amplified input signal Samp comprises fundamental tones and intermodulation tones.
  • the amplifying circuit 106 comprises a single amplifying transistor 128 as shown in Figure 2.
  • the amplifying transistor 128 (which is in the example implemented is as a field effect npn-transistor 128) comprises an amplifying input terminal 120 (the emitter) connected to the amplifying input 1 10 and an amplifying output terminal 122 (the collector) connected to the amplifying output 1 12 (basis).
  • the amplifying transistor also comprises an amplifying control terminal 108 which is connected to the input 102, via the amplifying control terminal 168.
  • Figure 2 is simplified in that it only shows the most critical components. It is possible to add further components to the main amplifier. It is possible to have further components between the input 102 and the amplifying control terminal 108. It is of course also possible to use a number of cascade coupled transistors in the amplifying circuit 106 instead of only a single amplifying transistor 128. It is also possible to replace the field effect transistor 128 by a transistor of another technology.
  • the cancellation circuit 1 14 is configured to provide a current in the form of a cancellation signal Sc based on the input signal Sin, wherein current in the form of the cancellation signal Sc comprises fundamental tones and intermodulation tones.
  • the integrated amplifier 100 is configured to provide the current in the form of the output signal Sout at the output 104.
  • the output signal Sout is the sum of the currents in the form of the amplified input signal Samp and the cancellation signal Sc.
  • the integrated amplifier 100 comprises an input impedance 148 and a first supply 156 which may be a ground plane or ground connection.
  • the input impedance 148 is connected between the amplifying input 1 10 and the first supply 156.
  • the integrated amplifier 100 also comprises a second supply 162 and a load 164 connected between the second supply 162 and the output 104.
  • the main purpose of the load 164 is to enable a voltage swing on the output 104.
  • the second supply 162 is a voltage supply.
  • the load 164 may be a resistive load or an inductive load or a combination of a resistive load and an inductive load.
  • the output signal Sout will flow through the load 164 and will give rise to a voltage on the output 104.
  • Figure 3a shows in more detail embodiment possible implementation of the cancellation circuit 1 14 in the embodiment shown in Figure 2.
  • Figure 3b shows in more detail another possible implementation of the cancellation circuit 1 14 in the integrated amplifier shown in Figure 2.
  • the cancellation circuit 1 14 comprises a cancellation transistor 130 and a cancellation output 124, wherein the cancellation circuit 1 14 is configured to output the current in the form of the cancellation signal Sc on the cancellation output 124.
  • the cancellation circuit 1 14 also comprises a cancellation input 1 16, a cancellation impedance 132 and a current source 136.
  • the current source 136 is preferably programmable so that the amplifying circuit 106 may be tuned during operation.
  • the cancellation transistor 130 comprises a cancellation input terminal 140 and a cancellation output terminal 142, wherein the cancellation output terminal 142 is connected to the cancellation output 124, wherein the cancellation input terminal 140 is connected to the current source 136, and wherein the cancellation input terminal 140 is connected, via the cancellation impedance 132, to the cancellation input 1 16.
  • the cancellation impedance 132 comprises a resistor 150 connected in series with a capacitor 152.
  • at least one of the resistor 150 and the capacitor 152 is programmable in order to enable tuning of the amplifying circuit 106 during operation of the integrated amplifier.
  • the integrated amplifier 100 also comprises a bias 166, wherein the cancellation transistor 130 comprises a cancellation control terminal 146 connected to the bias 166. Consequently, the cancellation control terminal 146 is not used actively to control the cancellation transistor 130 but is only used to properly bias the cancellation transistor 130.
  • the integrated amplifier 100 may comprise an impedance buffer 160 (Fig 3b) connected between the input 102 and the cancellation input 1 16.
  • the impedance buffer 160 (e.g.
  • the impedance seen from the input 102 towards the cancellation circuit 1 14 is very high.
  • the introduction of the cancellation circuit 1 14 via the impedance buffer 160 will have a minimal effect on the integrated amplifier 100, compared to the case where no cancellation circuit 1 14 is present.
  • the current source 136 may comprise a cancellation supply 158 and a supply resistor 154 as is shown in Fig. 3b, wherein the supply resistor 154 is connected between the cancellation supply 158 and the cancellation input terminal 140.
  • the cancellation supply 158 is a voltage supply.
  • the cancellation supply 158 and the supply resistor 154 provide a simple implementation of the current source 136.
  • the frequency behavior of the cancellation transistor 130 matches the frequency behavior of the amplifying transistor 128 as much as possible with regard to the intermodulation tones.
  • the cancellation transistor 130 is preferably of the same type as the amplifying transistor 128. Also the cancellation transistor 130 is preferably matched to the amplifying transistor 128 with regard to at least one of: a temperature during operation, a current density during operation, and a manufacturing process, i.e., the manufacturing process for the cancellation transistor 130 is preferably the same as the manufacturing process for the amplifying transistor 128.
  • the frequency behavior of the cancellation transistor 130 should not only match the frequency behavior of the amplifying transistor 128 with regard to the intermodulation tones but the phase of the cancellation signal current Sc should also be opposite to the phase of the amplified input signal current Samp.
  • the attenuation of the intermodulation tones of the amplified input signal Samp should be equal to total cancellation while the attenuation of the fundamental tones of the amplified input signal Samp should be as small as possible.
  • a first ratio is the amplitude of the fundamental tones of the cancellation signal Sc divided by the amplitude of the intermodulation tones of the cancellation signal Sc.
  • a second ratio is the amplitude of the fundamental tones of the amplified input signal Samp divided by the amplitude of the intermodulation tones of the amplified input signal Samp.
  • the second ratio is larger than the first ratio.
  • the amplitude of the intermodulation tones of the cancellation signal Sc should preferably be essentially equal to the amplitude of the intermodulation tones of the amplified signal Samp.
  • the input signal Sin will also generate a voltage over the cancellation impedance 132.
  • the opposite sign of i 2 ensures that the current sourced to the cancellation output 124 is of the opposite phase to the input signal Sin.
  • the non-linearity of the cancellation transistor 130 will generate intermodulation tones to the cancellation signal current Sc.
  • the non-linearity of the cancellation transistor 130 can be altered by the sizing of the cancellation transistor 130, the size of the cancellation impedance 132 and the current of the current source 136.
  • the linearity of a (field effect) transistor depends on the bias condition, the voltage across the collector and the emitter, VCE, as well as the bias current. If the AC current is small in comparison with the DC biasing current, the linearity in general is at its optimum.
  • the real part of the cancellation impedance 132 i.e., the size of the cancellation resistor 150, changes the AC magnitude of ⁇ n . Since the linearity of the cancellation transistor 130 is dependent on the DC bias current, 11 , and the AC magnitude of iin both the real part of the cancellation impedance 132, i.e., the size of the cancellation resistor 150, and 11 can be used to set the desired linearity of the cancellation transistor 130.
  • the real part of the cancellation impedance 132 i.e., the size of the cancellation resistor 150
  • the fundamental tones, second order tones, and third order intermodulation tones of the cancellation signal Sc will change accordingly.
  • the real part of the cancellation impedance 132 i.e., the size of the cancellation resistor 150
  • the fundamental tones of the cancellation signal Sc are more or less stable. If changing the VCE of the transistor the effect will be more or less the same.
  • the imaginary value of the cancellation impedance 132 i.e., the size of the cancellation capacitor 152 will change the phase of the frequency spectrum of i 2 , in relation to the input signal Sin.
  • the current in the form of the amplified input signal Samp and the current of the cancellation signal SC will be added. Since the phase of the cancellation signal Sc is opposite to the phase of the amplified input signal Samp, as described above, the addition of the signals corresponds to a subtraction of the cancellation signal Sc from the amplified input signal Samp.
  • Figure 4 shows a simplified picture of the cancellation of the intermodulation tones in the amplified input signal Samp.
  • Figure 4a shows the frequency spectrum of the current of the amplified input signal Samp with two test tones as input signal Sin.
  • the intermodulation tones of the current in the form of the amplified input signal Samp are denoted Im in Figure 4a and the fundamental tones of the current of the amplified input signal Samp are denoted F.
  • Figure 4b shows the frequency spectrum of the current in the form of the cancellation signal Sc.
  • the spectrum of the cancellation signal Sc is of the opposite sign to the spectrum of the amplified input signal Samp.
  • the intermodulation tones of the current in the form of the cancellation signal Sc are denoted Im ' in Figure 4b and the fundamental tones of the current in the form of the cancellation signal Sc are denoted F ' .
  • the fundamental tones F ' of the current in the form of the cancellation signal Sc are very low while the intermodulation tones IM ' of the current in the form of the cancellation signal Sc match the ones in the amplified input signal Samp.
  • the linearity of the cancellation circuit 1 14 is chosen to be low to not reduce the fundamental tones F of the amplified input signal more than necessary.
  • the summation of the current of both the amplified input signal Samp and the cancellation signal Sc is in practice a subtraction of the cancellation signal Sc from the amplified input signal Samp as described above.
  • both the amplifying transistor 128 and the cancellation transistor 130 have current outputs the summation of the amplified input signal Samp and the cancellation signal Sc does not necessarily have to be done directly at the output as in the picture.
  • Different configurations where cascodes are used make it possible to alter the summary point in many different ways.
  • Fig. 5 shows schematically a communication device 300 in a wireless communication system 200.
  • the communication device 300 comprises an integrated amplifier 100 according to an embodiment of the invention.
  • the wireless communication system 200 also comprises a network node 400 which comprises a node radio transceiver 402.
  • the dotted arrow A1 represents transmissions from the communication device 300 to the network node 400, which are usually called uplink transmissions.
  • the full arrow A2 represents transmissions from the network node 400 to the communication device 300, which are usually called downlink transmissions.
  • the communication device 300 may be any of a User Equipment (UE) in Long Term Evolution (LTE), mobile station (MS), wireless terminal or mobile terminal which is enabled to communicate wirelessly in a wireless communication system, sometimes also referred to as a cellular radio system.
  • the UE may further be referred to as mobile telephones, cellular telephones, computer tablets or laptops with wireless capability.
  • the UEs in the present context may be, for example, portable, pocket-storable, hand-held, computer-comprised, or vehicle-mounted mobile devices, enabled to communicate voice or data, via the radio access network, with another entity, such as another receiver or a server.
  • the UE can be a Station (STA), which is any device that contains an IEEE 802.1 1 -conformant Media Access Control (MAC) and Physical Layer (PHY) interface to the Wireless Medium (WM).
  • STA Station
  • MAC Media Access Control
  • PHY Physical Layer
  • the radio network nodes may be of different classes such as, e.g., macro eNodeB, home eNodeB or pico base station, based on transmission power and thereby also cell size.
  • the radio network node can be a Station (STA), which is any device that contains an IEEE 802.1 1 -conformant Media Access Control (MAC) and Physical Layer (PHY) interface to the Wireless Medium (WM).
  • STA Station
  • MAC Media Access Control
  • PHY Physical Layer

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Amplifiers (AREA)

Abstract

La présente invention concerne un amplificateur intégré (100) comprenant une entrée (102) conçue pour recevoir un signal d'entrée (Sentrée), une sortie (104) conçue pour émettre un signal de sortie (Ssortie), un circuit d'amplification (106) et un circuit d'annulation (114). Le circuit d'amplification (106) est conçu pour fournir un signal d'entrée amplifié (Samp) basé sur le signal d'entrée (Sentrée), le signal d'entrée amplifié (Samp) comprenant des tonalités fondamentales et d'intermodulation. Le circuit d'annulation (114) est conçu pour fournir un signal d'annulation (Sa) basé sur le signal d'entrée (Sentrée), le signal d'annulation (Sa) comprenant des tonalités fondamentales et d'intermodulation. L'amplificateur intégré (100) est conçu pour fournir le signal de sortie (Ssortie) basé sur la somme du signal d'entrée amplifié (Samp) et du signal d'annulation (Sa), de telle sorte que les tonalités d'intermodulation du signal d'entrée amplifié (Samp) sont atténuées par les tonalités d'intermodulation du signal d'annulation (Sa).
PCT/EP2016/070034 2016-08-25 2016-08-25 Amplificateur intégré WO2018036627A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/EP2016/070034 WO2018036627A1 (fr) 2016-08-25 2016-08-25 Amplificateur intégré
CN201680088735.1A CN109643973B (zh) 2016-08-25 2016-08-25 集成放大器

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Application Number Priority Date Filing Date Title
PCT/EP2016/070034 WO2018036627A1 (fr) 2016-08-25 2016-08-25 Amplificateur intégré

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WO2018036627A1 true WO2018036627A1 (fr) 2018-03-01

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US20080204142A1 (en) * 2007-02-27 2008-08-28 Samsung Electronics Co., Ltd. Low noise amplifier
US20090075623A1 (en) * 2007-09-19 2009-03-19 Lee Hee-Hyun Apparatus and method for low-noise amplification in a wireless communication system
US8373503B1 (en) * 2011-12-12 2013-02-12 Linear Technology Corporation Third order intermodulation cancellation for RF transconductors

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US6172564B1 (en) * 1999-07-30 2001-01-09 Eugene Rzyski Intermodulation product cancellation circuit
KR20020009678A (ko) * 2000-07-26 2002-02-02 윤종용 이동 통신 단말기에서 인터모듈레이션 필터를 이용한 수신회로
US6717463B2 (en) * 2000-11-03 2004-04-06 Qualcomm Incorporated Circuit for linearizing electronic devices
DE602004023881D1 (de) * 2004-02-17 2009-12-10 Ericsson Telefon Ab L M Dynamisch vorgespannter verstärker
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040145415A1 (en) * 2003-01-24 2004-07-29 Bo Sun High linearity low noise amplifier
WO2007006868A1 (fr) * 2005-07-11 2007-01-18 Nokia Siemens Networks Oy Perfectionnement de circuits rf intégrés
US20080204142A1 (en) * 2007-02-27 2008-08-28 Samsung Electronics Co., Ltd. Low noise amplifier
US20090075623A1 (en) * 2007-09-19 2009-03-19 Lee Hee-Hyun Apparatus and method for low-noise amplification in a wireless communication system
US8373503B1 (en) * 2011-12-12 2013-02-12 Linear Technology Corporation Third order intermodulation cancellation for RF transconductors

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CN109643973B (zh) 2022-05-13

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