WO2018018372A1 - 电子芯片内的电流计算方法及系统 - Google Patents
电子芯片内的电流计算方法及系统 Download PDFInfo
- Publication number
- WO2018018372A1 WO2018018372A1 PCT/CN2016/091595 CN2016091595W WO2018018372A1 WO 2018018372 A1 WO2018018372 A1 WO 2018018372A1 CN 2016091595 W CN2016091595 W CN 2016091595W WO 2018018372 A1 WO2018018372 A1 WO 2018018372A1
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- WIPO (PCT)
- Prior art keywords
- threads
- core
- allocation policy
- chip
- current
- Prior art date
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
Definitions
- the present invention relates to the field of electronic chips, and in particular, to a current calculation method and system in an electronic chip.
- the chip also has its own unique place. In a broad sense, as long as it is a semiconductor wafer manufactured by microfabrication, it can be called a chip, and there is no circuit inside.
- a semiconductor light source chip for example, a mechanical chip such as a MEMS gyroscope; or a biochip such as a DNA chip.
- the intersection of the chip and the integrated circuit is on the "circuit on the silicon wafer.”
- the chipset is a series of interrelated chipsets that are interdependent and can play a bigger role, such as the processor inside the computer and the North-South Bridge chipset, the RF, baseband and power management chipset in the phone. .
- a current calculation method in an electronic chip is provided, which solves the shortcomings in the prior art that calculation and management of current cannot be realized.
- a method of calculating current in an electronic chip comprising the steps of:
- the current of each core is calculated based on the number of threads.
- the obtaining, according to the allocation policy, the number of threads of each kernel is specific, including:
- the number of threads per core is allocated according to the load balancing allocation policy.
- the obtaining, according to the allocation policy, the number of threads of each kernel is specific, including:
- the number of threads per core is allocated based on the number-averaged allocation policy.
- a current calculation system within an electronic chip comprising:
- the obtaining unit is configured to acquire a total thread of the multi-core chip
- An allocation unit for knowing the number of threads of each kernel according to an allocation policy
- the allocating unit is specifically configured to allocate a number of threads of each core according to a load balancing allocation policy.
- the allocating unit is specifically configured to allocate a number of threads of each core according to a quantity-averaged allocation policy.
- the technical solution provided by the specific embodiment of the present invention acquires the total thread of the multi-core chip, learns the number of threads of each core according to the allocation strategy, calculates the current of each core according to the number of the threads, so it has the current calculation and management in the electronic chip.
- FIG. 1 is a flow chart of a current calculation method in an electronic chip according to the present invention.
- FIG. 2 is a structural diagram of a current calculation system in an electronic chip according to the present invention.
- FIG. 1 is a flowchart of a current calculation method in an electronic chip according to a first preferred embodiment of the present invention. The method is implemented by an electronic chip. The method is as shown in FIG. 1 and includes the following steps:
- Step S101 Acquire a total thread of the multi-core chip
- Step S102 Obtain a number of threads of each kernel according to an allocation policy.
- Step S103 Calculate the current of each core according to the number of threads.
- the technical solution provided by the specific embodiment of the present invention acquires the total thread of the multi-core chip, learns the number of threads of each core according to the allocation strategy, calculates the current of each core according to the number of the threads, so it has the current calculation and management in the electronic chip.
- the implementation method of the foregoing step S102 may be specifically:
- the number of threads per core is allocated according to the load balancing allocation policy.
- the implementation method of the foregoing step S103 may be specifically:
- the number of threads per core is allocated based on the number-averaged allocation policy.
- FIG. 2 is a current calculation system in an electronic chip according to a second preferred embodiment of the present invention.
- the system includes:
- the obtaining unit 201 is configured to acquire a total thread of the multi-core chip
- the allocating unit 202 is configured to learn the number of threads of each kernel according to the allocation policy
- the calculating unit 203 is configured to calculate the current of each core according to the number of threads.
- the technical solution provided by the specific embodiment of the present invention acquires the total thread of the multi-core chip, learns the number of threads of each core according to the allocation strategy, calculates the current of each core according to the number of the threads, so it has the current calculation and management in the electronic chip.
- the foregoing allocating unit 202 is specifically configured to allocate a number of threads of each core according to a load balancing allocation policy.
- the foregoing allocating unit 202 is specifically configured to allocate, according to the number-averaged allocation policy, the number of threads of each core.
- Computer readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one location to another.
- a storage medium may be any available media that can be accessed by a computer.
- the computer readable medium may include random access memory (Random) Access Memory, RAM), Read-Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), Compact Disc Read-Only Memory, CD-ROM, or other optical disc storage, magnetic storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also. Any connection may suitably be a computer readable medium.
- a disk and a disc include a compact disc (CD), a laser disc, a compact disc, a digital versatile disc (DVD), a floppy disk, and a Blu-ray disc, wherein the disc is usually magnetically copied, and the disc is The laser is used to optically replicate the data. Combinations of the above should also be included within the scope of the computer readable media.
Abstract
Description
Claims (6)
- 一种电子芯片内的电流计算方法,其特征在于,所述方法包括如下步骤:获取多核芯片的总线程;依据分配策略获知每个内核的线程数量;依据该线程数量计算每个核的电流。
- 根据权利要求1所述的方法,其特征在于,所述依据分配策略获知每个内核的线程数量具体,包括:依据负载均衡的分配策略分配每个核的线程数量。
- 根据权利要求1所述的方法,其特征在于,所述依据分配策略获知每个内核的线程数量具体,包括:依据数量均分的分配策略分配每个核的线程数量。
- 一种电子芯片内的电流计算系统,其特征在于,所述系统包括:获取单元,用于获取多核芯片的总线程;分配单元,用于依据分配策略获知每个内核的线程数量;计算单元,用于依据该线程数量计算每个核的电流。
- 根据权利要求4所述的系统,其特征在于,所述分配单元,具体用于依据负载均衡的分配策略分配每个核的线程数量。
- 根据权利要求4所述的系统,其特征在于,所述分配单元,具体用于依据数量均分的分配策略分配每个核的线程数量。
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US20100299541A1 (en) * | 2009-05-21 | 2010-11-25 | Kabushiki Kaisha Toshiba | Multi-core processor system |
CN103502946A (zh) * | 2011-04-05 | 2014-01-08 | 高通股份有限公司 | 用于动态控制到便携式计算装置的多核心处理器中的多个核心的电力的方法和系统 |
CN104081315A (zh) * | 2011-12-15 | 2014-10-01 | 英特尔公司 | 包括线程合并的用于能效和节能的方法、装置和系统 |
CN104169832A (zh) * | 2012-03-13 | 2014-11-26 | 英特尔公司 | 提供处理器的能源高效的超频操作 |
CN106155862A (zh) * | 2016-07-25 | 2016-11-23 | 张升泽 | 电子芯片内的电流计算方法及系统 |
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2016
- 2016-07-25 WO PCT/CN2016/091595 patent/WO2018018372A1/zh active Application Filing
Patent Citations (6)
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CN101256515A (zh) * | 2008-03-11 | 2008-09-03 | 浙江大学 | 多核处理器操作系统负载均衡的实现方法 |
US20100299541A1 (en) * | 2009-05-21 | 2010-11-25 | Kabushiki Kaisha Toshiba | Multi-core processor system |
CN103502946A (zh) * | 2011-04-05 | 2014-01-08 | 高通股份有限公司 | 用于动态控制到便携式计算装置的多核心处理器中的多个核心的电力的方法和系统 |
CN104081315A (zh) * | 2011-12-15 | 2014-10-01 | 英特尔公司 | 包括线程合并的用于能效和节能的方法、装置和系统 |
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