WO2018014951A1

WO2018014951A1 - Antenna package for a millimetre wave integrated circuit

Info

Publication number: WO2018014951A1
Application number: PCT/EP2016/067321
Authority: WO
Inventors: Mario Costa; Fabio Morgia
Original assignee: Huawei Technologies Co., Ltd.
Priority date: 2016-07-20
Filing date: 2016-07-20
Publication date: 2018-01-25
Also published as: EP3414791A1; EP3414791B1

Abstract

The present invention provides an antenna package 100 and a manufacturing method thereof. The antenna package 100 comprises an antenna 101 with an embedded antenna port 102. The antenna 101 has an antenna port side and an antenna radiation side. A semiconductor chip 103 is provided on the antenna port side of the antenna 101. The chip 103 comprises coupling elements for coupling radio frequency signals from a top side of the chip 103 to the antenna port 102. These coupling elements comprise a matching network including a high-impedance microstrip line 104 and a ground window 105 on the top side of the chip 103, a resonant dielectric cavity 106 within the chip 103, and a metal coupling slot 107 facing the antenna port 102 on a bottom side of the chip 103.

Description

ANTENNA PACKAGE FOR A MILLIMETRE WAVE INTEGRATED CIRCUIT

TECHNICAL FIELD The present invention relates to an antenna package and to a manufacturing method thereof. The antenna package is particularly designed for a millimetre wave integrated circuit, like a radio frequency (RF) transceiver.

BACKGROUND

Characterization and packaging of millimetre wave integrated circuits is challenging, since at higher frequencies (e.g. at f>90GHz in the W, D ... bands), a wavelength becomes comparable to, or at least a fraction of, the size of the packaging structure. A particularly critical issue for a millimetre wave transceiver design is a coupling of the chip to an antenna port (typically a rectangular waveguide).

In a conventional package 800 shown in Fig. 8, a classical technique, here wire bonding, is used for providing the coupling to an antenna port 802. In particular, a (transceiver) chip 803 is connected via a bonding wire 804 to a microstrip line 805, which is further connected to the antenna port 802 of an antenna 801. Classical techniques like wire bonding can, however, not guarantee an acceptable matching between the chip 803 and the antenna port 802 at high frequencies. Further, at such frequencies the bonding wire 804 will even work as a radiator itself. The main problem at high frequencies is thus to provide a low-complex, robust, but low- cost packaging solution, in which classical techniques for RF coupling between a (transceiver) chip and an antenna port are avoided.

Conventionally, this problem is addressed by preventing, for instance, any wire bonding connections between the chip 803 and the package microstrip line 805 connected to the antenna port 802. Thereby, unwanted effects of a series RF bond inductance, which hamper operation at high frequencies, are avoided. Several conventional approaches for removing wire bonding connections exist. In a first conventional approach, single antenna elements or multiple antenna elements (antenna arrays) are integrated into a chip, resulting in a highest level of integration. However, the disadvantage of this approach is that a high antenna gain, embedded in a semiconductor chip, is not a cost effective solution (because too much semiconductor area is needed).

In a second conventional approach, flip-chip bumps are used for the coupling. That is, in a wafer level chip scale packaging (WLCSP), a chip is packaged in a ball grid array with the surface of the chip facing down to a PCB, on which it is mounted (package). The flip- chip bump approach shows acceptable performance at high frequencies, but requires a very accurate assembling process, and moreover, a total packaging insertion loss is not optimized.

US 2007/216493 Al suggests a coupling from a planar substrate/chip circuit microwave transmission line to an external waveguide on the back of the substrate/chip. However, the disadvantage of this approach is that the effective transition to the waveguide is external to the chip, and thus a back short (GND plane) is required. Moreover, in order to work properly, the interconnection needs two additional substrates provided below the chip.

SUMMARY

In view of the above-mentioned problems and disadvantages, the present invention aims at improving the conventional approaches for packaging millimetre wave integrated circuits. The present invention has the object to provide a low-complex, a robust, and a low-cost packaging solution, which is suitable for high frequencies and avoids classical techniques for signal coupling, like wire bonding. Further, the packaging solution should not be related to an antenna gain requirement. The packaging solution should also allow for a high performance, and should particularly be optimized with respect to insertion loss and return loss. Also a back short should be avoided in the packaging solution.

The object of the present invention is achieved by the solution provided in the enclosed independent claims. Advantageous implementations of the present invention are further defined in the dependent claims. In particular the present invention proposes an on-chip interconnection for high frequency signals.

A first aspect of the present invention provides an antenna package comprising an antenna with an embedded antenna port, the antenna including an antenna port side and an antenna radiation side, and a semiconductor chip provided on the antenna port side, wherein the chip comprises coupling elements for coupling RF signals from a top side of the chip to the antenna port, the coupling elements comprising: a matching network including a high-impedance microstrip line and a ground window on the top side of the chip, a resonant dielectric cavity within the chip, and a metal coupling slot facing the antenna port on a bottom side of the chip.

An embedded antenna port means that the antenna port is completely included within the structure of the antenna. A microstrip line is a high-impedance microstrip line, if its impedance is larger than 50Ω. In particular, the impedance of the microstrip line of the antenna package of the first aspect is even in the range of 70-80Ω.

In the antenna package of the first aspect, the chip assembled on the antenna port side of the antenna is directly coupled to antenna port in the antenna. Therefore, a low-complex, robust, but also low-cost packaging solution is achieved by the antenna package. A particular advantage of the antenna package is that insertion loss can be optimized. Further, the antenna package requires no back short waveguide or the like. Also, no intermediate PCB is required between the chip and the antenna port. Finally, the antenna advantageously acts as grounded mechanical carrier for the chip in the antenna package.

In a first implementation form of the antenna package according to the first aspect, side walls of the resonant dielectric cavity are defined by ground vias connection a top and a bottom ground layer of the chip. This provides a simple implementation of the resonant dielectric cavity created inside of the chip.

In a second implementation form of the antenna package according to the first aspect as such or according to the first implementation form of the first aspect, the coupling slot is dimensioned and arranged such that, when the package is viewed from the antenna port side, the antenna port completely includes the coupling slot.

Thereby, a low sensitivity to alignment tolerances, i.e. to smaller misalignment, between chip and antenna port is achieved.

In a third implementation form of the antenna package according to the first aspect as such or according to the first implementation form of the first aspect, a λ/4 waveguide is arranged between the chip and the antenna port.

The λ/4 waveguide significantly improves the performance of the antenna package, due to an improved matching between the chip and the antenna port.

In a fourth implementation form of the antenna package according to the third implementation form of the first aspect, the λ/4 waveguide is dimensioned and arranged such that it completely includes the coupling slot on the bottom side of the chip.

Thereby, a low sensitivity to alignment tolerances, i.e. small misalignments, between chip and antenna port is achieved.

In a fifth implementation form of the antenna package according to the third or fourth implementation form of the first aspect, a ratio between a surface size of the λ/4 waveguide and a surface size of the coupling slot is in a range of 6-8, and is in particular 7.

These ratios have been found to be the optimum design trade-off between a best wideband transmission performance and a lower sensitivity of said transmission performance to alignment tolerances between the chip and the antenna port. In a sixth implementation form of the antenna package according to the first aspect as such or according to any implementation form of the first aspect, the RF signals are of a frequency above 90 GHz, and in particular in a frequency range of 140-160 GHz. At high frequencies above 90 GHz the antenna package is particularly feasible and effective.

In a seventh implementation form of the antenna package according to the first aspect as such or according to any implementation form of the first aspect, the antenna port is dimensioned smaller than the chip.

Thus, the antenna package provides an on-chip interconnection that is also feasible from a cost point of view.

In an eighth implementation form of the antenna package according to the first aspect as such or according to any implementation form of the first aspect, the coupling slot is included completely in the resonant dielectric cavity. Thereby, the overall performance of the antenna package can be improved.

In a ninth implementation form of the antenna package according to the first aspect as such or according to any implementation form of the first aspect, the chip comprises a plurality of metal coupling slots on its bottom side for coupling the RF signals into a plurality of antenna ports.

Accordingly, a chip with, for instance, a double transition / interconnection can be used in the antenna package. In a tenth implementation form of the antenna package according to the first aspect as such or according to any implementation form of the first aspect, the chip is manufactured in the GaAs material system.

The antenna package is designed and optimized for this GaAs material system.

A second aspect of the present invention provides a method of manufacturing an antenna package, the method comprising the steps of providing an antenna with an embedded antenna port, the antenna including an antenna port side and an antenna radiation side, providing a semiconductor chip on the antenna port side, configuring the chip with coupling elements for coupling RF signals from a top side of the chip to the antenna port by: providing a matching network including a high-impedance microstrip line and a ground window on the top side of the chip, creating a resonant dielectric cavity within the chip, and providing a metal coupling slot facing the antenna port on a bottom side of the chip.

In a first implementation form of the method according to the second aspect, side walls of the resonant dielectric cavity are defined by ground vias connection a top and a bottom ground layer of the chip.

In a second implementation form of the method according to the second aspect as such or according to the first implementation form of the second aspect, the coupling slot is dimensioned and arranged such that, when the package is viewed from the antenna port side, the antenna port completely includes the coupling slot.

In a third implementation form of the method according to the second aspect as such or according to the first implementation form of the second aspect, a λ/4 waveguide is arranged between the chip and the antenna port. In a fourth implementation form of the method according to the third implementation form of the second aspect, the λ/4 waveguide is dimensioned and arranged such that it completely includes the coupling slot on the bottom side of the chip.

In a fifth implementation form of the method according to the third or fourth implementation form of the second aspect, a ratio between a surface size of the λ/4 waveguide and a surface size of the coupling slot is selected to be in a range of 6-8, and is in particular selected to be 7.

In a sixth implementation form of the method according to the second aspect as such or according to any implementation form of the second aspect, the RF signals are of a frequency above 90 GHz, and in particular in a frequency range of 140-160 GHz. In a seventh implementation form of the method according to the second aspect as such or according to any implementation form of the second aspect, the antenna port is dimensioned smaller than the chip. In an eighth implementation form of the method according to the second aspect as such or according to any implementation form of the second aspect, the coupling slot is included completely in the resonant dielectric cavity.

In a ninth implementation form of the method according to the second aspect as such or according to any implementation form of the second aspect, the chip is provided with a plurality of metal coupling slots on its bottom side for coupling the RF signals into a plurality of antenna ports.

In a tenth implementation form of the method according to the second aspect as such or according to any implementation form of the second aspect, the chip is manufactured in the GaAs material system.

With the method of the second aspect as such and its implementation forms, the same advantages as described for the antenna package of the first aspect as such and its respective implementation forms can be achieved.

It has to be noted that all devices, elements, units and means described in the present application could be implemented in the software or hardware elements or any kind of combination thereof. All steps which are performed by the various entities described in the present application as well as the functionalities described to be performed by the various entities are intended to mean that the respective entity is adapted to or configured to perform the respective steps and functionalities. Even if, in the following description of specific embodiments, a specific functionality or step to be full formed by external entities is not reflected in the description of a specific detailed element of that entity which performs that specific step or functionality, it should be clear for a skilled person that these methods and functionalities can be implemented in respective software or hardware elements, or any kind of combination thereof. BRIEF DESCRIPTION OF THE DRAWINGS

The above described aspects and implementation forms of the present invention will be explained in the following description of specific embodiments in relation to the enclosed drawings, in which:

Fig. 1 shows a top view and a side view of an antenna package according to an embodiment of the present invention.

Fig. 2 shows an antenna package according to an embodiment of the present invention.

Fig. 3 shows a top view and a bottom view of a semiconductor chip of an antenna package according to an embodiment of the present invention.

Fig. 4 shows a bottom view and a side view of an antenna package according to an embodiment of the present invention.

Fig. 5 shows a simulation of insertion loss and return loss of an antenna package according to an embodiment of the present invention.

Fig. 6 shows a measurement of insertion loss and return loss of an antenna package according to an embodiment of the present invention.

Fig. 7 shows in a flow diagram a method according to an embodiment of the present invention. shows a conventional antenna package. DETAILED DESCRIPTION OF THE EMBODIMENTS

Fig. 1 shows an antenna package 100 according to an embodiment of the present invention. The antenna package 100 is shown in a top view and in a side view, respectively. The antenna package 100 generally includes an antenna 101 with an antenna port side and an antenna radiator elements side (antenna radiation side), and a chip 103.

The antenna port side may be defined as the side of the antenna including a waveguide portion for connecting the antenna to the chip. The waveguide portion may be a portion of the antenna port as described below with reference to figure 1. Alternatively, the waveguide portion may be a portion of an additional waveguide embedded in the antenna and arranged between the antenna port and the chip.

The antenna radiation side is the side of the antenna including the radiation elements and opposite the antenna port side.

The chip 103 is provided on the antenna 101, specifically on the antenna port side of the antenna 101. The chip 103 is advantageously a millimeter wave integrated circuit, for instance, a high frequency transceiver. High frequencies in the context of the present invention are considered frequencies of at or above 90GHz. The chip 103 of the antenna package 100 may operate with RF signals having a frequency above 90 GHz, for example, in a frequency range of 140-160 GHz.

The chip 103 of the antenna package 100 is configured to couple RF signals from a top side of the chip 103 (the side not facing the antenna 101) into the antenna 101, more specifically to an antenna port 102, which is embedded within the antenna 101. The antenna port 102 is, for example, a rectangular waveguide within the antenna 101. However, the antenna port 102 can also be another interface port, e.g. a port of an antenna filter. The antenna port 102 may be dimensioned smaller than the chip 103.

The chip 103 is configured for the coupling of the RF signals by comprising dedicated coupling elements. The RF interconnection between the chip 103 and the antenna port 102 is particularly enabled by a proper design of these coupling elements. That is, the coupling elements are carefully designed to match the operating frequency, specifically in view of minimizing insertion loss and return loss at the operating frequency. The coupling elements comprise a matching network on the top side of the chip 103, a resonant dielectric cavity 106 within the chip 103, and a metal coupling slot 107 facing the antenna port 102 on a bottom side of the chip 103 (the side facing the antenna 101). The top view of the antenna package 100 in Fig. 1 shows the chip 103 on the antenna port side of the antenna 101, and particularly shows the matching network provided on the top side of the chip 103. The matching network includes a high-impedance microstrip line 104, and a ground window 105. A high impedance microstrip line 104 is in general any microstrip line having an impedance larger than 50Ω. In particular, the microstrip line 104 may have an impedance of 70-80Ω. The size of the microstrip line 104 and of the ground window 105, respectively, is optimized in dependence of the frequency of the RF signals. The microstrip line 104 may be grounded with one of its ends. Further, the top view of the chip 103 shows outlines of the resonant cavity 106 created inside the chip 103. The side walls of the resonant cavity 106 may be defined by ground via holes, as explained in more detail below. The resonant cavity 106 is designed to create a resonance in the frequency band of the used RF signals, and supports injection of the RF signals via the coupling slot 107 into the antenna port 102.

Finally, the side view of the antenna package 100 in Fig. 1 shows the coupling metal slot 107 provided on the bottom side of the chip 103. As indicated by the arrow, the RF signals are in the end coupled from this coupling slot 107 into the antenna port 102. The coupling slot 107 may be made by patterning a back side metal of the chip 103. The coupling slot 107 may be arranged centrally in the resonant cavity 106 (in a top or bottom view of the chip 103), and has a width as narrow as possible. In particular, the coupling slot 107 included completely within the resonant cavity 106. The coupling slot 107 may also be dimensioned and arranged such that, when the antenna package 100 is viewed from below i.e. from the antenna port side, the antenna port 102 completely includes the coupling slot 107.

The main advantage of the antenna package 100 is that the chip 103 is coupled directly to the antenna port 102. Further, the coupling elements presented above are particularly suitable for the highest millimeter wave applications, and are not related to the antenna gain requirement. The interconnection for the RF signals is mainly on-chip, and is designed to couple the signals from the top side of chip 103 directly into the antenna port 102 under the chip 103. The antenna package 100 is specifically feasible at f>90GHz, due to the small size of the antenna port 102 compared to the size of the chip 103 at these high frequencies. Furthermore, the antenna port 102 mechanic is, at the same time, the mechanic carrier (ground), on which the chip 103 is assembled. Therefore, no dedicated ground is necessary, thereby reducing the size of the antenna package.

Fig. 2 shows another antenna package 100 according to an embodiment of the present invention. The antenna package 100 of Fig. 2 expands the antenna package 100 of Fig. 1, and identical elements are provided with the same reference signs.

The antenna package 100 of Fig. 2 also includes the chip 103 and the antenna 101. The chip 103 also has coupling elements comprising the microstrip line 104, the ground window 105 (not shown in Fig. 2), the resonant cavity 106, and the coupling slot 107. The antenna 101 also has the embedded antenna port 102, to which the RF signals are coupled from the top side of the chip 103.

Additionally, the antenna package 100 of Fig. 2 is shown with a ground via 203. A plurality of such ground vias 203 may define the side walls of the resonant cavity 106. The ground vias 203 thereby connect a top and a bottom ground layer of the chip 103, and may reach from the top side of the chip 103 to its bottom side.

Furthermore, the antenna package 100 of Fig. 2 may have a λ/4 waveguide 201 arranged between the chip 103 and the antenna port 102. The ground vias 203 and the λ/4 waveguide 201 can be provided together or independently from another. That means, only the ground vias 203 or only the λ/4 waveguide 201 may be present.

The λ/4 waveguide 201 is provided adjacent to the bottom side of the chip 103, which is configured with the metal coupling slot 107. That is, the open coupling slot 107, which could be provided in the bottom ground layer of the chip 103, faces down to the λ/4 waveguide line 201. The size of the λ/4 waveguide 201 may be designed greater than the metal coupling slot 107, in order to make the performance of the interconnection insensitive to alignment tolerances between the chip 103 and the mechanics of the antenna port 102.

The λ/4 waveguide 201 has the function to improve the matching between the chip 103 and the antenna port 102. The dimensions of the λ/4 waveguide 201 may be such that the coupling slot 107 of the chip 103 is completely included therein. In other words, the λ/4 waveguide 201 may be dimensioned and arranged such that it completely covers or includes the coupling slot 107 on the bottom side of the chip 103. This design constraint allows making the performance of the interconnection less sensitive to the alignment tolerances between the chip 103 and the mechanics of the antenna port 102.

A ratio between the sizes of the of the intermediate λ/4 waveguide 201 surface and the coupling slot 107 surface on the bottom side of the chip 103 is a design trade-off between the best wide band transition (RF interconnection) performance result and a lower sensitivity of the same transition performance to the alignment tolerances between the chip 103 and the mechanics of the antenna port 102. For example, this ratio is advantageously about 7 for a transition (RF interconnection) designed on a GaAs semiconductor substrate and working in the D-band. Generally, a ratio of a surface size of the λ/4 waveguide 201 and a surface size of the coupling slot 107 may be in a range of 6- 8, and in particular it is around 7 for the antenna package 100.

Fig. 3 shows a top view and a bottom view of the chip 103 included in the antenna package 100 of Fig. 2. The chip 103 includes the resonant cavity 106 defined by a plurality of ground vias 203, the matching network made of microstrip line 104 and ground window 105, and the coupling slot 107. It can be seen that the coupling slot 107 may be included completely in the resonant dielectric cavity 106. In particular, it is arranged centrally within the borders of the cavity 106.

Fig. 4 shows another antenna package 100, which expands the antenna packages 100 shown in the Figs. 1 and 2, respectively. The antenna package 100 is shown in a bottom view and a side view. In the bottom view, it can be seen that a plurality of ground vias 203 arranged for example in a regular pattern may define each side wall of the resonant cavity 106. Furthermore, it can be seen that the λ/4 waveguide 201 may be dimensioned and arranged such that it completely covers the coupling slot 107 on the bottom side of the chip 103.

In the side view, it can be seen that the antenna port 102 may be dimensioned smaller than the chip 103, which is feasible at high operating frequencies. Further, also the λ/4 waveguide 201 may be dimensioned smaller than the chip 103, but such that it still covers the coupling slot 107 completely. Further, the λ/4 waveguide 201 may be dimensioned larger than the antenna port 102, at least in one of its dimension.

In addition, the side view of the antenna package 100 shows that one or more PCBs 401 may be provided adjacent to the chip 103 on the antenna port side of the antenna 101. For instance, a two layer PCB 401 may be bonded to the antenna port side of the antenna 101. The PCB 401 can comprise biasing and/or signaling pads for connecting the chip 103.

In this way, for example, it is possible to design an antenna package 100 of small size, for instance for operating frequencies in the D-band, and specifically with dimensions of about 4x4cm. Such an antenna package 100 can be further assembled as a standard SMD device on a PCB or the like.

Fig. 5 shows exemplarily an implementation of an antenna package 100 (left side) designed for the D-band, i.e. 140-160 GHz. The transmission of RF signals from the chip 103 via the coupling slot 107 to the antenna port 102 is implemented as explained above. The exemplary antenna package 100 comprises a chip 103 made from GaAs, the chip 103 having a thickness of 50μιη. The chip 103 is provided on the antenna 101 to directly face the antenna port 102. The antenna port 102 has dimensions of 1.65x0.825mm, and is thus suitable for frequencies between 120-170GHz.

Fig. 5 shows (right side) simulation results for insertion loss and return loss (in dB, provided on the vertical axis) in dependence of the operating frequency (in GHz, provided on the horizontal axis). The simulations were performed with an EM HFSS 3D simulator (Ansys).

Fig. 6 shows exemplarily a test jig implementation in order to check the chip to antenna port interconnection performances, of which simulation results are shown in Fig. 5. A single chip 103 includes a double transition into two ports.

Fig. 6 shows (bottom) measurement results for insertion loss and return loss (in dB, provided on the vertical axis) in dependence of the operating frequency (in GHz, provided on the horizontal axis). For the measurements, the chip 103 was assembled on a test jig with two standard rectangular waveguide output ports as antenna ports 102. As shown in Fig. 6, these output ports both connected (via a bend) to a waveguide. A network analyzer was used to measure the total losses in the assembly. Then, the single transition loss was obtained by de-embedding the test jig losses from the total measured losses.

The microstrip line loss numbered to 0.72dB. The interface loss between the output ports and the waveguide (labelled (waveguide+2bend) loss) in Fig. 6) numbered to 0.4dB. The single transition loss numbered to 1.04dB. Fig. 7 shows a method 700 of manufacturing an antenna package 100, in particular a package for a millimeter wave integrated circuit. In a first step 701 of the method 700, an antenna 101 with an embedded antenna port 102 is provided, the antenna 101 including an antenna port side and an antenna radiation side. In a second step 702, a semiconductor chip 103 is provided on the antenna 101 port side. In a third step 703, the chip 103 is configured with coupling elements for coupling RF signals from a top side of the chip 103 to the antenna port 102.

The third step 703 includes to this end a first sub-step 7031 , in which a matching network including a high-impedance microstrip line 104 and a ground window 105 is provided on the top side of the chip 103, a second sub-step 7032, in which a resonant dielectric cavity 106 is created within the chip 103, and a third sub-step 7033, in which a metal coupling slot 107 facing the antenna port 102 on a bottom side of the chip 103 is provided.

The present invention has been described in conjunction with various embodiments as examples as well as implementations. However, other variations can be understood and effected by those persons skilled in the art and practicing the claimed invention, from the studies of the drawings, this disclosure and the independent claims. In the claims as well as in the description the word "comprising" does not exclude other elements or steps and the indefinite article "a" or "an" does not exclude a plurality. A single element or other unit may fulfill the functions of several entities or items recited in the claims. The mere fact that certain measures are recited in the mutual different dependent claims does not indicate that a combination of these measures cannot be used in an advantageous implementation.

Claims

1. Antenna package (100) comprising :

an antenna (101) with an embedded antenna port (102), the antenna (101) including an antenna port side and an antenna radiation side, and

a semiconductor chip (103) provided on the antenna port side,

wherein the chip (103) comprises coupling elements for coupling radio frequency signals from a top side of the chip (103) to the antenna port (102), the coupling elements comprising:

a matching network including a high-impedance microstrip line (104) and a ground window (105) on the top side of the chip (103),

a resonant dielectric cavity (106) within the chip (103), and

a metal coupling slot (107) facing the antenna port (102) on a bottom side of the chip (103).

2. Antenna package (100) according to claim 1, wherein

side walls of the resonant dielectric cavity (106) are defined by ground vias (203) connecting a top and a bottom ground layer of the chip (103).

3. Antenna package (100) according to claim 1 or 2, wherein

the coupling slot (107) is dimensioned and arranged such that, when the antenna package (100) is viewed from the antenna port side, the antenna port (102) completely includes the coupling slot (107).

4. Antenna package (100) according to claim 1 or 2, comprising:

a λ/4 waveguide (201) arranged between the chip (103) and the antenna port

(102).

5. Antenna package (100) according to claim 4, wherein

the λ/4 waveguide (201) is dimensioned and arranged such that it completely includes the coupling slot (107) on the bottom side of the chip (103).

6. Antenna package (100) according to claim 4 or 5, wherein

a ratio between a surface size of the λ/4 waveguide (201) and a surface size of the coupling slot (107) is in a range of 6-8, and is preferably 7.

7. Antenna package (100) according to one of claims 1 to 6, wherein

the radio frequency signals are of a frequency above 90 GHz, and in particular in a frequency range of 140-160 GHz.

Antenna package (100) according to one of claims 1 to 7, wherein

the antenna port (102) is dimensioned smaller than the chip (103).

Antenna package (100) according to one of claims 1 to 8, wherein

the coupling slot (107) is included completely in the resonant dielectric cavity (106).

10. Antenna package (100) according to one of claims 1 to 9, wherein

the chip (103) comprises a plurality of metal coupling slots (107) on its bottom side for coupling the radio frequency signals into a plurality of antenna ports (102).

11. Antenna package (100) according to one of claims 1 to 10, wherein

the chip (103) is manufactured in the GaAs material system.

12. Method (700) of manufacturing an antenna package (100), the method comprising the steps of:

providing (701) an antenna (101) with an embedded antenna port (102), the antenna (101) including an antenna port side and an antenna radiation side,

providing (702) a semiconductor chip (103) on the antenna port side,

configuring (703) the chip (103) with coupling elements for coupling radio frequency signals from a top side of the chip (103) to the antenna port (102) by:

providing (7031) a matching network including a high-impedance microstrip line (104) and a ground window (105) on the top side of the chip (103),

creating (7032) a resonant dielectric cavity (106) within the chip (103), and providing (7033) a metal coupling slot (107) facing the antenna port (102) on a bottom side of the chip (103).