WO2018000771A1 - 一种晶闸管擎住电流自动检测装置 - Google Patents

一种晶闸管擎住电流自动检测装置 Download PDF

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WO2018000771A1
WO2018000771A1 PCT/CN2016/111519 CN2016111519W WO2018000771A1 WO 2018000771 A1 WO2018000771 A1 WO 2018000771A1 CN 2016111519 W CN2016111519 W CN 2016111519W WO 2018000771 A1 WO2018000771 A1 WO 2018000771A1
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thyristor
power source
current
bipolar transistor
gate bipolar
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PCT/CN2016/111519
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French (fr)
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梁宁
国建宝
唐金昆
彭茂兰
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中国南方电网有限责任公司超高压输电公司检修试验中心
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Publication of WO2018000771A1 publication Critical patent/WO2018000771A1/zh

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices

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  • the invention relates to a high voltage direct current transmission system, in particular to an automatic detection device for holding current of a thyristor for a high voltage direct current transmission system.
  • the thyristor used in the HVDC transmission system needs to test the holding current of the thyristor after using it for a period of time or before replacing the standby thyristor to check whether the value meets the engineering requirements.
  • the thyristor holding current is the minimum main current required to maintain the on-state after the thyristor switches from the off state to the on state and removes the trigger signal.
  • FIG. 1 the commonly used test circuit is shown in FIG. 1 , which includes a power source E, a switch S, a sliding varistor R1, a resistor R2, an inductor L1, a thyristor T, a resistor R3, a resistor R4, and a voltmeter, wherein the anode of the power source E is sequentially switched.
  • This kind of test method requires manual adjustment of the sliding varistor R1, which takes a long time, especially in the case of a large number of test thyristors, which takes a lot of time.
  • the manual adjustment of the variable resistor is due to human factors, and the adjustment accuracy is not high.
  • the present invention provides an automatic thyristor current monitoring device capable of increasing the test current in a small step size, and automatically stopping the regulation current and maintaining the current value when the thyristor holding current value is reached.
  • a thyristor holding current automatic detecting device comprises a step-down chopper circuit and a thyristor wiring circuit, wherein the step-down chopper circuit comprises a power source Vin, an auxiliary power source Vcc, a PWM controller, a signal amplifying circuit, and an insulated gate bipolar type a transistor, a diode D and an inductor L, the thyristor wiring circuit includes a thyristor T and a gate driving power supply B thereof, a resistor R p , a current relay KA, and an ammeter; wherein the auxiliary power source Vcc is sequentially passed through a PWM controller and a signal amplifying circuit Connected to the gate of the insulated gate bipolar transistor, a normally open auxiliary contact K corresponding to the current relay KA is connected between the auxiliary power source Vcc and the PWM controller, and the anode of the power source Vin is connected to the insulated gate bipolar
  • the step-down chopper circuit further includes a capacitor C.
  • One end of the capacitor C is connected between the inductor L and the resistor R p , and the other end is connected to the cathode of the power source Vin.
  • An overcurrent protection fuse FU is connected between the positive electrode of the power source Vin and the collector of the insulated gate bipolar transistor.
  • the thyristor T transitions from the off state to the on state, and the current relay KA operates to give the PWM controller an output voltage signal; if the holding current value is not reached and the thyristor trigger signal is removed, the thyristor T is switched from the on state to the off state. State, current relay KA returns, and the PWM controller increases the output voltage value.
  • the output voltage V o is adjusted by controlling the duty cycle of the PWM modulated wave.
  • the present invention has the following advantages:
  • test accuracy can be adjusted according to the duty cycle increase value.
  • FIG. 1 is a schematic diagram of a conventional thyristor holding current monitoring circuit
  • Figure 2 is a waveform diagram of the holding current
  • FIG. 3 is a circuit schematic diagram of the thyristor holding current automatic detecting device of the present invention.
  • FIG. 4 is an operational waveform diagram of the step-down chopper circuit of FIG. 3.
  • a thyristor holding current automatic detecting device includes a step-down chopper circuit and a thyristor wiring circuit
  • the step-down chopper circuit includes a power source Vin, an auxiliary power source Vcc, a PWM controller, a signal amplifying circuit, Insulated gate bipolar transistor (IGBT), diode D, inductor L and capacitor C
  • the thyristor wiring circuit includes thyristor T and its gate drive power supply B, resistor R p , current relay KA, ammeter; wherein the auxiliary power supply Vcc is sequentially
  • the PWM controller and the signal amplifying circuit are connected to the gate of the insulated gate bipolar transistor, and a normally open auxiliary contact K corresponding to the current relay KA is connected between the auxiliary power source Vcc and the PWM controller, and the positive connection of the power source Vin is connected.
  • an overcurrent protection fuse FU is connected between the positive pole of the power source Vin and the collector of the insulated gate bipolar transistor, and the emitter of the insulated gate bipolar transistor is sequentially passed through the inductor L and resistor R p is connected to the anode of the thyristor T, T grounded cathode of the thyristor, the thyristor T to the gate terminal connected to the output of the gate drive power supply B, D is connected to the cathode of the diode Between the emitter and the inductance L of the edge gate bipolar transistor, the cathode of the diode D is connected to the negative power source Vin, and one end of the capacitor C is connected between the inductance L and resistance R p, and the other end connected to the negative power supply Vin
  • the current relay KA and the current meter are connected in series to the cathode of the power source Vin and the cathode of the thyristor T, respectively.
  • the step-down chopper circuit provides an automatically adjustable DC voltage for the test circuit.
  • the operating principle is divided into two phases according to the turn-on and turn-off of the IGBT:
  • is the duty ratio, and its range is 0 ⁇ ⁇ ⁇ 1, which can be adjusted by adjusting the turn-on time of the IGBT in one period T, and the output voltage range is 0 ⁇ U o ⁇ V in .
  • the driving circuit of the IGBT can output a PWM wave through a signal amplifying circuit through a digital arithmetic chip such as a PWM controller.
  • the fuse FU is blown when the test current is too large due to a fault, and functions to protect the test circuit components.
  • the current value of the current relay KA is generally set to be very low. As long as a current flows, the current relay KA operates to close the normally open auxiliary contact K, giving the PWM controller a pause boost signal, that is, the thyristor T is given During the trigger signal, the output voltage V o remains unchanged.
  • the holding current test process of this design scheme is as follows:
  • the control chip outputs the voltage V o1 with a small duty ratio ⁇ 1 , at which time a trigger pulse is applied to the thyristor T to turn on the thyristor T.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Electric Properties And Detecting Electric Faults (AREA)
  • Power Conversion In General (AREA)

Abstract

一种晶闸管擎住电流自动检测装置,其包括降压斩波电路和晶闸管接线电路,该降压斩波电路包括电源(Vin)、辅助电源(Vcc)、PWM控制器、信号放大电路、绝缘栅双极型晶体管(IGBT)、二极管(D)和电感(L),该晶闸管接线电路包括晶闸管(T)及其门极驱动电源(B)、电阻(R p)、电流继电器(KA)、电流表(A)。该装置能够以较小的步长提高测试电流,在达到晶闸管擎住电流值时,能够自动停止调节电流并保持该电流值。

Description

一种晶闸管擎住电流自动检测装置 技术领域
本发明涉及高压直流输电系统,具体涉及一种高压直流输电系统用晶闸管的擎住电流自动检测装置。
背景技术
高压直流输电系统使用的晶闸管在使用一段时间后或更换备用晶闸管前都需对晶闸管的擎住电流进行测试,检验其值是否满足工程要求。晶闸管擎住电流是晶闸管从断态转入通态,并移除触发信号后,能维持通态所需的最小主电流。目前常用的测试电路如图1所示,其包括电源E、开关S、滑动变阻器R1、电阻R2、电感L1、晶闸管T、电阻R3、电阻R4和电压表,其中,电源E的正极依次经开关S、滑动变阻器R1、电阻R2和电感L1连接至晶闸管T的阳极,电源E的负极经电阻R4连接于晶闸管T的阴极,电压表并接于电阻R4上,晶闸管T的门极连接一门极驱动电源B的输出端,电阻R3的两端分别连接于晶闸管T的门极和阴极。滑动变阻器R1在最大值下,闭合开关S时,晶闸管T不连续导通。逐渐减小R1,使主电流上升,直到每个触发脉冲结束时不降落,在此点上的电流即为擎住电流值,见图2。
该种测试方法需要手动不断调节滑动变阻器R1,耗费时间较长,特别是在测试晶闸管数量较多的情况下,需要耗费大量时间。另外,手动调节可变电阻由于人为因素存在,调节精度不高。
发明内容
为了解决上述问题,本发明提供一种晶闸管擎住电流自动检测装置,能够以较小的步长提高测试电流,在达到晶闸管擎住电流值时,能够自动停止调节电流并保持该电流值。
为实现上述目的,本发明采取的技术方案是:
一种晶闸管擎住电流自动检测装置,其包括降压斩波电路和晶闸管接线电路,所述降压斩波电路包括电源Vin、辅助电源Vcc、PWM控制器、信号放大 电路、绝缘栅双极型晶体管、二极管D和电感L,所述晶闸管接线电路包括晶闸管T及其门极驱动电源B、电阻Rp、电流继电器KA、电流表;其中,所述辅助电源Vcc依次经PWM控制器和信号放大电路连接至绝缘栅双极型晶体管的栅极,在辅助电源Vcc和PWM控制器之间还连接一与所述电流继电器KA对应的常开辅助触点K,电源Vin的正极连接于绝缘栅双极型晶体管的集电极,所述绝缘栅双极型晶体管的发射极依次经电感L和电阻Rp连接于晶闸管T的阳极,晶闸管T的阴极接地,所述晶闸管T的门极连接于门极驱动电源B的输出端,所述二极管D的负极连接于绝缘栅双极型晶体管的发射极和电感L之间,该二极管D的正极连接于电源Vin的负极;所述电流继电器KA、电流表串联后的两端分别连接于电源Vin的负极和晶闸管T的阴极。
所述降压斩波电路进一步包括一电容C,所述电容C的一端连接于电感L和电阻Rp之间,另一端连接于电源Vin的负极。
在电源Vin的正极与绝缘栅双极型晶体管的集电极之间连接一过流保护用熔丝FU。
晶闸管擎住电流自动检测装置的工作原理:
(1)晶闸管T从断态转入通态,电流继电器KA动作,给与PWM控制器保持输出电压信号;若未达到擎住电流值并移除晶闸管触发信号,晶闸管T从通态转入断态,电流继电器KA返回,PWM控制器提高输出电压值。
(2)晶闸管T从断态转入通态,电流继电器KA动作,给与PWM控制器保持输出电压信号;若达到擎住电流值,移除晶闸管触发信号,晶闸管仍保持通态,电流继电器KA保持,PWM控制器保持输出电压值。
(3)利用斩波电路作为可控电压源,通过控制PWM调制波的占空比来实现输出电压Vo调节。
与现有技术相比,本发明具有以下优点:
(1)实现晶闸管擎住电流值自动且快速测试;
(2)测试精度可根据占空比增加值进行调节。
附图说明
图1为现有晶闸管擎住电流监测电路的原理图;
图2为擎住电流的波形图;
图3是本发明晶闸管擎住电流自动检测装置的电路原理图;
图4为图3中降压斩波电路的工作波形图。
具体实施方式
下面结合附图和具体实施方式对本发明的内容做进一步详细说明。
实施例
请参照图3所示,一种晶闸管擎住电流自动检测装置,其包括降压斩波电路和晶闸管接线电路,降压斩波电路包括电源Vin、辅助电源Vcc、PWM控制器、信号放大电路、绝缘栅双极型晶体管(IGBT)、二极管D、电感L和电容C,晶闸管接线电路包括晶闸管T及其门极驱动电源B、电阻Rp、电流继电器KA、电流表;其中,辅助电源Vcc依次经PWM控制器和信号放大电路连接至绝缘栅双极型晶体管的栅极,在辅助电源Vcc和PWM控制器之间还连接一与电流继电器KA对应的常开辅助触点K,电源Vin的正极连接于绝缘栅双极型晶体管的集电极,在电源Vin的正极与绝缘栅双极型晶体管的集电极之间连接一过流保护用熔丝FU,绝缘栅双极型晶体管的发射极依次经电感L和电阻Rp连接于晶闸管T的阳极,晶闸管T的阴极接地,晶闸管T的门极连接于门极驱动电源B的输出端,二极管D的负极连接于绝缘栅双极型晶体管的发射极和电感L之间,该二极管D的正极连接于电源Vin的负极,电容C的一端连接于电感L和电阻Rp之间,另一端连接于电源Vin的负极;电流继电器KA、电流表串联后的两端分别连接于电源Vin的负极和晶闸管T的阴极。
降压斩波电路为测试电路提供可自动调节的直流电压,其工作原理根据IGBT的开通和关断分为两个阶段:
(1)t=ton,即IGBT导通时,电源Vin向负载供电,输出电压Vo=Vin,电流i上升;
(2)t=toff,即IGBT关断时,Vo近似为零,电流i经过续流二极管D流通。
电流连续时,负载电压平均值Vo=Vin*ton/(ton+toff)=Vin*ton/T=α*Vin,如附图4所示。
流过晶闸管T的电流iT=Uo/Rp=α*Vin/Rp
α为占空比,其范围为0≤α≤1,即可通过调节IGBT在一个周期T内的开通时间,调节输出电压范围为0≤Uo≤Vin。IGBT的驱动电路可通过数字运算芯片如PWM控制器经由信号放大电路来输出PWM波。
熔丝FU在因故障使得测试电流过大时熔断,起到保护测试电路元件作用。
电流继电器KA的电流值一般设置得很低,只要有电流流过,电流继电器KA动作,闭合常开辅助触点K,给与PWM控制器一个暂停升压信号,即在被测晶闸管T被给予触发信号期间,输出电压Vo电压保持不变。
本设计方案的擎住电流测试过程如下:
(1)测试开始时,控制芯片以一个较小的占空比α1输出电压Vo1,此时给与晶闸管T一个触发脉冲,使得晶闸管T导通。
(2)在未达到晶闸管T擎住电流值时,流过晶闸管T的电流iT将只持续一个触发脉冲的时间tp,如图2所示。在tp时间内,由于电流继电器KA动作电流很低,电流继电器KA动作,其常开辅助触点K闭合,给与PWM控制器一个信号,保持占空比α。在晶闸管触发脉冲消失后,流过晶闸管T的电流iT降为零,KA返回,K跳开。接着PWM控制器以α2=α1+△α的占空比输出电压Vo2,其中Vo2=V01+△V,即增加流过晶闸管T的电流iT的值。
(3)在未达到擎住电流值时,测试电路将一直重复步骤(2)
(4)在Von=V0(n-1)+△V,即流过晶闸管T的电流iT达到擎住电流值时,即使晶闸管触发脉冲消失,流过晶闸管T的电流iT仍然能继续保持。此时电流继电器KA将继续保持,常开辅助触点K保持闭合状态,PWM控制器保持输出Von=V0(n-1)+△V的电压。
上列详细说明是针对本发明可行实施例的具体说明,该实施例并非用以限制本发明的专利范围,凡未脱离本发明所为的等效实施或变更,均应包含于本案的专利范围中。

Claims (3)

  1. 一种晶闸管擎住电流自动检测装置,其特征在于,其包括降压斩波电路和晶闸管接线电路,所述降压斩波电路包括电源Vin、辅助电源Vcc、PWM控制器、信号放大电路、绝缘栅双极型晶体管、二极管D和电感L,所述晶闸管接线电路包括晶闸管T及其门极驱动电源B、电阻Rp、电流继电器KA、电流表;其中,所述辅助电源Vcc依次经PWM控制器和信号放大电路连接至绝缘栅双极型晶体管的栅极,在辅助电源Vcc和PWM控制器之间还连接一与所述电流继电器KA对应的常开辅助触点K,电源Vin的正极连接于绝缘栅双极型晶体管的集电极,所述绝缘栅双极型晶体管的发射极依次经电感L和电阻Rp连接于晶闸管T的阳极,晶闸管T的阴极接地,所述晶闸管T的门极连接于门极驱动电源B的输出端,所述二极管D的负极连接于绝缘栅双极型晶体管的发射极和电感L之间,该二极管D的正极连接于电源Vin的负极;所述电流继电器KA、电流表串联后的两端分别连接于电源Vin的负极和晶闸管T的阴极。
  2. 根据权利要求1所述的晶闸管擎住电流自动检测装置,其特征在于,所述降压斩波电路进一步包括一电容C,所述电容C的一端连接于电感L和电阻Rp之间,另一端连接于电源Vin的负极。
  3. 根据权利要求1或2所述的晶闸管擎住电流自动检测装置,其特征在于,在电源Vin的正极与绝缘栅双极型晶体管的集电极之间连接一过流保护用熔丝FU。
PCT/CN2016/111519 2016-06-28 2016-12-22 一种晶闸管擎住电流自动检测装置 WO2018000771A1 (zh)

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JPS58189566A (ja) * 1982-04-28 1983-11-05 Nec Home Electronics Ltd サイリスタの特性測定方法
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