WO2017208328A1 - High-frequency amplifier - Google Patents

High-frequency amplifier Download PDF

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Publication number
WO2017208328A1
WO2017208328A1 PCT/JP2016/065980 JP2016065980W WO2017208328A1 WO 2017208328 A1 WO2017208328 A1 WO 2017208328A1 JP 2016065980 W JP2016065980 W JP 2016065980W WO 2017208328 A1 WO2017208328 A1 WO 2017208328A1
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electrode
harmonic
frequency amplifier
fet
frequency signal
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PCT/JP2016/065980
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French (fr)
Japanese (ja)
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純 神岡
政毅 半谷
山中 宏治
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三菱電機株式会社
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Priority to PCT/JP2016/065980 priority Critical patent/WO2017208328A1/en
Priority to JP2016568713A priority patent/JP6289678B1/en
Publication of WO2017208328A1 publication Critical patent/WO2017208328A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/193High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices

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  • This invention relates to a high frequency amplifier for amplifying a high frequency signal.
  • a high-frequency amplifier that amplifies a high-frequency signal is mounted on a wireless communication device, a radar device, or the like.
  • Some high-frequency amplifiers use, for example, field-effect transistors (FETs) with a common source.
  • FETs field-effect transistors
  • Non-Patent Document 1 discloses a high-frequency amplifier that short-circuits the reflection phase of the second harmonic by providing a second harmonic processing circuit including a tip release stub.
  • the conventional high-frequency amplifier is configured as described above, high efficiency can be achieved by providing a second harmonic processing circuit including a tip release stub.
  • the second harmonic processing circuit including the tip release stub is large in size, it is difficult to be integrated in the immediate vicinity of the transistor, and it is necessary to connect to the transistor via a lead-out transmission line or a bonding wire. is there. As a result, there is a problem that the circuit is increased in size.
  • the lead-out transmission line and the bonding wire have an inductance component, there is a problem that a frequency band in which high-efficiency operation can be expected is narrowed.
  • the present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a high-frequency amplifier capable of reducing the size of a circuit and expanding a frequency band in which high-efficiency operation can be expected. .
  • a high-frequency amplifier includes a transistor that amplifies a high-frequency signal input from an input electrode and outputs an amplified high-frequency signal from an output electrode, and a resonance circuit that resonates with a second harmonic of the high-frequency signal,
  • a resonant circuit is disposed between the upper electrode and the lower electrode, one upper electrode connected to the transistor input electrode and having two or more bent portions, the lower electrode grounded at one end And having a dielectric.
  • a resonant circuit that resonates with a second harmonic of a high-frequency signal has one end connected to the input electrode of the transistor, the upper electrode having two or more bent portions, and one end grounded. Since it is configured to have a base electrode and a dielectric disposed between the top electrode and the base electrode, it is possible to reduce the size of the circuit and to provide a frequency band that allows high-efficiency operation. There is an effect that can be spread.
  • FIG. 1 is a configuration diagram showing a high-frequency amplifier according to Embodiment 1 of the present invention.
  • FIG. 2 is a cross-sectional view taken along line A-A ′ of a second harmonic processing circuit 8 in the high frequency amplifier of FIG. 1. It is a perspective view which shows the upper electrode 9 and the lower electrode 10 of the high frequency amplifier by Embodiment 2 of this invention. It is a block diagram which shows the high frequency amplifier by Embodiment 3 of this invention. It is a block diagram which shows the high frequency amplifier by Embodiment 4 of this invention.
  • FIG. 1 is a block diagram showing a high frequency amplifier according to Embodiment 1 of the present invention
  • FIG. 2 is a cross-sectional view taken along line AA ′ of a second harmonic processing circuit 8 in the high frequency amplifier of FIG. 1 and 2
  • FET 1 is a transistor that amplifies a high-frequency signal input from an input electrode and outputs an amplified high-frequency signal from an output electrode.
  • the FET 1 is a grounded field effect transistor, and the FET 1 has a gate electrode 2 as an input electrode and a drain electrode 4 as an output electrode.
  • the source electrode 3 of the FET 1 is grounded via via holes 7a and 7b.
  • the FET 1 is not limited to a source grounded field effect transistor, and may be, for example, a drain grounded field effect transistor.
  • the bonding pad 5 a is a pad for inputting a high-frequency signal, and is connected to the gate electrode 2 of the FET 1 through the transmission line 6.
  • the bonding pad 5b is a pad for outputting a high frequency signal, and is connected to the drain electrode 4 of the FET1.
  • the transmission line 6 is a line connecting the bonding pad 5 a and the gate electrode 2 of the FET 1, and transmits a high-frequency signal input from the bonding pad 5 a to the gate electrode 2 of the FET 1.
  • the via holes 7a and 7b are composed of a hole connecting the front surface and the back surface of the substrate, and pads provided around the upper end of the hole. Pads provided around the upper ends of the via holes 7a and 7b are connected to the source electrode 3 of the FET 1, and the lower ends of the via holes 7a and 7b are connected to the ground applied to the back surface of the substrate. In addition, a hole middle portion in the via hole 7 a is connected to the base electrode 10.
  • the second harmonic processing circuit 8 is a resonance circuit that resonates with a second harmonic of a high frequency signal.
  • the second harmonic processing circuit 8 includes a MIM (Metal Insulator Metal) capacitor, and the MIM capacitor includes an upper electrode 9, a lower electrode 10, and a dielectric 11.
  • One end of the upper electrode 9 is connected to the gate electrode 2 of the FET 1 via the transmission line 6 and has a meander shape. That is, the upper electrode 9 has a shape having two or more bent portions 9a. In the example of FIG. 1, it has seven bending parts 9a. Since the upper electrode 9 has a meander shape, it has a large inductance component.
  • One end of the base electrode 10 is grounded via the via hole 7 a, and the base electrode 10 is disposed below the upper electrode 9.
  • a dielectric 11 is disposed between the upper electrode 9 and the lower electrode 10.
  • silicon nitride can be used as the dielectric 11.
  • a high-frequency signal input from the bonding pad 5 a is input to the gate electrode 2 of the FET 1 through the transmission line 6.
  • the high frequency signal input from the gate electrode 2 is amplified by the FET 1, and the high frequency signal amplified by the FET 1 is output from the drain electrode 4 of the FET 1 to the bonding pad 5b.
  • a second harmonic processing circuit 8 which is a series resonance circuit that resonates with a second harmonic of a high frequency signal is formed by the inductance components of the upper electrode 9, the lower electrode 10, and the via hole 7a and the capacitance component of the MIM capacitor. ing.
  • the second harmonic processing circuit 8 is disposed in the immediate vicinity of the gate electrode 2 of the FET 1, and the upper electrode 9 is shunt-connected to the transmission line 6. For this reason, the impedance at the second harmonic of the high-frequency signal looking into the input side from the gate electrode 2 of the FET 1 is short-circuited, and a highly efficient high-frequency amplifier is realized.
  • the second harmonic processing circuit 8 since the upper electrode 9 having a large inductance component and the MIM capacitor having a large capacitance component are integrated, a second harmonic processing circuit including a tip release stub, a transmission line, and an MIM capacitor are provided. Compared to a series resonant circuit connecting the two, a small resonant circuit can be realized.
  • the resonance circuit that resonates with the second harmonic of the high-frequency signal has one end connected to the gate electrode 2 of the FET 1 and has two or more bent portions 9a.
  • the upper electrode 9 is grounded, the ground electrode 10 is grounded at one end, and the dielectric 11 is disposed between the ground electrode 9 and the ground electrode 10.
  • the parasitic reactance of the transmission line 6 and the FET 1 can be ignored.
  • the resonance frequency of the second harmonic processing circuit 8 is high.
  • the base electrode 10 has a plate shape and only the upper electrode 9 has a meander shape. However, in the second embodiment, the base electrode 10 also has a top shape. Similar to the electrode 9, a meander-shaped one will be described.
  • FIG. 3 is a perspective view showing the upper electrode 9 and the lower electrode 10 of the high-frequency amplifier according to Embodiment 2 of the present invention.
  • the base electrode 10 has a meander shape. That is, the base electrode 10 has a shape having two or more bent portions 10a.
  • the dielectric 11 is not drawn for simplification of the drawing, but the dielectric 11 is disposed between the upper electrode 9 and the lower electrode 10.
  • the base electrode 10 since the base electrode 10 has a shape having two or more bent portions 10a, the inductance component is larger than that of the first embodiment. For this reason, when obtaining a series resonance circuit having the same resonance frequency, there is an effect that the size can be reduced as compared with the first embodiment.
  • Embodiment 3 FIG.
  • one double harmonic processing circuit 8 is disposed between the transmission line 6 and the via hole 7a.
  • two second harmonic processing circuits 8 are disposed. It may be a high frequency amplifier.
  • the second harmonic processing circuit 8a is a second harmonic processing circuit similar to the second harmonic processing circuit 8 in the first embodiment, and includes an upper electrode 9 having one end connected to the gate electrode 2 of the FET 1, and one end Has a base electrode 10 grounded through a via hole 7a, and an upper electrode 9 and a dielectric 11 disposed between the base electrode 10.
  • the second harmonic processing circuit 8b is a second harmonic processing circuit similar to the second harmonic processing circuit 8a, but one end of the base electrode 10 in the second harmonic processing circuit 8b is grounded via a via hole 7b.
  • the base electrode 10 in the second harmonic processing circuits 8a and 8b may have a meander shape as in the second embodiment.
  • the reflection coefficient in the impedance at the second harmonic of the high frequency signal is the above-described first embodiment.
  • 2 is closer to 1, so that it is less affected by the input side circuit, and a more efficient high-frequency amplifier is realized.
  • the upper electrode 9 has a meander shape. However, the upper electrode 9 only needs to have a shape having two or more bent portions 9a. 9 may be shaped like a spiral inductor.
  • FIG. 5 is a block diagram showing a high-frequency amplifier according to Embodiment 4 of the present invention.
  • the upper electrode 9 has a shape like a spiral inductor.
  • the underlying electrode 10 may also be shaped like a spiral inductor. Even in a shape like a spiral inductor, the inductance component becomes large as in the meander shape.
  • the transistor is the FET 1
  • the present invention is not limited to this.
  • the transistor may be a bipolar transistor.
  • the present invention is suitable for a high-frequency amplifier that amplifies a high-frequency signal.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)
  • Microwave Amplifiers (AREA)

Abstract

A high-frequency amplifier is configured such that a second harmonic processing circuit (8) that is a resonant circuit that resonates at a second harmonic of a high-frequency signal includes: an overlying electrode (9) of which one end is connected to a gate electrode (2) of an FET (1) and which has two or more bend sections (9a); a underlying electrode (10) having one end that is grounded; and a dielectric member (11) arranged between the overlying electrode (9) and the underlying electrode (10). This makes it possible to reduce circuit size, and expand the frequency band in which a high-efficiency operation can be expected.

Description

高周波増幅器High frequency amplifier
 この発明は、高周波信号を増幅する高周波増幅器に関するものである。 This invention relates to a high frequency amplifier for amplifying a high frequency signal.
 例えば、無線通信装置やレーダ装置などには、高周波信号を増幅する高周波増幅器が実装される。
 高周波増幅器は、例えば、ソース接地の電界効果トランジスタ(FET:Field Effect Transistor)を用いているものがある。
For example, a high-frequency amplifier that amplifies a high-frequency signal is mounted on a wireless communication device, a radar device, or the like.
Some high-frequency amplifiers use, for example, field-effect transistors (FETs) with a common source.
 高周波増幅器は、高効率な特性が求められる。高周波増幅器の高効率化を図るために、ゲート電極から入力側の整合回路を見込んだ2倍波の反射位相をショートにするという方法が知られている。
 以下の非特許文献1には、先端解放スタブを含む2倍波処理回路を設けることで、2倍波の反射位相をショートしている高周波増幅器が開示されている。
High frequency amplifiers are required to have high efficiency characteristics. In order to increase the efficiency of the high-frequency amplifier, a method of short-circuiting the reflection phase of the second harmonic wave from the gate electrode in anticipation of the matching circuit on the input side is known.
Non-Patent Document 1 below discloses a high-frequency amplifier that short-circuits the reflection phase of the second harmonic by providing a second harmonic processing circuit including a tip release stub.
 従来の高周波増幅器は以上のように構成されているので、先端解放スタブを含む2倍波処理回路を設ければ、高効率化を図ることができる。しかし、先端解放スタブを含む2倍波処理回路は、回路サイズが大きいため、トランジスタの直近に集積化することが困難であり、引き出し用伝送線路又はボンディングワイヤを介して、トランジスタと接続する必要がある。その結果、回路の大型化を招いてしまうという課題があった。
 また、引き出し用伝送線路やボンディングワイヤには、インダクタンス成分があるため、高効率動作を見込める周波数帯域が狭くなってしまうという課題があった。
Since the conventional high-frequency amplifier is configured as described above, high efficiency can be achieved by providing a second harmonic processing circuit including a tip release stub. However, since the second harmonic processing circuit including the tip release stub is large in size, it is difficult to be integrated in the immediate vicinity of the transistor, and it is necessary to connect to the transistor via a lead-out transmission line or a bonding wire. is there. As a result, there is a problem that the circuit is increased in size.
In addition, since the lead-out transmission line and the bonding wire have an inductance component, there is a problem that a frequency band in which high-efficiency operation can be expected is narrowed.
 この発明は上記のような課題を解決するためになされたもので、回路の小型化を図ることができるとともに、高効率動作を見込める周波数帯域を広げることができる高周波増幅器を得ることを目的とする。 The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a high-frequency amplifier capable of reducing the size of a circuit and expanding a frequency band in which high-efficiency operation can be expected. .
 この発明に係る高周波増幅器は、入力電極から入力された高周波信号を増幅し、出力電極から増幅後の高周波信号を出力するトランジスタと、その高周波信号の2倍波で共振する共振回路とを備え、共振回路が、一端がトランジスタの入力電極と接続され、2以上の曲げ部を有している上地電極と、一端が接地されている下地電極と、上地電極と下地電極の間に配置されている誘電体とを有しているものである。 A high-frequency amplifier according to the present invention includes a transistor that amplifies a high-frequency signal input from an input electrode and outputs an amplified high-frequency signal from an output electrode, and a resonance circuit that resonates with a second harmonic of the high-frequency signal, A resonant circuit is disposed between the upper electrode and the lower electrode, one upper electrode connected to the transistor input electrode and having two or more bent portions, the lower electrode grounded at one end And having a dielectric.
 この発明によれば、高周波信号の2倍波で共振する共振回路が、一端がトランジスタの入力電極と接続され、2以上の曲げ部を有している上地電極と、一端が接地されている下地電極と、上地電極と下地電極の間に配置されている誘電体とを有しているように構成したので、回路の小型化を図ることができるとともに、高効率動作を見込める周波数帯域を広げることができる効果がある。 According to this invention, a resonant circuit that resonates with a second harmonic of a high-frequency signal has one end connected to the input electrode of the transistor, the upper electrode having two or more bent portions, and one end grounded. Since it is configured to have a base electrode and a dielectric disposed between the top electrode and the base electrode, it is possible to reduce the size of the circuit and to provide a frequency band that allows high-efficiency operation. There is an effect that can be spread.
この発明の実施の形態1による高周波増幅器を示す構成図である。1 is a configuration diagram showing a high-frequency amplifier according to Embodiment 1 of the present invention. 図1の高周波増幅器における2倍波処理回路8のA-A’断面図である。FIG. 2 is a cross-sectional view taken along line A-A ′ of a second harmonic processing circuit 8 in the high frequency amplifier of FIG. 1. この発明の実施の形態2による高周波増幅器の上地電極9及び下地電極10を示す斜視図である。It is a perspective view which shows the upper electrode 9 and the lower electrode 10 of the high frequency amplifier by Embodiment 2 of this invention. この発明の実施の形態3による高周波増幅器を示す構成図である。It is a block diagram which shows the high frequency amplifier by Embodiment 3 of this invention. この発明の実施の形態4による高周波増幅器を示す構成図である。It is a block diagram which shows the high frequency amplifier by Embodiment 4 of this invention.
 以下、この発明をより詳細に説明するために、この発明を実施するための形態について、添付の図面にしたがって説明する。 Hereinafter, in order to explain the present invention in more detail, modes for carrying out the present invention will be described with reference to the accompanying drawings.
実施の形態1.
 図1はこの発明の実施の形態1による高周波増幅器を示す構成図であり、図2は図1の高周波増幅器における2倍波処理回路8のA-A’断面図である。
 図1及び図2において、FET1は入力電極から入力された高周波信号を増幅し、出力電極から増幅後の高周波信号を出力するトランジスタである。
 この実施の形態1では、FET1がソース接地の電界効果トランジスタであるものを想定しており、FET1は、入力電極としてゲート電極2を有し、出力電極としてドレイン電極4を有している。また、FET1のソース電極3はビアホール7a,7bを介して接地されている。
Embodiment 1 FIG.
FIG. 1 is a block diagram showing a high frequency amplifier according to Embodiment 1 of the present invention, and FIG. 2 is a cross-sectional view taken along line AA ′ of a second harmonic processing circuit 8 in the high frequency amplifier of FIG.
1 and 2, FET 1 is a transistor that amplifies a high-frequency signal input from an input electrode and outputs an amplified high-frequency signal from an output electrode.
In the first embodiment, it is assumed that the FET 1 is a grounded field effect transistor, and the FET 1 has a gate electrode 2 as an input electrode and a drain electrode 4 as an output electrode. The source electrode 3 of the FET 1 is grounded via via holes 7a and 7b.
 ただし、FET1は、ソース接地の電界効果トランジスタに限るものではなく、例えば、ドレイン接地の電界効果トランジスタであってもよい。
 ボンディングパッド5aは高周波信号を入力するためのパッドであり、伝送線路6を介して、FET1のゲート電極2と接続されている。
 ボンディングパッド5bは高周波信号を出力するためのパッドであり、FET1のドレイン電極4と接続されている。
 伝送線路6はボンディングパッド5aとFET1のゲート電極2との間を結んでいる線路であり、ボンディングパッド5aから入力された高周波信号をFET1のゲート電極2まで伝送する。
 ビアホール7a,7bは基板の表面と裏面を繋ぐホールと、ホール上端の周囲に設けられているパッドとから構成されている。ビアホール7a,7bにおけるホール上端の周囲に設けられているパッドがFET1のソース電極3と接続され、ビアホール7a,7bにおけるホール下端が基板の裏面に施されているグランドと接続されている。また、ビアホール7aにおけるホール中間部分が下地電極10と接続されている。
However, the FET 1 is not limited to a source grounded field effect transistor, and may be, for example, a drain grounded field effect transistor.
The bonding pad 5 a is a pad for inputting a high-frequency signal, and is connected to the gate electrode 2 of the FET 1 through the transmission line 6.
The bonding pad 5b is a pad for outputting a high frequency signal, and is connected to the drain electrode 4 of the FET1.
The transmission line 6 is a line connecting the bonding pad 5 a and the gate electrode 2 of the FET 1, and transmits a high-frequency signal input from the bonding pad 5 a to the gate electrode 2 of the FET 1.
The via holes 7a and 7b are composed of a hole connecting the front surface and the back surface of the substrate, and pads provided around the upper end of the hole. Pads provided around the upper ends of the via holes 7a and 7b are connected to the source electrode 3 of the FET 1, and the lower ends of the via holes 7a and 7b are connected to the ground applied to the back surface of the substrate. In addition, a hole middle portion in the via hole 7 a is connected to the base electrode 10.
 2倍波処理回路8は高周波信号の2倍波で共振する共振回路である。
 2倍波処理回路8はMIM(Metal Insulator Metal)キャパシタを備えており、MIMキャパシタは、上地電極9、下地電極10及び誘電体11を備えている。
 上地電極9は一端が伝送線路6を介してFET1のゲート電極2と接続されており、メアンダ形状になっている。即ち、上地電極9は2以上の曲げ部9aを有する形状になっている。図1の例では、7つの曲げ部9aを有している。
 上地電極9はメアンダ形状になっているため、大きなインダクタンス成分を有している。
 下地電極10は一端がビアホール7aを介して接地されており、下地電極10は上地電極9の下側に配置されている。
 上地電極9と下地電極10の間には、誘電体11が配置されている。
 誘電体11としては、例えば、シリコンナイトライト(Silicon Nitride)などを用いることができる。
The second harmonic processing circuit 8 is a resonance circuit that resonates with a second harmonic of a high frequency signal.
The second harmonic processing circuit 8 includes a MIM (Metal Insulator Metal) capacitor, and the MIM capacitor includes an upper electrode 9, a lower electrode 10, and a dielectric 11.
One end of the upper electrode 9 is connected to the gate electrode 2 of the FET 1 via the transmission line 6 and has a meander shape. That is, the upper electrode 9 has a shape having two or more bent portions 9a. In the example of FIG. 1, it has seven bending parts 9a.
Since the upper electrode 9 has a meander shape, it has a large inductance component.
One end of the base electrode 10 is grounded via the via hole 7 a, and the base electrode 10 is disposed below the upper electrode 9.
A dielectric 11 is disposed between the upper electrode 9 and the lower electrode 10.
For example, silicon nitride can be used as the dielectric 11.
 次に動作について説明する。
 ボンディングパッド5aから入力された高周波信号は、伝送線路6を通じて、FET1のゲート電極2に入力される。
 ゲート電極2から入力された高周波信号は、FET1によって増幅され、FET1により増幅された高周波信号は、FET1のドレイン電極4からボンディングパッド5bに出力される。
Next, the operation will be described.
A high-frequency signal input from the bonding pad 5 a is input to the gate electrode 2 of the FET 1 through the transmission line 6.
The high frequency signal input from the gate electrode 2 is amplified by the FET 1, and the high frequency signal amplified by the FET 1 is output from the drain electrode 4 of the FET 1 to the bonding pad 5b.
 ここで、上地電極9、下地電極10及びビアホール7aのインダクタンス成分と、MIMキャパシタのキャパシタンス成分とによって、高周波信号の2倍波で共振する直列共振回路である2倍波処理回路8が作られている。
 2倍波処理回路8は、FET1のゲート電極2の直近に配置されており、上地電極9が伝送線路6とシャント接続されている。
 このため、FET1のゲート電極2から入力側を見込んだ高周波信号の2倍波でのインピーダンスがショートになり、高効率な高周波増幅器が実現される。
Here, a second harmonic processing circuit 8 which is a series resonance circuit that resonates with a second harmonic of a high frequency signal is formed by the inductance components of the upper electrode 9, the lower electrode 10, and the via hole 7a and the capacitance component of the MIM capacitor. ing.
The second harmonic processing circuit 8 is disposed in the immediate vicinity of the gate electrode 2 of the FET 1, and the upper electrode 9 is shunt-connected to the transmission line 6.
For this reason, the impedance at the second harmonic of the high-frequency signal looking into the input side from the gate electrode 2 of the FET 1 is short-circuited, and a highly efficient high-frequency amplifier is realized.
 2倍波処理回路8は、インダクタンス成分が大きい上地電極9と、キャパシタンス成分が大きいMIMキャパシタとが一体になっているので、先端解放スタブを含む2倍波処理回路や、伝送線路とMIMキャパシタを繋いでいる直列共振回路とに比べて、小型の共振回路を実現することができる。 In the second harmonic processing circuit 8, since the upper electrode 9 having a large inductance component and the MIM capacitor having a large capacitance component are integrated, a second harmonic processing circuit including a tip release stub, a transmission line, and an MIM capacitor are provided. Compared to a series resonant circuit connecting the two, a small resonant circuit can be realized.
 以上で明らかなように、この実施の形態1によれば、高周波信号の2倍波で共振する共振回路が、一端がFET1のゲート電極2と接続され、2以上の曲げ部9aを有している上地電極9と、一端が接地されている下地電極10と、上地電極9と下地電極10の間に配置されている誘電体11とを有しているように構成したので、回路の小型化を図ることができるとともに、高効率動作を見込める周波数帯域を広げることができる効果を奏する。 As apparent from the above, according to the first embodiment, the resonance circuit that resonates with the second harmonic of the high-frequency signal has one end connected to the gate electrode 2 of the FET 1 and has two or more bent portions 9a. The upper electrode 9 is grounded, the ground electrode 10 is grounded at one end, and the dielectric 11 is disposed between the ground electrode 9 and the ground electrode 10. There is an effect that the size can be reduced and the frequency band in which high-efficiency operation can be expected can be expanded.
 この実施の形態1では、伝送線路6及びFET1の寄生リアクタンスを無視できるものとしているが、伝送線路6及びFET1の寄生リアクタンスを無視することができない場合、2倍波処理回路8の共振周波数が高周波信号の2倍波からずれるように、2倍波処理回路8の諸元を選択することで、高周波信号の2倍波でのインピーダンスが、FET1のゲート端面でショートになるようにすれば、高効率な高周波増幅器が実現される。 In the first embodiment, the parasitic reactance of the transmission line 6 and the FET 1 can be ignored. However, when the parasitic reactance of the transmission line 6 and the FET 1 cannot be ignored, the resonance frequency of the second harmonic processing circuit 8 is high. By selecting the specifications of the second harmonic processing circuit 8 so as to deviate from the second harmonic of the signal, the impedance at the second harmonic of the high frequency signal is shorted at the gate end face of the FET 1. An efficient high frequency amplifier is realized.
実施の形態2.
 上記実施の形態1では、下地電極10が板状の形状で、上地電極9だけがメアンダ形状になっているものを示したが、この実施の形態2では、下地電極10についても、上地電極9と同様に、メアンダ形状になっているものを説明する。
Embodiment 2. FIG.
In the first embodiment, the base electrode 10 has a plate shape and only the upper electrode 9 has a meander shape. However, in the second embodiment, the base electrode 10 also has a top shape. Similar to the electrode 9, a meander-shaped one will be described.
 図3はこの発明の実施の形態2による高周波増幅器の上地電極9及び下地電極10を示す斜視図である。
 図3において、下地電極10はメアンダ形状になっている。即ち、下地電極10は2以上の曲げ部10aを有する形状になっている。
 図3では、図面の簡単化のため、誘電体11を描画していないが、上地電極9と下地電極10の間には、誘電体11が配置されている。
FIG. 3 is a perspective view showing the upper electrode 9 and the lower electrode 10 of the high-frequency amplifier according to Embodiment 2 of the present invention.
In FIG. 3, the base electrode 10 has a meander shape. That is, the base electrode 10 has a shape having two or more bent portions 10a.
In FIG. 3, the dielectric 11 is not drawn for simplification of the drawing, but the dielectric 11 is disposed between the upper electrode 9 and the lower electrode 10.
 以上で明らかなように、この実施の形態2によれば、下地電極10が2以上の曲げ部10aを有する形状になっているので、上記実施の形態1よりもインダクタンス成分が大きくなる。このため、同じ共振周波数の直列共振回路を得る場合には、上記実施の形態1よりも小型化を図ることができる効果を奏する。 As apparent from the above, according to the second embodiment, since the base electrode 10 has a shape having two or more bent portions 10a, the inductance component is larger than that of the first embodiment. For this reason, when obtaining a series resonance circuit having the same resonance frequency, there is an effect that the size can be reduced as compared with the first embodiment.
実施の形態3.
 上記実施の形態1,2では、1つの2倍波処理回路8が伝送線路6とビアホール7aの間に配置されているものを示したが、2つの2倍波処理回路8が配置されている高周波増幅器であってもよい。
Embodiment 3 FIG.
In the first and second embodiments, one double harmonic processing circuit 8 is disposed between the transmission line 6 and the via hole 7a. However, two second harmonic processing circuits 8 are disposed. It may be a high frequency amplifier.
 図4はこの発明の実施の形態3による高周波増幅器を示す構成図であり、図4において、図1と同一符号は同一または相当部分を示すので説明を省略する。
 2倍波処理回路8aは、上記実施の形態1における2倍波処理回路8と同様の2倍波処理回路であり、一端がFET1のゲート電極2と接続されている上地電極9と、一端がビアホール7aを介して接地されている下地電極10と、上地電極9と下地電極10の間に配置されている誘電体11とを有している。
 2倍波処理回路8bは、2倍波処理回路8aと同様の2倍波処理回路であるが、2倍波処理回路8bにおける下地電極10の一端はビアホール7bを介して接地されている。
 なお、2倍波処理回路8a,8bにおける下地電極10は、上記実施の形態2と同様に、メアンダ形状になっているものであってもよい。
4 is a block diagram showing a high frequency amplifier according to Embodiment 3 of the present invention. In FIG. 4, the same reference numerals as those in FIG.
The second harmonic processing circuit 8a is a second harmonic processing circuit similar to the second harmonic processing circuit 8 in the first embodiment, and includes an upper electrode 9 having one end connected to the gate electrode 2 of the FET 1, and one end Has a base electrode 10 grounded through a via hole 7a, and an upper electrode 9 and a dielectric 11 disposed between the base electrode 10.
The second harmonic processing circuit 8b is a second harmonic processing circuit similar to the second harmonic processing circuit 8a, but one end of the base electrode 10 in the second harmonic processing circuit 8b is grounded via a via hole 7b.
The base electrode 10 in the second harmonic processing circuits 8a and 8b may have a meander shape as in the second embodiment.
 ビアホール7a側に2倍波処理回路8aを装荷するとともに、ビアホール7b側に2倍波処理回路8bを装荷することで、高周波信号の2倍波でのインピーダンスにおける反射係数が、上記実施の形態1,2よりも1に近づくため、入力側回路の影響を受け難くなり、より高効率な高周波増幅器が実現される。 When the second harmonic processing circuit 8a is loaded on the via hole 7a side and the second harmonic processing circuit 8b is loaded on the via hole 7b side, the reflection coefficient in the impedance at the second harmonic of the high frequency signal is the above-described first embodiment. , 2 is closer to 1, so that it is less affected by the input side circuit, and a more efficient high-frequency amplifier is realized.
実施の形態4.
 上記実施の形態1~3では、上地電極9がメアンダ形状になっているものを示したが、上地電極9は2以上の曲げ部9aを有する形状であればよく、例えば、上地電極9はスパイラルインダクタのような形状であってもよい。
Embodiment 4 FIG.
In the first to third embodiments, the upper electrode 9 has a meander shape. However, the upper electrode 9 only needs to have a shape having two or more bent portions 9a. 9 may be shaped like a spiral inductor.
 図5はこの発明の実施の形態4による高周波増幅器を示す構成図であり、図5において、図1と同一符号は同一または相当部分を示すので説明を省略する。上地電極9は、スパイラルインダクタのような形状になっている。
 ここでは、上地電極9が、スパイラルインダクタのような形状になっている例を示しているが、下地電極10も、スパイラルインダクタのような形状になっていてもよい。
 スパイラルインダクタのような形状であっても、メアンダ形状である場合と同様に、インダクタンス成分が大きくなる。
FIG. 5 is a block diagram showing a high-frequency amplifier according to Embodiment 4 of the present invention. In FIG. 5, the same reference numerals as those in FIG. The upper electrode 9 has a shape like a spiral inductor.
Here, an example is shown in which the upper electrode 9 is shaped like a spiral inductor, but the underlying electrode 10 may also be shaped like a spiral inductor.
Even in a shape like a spiral inductor, the inductance component becomes large as in the meander shape.
 上記実施の形態1~4では、トランジスタがFET1である例を示したが、これに限るものではなく、例えば、トランジスタはバイポーラトランジスタであってもよい。 In the first to fourth embodiments, the example in which the transistor is the FET 1 is shown. However, the present invention is not limited to this. For example, the transistor may be a bipolar transistor.
 なお、本願発明はその発明の範囲内において、各実施の形態の自由な組み合わせ、あるいは各実施の形態の任意の構成要素の変形、もしくは各実施の形態において任意の構成要素の省略が可能である。 In the present invention, within the scope of the invention, any combination of the embodiments, or any modification of any component in each embodiment, or omission of any component in each embodiment is possible. .
 この発明は、高周波信号を増幅する高周波増幅器に適している。 The present invention is suitable for a high-frequency amplifier that amplifies a high-frequency signal.
 1 FET(トランジスタ)、2 ゲート電極(入力電極)、3 ソース電極、4 ドレイン電極(出力電極)、5a,5b ボンディングパッド、6 伝送線路、7a,7b ビアホール、8,8a,8b 2倍波処理回路(共振回路)、9 上地電極、9a 曲げ部、10 下地電極、10a 曲げ部、11 誘電体。 1 FET (transistor), 2 gate electrode (input electrode), 3 source electrode, 4 drain electrode (output electrode), 5a, 5b bonding pad, 6 transmission line, 7a, 7b via hole, 8, 8a, 8b double wave processing Circuit (resonant circuit), 9 upper electrode, 9a bent portion, 10 lower electrode, 10a bent portion, 11 dielectric.

Claims (3)

  1.  入力電極から入力された高周波信号を増幅し、出力電極から増幅後の高周波信号を出力するトランジスタと、
     前記高周波信号の2倍波で共振する共振回路とを備え、
     前記共振回路は、
     一端が前記トランジスタの入力電極と接続され、2以上の曲げ部を有している上地電極と、
     一端が接地されている下地電極と、
     前記上地電極と前記下地電極の間に配置されている誘電体とを有していることを特徴とする高周波増幅器。
    A transistor that amplifies the high-frequency signal input from the input electrode and outputs the amplified high-frequency signal from the output electrode;
    A resonance circuit that resonates at a second harmonic of the high-frequency signal,
    The resonant circuit is:
    An upper electrode having one end connected to the input electrode of the transistor and having two or more bent portions;
    A ground electrode having one end grounded;
    A high-frequency amplifier comprising: a dielectric disposed between the upper electrode and the lower electrode.
  2.  前記下地電極は、2以上の曲げ部を有していることを特徴とする請求項1記載の高周波増幅器。 The high-frequency amplifier according to claim 1, wherein the base electrode has two or more bent portions.
  3.  前記共振回路を2個備えていることを特徴とする請求項1記載の高周波増幅器。 2. The high-frequency amplifier according to claim 1, comprising two resonance circuits.
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