WO2017206772A1 - Light emitting diode with electrostatic protection function and manufacturing method therefor - Google Patents

Light emitting diode with electrostatic protection function and manufacturing method therefor Download PDF

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Publication number
WO2017206772A1
WO2017206772A1 PCT/CN2017/085659 CN2017085659W WO2017206772A1 WO 2017206772 A1 WO2017206772 A1 WO 2017206772A1 CN 2017085659 W CN2017085659 W CN 2017085659W WO 2017206772 A1 WO2017206772 A1 WO 2017206772A1
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layer
type
electrostatic protection
light
ohmic contact
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PCT/CN2017/085659
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French (fr)
Chinese (zh)
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吴超瑜
吴俊毅
王笃祥
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厦门三安光电有限公司
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Publication of WO2017206772A1 publication Critical patent/WO2017206772A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies

Definitions

  • the present invention relates to the field of semiconductor illumination, and more particularly to a light-emitting diode having an antistatic protection structure and a method of fabricating the same.
  • a light emitting diode is a semiconductor solid state light emitting device that utilizes a semiconductor PN junction as a light emitting material to directly convert electricity into light.
  • the forward and reverse current or voltage of the LED must pass through the illuminating layer. If the reverse voltage is applied too much, the chip may be broken down, causing the chip to fail.
  • Chinese Patent Publication No. CN102308397A discloses a light-emitting diode and a light-emitting diode lamp, which is provided with a third electrode at the bottom of the transparent substrate, and is configured to pass the n-type ohmic electrode and the third electrode through the assembly of the light-emitting diode lamp.
  • the n-electrode terminal is electrically connected to be equipotential or substantially equipotential, and the breakdown voltage from the transparent substrate side to the P-type GaP layer side is lower than the reverse voltage of the PN junction-type light-emitting portion.
  • the third electrode flows through the junction region of the transparent group having a low breakdown voltage and the p-type GaP layer, and can escape to the P-type ohmic electrode without passing through the light-emitting portion. Therefore, it is possible to avoid the destruction of the light-emitting portion of the light-emitting diode caused by the careless flow of the reverse overcurrent.
  • the structure for preventing reverse voltage breakdown of the light-emitting diodes must be a chip structure on the same side of the horizontal plate PN electrode, which is not suitable for the vertical plate, which greatly reduces the number of technical problems of the LED application.
  • the present invention provides an LED structure having electrostatic protection, which prevents reverse voltage breakdown structures from being formed on LED chips, thereby increasing chip quality and ease of use.
  • an epitaxial wafer of a light-emitting diode with electrostatic protection And comprising: a growth substrate; an electrostatic protection layer composed of an N-type semiconductor layer and a P-type semiconductor layer, formed on the growth substrate; a tunneling junction formed on the electrostatic protection layer; An etch-off layer is formed over the tunneling junction; an N-type cladding layer is formed over the second etch-off layer; a luminescent layer is formed over the N-type cladding layer; and a P-type cladding layer, Formed on the luminescent layer.
  • the LED chip structure adopting the above epitaxial structure comprises: a light emitting portion, comprising a P-type cover layer, a light-emitting layer and an N-type cover layer, wherein an upper surface thereof is divided into an exit region, an electrode region and an electrostatic protection region; and antistatic protection
  • the structure is disposed on the electrostatic protection region of the light-emitting portion, and includes an etch-off layer, a tunnel junction, and an electrostatic protection layer, wherein the electrostatic protection layer is composed of an N-type semiconductor layer and a P-type semiconductor layer; a type ohmic contact electrode formed on the electrode region of the light emitting portion; a second N-type ohmic contact electrode formed on the electrostatic protection layer; and the antistatic protection when the light emitting diode is subjected to electrostatic reverse bias
  • the structure works, the current passes through the first N-type ohmic contact electrode, the electrostatic protection structure to the second N-type ohmic contact electrode, and the electrostatic reverse bias is prevented from
  • the method for fabricating the above-mentioned electrostatic protection LED chip comprises the following steps: 1) epitaxial growth: epitaxial growth on a growth substrate to form an epitaxial wafer, which comprises from bottom to top: a growth substrate, an N-type semiconductor An electrostatic protection layer composed of a layer and a P-type semiconductor layer, a tunneling junction, an etch-off layer, an N-type cladding layer, a light-emitting layer, and a P-type cladding layer; 2) a transfer growth substrate: providing a conductive substrate through a metal bond Bonding the surface to the surface of the P-type cover layer of the epitaxial wafer, removing the growth substrate to expose the surface of the epitaxial wafer; 3) fabricating an antistatic protection structure: defining light on the surface of the exposed epitaxial wafer a region, an electrode region, and an electrostatic protection region, removing an electrostatic protection layer, a tunneling junction, and an etch-off layer of the light-emitting region and the
  • the etch stop layer, the tunnel junction, the electrostatic protection layer and the second N-type ohmic contact electrode constitute an antistatic protection structure, and when the LED is subjected to electrostatic reverse bias, the antistatic The protection structure works, and the current flows through the first N-type ohmic contact electrode and the electrostatic protection structure to the second N-type ohmic contact electrode to prevent the luminescent layer from being damaged due to excessive electrostatic reverse bias.
  • the N-type semiconductor layer constituting the electrostatic protection layer is the same as the N-type ohmic contact semiconductor layer [0010]
  • the electrostatic protection layer is composed of an N-GaAs layer and a P-GaAs layer.
  • the tunneling junction is composed of a P-type heavily miscellaneous layer and an N-type heavily miscellaneous layer, wherein the P-grain miscellaneous layer is P+ +-GaAs, and the impurity concentration is ⁇ 1E19, and the N is heavy.
  • the layer is N++-GaAs, and its impurity concentration is ⁇ 1E20.
  • the etch-off layer is N-type miscellaneous
  • the impurity concentration is at least 1E18 or more, preferably 5E 18, and the miscellaneous material may be Si, Te, and the thickness is at least 1000 or more, and the material may be InGaP, GaP, GaAs, AlInP, AlAs or AlGaAs is used.
  • an N-type ohmic contact semiconductor layer is further disposed between the etch stop layer and the N-type cap layer
  • an N-type current transport layer is further disposed between the N-type ohmic contact semiconductor layer and the N-type cap layer, and the impurity concentration is ⁇ 5E17, and the thickness is ⁇ 2000 nm.
  • the area of the light exit area is larger than the area of the electrostatic protection area.
  • FIG. 1 is a side cross-sectional view of an LED epitaxial structure with electrostatic protection in accordance with an embodiment of the present invention.
  • FIG. 2 is a side cross-sectional view showing the structure of an LED chip fabricated using the epitaxial structure shown in FIG. 1.
  • FIG. 3 is a schematic diagram showing current flow in a normal operation mode of an LED chip with electrostatic protection according to an embodiment of the present invention.
  • FIG. 4 is a schematic diagram showing current flow in an antistatic operation mode of an LED chip with electrostatic protection according to an embodiment of the present invention.
  • FIG. 5 is a cross-sectional view of a process for fabricating an LED with electrostatic protection in accordance with an embodiment of the present invention.
  • an epitaxial structure of an LED includes: a growth substrate 100, a first etch-off layer 111, an N-type layer 112 of an electrostatic protection layer, and an electrostatic protection layer P.
  • the growth substrate 100 is made of a GaAs material; the first etch-off layer 111 is made of an N-InGaP material; and the N-type layer 112 of the electrostatic protection layer is made of an N-GaAs material, which can be used as an antistatic protection structure.
  • the ohmic contact semiconductor layer; the P-type layer 113 of the electrostatic protection layer adopts a P-GaAs material; the P-type sever layer 114 and the N-type sever layer 115 constitute a tunnel junction, wherein the P-gravity layer 114 is P++-GaAs, The impurity concentration ⁇ 1E19, N heavy miscellaneous layer 115 is N++-GaAs, and its impurity concentration is ⁇ 1E20; the second etch-off layer 116 is N-type miscellaneous, and the impurity concentration is at least 1E18 or more, preferably 5E18.
  • the material may be Si, Te, and the thickness is at least 1000A or more, and the material may be selected from InGaP, GaP, GaAs, AlInP, AlAs or AlGaAs; the material of the N-type ohmic contact layer 117 is GaAs; and the N-type current diffusion layer 118 is n- AlGaInP, the impurity concentration is at least 7E17 or more, preferably 1E18, the miscellaneous material may be Si, Te, the thickness is at least 1 micron or more, preferably 3 micrometers; the n-type cladding layer 119 is made of AllnP; Source layer 120 is a multiple quantum well structure The material of the p-type cladding layer 121 may be AllnP; the thickness of the p-type current diffusion layer 122 is 0.5-2 micrometers, preferably 1 micrometer; the material of the p-type ohmic contact layer 123 is p-GaP, and the impurity concentration is at least 8E17 or more
  • P ohmic contact layer GaP: Mg 1200 3E18 2 shows a chip structure of a light emitting diode designed by using the above epitaxial structure, which includes, in order from bottom to top, a P electrode 143, a conductive substrate 101, a metal bonding layer 132, a mirror layer 131, and a P-type ohmic contact.
  • N-type current diffusion layer 122 P-type cladding layer 121, light-emitting layer 120, N-type cladding layer 119, N-type current diffusion layer 118, N-type ohmic contact layer 117, second etch-off layer 116, N heavy
  • the heterotunic tunneling layer 115, the P heavily doped tunneling layer 114, the P-type layer 113 of the electrostatic protection layer, the N-type layer of the electrostatic protection layer, the first ohmic contact electrode 141 and the second ohmic contact electrode 142 The upper surface of the N-type current diffusion layer 118 is divided into an exit region, an electrode region, and an electrostatic protection region.
  • the N-type ohmic contact layer 117 is formed in the light exit region and the electrode region, and the second etch stop layer 116 and the N heavily miscellaneous tunneling
  • the junction layer 115, the P heavily doped tunneling layer 114, the P-type layer 113 of the electrostatic protection layer, and the N-type layer 112 of the electrostatic protection layer are formed in the electrostatic protection region, and the first ohmic contact electrode 141 is formed in the N-type of the electrode region.
  • a second ohmic contact electrode 142 is formed on the N-type layer 112 of the electrostatic protection layer.
  • the N-type current diffusion layer 118, the second etch-off layer 116, the N-heavy tunneling layer 115, the P-heavy tunneling layer 114, and the P-type of the electrostatic protection layer constitute an electrostatic protection structure.
  • the LED chip of FIG. 2 is mounted on the PCB board 200 ⁇ , wherein the first N-type ohmic contact electrode 141 is connected to the negative electrode contact 200a of the PCB board 200, and the second N-type ohmic contact electrode 1 42 and the P electrode 143 and the PCB board 200 are connected.
  • the positive electrode contact 200b is connected.
  • the current flows through the P electrode 143 to the epitaxial light emitting layer to the first N-type ohmic contact electrode 141, and the chip works normally, as shown in FIG. 3;
  • the antistatic protection structure of the chip works, and the current passes through the first N-type ohmic contact electrode 141 to the electrostatic protection structure to the second N-type ohmic contact electrode 14 2, thereby avoiding the electrostatic reverse bias and causing the MQW light-emitting layer. Damaged, causing LED failure.
  • the epitaxial structure shown in FIG. 1 is formed by an epitaxial growth method.
  • a mirror layer 131 is formed on the surface of the p-type ohmic contact layer 123, which includes a P-type ohmic contact metal layer 131a and a highly transparent dielectric material layer 131b, which are provided on the one hand a P-type ohmic contact layer, on the other hand, for reflecting the light emitted downward by the light-emitting layer; providing a conductive substrate 101, coating a metal bonding layer 132 thereon, bonding the conductive substrate 101 and the mirror layer 131, and removing The substrate 100 is grown, and the N-type ohmic contact layer 112 is exposed, as shown in FIG.
  • an antistatic protection structure is fabricated: light is defined on the surface of the exposed N-type ohmic contact layer 112.
  • the region, the electrode region and the electrostatic protection region are fabricated by a yellow light chemical technique, and the N-type layer 112 of the electrostatic protection layer of the light-emitting region is removed by etching, the P-type layer 113 of the electrostatic protection layer, the P-type heavy layer 114, and the N-type heavy
  • an N-type ohmic contact electrode is fabricated: a first N-type ohmic contact electrode 141 is formed on the N-type ohmic contact layer 117 of the electrode region, and a second N-type ohmic contact is formed on the electrostatic protection layer 112 of the electrostatic protection region.
  • the electrode 142 forms a light emitting diode having an antistatic protection structure.

Abstract

A light emitting diode with an electrostatic protection function and a manufacturing method therefor. An electrostatic protection region, an electrode region and a light emission region are arranged on a light emission surface of a chip. A first N-type ohmic contact electrode (141) is formed on the electrode region. An antistatic protection structure composed of an etching stop layer (116), tunnel junctions (114, 115), electrostatic protection layers (112, 113) and a second N-type ohmic contact electrode (142) is formed in the electrostatic protection region. When the light emitting diode is subjected to an electrostatic reverse biased voltage, the antistatic protection structure works. The current passes through the first N-type ohmic contact electrode (141) and the electrostatic protection structure to the second N-type ohmic contact electrode (142), so that the damage of the light emitting layer caused by an overhigh electrostatic reverse biased voltage can be avoided.

Description

具有静电保护的发光二极管及其制作方法 技术领域  Light-emitting diode with electrostatic protection and manufacturing method thereof
[0001] 本发明涉及半导体照明领域, 具体的说是具有抗静电保护结构的发光二极管及 其制作方法。  [0001] The present invention relates to the field of semiconductor illumination, and more particularly to a light-emitting diode having an antistatic protection structure and a method of fabricating the same.
背景技术  Background technique
[0002] 发光二极管是一种半导体固体发光器件, 其利用半导体 PN结作为发光材料, 可以直接将电转换为光。 发光二极管的正逆向电流或电压必须经过发光层, 在 施加反向电压过大吋会有造成芯片被击穿的可能性, 导致芯片功能失效。  [0002] A light emitting diode is a semiconductor solid state light emitting device that utilizes a semiconductor PN junction as a light emitting material to directly convert electricity into light. The forward and reverse current or voltage of the LED must pass through the illuminating layer. If the reverse voltage is applied too much, the chip may be broken down, causing the chip to fail.
[0003] 中国专利公幵申请案 CN102308397A公幵了一种发光二极管和发光二极管灯, 其在透明基板的底部设置第 3电极, 在装配成发光二极管灯吋将 n型欧姆电极和 第 3电极通过 n极电极端子以成为等电位或大致等电位的方式电连接, 并且从透 明基板侧向 P型 GaP层侧的击穿电压为比 PN接合型的发光部的反向电压低的值。 由此, 与其使在不小心地施加反向电压吋发生的反向电流经由设置于发光部的 上方的 n型欧姆电极流到 PN接合部的反向电压高的发光部, 不如索性使其经由第 3电极在击穿电压低的透明基与 p型 GaP层的接合区域流通, 可以不经由发光部而 逃向 P型欧姆电极。 因此, 能够避免由不小心的反向过电流的流通引起的发光二 极管的发光部的破坏。  [0003] Chinese Patent Publication No. CN102308397A discloses a light-emitting diode and a light-emitting diode lamp, which is provided with a third electrode at the bottom of the transparent substrate, and is configured to pass the n-type ohmic electrode and the third electrode through the assembly of the light-emitting diode lamp. The n-electrode terminal is electrically connected to be equipotential or substantially equipotential, and the breakdown voltage from the transparent substrate side to the P-type GaP layer side is lower than the reverse voltage of the PN junction-type light-emitting portion. Therefore, instead of causing a reverse current generated by inadvertently applying a reverse voltage 经由 to flow through the n-type ohmic electrode provided above the light-emitting portion to the light-emitting portion having a high reverse voltage of the PN junction portion, it is not preferable to pass the The third electrode flows through the junction region of the transparent group having a low breakdown voltage and the p-type GaP layer, and can escape to the P-type ohmic electrode without passing through the light-emitting portion. Therefore, it is possible to avoid the destruction of the light-emitting portion of the light-emitting diode caused by the careless flow of the reverse overcurrent.
[0004] 然而, 该防止逆向电压击穿发光二极的结构必须为水平板 PN电极同一面的芯 片结构, 并不适合于垂直版芯片, 此问题大大减少并且限制了 LED应用的简便性 技术问题  [0004] However, the structure for preventing reverse voltage breakdown of the light-emitting diodes must be a chip structure on the same side of the horizontal plate PN electrode, which is not suitable for the vertical plate, which greatly reduces the number of technical problems of the LED application.
问题的解决方案  Problem solution
技术解决方案  Technical solution
[0005] 针对前述问题, 本发明提出一种具有静电保护的发光二极管结构, 其将防止逆 向电压击穿结构做于 LED芯片上, 增加芯片质量与使用上的简便性。  In view of the foregoing problems, the present invention provides an LED structure having electrostatic protection, which prevents reverse voltage breakdown structures from being formed on LED chips, thereby increasing chip quality and ease of use.
[0006] 本发明解决上述问题的技术方案为: 一种具有静电保护的发光二极管的外延片 , 依次包括: 生长衬底; 由一 N型半导体层和一 P型半导体层构成的静电保护层 , 形成于所述生长衬底之上; 隧穿结, 形成于所述静电保护层之上; 蚀刻截止 层, 形成于所述隧穿结之上; N型覆盖层, 形成于所述第二蚀刻截止层之上; 发 光层, 形成于所述 N型覆盖层之上; P型覆盖层, 形成于所述发光层之。 [0006] The technical solution of the present invention to solve the above problems is as follows: an epitaxial wafer of a light-emitting diode with electrostatic protection And comprising: a growth substrate; an electrostatic protection layer composed of an N-type semiconductor layer and a P-type semiconductor layer, formed on the growth substrate; a tunneling junction formed on the electrostatic protection layer; An etch-off layer is formed over the tunneling junction; an N-type cladding layer is formed over the second etch-off layer; a luminescent layer is formed over the N-type cladding layer; and a P-type cladding layer, Formed on the luminescent layer.
[0007] 采用上述外延结构设计的 LED芯片结构, 包括: 发光部, 包含 P型覆盖层、 发 光层和 N型覆盖层, 其上表面划分为出光区、 电极区和静电保护区; 抗静电保护 结构, 位于所述发光部的静电保护区之上, 依次包含蚀刻截止层、 隧穿结、 静 电保护层, 所述静电保护层由一 N型半导体层和一 P型半导体层构成; 第一 N型 欧姆接触电极, 形成于所述发光部的电极区之上; 第二 N型欧姆接触电极, 形成 于所述静电保护层之上; 当发光二极管受到静电逆向偏压吋, 所述抗静电保护 结构工作, 电流经由第一 N型欧姆接触电极、 静电保护结构至第二 N型欧姆接触 电极, 避免静电逆向偏压过高造成所述发光层被破坏。 作为本发明的一个较佳 实施例, 所述发光部位通于金属键合层粘结于导电基板上。 更佳的, 在发光部 与金属键合层之间还可设置反射镜结构。  [0007] The LED chip structure adopting the above epitaxial structure comprises: a light emitting portion, comprising a P-type cover layer, a light-emitting layer and an N-type cover layer, wherein an upper surface thereof is divided into an exit region, an electrode region and an electrostatic protection region; and antistatic protection The structure is disposed on the electrostatic protection region of the light-emitting portion, and includes an etch-off layer, a tunnel junction, and an electrostatic protection layer, wherein the electrostatic protection layer is composed of an N-type semiconductor layer and a P-type semiconductor layer; a type ohmic contact electrode formed on the electrode region of the light emitting portion; a second N-type ohmic contact electrode formed on the electrostatic protection layer; and the antistatic protection when the light emitting diode is subjected to electrostatic reverse bias The structure works, the current passes through the first N-type ohmic contact electrode, the electrostatic protection structure to the second N-type ohmic contact electrode, and the electrostatic reverse bias is prevented from being excessively caused to cause the luminescent layer to be destroyed. As a preferred embodiment of the present invention, the light-emitting portion is bonded to the conductive substrate through the metal bonding layer. More preferably, a mirror structure may be provided between the light-emitting portion and the metal bonding layer.
[0008] 上述具有静电保护的发光二极管芯片的制作方法, 包括步骤: 1) 外延生长: 在生长衬底上外延生长形成外延片, 其自下而上包含: 生长衬底、 由一 N型半导 体层和一 P型半导体层构成的静电保护层、 隧穿结、 蚀刻截止层、 N型覆盖层、 发光层和 P型覆盖层; 2) 转移生长衬底: 提供一导电基板, 通过一金属键合层 与所述外延片的 P型覆盖层一侧表面进行粘接, 移除所述生长衬底, 露出外延片 的表面; 3) 制作抗静电保护结构: 在露出的外延片表面上定义出光区、 电极区 和静电保护区, 去除所述出光区和电极区的静电保护层、 隧穿结、 蚀刻截止层 ; 4) 制作电极: 在所述外延片表面的电极区制作第一 N型欧姆接触电极, 在所 述静电保护层上制作第二 N型欧姆接触电极。 在上述形成的发光二极管结构中, 所述蚀刻截止层、 隧穿结、 静电保护层和第二 N型欧姆接触电极构成抗静电保护 结构, 当发光二极管受到静电逆向偏压吋, 所述抗静电保护结构工作, 电流经 由第一 N型欧姆接触电极、 静电保护结构至第二 N型欧姆接触电极, 避免静电逆 向偏压过高造成所述发光层被破坏。  [0008] The method for fabricating the above-mentioned electrostatic protection LED chip comprises the following steps: 1) epitaxial growth: epitaxial growth on a growth substrate to form an epitaxial wafer, which comprises from bottom to top: a growth substrate, an N-type semiconductor An electrostatic protection layer composed of a layer and a P-type semiconductor layer, a tunneling junction, an etch-off layer, an N-type cladding layer, a light-emitting layer, and a P-type cladding layer; 2) a transfer growth substrate: providing a conductive substrate through a metal bond Bonding the surface to the surface of the P-type cover layer of the epitaxial wafer, removing the growth substrate to expose the surface of the epitaxial wafer; 3) fabricating an antistatic protection structure: defining light on the surface of the exposed epitaxial wafer a region, an electrode region, and an electrostatic protection region, removing an electrostatic protection layer, a tunneling junction, and an etch-off layer of the light-emitting region and the electrode region; 4) fabricating an electrode: forming a first N-type ohm in an electrode region on a surface of the epitaxial wafer A second N-type ohmic contact electrode is formed on the electrostatic protection layer by a contact electrode. In the LED structure formed above, the etch stop layer, the tunnel junction, the electrostatic protection layer and the second N-type ohmic contact electrode constitute an antistatic protection structure, and when the LED is subjected to electrostatic reverse bias, the antistatic The protection structure works, and the current flows through the first N-type ohmic contact electrode and the electrostatic protection structure to the second N-type ohmic contact electrode to prevent the luminescent layer from being damaged due to excessive electrostatic reverse bias.
[0009] 优选地, 所述构成静电保护层的 N型半导体层同吋作为 N型欧姆接触半导体层 [0010] 优选地, 所述静电保护层由 N-GaAs层和 P-GaAs层构成。 [0009] Preferably, the N-type semiconductor layer constituting the electrostatic protection layer is the same as the N-type ohmic contact semiconductor layer [0010] Preferably, the electrostatic protection layer is composed of an N-GaAs layer and a P-GaAs layer.
[0011] 优选地, 所述隧穿结由 P型重惨杂层和 N型重惨杂层构成, 其中 P重惨杂层为 P+ +-GaAs, 其惨杂浓度≥1E19, N重惨杂层为 N++-GaAs, 其惨杂浓度≥1E20。  [0011] Preferably, the tunneling junction is composed of a P-type heavily miscellaneous layer and an N-type heavily miscellaneous layer, wherein the P-grain miscellaneous layer is P+ +-GaAs, and the impurity concentration is ≥1E19, and the N is heavy. The layer is N++-GaAs, and its impurity concentration is ≥1E20.
[0012] 优选地, 所述蚀刻截止层为 N型惨杂, 惨杂浓度至少为 1E18以上, 较佳值为 5E 18, 惨杂材料可以为 Si、 Te, 厚度至少为 1000人以上, 材料可选用 InGaP、 GaP 、 GaAs、 AlInP、 AlAs或 AlGaAs。  [0012] Preferably, the etch-off layer is N-type miscellaneous, the impurity concentration is at least 1E18 or more, preferably 5E 18, and the miscellaneous material may be Si, Te, and the thickness is at least 1000 or more, and the material may be InGaP, GaP, GaAs, AlInP, AlAs or AlGaAs is used.
[0013] 优选地, 在所述蚀刻截止层与 N型覆盖层之间还设有一 N型欧姆接触半导体层  [0013] Preferably, an N-type ohmic contact semiconductor layer is further disposed between the etch stop layer and the N-type cap layer
[0014] 优选地, 在所述 N型欧姆接触半导体层与 N型覆盖层之间还设有一 N型电流传输 层, 其惨杂浓度≥5E17, 厚度≥2000nm。 [0014] Preferably, an N-type current transport layer is further disposed between the N-type ohmic contact semiconductor layer and the N-type cap layer, and the impurity concentration is ≥5E17, and the thickness is ≥2000 nm.
[0015] 优选地, 所述出光区的面积大于所述静电保护区的面积。 [0015] Preferably, the area of the light exit area is larger than the area of the electrostatic protection area.
[0016] 本发明的其它特征和优点将在随后的说明书中阐述, 并且, 部分地从说明书中 变得显而易见, 或者通过实施本发明而了解。 本发明的目的和其他优点可通过 在说明书、 权利要求书以及附图中所特别指出的结构来实现和获得。  Other features and advantages of the invention will be set forth in the description which follows, The objectives and other advantages of the invention will be realized and attained by the <RTI
发明的有益效果  Advantageous effects of the invention
对附图的简要说明  Brief description of the drawing
附图说明  DRAWINGS
[0017] 附图用来提供对本发明的进一步理解, 并且构成说明书的一部分, 与本发明的 实施例一起用于解释本发明, 并不构成对本发明的限制。 此外, 附图数据是描 述概要, 不是按比例绘制。  The drawings are intended to provide a further understanding of the invention, and are intended to be a part of the description of the invention. In addition, the drawing figures are a summary of the description and are not drawn to scale.
[0018] 图 1为根据本发明实施的一种具有静电保护的 LED外延结构的侧面剖视图。 1 is a side cross-sectional view of an LED epitaxial structure with electrostatic protection in accordance with an embodiment of the present invention.
[0019] 图 2为采用图 1所示外延结构制作的 LED芯片结构的侧面剖视图。 2 is a side cross-sectional view showing the structure of an LED chip fabricated using the epitaxial structure shown in FIG. 1.
[0020] 图 3为根据本发明实施的一种具有静电保护的 LED芯片在正常工作模式下的电 流流向示意图。 3 is a schematic diagram showing current flow in a normal operation mode of an LED chip with electrostatic protection according to an embodiment of the present invention.
[0021] 图 4为根据本发明实施的一种具有静电保护的 LED芯片在抗静电工作模式下的 电流流向示意图。  4 is a schematic diagram showing current flow in an antistatic operation mode of an LED chip with electrostatic protection according to an embodiment of the present invention.
[0022] 图 5为根据本发明实施的制作一种具有静电保护的 LED过程剖视图。 本发明的实施方式 [0022] FIG. 5 is a cross-sectional view of a process for fabricating an LED with electrostatic protection in accordance with an embodiment of the present invention. Embodiments of the invention
[0023] 以下将结合附图及实施例来详细说明本发明的实施方式, 借此对本发明如何应 用技术手段来解决技术问题, 并达成技术效果的实现过程能充分理解并据以实 施。 需要说明的是, 只要不构成冲突, 本发明中的各个实施例以及各实施例中 的各个特征可以相互结合, 所形成的技术方案均在本发明的保护范围之内。  The embodiments of the present invention will be described in detail below with reference to the accompanying drawings and embodiments, in which the technical solutions of the present invention can be used to solve the technical problems, and the implementation of the technical effects can be fully understood and implemented. It should be noted that the various embodiments of the present invention and the various features of the various embodiments may be combined with each other as long as they do not constitute a conflict, and the technical solutions formed are all within the protection scope of the present invention.
[0024] 请参看附图 1, 根据本发明实施的一种发光二极管的外延结构, 包括: 生长衬 底 100, 第一蚀刻截止层 111、 静电保护层之 N型层 112、 静电保护层之 P型层 113 、 P型重惨层 114、 N型重惨层 115、 第二蚀刻截止层 116、 N型欧姆接触层 117、 N 型电流扩散层 118、 N型覆盖层 119、 多量子阱发光层 120、 P型覆盖层 121、 P型电 流扩散层 122和 P型欧姆接触层 123。  Referring to FIG. 1, an epitaxial structure of an LED according to an embodiment of the present invention includes: a growth substrate 100, a first etch-off layer 111, an N-type layer 112 of an electrostatic protection layer, and an electrostatic protection layer P. The pattern layer 113, the P-type sever layer 114, the N-type sever layer 115, the second etch-off layer 116, the N-type ohmic contact layer 117, the N-type current diffusion layer 118, the N-type cladding layer 119, and the multiple quantum well light-emitting layer 120, P-type cap layer 121, P-type current diffusion layer 122 and P-type ohmic contact layer 123.
[0025] 具体的, 生长衬底 100采用 GaAs材料; 第一蚀刻截止层 111采用 N-InGaP材料; 静电保护层之 N型层 112采用 N-GaAs材料, 其可同吋作为抗静电保护结构的欧姆 接触半导体层; 静电保护层之 P型层 113采用 P- GaAs材料; P型重惨层 114和 N型 重惨层 115构成隧穿结, 其中 P重惨杂层 114为 P++-GaAs, 其惨杂浓度≥1E19, N 重惨杂层 115为 N++-GaAs, 其惨杂浓度≥1E20; 第二蚀刻截止层 116为 N型惨杂, 惨杂浓度至少为 1E18以上, 较佳值为 5E18 , 惨杂材料可以为 Si、 Te, 厚度至少 为 1000A以上, 材料可选用 InGaP、 GaP、 GaAs、 AlInP、 AlAs或 AlGaAs; N型 欧姆接触层 117的材料为 GaAs; N型电流扩散层 118为 n-AlGaInP, 惨杂浓度至少 为 7E17以上, 较佳值为 1E18, 惨杂材料可以为 Si、 Te, 厚度至少为 1微米以上, 较佳值为 3微米; n型覆盖层 119的材料为 AllnP; 有源层 120为多量子阱结构; p型 覆盖层 121的材料可为 AllnP; p型电流扩散层 122的厚度为 0.5~2微米, 较佳值为 1 微米; P型欧姆接触层 123的材料为 p-GaP, 惨杂浓度至少为 8E17以上, 较佳值为 1E18 , 惨杂材料可以为 Mg、 Zn、 C, 厚度至少为 5微米以上, 较佳值为 10微米。  [0025] Specifically, the growth substrate 100 is made of a GaAs material; the first etch-off layer 111 is made of an N-InGaP material; and the N-type layer 112 of the electrostatic protection layer is made of an N-GaAs material, which can be used as an antistatic protection structure. The ohmic contact semiconductor layer; the P-type layer 113 of the electrostatic protection layer adopts a P-GaAs material; the P-type sever layer 114 and the N-type sever layer 115 constitute a tunnel junction, wherein the P-gravity layer 114 is P++-GaAs, The impurity concentration ≥1E19, N heavy miscellaneous layer 115 is N++-GaAs, and its impurity concentration is ≥1E20; the second etch-off layer 116 is N-type miscellaneous, and the impurity concentration is at least 1E18 or more, preferably 5E18. The material may be Si, Te, and the thickness is at least 1000A or more, and the material may be selected from InGaP, GaP, GaAs, AlInP, AlAs or AlGaAs; the material of the N-type ohmic contact layer 117 is GaAs; and the N-type current diffusion layer 118 is n- AlGaInP, the impurity concentration is at least 7E17 or more, preferably 1E18, the miscellaneous material may be Si, Te, the thickness is at least 1 micron or more, preferably 3 micrometers; the n-type cladding layer 119 is made of AllnP; Source layer 120 is a multiple quantum well structure The material of the p-type cladding layer 121 may be AllnP; the thickness of the p-type current diffusion layer 122 is 0.5-2 micrometers, preferably 1 micrometer; the material of the p-type ohmic contact layer 123 is p-GaP, and the impurity concentration is at least 8E17 or more, preferably 1E18, the miscellaneous material may be Mg, Zn, C, and has a thickness of at least 5 μm or more, preferably 10 μm.
[0026] 下面表格列举了上述 LED外延结构中各层的主要材料及其相关参数。  The following table lists the main materials of the layers in the above-mentioned LED epitaxial structure and their related parameters.
[] [表 1] 标号 功能 材料 厚度(nm) 惨杂浓度[] [Table 1] Label Functional Material Thickness (nm) Miscellaneous Concentration
111 第一蚀刻截止 InGaP:Si 100 5E18 111 First Etch Cutoff InGaP: Si 100 5E18
 Floor
112 静电保护层之 GaAs:Si 100 1E18  112 Electrostatic protective layer GaAs: Si 100 1E18
N型层与 N欧姆  N-type layer with N ohms
接触半导体层 1  Contact semiconductor layer 1
113 静电保护层之 P GaAs:C 100 3E18 113 Electrostatic protective layer P GaAs: C 100 3E18
型层  Type layer
114 P重惨杂隧穿结 GaAs:C <20 >5E19  114 P heavy miscellaneous tunneling junction GaAs: C <20 >5E19
 Floor
115 N重惨杂隧穿 GaAs:Te <20 >5E19  115 N heavy miscellaneous tunneling GaAs: Te <20 >5E19
结层  Layer
116 第二蚀刻截止 InGaP:Si 200 5E18  116 Second Etch Cutoff InGaP: Si 200 5E18
 Floor
117 N欧姆接触层 2 GaAs:Si 60 1E18 117 N ohmic contact layer 2 GaAs: Si 60 1E18
118 N型电流扩散 AlGaInP:Si 3000 8E17 118 N-type current diffusion AlGaInP: Si 3000 8E17
 Floor
119 N型覆盖层 AlInP:Si 500 8E17 119 N-type overlay AlInP: Si 500 8E17
120 发光层 AlGalnP 11*18对 -120 light layer AlGalnP 11*18 pair -
121 P型覆盖层 AlInP:Mg 900 1E18121 P-type overlay AlInP: Mg 900 1E18
122 P型电流扩散层 AlGaInP:Mg 25 2E18 122 P type current diffusion layer AlGaInP: Mg 25 2E18
123 P欧姆接触层 GaP:Mg 1200 3E18 [0027] 图 2显示了采用上述外延结构设计的一种发光二极管的芯片结构, 自下而上依 次包括: P电极 143、 导电基板 101、 金属键合层 132、 镜面层 131、 P型欧姆接触 层 123、 P型电流扩散层 122、 P型覆盖层 121、 发光层 120、 N型覆盖层 119、 N型 电流扩散层 118、 N型欧姆接触层 117、 第二蚀刻截止层 116、 N重惨杂隧穿结层 11 5、 P重惨杂隧穿结层 114、 静电保护层之 P型层 113、 静电保护层之 N型层、 第一 欧姆接触电极 141和第二欧姆接触电极 142。 其中, N型电流扩散层 118的上表面 划分为出光区、 电极区和静电保护区, N型欧姆接触层 117形成于出光区和电极 区, 第二蚀刻截止层 116、 N重惨杂隧穿结层 115、 P重惨杂隧穿结层 114、 静电保 护层之 P型层 113和静电保护层之 N型层 112形成于静电保护区, 第一欧姆接触电 极 141形成于电极区的 N型欧姆接触层 117上, 第二欧姆接触电极 142形成于静电 保护层之 N型层 112上。 123 P ohmic contact layer GaP: Mg 1200 3E18 2 shows a chip structure of a light emitting diode designed by using the above epitaxial structure, which includes, in order from bottom to top, a P electrode 143, a conductive substrate 101, a metal bonding layer 132, a mirror layer 131, and a P-type ohmic contact. Layer 123, P-type current diffusion layer 122, P-type cladding layer 121, light-emitting layer 120, N-type cladding layer 119, N-type current diffusion layer 118, N-type ohmic contact layer 117, second etch-off layer 116, N heavy The heterotunic tunneling layer 115, the P heavily doped tunneling layer 114, the P-type layer 113 of the electrostatic protection layer, the N-type layer of the electrostatic protection layer, the first ohmic contact electrode 141 and the second ohmic contact electrode 142. The upper surface of the N-type current diffusion layer 118 is divided into an exit region, an electrode region, and an electrostatic protection region. The N-type ohmic contact layer 117 is formed in the light exit region and the electrode region, and the second etch stop layer 116 and the N heavily miscellaneous tunneling The junction layer 115, the P heavily doped tunneling layer 114, the P-type layer 113 of the electrostatic protection layer, and the N-type layer 112 of the electrostatic protection layer are formed in the electrostatic protection region, and the first ohmic contact electrode 141 is formed in the N-type of the electrode region. On the ohmic contact layer 117, a second ohmic contact electrode 142 is formed on the N-type layer 112 of the electrostatic protection layer.
[0028] 在上述 LED芯片结构中, N型电流扩散层 118、 第二蚀刻截止层 116、 N重惨杂 隧穿结层 115、 P重惨杂隧穿结层 114、 静电保护层之 P型层 113和静电保护层之 N 型层 112构成静电保护结构。 将图 2所述 LED芯片安装于 PCB板 200吋, 其中第一 N型欧姆接触电极 141与 PCB板 200的负极接点 200a连接, 第二 N型欧姆接触电极 1 42和 P电极 143与 PCB板 200的正极接点 200b连接, 当此发光二极管施以正向偏压 , 电流经由 P电极 143到外延发光层至第一 N型欧姆接触电极 141, 此芯片正常工 作, 如图 3所示; 当发光二极管受到静电逆向偏压吋, 芯片抗静电保护结构工作 , 电流经由第一 N型欧姆接触电极 141到静电保护结构至第二 N型欧姆接触电极 14 2, 避免静电逆向偏压过高造成 MQW发光层被破坏, 导致 LED失效。  [0028] In the above LED chip structure, the N-type current diffusion layer 118, the second etch-off layer 116, the N-heavy tunneling layer 115, the P-heavy tunneling layer 114, and the P-type of the electrostatic protection layer The layer 113 and the N-type layer 112 of the electrostatic protection layer constitute an electrostatic protection structure. The LED chip of FIG. 2 is mounted on the PCB board 200吋, wherein the first N-type ohmic contact electrode 141 is connected to the negative electrode contact 200a of the PCB board 200, and the second N-type ohmic contact electrode 1 42 and the P electrode 143 and the PCB board 200 are connected. The positive electrode contact 200b is connected. When the light emitting diode is forward biased, the current flows through the P electrode 143 to the epitaxial light emitting layer to the first N-type ohmic contact electrode 141, and the chip works normally, as shown in FIG. 3; Under the reverse bias of the static electricity, the antistatic protection structure of the chip works, and the current passes through the first N-type ohmic contact electrode 141 to the electrostatic protection structure to the second N-type ohmic contact electrode 14 2, thereby avoiding the electrostatic reverse bias and causing the MQW light-emitting layer. Damaged, causing LED failure.
[0029] 下面对上述发光二极管的制作方法做简单描述。  [0029] The following describes a method for fabricating the above light emitting diode.
[0030] 首先, 采用外延生长方法形成图 1所示的外延结构。  [0030] First, the epitaxial structure shown in FIG. 1 is formed by an epitaxial growth method.
[0031] 接着, 进行基板转移: 在 p型欧姆接触层 123的表面上制作镜面层 131, 其包括 P 型欧姆接触金属层 131a和高透光性介电材料层 131b, 两者配合一方面提供 P型欧 姆接触层, 另一方面用于反射发光层射向下方的光线; 提供一导电基板 101, 在 其上涂布金属键合层 132, 将导电基板 101与镜面层 131进行黏合, 并去除生长衬 底 100, 裸露 N型欧姆接触层 112, 如图 5所示。  [0031] Next, substrate transfer is performed: a mirror layer 131 is formed on the surface of the p-type ohmic contact layer 123, which includes a P-type ohmic contact metal layer 131a and a highly transparent dielectric material layer 131b, which are provided on the one hand a P-type ohmic contact layer, on the other hand, for reflecting the light emitted downward by the light-emitting layer; providing a conductive substrate 101, coating a metal bonding layer 132 thereon, bonding the conductive substrate 101 and the mirror layer 131, and removing The substrate 100 is grown, and the N-type ohmic contact layer 112 is exposed, as shown in FIG.
[0032] 再接着, 制作抗静电保护结构: 在裸露出的 N型欧姆接触层 112表面上定义出光 区、 电极区和静电保护区, 使用黄光化学制成技术, 蚀刻去除出光区的静电保 护层之 N型层 112、 静电保护层之 P型层 113、 P型重惨层 114、 N型重惨层 115、 第 二蚀刻截止层 116、 N型欧姆接触层 117及电极区的静电保护层之 N型层 112、 静电 保护层之 P型层 113、 P型重惨层 114、 N型重惨层 115、 第二蚀刻截止层 116, 从而 形成由 N型电流扩散层 118、 第二蚀刻截止层 116、 N重惨杂隧穿结层 115、 P重惨 杂隧穿结层 114、 静电保护层之 P型层 113和静电保护层之 N型层 112构成静电保护 结构。 [0032] Next, an antistatic protection structure is fabricated: light is defined on the surface of the exposed N-type ohmic contact layer 112. The region, the electrode region and the electrostatic protection region are fabricated by a yellow light chemical technique, and the N-type layer 112 of the electrostatic protection layer of the light-emitting region is removed by etching, the P-type layer 113 of the electrostatic protection layer, the P-type heavy layer 114, and the N-type heavy The layer 115, the second etch stop layer 116, the N-type ohmic contact layer 117, and the N-type layer 112 of the electrostatic protection layer of the electrode region, the P-type layer 113 of the electrostatic protection layer, the P-type heavy layer 114, and the N-type heavy layer 115, the second etch-off layer 116, thereby forming an N-type current diffusion layer 118, a second etch-off layer 116, an N-heavy tunneling layer 115, a P-heavy tunneling layer 114, and an electrostatic protection layer The P-type layer 113 and the N-type layer 112 of the electrostatic protection layer constitute an electrostatic protection structure.
[0033] 最后, 制作 N型欧姆接触电极: 在电极区的 N型欧姆接触层 117上制作第一 N型 欧姆接触电极 141, 在静电保护区的静电保护层 112上制作第二 N型欧姆接触电极 142, 形成具有抗静电保护结构的发光二极管。  [0033] Finally, an N-type ohmic contact electrode is fabricated: a first N-type ohmic contact electrode 141 is formed on the N-type ohmic contact layer 117 of the electrode region, and a second N-type ohmic contact is formed on the electrostatic protection layer 112 of the electrostatic protection region. The electrode 142 forms a light emitting diode having an antistatic protection structure.
[0034] 很明显地, 本发明的说明不应理解为仅仅限制在上述实施例, 而是包括利用本 发明构思的所有可能的实施方式。  [0034] It is to be understood that the description of the present invention should not be construed as being limited to the above-described embodiments, but rather to all possible embodiments that utilize the inventive concepts.

Claims

权利要求书 claims
[权利要求 1] 具有静电保护的发光二极管外延片, 依次包括: 生长衬底; 由一 N型 半导体层和一 P型半导体层构成的静电保护层, 形成于所述生长衬底 之上; 隧穿结, 形成于所述静电保护层之上; 蚀刻截止层, 形成于所 述隧穿结之上; N型覆盖层, 形成于所述第二蚀刻截止层之上; 发光 层, 形成于所述 N型覆盖层之上; P型覆盖层, 形成于所述发光层之 [Claim 1] A light-emitting diode epitaxial wafer with electrostatic protection, including in order: a growth substrate; an electrostatic protection layer composed of an N-type semiconductor layer and a P-type semiconductor layer, formed on the growth substrate; tunnel A tie-through junction is formed on the electrostatic protective layer; an etching cutoff layer is formed on the tunnel junction; an N-type covering layer is formed on the second etching cutoff layer; a light-emitting layer is formed on the tunnel junction On the N-type cladding layer; P-type cladding layer, formed on the light-emitting layer
[权利要求 2] 根据权利要求 1所述的具有静电保护的发光二极管外延片, 其特征在 于: 所述构成静电保护层的 N型半导体层同吋作为 N型欧姆接触半导 体层。 [Claim 2] The light-emitting diode epitaxial wafer with electrostatic protection according to claim 1, characterized in that: the N-type semiconductor layer constituting the electrostatic protection layer also serves as an N-type ohmic contact semiconductor layer.
[权利要求 3] 根据权利要求 1所述的具有静电保护的发光二极管外延片, 其特征在 于: 所述静电保护层由 N-GaAs层和 P-GaAs层构成。 [Claim 3] The light-emitting diode epitaxial wafer with electrostatic protection according to claim 1, characterized in that: the electrostatic protection layer is composed of an N-GaAs layer and a P-GaAs layer.
[权利要求 4] 根据权利要求 1所述的具有静电保护的发光二极管外延片, 其特征在 于: 所述隧穿结由 P型重惨杂层和 N型重惨杂层构成, 其中 P重惨杂层 为 P++-GaAs, 其惨杂浓度≥1E19, N重惨杂层为 N++-GaAs, 其惨杂 浓度≥1E20。 [Claim 4] The light-emitting diode epitaxial wafer with electrostatic protection according to claim 1, characterized in that: the tunnel junction is composed of a P-type heavy impurity layer and an N-type heavy impurity layer, wherein the P-type heavy impurity layer The impurity layer is P++-GaAs, and its impurity concentration is ≥1E19. The N-heavy impurity layer is N++-GaAs, and its impurity concentration is ≥1E20.
[权利要求 5] 根据权利要求 1所述的具有静电保护的发光二极管外延片, 其特征在 于: 所述蚀刻截止层的厚度≥ 1000人。 [Claim 5] The light-emitting diode epitaxial wafer with electrostatic protection according to claim 1, characterized in that: the thickness of the etching cutoff layer is ≥ 1000 Å.
[权利要求 6] 根据权利要求 1所述的具有静电保护的发光二极管外延片, 其特征在 于: 在所述蚀刻截止层与 N型覆盖层之间还设有一 N型欧姆接触半导 体层。 [Claim 6] The light-emitting diode epitaxial wafer with electrostatic protection according to claim 1, characterized in that: an N-type ohmic contact semiconductor layer is further provided between the etching stop layer and the N-type cladding layer.
[权利要求 7] 根据权利要求 6所述的具有静电保护的发光二极管外延片, 其特征在 于: 在所述 N型欧姆接触半导体层与 N型覆盖层之间还设有一 N型电 流传输层, 其惨杂浓度≥5E17, 厚度≥2000nm。 [Claim 7] The light-emitting diode epitaxial wafer with electrostatic protection according to claim 6, characterized in that: an N-type current transmission layer is further provided between the N-type ohmic contact semiconductor layer and the N-type cladding layer, Its impurity concentration ≥5E17, thickness ≥2000nm.
[权利要求 8] 具有静电保护的发光二极管芯片, 包括: [Claim 8] A light-emitting diode chip with electrostatic protection, including:
发光部, 包含 P型覆盖层、 发光层和 N型覆盖层, 其上表面划分为出 光区、 电极区和静电保护区; The light-emitting part includes a P-type covering layer, a luminescent layer and an N-type covering layer, and its upper surface is divided into a light-emitting area, an electrode area and an electrostatic protection zone;
抗静电保护结构, 位于所述发光部的静电保护区之上, 依次包含蚀刻 截止层、 隧穿结、 静电保护层, 所述静电保护层由一 N型半导体层和 一 p型半导体层构成; 第一 N型欧姆接触电极, 形成于所述发光部的电极区之上; 第二 N型欧姆接触电极, 形成于所述静电保护层之上; Antistatic protection structure, located above the electrostatic protection zone of the light-emitting part, including etching in turn Cut-off layer, tunnel junction, electrostatic protection layer, the electrostatic protection layer is composed of an N-type semiconductor layer and a p-type semiconductor layer; the first N-type ohmic contact electrode is formed on the electrode area of the light-emitting part; A second N-type ohmic contact electrode is formed on the electrostatic protective layer;
当发光二极管受到静电逆向偏压吋, 所述抗静电保护结构工作, 电流 经由第一 N型欧姆接触电极、 静电保护结构至第二 N型欧姆接触电极When the light-emitting diode is subjected to electrostatic reverse bias, the anti-static protection structure works, and the current passes through the first N-type ohmic contact electrode and the electrostatic protection structure to the second N-type ohmic contact electrode.
, 避免静电逆向偏压过高造成所述发光层被破坏。 , to avoid damage to the light-emitting layer caused by excessive electrostatic reverse bias voltage.
根据权利要求 8所述的具有静电保护的发光二极管芯片, 其特征在于The light-emitting diode chip with electrostatic protection according to claim 8, characterized in that
: 所述构成静电保护层的 N型半导体层同吋作为 N型欧姆接触半导体 层。 : The N-type semiconductor layer constituting the electrostatic protection layer also serves as the N-type ohmic contact semiconductor layer.
根据权利要求 8所述的具有静电保护的发光二极管芯片, 其特征在于The light-emitting diode chip with electrostatic protection according to claim 8, characterized in that
: 所述静电保护层由 N-GaAs层和 P-GaAs层构成。 : The electrostatic protection layer is composed of an N-GaAs layer and a P-GaAs layer.
根据权利要求 8所述的具有静电保护的发光二极管芯片, 其特征在于The light-emitting diode chip with electrostatic protection according to claim 8, characterized in that
: 所述隧穿结由 P型重惨杂层和 N型重惨杂层构成, 其中 P重惨杂层为: The tunnel junction is composed of a P-type heavy impurity layer and an N-type heavy impurity layer, where the P-type heavy impurity layer is
P++-GaAs, 其惨杂浓度≥1E19, N重惨杂层为 N++-GaAs, 其惨杂浓 度≥ 20。 P++-GaAs, its impurity concentration ≥ 1E19, N-heavy impurity layer is N++-GaAs, its impurity concentration ≥ 20.
根据权利要求 8所述的具有静电保护的发光二极管芯片, 其特征在于 : 所述蚀刻截止层的厚度≥ 1000人。 The light-emitting diode chip with electrostatic protection according to claim 8, characterized in that: the thickness of the etching cutoff layer is ≥ 1000 Å.
根据权利要求 8所述的具有静电保护的发光二极管芯片, 其特征在于 : 在所述蚀刻截止层与 N型覆盖层之间还设有一 N型欧姆接触半导体 层, 其形成于所述 N型覆盖层的整个表面之上。 The light-emitting diode chip with electrostatic protection according to claim 8, characterized in that: an N-type ohmic contact semiconductor layer is further provided between the etching stop layer and the N-type covering layer, which is formed on the N-type covering layer. over the entire surface of the layer.
根据权利要求 13所述的具有静电保护的发光二极管芯片, 其特征在于The light-emitting diode chip with electrostatic protection according to claim 13, characterized in that
: 在所述 N型欧姆接触半导体层与 N型覆盖层之间还设有一 N型电流 传输层, 其惨杂浓度≥5E17, 厚度≥2000nm。 : An N-type current transmission layer is also provided between the N-type ohmic contact semiconductor layer and the N-type cladding layer, with an impurity concentration ≥5E17 and a thickness ≥2000nm.
具有静电保护的发光二极管的制作方法, 包括步骤: A method for manufacturing a light-emitting diode with electrostatic protection, including the steps:
1) 外延生长: 在生长衬底上外延生长形成外延片, 其自下而上包含 1) Epitaxial growth: Epitaxial growth is performed on the growth substrate to form an epitaxial wafer, which includes from bottom to top
: 生长衬底、 由一 N型半导体层和一 P型半导体层构成的静电保护层: Growth substrate, electrostatic protection layer composed of an N-type semiconductor layer and a P-type semiconductor layer
、 隧穿结、 蚀刻截止层、 N型覆盖层、 发光层和 P型覆盖层; 2) 转移生长衬底: 提供一导电基板, 通过一金属键合层与所述外延 片的 P型覆盖层一侧表面进行粘接, 移除所述生长衬底, 露出外延片 的表面; , tunnel junction, etching stop layer, N-type cladding layer, light-emitting layer and P-type cladding layer; 2) Transfer the growth substrate: Provide a conductive substrate, bond it to the P-type covering layer side surface of the epitaxial wafer through a metal bonding layer, remove the growth substrate, and expose the surface of the epitaxial wafer;
3) 制作抗静电保护结构: 在露出的外延片表面上定义出光区、 电极 区和静电保护区, 去除所述出光区和电极区的静电保护层、 隧穿结、 蚀刻截止层; 3) Make an antistatic protection structure: Define the light extraction area, electrode area and electrostatic protection zone on the surface of the exposed epitaxial wafer, and remove the electrostatic protection layer, tunnel junction and etching cutoff layer in the light extraction area and electrode area;
4) 制作电极: 在所述外延片表面的电极区制作第一 N型欧姆接触电 极, 在所述静电保护层上制作第二 N型欧姆接触电极, 所述蚀刻截止 层、 隧穿结、 静电保护层和第二 N型欧姆接触电极构成抗静电保护结 构, 当发光二极管受到静电逆向偏压吋, 所述抗静电保护结构工作, 电流经由第一 N型欧姆接触电极、 静电保护结构至第二 N型欧姆接触 电极, 避免静电逆向偏压过高造成所述发光层被破坏。 4) Preparation of electrodes: Make a first N-type ohmic contact electrode in the electrode area on the surface of the epitaxial wafer, make a second N-type ohmic contact electrode on the electrostatic protective layer, and make the etching stop layer, tunnel junction, electrostatic The protective layer and the second N-type ohmic contact electrode form an anti-static protection structure. When the light-emitting diode is subjected to electrostatic reverse bias, the anti-static protection structure works, and the current passes through the first N-type ohmic contact electrode and the electrostatic protection structure to the second The N-type ohmic contact electrode prevents the light-emitting layer from being damaged due to excessive electrostatic reverse bias.
PCT/CN2017/085659 2016-06-01 2017-05-24 Light emitting diode with electrostatic protection function and manufacturing method therefor WO2017206772A1 (en)

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Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106025017B (en) * 2016-06-01 2019-01-15 天津三安光电有限公司 Light emitting diode and preparation method thereof with electrostatic protection
CN108400133A (en) * 2018-05-11 2018-08-14 广东工业大学 A kind of the deep ultraviolet LED epitaxial structure and preparation method of same side structure
CN109065687A (en) * 2018-07-17 2018-12-21 佛山市国星半导体技术有限公司 A kind of pressure stabilizing LED epitaxial structure and preparation method thereof, LED chip and LED lamp tube
CN109166830B (en) * 2018-08-27 2020-04-17 安徽星宇生产力促进中心有限公司 Epitaxial wafer for diode
CN112510130A (en) * 2020-12-02 2021-03-16 武汉大学 Design and manufacturing method of blue light Mico-LED chip with flip-chip structure

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100593942B1 (en) * 2005-04-30 2006-06-30 삼성전기주식회사 Group iii-nitride light emitting device having esd protecting function
CN1945861A (en) * 2005-10-08 2007-04-11 璨圆光电股份有限公司 LED chip
US20070114541A1 (en) * 2003-02-14 2007-05-24 Cree, Inc. Light emitting diode wth degenerate coupling structure
US20110017972A1 (en) * 2009-07-22 2011-01-27 Rfmd (Uk) Limited Light emitting structure with integral reverse voltage protection
US20110260210A1 (en) * 2010-04-23 2011-10-27 Applied Materials, Inc. Gan-based leds on silicon substrates with monolithically integrated zener diodes
CN102308397A (en) * 2009-02-10 2012-01-04 昭和电工株式会社 Light-emitting diode, and light-emitting diode lamp
CN106025017A (en) * 2016-06-01 2016-10-12 天津三安光电有限公司 Light emitting diode with electrostatic protection structure and manufacturing method therefor

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100631898B1 (en) * 2005-01-19 2006-10-11 삼성전기주식회사 Gallium nitride based light emitting device having ESD protection capability and method for manufacturing same
CN101281946A (en) * 2008-05-21 2008-10-08 旭丽电子(广州)有限公司 LED structure capable of being applied to AC cycle as well as drive method thereof
CN204042621U (en) * 2014-09-17 2014-12-24 珠海绿金能控科技有限公司 A kind of Novel LED tunnel lamp

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070114541A1 (en) * 2003-02-14 2007-05-24 Cree, Inc. Light emitting diode wth degenerate coupling structure
KR100593942B1 (en) * 2005-04-30 2006-06-30 삼성전기주식회사 Group iii-nitride light emitting device having esd protecting function
CN1945861A (en) * 2005-10-08 2007-04-11 璨圆光电股份有限公司 LED chip
CN102308397A (en) * 2009-02-10 2012-01-04 昭和电工株式会社 Light-emitting diode, and light-emitting diode lamp
US20110017972A1 (en) * 2009-07-22 2011-01-27 Rfmd (Uk) Limited Light emitting structure with integral reverse voltage protection
US20110260210A1 (en) * 2010-04-23 2011-10-27 Applied Materials, Inc. Gan-based leds on silicon substrates with monolithically integrated zener diodes
CN106025017A (en) * 2016-06-01 2016-10-12 天津三安光电有限公司 Light emitting diode with electrostatic protection structure and manufacturing method therefor

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