WO2017202244A1 - 一种图像增强方法和装置、计算机存储介质 - Google Patents

一种图像增强方法和装置、计算机存储介质 Download PDF

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Publication number
WO2017202244A1
WO2017202244A1 PCT/CN2017/085047 CN2017085047W WO2017202244A1 WO 2017202244 A1 WO2017202244 A1 WO 2017202244A1 CN 2017085047 W CN2017085047 W CN 2017085047W WO 2017202244 A1 WO2017202244 A1 WO 2017202244A1
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row
image
smoothing
pixel
data
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PCT/CN2017/085047
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English (en)
French (fr)
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张顺
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深圳市中兴微电子技术有限公司
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T5/00Image enhancement or restoration
    • G06T5/20Image enhancement or restoration using local operators
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T5/00Image enhancement or restoration
    • G06T5/73Deblurring; Sharpening
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T5/00Image enhancement or restoration
    • G06T5/70Denoising; Smoothing

Definitions

  • the present invention relates to the field of image processing, and in particular, to an image enhancement method and apparatus, and a computer storage medium.
  • Image enhancement technology is a method that selectively highlights features of interest in an image or suppresses (masks) certain unwanted features in the image to match the image to visually corresponding characteristics.
  • Common image enhancement methods include image smoothing and image sharpening.
  • the purpose of image smoothing is to eliminate image noise.
  • the commonly used algorithms are mean filtering and median filtering.
  • the purpose of image sharpening is to highlight the edge contour of the object and facilitate the recognition of targets.
  • Common algorithms include gradient method, high-pass filtering, mask matching method, Statistical difference method, etc.
  • Existing image enhancement methods have problems of inaccurate positioning and inflexible processing.
  • the main object of the embodiments of the present invention is to provide an image enhancement method and apparatus, and a computer storage medium, which improve the reading rate and image processing efficiency of image pixels.
  • An embodiment of the present invention provides an image enhancement processing method, where the method includes:
  • the pixel matrix block When determining that the image enhancement mode is the sharpening processing mode, the pixel matrix block is sharpened according to a Laplacian and an enhancement coefficient; and when the image enhancement mode is selected as a smoothing processing mode, according to a smoothing matrix and a smoothing intensity pair The pixel matrix block is subjected to smoothing processing;
  • the pixel matrix block after the image enhancement processing is merged to obtain an image enhancement processed image.
  • the reading the source image and buffering the row data of each component of the source image includes:
  • Reading the row data of each component of the source image determining that the row number of the row data is odd or even, and when the number of rows is an odd number, the first row buffer receives the row data, and when the number of rows is an even number, the second row buffer receives the row data;
  • the first row buffer or the second row buffer starts to output the buffered row data into the register
  • the row data output by the first row buffer or the second row buffer is output by the register.
  • the sharpening the pixel matrix block according to a Laplacian and a enhancement coefficient including:
  • the output bit width of the sharpening value is limited according to a sharpening threshold, and a sharpening result of the central pixel is obtained, and peripheral pixels of the pixel matrix block are outputted as original values.
  • the smoothing processing the pixel matrix block according to the smoothing matrix and the smoothing strength includes:
  • the output bit width of the smoothed value is limited according to a smoothing threshold, and a smoothing result of the central pixel is obtained, and peripheral pixels of the pixel matrix block are outputted as original values.
  • the pixel matrix block after the combined image enhancement processing obtains an image enhancement processing image, including:
  • the pixel matrix blocks after image enhancement processing are merged, and the merged pixel matrix blocks are output synchronously with the line data of other components of the source image to obtain an image enhancement processed image.
  • An embodiment of the present invention further provides an image enhancement processing apparatus, where the apparatus includes: a RAM row buffer unit, a read RAM unit, an enhancement logic unit, and a merging unit;
  • a RAM line buffer unit configured to read a source image and buffer line data of each component of the source image
  • Reading the RAM unit configured to read the row data of the component to be processed, and obtain a pixel matrix block of a set size according to the row data of the adjacent component to be processed;
  • the enhancement logic unit is configured to: when determining that the image enhancement mode is the sharpening processing mode, sharpening the pixel matrix block according to a Laplacian and an enhancement coefficient; and determining the image enhancement mode to select a smoothing processing mode, according to Smoothing the matrix and performing smoothing on the pixel matrix block;
  • a merging unit configured to merge the image matrix processing block to obtain an image enhancement processing image.
  • the RAM row buffer unit includes a first row buffer, a second row buffer, and a register
  • the first line buffer is configured to read row data of the source image, and determine the number of rows of the row data is An odd or even number, when the number of rows is an odd number, receiving and buffering the row data; and, when the second row buffer receives the first pixel of the next row of data, outputting the buffered row data to the register;
  • the second line buffer is configured to read row data of the source image, determine that the number of rows of the row data is odd or even, and when the number of rows is even, receive and cache the row data; and receive the buffer in the first row When the first pixel of the next row of data is output, the saved row data is output to the register;
  • the register is configured to receive row data of the first row buffer and the second row buffer output, and output to the read RAM unit.
  • the enhancement logic unit includes: a sharpening processing sub-unit, configured to: calculate a gradient value of the pixel matrix block according to a Laplacian; and calculate according to the gradient value and the enhancement coefficient a sharpening value of a central pixel in the pixel matrix block; limiting an output bit width of the sharpening value according to a sharpening threshold, obtaining a sharpening result of the central pixel, wherein a peripheral pixel of the pixel matrix block is an original value Output.
  • a sharpening processing sub-unit configured to: calculate a gradient value of the pixel matrix block according to a Laplacian; and calculate according to the gradient value and the enhancement coefficient a sharpening value of a central pixel in the pixel matrix block; limiting an output bit width of the sharpening value according to a sharpening threshold, obtaining a sharpening result of the central pixel, wherein a peripheral pixel of the pixel matrix block is an original value Output.
  • the enhancement logic unit includes: a smoothing processing unit, configured to: smooth a central pixel in the pixel matrix according to a smoothing matrix and a smoothing intensity to obtain a smoothing value; and limit the smoothing value according to the smoothing threshold
  • the output bit width is obtained, and a smoothing result of the center pixel is obtained, and peripheral pixels of the pixel matrix block are output as original values.
  • the merging unit is specifically configured to merge the pixel matrix blocks after the image enhancement processing, and output the merged pixel matrix blocks in synchronization with the row data of other components of the source image to obtain an image enhancement processing image.
  • the smoothing processing unit may be implemented by a central processing unit (CPU), a digital signal processor (DSP), or a field-programmable gate array (FPGA) when performing processing. .
  • Embodiments of the present invention provide a computer storage medium in which a computer executable is stored
  • the computer executable instruction configuration executes the image enhancement processing method described above.
  • the image enhancement scheme provided by the embodiment of the present invention is to read a source image and buffer line data of each component of the source image; the read row data of the to-be-processed component is obtained according to row data of adjacent to-be-processed components.
  • a fixed-size pixel matrix block an image enhancement mode is selected according to image enhancement processing requirements, and when the image enhancement mode is a sharpening processing mode, a Laplacian operator and a enhancement coefficient are selected, according to a Laplacian operator and a enhancement coefficient pair
  • the pixel matrix block performs sharpening processing; when the image enhancement mode is the selection smoothing processing mode, the smoothing matrix and the smoothing intensity are selected, and the pixel matrix block is smoothed according to the smoothing matrix and the smoothing intensity;
  • the pixel matrix block obtains an image enhancement processed image. Cache the line data of the source image by line buffering to improve the image pixel reading rate; improve the image processing efficiency and the flexibility of image enhancement processing through the optional sharpening matrix, smoothing matrix and configura
  • FIG. 1 is a schematic flowchart of an image enhancement processing method according to an embodiment of the present invention.
  • FIG. 2 to FIG. 6 are schematic diagrams showing a flow of processing a source image of a 4 ⁇ 4 format by using an image enhancement processing method according to an embodiment of the present invention
  • FIG. 7 is a schematic diagram of a 3 ⁇ 3 matrix block to be subjected to image enhancement processing according to an embodiment of the present invention.
  • FIG. 8 is a schematic structural diagram of an image enhancement processing apparatus according to an embodiment of the present disclosure.
  • FIG. 9 is a schematic structural diagram of an apparatus for image enhancement processing according to an embodiment of the present invention.
  • the source image is read, the row data of each component of the source image is buffered; the row data of the component to be processed is read, and the setting is obtained according to the row data of the adjacent component to be processed.
  • a pixel matrix block of a size when determining that the image enhancement mode is a sharpening processing mode, sharpening the pixel matrix block according to a Laplacian and an enhancement coefficient; determining an image enhancement mode
  • the mode is the smoothing processing mode
  • the pixel matrix block is smoothed according to the smoothing matrix and the smoothing intensity; and the image matrix is obtained by combining the image enhancement processing.
  • An image enhancement processing method provided by an embodiment of the present invention is as shown in FIG. 1 , and the method includes:
  • Step 101 Read a source image, and buffer line data of each component of the source image.
  • Step 102 Read the row data of the component to be processed, and obtain a pixel matrix block of a set size according to row data of the adjacent component to be processed;
  • Step 103 When determining that the image enhancement mode is the sharpening processing mode, sharpening the pixel matrix block according to the Laplacian and the enhancement coefficient; and determining the image enhancement mode to be the smoothing processing mode, according to the smoothing matrix and the smoothing intensity pair The pixel matrix block is smoothed;
  • Step 104 Combine the pixel matrix block after the image enhancement processing to obtain an image enhancement processing image.
  • the source image may be an image screen obtained by photographing a mobile phone camera, a camera, or the like.
  • the source image includes several components, and the row data of each component of the source image needs to be separately buffered, and the row data includes several pixels.
  • each component of the image includes: a component to be processed and other components, for example, the image of the source image is a YUV format, including a Y component, a U component, and a V component; wherein, the U component and the V component represent chrominance, It is configured to specify the color of the pixel; the Y component represents the brightness, that is, the grayscale value, which is the component to be processed, and needs to be image-enhanced.
  • the component to be processed is a component of the luminance component, and the luminance component typically ranges from 0.0 (dark) to 1.0 (all white).
  • the step 101 is used to buffer the row data of the Y component, the U component, and the V component of the source image, and the row data of the component to be processed is read from the row data of each component by step 102, and the pixel is formed according to the row data of the adjacent component to be processed.
  • the matrix block is further subjected to image enhancement processing by the processing of the components to be processed in steps 103 and 104, that is, the line data of the Y component, and after the Y component processing is completed, The result of the Y component processing is output in synchronization with the U component and the V component, and the processed image is obtained.
  • step 101 the row data of each component of the source image is buffered, and the first row cache or the second row cache is used to cache data according to the parity of the row number of the row data, and the first row cache and the second row cache read.
  • the line data is buffered and output to the register, and the line data is output by the register. Specifically include:
  • the first line buffer or the second line buffer reads the line pixels of the source image, determines whether the number of lines of the line data of the source image is odd or even, and when the number of lines is odd, the first line buffers the received line data for buffering, and the number of lines is In the even case, the second line buffers the received line data for buffering;
  • the first row buffer or the second row buffer receives the first pixel of the next row of data, and the second row buffer or the first row buffer outputs the buffered row data to the register;
  • the row data output by the first row buffer or the second row buffer is output by the register.
  • the first row buffer or the second row buffer receives the first pixel of the next row of data, and the second row buffer or the first row cache outputs the buffered row data to the register, including the following two cases:
  • the first row buffer receives the first pixel of the next row of data
  • the second row cache outputs the buffered row data to the register
  • the second row buffer receives the first pixel of the next row of data
  • the first row cache is cached
  • the line data is output to the register.
  • the output of the first line buffer and the second line of cache data is alternated. It should be noted that this process does not include the case where the first row buffer receives the first pixel of the first row of data, because the row data is not cached in the second row cache at this time.
  • m represents the number of pixels in the horizontal direction, that is, the line resolution
  • n represents the number of pixels in the vertical direction.
  • the source image is a YUV format, and the pixels of the Y component, the U component, and the V component are respectively read, and the pixel data of the cache source image is described below by taking the pixel of the Y component as an example, and specifically includes:
  • Step 1011 As shown in FIG. 2, the first row cache reads the first pixel number of the first row of data. According to A1, it is determined that the number of rows is an odd number, and the first row buffer receives the first row of data and caches it;
  • Step 1012 As shown in FIG. 3, the second row cache reads the first pixel data B1 of the second row of data, determines that the number of rows is even, and the second row buffer starts to receive the second row of data and caches;
  • the pixel data A1 of the first row of data in the first row buffer is output to the register;
  • the first line of data is input to the register
  • Step 1013 As shown in FIG. 4, the first row cache reads the first pixel C1 of the third row of data, determines that the number of rows is an odd number, and the first row buffer starts to receive the third row of data and caches;
  • the register When the first row buffer receives the first pixel C1 of the third row of data, the register outputs the first row of data to the read RAM unit, and the pixel data B1 of the second row of data in the second row buffer is output to the register;
  • the second line of data in the second line of buffer is input to the register
  • Step 1014 As shown in FIG. 5, the second row cache reads the first pixel D1 of the fourth row of data, determines that the number of rows is even, and the second row buffer starts to receive the fourth row of data and caches;
  • the register When the second row buffer receives the first pixel data D1 in the fourth row of data, the register outputs the second row of data to the read RAM unit, and the pixel data C1 of the third row of data in the first row buffer is input into the register;
  • the third line of data is input to the register
  • Step 1015 As shown in FIG. 6, the register outputs the third row of data, and the second row buffer outputs the fourth row of data to the register, and finally is output by the register.
  • FIGS. 5 and 6 are pixel matrix blocks subjected to image enhancement processing.
  • the first row data, the second row data, the third row data, and the fourth row data in the above steps are
  • the row data of the Y component of the source image respectively includes 4 pixels, wherein the first row of data includes pixel A1, pixel A2, pixel A3, and pixel A4, and the second row of data includes: pixel B1, pixel B2, pixel B3, and pixel.
  • the third row of data includes: a pixel C1, a pixel C2, a pixel C3, and a pixel C4.
  • the fourth row of data includes: a pixel D1, a pixel D2, a pixel D3, and a pixel D4.
  • the image for the YUV format only needs to process the luminance signal Y component, but does not process the chrominance signal U component and the V component, but still needs to buffer the line data of the source image through the above steps 1011 to 1015.
  • the pixels of the Y component are synchronously output together with the U component and the V component corresponding thereto.
  • steps 1011-1015 only the first row buffer and the second row buffer are used to sequentially read the row data and cache, and then the data is input into the register and output by the register. This is not limited.
  • the steps of the method By using the above method, only the first row buffer and the second row buffer are used to realize the input of the odd and even rows of the pixel, thereby reducing the number of RAMs, thereby saving logic resources and improving the image pixel reading rate.
  • the read RAM unit reads the row data of the component to be processed from the row data of each component, obtains a pixel matrix block of a set size according to the adjacent row data, and outputs the pixel matrix block to Enhance the logical unit.
  • the row data of the source image is composed of one pixel
  • the pixel matrix block of the set size is a matrix block of a ⁇ b format, including a ⁇ b pixels.
  • the 4 ⁇ 4 source image shown in FIG. 2 includes pixels A1, A2, A3, A4, B1, B2, B3, B4, C1, C2, C3, C4, D1, D2, D3, D4, wherein the source image includes The following four 3 ⁇ 3 pixel matrix blocks:
  • a 3x3 pixel matrix block composed of A1, A2, A3, B1, B2, B3, C1, C2, C3;
  • a 3x3 pixel matrix block composed of A2, A3, A4, B2, B3, B4, C2, C3, C4;
  • a 3x3 pixel matrix block composed of B1, B2, B3, C1, C2, C3, D1, D2, and D3;
  • a 3x3 pixel matrix block composed of B2, B3, B4, C2, C3, C4, D2, D3, and D4.
  • step 103 the user selects an image enhancement mode according to the image enhancement processing request, and the image enhancement mode includes: a sharpening processing mode and a smoothing processing mode.
  • the enhancement logic unit receives the image enhancement mode result selected by the user, determines that the image enhancement mode is the sharpening processing mode, and then sharpens the source image, and determines that the image enhancement mode is the smoothing processing mode, and then smoothes the source image.
  • the specific method is as follows:
  • the pixel matrix block is sharpened according to the Laplacian and the enhancement coefficient, and specifically includes:
  • the image enhancement mode is the sharpening processing mode
  • receiving a Laplacian input and a enhancement coefficient input by the user the user selects the sharpening Laplacian operator according to the desired sharpening requirement of the source image.
  • the enhancement factor and input through the human machine interface;
  • the user selects the sharpening threshold according to the sharpening value and the desired sharpening requirement of the source image, and inputs through the human machine interface.
  • the sharpened pixel matrix block is obtained, wherein the center pixel is a sharpened pixel, and the peripheral pixels are original values.
  • the sharpening processing mode provided by the embodiment of the present invention utilizes the advantages of the edge precise positioning of the Laplacian operator to perform image sharpening, and solves the problem of inaccurate positioning compared with the prior art gradient algorithm.
  • the pixel moment is based on the smoothing matrix and the smoothing intensity
  • the tiles are smoothed, including:
  • the user When determining that the image enhancement mode is the smoothing processing mode, receiving a smoothing matrix and smoothing intensity input by the user; the user selects the smoothing smoothing matrix and the smoothing intensity according to the desired smoothing requirement of the source image, and inputs through the human-machine interface;
  • the user selects the sharpening threshold according to the smoothed value and the desired smoothing requirement of the source image, and inputs through the human machine interface.
  • the smoothed pixel matrix block is obtained, wherein the center pixel is a smoothed pixel, and the peripheral pixels are original values.
  • the smoothing processing mode provided by the embodiment of the present invention utilizes the advantages of simple structure of the smoothing matrix and easy implementation of the algorithm to perform image smoothing processing, thereby improving the flexibility of the algorithm.
  • Sharpening specifically includes:
  • Step 301 The user selects a Laplacian operator according to the sharpening requirement of the source image (Laplacian operator)
  • H 1 is the original Laplacian operator
  • H 2 and H 3 are the transformed Laplacian operators
  • the degree of sharpening of H 1 is ⁇ sharpening degree of H 2 ⁇ sharpening degree of H 3
  • the Laplacian operator deformation method is: when the degree of sharpening processing needs to be enhanced, multiply h5 in the Laplacian operator by 2, and adjust h 1 , h 2 , h 3 , h 4 , h 6 , h 7 , h 8 , h 9 , meet the following conditions:
  • h 1 +h 2 +h 3 +h 4 +h 5 +h 6 +h 7 +h 8 +h 9 0.
  • the user can select the Laplacian operator used for the sharpening process based on the image data actually processed.
  • Step 302 The enhancement logic unit receives the input of the user, and uses the Laplacian operator to calculate the gradient value of the current pixel of the pixel matrix block, as shown in the following formula:
  • the gradient value is obtained by the following formula:
  • Step 303 The enhancement logic unit combines the gradient value to calculate a sharpening value of the central pixel Z5 in the pixel matrix block, as shown in the following formula:
  • f1 is the result of obtaining the absolute value and the average value of the gradient value
  • f2 is the final sharpening value
  • enhancement_ratio is the enhancement coefficient, which ranges from 0 to 255, represented by an 8-bit binary number, and the user can enhance the processing result according to the image. Adjust it.
  • the enhancement coefficient is used to correct f1 to achieve the purpose of adaptively adjusting the sharpening intensity.
  • Step 304 The enhancement logic unit performs a sharpening process on the central pixel Z5 in the pixel matrix block according to the attribute of the gradient value f0 and the sharpening value to obtain a sharpening result f3 (Z5);
  • Step 305 The enhancement logic unit receives the sharpening threshold of the user input, limits the output bit width of the sharpening result according to the sharpening threshold, obtains the center pixel after the sharpening process, and the peripheral pixels are output according to the original value, and are sharpened.
  • the resulting pixel matrix block is used as the final output.
  • the user selects a value from 0 to 255 as a sharpening threshold to control the sharpening result f3 (Z5) based on the actually processed image data, and obtains a sharpening result of the sharpened central pixel Z5.
  • Step 311 Select a smoothing processing mode for the source image, and the user selects the smoothing smoothing matrix and the smoothing intensity according to the smoothing requirement of the source image;
  • smoothing is performed on global image processing, and a smoothing matrix is selected.
  • the degree of smoothing of L 1 is less than the degree of smoothing of L 2 ⁇ the smoothing degree of L 3 ;
  • the smoothing intensity is also selected according to the smoothing requirement of the source image, and the smoothing intensity ranges from 0 to 127.
  • Step 312 The enhancement logic unit receives the user's input, and smoothes the center pixel Z5 of the pixel matrix block by using a smoothing matrix and smoothing intensity to obtain a smoothing result S;
  • h is the smoothing intensity and the range of h is (0 to 127).
  • Step 313 The enhancement logic unit receives the smoothing threshold of the user input, limits the output bit width of the smoothing result according to the smoothing threshold, obtains the sharpened central pixel, and outputs the peripheral pixel according to the original value, and obtains the smoothed pixel matrix.
  • the block is the final output.
  • the user selects a value from 0 to 255 as a smoothing threshold to control the smoothing result S based on the actually processed image data, and obtains a smoothed result of the smoothed central pixel Z5.
  • the selected Laplacian, enhancement coefficient, smoothing matrix, and smoothing intensity are first configured and saved before the image enhancement processing, and the user is based on the image enhancement processing.
  • the source image to be processed selects a Laplacian and enhancement coefficients, or a smoothing matrix and smoothing intensity.
  • the pixels B2, B3, C2, and C3 are image-enhanced and output as images.
  • the above is a sharpening process and a smoothing process for a pixel matrix block.
  • the above method is used to sharpen or smooth all the pixel matrix blocks included in the source image, and the pixel matrix block after sharpening or smoothing is also required. Combine and finally get the smoothed image.
  • step 104 the pixel matrix blocks after image enhancement processing are merged, and the merged pixel matrix blocks are output synchronously with the line data of other components of the source image to obtain an image enhancement processed image.
  • image enhancement processing is performed on other pixels except the peripheral pixels in the source image, and the peripheral pixels are output according to the original value, and the combined pixel matrix block and the source image are outputted.
  • the line data of the components is output synchronously, and an image enhancement processed image is obtained.
  • an embodiment of the present invention further provides an image enhancement processing apparatus.
  • the apparatus includes: a RAM row buffer unit 411, a read RAM unit 412, an enhancement logic unit 413, and a merging unit 414;
  • a RAM line buffer unit 411 configured to read a source image and buffer line data of each component of the source image
  • the read RAM unit 412 is configured to read row data of the component to be processed, and obtain a pixel matrix block of a set size according to row data of the adjacent component to be processed;
  • the enhancement logic unit 413 is configured to: when the image enhancement mode is determined to be a sharpening processing mode, the pixel matrix block is sharpened according to a Laplacian and an enhancement coefficient; and when the image enhancement mode is determined to be a smoothing mode, Smoothing the pixel matrix block according to a smoothing matrix and a smoothing intensity;
  • the merging unit 414 is configured to merge the pixel matrix blocks after the image enhancement processing to obtain a map Like enhancement processing images.
  • the RAM line buffer unit 411 includes a first line buffer 4111, a second line buffer 4112, and a register 4113;
  • the first line buffer 4111 is configured to read row data of the source image, determine that the number of rows of the row data is odd or even, and when the number of rows is odd, receive and cache the row data; and, in the second row cache 4112 receives the first row of data of the next row, the buffered row data is output to the register 4113;
  • the second line buffer 4112 is configured to read row data of the source image, determine that the number of rows of the row data is odd or even, and when the number of rows is even, receive and cache the row data; and, in the first row cache 4111 receives the first pixel of the next row of data, the saved row data is output to the register 4113;
  • the register 4113 is configured to receive the row data sent by the first row buffer 4111 and the second row buffer 4112 and output the data to the read RAM unit 412.
  • the first line buffer 4111 or the second line buffer 4112 reads the row pixels of the source image, determines whether the number of rows of the row data of the source image is odd or even, and when the number of rows is odd, the first row buffer 4111 receives the row. The data is cached, and when the number of rows is even, the second row buffer 4112 receives the row data for buffering;
  • the first row buffer 4111 or the second row buffer 4112 receives the first pixel of the next row of data, the second row buffer 4112 or the first row buffer 4111 outputs the buffered row data to the register 4113;
  • the row data output by the first row buffer 4111 or the second row buffer 4112 is output by the register 4113.
  • the first row buffer 4111 or the second row buffer 4112 receives the first pixel of the next row of data, and the second row buffer 4112 or the first row buffer 4111 outputs the buffered row data to the register 4113, including the following two types.
  • the first line buffer 4111 receives the first pixel of the next line of data, and the second line buffer 4112 will be slowed.
  • the stored row data is output to the register 4113; and, the second row buffer 4112 receives the first pixel of the next row of data, and the first row buffer 4111 outputs the buffered row data to the register 4113.
  • the output of the first line buffer 4111 and the second line buffer 4112 data are alternately completed.
  • the first row buffer 4111 does not include the first pixel of the first row of data in this process, because the row data is not cached in the second row buffer 4112 at this time.
  • the read RAM unit 412 is configured to sequentially read the row data of the component to be processed, obtain a pixel matrix block of a set size from the adjacent row data, and output the pixel matrix block to the enhancement logic unit 413.
  • the row data includes pixels
  • the pixel matrix block of the set size is a matrix block of a ⁇ b format, including a ⁇ b pixels.
  • the enhancement logic unit 413 includes a sharpening processing sub-unit 4131 and a smoothing processing sub-unit 4132.
  • the sharpening processing sub-unit 4131 is specifically configured to: receive a Laplacian input and a enhancement coefficient input by a user; calculate a gradient value of the pixel matrix block according to the Laplacian; according to the gradient value and The enhancement coefficient calculates a sharpening value of a central pixel in the pixel matrix block; receives a sharpening threshold input by a user, and limits an output bit width of the sharpening value according to the sharpening threshold to obtain the central pixel As a result of the sharpening, the peripheral pixels of the pixel matrix block are output as original values.
  • the Laplacian operator and the enhancement coefficient are: the Laplacian operator and the enhancement coefficient of the sharpening process selected by the user according to the desired sharpening requirement of the source image, and input through the human-machine interface, The sharpening processing subunit 4131 receives.
  • the sharpening threshold is that the user selects a value from 0 to 255 as a sharpening threshold according to the actually processed image data, and inputs it through the human-machine interface, and receives it by the sharpening processing sub-unit 4131.
  • the smoothing processing unit 4132 is configured to: receive a smoothing matrix and smoothing intensity input by the user; perform smoothing processing on the central pixel in the pixel matrix according to the smoothing matrix and the smoothing intensity to obtain a smoothed value; and receive a smoothing threshold of the user input, And limiting an output bit width of the smoothing value according to the smoothing threshold, and obtaining a smoothing result of the central pixel, a week of the pixel matrix block
  • the side pixels are output as they are.
  • the smoothing matrix and the smoothing intensity are: the smoothing smoothing matrix and the smoothing intensity of the smoothing process selected by the user according to the desired smoothing requirement of the source image, and are input by the smoothing processing sub-unit 4132 through the human-machine interface input.
  • the smoothing threshold is that the user selects a value in the range of 0 to 255 as a smoothing threshold according to the actually processed image data, and receives the result through the human-machine interface, and is received by the smoothing processing unit 4132.
  • the merging unit 414 is specifically configured to: receive all image enhancement processed pixel matrix blocks in the source image, merge the image enhancement processed pixel matrix blocks; and, combine the merged pixel matrix blocks, ie, the components to be processed
  • the image enhancement processing result is output in synchronization with the line data of other components of the source image, and the output result is an image enhancement processing image.
  • image enhancement processing is performed on all pixels except the peripheral pixels in the source image, and the peripheral pixels are outputted according to the original value, thereby obtaining an image after the image enhancement processing of the component to be processed.
  • an apparatus for image enhancement processing includes: an image enhancement processing apparatus 11, a register configuration module 12, a configuration synchronization module 13, and a clock gating module 14;
  • the image enhancement processing device 11 is configured to read the source image, buffer the row data of each component of the source image, read the row data of the component to be processed, and obtain the pixel matrix block of the set size according to the row data of the adjacent component to be processed.
  • the image enhancement mode is the sharpening processing mode
  • the pixel matrix block is sharpened according to a Laplacian and an enhancement coefficient
  • the image enhancement mode is selected as the smoothing processing mode, according to the smoothing matrix and the smoothing intensity And smoothing the pixel matrix block; and combining the image enhancement processed image matrix block to obtain an image enhancement processed image.
  • the image enhancement processing device is shown in FIG.
  • the register configuration module 12 is configured to configure and save relevant parameters of the smoothing mode and the sharpening mode at the initial startup, including a Laplacian, a smoothing matrix, a smoothing intensity, an enhancement strength, a sharpening threshold, a smoothing threshold, etc. Also configured to configure the startup of the image enhancement processing device Wait;
  • the synchronization module 13 is configured to perform synchronous configuration on the image enhancement processing device and the register configuration module;
  • the clock gating module 14 is configured to control the opening or closing of each module; for example, the device that sets the image enhancement processing receives the source image to be processed, and then starts each module of the device, and the source image to be processed is processed and output. , turn off the device.
  • the configuration of the register configuration module 12 includes: configuring an enhancement algorithm and related parameters, and starting a function module, and the configuration synchronization module 13 synchronously configures the image enhancement processing device 11 and the register configuration module 12, such as a smoothing matrix. Synchronous configuration such as smoothing strength.
  • the device provided by the embodiment of the present invention receives the source image, and sequentially caches the row data of each component of the image through the RAM row buffer unit of the image enhancement processing device, and uses the read RAM unit of the image enhancement processing device according to the row data of the adjacent component to be processed.
  • the pixel matrix block is sent to an enhancement logic unit of the image enhancement processing device, and the enhancement logic unit performs image enhancement processing by using an image enhancement algorithm, including: the enhancement logic unit determines that the image enhancement mode is a sharpening processing mode And performing a sharpening process on the pixel matrix block according to a Laplacian and an enhancement coefficient; and when determining that the image enhancement mode is a smoothing processing mode, smoothing the pixel matrix block according to a smoothing matrix and a smoothing intensity;
  • the enhanced pixel matrix block is input to the merging unit, and the merging unit merges the image matrix blocks after the image enhancement processing, and outputs the combined pixel matrix block and the line data of other components simultaneously, and outputs the final result as an image. Enhance the processed image.
  • the image enhancement algorithm in the embodiment of the invention performs the input and output of data through the valid_ready mechanism, and effectively performs the connection of the upstream and downstream data input and output.
  • embodiments of the present invention can be provided as a method, system, or computer program product. Accordingly, the present invention may employ hardware embodiments, software embodiments, or junctions. In the form of an embodiment of the software and hardware aspects. Moreover, the invention can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) including computer usable program code.
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device.
  • the apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.
  • the number of rows of each component of the source image is buffered by reading the source image.
  • the pixel matrix block of the set size is obtained according to the row data of the adjacent component to be processed; the image enhancement mode is selected according to the image enhancement processing requirement, and the image enhancement mode is the sharpening processing mode.

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Abstract

公开了一种图像增强处理方法,读取源图像,缓存所述源图像各分量的行数据;读取待处理分量的所述行数据,根据相邻的待处理分量的行数据获得设定大小的像素矩阵块;确定图像增强模式为锐化处理模式时,根据拉普拉斯算子和增强系数对所述像素矩阵块进行锐化处理;确定图像增强模式为选择平滑处理模式时,根据平滑矩阵和平滑强度对所述像素矩阵块进行平滑处理;合并图像增强处理后的所述像素矩阵块,获得图像增强处理图像。还公开了一种图像增强处理装置、计算机存储介质。

Description

一种图像增强方法和装置、计算机存储介质
相关申请的交叉引用
本申请基于申请号为201610362792.6、申请日为2016年05月26日的中国专利申请提出,并要求该中国专利申请的优先权,该中国专利申请的全部内容在此引入本申请作为参考。
技术领域
本发明涉及图像处理领域,尤其涉及一种图像增强方法和装置、计算机存储介质。
背景技术
图像增强技术是通过一定方法有选择的突出图像中感兴趣的特征或者抑制(掩盖)图像中某些不需要的特征,使图像与视觉相应特性相匹配。常用的图像增强方法包括图像平滑和图像锐化。图像平滑的目的在于消除图像噪声,常用的算法有均值滤波、中值滤波;图像锐化的目的在于突出物体的边缘轮廓,便于识别目标,常用算法有梯度法、高通滤波、掩膜匹配法、统计差值法等。现有的图像增强方法存在定位不精确、处理不灵活的问题。
随着对图片处理要求的提高,如何提高图像读取速率和图像处理效率是现在亟需解决的问题。
发明内容
有鉴于此,本发明实施例的主要目的在于提供一种图像增强方法和装置、计算机存储介质,提高图像像素的读取速率和图像处理效率。
为达到上述目的,本发明实施例的技术方案是这样实现的:
本发明实施例提供了一种图像增强处理方法,所述方法包括:
读取源图像,缓存所述源图像各分量的行数据;
读取待处理分量的所述行数据,根据相邻的所述待处理分量的行数据获得设定大小的像素矩阵块;
确定图像增强模式为锐化处理模式时,根据拉普拉斯算子和增强系数对所述像素矩阵块进行锐化处理;确定图像增强模式为选择平滑处理模式时,根据平滑矩阵和平滑强度对所述像素矩阵块进行平滑处理;
合并图像增强处理后的所述像素矩阵块,获得图像增强处理图像。
上述方案中,所述读取源图像,缓存所述源图像各分量的行数据,包括:
读取源图像各分量的行数据,判断行数据的行数为奇数或偶数,行数为奇数时,第一行缓存接收行数据,行数为偶数时,第二行缓存接收行数据;
接收下一行数据的第一个像素,所述第一行缓存或第二行缓存开始将缓存的行数据输出到寄存器中;
所述下一行数据接收完成后,所述第一行缓存或第二行缓存输出的行数据由寄存器输出。
上述方案中,所述根据拉普拉斯算子和增强系数对所述像素矩阵块进行锐化处理,包括:
根据拉普拉斯算子计算所述像素矩阵块的梯度值;
根据所述梯度值和所述增强系数计算所述像素矩阵块中的中心像素的锐化值;
根据锐化门限限制所述锐化值的输出位宽,获得所述中心像素的锐化结果,所述像素矩阵块的周边像素按原值输出。
上述方案中,所述根据平滑矩阵和平滑强度对所述像素矩阵块进行平滑处理,包括:
根据平滑矩阵和平滑强度对像素矩阵中的中心像素进行平滑处理,获得平滑值;
根据平滑门限限制所述平滑值的输出位宽,获得所述中心像素的平滑结果,所述像素矩阵块的周边像素按原值输出。
上述方案中,所述合并图像增强处理后的像素矩阵块获得图像增强处理图像,包括:
将图像增强处理后的像素矩阵块合并,及将合并后的像素矩阵块与源图像其他分量的行数据同步输出,获得图像增强处理图像。
本发明实施例还提供了一种图像增强处理装置,所述装置包括:RAM行缓存单元、读RAM单元、增强逻辑单元、合并单元;
RAM行缓存单元,配置为读取源图像,缓存所述源图像各分量的行数据;
读RAM单元,配置为读取待处理分量的所述行数据,根据相邻的所述待处理分量的行数据获得设定大小的像素矩阵块;
增强逻辑单元,配置为确定图像增强模式为锐化处理模式时,根据拉普拉斯算子和增强系数对所述像素矩阵块进行锐化处理;确定图像增强模式为选择平滑处理模式时,根据平滑矩阵和平滑强度对所述像素矩阵块进行平滑处理;
合并单元,配置为合并图像增强处理后的所述像素矩阵块获得图像增强处理图像。
上述方案中,所述RAM行缓存单元,包括第一行缓存、第二行缓存和寄存器;
所述第一行缓存,配置为读取源图像的行数据,判断行数据的行数为 奇数或偶数,行数为奇数时,接收并缓存行数据;及,在所述第二行缓存接收下一行数据的第一个像素时,将缓存的行数据输出到寄存器;
所述第二行缓存,配置为读取源图像的行数据,判断行数据的行数为奇数或偶数,行数为偶数时,接收并缓存行数据;及,在所述第一行缓存接收下一行数据的第一个像素时,将保存的行数据输出到寄存器;
所述寄存器,配置为接收所述第一行缓存和第二行缓存输出的行数据,并输出到所述读RAM单元。
上述方案中,所述增强逻辑单元,包括:锐化处理子单元,具体配置为:根据拉普拉斯算子计算所述像素矩阵块的梯度值;根据所述梯度值和所述增强系数计算所述像素矩阵块中的中心像素的锐化值;根据锐化门限限制所述锐化值的输出位宽,获得所述中心像素的锐化结果,所述像素矩阵块的周边像素按原值输出。
上述方案中,所述增强逻辑单元,包括:平滑处理子单元,具体配置为:根据平滑矩阵和平滑强度对像素矩阵中的中心像素进行平滑处理,获得平滑值;根据平滑门限限制所述平滑值的输出位宽,获得所述中心像素的平滑结果,所述像素矩阵块的周边像素按原值输出。
上述方案中,所述合并单元,具体配置为将图像增强处理后的像素矩阵块合并,及将合并后的像素矩阵块与源图像其他分量的行数据同步输出,获得图像增强处理图像。
所述RAM行缓存单元、所述读RAM单元、所述增强逻辑单元、所述合并单元、所述第一行缓存、所述第二行缓存、所述寄存器、所述锐化处理子单元、所述平滑处理子单元在执行处理时,可以采用中央处理器(CPU,Central Processing Unit)、数字信号处理器(DSP,Digital Singnal Processor)或可编程逻辑阵列(FPGA,Field-Programmable Gate Array)实现。
本发明实施例提供了一种计算机存储介质,其中存储有计算机可执行 指令,该计算机可执行指令配置执行上述图像增强处理方法。
本发明实施例所提供的图像增强方案,是读取源图像,缓存所述源图像各分量的行数据;读取的待处理分量的行数据,根据相邻的待处理分量的行数据获得设定大小的像素矩阵块;根据图像增强处理要求选择图像增强模式,图像增强模式为锐化处理模式时,选择拉普拉斯算子和增强系数,根据拉普拉斯算子和增强系数对所述像素矩阵块进行锐化处理;图像增强模式为选择平滑处理模式时,选择平滑矩阵和平滑强度,根据平滑矩阵和平滑强度对所述像素矩阵块进行平滑处理;合并图像增强处理后的所述像素矩阵块获得图像增强处理图像。采用行缓存方式缓存源图像的行数据,提高图像像素读取速率;通过可选择的锐化矩阵、平滑矩阵和可配置的增强系数,能够提高图像处理效率,还能够提高图像增强处理的灵活性。
附图说明
图1为本发明实施例提供的一种图像增强处理方法流程示意图;
图2至图6为本发明实施例提供的一种运用图像增强处理方法处理4×4格式的源图像流程示意图;
图7为本发明实施例提供的一个待进行图像增强处理的3×3的矩阵块示意图;
图8为本发明实施例提供的一种图像增强处理装置结构示意图;
图9为本发明实施例提供的一种图像增强处理的设备结构示意图。
具体实施方式
在本发明的各种实施例中,读取源图像,缓存所述源图像各分量的行数据;读取待处理分量的所述行数据,根据相邻的待处理分量的行数据获得设定大小的像素矩阵块;确定图像增强模式为锐化处理模式时,根据拉普拉斯算子和增强系数对所述像素矩阵块进行锐化处理;确定图像增强模 式为平滑处理模式时,根据平滑矩阵和平滑强度对所述像素矩阵块进行平滑处理;合并图像增强处理后的所述像素矩阵块获得图像增强处理图像。
下面结合实施例对本发明再作进一步详细的说明。
本发明实施例提供的一种图像增强处理方法,如图1所示,所述方法包括:
步骤101:读取源图像,缓存所述源图像各分量的行数据;
步骤102:读取待处理分量的所述行数据,根据相邻的待处理分量的行数据获得设定大小的像素矩阵块;
步骤103:确定图像增强模式为锐化处理模式时,根据拉普拉斯算子和增强系数对像素矩阵块进行锐化处理;确定图像增强模式为平滑处理模式时,根据平滑矩阵和平滑强度对像素矩阵块进行平滑处理;
步骤104:合并图像增强处理后的所述像素矩阵块,获得图像增强处理图像。
具体来说,所述源图像可以是由手机摄像头、照相机等拍摄获得的图像画面。源图像包括若干分量,需要分别缓存源图像各分量的行数据,行数据包括若干像素。
在实际处理过程中,图像的各分量包括:待处理分量和其他分量,例如:源图像为YUV格式的图像,包括Y分量、U分量、V分量;其中,U分量、V分量表示色度,配置为指定像素的颜色;Y分量表示明亮度,即灰阶值,为待处理分量,需要对其进行图像增强处理。
这里,待处理分量为亮度成分的分量,亮度成分通常范围从0.0(黑暗)到1.0(全白)。运用步骤101缓存源图像Y分量、U分量、V分量的行数据,并通过步骤102从各分量的行数据中读取待处理分量的行数据,根据相邻的待处理分量的行数据构成像素矩阵块,再通过步骤103、104对待处理分量,即Y分量的行数据进行图像增强处理,完成Y分量处理后,再将 Y分量处理后的结果与U分量和V分量同步输出,获得处理后的图像。
步骤101中缓存所述源图像各分量的行数据,为:根据行数据的行数的奇偶性确定第一行缓存还是第二行缓存来缓存数据,第一行缓存和第二行缓存读取并缓存行数据后输出到寄存器,行数据由寄存器输出。具体包括:
第一行缓存或第二行缓存读取源图像的行像素,判断源图像的行数据的行数为奇数还是偶数,行数为奇数时,第一行缓存接收行数据进行缓存,行数为偶数时,第二行缓存接收行数据进行缓存;
第一行缓存或第二行缓存接收下一行数据的第一个像素,所述第二行缓存或第一行缓存将缓存的行数据输出到寄存器;
所述下一行数据接收完成后,所述第一行缓存或第二行缓存输出的行数据由寄存器输出。
所述第一行缓存或第二行缓存接收下一行数据的第一个像素,所述第二行缓存或第一行缓存将缓存的行数据输出到寄存器,包括以下两种情况:
第一行缓存接收下一行数据的第一个像素,第二行缓存将缓存的行数据输出到寄存器中;和,第二行缓存接收下一行数据的第一个像素,第一行缓存将缓存的行数据输出到寄存器中。这里第一行缓存和第二行缓存数据的输出是交替完成的。需要说明的是,这个过程中不包括第一行缓存接收第一行数据的第一个像素的情况,因为此时第二行缓存中并未缓存有行数据。
如图2至图6所示,以一种m×n(m=4,n=4)的源图像为例,m表示水平方向的像素数,即行分辨率,n表示垂直方向上的像素数;该源图像为YUV格式,分别读取Y分量、U分量、V分量的像素,下面以读取Y分量的像素为例说明缓存源图像的行数据,具体包括:
步骤1011:如图2所示,第一行缓存读取第一行数据的第一个像素数 据A1,判断行数为奇数,第一行缓存接收第一行数据并进行缓存;
步骤1012:如图3所示,第二行缓存读取第二行数据的第一个像素数据B1,判断行数为偶数,第二行缓存开始接收第二行数据并进行缓存;
第二行缓存接收到第二行数据的第一个像素数据B1时,第一行缓存中的第一行数据的像素数据A1输出到寄存器中;
第二行缓存接收完第二行数据后,第一行数据输入到寄存器中;
步骤1013:如图4所示,第一行缓存读取第三行数据的第一个像素C1,判断行数为奇数,第一行缓存开始接收第三行数据并缓存;
第一行缓存接收到第三行数据的第一个像素C1时,寄存器输出第一行数据到读RAM单元,第二行缓存中的第二行数据的像素数据B1输出到寄存器中;
第一行缓存接收完第三行数据后,第二行缓存中的第二行数据输入到寄存器中;
步骤1014:如图5所示,第二行缓存读取到第四行数据的第一个像素D1,判断行数为偶数,第二行缓存开始接收第四行数据并进行缓存;
第二行缓存接收到第四行数据中的第一个像素数据D1时,寄存器输出第二行数据到读RAM单元,第一行缓存中的第三行数据的像素数据C1输入到寄存器中;
第二行缓存接收完第四行数据后,第三行数据输入到寄存器中;
步骤1015:如图6所示,寄存器输出第三行数据,第二行缓存将第四行数据输出到寄存器中,并最终由寄存器输出。
图5和图6中所示的处理结果为,经过图像增强处理后的像素矩阵块。
上述过程中,输出数据比输入数据延后hor+1个周期,hor为行分辨率,这里hor=m=4;所述寄存器可以选用临时文件寄存器。
以上步骤中的第一行数据、第二行数据、第三行数据、第四行数据为 源图像的Y分量的行数据,分别包括4个像素,其中,第一行数据包括像素A1、像素A2、像素A3、像素A4,第二行数据包括:像素B1、像素B2、像素B3、像素B4,第三行数据包括:像素C1、像素C2、像素C3、像素C4,第四行数据包括:像素D1、像素D2、像素D3、像素D4。
实际应用中针对YUV格式的图像只需要对亮度信号Y分量进行处理,而对于色度信号U分量、V分量不做处理,但仍需要通过上述步骤1011-步骤1015缓存源图像的行数据,在Y分量计算完成之后,将Y分量的像素和与之对应的U分量、V分量一起同步输出。
需要说明的是,上述步骤1011-1015中只是说明采用第一行缓存和第二行缓存依次读取行数据并缓存,再将数据输入到寄存器中后由寄存器输出这种方法,这并不是限定方法的操作步骤。运用上述方法,只需要采用第一行缓存和第二行缓存两个RAM就能够实现像素的奇行、偶行的输入,减少RAM的个数从而节约了逻辑资源,提高图像像素读取速率。
这里,步骤102中,读RAM单元从各分量的行数据中,读取待处理分量的所述行数据,根据相邻的行数据获得设定大小的像素矩阵块,并将像素矩阵块输出到增强逻辑单元。其中,源图像的行数据是由一个个像素来组成,设定大小的像素矩阵块是a×b格式的矩阵块,包括a×b个像素。
举例来说,读RAM单元从m×n的源图像中获得a×b(a<m,b<n)的像素矩阵块,这里m=4,n=4,a=3,b=3,图2所示的4×4的源图像包括像素A1、A2、A3、A4、B1、B2、B3、B4、C1、C2、C3、C4、D1、D2、D3、D4,其中,源图像包括以下4个3×3的像素矩阵块:
A1、A2、A3、B1、B2、B3、C1、C2、C3组成的3x3的像素矩阵块;
A2、A3、A4、B2、B3、B4、C2、C3、C4组成的3x3的像素矩阵块;
B1、B2、B3、C1、C2、C3、D1、D2、D3组成的3x3的像素矩阵块;
B2、B3、B4、C2、C3、C4、D2、D3、D4组成的3x3的像素矩阵块。
这里,步骤103中,用户根据图像增强处理要求选择图像增强模式,图像增强模式,包括:锐化处理模式和平滑处理模式。
增强逻辑单元接收用户选择的图像增强模式结果,确定图像增强模式为锐化处理模式后,则对源图像进行锐化处理,确定图像增强模式为平滑处理模式后,则对源图像进行平滑处理,具体方法如下:
确定图像增强模式为锐化处理模式时,根据拉普拉斯算子和增强系数对像素矩阵块进行锐化处理,具体包括:
确定图像增强模式为锐化处理模式时,接收用户输入的拉普拉斯算子和增强系数;用户根据所述源图像的期望的锐化需求选择所述锐化处理的拉普拉斯算子和增强系数,并通过人机界面输入;
运用所述拉普拉斯算子计算所述源图像中待锐化的像素矩阵块的梯度值;
根据所述梯度值和所述增强系数计算所述像素矩阵块的中心像素的锐化值;
接收用户输入的锐化门限,根据所述锐化门限限制所述锐化值的输出位宽,获得所述中心像素的锐化结果,所述像素矩阵块的周边像素按原值输出。
用户根据锐化值和所述源图像的期望的锐化需求选择所述锐化门限,并通过人机界面输入。
通过上述锐化处理,获得锐化处理后的像素矩阵块,其中,中心像素为锐化处理后的像素,周边像素为原值。
本发明实施例提供的锐化处理模式,利用拉普拉斯算子具有的边缘精确定位的优点进行图像锐化,相较于现有技术的梯度算法,解决了不精确定位的问题。
图像增强模式为平滑处理模式时,根据平滑矩阵和平滑强度对像素矩 阵块进行平滑处理,包括:
确定图像增强模式为平滑处理模式时,接收用户输入的平滑矩阵和平滑强度;用户根据所述源图像的期望的平滑需求选择所述平滑处理的平滑矩阵和平滑强度,并通过人机界面输入;
根据所述平滑矩阵和平滑强度对所述源图像的像素矩阵块的中心像素进行平滑处理,获得平滑值;
接收用户输入的平滑门限,根据所述平滑门限限制所述平滑值的输出位宽,获得所述中心像素的平滑结果,所述像素矩阵块的周边像素按原值输出。
用户根据平滑值和所述源图像的期望的平滑需求选择所述锐化门限,并通过人机界面输入。
通过上述平滑处理,获得平滑处理后的像素矩阵块,其中,中心像素为平滑处理后的像素,周边像素为原值。
本发明实施例提供的平滑处理模式,利用平滑矩阵构造简单、算法易于实现的优点进行图像平滑处理,提高了算法的灵活性。
下面结合待进行图像增强处理的3×3的像素矩阵块提供具体应用实施例来说明上述锐化处理模式和平滑处理模式的一种具体处理方法。假设,图7所示的3×3的像素矩阵块中,Z1,Z2…Z9表示源图像中Y分量的各像素点。
锐化处理具体包括:
步骤301:用户根据所述源图像的锐化需求选择拉普拉斯算子(Laplacian算子)
Figure PCTCN2017085047-appb-000001
例如以下Laplacian算子:
Figure PCTCN2017085047-appb-000002
Figure PCTCN2017085047-appb-000003
其中,H1为原始Laplacian算子,H2、H3为变形后的Laplacian算子,H1的锐化处理程度<H2的锐化处理程度<H3的锐化处理程度。Laplacian算子变形的方法是:当需要增强锐化处理程度时,将Laplacian算子中的h5乘以2,并调整h1、h2、h3、h4、h6、h7、h8、h9,满足以下条件:
h1=h3=h7=h9、h2=h4=h6=h8、h1+h2+h3+h4+h5+h6+h7+h8+h9=0。
用户可以根据实际处理的图像数据,选择锐化处理所用到的Laplacian算子。
步骤302:增强逻辑单元接收用户的输入,运用所述拉普拉斯算子计算像素矩阵块当前像素的梯度值,如下式所示:
f0(Z5)=h1*Z1+h2*Z2+h3*Z3+h4*Z4+h5*Z5+h6*Z6+h7*Z7+h8*Z8+h9*Z9
以选择Laplacian算子H2为例,按下式计算,获得所述梯度值:
f0(Z5)=-1*Z1-1*Z2-1*Z3-1*Z4+8*Z5-1*Z6-1*Z7-1*Z8-1*Z9
步骤303:增强逻辑单元结合所述梯度值,计算像素矩阵块中的中心像素Z5的锐化值,如下式所示:
f1(Z5)=abs(f0(Z5))/16
f2(Z5)=f1(Z5)*enhance_ratio/64
其中,f1为梯度值求取绝对值和平均之后的结果;f2为最终锐化值,enhance_ratio为增强系数,取值范围为0-255,以8bit的二进制数表示,用户可根据图像增强处理结果对其进行调节。
以上,采用增强系数对f1进行修正,以达到自适应调整锐化强度的目的。
步骤304:增强逻辑单元根据所述梯度值f0的属性和所述锐化值对像素矩阵块中的中心像素Z5进行锐化处理,获得锐化结果f3(Z5);
当f0为正数时,锐化的结果为f3(Z5)=Z5+f2(Z5);
当f0为非正数时,锐化的结果为f3(Z5)=Z5-f2(Z5)。
步骤305:增强逻辑单元接收用户输入的锐化门限,根据锐化门限限制所述锐化结果的输出位宽,获得锐化处理后的中心像素,周边像素按原值输出,得到了锐化处理后的像素矩阵块作为获得最终的输出结果。
这里,用户根据实际处理的图像数据,选择0~255中的值作为锐化门限对锐化结果f3(Z5)进行控制,获得锐化处理后的中心像素Z5的锐化结果。
平滑处理具体包括:
步骤311:针对源图像选定平滑处理模式,用户根据所述源图像的平滑需求选择所述平滑处理的平滑矩阵和平滑强度;
图像增强处理中,平滑处理是针对全局进行图像处理,选择平滑矩阵
Figure PCTCN2017085047-appb-000004
例如以下平滑矩阵:
Figure PCTCN2017085047-appb-000005
其中,L1的平滑处理程度<L2的平滑处理程度<L3的平滑处理程度;
用户选择平滑矩阵之后,同样根据所述源图像的平滑需求选择平滑强度,平滑强度范围为0-127。
步骤312:增强逻辑单元接收用户的输入,按下式运用平滑矩阵和平滑强度对所述像素矩阵块的中心像素Z5进行平滑处理,获得平滑结果S;
S=(Z5*(256-h)*l5+Z1*h*l1+Z2*h*l2+Z3*h*l3+Z4*h*l4
+Z6*h*l6+Z7*h*l7+Z8*h*l8+Z9*h*l9)/256*l5
当采用平滑矩阵L1时,得到的平滑结果S为:
S1=(Z5*(256-h)*2+Z2*h+Z8*h)/512
当采用平滑矩阵L2时,得到的平滑结果S为:
S2=(Z5*(256-h)*4+Z2*h+Z4*h+Z6*h+Z8*h)/1024
当采用平滑矩阵L3时,得到的平滑结果S为:
S3=(Z5*(256-h)*8+Z1*h+Z2*h+Z3*h+Z4*h+Z6*h+Z7*h+Z8*h+Z9*h)/2048
其中,h表示平滑强度,h的范围为(0~127)。
步骤313:增强逻辑单元接收用户输入的平滑门限,根据平滑门限限制所述平滑结果的输出位宽,获得锐化处理后的中心像素,周边像素按原值输出,得到了平滑处理后的像素矩阵块作为最终的输出结果。
这里,用户根据实际处理的图像数据,选择0~255中的值作为平滑门限对平滑结果S进行控制,获得平滑处理后的中心像素Z5的平滑结果。
上述图像增强模式为锐化处理模式或平滑处理模式时,选择的拉普拉斯算子、增强系数、平滑矩阵和平滑强度在图像增强处理前先配置好并保存,图像增强处理过程中用户根据待处理的源图像选择拉普拉斯算子和增强系数、或平滑矩阵和平滑强度。
通过上述图像锐化处理和图像平滑处理过程可以看出,对于像素矩阵块,处理位于矩阵中心的Z5,将周边的像素输出。通过该方法实现对源图像包含的像素矩阵块中,对于某一像素矩阵块中,处理中心像素点,不处理其他像素点,而上述其他像素点可以是另一像素矩阵块的中心像素点,举例来说,图7中所示的一种m×n(m=4,n=4)的源图像,像素A1、A2、A3、A4、B1、B4、C1、C4、D1、D2、D3、D4为周边像素,对其不作处理,采用原值输出,像素B2、B3、C2、C3经过图像增强处理后输出为像 素B2’、B3’、C2’、C3’。从而最终实现对源图像除周边的像素外其他像素的处理,即对周边像素采用了原值输出的方式,减少了边缘像素处理的时间。
以上为对一个像素矩阵块的锐化处理和平滑处理过程,运用上述方法对源图像包含的所有像素矩阵块进行锐化处理或平滑处理,还需将锐化处理或平滑处理后的像素矩阵块合并,最终获得平滑处理后的图像。
这里,步骤104中将图像增强处理后的像素矩阵块合并,及将合并后的像素矩阵块与源图像其他分量的行数据同步输出,获得图像增强处理图像。
通过上述步骤101、102、103、104实现了对源图像中除周边像素外的其他像素均进行了图像增强处理,周边像素按原值输出,输出时将合并后的像素矩阵块与源图像其他分量的行数据同步输出,获得图像增强处理图像。
相应地,本发明实施例还提供了一种图像增强处理装置,如图8所示,所述装置包括:RAM行缓存单元411、读RAM单元412、增强逻辑单元413、合并单元414;
RAM行缓存单元411,配置为读取源图像,缓存所述源图像各分量的行数据;
读RAM单元412,配置为读取待处理分量的行数据,根据相邻的待处理分量的行数据获得设定大小的像素矩阵块;
增强逻辑单元413,配置为确定图像增强模式为锐化处理模式时,根据拉普拉斯算子和增强系数对所述像素矩阵块进行锐化处理;确定图像增强模式为选择平滑处理模式时,根据平滑矩阵和平滑强度对所述像素矩阵块进行平滑处理;
合并单元414,配置为合并图像增强处理后的所述像素矩阵块,获得图 像增强处理图像。
这里,RAM行缓存单元411,包括第一行缓存4111、第二行缓存4112和寄存器4113;
所述第一行缓存4111,配置为读取源图像的行数据,判断行数据的行数为奇数或偶数,行数为奇数时,接收并缓存行数据;及,在所述第二行缓存4112接收下一行数据的第一个像素时,将缓存的行数据输出到寄存器4113;
所述第二行缓存4112,配置为读取源图像的行数据,判断行数据的行数为奇数或偶数,行数为偶数时,接收并缓存行数据;及,在所述第一行缓存4111接收下一行数据的第一个像素时,将保存的行数据输出到寄存器4113;
所述寄存器4113,配置为接收所述第一行缓存4111和第二行缓存4112发送的行数据并输出到读RAM单元412。
具体来说,第一行缓存4111或第二行缓存4112读取源图像的行像素,判断源图像的行数据的行数为奇数还是偶数,行数为奇数时,第一行缓存4111接收行数据进行缓存,行数为偶数时,第二行缓存4112接收行数据进行缓存;
第一行缓存4111或第二行缓存4112接收下一行数据的第一个像素,所述第二行缓存4112或第一行缓存4111将缓存的行数据输出到寄存器4113;
所述下一行数据接收完成后,所述第一行缓存4111或第二行缓存4112输出的行数据由寄存器4113输出。
所述第一行缓存4111或第二行缓存4112接收下一行数据的第一个像素,所述第二行缓存4112或第一行缓存4111将缓存的行数据输出到寄存器4113,包括以下两种情况:
第一行缓存4111接收下一行数据的第一个像素,第二行缓存4112将缓 存的行数据输出到寄存器4113中;和,第二行缓存4112接收下一行数据的第一个像素,第一行缓存4111将缓存的行数据输出到寄存器4113中。这里第一行缓存4111和第二行缓存4112数据的输出是交替完成的。需要说明的是,这个过程中不包括第一行缓存4111接收第一行数据的第一个像素的情况,因为此时第二行缓存4112中并未缓存有行数据。
这里,读RAM单元412,配置为依次读取待处理分量的行数据,根据相邻的行数据获得设定大小的像素矩阵块,并将所述像素矩阵块输出到增强逻辑单元413。所述行数据中包含像素,设定大小的像素矩阵块是a×b格式的矩阵块,包括a×b个像素。
这里,增强逻辑单元413,包括:锐化处理子单元4131和平滑处理子单元4132。
锐化处理子单元4131,具体配置为:接收用户输入的拉普拉斯算子和增强系数;根据所述拉普拉斯算子计算所述像素矩阵块的梯度值;根据所述梯度值和所述增强系数计算所述像素矩阵块中的中心像素的锐化值;接收用户输入的锐化门限,根据所述锐化门限限制所述锐化值的输出位宽,获得所述中心像素的锐化结果,所述像素矩阵块的周边像素按原值输出。
拉普拉斯算子和增强系数,为:用户根据所述源图像的期望的锐化需求选择的所述锐化处理的拉普拉斯算子和增强系数,并通过人机界面输入,由锐化处理子单元4131接收。
所述锐化门限,为:用户根据实际处理的图像数据,选择0~255中的值作为锐化门限,并通过人机界面输入,由锐化处理子单元4131接收。
平滑处理子单元4132,具体配置为:接收用户输入的平滑矩阵和平滑强度;根据所述平滑矩阵和平滑强度对像素矩阵中的中心像素进行平滑处理,获得平滑值;接收用户输入的平滑门限,根据所述平滑门限限制所述平滑值的输出位宽,获得所述中心像素的平滑结果,所述像素矩阵块的周 边像素按原值输出。
平滑矩阵和平滑强度,为:用户根据所述源图像的期望的平滑需求选择的所述平滑处理的平滑矩阵和平滑强度,并通过人机界面输入,由平滑处理子单元4132接收。
所述平滑门限,为:用户根据实际处理的图像数据,选择0~255中的值作为平滑门限,并通过人机界面输入,由平滑处理单元4132接收。
这里,合并单元414,具体配置为:接收源图像中所有图像增强处理后的像素矩阵块,将图像增强处理后的像素矩阵块合并;及,将合并后的像素矩阵块,即待处理分量的图像增强处理结果与源图像其他分量的行数据同步输出,输出的结果即为图像增强处理图像。
通过上述图像增强处理装置的实施例,实现对源图像中除周边像素外的其他像素均进行图像增强处理,周边像素按原值输出,从而获得待处理分量的图像增强处理后的图像。
如图9所示,一种图像增强处理的设备,包括:图像增强处理装置11,寄存器配置模块12,配置同步模块13,时钟门控模块14;
图像增强处理装置11,配置为读取源图像,缓存所述源图像各分量的行数据;读取待处理分量的行数据,根据相邻待处理分量的行数据获得设定大小的像素矩阵块;确定图像增强模式为锐化处理模式时,根据拉普拉斯算子和增强系数对所述像素矩阵块进行锐化处理;确定图像增强模式为选择平滑处理模式时,根据平滑矩阵和平滑强度对所述像素矩阵块进行平滑处理;合并图像增强处理后的所述像素矩阵块获得图像增强处理的图像。图像增强处理装置如图8所示。
寄存器配置模块12,配置为在初次启动时配置并保存平滑处理模式和锐化处理模式的相关参数,包括拉普拉斯算子、平滑矩阵、平滑强度、增强强度、锐化门限、平滑门限等,还配置为配置图像增强处理装置的启动 等;
配置同步模块13,配置为对图像增强处理装置和寄存器配置模块进行同步配置;
时钟门控模块14,配置为控制各模块的开启或关闭;例如设定图像增强处理的设备接收到待处理的源图像,则启动该设备的各个模块,待处理的源图像处理完成并输出后,关闭该设备。
本发明实施例提供的设备,寄存器配置模块12进行配置包括:配置增强算法和相关参数,并启动功能模块,配置同步模块13将图像增强处理装置11和寄存器配置模块12进行同步配置,例如平滑矩阵、平滑强度等的同步配置。
本发明实施例提供的设备接收到源图像,通过图像增强处理装置的RAM行缓存单元依次缓存图像各分量的行数据,通过图像增强处理装置的读RAM单元根据相邻的待处理分量的行数据获得设定大小的像素矩阵块,像素矩阵块发送到图像增强处理装置的增强逻辑单元,增强逻辑单元运用图像增强算法进行图像增强处理,包括:增强逻辑单元确定图像增强模式为锐化处理模式时,根据拉普拉斯算子和增强系数对所述像素矩阵块进行锐化处理;确定图像增强模式为平滑处理模式时,根据平滑矩阵和平滑强度对所述像素矩阵块进行平滑处理;将图像增强处理后的像素矩阵块输入到合并单元,合并单元将图像增强处理后的像素矩阵块进行合并,并将合并后的像素矩阵块与其他分量的行数据同步输出,输出最后的结果即为图像增强处理后的图像。
本发明实施例中的图像增强算法是通过valid_ready机制来进行数据的输入和输出,有效的进行上下游数据输入输出的衔接。
本领域内的技术人员应明白,本发明的实施例可提供为方法、系统、或计算机程序产品。因此,本发明可采用硬件实施例、软件实施例、或结 合软件和硬件方面的实施例的形式。而且,本发明可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器和光学存储器等)上实施的计算机程序产品的形式。
本发明是参照根据本发明实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器,使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中,使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品,该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上,使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理,从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
以上所述,仅为本发明的较佳实施例而已,并非用于限定本发明的保护范围,凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等,均应包含在本发明的保护范围之内。
工业实用性
采用本发明实施例,通过读取源图像,缓存所述源图像各分量的行数 据;读取的待处理分量的行数据,根据相邻的待处理分量的行数据获得设定大小的像素矩阵块;根据图像增强处理要求选择图像增强模式,图像增强模式为锐化处理模式时,选择拉普拉斯算子和增强系数,根据拉普拉斯算子和增强系数对所述像素矩阵块进行锐化处理;图像增强模式为选择平滑处理模式时,选择平滑矩阵和平滑强度,根据平滑矩阵和平滑强度对所述像素矩阵块进行平滑处理;合并图像增强处理后的所述像素矩阵块获得图像增强处理图像。采用行缓存方式缓存源图像的行数据,提高图像像素读取速率;通过可选择的锐化矩阵、平滑矩阵和可配置的增强系数,能够提高图像处理效率,还能够提高图像增强处理的灵活性。

Claims (11)

  1. 一种图像增强处理方法,所述方法包括:
    读取源图像,缓存所述源图像各分量的行数据;
    读取待处理分量的所述行数据,根据相邻的所述待处理分量的行数据获得设定大小的像素矩阵块;
    确定图像增强模式为锐化处理模式时,根据拉普拉斯算子和增强系数对所述像素矩阵块进行锐化处理;确定图像增强模式为选择平滑处理模式时,根据平滑矩阵和平滑强度对所述像素矩阵块进行平滑处理;
    合并图像增强处理后的所述像素矩阵块,获得图像增强处理图像。
  2. 根据权利要求1所述的方法,其中,所述读取源图像,缓存所述源图像各分量的行数据,包括:
    读取源图像各分量的行数据,判断行数据的行数为奇数或偶数,行数为奇数时,第一行缓存接收行数据,行数为偶数时,第二行缓存接收行数据;
    接收下一行数据的第一个像素,所述第一行缓存或第二行缓存开始将缓存的行数据输出到寄存器中;
    所述下一行数据接收完成后,所述第一行缓存或第二行缓存输出的行数据由寄存器输出。
  3. 根据权利要求1所述的方法,其中,所述根据拉普拉斯算子和增强系数对所述像素矩阵块进行锐化处理,包括:
    根据拉普拉斯算子计算所述像素矩阵块的梯度值;
    根据所述梯度值和所述增强系数计算所述像素矩阵块中的中心像素的锐化值;
    根据锐化门限限制所述锐化值的输出位宽,获得所述中心像素的锐化结果,所述像素矩阵块的周边像素按原值输出。
  4. 根据权利要求1所述的方法,其中,所述根据平滑矩阵和平滑强度对所述像素矩阵块进行平滑处理,包括:
    根据平滑矩阵和平滑强度对像素矩阵中的中心像素进行平滑处理,获得平滑值;
    根据平滑门限限制所述平滑值的输出位宽,获得所述中心像素的平滑结果,所述像素矩阵块的周边像素按原值输出。
  5. 根据权利要求1所述的方法,其中,所述合并图像增强处理后的像素矩阵块获得图像增强处理图像,包括:
    将图像增强处理后的像素矩阵块合并,及将合并后的像素矩阵块与源图像其他分量的行数据同步输出,获得图像增强处理图像。
  6. 一种图像增强处理装置,所述装置包括:RAM行缓存单元、读RAM单元、增强逻辑单元、合并单元;
    RAM行缓存单元,配置为读取源图像,缓存所述源图像各分量的行数据;
    读RAM单元,配置为读取待处理分量的所述行数据,根据相邻的所述待处理分量的行数据获得设定大小的像素矩阵块;
    增强逻辑单元,配置为确定图像增强模式为锐化处理模式时,根据拉普拉斯算子和增强系数对所述像素矩阵块进行锐化处理;确定图像增强模式为选择平滑处理模式时,根据平滑矩阵和平滑强度对所述像素矩阵块进行平滑处理;
    合并单元,配置为合并图像增强处理后的所述像素矩阵块获得图像增强处理图像。
  7. 根据权利要求6所述的装置,其中,所述RAM行缓存单元,包括第一行缓存、第二行缓存和寄存器;
    所述第一行缓存,配置为读取源图像的行数据,判断行数据的行数 为奇数或偶数,行数为奇数时,接收并缓存行数据;及,在所述第二行缓存接收下一行数据的第一个像素时,将缓存的行数据输出到寄存器;
    所述第二行缓存,配置为读取源图像的行数据,判断行数据的行数为奇数或偶数,行数为偶数时,接收并缓存行数据;及,在所述第一行缓存接收下一行数据的第一个像素时,将保存的行数据输出到寄存器;
    所述寄存器,配置为接收所述第一行缓存和第二行缓存输出的行数据,并输出到所述读RAM单元。
  8. 根据权利要求6所述的装置,其中,所述增强逻辑单元,包括:
    锐化处理子单元,还配置为:根据拉普拉斯算子计算所述像素矩阵块的梯度值;根据所述梯度值和所述增强系数计算所述像素矩阵块中的中心像素的锐化值;根据锐化门限限制所述锐化值的输出位宽,获得所述中心像素的锐化结果,所述像素矩阵块的周边像素按原值输出。
  9. 根据权利要求6所述的装置,其中,所述增强逻辑单元,包括:平滑处理子单元,还配置为:根据平滑矩阵和平滑强度对像素矩阵中的中心像素进行平滑处理,获得平滑值;根据平滑门限限制所述平滑值的输出位宽,获得所述中心像素的平滑结果,所述像素矩阵块的周边像素按原值输出。
  10. 根据权利要求6所述的装置,其中,所述合并单元,还配置为将图像增强处理后的像素矩阵块合并,及将合并后的像素矩阵块与源图像其他分量的行数据同步输出,获得图像增强处理图像。
  11. 一种计算机存储介质,其中存储有计算机可执行指令,该计算机可执行指令配置执行上述权利要求1-5任一项所述的图像增强处理方法。
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