WO2017152814A1 - 断路器的控制器及控制方法 - Google Patents

断路器的控制器及控制方法 Download PDF

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Publication number
WO2017152814A1
WO2017152814A1 PCT/CN2017/075719 CN2017075719W WO2017152814A1 WO 2017152814 A1 WO2017152814 A1 WO 2017152814A1 CN 2017075719 W CN2017075719 W CN 2017075719W WO 2017152814 A1 WO2017152814 A1 WO 2017152814A1
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Prior art keywords
circuit
mcr
hsisc
function
fast
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PCT/CN2017/075719
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English (en)
French (fr)
Inventor
王军
万里浩
周婷婷
谈永根
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上海电科电器科技有限公司
浙江正泰电器股份有限公司
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Publication of WO2017152814A1 publication Critical patent/WO2017152814A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection

Definitions

  • the present invention relates to the field of low voltage electrical appliances, and more particularly to a controller for a circuit breaker and a method of controlling the same.
  • Circuit breakers are important protective appliances in power distribution systems.
  • the requirements for intelligent controllers for circuit breakers have become higher and higher, and the functions have become more and more complicated.
  • additional protection such as unbalanced protection and neutral line protection.
  • Some require auxiliary functions such as fault alarm record inquiry, digital input/output (DI/DO) function, on-current release (MCR) function, high set value short-circuit transient protection (HSISC) function, communication function, etc. .
  • DI/DO digital input/output
  • MCR on-current release
  • HSISC high set value short-circuit transient protection
  • communication function etc.
  • the complicated and diverse functions bring convenience to the user, and the power consumption of the intelligent controller of the circuit breaker is increased, and the design difficulty is improved.
  • the frame level will be as low as 1000A and the rated current is as low as 200A.
  • These lower current specifications limit the power supply capability of the speed-saturated coil, and the low-power design Become the key technology of the circuit breaker intelligent controller.
  • the frame breaker controller needs to add a high set value short circuit transient protection (HSISC) function and a current open trip unit (MCR) function.
  • HSISC short circuit transient protection
  • MCR current open trip unit
  • the patent application with the application number CN201420242293.X discloses an intelligent controller for a low voltage circuit breaker, comprising one or more transformer components, all of which are sleeved in a low voltage circuit breaker.
  • the transformer assembly On the one-phase busbar, the transformer assembly comprises a silicon steel sheet and a speed-saturated transformer, and the two ends are electrically connected to form a loop structure, which is arranged around the busbar.
  • the inductive power is transmitted to the microprocessor and other power supply modules in the intelligent controller through the outlet hole and the power receiving circuit in the intelligent controller to supply power to each part of the intelligent controller.
  • CN201420242293.X In the case of the minimum current of the circuit breaker under normal operation, there may be a phenomenon that the controller cannot work normally due to the power mismatch, and even the intelligent circuit breaker as the electrical protection and control device loses the protection function.
  • the patent application with the application number CN200720058307.2 discloses a circuit breaker protection control unit, including a circuit breaker body, a current transformer TA, a control circuit, a battery, a circuit breaker body and a control circuit connection, a current transformer TA and a control circuit and The batteries are electrically connected to each other, the current transformer TA charges the battery through the control circuit, and the current transformer TA and the battery supply power to the control circuit.
  • CN200720058307.2 uses a battery as a power supply, the current drawn by the current transformer from the main circuit is first charged into the battery, and then the loop control device composed of the battery and the current transformer supplies power to the controller of the circuit breaker, when flowing through the circuit breaker When the current is large, the current transformer supplies power, and when the current flowing through the circuit breaker is small, it is powered by the battery.
  • this technology has a drawback, that is, the capacity of the battery is large and the volume is also large, and it is impossible to conform to the trend of miniaturization of the frame.
  • the frame breaker encounters a long period of inventory, the battery has a limited service life, and frequent replacement increases maintenance difficulty and cost.
  • the patent application with the application number CN200810039739.8 discloses a MCR protection method for a circuit breaker.
  • the method determines whether the MCR signal is valid, if valid, sets the MCR valid flag, and time counts, if the timing is greater than 100 ms, the MCR valid flag is cleared, such as If the MCR signal is invalid, the MCR valid flag is cleared; if the MCR flag is valid, if it is valid, it is determined whether the sampled data is greater than the MCR threshold. If yes, the MCR threshold is increased by one, and if the MCR threshold is greater than 4, the circuit breaker is used. Tripped.
  • CN200810039739.8 it is determined whether the MCR signal is valid depending on the controller startup, but the controller is started when the speed saturation coil current is supplied. The longer the interval, the slower the MCR protection response of the method.
  • the patent application with the application number CN201310428241.1 discloses a fast MCR intelligent controller including a stored energy detection and judgment function, which is characterized in that it comprises an MCR control unit, a data acquisition, an operation, a processing control unit, a transformer, and a speed.
  • the saturation transformer power supply unit and the actuator, the data acquisition, operation, and processing control unit and the output of the MCR control unit are OR, and the output coil of the two can make the actuator's trip coil act.
  • the present invention provides a storage voltage comparison and judgment unit, and a storage voltage comparison and judgment unit is designed in the fast saturation transformer power supply unit, and a voltage comparison and determination unit designed by the fast saturation transformer power supply unit is provided.
  • CN201310428241.1 adopts the hardware judgment mode, and has the defects that the hardware peak judgment method is unreliable and the implementation cost is high.
  • the present invention is directed to a controller and control method for a circuit breaker that can realize MCR/HSISC functions at a lower cost and higher efficiency.
  • a method for controlling a controller of a circuit breaker including:
  • a function selection step selecting whether to perform an MCR function or an HSISC function, the selection is made based on whether there is a jump in the MCR/HSISC signal, if the MCR function is performed, the process proceeds to step S106, and if the HSISC function is performed, the process proceeds to step S108;
  • step S106 Execute the MCR function, start the timer, and execute the MCR function. If the execution condition of the MCR function is met and the trip is implemented, the process ends. If the termination condition is encountered during the execution, the process ends, and if the timer reaches the timing time, If the process is not finished, then the execution of step S106 is terminated and step S108 is performed;
  • the step of implementing the trip further includes the process of writing data to the fast write memory, the data being written being data related to the trip.
  • the data reading and signal detection steps are performed for a time period of 2 ms to 3 ms.
  • the fast read memory is a flash memory.
  • the fast write memory is an EEPROM memory.
  • the MCR/HSISC detection circuit includes an optocoupler device.
  • a controller for a circuit breaker comprising: a single chip control circuit and an interface circuit connected to the single chip control circuit, an MCR/HSISC detection circuit, a signal acquisition circuit, a data storage circuit, a liquid crystal display circuit,
  • the keyboard operation circuit, the communication circuit, and the action circuit further include a power supply circuit, and the power supply circuit is connected to the respective circuits to supply power to the circuit;
  • the data storage circuit includes a fast read memory and a fast write memory
  • the MCU control circuit After the MCU control circuit starts, it reads data from the fast read memory and detects the MCR/HSISC status signal through the MCR/HSISC detection circuit, selects to execute the MCR function or the HSISC function, and issues a trip command when the execution condition is satisfied, and the trip circuit is executed by the action circuit. action.
  • the microcontroller control circuit also writes data to the fast write memory after issuing the trip command, the data being written being data related to the trip.
  • the fast read memory is a flash memory.
  • the fast write memory is an EEPROM memory.
  • the MCR/HSISC detection circuit includes an optocoupler device.
  • the power supply circuit is a fast saturated power supply that includes a fast saturation feedback circuit, a boost circuit, and a buck circuit.
  • the fast saturation feedback circuit cuts off the output voltage when the output voltage of the fast saturated power supply is too large.
  • the boost circuit and the buck circuit regulate the output voltage to a set value.
  • the controller further includes an RTC power supply circuit coupled to each of the circuits to provide a real time clock.
  • the controller and control method of the circuit breaker of the invention realizes MCR/HSISC by software
  • the function has advantages in implementation cost and detection stability.
  • the controller has MCR/HSISC detection circuit and fast read/write memory circuit, which can realize fast startup of the controller and fast writing before power failure.
  • FIG. 1 is a block diagram showing the structure of a controller of a circuit breaker in accordance with an embodiment of the present invention.
  • FIG. 2a and 2b illustrate circuit diagrams of liquid crystal display circuits in a controller of a circuit breaker in accordance with an embodiment of the present invention.
  • FIG. 3 discloses a partial circuit configuration diagram of a power supply circuit in a controller of a circuit breaker in accordance with an embodiment of the present invention.
  • FIG. 4 discloses a partial circuit configuration diagram of a power supply circuit in a controller of a circuit breaker in accordance with an embodiment of the present invention.
  • 5a and 5b illustrate a partial circuit configuration diagram of a power supply circuit in a controller of a circuit breaker in accordance with an embodiment of the present invention.
  • 6a and 6b illustrate a partial circuit configuration diagram of a power supply circuit in a controller of a circuit breaker in accordance with an embodiment of the present invention.
  • Figure 7 discloses a partial circuit configuration diagram of a power supply circuit in a controller of a circuit breaker in accordance with an embodiment of the present invention.
  • FIG. 8 discloses a circuit configuration diagram of an RTC power supply circuit in a controller of a circuit breaker according to an embodiment of the present invention.
  • FIG. 9 is a circuit configuration diagram of a detecting circuit for performing MCR/HSISC state detection in a controller of a circuit breaker according to an embodiment of the present invention.
  • Figure 10 discloses a block flow diagram of a method of controlling a circuit breaker in accordance with an embodiment of the present invention, the control method implementing MCR/HSISC functionality in software.
  • Figure 11 illustrates a specific implementation process of a method of controlling a circuit breaker in accordance with an embodiment of the present invention.
  • Figure 1 discloses a block diagram of a controller of a circuit breaker in accordance with an embodiment of the present invention.
  • the controller of the circuit breaker comprises: an interface circuit 101, an MCR/HSISC detection circuit 102, a signal acquisition circuit 103, a single chip control circuit 105, a data storage circuit 109, a liquid crystal display circuit 106, a keyboard operation circuit 107, a communication circuit 108, and an action circuit.
  • a power supply circuit 110 and an RTC power supply circuit 111 is an interface circuit 101, an MCR/HSISC detection circuit 102, a signal acquisition circuit 103, a single chip control circuit 105, a data storage circuit 109, a liquid crystal display circuit 106, a keyboard operation circuit 107, a communication circuit 108, and an action circuit.
  • a power supply circuit 110 and an RTC power supply circuit 111 are examples of the controller of the circuit breaker.
  • the interface circuit 101, the MCR/HSISC detection circuit 102, the signal acquisition circuit 103, the data storage circuit 109, the liquid crystal display circuit 106, the keyboard operation circuit 107, the communication circuit 108, and the action circuit 104 are all connected to the single chip control circuit 105, and the single chip control circuit 105 exchanges data with each of the above circuits and controls the above circuits.
  • a power supply circuit 110 is connected to each of the above circuits to provide power.
  • the RTC power supply circuit 111 is connected to each of the above circuits to provide a real time clock.
  • the interface circuit 101 includes a communication interface and an external IO signal interface.
  • the MCR/HSISC detection circuit 102 is used to detect a circuit breaker, such as a split state or a fault state of a frame circuit breaker, and the specific circuit of the MCR/HSISC detection circuit 102 will be described in detail later.
  • the signal acquisition circuit 103 is configured to collect a current signal of the transformer in the circuit breaker, and modulate the current signal to amplify the current signal to improve detection accuracy. For larger current signals, signal acquisition circuit 103 performs a one-stage amplification, and for smaller current signals, signal acquisition circuit 103 performs two-stage amplification.
  • the keyboard operation circuit 107 is connected to an operation keyboard having operation buttons or operation switches, such as buttons for realizing parameter viewing and fine adjustment functions, and a code switch circuit for realizing fast protection setting.
  • the action circuit 104 is the output of the microcontroller control circuit 105.
  • the rear stage of the action circuit 104 is connected to the magnetic flux component, and the magnetic flux on-line detection circuit is driven by the magnetic flux component.
  • the action circuit 104 itself can realize the tripping action, and the flux on-line detection circuit realizes the flux on-line detection function.
  • the power supply circuit 110 provides operating power for each of the above circuits.
  • the RTC power circuit 111 provides real-time clock power to provide a real-time clock for each circuit.
  • the communication circuit 108 includes two-way communication, and the first communication is a physical link, and communicates with the outside through the RS485 interface.
  • the second communication is a communication port for device debugging test, and may be in the form of RS485 interface or USB external interface according to user needs.
  • the data storage circuit 109 is used to store an alarm or trip record of the circuit breaker.
  • data storage circuit 109 includes dual memories, a fast read memory and a fast write memory, respectively.
  • the fast read memory is a flash memory
  • the fast write memory is an EEPROM memory.
  • Flash memory stores a very small amount of key data.
  • the key data is the data necessary for the system to power on. It is stored in Flash to facilitate reading the data from Flash in a short time after the system is powered on. Complete the startup and then enter the software control program for MCR/HSISC function as soon as possible.
  • the EEPROM is used to implement fast writes, such as fast saturated power supply and fault time.
  • the EEPROM implements fast write data logging during tripping. Utilizing the combination of the fast read memory and the fast write memory composed of the above FLASH+EEPROM, it can realize subtle data reading and millisecond data writing, satisfying the controller to quickly respond to start MCR/HSISC function, and quickly lose power data. Write request.
  • the liquid crystal display circuit 106 is used to view the controller operating state and process parameters.
  • a liquid crystal display panel is included in the liquid crystal display circuit 106.
  • the liquid crystal display uses an industrial ultra-wide temperature TN type 6-bit pen-segment LCD screen.
  • the normal operating current of the liquid crystal display plus the driving circuit is only a dozen uA.
  • the working current is greatly reduced, and the power consumption of the liquid crystal display can be reduced.
  • the liquid crystal display is generally provided with a backlight.
  • the backlight operating current of the liquid crystal display generally needs about 2 mA.
  • the speed saturation power supply capability is weak, which may cause the backlight to flicker and affect the visual effect.
  • the other functions should be satisfied first.
  • the power supply of the circuit meets the protection requirements and minimizes the power consumption of other auxiliary functions.
  • the liquid crystal display circuit 106 relies on a program to monitor the power supply voltage and monitor the loop current. When the loop current is less than the set value, the back is closed. The light source, in this way, avoids the flicker of the backlight, and secondly, when the speed saturated power supply capability is weak, such processing can supply power for other functionally critical circuits (such as signal acquisition circuits and action circuits).
  • FIG. 2a and 2b are circuit diagrams showing a liquid crystal display circuit in a controller of a circuit breaker according to an embodiment of the present invention, wherein FIG. 2a discloses a first chip of a liquid crystal display circuit, and FIG. 2b discloses a second liquid crystal display circuit. chip.
  • the liquid crystal display circuit 106 includes two chips, which are a first chip U3 and a second chip U4, respectively.
  • the first chip U3 can adopt the HT1621 chip, and the first chip U3 is the driving chip.
  • the second chip U4 may be an LCD_TN chip, and the second chip U4 is a display chip of a liquid crystal display.
  • Pins 1 to 8 in the first chip U3, labeled SEG7 to SEG0, and pins 43 to 48 in the figure, are labeled as SEG13 to SEG8, respectively, and No. 5 in the second chip U4.
  • the connection method is one-to-one correspondence of the pins, and the pins having the same SEG number are connected to each other.
  • U3's pin 1 SEG7 is connected to U4's pin 12 SEG7.
  • Pins 21 to 24 of the first chip U3, labeled COM0 to COM3 in the figure, are respectively connected to pins 1 to 4 of the second chip U4, and are labeled COM0 to COM3 in the figure.
  • connection method is one-to-one correspondence of the pins, and the pins having the same COM number are connected to each other.
  • the No. 21 pin COM0 of U3 is connected to the No. 1 pin COM0 of U4.
  • the No. 9 pin CS, the No. 11 pin WR and the No. 12 pin DATA of the first chip U3 are used as control terminals, and the three control terminals are respectively connected to the input/output (I/O) status bits of the CPU of the liquid crystal display: PA0, PA1, and PA4, in Figure 2a, the CPU's input and output (I/O) status bits are labeled LCD_CS (connected to pin 9), LCD_WR (connected to pin 11), and LCD_DATA (connected to Pin 12).
  • the first chip U3, the 10th pin RD, the 16th pin VLCD, and the 17th pin VDD are connected to the 3.3V DC power supply VCC3.3.
  • pin 10 RD and pin VDD are directly connected to 3.3V DC power supply VCC3.3
  • pin 16 is connected to VCC3.3 through current limiting resistor R12.
  • VCC3.3 is connected to GND through isolation capacitor C9.
  • the 13th pin VSS of the first chip U3 is grounded.
  • the remaining pins in the first chip U3 are not used and are not connected, and are indicated by "x" in the figure.
  • the power circuit 110 provides operating power to the various circuits. Factors to be considered by the power supply circuit 110 include: improving the power supply capability of the fast saturated power supply, so that the operating voltage can also be generated when the circuit current of the circuit breaker is small.
  • the boost/buck function is provided in the power supply circuit to maintain the operating voltage within the normal range when the loop current of the circuit breaker is abnormal, ensuring that the controller operates normally.
  • the power supply circuit 110 needs to rely on a fast saturated power supply to generate a 5.0V DC power supply, a 3.3V DC power supply, and a magnetic flux operating power supply.
  • test port input TEST_PWR test port input
  • additional power input AP+ additional power input
  • AP- additional power input
  • fast saturated power input PA-B-C fast saturated power input
  • the input voltage of the test port input TEST_PWR is +24V
  • the test port input TEST_PW is rectified by the diode and connected to the magnetic flux output power CT_POWER.
  • Diodes D4, D5 are exemplary rectifier diodes. Additional power input AP+, AP- input additional power through the adapter board, the voltage is also +24V.
  • the additional power input AP+, AP- is rectified by the rectifier bridge and diode and connected to the flux output power CT_POWER.
  • the rectifier bridge is formed by four diodes, and D6 is an exemplary diode. After the rectifier bridge is set, the positive and negative poles of the power supply can be effectively prevented from being inserted.
  • the fast saturation power input PA-B-C is connected to the fast saturation feedback circuit, and the fast saturation feedback circuit is composed of a thyristor V1, a comparator U6, a reference voltage chip VZ1, and an auxiliary circuit.
  • the type of thyristor V1 is STD60NF06.
  • the comparator U6 model is LM211D.
  • the model of the reference voltage chip VZ1 is LM4040C25, which produces a reference voltage of +2.5V.
  • the auxiliary circuit includes a resistor and a capacitor, wherein the resistors R16, R18, R19, R20, R21, R22, and R23 are proportional resistors of the comparator U6, and the capacitors C12, C13, C14, C15, C16, and C17 are power supply decoupling filter capacitors.
  • the fast-saturated power supply input PA-BC is rectified by diodes (such as diodes D6 and D10 shown) and connected to two output power supplies: the output power supply POWER and the magnetic flux output power CT_POWER supply power to subsequent circuits or devices. Connected to thyristor V1 and comparator U6.
  • the comparator U6 When the output voltage is too large, the comparator U6 sends a signal to turn on the thyristor V1. At this time, the power supply of the two output power supplies POWER and CT_POWER will be cut off to avoid damage. Continued circuit.
  • the reference voltage chip VZ1 supplies a reference voltage to the comparator U6.
  • the function of the fast saturation feedback circuit is to use the comparator to determine whether the output voltage of the fast saturation power supply is too large, and in the case of excessively large, the switching device, such as a thyristor, is turned on to protect.
  • FIG. 3 shows a specific implementation of the fast saturation feedback circuit, but the specific circuit should not be construed as limiting the invention.
  • 4 discloses a partial circuit configuration diagram of a power supply circuit in a controller of a circuit breaker in accordance with an embodiment of the present invention.
  • 4 is a schematic diagram showing the connection of the operating voltage required to generate the 5V DC power supply VCC5.0 and the magnetic flux output power CT_POWER.
  • a power module M2 a matching resistor, a diode, and a decoupling filter capacitor are included.
  • the pin No. 1 of the power module M2 is connected to the POWER, which is one of the output power sources POWER in the circuit shown in FIG.
  • the No. 2 pin GND of the power module M2 is grounded.
  • the connection of the VccON pin 3 of the power module M2 will be described later.
  • Resistors R14 and R15 are matching resistors, and resistor R14 is connected between the No. 4 pin VccFB of the power module M2 and the 5V DC power supply VCC5.0.
  • the 5th pin Vccout of the power module M2 is connected to the 5V DC power supply VCC5.0.
  • Capacitors C10 and C11 are decoupling filter capacitors. The decoupling filter capacitor C11 is connected between the 5V DC power supply VCC5.0 and the ground GND, and the negative pole of C11 is grounded.
  • the 6th pin of the power module M2 is grounded to GND. The connection of the 7th pin VupON of the power module M2 will be described later.
  • the 8th pin VupFB of the power module M2 is connected to the diode D7 through the matching resistor R15, and is connected to the magnetic flux output power CT_POWER via the diode D7.
  • the 9th pin Vupout of the power module M2 is connected to the diode D7.
  • Ground pin GND of power module M2 is grounded.
  • the decoupling filter capacitor C10 is connected between the diode D7 and the ground GND, and the cathode of C10 is grounded.
  • a specific implementation is shown in FIG. 4, but the specific circuit should not be construed as limiting the invention.
  • a boost/buck function is provided in the power supply circuit.
  • the circuit of the power module M2 includes a step-down circuit and a boost circuit.
  • Figures 5a and 5b show the circuit block diagram of the buck circuit.
  • Figures 6a and 6b show the circuit configuration of the booster circuit.
  • the boost circuit includes a terminal J4 (shown in Figure 6b) and a boost converter circuit (shown in Figure 6a).
  • Pins 1 to 4 of terminal J4 correspond to pins 7 to 10 of power module M2 in Fig. 4.
  • the type of terminal J4 is SIP4, and the pins No.1 to No.4 are: VupON (pin 1), VupFB (pin 2), Vupout (pin 3), and GND (pin 4).
  • VupON pin 1
  • VupFB pin 2
  • Vupout pin 3
  • GND pin 4
  • resistors R28 to R31 include resistors R28 to R31, capacitors C26 to C28, diode D12, inductor L5, and power chip U8 (model NCP3064B).
  • R30 and R31 in the resistor are current limiting resistors
  • resistor R29 is the current protection circuit series resistor
  • resistor R28 is the matching resistor of the flux output power CT_POWER
  • capacitor C26 is the step-up switching circuit
  • capacitor C28 To oscillate the capacitor One end of the resistor R28 is connected to the pin 5 of the power chip U8 and the pin 5 of the terminal J4, VupFB, and the other end of the resistor R28 is grounded.
  • One end of the diode D12 is connected to one end of the capacitor C26 and the pin 3 of the terminal J4 is Vupout, and the other end of the diode D12 is connected to one end of the inductor L5 and the pin SC COLL of the power chip U8.
  • the other end of the inductor L5 is connected to one end of the resistor R29 and the pin IPK of the power chip U8, and the other end of the resistor R29 is connected to one end of the resistor R30, the pin 6 of the power chip U8, VCC (connected through the interface Vin as shown), and Pin 1 of terminal J3 is Vin (refer to terminal J3 in Figure 5b).
  • the other end of the resistor R30 is connected to the 8-pin DRV COLL of the power chip U8, one end of the capacitor C27, one end of the resistor R31, and the pin VupON of the terminal J4.
  • One end of the capacitor C28 is connected to the pin 3 TIM CAP of the power chip U8.
  • Capacitors C26, C27, and C28, resistors R28 and R31, and pin 4 of the power supply chip U8 are grounded in common.
  • the No. 2 pin SW EM of the power chip U8 is grounded to GND.
  • the buck circuit includes a terminal J3 (shown in Figure 5b) and a conversion circuit (shown in Figure 5a).
  • Pins 2 and 6 of terminal J3 are grounded to GND, and pins 1 and 3 to 5 correspond to pins 1 and 3 to 5 of power module M2 in Figure 4.
  • the type of terminal J3 is SIP6, and the pins No.1 to No.6 are: Vin (pin 1), GND (pins 2 and 6), VccON (pin 3), VccFB (tube 4) Foot) and Vccout (Pipe No. 5).
  • the No.1, No.3 ⁇ 5 pin corresponds to the Vin (1st pin) VccON (No. 3 pin), VccFB (No.
  • the buck conversion circuit shown in FIG. 5a includes resistors R24 to R37, capacitors C24 to C25, diode D11, inductor L4, and power chip U7 (the model number is also NCP3064B).
  • the No. 1 pin SW COLL of the power chip U7 is connected to the No. 7 pin IPK, and the No. 1 pin SWCOLL is also connected to the No. 1 pin Vin of the terminal J3 through the resistor R26, and is also connected to the power supply shown in FIG. 6a through the Vin. Pin 6 of chip U8.
  • the No. 1 pin SW COLL of the power chip U7 is connected to the No. 7 pin IPK, and the No. 1 pin SWCOLL is also connected to the No. 1 pin Vin of the terminal J3 through the resistor R26, and is also connected to the power supply shown in FIG. 6a through the Vin. Pin 6 of chip U8.
  • the 2 pin SW EM of the power chip U7 is connected to one end of the inductor L4 and one end of the diode D11.
  • the other end of the pole L4 is connected to the 5th pin Vccout of the terminal J3.
  • the other end of the diode D11 is grounded.
  • the No. 3 pin TIM CAP of the power chip U7 is grounded through a capacitor C24.
  • the No. 4 pin GND of the power chip U7 is grounded.
  • the No. 5 pin IN of the power chip U7 is connected to the No. 4 pin VccFB of the terminal J3, and is also connected to the No. 5 pin Vccout of the terminal J3 through the resistor 27 and the capacitor C25.
  • the No. 6 pin VCC of the power chip U7 is connected to the No.
  • the No. 8 pin DRV COLL of the power chip U7 is connected to the No. 3 pin VccON of the terminal J3, and is also grounded via the resistor R25, and is connected to the No. 1 pin Vin of the terminal J3 through the resistor R24.
  • FIG. 5a, 5b, 6a, 6b shows only one specific implementation of the booster circuit or the step-down circuit, but the specific circuit should not be construed as limiting the invention.
  • FIG. 7 discloses a partial circuit configuration diagram of a power supply circuit in a controller of a circuit breaker according to an embodiment of the present invention
  • FIG. 7 is a connection schematic diagram of a 3.3V DC power supply VCC3.3.
  • the part of the circuit includes a resistor R17, a capacitor C18-C23, an inductor L3, and a power chip U5 (model REG1117-33).
  • Resistor R17 is a current limiting resistor
  • capacitor C18-C23 decoupling the filter capacitor
  • inductor L3 is a freewheeling inductor.
  • One end of the resistor R17 is connected to a 5.0V DC power supply VCC5.0 (from the circuit of FIG.
  • the liquid crystal display circuit 106 and the power supply circuit 110 described above collectively embody the "low power consumption” design of the present invention.
  • the power supply circuit 110 boosts the power supply capability of the fast saturated power supply, and has a boost circuit and a buck circuit capable of raising the magnetic flux voltage to its safe operating voltage when the fast saturated power supply voltage is low.
  • the power consumption of the circuit device is reduced.
  • the liquid crystal display in the liquid crystal display circuit adopts the industrial ultra-wide temperature TN type 6-bit pen-type LCD liquid crystal screen, and the normal operating current of the driving circuit is only a dozen uA, and the conventional seven-segment digital tube scheme or dot matrix liquid crystal. The operating current is greatly reduced.
  • the microcontroller control circuit selects the 32-bit microcontroller STM32F051R8T6 with a low-power, medium-capacity CortexM0 core.
  • FIG. 8 discloses a circuit configuration diagram of an RTC power supply circuit in a controller of a circuit breaker according to an embodiment of the present invention.
  • the RTC power supply circuit (real-time clock power supply circuit) includes a resistor R1, a diode D20, a capacitor C1, and a button battery MJP1 (model MS920SE).
  • Resistor R1 is a current limiting resistor and capacitor C1 is a storage capacitor.
  • One end of the resistor R1 is connected to the 3.3V DC power supply VCC3.3, and the other end of the resistor R1 is connected to the No. 1 end of the diode D20 (labeled 201 in the figure).
  • One end of the capacitor C1 is connected to the VBAT pin of the CPU and the third end of the diode D20 (labeled 203 in the figure).
  • One end (positive electrode) of the button battery MJP1 is connected to the second end of the diode D20 (labeled 202 in the figure).
  • the other end (negative electrode) of the capacitor C1 and the button battery MJP1 is commonly grounded to GND.
  • One specific implementation is shown in FIG. 8, but the specific circuit should not be construed as limiting the invention.
  • the MCR/HSISC function is implemented by software.
  • the MCR/HSISC specifically includes the MCR function, that is, the current release function and the HSISC function, that is, the high set value short circuit instantaneous protection function.
  • the MCR function time interval is 100ms after the circuit breaker is changed from open to closed, and enters the HSISC function after more than 100ms. Therefore, the MCR/HSISC software implementation also has a problem of selectively turning the MCR or HSISC function on or off depending on the switch state.
  • the MCR/HSISC detecting circuit 102 in the block diagram shown in FIG. 1 is used to implement the above functions.
  • FIG. 9 reveals the above MCR/HSISC shape Circuit structure diagram of the detection circuit for state detection.
  • the detection circuit includes an optocoupler device ISO1, model number TLP181.
  • the optocoupler device ISO1 is powered by the power supply output POWER and the 3.3V DC power supply VCC3.3. Specifically, the No. 1 pin of the optocoupler device ISO1 is connected to the POWER through the resistor R11, the No. 3 pin of the optocoupler device ISO1 is connected to VCC3.3, and the No. 4 pin of the optocoupler device ISO1 is grounded through the resistor R13, the capacitor C8 is connected across pins 1 and 2 of the optocoupler device ISO1. Resistors R11, R13 and capacitor C8 are regulated and filtered.
  • the split state signal CO_Input is input to pin 2 of the optocoupler device ISO1. After being isolated by the optocoupler device ISO1, the I/O status bit is output to the CPU. In the illustrated embodiment, the STATE_CO signal is output through the pin 3 of ISO1. In one embodiment, the CPU employs a 32-bit microcontroller STM32F051R8T6 chip that receives the output signal from I/O status bit PA15.
  • Figure 10 discloses a flow chart of a method of controlling a circuit breaker in accordance with an embodiment of the present invention, the control method implementing MCR/HSISC functionality in software. The method can be implemented based on the controller of the circuit breaker shown in FIG. As shown in FIG. 10, the control method includes the following process:
  • step S102 Data reading and signal detecting steps.
  • the Flash data is read and processed, and the MCR/HSISC status signal (ie, the STATE_CO signal) is detected by the detection circuit (as shown in FIG. 9).
  • the data storage circuit 109 of the controller of the circuit breaker shown in FIG. 1 includes a flash memory and an EEPROM memory. Flash memory as a fast memory enables fast data reading, which enables fast startup of the controller after power-up.
  • the execution of step S102 only requires a time of 2 ms to 3 ms.
  • the controller can complete the process of step S102 in 2ms to 3ms and enter the subsequent step, that is, start the MCR/HSISC function.
  • S104 Function selection step. In this step, choose whether to perform the MCR function or the HSISC function. This selection is made based on whether there is a jump in the MCR/HSISC signal. According to the execution result of this step, if the MCR function is executed, the process proceeds to step S106, and if the HSISC function is executed, the process proceeds to step S108.
  • step S106 Perform an MCR function.
  • the timer is started and the MCR function is executed. If the execution condition of the MCR function is met and a trip is implemented, the process ends. If a termination condition is encountered during execution, the process ends. If the timer timing time has elapsed and the process has not ended, the execution of step S106 is terminated and the process proceeds to step S108.
  • HSISC function performs HSISC function. In this step, the HSISC function is performed. If the execution conditions of the HSISC function are met and a trip is implemented, the process ends. If a termination condition is encountered during execution, the process ends.
  • the step of implementing the tripping step further includes the process of writing data to the flash write memory, that is, the EEPROM memory.
  • the time period is not the breaker breaking time, which means that the voltage of the controller drops to the operating voltage after the circuit is disconnected
  • EERPOM can complete the data writing and record the relevant data of the trip process.
  • Figure 11 illustrates a specific implementation process of a method of controlling a circuit breaker in accordance with an embodiment of the present invention. As shown in FIG. 11, the specific implementation process is as follows:
  • Flash data is read in and processed.
  • the detection circuit detects the MCR/HSISC signal.
  • branch one (the transition is judged to be YES), continue to judge whether the switch has a process of splitting or not when the signal jumps. If no, the process ends. If yes, continue to determine if the MCR function is enabled.
  • the 100ms timer is started.
  • the MCR timer It is judged whether the MCR timer has reached 100 ms, and when the timer has not reached 100 ms (that is, the timer has not reached 100 ms, the determination is YES), it is determined whether the value of the sampled value is greater than the MCR setting ampere value. If not, return to determine again whether the timer time has reached 100 ms and to determine whether the value of the sampled value is greater than the MCR setting ampere value.
  • the MCR counter is incremented by one.
  • the MCR/HSISC signal indicates that the current switch is closed, it is determined whether the HSISC function is enabled, and if not, it ends.
  • the controller and the control method of the circuit breaker of the invention realize the MCR/HSISC function by software, and have advantages in realizing cost and detection stability.
  • the controller has the MCR/HSISC detection circuit and the fast read and write memory circuit. Enable fast startup of the controller and fast write before power loss.

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Abstract

一种断路器的控制器的控制方法，包括：数据读取与信号检测步骤(S102)，从快速读取存储器读取数据，通过MCR/HSISC检测电路检测MCR/HSISC状态信号；功能选择步骤(S104)，选择执行MCR功能还是HSISC功能，该选择是基于MCR/HSISC信号是否存在跳变而做出；执行MCR功能(S106)或者执行HSISC功能(S108)，满足执行条件则实施脱扣，过程结束，如果在执行过程中遇到终止条件，则过程结束。还提出实现上述控制方法的断路器的控制器。该断路器的控制器及控制方法采用软件方式实现MCR/HSISC功能，在实现成本和检测稳定性上都具有优势，该控制器具备MCR/HSISC检测电路和快速读写的存储器电路，能够实现控制器的快速启动和失电前的快速写入。

Description

断路器的控制器及控制方法 技术领域
本发明涉及低压电器领域，更具体地说，涉及断路器的控制器及其控制方法。
背景技术
断路器是配电系统中重要的保护电器。近年来，随着低压断路器的应用要求不断提高，对断路器智能控制器的要求也越来越高，功能越来越复杂。不仅要求有基本的三段保护和接地故障保护，还要求有不平衡保护、中性线保护等附加保护。有些更要求有故障报警记录查询、开关量输入/输出(DI/DO)功能、接通电流脱扣器(MCR)功能、高设定值短路瞬动保护(HSISC)功能、通信功能等辅助功能。复杂多样的功能给用户带来便利的同时，增加了断路器智能控制器的功耗，提高了设计难度。同时，在断路器，例如框架断路器小型化的设计趋势下，壳架等级会低至1000A，额定电流低至200A，这些较低的电流指标限定了速饱和线圈的供电能力，低功耗设计成为断路器智能控制器的关键技术。
从断路器合闸过程来看，若存在短路故障，无辅助电源时电子脱扣器启动需要一定时间，此时断路器短路接通电流无保护。有辅助电源时电子脱扣器工作正常，此时短路接通电流可以用短路瞬动或短延时来保护，但无法尽快地切除接通短路冲击电流故障。为了弥补短路保护的缺陷，框架断路器控制器需要增加高设定值短路瞬动保护(HSISC)功能和接通电流脱扣器(MCR)功能。通常，MCR/HSISC功能实现上，常规处理方式是采用硬件电路进行峰值判断，当峰值超过MCR/HSISC的设定值时，触发磁通动作，使断路器断开。
例如，申请号为CN201420242293.X的专利申请揭示了一种低压断路器用智能控制器，包括一个或者多个互感器组件，均套接于低压断路器的 一相母排上，该互感器组件包括矽钢片和速饱和互感器，其两端电气连接形成环路结构，环绕母排设置。通过这种设计，当有电流流过母排时，矽钢片和速饱和互感器间就会产生感应电能，矽钢片和速饱和互感器的公共端，也就是电能输出单元的电能输出端，通过出线孔与智能控制器中的电能接收电路连接，将感应电能传输至智能控制器中的微处理器和其它供电模块，为智能控制器的各部分供电。CN201420242293.X在断路器于正常工作最小电流情况下，有可能出现因功耗不匹配而造成控制器无法正常工作的现象，甚至导致作为电器保护和控制设备的智能断路器失去保护功能。
申请号为CN200720058307.2的专利申请揭示了一种断路器保护控制单元，包括断路器本体、电流互感器TA、控制电路、蓄电池，断路器本体与控制电路连接，电流互感器TA与控制电路和蓄电池彼此电连接，电流互感器TA通过控制电路向蓄电池充电，电流互感器TA和蓄电池向控制电路供电。CN200720058307.2采用蓄电池作为供电电源，电流互感器从主电路汲取的电力先充入蓄电池，再由蓄电池和电流互感器共同构成的回路控制装置向断路器的控制器供电，当流过断路器的电流较大时由电流互感器供电，当流过断路器的电流较小时由蓄电池供电。但是这种技术存在一种缺憾，即蓄电池的容量大则体积也大，无法顺应框架小型化设计趋势。另外，当框架断路器遇到库存较长时间的情况下，电池的使用寿命有限，频繁的更换会增加维护难度与成本。
申请号为CN200810039739.8的专利申请揭示了一种断路器的MCR保护方法，本方法判断MCR信号是否有效，如有效，置MCR有效标志，并计时，如计时大于100ms则清MCR有效标志，如MCR信号无效，则清MCR有效标志；判断MCR标志是否有效，如有效，判断采样数据是否大于MCR门限值，如是，MCR过门限次数加1，如果MCR过门限次数大于4次，则断路器跳闸。如果采样数据小于MCR门限值，则MCR过门限次数减1，直至减到0为止。CN200810039739.8的缺陷在于判断MCR信号是否有效依赖于控制器启动，但速饱和线圈电流供电时控制器启动时 间较长，造成该方法的MCR保护响应慢。
申请号为CN201310428241.1的专利申请揭示了一种含储能检测和判断功能的快速MCR智能控制器，其特征在于：包括有MCR控制单元，数据采集、运算、处理控制单元，互感器，速饱和互感器供电单元和致动器，数据采集、运算、处理控制单元与MCR控制单元的输出是或的关系，两者只要任一个输出高电平就能使致动器的脱扣线圈动作，采用上述方案，本发明提供一种储能电压比较和判断单元，在速饱和互感器供电单元所设计了储能电压比较和判断单元，速饱和互感器供电单元所设计的电压比较和判断单元的新型的含储能检测和判断功能的快速智能控制器。CN201310428241.1采用硬件判断方式，存在硬件峰值判断方式不可靠及实现成本高的缺陷。
发明内容
本发明旨在提出一种断路器的控制器和控制方法，能以更低的成本和更高的效率实现MCR/HSISC功能。
根据本发明的一实施例，提出一种断路器的控制器的控制方法，包括：
S102、数据读取与信号检测步骤，从快速读取存储器读取数据，通过MCR/HSISC检测电路检测MCR/HSISC状态信号；
S104、功能选择步骤，选择执行MCR功能还是HSISC功能，该选择是基于MCR/HSISC信号是否存在跳变而做出，如果执行MCR功能能够则进入步骤S106，如果执行HSISC功能则进入步骤S108；
S106、执行MCR功能，启动定时器并执行MCR功能，如果满足MCR功能的执行条件并实施脱扣，则过程结束，如果在执行过程中遇到终止条件，则过程结束，如果定时器定时时间到达而过程仍未结束，则终止执行步骤S106转而执行步骤S108；
S108、执行HSISC功能，执行HSISC功能，如果满足HSISC功能的执行条件并实施脱扣，则过程结束。如果在执行过程中遇到终止条件， 则过程结束。
在一个实施例中，实施脱扣时还包括向快速写入存储器写入数据的过程，写入的数据是与脱扣相关的数据。
在一个实施例中，数据读取与信号检测步骤的执行时间为2ms～3ms。
在一个实施例中，快速读取存储器是Flash存储器。快速写入存储器是EEPROM存储器。MCR/HSISC检测电路包括光耦器件。
根据本发明的一个实施例，提出一种断路器的控制器，包括：单片机控制电路以及于单片机控制电路连接的接口电路、MCR/HSISC检测电路、信号采集电路、数据存储电路、液晶显示电路、键盘操作电路、通信电路、动作电路，还包括电源电路，电源电路连接到上述各个电路为所述电路供电；
其中数据存储电路包括快速读取存储器和快速写入存储器；
单片机控制电路启动后从快速读取存储器读取数据并通过MCR/HSISC检测电路检测MCR/HSISC状态信号，选择执行MCR功能或者HSISC功能，在满足执行条件时发出脱扣指令由动作电路执行脱扣动作。
在一个实施例中，单片机控制电路在发出脱扣指令后还向快速写入存储器写入数据，写入的数据是与脱扣相关的数据。
在一个实施例中，快速读取存储器是Flash存储器。快速写入存储器是EEPROM存储器。
在一个实施例中，MCR/HSISC检测电路包括光耦器件。
在一个实施例中，电源电路是速饱和电源，该电源电路包括速饱和反馈电路、升压电路和降压电路。速饱和反馈电路在速饱和电源的输出电压过大时切断输出电压。升压电路和降压电路调节输出电压至设定值。
在一个实施例中，该控制器还包括RTC电源电路，RTC电源电路连接至各个电路提供实时时钟。
本发明的断路器的控制器及控制方法采用软件方式实现MCR/HSISC 功能，在实现成本和检测稳定性上都具有优势，该控制器具备MCR/HSISC检测电路和快速读写的存储器电路，能够实现控制器的快速启动和失电前的快速写入。
附图说明
本发明上述的以及其他的特征、性质和优势将通过下面结合附图和实施例的描述而变的更加明显，在附图中相同的附图标记始终表示相同的特征，其中：
图1揭示了根据本发明的一实施例的断路器的控制器的结构框图。
图2a和图2b揭示了根据本发明的一实施例的断路器的控制器中液晶显示电路的电路图。
图3揭示了根据本发明的一实施例的断路器的控制器中电源电路的部分电路结构图。
图4揭示了根据本发明的一实施例的断路器的控制器中电源电路的部分电路结构图。
图5a和图5b揭示了根据本发明的一实施例的断路器的控制器中电源电路的部分电路结构图。
图6a和图6b揭示了根据本发明的一实施例的断路器的控制器中电源电路的部分电路结构图。
图7揭示了根据本发明的一实施例的断路器的控制器中电源电路的部分电路结构图。
图8揭示了根据本发明的一实施例的断路器的控制器中RTC电源电路的电路结构图。
图9揭示了根据本发明的一实施例的断路器的控制器中进行MCR/HSISC状态检测的检测电路的电路结构图。
图10揭示了根据本发明的一实施例的断路器的控制方法的流程框图，该控制方法以软件实现MCR/HSISC功能。
图11揭示了根据本发明的一实施例的断路器的控制方法的具体实现过程。
具体实施方式
参考图1所示，图1揭示了根据本发明的一实施例的断路器的控制器的结构框图。该断路器的控制器包括：接口电路101、MCR/HSISC检测电路102、信号采集电路103、单片机控制电路105、数据存储电路109、液晶显示电路106、键盘操作电路107、通信电路108、动作电路104、电源电路110和RTC电源电路111。其中接口电路101、MCR/HSISC检测电路102、信号采集电路103、数据存储电路109、液晶显示电路106、键盘操作电路107、通信电路108和动作电路104都连接到单片机控制电路105，单片机控制电路105与上述各个电路进行数据交换并控制上述电路。电源电路110连接到上述各个电路以提供电源。RTC电源电路111连接到上述各个电路提供实时时钟。
接口电路101包括通信用接口、外部IO信号接口。
MCR/HSISC检测电路102用于检测断路器，比如框架断路器的分合状态或故障状态，后面会详细介绍MCR/HSISC检测电路102的具体电路。
信号采集电路103用于采集断路器中的互感器的电流信号，并将电流信号进行调理，将电流信号进行放大以提高检测精度。对于较大的电流信号，信号采集电路103进行一级放大，对于较小的电流信号，信号采集电路103进行两级放大。
键盘操作电路107连接到操作键盘，操作键盘上具有操作按钮或操作开关，例如实现参数查看及微调功能的按钮，以及实现快速保护整定值设定的旋码开关电路。
动作电路104是单片机控制电路105的输出端。动作电路104的后级接磁通部件，通过磁通部件驱动磁通在线检测电路。动作电路104自身可实现脱扣动作，磁通在线检测电路实现磁通在线检测功能。
电源电路110为上述各个电路提供工作电源。
RTC电源电路111提供实时时钟电源，为各个电路提供实时时钟。
通信电路108包括两路通信，第一路通信为物理链路，通过RS485接口与外部通信。第二路通信为设备调试测试用通信口，根据用户需要可采用RS485接口形式或者USB外部接口形式。
数据存储电路109用于保存断路器的报警或者脱扣记录。在一个实施例中，数据存储电路109包括双存储器，分别是快速读取存储器和快速写入存储器。快速读取存储器是Flash存储器，快速写入存储器是EEPROM存储器。Flash存储器中存储极少数关键数据，这些关键数据是系统启动上电时必要的数据，将这些数据存储在Flash中有利于在系统上电后能在很短的时间内从Flash中读取这些数据完成启动，然后尽快进入软件控制程序进行MCR/HSISC功能。EEPROM用于实现快速写入，例如速饱和供电并且产生故障时间等。EEPROM实现脱扣过程中的快速写入数据记录。利用上述FLASH+EEPROM组成的快速读取存储器和快速写入存储器的组合，能够实现微妙级的数据读取和毫秒级的数据写入，满足控制器快速响应启动MCR/HSISC功能、掉电数据快速写入的要求。
液晶显示电路106用于查看控制器运行状态以及过程参数。液晶显示电路106中包括液晶显示屏。在一个实施例中，液晶显示屏采用工业超宽温TN型6位笔段式LCD液晶屏。该中液晶显示屏外加驱动电路的正常工作电流只有十几uA，与常规的七段数码管方案或者点阵式液晶相比较，工作电流大大降低，能够达到降低液晶显示屏功耗的目的。此外，为增强显示效果，一般都会给液晶显示屏加配背光灯，通常液晶显示屏的背光灯动作电流一般需要2mA左右。当断路器的回路电流较小时，速饱和供电能力较弱，一方面会导致背光源闪烁的现象而影响视觉效果，另一方面在速饱和供电能力较弱的情况下，应当首先满足其他功能紧要的电路的供电以满足保护要求，尽可能降低其他辅助功能的耗电。该液晶显示电路106依靠程序监控电源电压、监控回路电流，当回路电流小于设定值时，则关闭背 光源，这样一来避免了背光源的闪烁，二来在速饱和供电能力较弱时，这样的处理能为确保其他功能紧要的电路(比如信号采集电路、动作电路)的供电。
图2a和图2b揭示了根据本发明的一实施例的断路器的控制器中液晶显示电路的电路图，其中图2a揭示了液晶显示电路的第一芯片，图2b揭示了液晶显示电路的第二芯片。液晶显示电路106包括两块芯片，分别是第一芯片U3和第二芯片U4。第一芯片U3可采用HT1621芯片，第一芯片U3是驱动芯片。第二芯片U4可采用LCD_TN芯片，第二芯片U4是液晶显示屏的显示芯片。第一芯片U3中的1号～8号管脚，图中标记为SEG7～SEG0，以及43号～48号管脚，图中标记为SEG13～SEG8，分别与第二芯片U4中的5号～18号管脚，图中标记为SEG0～SEG13连接。连接的方式为管脚一一对应，具有相同SEG编号的管脚互相连接。例如，U3的1号管脚SEG7连接到U4的12号管脚SEG7。第一芯片U3的21号～24号管脚，图中标记为COM0～COM3，分别与第二芯片U4中的1号～4号管脚，图中标记为COM0～COM3连接。连接的方式为管脚一一对应，具有相同COM编号的管脚互相连接。例如，U3的21号管脚COM0连接到U4的1号管脚COM0。第一芯片U3的9号管脚CS、11号管脚WR和12号管脚DATA作为控制端，该三个控制端分别连接到液晶显示屏的CPU的输入输出(I/O)状态位：PA0、PA1和PA4，在图2a中，CPU的输入输出(I/O)状态位分别被标记为LCD_CS(连接到9号管脚)、LCD_WR(连接到11号管脚)和LCD_DATA(连接到12号管脚)。第一芯片U3的10号管脚RD、16号管脚VLCD和17号管脚VDD连接到3.3V直流电源VCC3.3。如图2a所示，10号管脚RD和17号管脚VDD是直接连接到3.3V直流电源VCC3.3，16号管脚VLCD通过限流电阻R12连接到VCC3.3。VCC3.3通过隔离电容C9接地GND。第一芯片U3的13号管脚VSS接地。第一芯片U3中的其余管脚不使用，不做连接，在图中用“×”表示。
电源电路110为各个电路提供工作电源。电源电路110需要考虑的因素包括：改进速饱和电源供电能力，使得断路器的回路电流较小时也能够产生工作电压。在电源电路中提供升压/降压功能，在断路器的回路电流异常时能够维持工作电压在正常范围内，确保控制器正常工作。具体而言，电源电路110需要依靠速饱和电源来产生5.0V直流电源、3.3V直流电源和磁通工作电源。
图3揭示了根据本发明的一实施例的断路器的控制器中电源电路的部分电路结构图。如图3所示，在该部分电路结构中，具有三路输入，分别为测试端口输入TEST_PWR，附加电源输入AP+、AP-，速饱和电源输入PA-B-C。测试端口输入TEST_PWR的输入电压为+24V，测试端口输入TEST_PW通过二极管整流后连接到磁通输出电源CT_POWER。二极管D4、D5是示例的整流二极管。附加电源输入AP+、AP-通过转接板输入附加电源，电压也是+24V。附加电源输入AP+、AP-通过整流桥和二极管整流后连接到磁通输出电源CT_POWER。在图示的实施例中，由四个二极管构成整流桥，D6是示例的二极管。设置整流桥后能有效防止电源正负极插反。
速饱和电源输入PA-B-C连接到速饱和反馈电路，速饱和反馈电路由晶闸管V1、比较器U6、基准电压芯片VZ1以及辅助电路组成。晶闸管V1的型号为STD60NF06。比较器U6型号为LM211D。基准电压芯片VZ1的型号为LM4040C25，产生+2.5V的基准电压。辅助电路包括电阻和电容，其中电阻R16、R18、R19、R20、R21、R22、R23为比较器U6的比例电阻，电容C12、C13、C14、C15、C16、C17为电源去耦滤波电容。速饱和电源输入PA-B-C经过二极管(例如图示的二极管D6、D10)整流后，一方面连接到两路输出电源：输出电源POWER和磁通输出电源CT_POWER为后续电路或器件供电，另一方面接到晶闸管V1、比较器U6上。当输出电压过大时，比较器U6送出信号，使得晶闸管V1导通，此时两路输出电源POWER和CT_POWER的供电将被切断，以免损坏后 续电路。基准电压芯片VZ1为比较器U6提供基准电压。需要说明的是，速饱和反馈电路的作用是利用比较器判断速饱和电源的输出电压是否过大，在过大的情况下使得开关器件，例如晶闸管导通，以起到保护的作用。图3所示的是速饱和反馈电路的一种具体实现方式，但该具体电路不应作为对本发明的限制。
图4揭示了根据本发明的一实施例的断路器的控制器中电源电路的部分电路结构图。图4是产生5V直流电源VCC5.0和磁通输出电源CT_POWER所需要的动作电压的连接原理图。在图4所示的电路结构中，包括电源模块M2、匹配电阻、二极管和去耦滤波电容。在图4中，电源模块M2的1号管脚Vin连接到POWER，该POWER即为图3所示的电路中的其中一路输出电源POWER。电源模块M2的2号管脚GND接地。电源模块M2的3号管脚VccON的连接后面会描述。电阻R14和R15是匹配电阻，电阻R14连接在电源模块M2的4号管脚VccFB和5V直流电源VCC5.0之间。电源模块M2的5号管脚Vccout与5V直流电源VCC5.0连接。电容C10和C11是去耦滤波电容。去耦滤波电容C11连接在5V直流电源VCC5.0和地GND之间，C11的负极接地。电源模块M2的6号管脚GND接地。电源模块M2的7号管脚VupON的连接后面会描述。电源模块M2的8号管脚VupFB通过匹配电阻R15连接到二极管D7，再经由二极管D7连接到磁通输出电源CT_POWER。电源模块M2的9号管脚Vupout与二极管D7连接。电源模块M2的10号管脚GND接地。去耦滤波电容C10连接在二极管D7和地GND之间，C10的负极接地。同样的，图4所示的一种具体实现方式，但该具体电路不应作为对本发明的限制。
如前面所述的，为了在断路器的回路电流异常时能够维持工作电压在正常范围内，在电源电路中提供升压/降压功能。电源模块M2的电路中包括了降压电路和升压电路。图5a和图5b揭示了降压电路的电路结构图。图6a和图6b揭示了升压电路的电路结构图。
参考图6a和图6b，升压电路包括接线端子J4(如图6b所示)和升压转换电路(如图6a所示)。接线端子J4的1号～4号管脚与图4中电源模块M2的7号～10号管脚相对应。接线端子J4的型号为SIP4，1号～4号管脚分别为：VupON(1号管脚)、VupFB(2号管脚)、Vupout(3号管脚)和GND(4号管脚)，对应电源模块M2的VupON(7号管脚)、VupFB(8号管脚)、Vupout(9号管脚)和GND(10号管脚)，一一对应连接。图6a所示的转换电路包括电阻R28～R31，电容C26～C28，二极管D12，电感L5，电源芯片U8(型号NCP3064B)。电阻中的R30、R31为限流电阻，电阻R29为电流保护电路串接电阻，电阻R28为磁通输出电源CT_POWER的匹配电阻，电容C26、电感L5、二极管D12为升压型开关电路，电容C28为震荡电容。电阻R28的一端接电源芯片U8的5号脚IN和接线端子J4的2号脚VupFB，电阻R28的另一端接地。二极管D12的一端接电容C26的一端和接线端子J4的3号脚Vupout，二极管D12的另一端接电感L5的一端和电源芯片U8的1号脚SW COLL。电感L5的另一端接电阻R29的一端和电源芯片U8的7号脚IPK，电阻R29的另一端接电阻R30的一端、电源芯片U8的6号脚VCC(图中所示通过接口Vin连接)以及接线端子J3的1号脚Vin(参考图5b中的接线端子J3)。电阻R30的另一端和电源芯片U8的8号脚DRV COLL、电容C27的一端、电阻R31的一端以及接线端子J4的1号脚VupON连接。电容C28的一端接电源芯片U8的3号脚TIM CAP。电容C26、C27、C28、电阻R28、R31、电源芯片U8的4号脚GND共同接地。电源芯片U8的2号管脚SW EM接地GND。
参考图5a和图5b，降压电路包括接线端子J3(如图5b所示)和转换电路(如图5a所示)。接线端子J3的2号和6号管脚接地GND，1号、3号～5号管脚与图4中电源模块M2的1号、3号～5号管脚相对应。接线端子J3的型号为SIP6，1号～6号管脚分别为：Vin(1号管脚)、GND(2号和6号管脚)、VccON(3号管脚)、VccFB(4号管脚)和Vccout (5号管脚)。其中1号、3号～5号管脚对应电源模块M2的Vin(1号管脚)VccON(3号管脚)、VccFB(4号管脚)和Vccout(5号管脚)，一一对应连接。图5a所示的降压转换电路包括电阻R24～R37，电容C24～C25，二极管D11，电感L4，电源芯片U7(型号同样为NCP3064B)。电源芯片U7的1号管脚SW COLL与7号管脚IPK连接，1号管脚SWCOLL还通过电阻R26连接到接线端子J3的1号管脚Vin，通过Vin还连接到图6a所示的电源芯片U8的6号管脚。电源芯片U7的2号管脚SW EM连接到电感L4的一端、二极管D11的一端。电杆L4的另一端连接接线端子J3的5号管脚Vccout。二极管D11的另一端接地。电源芯片U7的3号管脚TIM CAP通过电容C24接地。电源芯片U7的4号管脚GND接地。电源芯片U7的5号管脚IN连接到接线端子J3的4号管脚VccFB，还通过电阻27和电容C25连接到接线端子J3的5号管脚Vccout。电源芯片U7的6号管脚VCC连接到接线端子J3的1号管脚Vin。电源芯片U7的8号管脚DRV COLL连接到接线端子J3的3号管脚VccON，还通过电阻R25接地，通过电阻R24连接到接线端子J3的1号管脚Vin。
同样的，图5a、5b、6a、6b所示的仅仅是升压电路或者降压电路的一种具体实现方式，但该具体电路不应作为对本发明的限制。
图7揭示了根据本发明的一实施例的断路器的控制器中电源电路的部分电路结构图，图7是产生3.3V直流电源VCC3.3的连接原理图。该部分电路包括包括电阻R17、电容C18-C23、电感L3、电源芯片U5(型号为REG1117-33)。电阻R17为限流电阻，电容C18-C23去耦滤波电容，电感L3为续流电感。电阻R17一端接5.0V直流电源VCC5.0(来自图4的电路)，电阻R17另一端接电容C18的一端、C23的一端、电源芯片U5的3号管脚VIN。电感L3的一端接3.3V直流电源VCC3.3、电容C19的一端、C20的一端，电感L3的另一端接电容C21的一端、C22的一端、电源芯片U5的2号管脚VO和4号管脚VOUT。电容C18-C23的另一端、电源芯片U5的1号脚GND共同接地。图7所示的一种具体实现方式，但 该具体电路不应作为对本发明的限制。
上述的液晶显示电路106和电源电路110共同体现了本发明的“低功耗”设计。一方面，电源电路110提升了速饱和电源的供电能力，并且具备升压电路和降压电路能够在速饱和电源电压较低时升压电路将磁通电压升至其安全动作电压。另一方面，降低了电路器件的功耗。液晶显示电路中的液晶显示屏选用工业超宽温TN型6位笔段式LCD液晶屏，外加驱动电路其正常工作电流只有十几uA，与常规的七段数码管方案或者点阵式液晶，工作电流大大降低。当断路器回路电流较小而速饱和供电能力较弱时，关闭背光源，一来避免了背光源的闪烁，二来首先确保为其他功能紧要的电路供电。单片机控制电路也选择低功耗中等容量CortexM0内核的32位微控制器STM32F051R8T6。
图8揭示了根据本发明的一实施例的断路器的控制器中RTC电源电路的电路结构图。RTC电源电路(实时时钟电源电路)包括电阻R1、二极管D20、电容C1、纽扣电池MJP1(型号MS920SE)。电阻R1为限流电阻，电容C1为储能电容。电阻R1的一端接3.3V直流电源VCC3.3，电阻R1的另一端接二极管D20的1号端(图中标记为201)。电容C1的一端接CPU的VBAT管脚、二极管D20的3号端(图中标记为203)。纽扣电池MJP1的一端(正极)接二极管D20的2号端(图中标记为202)。电容C1、纽扣电池MJP1的另一端(负极)共同接地GND。图8所示的一种具体实现方式，但该具体电路不应作为对本发明的限制。
根据本发明的实施例，MCR/HSISC功能由软件实现。MCR/HSISC具体而言包括MCR功能，即接通电流脱扣器功能和HSISC功能，即高设定值短路瞬动保护功能。在实现过程中，MCR功能作用时间区间为断路器由断开变为闭合后的100ms，在超过100ms之后进入HSISC功能。所以MCR/HSISC的软件实现时还存在一个依据开关状态选择性开启或者关闭MCR或者HSISC功能的问题。图1所示的结构框图中的MCR/HSISC检测电路102即用于实现上述的功能。图9揭示了进行上述MCR/HSISC状 态检测的检测电路的电路结构图。该检测电路包括光耦器件ISO1，型号为TLP181。光耦器件ISO1由电源输出POWER和3.3V直流电源VCC3.3供电。具体而言，光耦器件ISO1的1号管脚通过电阻R11连接到POWER，光耦器件ISO1的3号管脚连接到VCC3.3，光耦器件ISO1的4号管脚通过电阻R13接地，电容C8跨接在光耦器件ISO1的1号和2号管脚之间。电阻R11、R13和电容C8进行稳压及滤波。分合状态信号CO_Input输入光耦器件ISO1的2号管脚。经光耦器件ISO1隔离后输出给CPU的I/O状态位，在图示的实施例中，通过ISO1的3号管脚输出STATE_CO信号。在一个实施例中，CPU采用32位微控制器STM32F051R8T6芯片，由I/O状态位PA15接收上述输出信号。
图10揭示了根据本发明的一实施例的断路器的控制方法的流程图，该控制方法以软件实现MCR/HSISC功能。该方法可以基于图1所示的断路器的控制器实现。如图10所示，该控制方法包括如下的过程：
S102、数据读取与信号检测步骤。在该步骤中，进行Flash数据的读取与处理，并通过检测电路(如图9所示)检测MCR/HSISC状态信号(即STATE_CO信号)。在一个实施例中，图1所示的断路器的控制器的数据存储电路109中包括Flash存储器和EEPROM存储器。Flash存储器作为快速存储器可以实现快速的数据读取，由此能够实现控制器在上电后的快速启动。在一个实施例中，步骤S102的执行仅需要2ms～3ms的时间。从Flash存储器中少量关键数据的耗时为微妙级，通过MCR/HSISC检测电路获取MCR/HSISC状态信号的时间也很短。控制器能在2ms～3ms的时间内完成步骤S102的过程并进入到后续步骤，即启动MCR/HSISC功能。
S104、功能选择步骤。在该步骤中，选择执行MCR功能还是HSISC功能。该选择是基于MCR/HSISC信号是否存在跳变而做出。根据该步骤的执行结果，如果执行MCR功能能够则进入步骤S106，如果执行HSISC功能则进入步骤S108。
S106、执行MCR功能。在该步骤中，启动定时器并执行MCR功能。 如果满足MCR功能的执行条件并实施脱扣，则过程结束。如果在执行过程中遇到终止条件，则过程结束。如果定时器定时时间到达而过程仍未结束，则终止执行步骤S106转而执行步骤S108。
S108、执行HSISC功能。在该步骤中，执行HSISC功能。如果满足HSISC功能的执行条件并实施脱扣，则过程结束。如果在执行过程中遇到终止条件，则过程结束。
此处需要说明，虽然在图中没有示出，实施脱扣步骤后还包括向快速写入存储器，即EEPROM存储器写入数据的过程。在一个实施例中，在脱扣指令发出后至控制器完全失电之前有15ms-30ms的时间(该时间段并非是断路器分断时间，是指电路断开后控制器的电压下降至操作电压之前的时间段)，在这段时间内，EERPOM可以完成数据写入，记录脱扣过程的相关数据。
图11揭示了根据本发明的一实施例的断路器的控制方法的具体实现过程。如图11所示，该具体实现的过程如下：
Flash数据读入与处理。
检测电路检测MCR/HSISC信号。
判断MCR/HSISC信号是否存在跳变，若是则进入分支一，若否则进入分支二。
分支一中(跳变判断为是)，继续判断信号跳变时开关有无由分到合的过程。若否，则过程结束。若是，则继续判断MCR功能是否开启。
如果MCR功能没有开启，则过程结束。
如果MCR功能开启，则启动100ms定时器。
判断MCR定时器是否到达100ms，定时器未到100ms时(即定时器未到100ms判断为是)，则判断采样值经数值化处理后的值是否大于MCR设定安培值。若否，则返回再次判断定时器时间是否到达100ms以及判断采样值经数值化处理后的值是否大于MCR设定安培值。
若是，即采样值经数值化处理后的值是否大于MCR设定安培值，则 MCR计数器加一。
判断MCR计数器数值是否大于3，若是，发出脱扣指令，之后过程结束。若否，返回判断采样值经数值化处理后的值是否大于MCR设定安培值。
如果在定时器100ms的定时时间到达时过程依旧没有结束，则转入下面的分支二执行。
分支二中(跳变判断为否)，则判断MCR/HSISC信号指示当前开关是否为合，若否，则过程结束。
若是，即MCR/HSISC信号指示当前开关为合，则判断HSISC功能是否开启，若否，则结束。
判断HSISC功能是否开启，若是，则判断采样值经数值化处理后的值是否大于HSISC设定安培值，若否，则过程结束。
判断采样值经数值化处理后的值是否大于HSISC设定安培值，若是，HSISC计数器加一。
判断HSISC计数器数值是否大于3，若是，发出脱扣指令，之后过程结束。若否，则返回判断采样值经数值化处理后的值是否大于HSISC设定安培值。
同样的，虽然在图中没有示出，但在脱扣指令发出后，还有向EERPOM写入数据的过程。
本发明的断路器的控制器及控制方法采用软件方式实现MCR/HSISC功能，在实现成本和检测稳定性上都具有优势，该控制器具备MCR/HSISC检测电路和快速读写的存储器电路，能够实现控制器的快速启动和失电前的快速写入。
上述实施例是提供给熟悉本领域内的人员来实现或使用本发明的，熟悉本领域的人员可在不脱离本发明的发明思想的情况下，对上述实施例做出种种修改或变化，因而本发明的保护范围并不被上述实施例所限，而应该是符合权利要求书提到的创新性特征的最大范围。

Claims (10)

  1. 一种断路器的控制器的控制方法，其特征在于，包括：
    S102、数据读取与信号检测步骤，从快速读取存储器读取数据，通过MCR/HSISC检测电路检测MCR/HSISC状态信号；
    S104、功能选择步骤，选择执行MCR功能还是HSISC功能，该选择是基于MCR/HSISC信号是否存在跳变而做出，如果执行MCR功能能够则进入步骤S106，如果执行HSISC功能则进入步骤S108；
    S106、执行MCR功能，启动定时器并执行MCR功能，如果满足MCR功能的执行条件并实施脱扣，则过程结束，如果在执行过程中遇到终止条件，则过程结束，如果定时器定时时间到达而过程仍未结束，则终止执行步骤S106转而执行步骤S108；
    S108、执行HSISC功能，执行HSISC功能，如果满足HSISC功能的执行条件并实施脱扣，则过程结束。如果在执行过程中遇到终止条件，则过程结束。
  2. 如权利要求1所述的断路器的控制器的控制方法，其特征在于，实施脱扣时还包括向快速写入存储器写入数据的过程，写入的数据是与脱扣相关的数据。
  3. 如权利要求1所述的断路器的控制器的控制方法，其特征在于，数据读取与信号检测步骤的执行时间为2ms～3ms。
  4. 如权利要求1所述的断路器的控制器的控制方法，其特征在于，
    所述快速读取存储器是Flash存储器；
    所述快速写入存储器是EEPROM存储器；
    所述MCR/HSISC检测电路包括光耦器件。
  5. 一种断路器的控制器，其特征在于，包括：单片机控制电路以及于单片机控制电路连接的接口电路、MCR/HSISC检测电路、信号采集电路、数据存储电路、液晶显示电路、键盘操作电路、通信电路、动作电路，还包括电源电路，电源电路连接到上述各个电路为所述电路供电；
    其中所述数据存储电路包括快速读取存储器和快速写入存储器；
    单片机控制电路启动后从快速读取存储器读取数据并通过MCR/HSISC检测电路检测MCR/HSISC状态信号，选择执行MCR功能或者HSISC功能，在满足执行条件时发出脱扣指令由动作电路执行脱扣动作。
  6. 如权利要求5所述的断路器的控制器，其特征在于，单片机控制电路在发出脱扣指令后还向快速写入存储器写入数据，写入的数据是与脱扣相关的数据。
  7. 如权利要求6所述的断路器的控制器，其特征在于，
    所述快速读取存储器是Flash存储器；
    所述快速写入存储器是EEPROM存储器
  8. 如权利要求6所述的断路器的控制器，其特征在于，
    所述MCR/HSISC检测电路包括光耦器件。
  9. 如权利要求5所述的断路器的控制器，其特征在于，所述电源电路是速饱和电源，该电源电路包括速饱和反馈电路、升压电路和降压电路；
    速饱和反馈电路在速饱和电源的输出电压过大时切断输出电压；
    升压电路和降压电路调节输出电压至设定值。
  10. 如权利要求5所述的断路器的控制器，其特征在于，还包括RTC电源电路，RTC电源电路连接至所述各个电路提供实时时钟。
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