WO2017147851A1 - 一种配置装置及方法 - Google Patents

一种配置装置及方法 Download PDF

Info

Publication number
WO2017147851A1
WO2017147851A1 PCT/CN2016/075492 CN2016075492W WO2017147851A1 WO 2017147851 A1 WO2017147851 A1 WO 2017147851A1 CN 2016075492 W CN2016075492 W CN 2016075492W WO 2017147851 A1 WO2017147851 A1 WO 2017147851A1
Authority
WO
WIPO (PCT)
Prior art keywords
packet
performance indicator
indicator parameter
cache
parsing module
Prior art date
Application number
PCT/CN2016/075492
Other languages
English (en)
French (fr)
Inventor
纪天明
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to PCT/CN2016/075492 priority Critical patent/WO2017147851A1/zh
Priority to CN201680083122.9A priority patent/CN108781170B/zh
Publication of WO2017147851A1 publication Critical patent/WO2017147851A1/zh

Links

Images

Definitions

  • the present invention relates to the field of communications, and in particular, to a configuration apparatus and method.
  • the processor usually has a processing load that exceeds the maximum processing power of the processor due to large input traffic.
  • the processing load exceeds the maximum processing power of the processor, it will be cached.
  • English: cache a large number of data replacement
  • the command hit rate drops sharply
  • the data hit rate drops sharply
  • the processor has doubled the access latency of double rate synchronous dynamic random access memory (English: Double Data Rate, DDR for short).
  • DDR Double Data Rate
  • the present invention provides a configuration apparatus and method that solves the problem that the performance of the processor cannot be recovered after the performance is degraded.
  • a configuration apparatus comprising:
  • An obtaining unit configured to obtain a performance indicator parameter, where the performance indicator parameter is used to indicate a load condition of a CPU of the central processing unit;
  • a configuration unit configured to: when the performance indicator parameter obtained by the acquiring unit is greater than or equal to a preset threshold, configure, by the packet parsing module, the attribute of the cache to not perform an allocation operation.
  • the configuration unit configures the cached attribute by the message parsing module to not perform the allocation operation, so as to stop the allocation of the cache, thereby avoiding The cached data in the cache is frequently swapped in and out.
  • the configuration unit is further configured to configure the packet parsing module when the performance indicator parameter acquired by the acquiring unit is greater than or equal to a preset threshold.
  • the selective packet discarding function is enabled, so that the packet parsing module discards the packets with lower priority in the pending packets.
  • the configuration unit can also configure the packet parsing module to start selective when the performance of the acquiring unit is greater than or equal to the preset threshold. Packet discarding function.
  • the apparatus further includes:
  • the processing unit is configured to perform service processing on the packet corresponding to the message descriptor in the to-be-processed message according to the message descriptor stored in the cache.
  • the processing unit may be configured according to the packet stored in the cache, if the configuration unit configures the cache attribute to not perform the allocation operation, and the packet parsing module starts the selective packet discarding function.
  • the descriptor process preferentially processes the message corresponding to the message descriptor in the processed message, so that the performance of the processor is gradually restored.
  • the acquiring unit is further configured to: in the processing unit, process the report according to the message descriptor stored in the cache After the service processing is performed on the packet corresponding to the packet descriptor, the performance indicator parameter is re-acquired;
  • the configuration unit is further configured to: when the performance indicator parameter re-acquired by the acquiring unit is smaller than the preset threshold, the packet parsing module is configured to cache the cache The stored attributes are configured for the assignment operation.
  • the obtaining unit can re-acquire the performance indicator parameter, and the configuration unit passes the report when the performance index parameter obtained by the acquiring unit is less than the preset threshold value, in order to be able to process the packet after the performance of the processor is restored.
  • the text parsing module configures the cached properties for the assignment operation.
  • the configuration unit is further configured to: when the performance indicator parameter re-acquired by the acquiring unit is smaller than the preset threshold,
  • the packet parsing module is configured to disable the selective packet discarding function.
  • the performance indicator parameter obtained by the acquiring unit includes any one or more of the following combinations: CPU usage, cache Hit rate, double data rate DDR access latency, IPC indicator per cycle number of instructions.
  • the present invention only exemplifies the performance index parameters obtained by the obtaining unit, including but not limited to the CPU usage, the cache hit ratio, and the DDR access delay described in the present invention.
  • the IPC indicator which can be used to indicate the load condition of the CPU, belongs to the performance indicator parameter described in the present invention.
  • a configuration method including:
  • the performance indicator parameter is used to indicate a load condition of the CPU of the central processing unit
  • the attribute of the cache is configured by the packet parsing module to not perform the allocation operation.
  • the packet parsing module configures the attribute of the cache to not perform the allocation operation, thereby avoiding frequent swapping in and out of the cached data in the cache. Therefore, the problem that the performance of the processor cannot be recovered after the performance is degraded is solved, so that the problem of service interruption caused by the processor being in a low performance state for a long time can be avoided, and the stability and robustness of the system are improved.
  • the method further includes:
  • the packet parsing module is configured to enable the selective packet discarding function, so that the packet parsing module discards the packet with a lower priority in the to-be-processed packet.
  • the packet parsing module is configured to enable the selective packet discarding function to prevent the higher priority service from being affected after the processor performance is degraded. .
  • the method further includes:
  • the service processing is performed on the packet corresponding to the message descriptor in the message to be processed according to the message descriptor stored in the cache.
  • the message to be processed corresponds to the message descriptor After the message is processed, it also includes:
  • the packet parsing module configures the cache attribute to perform an allocation operation.
  • the method when the re-acquired performance indicator parameter is smaller than the preset threshold, the method further includes:
  • the packet parsing module is configured to disable the selective packet discarding function.
  • the performance indicator parameter includes any one or more of the following combinations: CPU usage, cache hit ratio, double data rate DDR access delay, IPC indicator per cycle number of instructions.
  • a third aspect of the present invention provides a configuration apparatus, including: a processor, configured to perform a configuration method provided by a second aspect or a possible implementation manner of the second aspect, to implement the first aspect or the first aspect
  • the possible implementations of the configuration unit and the acquisition unit function are included in a configuration apparatus, including: a processor, configured to perform a configuration method provided by a second aspect or a possible implementation manner of the second aspect, to implement the first aspect or the first aspect.
  • the processor is further used
  • the configuration method provided by the possible implementation of the second aspect is implemented to implement the functions of the processing unit in a possible implementation of the first aspect.
  • FIG. 1 is a schematic structural diagram of a configuration apparatus according to an embodiment of the present invention.
  • FIG. 2 is a schematic flowchart of a configuration method according to an embodiment of the present invention.
  • FIG. 3 is a schematic flowchart diagram of another configuration method according to an embodiment of the present disclosure.
  • FIG. 4 is a schematic structural diagram of a system in a processing scenario according to an embodiment of the present disclosure
  • FIG. 5 is a schematic structural diagram of another configuration apparatus according to an embodiment of the present disclosure.
  • FIG. 6 is a schematic structural diagram of still another configuration apparatus according to an embodiment of the present invention.
  • the basic principle of the present invention is: the processor periodically detects whether the performance indicator parameter used to indicate the load condition of the central processing unit (CPU) is greater than or equal to a preset threshold, and determines the performance indicator.
  • the attribute of the cache (English: cache) is configured to be not allocated by the message parsing module. This prevents the cached data from being frequently swapped in and out. So that recovery can be achieved after the performance of the processor is degraded.
  • Figure 1 shows It is a structural block diagram of a configuration apparatus related to various embodiments of the present invention.
  • the configuration apparatus may include: a processor 11 and a memory 12.
  • the processor 11 may be a CPU, or may be an Application Specific Integrated Circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present invention, for example: one or more A microprocessor (English: digital singnal processor, referred to as: DSP), or one or more field programmable gate arrays (English: Field Programmable Gate Array, referred to as: FPGA).
  • a microprocessor English: digital singnal processor, referred to as: DSP
  • FPGA Field Programmable Gate Array
  • the memory 12 may be a volatile memory (English: volatile memory), such as random access memory (RAM: RAM); or non-volatile memory (English: non-volatile memory), for example only Read memory (English: read-only memory, ROM for short), flash memory (English: flash memory), hard disk (English: hard disk drive, HDD for short) or solid state drive (English: solid-state drive, SSD for short) Or a combination of the above types of memories for storing related applications and configuration files that can implement the configuration method of the present invention.
  • volatile memory such as random access memory (RAM: RAM); or non-volatile memory
  • Read memory English: read-only memory, ROM for short
  • flash memory English: flash memory
  • hard disk English: hard disk drive, HDD for short
  • SSD solid state drive
  • the processor 11 can perform various functions of the configuration device by running or executing software programs and/or modules stored in the memory 12, as well as invoking data stored in the memory 12.
  • the processor 11 may be configured to obtain a performance indicator parameter, and when the obtained performance indicator parameter is greater than or equal to a preset threshold, the message parsing module configures the attribute of the cache (English: cache) to not be allocated. (English: allocate) operation.
  • the performance indicator parameter is used to indicate the load condition of the CPU, and the performance indicator parameter may include any one or more of the following combinations: CPU usage, cache hit ratio, DDR access delay, and number of instructions per cycle (English: Instruction Per Cycle, referred to as: IPC) indicator.
  • the processor 11 is further configured to: when the obtained performance indicator parameter is greater than or equal to a preset threshold, configure the packet parsing module to start the selective packet discarding function, so as to serve the packet.
  • the parsing module discards the packets with lower priority in the pending packets.
  • FIG. 2 is a flowchart of a configuration method according to an embodiment of the present disclosure. The method is applied to a configuration device. As shown in FIG. 2, the configuration method may include the following steps:
  • the performance indicator parameter is used to indicate the load condition of the CPU.
  • the performance indicator parameter may be CPU usage.
  • the attribute of the cache is configured by the packet parsing module to not perform the allocation operation.
  • the packet parsing module configures the cache attribute as The allocation operation is not performed in order to stop the allocation of the cache, thereby avoiding frequent swapping in and out of the cached data in the cache.
  • the configuration method provided by the embodiment of the present invention avoids the cached data in the cache by configuring the cached attribute to be not allocated by the packet parsing module when determining that the obtained performance indicator parameter is greater than or equal to the preset threshold. Frequently swap in and out, which solves the problem that the processor cannot be recovered after the performance of the processor is degraded. This avoids the problem of service interruption caused by the processor being in a low performance state for a long time, and improves the stability and robustness of the system.
  • FIG. 3 is another configuration method according to an embodiment of the present invention. As shown in FIG. 3, the method may include:
  • the processor obtains performance parameter parameters.
  • the processor configures the cache attribute to not perform the allocation operation, and configures the message parsing module to start the selective packet discarding function, so that the packet is sent.
  • the parsing module discards the packets with lower priority in the pending packets.
  • the processor determines that the performance indicator parameter is greater than or equal to the preset threshold, it indicates that the processing load of the processor exceeds the processing.
  • the maximum processing capability of the device the processor can configure the packet parsing module to perform the selective packet discarding function, so that the packet parsing module discards the packet.
  • the packets with lower priority are processed in the packets to be processed, so that the processor can preferentially process the packets with higher priority, which prevents the higher priority services from being affected.
  • the preset threshold may be set according to the requirements of the actual application scenario, and the embodiment of the present invention is not specifically limited herein.
  • the processor performs service processing on the packet corresponding to the message descriptor in the packet to be processed according to the message descriptor stored in the cache.
  • the processor may preferentially store the report according to the cache.
  • the text descriptor performs processing on the packet corresponding to the message descriptor in the message to be processed, and gradually, the performance of the processor is restored.
  • the steps 301-302 and the execution of the step 303 are not in a sequential relationship, and the present invention does not specifically limit the execution order of the steps 301-302 and 303.
  • step 304 In order to be able to process the message normally after the performance of the processor is restored, the following step 304 can be performed:
  • the processor reacquires performance parameter parameters.
  • the time parameter for acquiring the performance indicator parameter periodically by the processor may be preset, and according to the time parameter, the processor may repeatedly obtain the performance indicator parameter.
  • step 304 If the performance indicator parameter that is re-acquired in step 304 is less than the preset threshold, the following step 305 is performed. If the re-acquired performance indicator parameter is still greater than or equal to the preset threshold, the processor's processing performance is still low. Step 304 is performed until the re-acquired performance indicator parameter is less than a preset threshold.
  • the processor configures a cached attribute to perform an allocation operation by using a packet parsing module, and configures the packet parsing module to disable the selective packet discarding function.
  • the processor may use the packet parsing module to set the cache attribute. After the configuration is performed, the packet parsing module is configured to disable the selective packet discarding function to process the packets.
  • the packet parsing module can be re-executed after the selective packet discarding function is disabled. 301, so that when the processing load of the processor exceeds the maximum processing capability of the processor again, the performance of the processor can be restored by performing steps 302-step 305, and normal message processing is performed.
  • the configuration method provided by the embodiment of the present invention avoids the cached data in the cache by configuring the cached attribute to be not allocated by the packet parsing module when determining that the obtained performance indicator parameter is greater than or equal to the preset threshold. Frequently swap in and out, which solves the problem that the processor cannot be recovered after the performance of the processor is degraded. This avoids the problem of service interruption caused by the processor being in a low performance state for a long time, and improves the stability and robustness of the system.
  • the packet parsing module is configured to enable the selective packet discarding function when the obtained performance index parameter is greater than or equal to the preset threshold, so that the service with higher priority is avoided when the processor performance is low. Great impact.
  • the configuration method provided by the embodiment of the present invention can be applied to an application scenario in which a majority of CPUs forward packets.
  • the packet parsing module may be a packet parsing engine module (English: Packet Parse Engine, PPE for short).
  • the specific system architecture of the scenario may be as shown in FIG. 4 , where The system architecture includes: Gigabit Ethernet (English: Gigabit Ethernet, GE for short), PPE, Buffer Management Unit (BMU), Traffic Management Module (English: Traffic Management, TM), DDR , business version, processor. And, to indicate the performance of the CPU load
  • the indicator parameter is an example of CPU usage.
  • the specific processing flow of packet forwarding is as follows:
  • Step 1 The PPE applies to the BMU for memory caching (English: Buffer) and allocates a cache.
  • Step 2 The GE interface receives the packet sent by the service version, and sends the received packet to the PPE.
  • the PPE parses the received packet to generate a packet descriptor.
  • Step 3 The PPE caches the received message into the buffer applied in step 1, and stores the partial descriptor related to the service processing in the message descriptor in the cache allocated in step 1.
  • Step 4 The processor obtains the message descriptor in the cache, and performs service processing according to the obtained message descriptor.
  • Step 5 The processor sends the message descriptor to the TM after processing the service.
  • Step 6 The TM schedules the packet stored in the buffer according to the message descriptor and sends the packet to the PPE.
  • Step 7 The PPE sends the packet to the service board through the GE interface.
  • Step 8 The PPE releases the Buffer applied in step 1 to the BMU.
  • the processor may obtain the CPU usage rate and determine whether the CPU usage is greater than or equal to a preset threshold. When the CPU usage is greater than or equal to the preset threshold, the processing of the processor is indicated. The load exceeds the maximum processing capacity of the processor. In this case, the processor can configure the cache attribute to not perform the allocate operation, and preferentially process the packet corresponding to the message descriptor stored in the cache. The processor may configure the PPE to enable the selective packet discarding function, so that the PPE discards the packets with lower priority in the pending packets, so that the processor can Priority is given to processing packets with higher priority. Gradually, the performance of the processor will be gradually restored.
  • the processor can re-acquire the CPU usage, and configure the cache attribute to be performed by the PPE when the CPU usage is less than a preset threshold. Configure the PPE to disable selective packet discarding.
  • the processor can repeat the above process to be able to recover when the performance of the processor is degraded.
  • the embodiment of the present invention further provides another configuration device.
  • the configuration device may include: an obtaining unit 41 and a configuration unit 42.
  • the obtaining unit 41 is configured to obtain a performance indicator parameter, where the performance indicator parameter is used to indicate a load condition of the CPU.
  • the configuration unit 42 is configured to configure, by the message parsing module, the attribute of the cache to not perform the allocation operation when the performance indicator parameter acquired by the obtaining unit 41 is greater than or equal to the preset threshold.
  • the configuration unit 42 is further configured to configure the packet parsing module when the performance indicator parameter acquired by the acquiring unit 41 is greater than or equal to a preset threshold.
  • the selective packet discarding function is enabled, so that the packet parsing module discards the packets with lower priority in the pending packets.
  • the apparatus may further include: a processing unit 43.
  • the processing unit 43 is configured to perform service processing on the packet corresponding to the message descriptor in the message to be processed according to the message descriptor stored in the cache.
  • the obtaining unit 41 is further configured to: in the processing unit 43, according to the message descriptor stored in the cache, to process the message and the message. After performing the service processing on the packet corresponding to the descriptor, the performance indicator parameter is re-acquired.
  • the configuration unit 42 is further configured to configure, by the packet parsing module, the attribute of the cache to perform an allocation operation when the performance indicator parameter re-acquired by the obtaining unit 41 is smaller than the preset threshold. .
  • the configuration unit 42 is further configured to configure the packet parsing module when the performance indicator parameter re-acquired by the acquiring unit 41 is smaller than the preset threshold. Disable the selective packet discarding function.
  • the performance indicator parameter that is obtained by the acquiring unit 41 includes any one or more of the following combinations: CPU usage, Cache hit ratio, DDR access latency, IPC metrics.
  • the configuration device provided by the embodiment of the present invention is configured to execute the foregoing configuration method, so that the same effect as the above configuration method can be achieved.
  • the disclosed apparatus and method may be implemented in other manners.
  • the device embodiments described above are merely illustrative.
  • the division of the modules or units is only a logical function division.
  • there may be another division manner for example, multiple units or components may be used.
  • the combination may be integrated into another device, or some features may be ignored or not performed.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be in an electrical, mechanical or other form.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may be one physical unit or multiple physical units, that is, may be located in one place, or may be distributed to multiple different places. . Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
  • the above integrated unit can be implemented in the form of hardware or in the form of a software functional unit.
  • the integrated unit if implemented in the form of a software functional unit and sold or used as a standalone product, may be stored in a readable storage medium.
  • the technical solution of the present invention may contribute to the prior art or all or part of the technical solution may be embodied in the form of a software product.
  • the software product is stored in a storage medium and includes instructions for causing a device (which may be a microcontroller, chip, etc.) or a processor to perform all or part of the steps of the methods described in various embodiments of the present invention.
  • the foregoing storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a ROM, a RAM, a magnetic disk, or an optical disk.

Abstract

一种配置装置及方法，涉及通信领域，解决了处理器的性能下降后无法恢复的问题。具体方案为：获取单元获取性能指标参数（201），该性能指标参数用于指示CPU的负载情况；当获取单元获取到的性能指标参数大于或等于预设阈值时，配置单元通过报文解析模块将高速缓存的属性配置为不进行分配操作（202）。该方法用于恢复处理器处理性能的过程中。

Description

一种配置装置及方法 技术领域
本发明涉及通信领域，尤其涉及一种配置装置及方法。
背景技术
处理器在处理报文转发的过程中，通常会出现由于输入流量较大导致的处理负荷超出处理器最大处理能力的情况，而当处理负荷超出处理器的最大处理能力时，会由于高速缓存(英文：cache)中大量的数据替换、指令的命中率急剧下降、数据的命中率急剧下降、处理器对双倍速率同步动态随机存储器(英文：Double Data Rate，简称：DDR)的访问延迟变大等原因，导致处理器的性能急转直下，使得处理器的性能处于低位。当处理器的性能处于低位时，即使通过反压将输入流量进行限制，使得处理负荷处于处理器的最大处理能力以下，处理器的性能依然会保持在低位得不到恢复，最终会导致业务的中断。
因此，在处理器的处理负荷超出最大处理能力时，如何解决处理器的性能下降后无法恢复的问题已成为本领域技术人员研究的重要课题。
发明内容
本发明提供一种配置装置及方法，解决了处理器的性能下降后无法恢复的问题。
为达到上述目的，本发明采用如下技术方案：
本发明的第一方面，提供一种配置装置，包括：
获取单元，用于获取性能指标参数，所述性能指标参数用于指示中央处理器CPU的负载情况；
配置单元，用于当所述获取单元获取到的所述性能指标参数大于或等于预设阈值时，通过报文解析模块将高速缓存的属性配置为不进行分配操作。
其中，在获取单元获取到性能指标参数之后，可以判断性能指标参数是否大于或等于预设阈值，即确定处理器的处理负荷是否超出了处理器的最大处理能力，并在确定性能指标参数大于或等于预设阈值，即确定处理器的处理负荷超出了处理器的最大处理能力时，配置单元通过报文解析模块将高速缓存的属性配置为不进行分配操作，以便停止高速缓存的分配，进而避免cache中缓存数据的频繁换入换出。
结合第一方面，在一种可能的实现方式中，所述配置单元，还用于当所述获取单元获取到的所述性能指标参数大于或等于预设阈值时，配置所述报文解析模块启动选择性报文丢弃功能，以便所述报文解析模块丢弃待处理报文中优先级低的报文。
其中，为了避免在处理器性能下降后，优先级较高的业务受到影响，当确定获取单元获取到的性能指标参数大于或等于预设阈值时，配置单元还可以配置报文解析模块启动选择性报文丢弃功能。
结合第一方面和上述可能的实现方式，在另一种可能的实现方式中，所述装置还包括：
处理单元，用于根据所述高速缓存中存储的报文描述符，对待处理报文中与所述报文描述符对应的报文进行业务处理。
其中，在配置单元通过报文解析模块将高速缓存的属性配置为不进行分配操作，并配置报文解析模块启动选择性报文丢弃功能的情况下，处理单元可以根据高速缓存中存储的报文描述符，优先对待处理报文中与该报文描述符对应的报文进行业务处理，以便处理器的性能逐渐地恢复。
结合第一方面和上述可能的实现方式，在另一种可能的实现方式中，所述获取单元，还用于在所述处理单元根据所述高速缓存中存储的报文描述符，对待处理报文中与所述报文描述符对应的报文进行业务处理之后，重新获取所述性能指标参数；
所述配置单元，还用于当所述获取单元重新获取的所述性能指标参数小于所述预设阈值时，通过所述报文解析模块将所述高速缓 存的属性配置为进行分配操作。
其中，为了能够在处理器的性能得到恢复之后，正常的处理报文，获取单元还可以重新获取性能指标参数，并且，当获取单元重新获取的性能指标参数小于预设阈值时，配置单元通过报文解析模块将高速缓存的属性配置为进行分配操作。
结合第一方面和上述可能的实现方式，在另一种可能的实现方式中，所述配置单元，还用于当所述获取单元重新获取的所述性能指标参数小于所述预设阈值时，配置所述报文解析模块关闭选择性报文丢弃功能。
结合第一方面和上述可能的实现方式，在另一种可能的实现方式中，所述获取单元获取到的所述性能指标参数包括以下任意一种或多种的组合：CPU占用率、高速缓存命中率、双倍数据速率DDR访问时延、每周期指令数IPC指标。
需要说明的是，本发明在此仅对获取单元获取到的性能指标参数进行了举例说明，该性能指标参数包括但不限于本发明所述的CPU占用率、高速缓存命中率、DDR访问时延、IPC指标，能够用于指示CPU的负载情况的参数均属于本发明所述的性能指标参数。
本发明的第二方面，提供一种配置方法，包括：
获取性能指标参数，所述性能指标参数用于指示中央处理器CPU的负载情况；
当所述性能指标参数大于或等于预设阈值时，通过报文解析模块将高速缓存的属性配置为不进行分配操作。
其中，通过在确定获取到的性能指标参数大于或等于预设阈值时，通过报文解析模块将高速缓存的属性配置为不进行分配操作，避免了cache中缓存的数据频繁的换入换出，从而解决了处理器的性能下降后无法恢复的问题，这样可以避免处理器长时间处于性能低下状态导致的业务中断的问题出现，提高了系统的稳定性和健壮性。
结合第二方面，在一种可能的实现方式中，当所述性能指标参 数大于或等于预设阈值时，所述方法还包括：
配置所述报文解析模块启动选择性报文丢弃功能，以便所述报文解析模块丢弃待处理报文中优先级低的报文。
其中，当确定获取到的性能指标参数大于或等于预设阈值时，还可以配置报文解析模块启动选择性报文丢弃功能，以避免在处理器性能下降后，优先级较高的业务受到影响。
结合第二方面和上述可能的实现方式，在另一种可能的实现方式中，所述方法还包括：
根据所述高速缓存中存储的报文描述符，对待处理报文中与所述报文描述符对应的报文进行业务处理。
结合第二方面和上述可能的实现方式，在另一种可能的实现方式中，在所述根据所述高速缓存中存储的报文描述符，对待处理报文中与所述报文描述符对应的报文进行业务处理之后，还包括：
重新获取所述性能指标参数；
当重新获取的所述性能指标参数小于所述预设阈值时，通过所述报文解析模块将所述高速缓存的属性配置为进行分配操作。
结合第二方面和上述可能的实现方式，在另一种可能的实现方式中，当重新获取的所述性能指标参数小于所述预设阈值时，所述方法还包括：
配置所述报文解析模块关闭选择性报文丢弃功能。
结合第二方面和上述可能的实现方式，在另一种可能的实现方式中，所述性能指标参数包括以下任意一种或多种的组合：CPU占用率、高速缓存命中率、双倍数据速率DDR访问时延、每周期指令数IPC指标。
本发明的第三方面，提供一种配置装置，包括：处理器，所述处理器用于执行第二方面或第二方面的可能的实现方式提供的配置方法，以实现第一方面或第一方面的可能的实现方式中配置单元和获取单元的功能。
结合第三方面，在一种可能的实现方式中，所述处理器，还用 于执行第二方面的可能的实现方式提供的配置方法，以实现第一方面的可能的实现方式中处理单元的功能。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例提供的一种配置装置的结构示意图；
图2为本发明实施例提供的一种配置方法的流程示意图；
图3为本发明实施例提供的另一种配置方法的流程示意图；
图4为本发明实施例提供的一种处理场景下的系统架构示意图；
图5为本发明实施例提供的另一种配置装置的结构示意图；
图6为本发明实施例提供的又一种配置装置的结构示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明的基本原理是：处理器周期性的检测用于指示中央处理器(英文：central processing unit，简称：CPU)的负载情况的性能指标参数是否大于或等于预设阈值，并在确定性能指标参数大于或等于预设阈值时，通过报文解析模块将高速缓存(英文：cache)的属性配置为不进行分配(英文：allocate)操作，这样可以避免cache中缓存的数据频繁的换入换出，从而使得在处理器的性能下降后能够得到恢复。
本发明实施例提供的配置方法可以由配置装置执行。图1示出 的是与本发明各实施例相关的配置装置的结构框图。
如图1所示，该配置装置可以包括：处理器11、存储器12。
下面结合图1对配置装置的各个构成部件进行具体的介绍：
处理器11可能是一个CPU，也可以是特定集成电路(英文：Application Specific Integrated Circuit，简称：ASIC)，或者是被配置成实施本发明实施例的一个或多个集成电路，例如：一个或多个微处理器(英文：digital singnal processor，简称：DSP)，或，一个或者多个现场可编程门阵列(英文：Field Programmable Gate Array，简称：FPGA)。
存储器12可以是易失性存储器(英文：volatile memory)，例如随机存取存储器(英文：random-access memory，简称：RAM)；或者非易失性存储器(英文：non-volatile memory)，例如只读存储器(英文：read-only memory，简称ROM)，快闪存储器(英文：flash memory)，硬盘(英文：hard disk drive，简称：HDD)或固态硬盘(英文：solid-state drive，简称：SSD)；或者上述种类的存储器的组合，用于存储可实现本发明配置方法的相关应用程序、以及配置文件。
处理器11可以通过运行或执行存储在存储器12内的软件程序和/或模块，以及调用存储在存储器12内的数据，执行配置装置的各种功能。
具体的，处理器11可以用于获取性能指标参数，并当获取到的性能指标参数大于或等于预设阈值时，通过报文解析模块将高速缓存(英文：cache)的属性配置为不进行分配(英文：allocate)操作。
其中，性能指标参数用于指示CPU的负载情况，该性能指标参数可以包括以下任意一种或多种的组合：CPU占用率、高速缓存命中率、DDR访问时延、每周期指令数(英文：Instruction Per Cycle，简称：IPC)指标。
处理器11，还可以用于当获取到的性能指标参数大于或等于预设阈值时，配置报文解析模块启动选择性报文丢弃功能，以便报文 解析模块丢弃待处理报文中优先级低的报文。
下面结合附图，对本发明的实施例进行具体阐述。
图2为本发明实施例提供的一种配置方法的流程图，该方法应用于配置装置中，如图2所示，该配置方法可以包括以下步骤：
201、获取性能指标参数。
其中，该性能指标参数用于指示CPU的负载情况。示例性的，该性能指标参数可以为CPU占用率。
202、当性能指标参数大于或等于预设阈值时，通过报文解析模块将高速缓存的属性配置为不进行分配操作。
具体的，在获取到性能指标参数之后，可以判断性能指标参数是否大于或等于预设阈值，并在确定性能指标参数大于或等于预设阈值时，通过报文解析模块将高速缓存的属性配置为不进行分配操作，以便停止高速缓存的分配，进而避免cache中缓存数据的频繁换入换出。
本发明实施例提供的配置方法，通过在确定获取到的性能指标参数大于或等于预设阈值时，通过报文解析模块将高速缓存的属性配置为不进行分配操作，避免了cache中缓存的数据频繁的换入换出，从而解决了处理器的性能下降后无法恢复的问题，这样可以避免处理器长时间处于性能低下状态导致的业务中断的问题出现，提高了系统的稳定性和健壮性。
图3为本发明实施例提供的另一种配置方法，如图3所示，该方法可以包括：
301、处理器获取性能指标参数。
302、当性能指标参数大于或等于预设阈值时，处理器通过报文解析模块将高速缓存的属性配置为不进行分配操作，并配置报文解析模块启动选择性报文丢弃功能，以便报文解析模块丢弃待处理报文中优先级低的报文。
其中，在获取到性能指标参数之后，若处理器确定得到性能指标参数大于或等于预设阈值时，表明处理器的处理负荷超过了处理 器的最大处理能力，此时，处理器可以通过报文解析模块将高速缓存的属性配置为不进行分配操作的同时，配置报文解析模块启动选择性报文丢弃功能，以便报文解析模块丢弃待处理报文中优先级低的报文，从而使得处理器可以优先处理优先级较高的报文，避免了优先级较高的业务受到较大影响。
需要说明的是，在本发明实施例中，预设阈值可以根据实际应用场景的需求进行设定，本发明实施例在此不做具体限定。
303、处理器根据高速缓存中存储的报文描述符，对待处理报文中与报文描述符对应的报文进行业务处理。
其中，在处理器通过报文解析模块将高速缓存的属性配置为不进行分配操作，并配置报文解析模块启动选择性报文丢弃功能的情况下，处理器可以优先根据高速缓存中存储的报文描述符，对待处理报文中与报文描述符对应的报文进行业务处理，逐渐地，处理器的性能将会得到恢复。
需要说明的是，在本发明实施例中，步骤301-步骤302与步骤303的执行没有先后关系，本发明在此对步骤301-步骤302与步骤303的执行顺序不做具体限制。
为了能够在处理器的性能得到恢复之后，正常的处理报文，可以执行以下步骤304：
304、处理器重新获取性能指标参数。
其中，可以预先设定一个用于处理器周期性的获取性能指标参数的时间参数，根据该时间参数处理器可以重复的获取性能指标参数。
在步骤304中重新获取的性能指标参数小于预设阈值时，执行以下步骤305，若重新获取的性能指标参数仍然大于或等于预设阈值，表明处理器的处理性能仍处于低位，此时可以重复执行步骤304，直至重新获取到的性能指标参数小于预设阈值。
305、处理器通过报文解析模块将高速缓存的属性配置为进行分配操作，配置报文解析模块关闭选择性报文丢弃功能。
其中，当重新获取的性能指标参数小于预设阈值时，表明处理器的处理负荷已低于处理器的最大处理能力，此时，处理器便可以通过报文解析模块将所述高速缓存的属性配置为进行分配操作，配置报文解析模块关闭选择性报文丢弃功能，以正常的进行报文的处理。
当然，当重新获取到的性能指标参数小于预设阈值，并通过报文解析模块将高速缓存的属性配置为进行分配操作，配置报文解析模块关闭选择性报文丢弃功能之后，可以重新执行步骤301，以便当处理器的处理负荷再次超过处理器的最大处理能力时，可以通过执行步骤302-步骤305使得处理器的性能得到恢复，并进行正常的报文处理。
本发明实施例提供的配置方法，通过在确定获取到的性能指标参数大于或等于预设阈值时，通过报文解析模块将高速缓存的属性配置为不进行分配操作，避免了cache中缓存的数据频繁的换入换出，从而解决了处理器的性能下降后无法恢复的问题，这样可以避免处理器长时间处于性能低下状态导致的业务中断的问题出现，提高了系统的稳定性和健壮性。
并且，通过在确定获取到的性能指标参数大于或等于预设阈值时，配置报文解析模块启动选择性报文丢弃功能，避免了在处理器性能低下的情况下，优先级较高的业务受到较大影响。
其中，本发明实施例提供的配置方法可以应用于大部分CPU转发报文的应用场景中，本发明实施例在此以一种典型的处理场景为例，对本发明提供的配置方法进行举例说明。其中，在该场景下，报文解析模块具体的可以为包解析引擎模块(英文：Packet Parse Engine，简称：PPE)，该场景的具体系统架构可以如图4所示，其中，图4所示的系统架构包括：千兆以太网(英文：Gigabit Ethernet，简称：GE)、PPE、缓存管理单元(英文：Buffer Management Unit，简称BMU)、流量管理模块(英文：Traffic Management，简称TM)、DDR、业务版、处理器。并且，以用于指示CPU的负载情况的性能 指标参数为CPU占用率为例。在该系统架构下，参见他4，报文转发的具体处理流程如下：
步骤1：PPE向BMU申请内存缓存(英文：Buffer)，并分配cache。
步骤2：GE口接收业务版发送的报文，并将接收到的报文发送至PPE，PPE对接收到的报文进行解析，生成报文描述符。
步骤3：PPE将接收到的报文缓存到步骤1中申请到的buffer中，并将报文描述符中与业务处理相关的部分描述符存储在步骤1分配的cache中。
步骤4：处理器获取cache中报文描述符，并根据获取到的报文描述符进行业务处理。
步骤5：处理器将业务处理完毕后将报文描述符发送至TM。
步骤6：TM根据报文描述符调度出buffer中存储的报文，并发送给PPE。
步骤7：PPE将报文通过GE口发送给业务板。
步骤8：PPE向BMU释放步骤1中申请到的Buffer。
其中，在上述流程执行的过程中，处理器可以获取CPU占用率，并判断CPU占用率是否大于或等于预设阈值，当确定出CPU占用率大于或等于预设阈值时，表明处理器的处理负荷超过了处理器的最大处理能力，此时，处理器可以通过PPE将cache的属性配置为不进行allocate操作，并优先对存储在cache中的报文描述符对应的报文进行业务处理，进一步的，还可以在确定出CPU占用率大于或等于预设阈值时，处理器配置PPE启动选择性报文丢弃功能，以便PPE丢弃待处理报文中优先级低的报文，从而使得处理器可以优先处理优先级较高的报文，逐渐地，处理器的性能将会逐步得到恢复。
进一步的，为了能够在处理器的性能得到恢复之后，正常的处理报文，处理器可以重新获取CPU占用率，并在CPU的占用率小于预设阈值时，通过PPE将cache的属性配置为进行allocate操作，配置PPE关闭选择性报文丢弃功能。
处理器可以重复执行上述过程，以便在处理器的性能下降时能够得到恢复。
本发明实施例还提供另一种配置装置，如图5所示，该配置装置可以包括：获取单元41、配置单元42。
获取单元41，用于获取性能指标参数，所述性能指标参数用于指示CPU的负载情况。
配置单元42，用于当所述获取单元41获取到的所述性能指标参数大于或等于预设阈值时，通过报文解析模块将高速缓存的属性配置为不进行分配操作。
在本发明实施例中，进一步可选的，所述配置单元42，还用于当所述获取单元41获取到的所述性能指标参数大于或等于预设阈值时，配置所述报文解析模块启动选择性报文丢弃功能，以便所述报文解析模块丢弃待处理报文中优先级低的报文。
在本发明实施例中，进一步可选的，如图6所示，所述装置还可以包括：处理单元43。
处理单元43，用于根据所述高速缓存中存储的报文描述符，对待处理报文中与所述报文描述符对应的报文进行业务处理。
在本发明实施例中，进一步可选的，所述获取单元41，还用于在所述处理单元43根据所述高速缓存中存储的报文描述符，对待处理报文中与所述报文描述符对应的报文进行业务处理之后，重新获取所述性能指标参数。
所述配置单元42，还用于当所述获取单元41重新获取的所述性能指标参数小于所述预设阈值时，通过所述报文解析模块将所述高速缓存的属性配置为进行分配操作。
在本发明实施例中，进一步可选的，所述配置单元42，还用于当所述获取单元41重新获取的所述性能指标参数小于所述预设阈值时，配置所述报文解析模块关闭选择性报文丢弃功能。
在本发明实施例中，进一步可选的，所述获取单元41获取到的所述性能指标参数包括以下任意一种或多种的组合：CPU占用率、 高速缓存命中率、DDR访问时延、IPC指标。
本发明实施例提供的配置装置，用于执行上述配置方法，因此可以达到与上述配置方法相同的效果。
通过以上的实施方式的描述，所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，仅以上述各功能模块的划分进行举例说明，实际应用中，可以根据需要而将上述功能分配由不同的功能模块完成，即将装置的内部结构划分成不同的功能模块，以完成以上描述的全部或者部分功能。
在本申请所提供的几个实施例中，应该理解到，所揭露的装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述模块或单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个装置，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是一个物理单元或多个物理单元，即可以位于一个地方，或者也可以分布到多个不同地方。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本发明各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。
所述集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个可读取存储介质中。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来， 该软件产品存储在一个存储介质中，包括若干指令用以使得一个设备(可以是单片机，芯片等)或处理器(processor)执行本发明各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、ROM、RAM、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (14)

  1. 一种配置装置，其特征在于，包括：
    获取单元，用于获取性能指标参数，所述性能指标参数用于指示中央处理器CPU的负载情况；
    配置单元，用于当所述获取单元获取到的所述性能指标参数大于或等于预设阈值时，通过报文解析模块将高速缓存的属性配置为不进行分配操作。
  2. 根据权利要求1所述的装置，其特征在于，
    所述配置单元，还用于当所述获取单元获取到的所述性能指标参数大于或等于预设阈值时，配置所述报文解析模块启动选择性报文丢弃功能，以便所述报文解析模块丢弃待处理报文中优先级低的报文。
  3. 根据权利要求1或2所述的装置，其特征在于，所述装置还包括：
    处理单元，用于根据所述高速缓存中存储的报文描述符，对待处理报文中与所述报文描述符对应的报文进行业务处理。
  4. 根据权利要求3所述的装置，其特征在于，
    所述获取单元，还用于在所述处理单元根据所述高速缓存中存储的报文描述符，对待处理报文中与所述报文描述符对应的报文进行业务处理之后，重新获取所述性能指标参数；
    所述配置单元，还用于当所述获取单元重新获取的所述性能指标参数小于所述预设阈值时，通过所述报文解析模块将所述高速缓存的属性配置为进行分配操作。
  5. 根据权利要求4所述的装置，其特征在于，
    所述配置单元，还用于当所述获取单元重新获取的所述性能指标参数小于所述预设阈值时，配置所述报文解析模块关闭选择性报文丢弃功能。
  6. 根据权利要求1-5中任一项所述的装置，其特征在于，
    所述获取单元获取到的所述性能指标参数包括以下任意一种或多种的组合：CPU占用率、高速缓存命中率、双倍数据速率DDR访 问时延、每周期指令数IPC指标。
  7. 一种配置方法，其特征在于，包括：
    获取性能指标参数，所述性能指标参数用于指示中央处理器CPU的负载情况；
    当所述性能指标参数大于或等于预设阈值时，通过报文解析模块将高速缓存的属性配置为不进行分配操作。
  8. 根据权利要求7所述的方法，其特征在于，当所述性能指标参数大于或等于预设阈值时，所述方法还包括：
    配置所述报文解析模块启动选择性报文丢弃功能，以便所述报文解析模块丢弃待处理报文中优先级低的报文。
  9. 根据权利要求7或8所述的方法，其特征在于，所述方法还包括：
    根据所述高速缓存中存储的报文描述符，对待处理报文中与所述报文描述符对应的报文进行业务处理。
  10. 根据权利要求9所述的方法，其特征在于，在所述根据所述高速缓存中存储的报文描述符，对待处理报文中与所述报文描述符对应的报文进行业务处理之后，还包括：
    重新获取所述性能指标参数；
    当重新获取的所述性能指标参数小于所述预设阈值时，通过所述报文解析模块将所述高速缓存的属性配置为进行分配操作。
  11. 根据权利要求10所述的方法，其特征在于，当重新获取的所述性能指标参数小于所述预设阈值时，所述方法还包括：
    配置所述报文解析模块关闭选择性报文丢弃功能。
  12. 根据权利要求7-11中任一项所述的方法，其特征在于，
    所述性能指标参数包括以下任意一种或多种的组合：CPU占用率、高速缓存命中率、双倍数据速率DDR访问时延、每周期指令数IPC指标。
  13. 一种配置装置，其特征在于，包括：
    处理器，用于获取性能指标参数，当所述性能指标参数大于或等 于预设阈值时，通过报文解析模块将高速缓存的属性配置为不进行分配操作，所述性能指标参数用于指示中央处理器CPU的负载情况。
  14. 根据权利要求13所述的装置，其特征在于，
    所述处理器，还用于当所述性能指标参数大于或等于预设阈值时，配置所述报文解析模块启动选择性报文丢弃功能，以便所述报文解析模块丢弃待处理报文中优先级低的报文。
PCT/CN2016/075492 2016-03-03 2016-03-03 一种配置装置及方法 WO2017147851A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/CN2016/075492 WO2017147851A1 (zh) 2016-03-03 2016-03-03 一种配置装置及方法
CN201680083122.9A CN108781170B (zh) 2016-03-03 2016-03-03 一种配置装置及方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2016/075492 WO2017147851A1 (zh) 2016-03-03 2016-03-03 一种配置装置及方法

Publications (1)

Publication Number Publication Date
WO2017147851A1 true WO2017147851A1 (zh) 2017-09-08

Family

ID=59743373

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/075492 WO2017147851A1 (zh) 2016-03-03 2016-03-03 一种配置装置及方法

Country Status (2)

Country Link
CN (1) CN108781170B (zh)
WO (1) WO2017147851A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109787916A (zh) * 2019-01-31 2019-05-21 南京国电南自电网自动化有限公司 一种流量控制方法及系统
CN115514681A (zh) * 2022-09-16 2022-12-23 北京天融信网络安全技术有限公司 一种测试设备稳定性的方法、装置、系统、设备及介质

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080130671A1 (en) * 2001-07-18 2008-06-05 Nec Corporation Packet distributing apparatus and packet distributing method
CN102055671A (zh) * 2010-12-17 2011-05-11 天津曙光计算机产业有限公司 一种多应用发包的优先级管理方法
CN102420751A (zh) * 2011-11-28 2012-04-18 曙光信息产业(北京)有限公司 一种报文采样系统的负载判断系统和方法
CN102710465A (zh) * 2012-06-07 2012-10-03 浪潮电子信息产业股份有限公司 一种监控集群存储接口节点负载的方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100478900C (zh) * 2006-06-14 2009-04-15 华为技术有限公司 一种中央处理器系统性能测试方法
CN102063407B (zh) * 2010-12-24 2012-12-26 清华大学 用于多核处理器的网络牺牲Cache及基于该Cache的数据请求方法
CN102209028A (zh) * 2011-05-06 2011-10-05 北京傲天动联技术有限公司 控制cpu流量的装置和方法
US9043554B2 (en) * 2012-12-21 2015-05-26 Apple Inc. Cache policies for uncacheable memory requests
CN105183431B (zh) * 2015-08-05 2018-09-28 瑞斯康达科技发展股份有限公司 一种cpu利用率控制方法及装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080130671A1 (en) * 2001-07-18 2008-06-05 Nec Corporation Packet distributing apparatus and packet distributing method
CN102055671A (zh) * 2010-12-17 2011-05-11 天津曙光计算机产业有限公司 一种多应用发包的优先级管理方法
CN102420751A (zh) * 2011-11-28 2012-04-18 曙光信息产业(北京)有限公司 一种报文采样系统的负载判断系统和方法
CN102710465A (zh) * 2012-06-07 2012-10-03 浪潮电子信息产业股份有限公司 一种监控集群存储接口节点负载的方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109787916A (zh) * 2019-01-31 2019-05-21 南京国电南自电网自动化有限公司 一种流量控制方法及系统
CN115514681A (zh) * 2022-09-16 2022-12-23 北京天融信网络安全技术有限公司 一种测试设备稳定性的方法、装置、系统、设备及介质
CN115514681B (zh) * 2022-09-16 2024-02-06 北京天融信网络安全技术有限公司 一种测试设备稳定性的方法、装置、系统、设备及介质

Also Published As

Publication number Publication date
CN108781170A (zh) 2018-11-09
CN108781170B (zh) 2020-12-08

Similar Documents

Publication Publication Date Title
US9658912B2 (en) Method and apparatus for implementing heartbeat service of high availability cluster
US10708156B2 (en) Event-triggered, graph-centric predictive cache priming
US10645164B1 (en) Consistent latency for solid state drives
CN105760245B (zh) 一种存储数据的方法及装置
US10241722B1 (en) Proactive scheduling of background operations for solid state drives
US10339079B2 (en) System and method of interleaving data retrieved from first and second buffers
WO2016011811A1 (zh) 一种内存管理方法、装置及存储介质
US10303374B2 (en) Data check method and storage system
CN109582502A (zh) 存储系统故障处理方法、装置、设备及可读存储介质
KR20170013319A (ko) 데이터 관리 방법, 노드, 그리고 데이터베이스 클러스터를 위한 시스템
WO2020199760A1 (zh) 数据存储方法、存储器和服务器
WO2017147851A1 (zh) 一种配置装置及方法
CN103729236A (zh) 一种限制云计算用户资源使用额度的方法
US9239804B2 (en) Back-off mechanism for a peripheral page request log
WO2017147794A1 (zh) 差异数据备份的方法和设备
JP7455980B2 (ja) インスタンス配置方法、インスタンス管理ノード、コンピューティングノード及びコンピューティングデバイス
WO2015165055A1 (zh) 存储数据的方法、内存控制器和中央处理器
US9432476B1 (en) Proxy data storage system monitoring aggregator for a geographically-distributed environment
Wei et al. Beyond block i/o: implementing a distributed shared log in hardware
CN113835636A (zh) 数据存储方法、装置、全闪设备以及计算机可读存储介质
CN112860599B (zh) 数据缓存处理方法、装置以及存储介质
CN107273188B (zh) 一种虚拟机中央处理单元cpu绑定方法及装置
CN108432193B (zh) 一种检测报文反压的方法、装置及设备
WO2023124347A1 (zh) 一种存储节点的配置方法以及相关装置
CN103197992A (zh) GlusterFS脑裂的自动化恢复方法

Legal Events

Date Code Title Description
NENP Non-entry into the national phase

Ref country code: DE

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16892042

Country of ref document: EP

Kind code of ref document: A1

122 Ep: pct application non-entry in european phase

Ref document number: 16892042

Country of ref document: EP

Kind code of ref document: A1