WO2017137015A3 - 含有三维存储阵列的处理器 - Google Patents

含有三维存储阵列的处理器 Download PDF

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Publication number
WO2017137015A3
WO2017137015A3 PCT/CN2017/080462 CN2017080462W WO2017137015A3 WO 2017137015 A3 WO2017137015 A3 WO 2017137015A3 CN 2017080462 W CN2017080462 W CN 2017080462W WO 2017137015 A3 WO2017137015 A3 WO 2017137015A3
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WO
WIPO (PCT)
Prior art keywords
array
alc
dimensional memory
lut
computation
Prior art date
Application number
PCT/CN2017/080462
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English (en)
French (fr)
Other versions
WO2017137015A2 (zh
Inventor
张国飙
沈忱
Original Assignee
成都海存艾匹科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from CN201610083747.7A external-priority patent/CN107085452B/zh
Application filed by 成都海存艾匹科技有限公司 filed Critical 成都海存艾匹科技有限公司
Publication of WO2017137015A2 publication Critical patent/WO2017137015A2/zh
Publication of WO2017137015A3 publication Critical patent/WO2017137015A3/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17724—Structural details of logic blocks
    • H03K19/17728—Reconfigurable logic blocks, e.g. lookup tables
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7842—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G06F7/487—Multiplying; Dividing
    • G06F7/4876—Multiplying

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Complex Calculations (AREA)

Abstract

一种含有三维存储3D-M阵列（170）的三维处理器（100），它含有多个形成在一半导体衬底上的计算单元（110-i），每个计算单元都含有一算术逻辑电路ALC（180）和一基于3D-M的查找表3DM-LUT。ALC（180）形成在半导体衬底（0K）中，它对3DM-LUT数据进行算术运算。3DM-LUT存储与一数学函数或一数学模型相关的数据，它含有至少一3D-M阵列（170），该3D-M阵列（170）堆叠在ALC（180）上方。可编程计算单元可对计算进行现场定制。
PCT/CN2017/080462 2016-02-13 2017-04-13 含有三维存储阵列的处理器 WO2017137015A2 (zh)

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
CN201610083747.7 2016-02-13
CN201610083747.7A CN107085452B (zh) 2016-02-13 2016-02-13 基于三维印录存储器（3d-p）的处理器
CN201610260845.3 2016-04-22
CN201610260845 2016-04-22
CN201610289592 2016-05-02
CN201610289592.2 2016-05-02
CN201710237780 2017-04-12
CN201710237780.5 2017-04-12

Publications (2)

Publication Number Publication Date
WO2017137015A2 WO2017137015A2 (zh) 2017-08-17
WO2017137015A3 true WO2017137015A3 (zh) 2017-10-05

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US (3) US10763861B2 (zh)
WO (1) WO2017137015A2 (zh)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11527523B2 (en) * 2018-12-10 2022-12-13 HangZhou HaiCun Information Technology Co., Ltd. Discrete three-dimensional processor
US10445067B2 (en) * 2016-05-06 2019-10-15 HangZhou HaiCun Information Technology Co., Ltd. Configurable processor with in-package look-up table
KR102408858B1 (ko) 2017-12-19 2022-06-14 삼성전자주식회사 비휘발성 메모리 장치, 이를 포함하는 메모리 시스템 및 비휘발성 메모리 장치의 동작 방법
US10628295B2 (en) 2017-12-26 2020-04-21 Samsung Electronics Co., Ltd. Computing mechanisms using lookup tables stored on memory
US11398453B2 (en) * 2018-01-09 2022-07-26 Samsung Electronics Co., Ltd. HBM silicon photonic TSV architecture for lookup computing AI accelerator
CN108599849B (zh) * 2018-04-14 2021-01-01 上海交通大学 智能决策的光子处理系统和处理方法
US11296068B2 (en) * 2018-12-10 2022-04-05 HangZhou HaiCun Information Technology Co., Ltd. Discrete three-dimensional processor
CN115794730A (zh) * 2018-12-10 2023-03-14 杭州海存信息技术有限公司 分离的三维处理器
US10901694B2 (en) * 2018-12-31 2021-01-26 Micron Technology, Inc. Binary parallel adder and multiplier
CN112287632A (zh) * 2020-10-26 2021-01-29 成都华微电子科技有限公司 集成电路布线预判方法
US11709790B2 (en) * 2021-02-24 2023-07-25 Xilinx, Inc. Spatial distribution in a 3D data processing unit

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102217066A (zh) * 2008-12-10 2011-10-12 高通股份有限公司 3d微架构系统中的平行平面存储器及处理器耦合
CN102270504A (zh) * 2010-06-01 2011-12-07 三星电子株式会社 堆叠半导体存储器件、存储器系统及修复硅通孔缺陷的方法
CN103633091A (zh) * 2012-08-22 2014-03-12 成都海存艾匹科技有限公司 含有集成中间电路芯片的三维存储器
US20140085959A1 (en) * 2012-09-25 2014-03-27 Ruchir Saraswat 3d memory configurable for performance and power
US20140183691A1 (en) * 2012-12-28 2014-07-03 Ruchir Saraswat Resonant clocking for three-dimensional stacked devices
CN104205234A (zh) * 2012-03-30 2014-12-10 英特尔公司 用于存储器电路测试引擎的通用地址加扰器

Family Cites Families (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4870302A (en) 1984-03-12 1989-09-26 Xilinx, Inc. Configurable electrical circuit having configurable logic elements and configurable interconnects
US5046038A (en) 1989-07-07 1991-09-03 Cyrix Corporation Method and apparatus for performing division using a rectangular aspect ratio multiplier
US5060182A (en) 1989-09-05 1991-10-22 Cyrix Corporation Method and apparatus for performing the square root function using a rectangular aspect ratio multiplier
US5604499A (en) 1993-12-28 1997-02-18 Matsushita Electric Industrial Co., Ltd. Variable-length decoding apparatus
US5901274A (en) 1994-04-30 1999-05-04 Samsung Electronics Co. Ltd. Method for enlargement/reduction of image data in digital image processing system and circuit adopting the same
US5835396A (en) 1996-10-17 1998-11-10 Zhang; Guobiao Three-dimensional read-only memory
KR100202956B1 (ko) 1996-12-26 1999-06-15 전주범 디지털 신호 처리 시스템에서의 삼각 합수 룩업 테이블 액세스 방법 및 장치
US6263470B1 (en) 1998-02-03 2001-07-17 Texas Instruments Incorporated Efficient look-up table methods for Reed-Solomon decoding
US6181355B1 (en) 1998-07-17 2001-01-30 3Dlabs Inc. Ltd. Graphics processing with transcendental function generator
US7366748B1 (en) 2000-06-30 2008-04-29 Intel Corporation Methods and apparatus for fast argument reduction in a computing system
US7206410B2 (en) 2001-10-10 2007-04-17 Stmicroelectronics S.R.L. Circuit for the inner or scalar product computation in Galois fields
US20040044710A1 (en) 2002-08-28 2004-03-04 Harrison John R. Converting mathematical functions to power series
US7028247B2 (en) 2002-12-25 2006-04-11 Faraday Technology Corp. Error correction code circuit with reduced hardware complexity
JP4199100B2 (ja) 2003-12-12 2008-12-17 富士通株式会社 関数演算方法及び関数演算回路
JP3845636B2 (ja) 2004-01-21 2006-11-15 株式会社東芝 関数近似値の演算器
US20060106905A1 (en) 2004-11-17 2006-05-18 Chren William A Jr Method for reducing memory size in logarithmic number system arithmetic units
US7512647B2 (en) 2004-11-22 2009-03-31 Analog Devices, Inc. Condensed Galois field computing system
US7574468B1 (en) 2005-03-18 2009-08-11 Verisilicon Holdings (Cayman Islands) Co. Ltd. Digital signal processor having inverse discrete cosine transform engine for video decoding and partitioned distributed arithmetic multiply/accumulate unit therefor
US7539927B2 (en) 2005-04-14 2009-05-26 Industrial Technology Research Institute High speed hardware implementation of modified Reed-Solomon decoder
US8203564B2 (en) 2007-02-16 2012-06-19 Qualcomm Incorporated Efficient 2-D and 3-D graphics processing
US8106918B2 (en) 2007-05-01 2012-01-31 Vivante Corporation Apparatus and method for texture level of detail computation
US7962543B2 (en) 2007-06-01 2011-06-14 Advanced Micro Devices, Inc. Division with rectangular multiplier supporting multiple precisions and operand types
US9207910B2 (en) 2009-01-30 2015-12-08 Intel Corporation Digital signal processor having instruction set with an xK function using reduced look-up table
US9015452B2 (en) 2009-02-18 2015-04-21 Texas Instruments Incorporated Vector math instruction execution by DSP processor approximating division and complex number magnitude
US9363068B2 (en) 2010-08-03 2016-06-07 Intel Corporation Vector processor having instruction set with sliding window non-linear convolutional function
US8273610B2 (en) * 2010-11-18 2012-09-25 Monolithic 3D Inc. Method of constructing a semiconductor device and structure
WO2013095463A1 (en) 2011-12-21 2013-06-27 Intel Corporation Math circuit for estimating a transcendental function
US9753695B2 (en) 2012-09-04 2017-09-05 Analog Devices Global Datapath circuit for digital signal processors
US9385058B1 (en) * 2012-12-29 2016-07-05 Monolithic 3D Inc. Semiconductor device and structure
US9606796B2 (en) 2013-10-30 2017-03-28 Texas Instruments Incorporated Computer and methods for solving math functions

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102217066A (zh) * 2008-12-10 2011-10-12 高通股份有限公司 3d微架构系统中的平行平面存储器及处理器耦合
CN102270504A (zh) * 2010-06-01 2011-12-07 三星电子株式会社 堆叠半导体存储器件、存储器系统及修复硅通孔缺陷的方法
CN104205234A (zh) * 2012-03-30 2014-12-10 英特尔公司 用于存储器电路测试引擎的通用地址加扰器
CN103633091A (zh) * 2012-08-22 2014-03-12 成都海存艾匹科技有限公司 含有集成中间电路芯片的三维存储器
US20140085959A1 (en) * 2012-09-25 2014-03-27 Ruchir Saraswat 3d memory configurable for performance and power
US20140183691A1 (en) * 2012-12-28 2014-07-03 Ruchir Saraswat Resonant clocking for three-dimensional stacked devices

Also Published As

Publication number Publication date
US10763861B2 (en) 2020-09-01
US20170237440A1 (en) 2017-08-17
US20190115922A1 (en) 2019-04-18
WO2017137015A2 (zh) 2017-08-17
US20190115923A1 (en) 2019-04-18

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