WO2017128673A1 - 一种复用Flash ROM的双通道移动终端 - Google Patents

一种复用Flash ROM的双通道移动终端 Download PDF

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Publication number
WO2017128673A1
WO2017128673A1 PCT/CN2016/092246 CN2016092246W WO2017128673A1 WO 2017128673 A1 WO2017128673 A1 WO 2017128673A1 CN 2016092246 W CN2016092246 W CN 2016092246W WO 2017128673 A1 WO2017128673 A1 WO 2017128673A1
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WIPO (PCT)
Prior art keywords
processor
flash rom
slave
mobile terminal
usb
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PCT/CN2016/092246
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English (en)
French (fr)
Inventor
李春林
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努比亚技术有限公司
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Publication of WO2017128673A1 publication Critical patent/WO2017128673A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H04B1/401—Circuits for selecting or indicating operating mode

Definitions

  • the present invention relates to the field of communications technologies, and in particular, to a dual-channel mobile terminal that multiplexes a non-volatile flash memory (Flash ROM).
  • Flash ROM non-volatile flash memory
  • the embodiment of the present invention provides a dual-channel mobile terminal for multiplexing a Flash ROM, which aims to solve the problem of reducing the hardware cost of the dual-channel mobile terminal and improving hardware integration while ensuring the implementation of the existing functions.
  • an embodiment of the present invention provides a dual-channel mobile terminal that multiplexes a Flash ROM
  • the dual-channel mobile terminal includes a main processor configured to perform first-channel service processing, a main radio frequency circuit, and non-volatile a flash ROM, and a slave processor and a slave RF circuit configured to perform a second channel service processing;
  • the master processor is respectively connected to the main RF circuit and the flash ROM;
  • the slave processor and the slave a radio frequency circuit connection;
  • the main processor and the slave processor are respectively provided with a universal serial bus (USB) differential signal line pin;
  • the mobile terminal further includes a communication connection device;
  • the communication communication device is configured to connect a USB differential signal line pin of the main processor and a USB differential signal line pin of the slave processor when receiving the connection instruction sent by the main processor
  • the main processor establishes a USB connection with the slave processor, wherein after the master processor establishes a USB connection with the slave processor, the slave processor obtains the first by multiplexing the flash ROM Data related to the processing of the two-channel service.
  • the Flash ROM is configured to store related data for performing the first channel service processing.
  • the communication communication device includes a detection signal output module and a switch chip; the detection signal output module is respectively connected to the main processor and the slave processor; and the plurality of switch ends of the switch chip respectively correspond to Connecting to the USB differential signal line of the main processor and the slave processor;
  • the slave processor When the main processor is a USB host device, the slave processor is a USB slave device, and before establishing a USB connection, the main processor outputs a first control signal to the switch chip to control the switch chip connection.
  • the main processor outputs a second control signal to the detection signal output module to control the detection signal output module to output a detection signal to the slave processor to trigger the slave processor on its own USB differential signal line pin. Generating a differential signal thereon and outputting to the USB differential signal line pin of the main processor through the communication of the switch chip;
  • the detection signal output module is selected as a DC-DC circuit module, and the DC-DC circuit module is configured to generate a voltage for supplying the USB plug/unplug detection from the processor.
  • the main processor is further configured to determine, by using the received differential signal, a device type of the currently connected USB device.
  • the switch chip is a single-pole single-throw switch chip.
  • the main processor further includes a first control line pin, a second control line pin and a third control line pin;
  • the slave processor further includes a power pin;
  • the single-pole single-throw switch chip includes a resident switch end and a non-resident switch end, and the resident switch end is connected to a USB differential signal line pin of the main processor, and the non-resident switch end and the slave processing USB differential signal line pin connection;
  • the single-pole single-throw switch chip further includes an enable pin, a level configuration pin, the first control line pin is connected to the enable pin, and the second control line pin is connected to the level
  • the pin connection is configured, the third control line pin is connected to the signal input end of the detection signal output module, and the power supply pin of the slave processor is connected to the signal output end of the detection signal output module.
  • the main processor outputs a signal to the enable pin of the single-pole single-throw switch chip through the first control line pin to enable the single-pole single-throw switch chip;
  • the main processor outputs a signal to the level configuration pin of the single-pole single-throw switch chip through the second control line pin to control the resident switch end and the non-parking switch of the single-pole single-throw switch chip Terminal conduction;
  • the main processor outputs a signal to the signal input end of the detection signal output module through the third control line pin to control the detection signal output module to turn on or off the detection signal output.
  • the flash ROM includes at least a first storage area and a second storage area
  • the first storage area stores program data of the first channel service processing by the main processor
  • the second storage area stores program data of the second channel service processing by the slave processor.
  • the first storage area and the second storage area do not overlap, and both have margins.
  • the mobile terminal further includes a first random access memory and a second random access memory. Taking a memory; the first random access memory is connected to the main processor, the second random access memory is connected to the slave processor; and the host processor establishes a USB connection with the slave processor Then, the slave processor acquires program data stored in the second storage area and stores the data in the second random access memory for the slave processor to call.
  • the first random access memory and the flash ROM cooperate to store related data for performing first channel service processing.
  • the program data required by the main processor is stored in the flash ROM, and the temporary data generated when the main processor runs the program is stored on the first random access memory.
  • the flash ROM further includes a third storage area; when the storage space of the second random access memory is insufficient, the slave processor temporarily stores data in the third storage area.
  • the boot mode of the slave processor is a USB boot mode.
  • the hardware configuration or the firmware curing process is performed in advance from the processor.
  • the USB device is established as a USB device by running the internal firmware program and according to the hardware configuration or the firmware program.
  • the program stored in the Flash ROM is received from the USB data interface.
  • the main processor is configured as a main USB in advance for establishing a USB connection with the slave processor;
  • the slave program receives corresponding program data sent by the main processor from the flash ROM and stores the data in the second random access memory.
  • the slave program reads and runs the program data from the second random access memory to complete the boot process of the slave processor and perform the service processing of the second channel.
  • the USB boot process is performed each time after resetting or booting from the processor.
  • the single-pole single-throw switch chip is close to the slave processor.
  • the dual-channel mobile terminal for multiplexing the Flash ROM provided by the embodiment of the present invention, the dual-channel mobile terminal can communicate with the slave processor of the first channel and the second channel through the communication connecting device
  • the device establishes a USB communication channel between the main processor and the slave processor, thereby facilitating the sharing of the same Flash ROM between the host processor and the slave processor.
  • the invention can realize the multiplexing of the Flash ROM, so that the data storage of the dual processor in the dual channel mobile terminal can be completed by only one Flash ROM, thereby reducing the hardware cost and saving the PCB space.
  • FIG. 1 is a schematic structural diagram of hardware of an optional mobile terminal embodying various embodiments of the present invention
  • FIG. 2 is a schematic diagram of functional modules of an embodiment of a dual-channel mobile terminal for multiplexing a Flash ROM according to an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of a storage area division of an embodiment of a Flash ROM in a dual-channel mobile terminal multiplexed with a Flash ROM according to an embodiment of the present disclosure
  • FIG. 4 is a schematic diagram of functional modules of another embodiment of a dual-channel mobile terminal for multiplexing a Flash ROM according to an embodiment of the present disclosure
  • FIG. 5 is a schematic diagram of functional modules of an embodiment of the communication communication device of FIG. 2;
  • FIG. 6 is a schematic diagram of connection of major components in an embodiment of a dual-channel mobile terminal multiplexed with a Flash ROM according to an embodiment of the present disclosure
  • FIG. 7 is a schematic diagram of connection of main components and pins thereof in an embodiment of a dual-channel mobile terminal for multiplexing a Flash ROM according to an embodiment of the present invention.
  • the mobile terminal can be implemented in various forms.
  • the terminal described in the present invention may include, for example, a mobile phone, a smart phone, a notebook computer, a digital broadcast receiver, a personal digital assistant (PDA, Personal Digital Assistant), a tablet (PAD, Portable Android Device), a portable multimedia player. (PMP, Portable Media Player), a mobile terminal of a navigation device, and the like, and a fixed terminal such as a digital television (TV), a desktop computer, and the like.
  • PDA Personal Digital Assistant
  • PAD Portable Android Device
  • PMP Portable Media Player
  • TV digital television
  • desktop computer a desktop computer
  • FIG. 1 is a schematic structural diagram of hardware of an optional mobile terminal embodying various embodiments of the present invention.
  • the mobile terminal 100 may include a user input unit 110, an output unit 120, a memory 130, a controller 140, a power supply unit 150, and the like.
  • Figure 1 illustrates a mobile terminal having various components, but it should be understood that not all illustrated components are required to be implemented.
  • Output unit 120 is configured to provide an output signal (eg, an audio signal, a video signal, an alarm signal, a vibration signal, etc.) in a visual, audio, and/or tactile manner.
  • an output signal eg, an audio signal, a video signal, an alarm signal, a vibration signal, etc.
  • the output unit 120 may include a display unit 121 and the like.
  • the display unit 121 can display information processed in the mobile terminal 100. For example, when the mobile terminal 100 is in a phone call mode, the display unit 121 can display a user interface (UI, User Interface) or a graphical user interface related to a call or other communication (eg, text messaging, multimedia file download, etc.) ( GUI, Graphical User Interface).
  • UI User Interface
  • GUI Graphical User Interface
  • the display unit 121 may display a captured image and/or a received image, a UI or GUI showing a video or image and related functions, and the like.
  • the display unit 121 can function as an input device and an output device.
  • the display unit 121 may include liquid crystal Display (LCD, Liquid Crystal Display), Thin Film Transistor (LCD), Organic Light-Emitting Diode (OLED) display, flexible display, three-dimensional (3D) display, etc. At least one. Some of these displays may be configured to be transparent to allow a user to view from the outside, which may be referred to as a transparent display, and a typical transparent display may be, for example, a TOLED (Transparent Organic Light Emitting Diode) display or the like.
  • the mobile terminal 100 may include two or more display units (or other display devices), for example, the mobile terminal may include an external display unit (not shown) and an internal display unit (not shown) .
  • the touch screen can be used to detect touch input pressure as well as touch input position and touch input area.
  • the memory 130 may store a software program or the like for processing and control operations performed by the controller 140, or may temporarily store data (for example, a phone book, a message, a still image, a video, etc.) that has been output or is to be output. Moreover, the memory 130 may store data regarding various manners of vibration and audio signals that are output when a touch is applied to the touch screen.
  • the memory 130 may include at least one type of storage medium including a flash memory, a hard disk, a multimedia card, a card type memory (for example, SD or DX memory, etc.), a random access memory (RAM), static random access. Memory (SRAM, Static Random Access Memory), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), Programmable Read Only Memory (PROM, Programmable) Read Only Memory), magnetic memory, magnetic disk, optical disk, etc. Moreover, the mobile terminal 100 can cooperate with a network storage device that performs a storage function of the memory 130 through a network connection.
  • a network storage device that performs a storage function of the memory 130 through a network connection.
  • Controller 140 typically controls the overall operation of the mobile terminal. For example, controller 140 performs the control and processing associated with voice calls, data communications, video calls, and the like. The controller 140 may perform a pattern recognition process to recognize a handwriting input or a picture drawing input performed on the touch screen as a character or an image.
  • the power supply unit 150 receives external power or internal power under the control of the controller 140 and provides appropriate power required to operate the various components and components.
  • the various embodiments described herein can be implemented in a computer readable medium using, for example, computer software, hardware, or any combination thereof.
  • the embodiments described herein may use an Application Specific Integrated Circuit (ASIC), a Digital Signal Processing (DSP), a Digital Signal Processing Device (DSPD), Programmable Logic Device (PLD), Field Programmable Gate Array (FPGA), processor, controller, microcontroller, microprocessor, electronics designed to perform the functions described herein
  • ASIC Application Specific Integrated Circuit
  • DSP Digital Signal Processing
  • DSPD Digital Signal Processing Device
  • PLD Programmable Logic Device
  • FPGA Field Programmable Gate Array
  • processor controller, microcontroller, microprocessor, electronics designed to perform the functions described herein
  • controller 140 microcontroller, microprocessor
  • implementations such as procedures or functions may be implemented with separate software modules that permit the execution of at least one function or operation.
  • the software code can be implemented by a software application (or program) written in any suitable programming language, which can be stored in memory 130 and executed by controller 140.
  • the mobile terminal 100 further includes an application processor 200 (Application Processor, AP), a main modem 310 and a main radio frequency integrated circuit 320, a slave modem 410, and a slave radio frequency integrated circuit 420.
  • the master modem 310 and the primary radio frequency integrated circuit 320 form a first channel for the dual channel mobile terminal to perform service processing
  • the slave modem 410 and the slave radio frequency integrated circuit 420 form a second channel for the dual channel mobile terminal to perform service processing
  • the application processor 200 is connected to the main modem 310 to receive the user-triggered application operation instruction and obtain the type corresponding to the application operation instruction, and then deliver the operation instruction to the main modem 310 for processing according to the type corresponding to the operation instruction.
  • FIG. 2 is a schematic diagram of functional modules of an embodiment of a dual-channel mobile terminal for multiplexing a Flash ROM according to the present invention.
  • the dual-channel mobile terminal specifically includes: The main processor 10 of the one-channel service processing and the main radio frequency circuit 101, the slave processor 20 and the slave radio frequency circuit 201 configured to perform the second channel service processing, and further, the mobile terminal further includes a non-volatile flash memory 102 (Flash ROM) ), the Flash ROM is configured to store data.
  • the Flash ROM is preferably connected to the main processor 10, that is, the Flash ROM is mainly configured to store related data for performing the first channel service processing, such as storing the program required by the main processor 10.
  • the dual-channel mobile terminal further includes a communication communication device 30, and the main processor 10 and the slave processor 20 are respectively provided with USB differential signal line pins (that is, D+, D-data signal lines, and voltage-passing The change generates a differential signal, and at the same time, the data can be transmitted in the USB port specification. Therefore, in the embodiment, the USB differential signal line pin and the slave processor 20 are connected to the main processor 10 through the communication communication device 30.
  • the USB differential signal line pin thereby implementing data communication between the main processor 10 and the slave processor 20, that is, by establishing a communication channel between the main processor 10 and the slave processor 20, thereby implementing correlation in the dual channel.
  • the sharing of hardware resources, such as the slave processor 20, can share the Flash ROM of the host processor 10 side.
  • the dual-channel mobile terminal can communicate with the slave processor 20 of the first channel and the slave processor 20 of the second channel through the communication communication device 30 to establish USB communication between the host processor 10 and the slave processor 20.
  • the channel further facilitates the sharing of the same Flash ROM between the main processor 10 and the slave processor 20, thereby enabling multiplexing of the Flash ROM, so that the data storage of the dual processor in the dual channel mobile terminal can be completed by only one Flash ROM. This reduces hardware costs and also saves PCB space.
  • the flash ROM includes at least a first storage area and a second storage area.
  • the first storage area stores the main processor 10.
  • the program data of the first channel service processing is performed
  • the second storage area stores program data for performing the second channel service processing from the processor 20.
  • the Flash ROM is divided into two program areas, which respectively store program data of the main processor 10 and the slave processor 20.
  • the two program areas cannot overlap, and all of them are reserved. the amount.
  • the 0-Address A interval segment places the program data of the main processor 10
  • the Address B-Address C region segment places the program data from the processor 20.
  • the mobile terminal further includes a first random access memory 103 (RAM), a second random access memory 202 (RAM), a first random access memory 103 and a host processor. 10 is connected, and the second random access memory 202 is connected to the slave processor 20.
  • the first random access memory 103 and the flash ROM cooperate to store related data for performing the first channel service processing, for example, storing the program data required by the main processor 10 in the flash ROM, and storing the data on the first random access memory 103. Temporary data generated by the main processor 10 when the program is run, and the like. After the main processor 10 establishes a USB connection with the slave processor 20, the program data stored in the second storage area of the flash ROM is acquired from the processor 20 and stored in the second random access memory 202 for the slave processor 20. transfer.
  • the manner in which the program data stored in the Flash ROM is acquired from the processor 20 is not limited.
  • the main processor 10 sends the program of the address BC interval to the slave processor through the established USB connection. 20.
  • the slave processor 20 then places the program into the second random access memory 202.
  • the program is placed from the processor 20 into the Address 0-Address F area of the second random access memory 202 to complete the transfer of the program from the Flash ROM to the second random access memory 202, from the program of the processor 20.
  • the first storage address (e.g., Address 0) in the second random access memory 202 begins to run.
  • the flash ROM further includes a third storage area; when the storage space of the second random access memory is insufficient, the slave processor 20 may temporarily store the data in the third storage area. As shown in Figure 3, the Address C-Address D interval segment.
  • the boot mode of the slave processor 20 preferably adopts a USB boot mode, and the specific boot process is not limited.
  • hardware configuration or firmware hardening processing may be performed in advance from the processor 20 to prepare as a USB device by running an internal firmware program and depending on a hardware configuration or a firmware program when booting from the processor 20.
  • the program stored in the Flash ROM is received from a USB data interface (such as a USB differential signal line pin).
  • the main processor 10 is previously configured as a USB host for establishing a USB connection with the slave processor 20.
  • the slave processor 20 can receive the corresponding program data sent from the flash ROM by the main processor 10 and store it in the second random access memory 202, and finally read from the second random access memory 202 from the processor 20.
  • the program data is run to complete the boot process from the processor 10 and perform the second channel of service processing. It should be noted that the above startup process is performed every time after the processor 20 performs reset or power on.
  • FIG. 5 is a schematic diagram of functional modules of an embodiment of the communication communication device of FIG. Based on the above embodiment, in the embodiment, the communication communication device 30 includes a detection signal output module 301 and a switch chip 302.
  • FIG. 6 is a connection diagram.
  • the detection signal output module 301 is respectively connected to the main processor 10 and the slave processor 20; the plurality of switch terminals of the switch chip 302 are respectively connected to the USB differential signal line pins of the main processor 10 and the slave processor 20.
  • the main processor 10 when the main processor 10 is a USB host device and the slave processor 20 is a USB slave device, that is, when the main processor 10 is a USB host (USB host device), the slave processor 20 is a USB device (USB slave device).
  • USB host USB host device
  • USB slave device USB device
  • the specific implementation process of establishing a USB connection is as follows:
  • the main processor 10 outputs a first control signal to the switch chip 302 to control the switch chip 302 to communicate with the USB differential signal line pins of the main processor 10 and the slave processor 20, thereby physically turning on the main processor 10. a data transmission channel with the slave processor 20;
  • the main processor 10 outputs a second control signal to the detection signal output module 301 to control the detection signal output module 301 to output a detection signal to the slave processor 20 to trigger the slave processor 20 to generate on its own USB differential signal line pin.
  • the differential signal is output to the USB differential signal line pin of the main processor 10 through the communication of the switch chip 302;
  • the detection signal output module 301 can be selected as a DC-DC circuit module, and the circuit module The block is used to generate a corresponding voltage for supplying the USB plug/unplug detection from the processor 20.
  • the detection signal output module 301 may be disposed inside the main processor 10 or external to the main processor 20, and may be set according to actual conditions.
  • the main processor 10 can further determine the device type of the USB device to be connected by using the received differential signal, such as a low-speed transmission device, a full-speed transmission device, a high-speed transmission device, and the like.
  • the main processor 10 when detecting the differential signal outputted from the processor 20, the main processor 10 can determine that there is an access USB device, thereby initiating an enumeration process to the slave processor 20, thereby establishing with the slave processor 20.
  • USB connection and the program data transfer required when starting from the processor 20 can be performed after the USB connection is successfully established.
  • the enumeration process in this step is the same as the prior art, and therefore will not be described in detail.
  • the main processor 10 passes the enumeration process for determining the characteristics of the slave processor 20 to further determine which connection mode to use for USB connection with the slave processor 20.
  • the main processor 10 and the slave processor 20 are implemented by the communication communication device 30.
  • the communication between the two is realized, and the main processor 10 and the slave processor 20 share the same flash ROM.
  • the switch chip 302 can also selectively implement the establishment and disconnection of the communication channel, and the USB connection can further improve the processing efficiency of the data, and thus does not affect when using the same Flash ROM. To normal operating functions, etc.
  • the switch chip 302 can be selected as a single-pole single-throw switch chip.
  • FIG. 7 is a schematic diagram showing the connection of an embodiment of the dual-channel mobile terminal of the present invention.
  • the main processor (processor 1#) further includes a first control line pin (control line 1), a second control line pin (control line 2) and a third control line pin (control line 3);
  • the processor (processor 2#) also includes a power supply pin (VBUS pin), and the detection signal output module can be selected as a DC-DC circuit module T1.
  • the single-pole single-throw switch chip (S1) includes a resident switch terminal (A1, B1), a non-stationary switch terminal (A2, B2), a resident switch terminal (A1, B1) and a host processor (processor 1#) USB
  • the differential signal line pins (D+, D-) are connected, and the non-resident switch terminals (A2, B2) are connected to the USB differential signal line pins (D+, D-) of the slave processor (processor 2#);
  • the single-pole single-throw switch chip (S1) also includes an enable pin (EN pin), a level configuration pin (DIR pin), a first control line pin (control line 1) and an enable pin (EN lead).
  • the second control line pin (control line 2) is connected to the level configuration pin (DIR pin), and the third control line pin (control line 3) is connected to the signal input end of the detection signal output module.
  • the power supply pin of the processor (the VBUS pin of processor 2#) is connected to the signal output of the detection signal output module.
  • control process for establishing a USB connection between the main processor 10 and the slave processor 20 is as follows:
  • the main processor (processor 1#) outputs a signal to the enable pin (EN pin) of the single-pole single-throw switch chip (S1) through the first control line pin (control line 1) to enable single-pole Throw the switch chip (S1), such as the processor 1# output control line 1 is low to enable the single-pole single-throw switch chip S1;
  • the main processor (processor 1#) outputs a signal to the level configuration pin (DIR pin) of the single-pole single-throw switch chip (S1) through the second control line pin (control line 2) to control the single-pole
  • the resident switch terminals (A1, B1) of the throw switch chip (S1) are turned on with the non-station switch terminals (A2, B2), for example, the processor 1# output control line 2 is at a high level, and thus the DIR pin is configured.
  • Level such as high level, which leads to the resident switch terminals (A1, B1) and the non-stationary switch terminals (A2, B2) through.
  • the host processor when the USB connection is established between the main processor 10 and the slave processor 20, that is, when the processor 1# is a USB host device and the processor 2# is a USB slave device, the host processor further includes:
  • the main processor (processor 1#) outputs a signal to the signal input terminal of the detection signal output module through the third control line pin (control line 3) to control the detection signal output module to turn on or off the detection signal output.
  • the USB-based related protocol specifies that the USB slave device needs to output a differential signal to the USB host device, that is, it needs to bring its own Voltage) Therefore, in this embodiment, the differential signal is triggered by the detection signal output module, thereby informing the main processor (processor 1#) that there is an input of the USB slave device.
  • the switch single-pole single-throw switch chip S1 when performing the layout of the components and devices of the dual-channel mobile terminal, the switch single-pole single-throw switch chip S1 needs to be as close as possible to the processor #2.
  • the distance between the single-pole single-throw switch chip S1 and the slave processor is less than Set thresholds to minimize the impact of data path multiplexing on signal integrity.
  • a dual-channel mobile terminal for multiplexing a Flash ROM is connected to a USB differential signal line pin of a main processor and a USB differential signal line pin of the slave processor through a communication connecting device for the main processor and Establishing a USB connection from the processor, and then the slave processor multiplexes the Flash ROM of the main processor to obtain related data for processing the business; thus, a USB connection between the main processor and the slave processor can be established, thereby realizing the main
  • the processor shares a Flash ROM with the slave processor, which reduces hardware costs and increases hardware integration.

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Abstract

本发明公开了一种复用Flash ROM的双通道移动终端，包括主处理器、主射频电路与非易失性闪存Flash ROM、从处理器与从射频电路，主处理器分别与主射频电路、Flash ROM连接，从处理器与从射频电路连接；主处理器与从处理器上分别设置有USB差分信号线引脚；移动终端还包括通信连通装置，通过该通信连通装置连通主处理器的USB差分信号线引脚与从处理器的USB差分信号线引脚以供主处理器与从处理器建立USB连接，进而从处理器通过复用主处理器的Flash ROM以获得进行业务处理的相关数据。

Description

一种复用Flash ROM的双通道移动终端 技术领域
本发明涉及通信技术领域，尤其涉及一种复用非易失性闪存(Flash ROM)的双通道移动终端。
背景技术
现有双通道移动终端，比如双卡双待手机，一般都是采用独立的电路架构，也即各通道都设置有各自的闪存(Flash)只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random-Access Memory)与射频电路，尽管这种架构电路设计简单、功能独立，同时也便于并行开发，但却占用了较大的印制电路板(PCB，Printed Circuit Board)面积，同时硬件成本也较高。
发明内容
为了解决上述技术问题，本发明实施例提出一种复用Flash ROM的双通道移动终端，旨在解决如何在保证实现现有功能的前提下，降低双通道移动终端的硬件成本，同时提升硬件集成度的技术问题。
为实现上述目的，本发明实施例提供一种复用Flash ROM的双通道移动终端，所述双通道移动终端包括配置为进行第一通道业务处理的主处理器、主射频电路与非易失性闪存Flash ROM，以及配置为进行第二通道业务处理的从处理器与从射频电路；所述主处理器分别与所述主射频电路、所述Flash ROM连接；所述从处理器与所述从射频电路连接；所述主处理器与所述从处理器上分别设置有通用串行总线(USB，Universal Serial Bus)差分信号线引脚；所述移动终端还包括通信连通装置；
所述通信连通装置，配置为当接收到所述主处理器发送的连通指令时，连通所述主处理器的USB差分信号线引脚与所述从处理器的USB差分信号线引脚以供所述主处理器与所述从处理器建立USB连接，其中，当所述主处理器与所述从处理器建立USB连接后，所述从处理器通过复用所述Flash ROM以获取进行第二通道业务处理的相关数据。
上述方案中，所述Flash ROM配置为存储进行第一通道业务处理的相关数据。
上述方案中，所述通信连通装置包括检测信号输出模块、开关芯片；所述检测信号输出模块分别与所述主处理器、所述从处理器连接；所述开关芯片的多个开关端分别对应与所述主处理器、所述从处理器的USB差分信号线引脚连接；
当所述主处理器为USB主设备、所述从处理器为USB从设备且在建立USB连接前，所述主处理器向所述开关芯片输出第一控制信号，以控制所述开关芯片连通所述主处理器与所述从处理器的USB差分信号线引脚；
所述主处理器向所述检测信号输出模块输出第二控制信号以控制所述检测信号输出模块向所述从处理器输出检测信号，以触发所述从处理器在自身USB差分信号线引脚上产生差分信号并通过所述开关芯片的连通输出至所述主处理器的USB差分信号线引脚；
当所述主处理器在自身USB差分信号线引脚检测到所述差分信号时，向所述从处理器发起枚举过程，以供与所述从处理器建立USB连接。
上述方案中，所述检测信号输出模块选为DC-DC电路模块，所述DC-DC电路模块配置为产生电压，以用于供给从处理器进行USB的插/拔检测。
上述方案中，所述主处理器还配置为通过接收到的差分信号判断当前待连接的USB设备的设备类型。
上述方案中，所述开关芯片为单刀单掷开关芯片。
上述方案中，所述主处理器还包括第一控制线引脚、第二控制线引脚与第三控制线引脚；所述从处理器还包括电源引脚；
所述单刀单掷开关芯片包括常驻开关端、非常驻开关端，所述常驻开关端与所述主处理器的USB差分信号线引脚连接，所述非常驻开关端与所述从处理器的USB差分信号线引脚连接；
所述单刀单掷开关芯片还包括使能引脚、电平配置引脚，所述第一控制线引脚与所述使能引脚连接，所述第二控制线引脚与所述电平配置引脚连接，所述第三控制线引脚与所述检测信号输出模块的信号输入端连接，所述从处理器的电源引脚与所述检测信号输出模块的信号输出端连接。
上述方案中，所述主处理器通过所述第一控制线引脚向所述单刀单掷开关芯片的所述使能引脚输出信号以使能所述单刀单掷开关芯片；
所述主处理器通过所述第二控制线引脚向所述单刀单掷开关芯片的所述电平配置引脚输出信号以控制所述单刀单掷开关芯片的常驻开关端与非常驻开关端导通；
所述主处理器通过所述第三控制线引脚向所述检测信号输出模块的信号输入端输出信号以控制所述检测信号输出模块开启或断开检测信号输出。
上述方案中，所述Flash ROM中至少包括第一存储区、第二存储区；
其中，所述第一存储区存储所述主处理器进行第一通道业务处理的程序数据，所述第二存储区存储所述从处理器进行第二通道业务处理的程序数据。
上述方案中，所述第一存储区与所述第二存储区不重叠，并都留有裕量。
上述方案中，所述移动终端还包括第一随机存取存储器与第二随机存 取存储器；所述第一随机存取存储器与所述主处理器连接，所述第二随机存取存储器与所述从处理器连接；在所述主处理器与所述从处理器建立USB连接后，所述从处理器获取所述第二存储区中所存储的程序数据，并存放在所述第二随机存取存储器内以供所述从处理器调用。
上述方案中，所述第一随机存取存储器与所述Flash ROM协同存储进行第一通道业务处理的相关数据。
上述方案中，在Flash ROM存储主处理器所需的程序数据，在第一随机存取存储器上存储主处理器运行程序时所产生的临时数据。
上述方案中，所述Flash ROM中还包括第三存储区；当所述第二随机存取存储器的存储空间不足时，所述从处理器将数据暂存在所述第三存储区中。
上述方案中，所述从处理器的启动方式为USB启动(Boot)方式。
上述方案中，预先在从处理器内部进行硬件配置或者固件固化处理，当从处理器上电启动时，通过运行内部固件程序并依据硬件配置或者固件程序，作为USB设备在与主处理器建立USB连接后，从USB数据接口接收存储在Flash ROM中的程序。
上述方案中，预先将主处理器配置为主USB，以供与从处理器建立USB连接；从处理器接收主处理器从Flash ROM中发送过来的相应程序数据并存储在第二随机存取存储器内，从处理器从第二随机存取存储器读取并运行程序数据以完成从处理器的启动过程以及进行第二通道的业务处理。
上述方案中，每次从处理器进行复位或开机后都要执行USB启动过程。
上述方案中，在所述双通道移动终端中，单刀单掷开关芯片靠近从处理器。
本发明实施例提供的复用Flash ROM的双通道移动终端，双通道移动终端通过通信连通装置，可连通第一通道的主处理器与第二通道的从处理 器以建立主处理器与从处理器之间的USB通信通道，进而便于实现主处理器与从处理共用同一Flash ROM。通过本发明可以实现对Flash ROM的复用，从而仅通过一个Flash ROM即可完成双通道移动终端中双处理器的数据存储，从而降低了硬件成本，同时也节省了PCB空间。
附图说明
此处所说明的附图用来提供对本发明的进一步理解，构成本申请的一部分，本发明的示意性实施例及其说明用于解释本发明，并不构成对本发明的不当限定。在附图中：
图1为实现本发明各个实施例一个可选的移动终端的硬件结构示意；
图2为本发明实施例提供的复用Flash ROM的双通道移动终端一实施例的功能模块示意图；
图3为本发明实施例提供的复用Flash ROM的双通道移动终端中Flash ROM一实施例的存储区域划分示意图；
图4为本发明实施例提供的复用Flash ROM的双通道移动终端另一实施例的功能模块示意图；
图5为图2中通信连通装置一实施例的功能模块示意图；
图6为本发明实施例提供的复用Flash ROM的双通道移动终端一实施例中各主要部件的连接示意图；
图7为本发明实施例提供的复用Flash ROM的双通道移动终端一实施例中各主要部件及其引脚的连接示意图。
具体实施方式
下面将结合附图及实施例对本发明的技术方案进行更详细的说明。
现在将参考附图描述实现本发明各个实施例的移动终端。在后续的描述中，使用用于表示元件的诸如“模块”、“部件”或“单元”的后缀仅为 了有利于本发明的说明，其本身并没有特定的意义。因此，"模块"与"部件"可以混合地使用。
移动终端可以以各种形式来实施。例如，本发明中描述的终端可以包括诸如移动电话、智能电话、笔记本电脑、数字广播接收器、个人数字助理(PDA，Personal Digital Assistant)、平板电脑(PAD，Portable Android Device)、便携式多媒体播放器(PMP，Portable Media Player)、导航装置等等的移动终端以及诸如数字电视机(TV，Television)、台式计算机等等的固定终端。下面，假设终端是移动终端。然而，本领域技术人员将理解的是，除了特别用于移动目的的元件之外，根据本发明的实施方式的构造也能够应用于固定类型的终端。
图1为实现本发明各个实施例一个可选的移动终端的硬件结构示意图。
移动终端100可以包括用户输入单元110、输出单元120、存储器130、控制器140和电源单元150等等。图1示出了具有各种组件的移动终端，但是应理解的是，并不要求实施所有示出的组件。输出单元120被构造为以视觉、音频和/或触觉方式提供输出信号(例如，音频信号、视频信号、警报信号、振动信号等等)。
输出单元120可以包括显示单元121等等。显示单元121可以显示在移动终端100中处理的信息。例如，当移动终端100处于电话通话模式时，显示单元121可以显示与通话或其它通信(例如，文本消息收发、多媒体文件下载等等)相关的用户界面(UI，User Interface)或图形用户界面(GUI，Graphical User Interface)。当移动终端100处于视频通话模式或者图像捕获模式时，显示单元121可以显示捕获的图像和/或接收的图像、示出视频或图像以及相关功能的UI或GUI等等。
同时，当显示单元121和触摸板以层的形式彼此叠加以形成触摸屏时，显示单元121可以用作输入装置和输出装置。显示单元121可以包括液晶 显示器(LCD，Liquid Crystal Display)、薄膜晶体管LCD(TFT-LCD，Thin Film Transistor-LCD)、有机发光二极管(OLED，Organic Light-Emitting Diode)显示器、柔性显示器、三维(3D)显示器等等中的至少一种。这些显示器中的一些可以被构造为透明状以允许用户从外部观看，这可以称为透明显示器，典型的透明显示器可以例如为TOLED(透明有机发光二极管)显示器等等。根据特定想要的实施方式，移动终端100可以包括两个或更多显示单元(或其它显示装置)，例如，移动终端可以包括外部显示单元(未示出)和内部显示单元(未示出)。触摸屏可用于检测触摸输入压力以及触摸输入位置和触摸输入面积。
存储器130可以存储由控制器140执行的处理和控制操作的软件程序等等，或者可以暂时地存储己经输出或将要输出的数据(例如，电话簿、消息、静态图像、视频等等)。而且，存储器130可以存储关于当触摸施加到触摸屏时输出的各种方式的振动和音频信号的数据。
存储器130可以包括至少一种类型的存储介质，存储介质包括闪存、硬盘、多媒体卡、卡型存储器(例如，SD或DX存储器等等)、随机访问存储器(RAM，Random Access Memory)、静态随机访问存储器(SRAM，Static Random Access Memory)、只读存储器(ROM，Read Only Memory)、电可擦除可编程只读存储器(EEPROM，Electrically Erasable Programmable Read Only Memory)、可编程只读存储器(PROM，Programmable Read Only Memory)、磁性存储器、磁盘、光盘等等。而且，移动终端100可以与通过网络连接执行存储器130的存储功能的网络存储装置协作。
控制器140通常控制移动终端的总体操作。例如，控制器140执行与语音通话、数据通信、视频通话等等相关的控制和处理。控制器140可以执行模式识别处理，以将在触摸屏上执行的手写输入或者图片绘制输入识别为字符或图像。
电源单元150在控制器140的控制下接收外部电力或内部电力并且提供操作各元件和组件所需的适当的电力。
这里描述的各种实施方式可以以使用例如计算机软件、硬件或其任何组合的计算机可读介质来实施。对于硬件实施，这里描述的实施方式可以通过使用特定用途集成电路(ASIC，Application Specific Integrated Circuit)、数字信号处理器(DSP，Digital Signal Processing)、数字信号处理装置(DSPD，Digital Signal Processing Device)、可编程逻辑装置(PLD，Programmable Logic Device)、现场可编程门阵列(FPGA，Field Programmable Gate Array)、处理器、控制器、微控制器、微处理器、被设计为执行这里描述的功能的电子单元中的至少一种来实施，在一些情况下，这样的实施方式可以在控制器140中实施。对于软件实施，诸如过程或功能的实施方式可以与允许执行至少一种功能或操作的单独的软件模块来实施。软件代码可以由以任何适当的编程语言编写的软件应用程序(或程序)来实施，软件代码可以存储在存储器130中并且由控制器140执行。
此外，移动终端100进一步包括应用处理器200(Application Processor，AP)、主调制解调器310与主射频集成电路320、从调制解调器410与从射频集成电路420。其中，主调制解调器310与主射频集成电路320构成双通道移动终端进行业务处理的第一通道，而从调制解调器410与从射频集成电路420则构成了双通道移动终端进行业务处理的第二通道，其中，应用处理器200与主调制解调器310连接，以便接收用户触发的应用操作指令并获取应用操作指令对应的类型，然后根据操作指令对应的类型，将操作指令对应下发至主调制解调器310进行处理。
基于上述移动终端硬件结构，提出本发明方法各个实施例。
参照图2，图2为本发明复用Flash ROM的双通道移动终端一实施例的功能模块示意图。本实施例中，双通道移动终端具体包括配置为进行第 一通道业务处理的主处理器10与主射频电路101、配置为进行第二通道业务处理的从处理器20与从射频电路201，此外，移动终端还包括一非易失性闪存102(Flash ROM)，该Flash ROM配置为存储数据。本实施例中优选Flash ROM与主处理器10连接，也即该Flash ROM主要配置为存储进行第一通道业务处理的相关数据，比如存储主处理器10所需程序。
本实施例中，双通道移动终端还包括通信连通装置30，同时主处理器10、从处理器20上分别设有USB差分信号线引脚(也即D+、D-数据信号线，通过电压的变化产生差分信号，同时在USB端口规范中还可以进行数据的传输)，从而，本实施例中，具体通过通信连通装置30通过连通主处理器10的USB差分信号线引脚与从处理器20的USB差分信号线引脚，进而实现主处理器10、从处理器20之间的数据连通，也即通过建立主处理器10、从处理器20之间的通信通道，进而实现双通道中相关硬件资源的共享，比如从处理器20可共享主处理器10端的Flash ROM。
本实施例中，双通道移动终端通过通信连通装置30，可连通第一通道的主处理器10与第二通道的从处理器20以建立主处理器10与从处理器20之间的USB通信通道，进而便于实现主处理器10与从处理器20共用同一Flash ROM，进而可以实现对Flash ROM的复用，从而仅通过一个Flash ROM即可完成双通道移动终端中双处理器的数据存储，从而降低了硬件成本，同时也节省了PCB空间。
作为一可选实施方式，在本发明复用Flash ROM的双通道移动终端一实施例中，Flash ROM中至少包括第一存储区、第二存储区；其中，第一存储区存储主处理器10进行第一通道业务处理的程序数据，第二存储区存储从处理器20进行第二通道业务处理的程序数据。
如图3所示，Flash ROM划分有两个程序区，分别存储主处理器10、从处理器20的程序数据，另外，两个程序区不能重叠，并都留足各自的裕 量。例如，0-Address A区间段放置主处理器10的程序数据；Address B-Address C区域段放置从处理器20的程序数据。
作为一可选实施方式，如图4所示，移动终端还包括第一随机存取存储器103(RAM)、第二随机存取存储器202(RAM)，第一随机存取存储器103与主处理器10连接，第二随机存取存储器202与从处理器20连接。
其中，第一随机存取存储器103与Flash ROM协同存储进行第一通道业务处理的相关数据，比如在Flash ROM存储主处理器10所需的程序数据，而在第一随机存取存储器103上存储主处理器10运行程序时所产生的临时数据等。在主处理器10与从处理器20建立USB连接后，从处理器20获取Flash ROM第二存储区中所存储的程序数据，并存放在第二随机存取存储器202内以供从处理器20调用。
在一可选实施例中，从处理器20获取Flash ROM中存储的程序数据的方式不限，例如主处理器10将地址(Address)B-C区间段的程序通过建立的USB连接发送给从处理器20，从处理器20再将程序放置到第二随机存取存储器202内。例如，从处理器20将程序放置至第二随机存取存储器202中Address 0-Address F区域段内以完成程序从Flash ROM到第二随机存取存储器202的搬运，从处理器20的程序从第二随机存取存储器202内的首个存储地址(例如Address 0)开始运行。
在一可选实施例中，Flash ROM中还包括第三存储区；当第二随机存取存储器的存储空间不足时，从处理器20可将数据暂存在第三存储区中。如图3中的Address C-Address D区间段。
在一可选实施例中，从处理器20的启动方式优选采用USB启动(Boot)方式，具体启动过程不限。例如，可以预先在从处理器20内部进行硬件配置或者固件固化处理，从而当从处理器20上电启动时，通过运行内部固件程序并依据硬件配置或者固件程序，从而作为USB设备(device)准备在 与主处理器10建立USB连接后，从USB数据接口(比如USB差分信号线引脚)接收存储在Flash ROM中的程序。此外，预先将主处理器10配置为USB host，以供与从处理器20建立USB连接。然后从处理器20即可接收主处理器10从Flash ROM中发送过来的相应程序数据并存储在第二随机存取存储器202内，最终从处理器20从第二随机存取存储器202内读取并运行程序数据以完成从处理器10的启动过程以及进行第二通道的业务处理。需要说明的是，每次从处理器20进行复位或开机后都要执行上述启动过程。
参照图5，图5为图2中通信连通装置一实施例的功能模块示意图。基于上述实施例，本实施例中，通信连通装置30包括检测信号输出模块301、开关芯片302。
如图6所示的连接示意图。检测信号输出模块301分别与主处理器10、从处理器20连接；开关芯片302的多个开关端分别对应与主处理器10、从处理器20的USB差分信号线引脚连接。
本实施例中，当主处理器10为USB主设备、从处理器20为USB从设备时，也即当主处理器10为USB host(USB主设备)、从处理器20为USB device(USB从设备)且在需要建立USB连接时，比如处理器20上电时，二者建立USB连接的具体实现过程如下：
(1)主处理器10向开关芯片302输出第一控制信号，以控制开关芯片302连通主处理器10与从处理器20的USB差分信号线引脚，从而在物理上导通主处理器10与从处理器20的数据传输通道；
(2)主处理器10向检测信号输出模块301输出第二控制信号以控制检测信号输出模块301向从处理器20输出检测信号，以触发从处理器20在自身USB差分信号线引脚上产生差分信号并通过开关芯片302的连通输出至主处理器10的USB差分信号线引脚；
本步骤中，检测信号输出模块301可选为DC-DC电路模块，此电路模 块用于产生相应电压，以用于供给从处理器20进行USB的插/拔检测。本实施例中，检测信号输出模块301既可以设置于主处理器10的内部，也可以设置于主处理器20的外部，具体根据实际情况进行设置。本步骤中，由于主处理器10与从处理器20的物理数据传输通道已导通，因此，从处理器20在自身USB差分信号线引脚上产生的差分信号也将输出到主处理器10的USB差分信号线引脚上。此外，主处理器10通过接收到的差分信号还可以进一步判断当前待连接的USB device的设备类型，比如为低速传输设备、全速传输设备、高速传输设备等。
(3)当主处理器10在自身USB差分信号线引脚检测到差分信号时，向从处理器20发起枚举过程，以供与从处理器20建立USB连接。
本步骤中，主处理器10在检测到从处理器20所输出的差分信号时，即可确定存在接入的USB device，从而向从处理器20发起枚举过程，从而与从处理器20建立USB连接，并在成功建立USB连接后即可进行从处理器20启动时所需的程序数据传输。本步骤中的枚举过程与现有技术相同，因此不做过多赘述。主处理器10通过枚举过程以用于确定从处理器20的特征，从而进一步决定采用何种连接方式与从处理器20进行USB连接。
本实施例中，在基于现有双通道移动终端的硬件结构基础上，考虑到新增硬件成本以及硬件集成度等问题，因此，通过通信连通装置30实现主处理器10与从处理器20之间的通信连通，进而实现主处理器10与从处理器20共享同一个Flash ROM。另外，本实施例中，采用开关芯片302还可选择性地实现通信通道的建立与断开，同时采用USB连接能进一步提升数据的处理效率，进而在使用同一个Flash ROM时，也不会影响到正常的操作功能等。
在一可选实施例中，在本发明复用Flash ROM的双通道移动终端一实施例中，开关芯片302可选为单刀单掷开关芯片。
如图7所示的本发明双通道移动终端一实施例的连接示意图。其中，主处理器(处理器1#)还包括第一控制线引脚(控制线1)、第二控制线引脚(控制线2)与第三控制线引脚(控制线3)；从处理器(处理器2#)还包括电源引脚(VBUS引脚)，检测信号输出模块可选为DC-DC电路模块T1。
单刀单掷开关芯片(S1)包括常驻开关端(A1、B1)、非常驻开关端(A2、B2)，常驻开关端(A1、B1)与主处理器(处理器1#)的USB差分信号线引脚(D+、D-)连接，非常驻开关端(A2、B2)与从处理器(处理器2#)的USB差分信号线引脚(D+、D-)连接；
单刀单掷开关芯片(S1)还包括使能引脚(EN引脚)、电平配置引脚(DIR引脚)，第一控制线引脚(控制线1)与使能引脚(EN引脚)连接，第二控制线引脚(控制线2)与电平配置引脚(DIR引脚)连接，第三控制线引脚(控制线3)与检测信号输出模块的信号输入端连接，从处理器的电源引脚(处理器2#的VBUS引脚)与检测信号输出模块的信号输出端连接。
在一可选实施例中，如图7所示，主处理器10与从处理器20之间建立USB连接的控制过程如下：
(1)主处理器(处理器1#)通过第一控制线引脚(控制线1)向单刀单掷开关芯片(S1)的使能引脚(EN引脚)输出信号以使能单刀单掷开关芯片(S1)，比如处理器1#输出控制线1为低电平以使能单刀单掷开关芯片S1；
(2)主处理器(处理器1#)通过第二控制线引脚(控制线2)向单刀单掷开关芯片(S1)的电平配置引脚(DIR引脚)输出信号以控制单刀单掷开关芯片(S1)的常驻开关端(A1、B1)与非常驻开关端(A2、B2)导通，例如，处理器1#输出控制线2为高电平，进而配置DIR引脚的电平(比如高电平)，进而使常驻开关端(A1、B1)与非常驻开关端(A2、B2)导 通。
此外，当主处理器10与从处理器20之间建立USB连接时，也即处理器1#为USB主设备，处理器2#为USB从设备进行USB连接时，主处理器进一步还包括：
(3)主处理器(处理器1#)通过第三控制线引脚(控制线3)向检测信号输出模块的信号输入端输出信号以控制检测信号输出模块开启或断开检测信号输出。由于主处理器10与从处理器20为同一设备的不同部件之间所建立的USB连接，因此，基于USB的相关协议规定(USB从设备需要向USB主设备输出差分信号，也即需要自带电压)，因此，本实施例中通过检测信号输出模块触发产生差分信号，从而告知主处理器(处理器1#)存在USB从设备的输入。
本实施例中，在进行双通道移动终端各部件、器件的布局时，需要将开关单刀单掷开关芯片S1尽量靠近处理器#2，如单刀单掷开关芯片S1与从处理器的距离小于预设阈值，从而尽量减小由于数据通路复用对信号完整性的影响。
需要说明的是，在本文中，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者装置不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者装置所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括该要素的过程、方法、物品或者装置中还存在另外的相同要素。
上述本发明实施例序号仅仅为了描述，不代表实施例的优劣。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到上述实施例方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本 发明的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端设备(可以是手机，计算机，服务器，空调器，或者网络设备等)执行本发明各个实施例所述的方法。
以上仅为本发明的优选实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。
工业实用性
本发明实施例中，一种复用Flash ROM的双通道移动终端，通过通信连通装置连通主处理器的USB差分信号线引脚与从处理器的USB差分信号线引脚以供主处理器与从处理器建立USB连接，进而从处理器通过复用主处理器的Flash ROM以获得进行业务处理的相关数据；如此，可建立主处理器与从处理器之间的USB连接，进而能够实现主处理器与从处理器共用一个Flash ROM，进而减少硬件成本，同时也可提升硬件集成度。

Claims (19)

  1. 一种复用Flash ROM的双通道移动终端，所述双通道移动终端包括配置为进行第一通道业务处理的主处理器、主射频电路与非易失性闪存Flash ROM，以及配置为进行第二通道业务处理的从处理器与从射频电路；所述主处理器分别与所述主射频电路、所述Flash ROM连接；所述从处理器与所述从射频电路连接；所述主处理器与所述从处理器上分别设置有USB差分信号线引脚；所述移动终端还包括通信连通装置；
    所述通信连通装置，配置为当接收到所述主处理器发送的连通指令时，连通所述主处理器的USB差分信号线引脚与所述从处理器的USB差分信号线引脚以供所述主处理器与所述从处理器建立USB连接，其中，当所述主处理器与所述从处理器建立USB连接后，所述从处理器通过复用所述FlashROM以获取进行第二通道业务处理的相关数据。
  2. 如权利要求1所述的复用Flash ROM的双通道移动终端，其中，所述Flash ROM配置为存储进行第一通道业务处理的相关数据。
  3. 如权利要求1所述的复用Flash ROM的双通道移动终端，其中，所述通信连通装置包括检测信号输出模块、开关芯片；所述检测信号输出模块分别与所述主处理器、所述从处理器连接；所述开关芯片的多个开关端分别对应与所述主处理器、所述从处理器的USB差分信号线引脚连接；
    当所述主处理器为USB主设备、所述从处理器为USB从设备且在建立USB连接前，所述主处理器向所述开关芯片输出第一控制信号，以控制所述开关芯片连通所述主处理器与所述从处理器的USB差分信号线引脚；
    所述主处理器向所述检测信号输出模块输出第二控制信号以控制所述检测信号输出模块向所述从处理器输出检测信号，以触发所述从处理器在自身USB差分信号线引脚上产生差分信号并通过所述开关芯片的连通输出至所述主处理器的USB差分信号线引脚；
    当所述主处理器在自身USB差分信号线引脚检测到所述差分信号时，向所述从处理器发起枚举过程，以供与所述从处理器建立USB连接。
  4. 如权利要求3所述的复用Flash ROM的双通道移动终端，其中，所述检测信号输出模块选为DC-DC电路模块，所述DC-DC电路模块配置为产生电压，以用于供给从处理器进行USB的插/拔检测。
  5. 如权利要求3所述的复用Flash ROM的双通道移动终端，其中，所述主处理器还配置为通过接收到的差分信号判断当前待连接的USB设备的设备类型。
  6. 如权利要求3所述的复用Flash ROM的双通道移动终端，其中，所述开关芯片为单刀单掷开关芯片。
  7. 如权利要求4所述的复用Flash ROM的双通道移动终端，其中，所述主处理器还包括第一控制线引脚、第二控制线引脚与第三控制线引脚；所述从处理器还包括电源引脚；
    所述单刀单掷开关芯片包括常驻开关端、非常驻开关端，所述常驻开关端与所述主处理器的USB差分信号线引脚连接，所述非常驻开关端与所述从处理器的USB差分信号线引脚连接；
    所述单刀单掷开关芯片还包括使能引脚、电平配置引脚，所述第一控制线引脚与所述使能引脚连接，所述第二控制线引脚与所述电平配置引脚连接，所述第三控制线引脚与所述检测信号输出模块的信号输入端连接，所述从处理器的电源引脚与所述检测信号输出模块的信号输出端连接。
  8. 如权利要求7所述的复用Flash ROM的双通道移动终端，其中，所述主处理器通过所述第一控制线引脚向所述单刀单掷开关芯片的所述使能引脚输出信号以使能所述单刀单掷开关芯片；
    所述主处理器通过所述第二控制线引脚向所述单刀单掷开关芯片的所述电平配置引脚输出信号以控制所述单刀单掷开关芯片的常驻开关端与非 常驻开关端导通；
    所述主处理器通过所述第三控制线引脚向所述检测信号输出模块的信号输入端输出信号以控制所述检测信号输出模块开启或断开检测信号输出。
  9. 如权利要求1-8中任一项所述的复用Flash ROM的双通道移动终端，其中，所述Flash ROM中至少包括第一存储区、第二存储区；
    其中，所述第一存储区存储所述主处理器进行第一通道业务处理的程序数据，所述第二存储区存储所述从处理器进行第二通道业务处理的程序数据。
  10. 如权利要求9所述的复用Flash ROM的双通道移动终端，其中，所述第一存储区与所述第二存储区不重叠，并都留有裕量。
  11. 如权利要求9所述的复用Flash ROM的双通道移动终端，其中，所述移动终端还包括第一随机存取存储器与第二随机存取存储器；所述第一随机存取存储器与所述主处理器连接，所述第二随机存取存储器与所述从处理器连接；在所述主处理器与所述从处理器建立USB连接后，所述从处理器获取所述第二存储区中所存储的程序数据，并存放在所述第二随机存取存储器内以供所述从处理器调用。
  12. 如权利要求9所述的复用Flash ROM的双通道移动终端，其中，所述第一随机存取存储器与所述Flash ROM协同存储进行第一通道业务处理的相关数据。
  13. 如权利要求12所述的复用Flash ROM的双通道移动终端，其中，在Flash ROM存储主处理器所需的程序数据，在第一随机存取存储器上存储主处理器运行程序时所产生的临时数据。
  14. 如权利要求11所述的复用Flash ROM的双通道移动终端，其中，所述Flash ROM中还包括第三存储区；当所述第二随机存取存储器的存储 空间不足时，所述从处理器将数据暂存在所述第三存储区中。
  15. 如权利要求1-8中任一项所述的复用Flash ROM的双通道移动终端，其中，所述从处理器的启动方式为USB启动方式。
  16. 如权利要求15所述的复用Flash ROM的双通道移动终端，其中，预先在从处理器内部进行硬件配置或者固件固化处理，当从处理器上电启动时，通过运行内部固件程序并依据硬件配置或者固件程序，作为USB设备在与主处理器建立USB连接后，从USB数据接口接收存储在Flash ROM中的程序。
  17. 如权利要求15所述的复用Flash ROM的双通道移动终端，其中，预先将主处理器配置为主USB，以供与从处理器建立USB连接；从处理器接收主处理器从Flash ROM中发送过来的相应程序数据并存储在第二随机存取存储器内，从处理器从第二随机存取存储器读取并运行程序数据以完成从处理器的启动过程以及进行第二通道的业务处理。
  18. 如权利要求15所述的复用Flash ROM的双通道移动终端，其中，每次从处理器进行复位或开机后都要执行USB启动过程。
  19. 根据权利要求6所述的复用Flash ROM的双通道移动终端，其中，在所述双通道移动终端中，单刀单掷开关芯片靠近从处理器。
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021017360A1 (zh) * 2019-07-31 2021-02-04 苏州中科全象智能科技有限公司 一种高速工业相机固件的防错架构及其控制方法
CN114461280A (zh) * 2021-12-28 2022-05-10 浪潮电子信息产业股份有限公司 一种bmc双镜像刷写方法及相关装置

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105721015B (zh) * 2016-01-29 2018-11-20 努比亚技术有限公司 一种复用Flash ROM的双通道移动终端
CN107766280B (zh) * 2016-08-23 2022-05-17 北京小米移动软件有限公司 终端通信方法及装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202949572U (zh) * 2012-11-14 2013-05-22 青岛海信移动通信技术股份有限公司 一种双模双待双通移动终端
CN103164371A (zh) * 2011-12-12 2013-06-19 联想(北京)有限公司 数据处理方法、天线提供方法、及电子设备
US20140164654A1 (en) * 2012-12-11 2014-06-12 Gemtek Technology Co., Ltd. Asymmetrical processing multi-core system and network device
CN104615555A (zh) * 2015-01-26 2015-05-13 北京海尔集成电路设计有限公司 一种主从芯片共享大容量片外存储单元的通信装置
CN105721015A (zh) * 2016-01-29 2016-06-29 努比亚技术有限公司 一种复用Flash ROM的双通道移动终端

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103164371A (zh) * 2011-12-12 2013-06-19 联想(北京)有限公司 数据处理方法、天线提供方法、及电子设备
CN202949572U (zh) * 2012-11-14 2013-05-22 青岛海信移动通信技术股份有限公司 一种双模双待双通移动终端
US20140164654A1 (en) * 2012-12-11 2014-06-12 Gemtek Technology Co., Ltd. Asymmetrical processing multi-core system and network device
CN104615555A (zh) * 2015-01-26 2015-05-13 北京海尔集成电路设计有限公司 一种主从芯片共享大容量片外存储单元的通信装置
CN105721015A (zh) * 2016-01-29 2016-06-29 努比亚技术有限公司 一种复用Flash ROM的双通道移动终端

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021017360A1 (zh) * 2019-07-31 2021-02-04 苏州中科全象智能科技有限公司 一种高速工业相机固件的防错架构及其控制方法
CN114461280A (zh) * 2021-12-28 2022-05-10 浪潮电子信息产业股份有限公司 一种bmc双镜像刷写方法及相关装置
CN114461280B (zh) * 2021-12-28 2024-02-23 浪潮电子信息产业股份有限公司 一种bmc双镜像刷写方法及相关装置

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