WO2017112932A1 - Patterning and inverted deposition engineering for solution-processed electrodes and semiconducting films - Google Patents

Patterning and inverted deposition engineering for solution-processed electrodes and semiconducting films Download PDF

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Publication number
WO2017112932A1
WO2017112932A1 PCT/US2016/068523 US2016068523W WO2017112932A1 WO 2017112932 A1 WO2017112932 A1 WO 2017112932A1 US 2016068523 W US2016068523 W US 2016068523W WO 2017112932 A1 WO2017112932 A1 WO 2017112932A1
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substrate
layer
forming
material layer
hydrophilic
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PCT/US2016/068523
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French (fr)
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Franky So
Shuyi LIU
Szuheng HO
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University Of Florida Research Foundation, Incorporated
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Publication of WO2017112932A1 publication Critical patent/WO2017112932A1/en

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/60Forming conductive regions or layers, e.g. electrodes
    • H10K71/611Forming conductive regions or layers, e.g. electrodes using printing deposition, e.g. ink jet printing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K30/00Organic devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation
    • H10K30/80Constructional details
    • H10K30/81Electrodes
    • H10K30/82Transparent electrodes, e.g. indium tin oxide [ITO] electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/1201Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80Constructional details
    • H10K59/805Electrodes
    • H10K59/8051Anodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80Constructional details
    • H10K59/805Electrodes
    • H10K59/8052Cathodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/80Manufacture or treatment specially adapted for the organic devices covered by this subclass using temporary substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00Constructional details relating to the organic devices covered by this subclass
    • H10K2102/10Transparent electrodes, e.g. using graphene
    • H10K2102/101Transparent electrodes, e.g. using graphene comprising transparent conductive oxides [TCO]
    • H10K2102/103Transparent electrodes, e.g. using graphene comprising transparent conductive oxides [TCO] comprising indium oxides, e.g. ITO
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/549Organic PV cells

Definitions

  • Some aspects provide a method of producing a device, the method comprising treating a first substrate having a hydrophobic surface such that at least a portion of the surface becomes hydrophilic, forming at least one material layer over the hydrophilic portion of the substrate surface, treating the first substrate such that the hydrophilic portion of the first substrate's surface becomes hydrophobic, removing the first substrate from the at least one conductive layer, and forming at least one additional layer over the at least one conductive layer.
  • FIG. 1 illustrates a conventional deposition process
  • FIG. 2 illustrates an inverted deposition process, according to some embodiments
  • FIG. 3 depicts an illustrative process for preparing a surface for deposition of a material layer via a wet process, according to some embodiments
  • FIG. 4 shows photographs of deionized water drops on top of a PDMS surface, according to some embodiments
  • FIG. 5 shows a spontaneously formed AgNWs pattern on a PDMS template after spin-casting, according to some embodiments
  • FIG. 6 shows a spontaneously-formed AgNWs electrode pattern after transferal to an epoxy substrate, according to some embodiments
  • FIG. 7 shows a spontaneously-formed micro-patterned AgNWs electrode with a line width of 100 ⁇ , according to some embodiments
  • FIG. 8 illustrates the transmittance of an AgNWs electrode as a function of fabricated sheet resistance, according to some embodiments
  • FIG. 9 shows atomic force images (AFMs) of three AgNWs electrode samples, according to some embodiments.
  • FIG. 10 depicts the architecture and performance of a first illustrative device formed using inverted deposition techniques, according to some embodiments
  • FIG. 11 depicts the architecture and performance of a second illustrative device formed using inverted deposition techniques, according to some embodiments.
  • FIG. 12 shows the scattering effect of AgNW electrodes formed using techniques described herein compared with scattering from a conventionally formed ITO electrode, according to some embodiments.
  • a solution process may be particularly beneficial for preparation of transparent conducting electrodes in optoelectronic devices, such as organic light-emitting diode (OLED) displays.
  • a transparent electrode is usually thermal-evaporated or sputtered tin doped indium oxide (ITO) or fluorine doped tin oxide (FTO).
  • ITO is commonly used as an anode due to its relatively deep work function, whereas the FTO often serves as a cathode due to its relatively shallow work function.
  • ITO indium oxide
  • FTO fluorine doped tin oxide
  • these types of metal oxides can be expensive, and so forming an electrode from a less expensive material via solution processing may be an attractive alternative.
  • solution processing is a relatively cheap and easy to apply technology
  • devices such as the above-discussed display devices in which precise and/or fine patterning of electrodes is desired, producing a solution processed film with sufficient definition may be difficult or impossible using conventional techniques.
  • Electrodes or semiconducting films onto flexible substrates that do not have a resistance to high temperatures. Since some solution processing techniques involve high temperatures, this may inhibit or rule out the use of these techniques on certain substrates.
  • PET polyester
  • PTT polyethylene
  • conductive nanowire mesh such as carbon nanotubes (CNT) and silver nanowires (AgNWs)
  • an additional challenge is introduced by their coarse surfaces with high roughness, which can lead to electrical shorts through adjacent layers once deposited.
  • Embodiments of the present application are directed to a selective patterning and transferring process which are suitable for producing patterning solution-processed electrodes and semiconducting films without using photolithography.
  • An inverted deposition process may be utilized in which layers are deposited onto a template substrate that is heat resistant in an inverse sequence. A preferred, or "capping" substrate may be added as a final layer, then all the layers removed from the template substrate. Any remaining layers may then be formed on top of the reversed stack (that is, on top of the first layer formed on the template substrate).
  • Complex electrode or semiconducting film patterns may be produced using techniques to oxidize selected regions of the surface of a substrate. This process allows the formation of fine detail, and if the substrate is resistant to high temperatures, can be used as part of the inverted deposition process.
  • low temperature may refer to temperatures below 150 °C, or less than 100 °C or less than 75 °C. In some embodiments, low temperature may be between 20 °C and 150 °C, between 30 °C and 120 °C, between 40 °C and 100 °C, or between 50 °C and 80 °C. In some embodiments, low temperature may be between 10 °C and 100 °C, between 20 °C and 90 °C, between 30 °C and 80 °C, or between 40 °C and 70 °C. As used herein, "high temperature” may refer to temperatures higher than a low temperature, irrespective of which range of temperatures are considered “low” according to those of the above illustrative embodiments.
  • a temperature of a process refers to the temperature to which the layers of a device being fabricated are exposed.
  • a spin coating process that is referred to as "low temperature” may refer to the temperature that the substrate on which a layer is spin coated is exposed to during the spin coating process.
  • FIG. 1 illustrates a conventional deposition process.
  • a number of layers are formed over a substrate in a sequence beginning with the electrode and followed by layers A, B, C and D in that order.
  • the substrate is not resistant to certain temperatures, this may rule out use solution processing techniques that operate at such temperatures to form the electrode over the substrate.
  • the electrode cannot be easily formed into complex patterns over the substrate except for the conventional techniques such as cotton tips or razor blades discussed above.
  • FIG. 2 illustrates an inverted deposition process, according to some embodiments.
  • layers are formed onto a transfer template 201 which is a substrate that may be selected so as to be resistant to temperatures applied during solution processing of at least one of layers B, A, electrode layer 204, and substrate 205 as they are formed over the transfer template layer.
  • the transfer template is removed (via a process to be described below) and the layer stack inverted. Additional layers (C and D in the example of FIG. 2) may then be formed over layer 202, which was previously the first layer formed onto the transfer template. As shown in FIG. 2, the order of layer formation may not be sequential as in the conventional process shown in FIG. 1.
  • one or more of layers 202, 203, 204 and 205 may be formed by a wet process, such as spin casting. According to some embodiments, one or more of layers 202, 203, 204 and 205 may be formed so as to follow an underlying pattern (e.g., a pattern of layer 202 in the case of forming layer 203, a pattern of layer 203 in the case of forming layer 204, etc.). Alternatively, one or more of layers 202, 203, 204 and 205 may be formed in a pattern using a selective patterning process, to be described below.
  • layers 203 and 204 are formed before the inversion of the stack of layers, there is no requirement that any particular layers be formed before or after the inversion, notwithstanding it being desirable to form any layers that utilize a high temperature process prior to the inversion so as to avoid potential damage to the substrate 205.
  • Layers that may be formed without high temperature processes may be formed before or after the inversion. For example, if layer 203 is formed using a high temperature process it may be desirable to form layer 203 prior to the inversion; whereas, if layer 204 may be formed using low temperature processes it may be formed before or after the inversion as either way there may be no risk to damaging the substrate 205.
  • transfer template 201 may comprise any material on which semiconductor layers may be formed. As discussed above, it may in some embodiments be preferable that the transfer template be flexible (e.g., when the device being fabricated is part of a display).
  • transfer template 201 comprises an organic polymer, such as but not limited to: polyethylene (e.g., LDPE and/or HDPE), polyimide (PI), polypropylene (PP), polytetrafluoroethylene (PTFE), a silicon-based (silicone-based) organic polymer, such as, but not limited to, polydimethylsiloxane (PDMS) and n-octyltriethoxysilane.
  • organic polymer such as but not limited to: polyethylene (e.g., LDPE and/or HDPE), polyimide (PI), polypropylene (PP), polytetrafluoroethylene (PTFE), a silicon-based (silicone-based) organic polymer, such as, but not limited to, polydimethylsilox
  • the electrode 204 may comprise any suitable conductor, including any metal or metal oxide.
  • electrode 204 may include (though is not limited to including): Indium Tin Oxide ( ⁇ ), Magnesium Silver Alloy (Mg:Ag), Carbon Nanowires (CNW), Carbon Nanotubes (CNT), Silver Nanowires (AgNW), one or more highly conductive polymers such as poly(3,4- ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS), or combinations thereof.
  • Electrode 204 may be transparent, may include one or more transparent components, or may be opaque. For display applications such as OLED displays, it may be preferable that electrode 204 be formed from a transparent conductor, such as ITO.
  • layers 202, 203, 206, and 207 may each comprise one or more semiconductor materials.
  • substrate 205 comprises a curable polymer, such as a UV curable polymer.
  • the substrate 205 may be formed over any part of the layer beneath it (layer 204 in the example of FIG. 2), though may preferably be formed over all the whole area of the layer beneath. For example, in use cases where layer 204 is patterned so as to include material is less than the entire area covered by the layer, the substrate 205 may be formed over this entire area.
  • the substrate 205 may be formed from a liquid polymer having a relatively low viscosity that is solidified and/or cross- linked via thermal annealing and/or a UV-treatment.
  • a material layer (e.g., an electrode or other layer) formed using a wet process such as spin casting may be formed using a selective patterning process.
  • the process may comprise producing a surface on which the material layer is to be formed that includes both hydrophilic and hydrophobic portions.
  • the material layer may be formed over the hydrophilic portions only. If the hydrophilic and hydrophobic portions can be formed with well-defined boundaries, a layer having a fine patterned resolution may be formed (e.g., with features sized at or smaller than 100 ⁇ ).
  • use of a hydrophilic surface on which to form a material layer may have a secondary benefit if the hydrophilic surface may be transformed to a hydrophobic surface subsequent to forming of the material layer on the surface. Such a transformation may allow removal of the hydrophilic surface from a material layer formed upon it.
  • a material layer may be formed over a hydrophilic surface, then subsequently the hydrophilic surface may be transformed to a hydrophobic surface and removed from the material layer.
  • the surface of transfer template 201 may be hydrophilic whilst the remainder is hydrophobic (an illustrative process to produce such a surface is discussed below).
  • Layer 202 may be formed via a wet process such as solution processing to produce a patterned layer over the hydrophilic portion(s) of the template 201.
  • Layers 203, 204 and 205 may be formed over layer 202 via additional wet processes and/or other material fabrication processes.
  • the transfer template may be transformed to have a substantially hydrophobic surface, which may allow for removal of the transfer template from layer 202 during the depicted inversion process.
  • the surface of layer 202 that was previously in contact with the transfer template layer may now have additional layers (such as layer 206) formed upon it.
  • FIG. 3 depicts an illustrative process for preparing a surface for deposition of a material layer via a wet process, according to some embodiments.
  • Process 300 includes formation of a template layer having a hydrophobic surface in step 310, a step of oxidizing portions of the surface in step 320 to cause those portions to become hydrophilic, a step 330 of spin-coating a solution onto the surface and a step 340 showing the result of step 330 wherein the spin-coated material is formed over the hydrophilic regions of the surface.
  • the template layer (which may, for instance, be layer 201 shown in FIG. 2), may be formed by applying an organosilicon polymer such as polydimethylsiloxane (PDMS) onto glass.
  • PDMS polydimethylsiloxane
  • the surface of this template layer may be hydrophobic after formation.
  • a shadow mask is applied to the template layer and exposed regions of the surface oxidized.
  • the portions of the surface may be oxidized by applying an oxygen plasma to the surface for a period of between 10 minutes and 20 minutes.
  • the portions of the surface may be oxidized by applying ultraviolet (UV) light and ozone to the surface for a period between 30 minutes and 60 minutes. Irrespective of which technique or techniques is used to oxidize the portions of the surface (oxygen plasma, UV ozone and/or another technique), the net result is to cause those portions to become hydrophilic.
  • a material layer is formed over the surface of the template. Due to the hydrophobic and hydrophilic nature of the portions of the surface, material may be formed by a wet process substantially over only the hydrophilic portions. Any suitable wet fabrication process may be used in step 330, including but not limited to blade coating, spin coating, inkjet printing, spraying, or combinations thereof.
  • a material formed in step 330 via the fabrication process may include a conductive material, such as ⁇ , FTO, PEDOT:PSS, CNT, AgNWs; a semiconductor material; or combinations thereof.
  • the hydrophobic substrate is an organosilicon polymer such as polydimethylsiloxane (PDMS) prepared onto a glass, quartz, sapphire and/or silicon substrate.
  • PDMS polydimethylsiloxane
  • the hydrophobic substrate may be prepared via surface energy modification with self-assembly monolayers (SAM) of silane derivatives such as octadecyltrichlorosilane (ODTS) and n-octadecylphosphonic acid (ODPA).
  • SAM self-assembly monolayers
  • silane derivatives such as octadecyltrichlorosilane (ODTS) and n-octadecylphosphonic acid (ODPA).
  • a direct spin-coating of aqueous or alcohol based solutions on top of those hydrophobic surfaces usually leads to incomplete or no film coverage, primarily due to low wetting surface.
  • one or more portions of the hydrophobic surface are transformed to be hydrophilic using, for example, a UV-ozone or an oxygen plasma treatment.
  • the treatment time should be sufficient to transfer the silane polymer surfaces to silica, which has good wetting with different kinds of solvent.
  • the treatment time depending on the type of silane derivatives used, can range from tens of minutes to several hours.
  • the pre-selective patterning process may be performed by shielding the ozone or oxygen plasma with a shadow mask attached to the initial hydrophobic substrates.
  • the surface of the substrate includes both hydrophilic surface areas, corresponding to the open area of the patterned mask, and hydrophobic surface areas, corresponding to the blocked area by the mask.
  • Aqueous or alcohol-based solution precursors may be spin-casted onto the substrates.
  • this may be performed drop-by-drop a short time after the UV ozone treatment.
  • the spin-speed of the substrate during drop should be high enough to completely remove the solution on untreated areas.
  • a patterned film is then spontaneously formed upon the substrate and the patterning follows the shape of exposed substrate area during the treatment. With this technique, the pattern of solution-processed films can be spontaneously formed down to a 100 ⁇ scale.
  • the films are spin-casted onto the UV-ozone or oxygen plasma treated PDMS substrates in a reverse sequential (e.g., as shown in FIG. 2). The whole stack, along with PDMS, is then annealed above 100 °C to accelerate the hydrophobicity recovery of the PDMS substrates.
  • the adhesion between the PDMS substrate and the adjacent semiconducting layer on top may be weak and as the semiconducting layer stack may be easily separated from the PDMS substrate.
  • the peeling-off may be performed by capping a liquid polymer on top of the stacking layers.
  • the liquid polymer has relatively low viscosity in its initial status, but can be solidified/cross-linked upon thermal annealing or UV-treatment. After the top-capping polymer is solidified/cross-linked, the staking layers are embedded into the polymer matrix and the whole matrix can be peeled off from the PDMS substrates. Therefore, the layer stacking order is reversed to the deposition sequential.
  • the surface of the top layer is very smooth. And since PDMS can withstand a higher temperature than most of the flexible plastic substrates, a higher temperature-processed film is able to be fabricated on the flexible plastic substrate with this technique.
  • FIGs. 4-12 illustrate a particular physical implementation of the above-described techniques and are provided merely as one non-limiting example of the practice of such techniques.
  • a solution-processed electrode is formed comprising both AgNWs and a PEDOT:PSS conductive polymer and PDMS is used as the substrate template for patterning the films.
  • An epoxy is used as a "capping" substrate (e.g., substrate 205 in FIG. 2) over the material layers formed onto the PDMS, and which becomes a substrate of the layer stack after inversion.
  • FIG. 4 shows photographs of deionized water drops on top of a PDMS surface, which serves as a probe to detect selective wetting areas on PDMS with hydrophobic / hydrophilic control.
  • the oxidized region of the surface (between the dashed lines) exhibit hydrophilicity whereas the remainder of the surface is hydrophobic.
  • step 430 after annealing of the PDMS at 130 °C for 30 min, the hydrophobicity of the surface is recovered.
  • FIG. 5 shows a spontaneously formed AgNWs pattern on the PDMS template after spin-casting, the figure depicting various widths of a AgNW electrode.
  • FIG. 5 shows a spontaneously formed AgNWs pattern on the PDMS template after spin-casting, the figure depicting various widths of a AgNW electrode.
  • FIG. 6 shows the spontaneously-formed AgNWs electrode pattern after transferal to the epoxy substrate (that is, after the capping substrate has been added and the PDMS substrate removed).
  • the electrode patterning shows good precision at the edge as revealed by the microscope image.
  • FIG. 7 shows the spontaneously-formed micro-patterned AgNWs electrode with a line width of 100 ⁇ .
  • FIG. 8 illustrates the transmittance of an AgNWs electrode as a function of fabricated sheet resistance.
  • FIG. 9 shows atomic force images (AFMs) of three AgNWs electrode samples, being: (A; top) directly spin-coated on PDMS, (B; middle) spin-coated on PDMS template and transferred to epoxy substrate and (C; bottom) spin-coated on patterned PEDOT:PSS on top of PDMS template and transferred to epoxy substrate.
  • AFMs atomic force images
  • the PEDOT:PSS acts as a thin buffer layer between PDMS template and AgNWs mesh.
  • the 30 nm thick PEDOT:PSS layer is also completely transferred to epoxy substrate together with AgNWs mesh after peeling-off from the PDMS template.
  • the smooth interface between PEDOT:PSS and PDMS leads to its most flat surface among all three samples, with a peak- to-valley roughness of less than 15 nm.
  • the surface is substantially rougher due to the stacking and protrusion of AgNWs mesh, and the peak-to-valley roughness is more than 300 nm.
  • the surface roughness is also significantly suppressed, with a peak-to-valley roughness of 60 nm.
  • a thermal-evaporated phosphorescent green OLED is directly deposited onto the electrodes.
  • the illustrative device's architecture and performance are shown in FIG. 10. The device shows a decent performance with regular turn-on voltage without any leakage current observed.
  • Solution-processed OLEDs may be fabricated onto large-area patterned AgNWs electrodes and compared with commercial large-area ITO electrodes in parallel. Such a device made with AgNWs electrode show 40% higher current efficiency due to the enhanced light out-coupling by scattering.
  • the device architecture and performance are shown in FIG. 11.
  • the invention may be embodied as a method, of which an example has been provided.
  • the acts performed as part of the method may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than illustrated, which may include performing some acts simultaneously, even though shown as sequential acts in illustrative embodiments.

Abstract

A method of producing a device is provided, the method comprising treating a first substrate having a hydrophobic surface such that at least a portion of the surface becomes hydrophilic, forming at least one material layer over the hydrophilic portion of the substrate surface, treating the first substrate such that the hydrophilic portion of the first substrate's surface becomes hydrophobic, removing the first substrate from the at least one conductive layer; and forming at least one additional layer over the at least one conductive layer.

Description

PATTERNING AND INVERTED DEPOSITION ENGINEERING FOR SOLUTION- PROCESSED ELECTRODES AND SEMICONDUCTING FILMS
RELATED APPLICATIONS
The present application claims priority under 35 U.S.C. § 119(e) to U.S. Provisional Application Serial No. 62/387,396, filed December 23, 2015, entitled "PATTERNING AND INVERTED DEPOSITION ENGINEERING FOR SOLUTION-PROCESSED ELECTRODES AND SEMICONDUCTING FILMS," which is hereby incorporated by reference in its entirety for all purposes.
BACKGROUND
Fabrication of semiconductor devices from solution precursors has emerged as an attractive topic in both research and industrial fields in recent years. For conventional device fabrication procedures, a vapor-deposition or ion plasma sputtering deposition technique is commonly used to deposit electrodes and semiconducting films, which usually requires a high level of vacuum and has a low material utilization rate. Solution-processed films, in contrast, stands out in terms of the low capital cost and high scalability to large area electronic devices. For example, inkjet printing has been demonstrated as a useful technique to fabricate multilayer wet-processed electronic devices. Blade/spin-coating and spray systems have also been used for the deposition of thin films. Solution processed layers have been included in electronic application to demonstrate high performance transistors, light- emitting diodes (LEDs), solar cells, as well as photo-detectors.
SUMMARY
Some aspects provide a method of producing a device, the method comprising treating a first substrate having a hydrophobic surface such that at least a portion of the surface becomes hydrophilic, forming at least one material layer over the hydrophilic portion of the substrate surface, treating the first substrate such that the hydrophilic portion of the first substrate's surface becomes hydrophobic, removing the first substrate from the at least one conductive layer, and forming at least one additional layer over the at least one conductive layer. Further aspects provide a method of forming a patterned layer, the method comprising oxidizing a portion of a surface of a substrate, thereby producing an oxidized portion of the surface and a non-oxidized portion of the surface, and forming a solution processed film over the oxidized portion of the substrate's surface without substantially forming any of the film over the non-oxidized portion of the substrate's surface.
The foregoing is a non-limiting summary of the invention, which is defined by the attached claims.
BRIEF DESCRIPTION OF DRAWINGS FIG. 1 illustrates a conventional deposition process;
FIG. 2 illustrates an inverted deposition process, according to some embodiments; FIG. 3 depicts an illustrative process for preparing a surface for deposition of a material layer via a wet process, according to some embodiments;
FIG. 4 shows photographs of deionized water drops on top of a PDMS surface, according to some embodiments;
FIG. 5 shows a spontaneously formed AgNWs pattern on a PDMS template after spin-casting, according to some embodiments;
FIG. 6 shows a spontaneously-formed AgNWs electrode pattern after transferal to an epoxy substrate, according to some embodiments;
FIG. 7 shows a spontaneously-formed micro-patterned AgNWs electrode with a line width of 100 μιη, according to some embodiments;
FIG. 8 illustrates the transmittance of an AgNWs electrode as a function of fabricated sheet resistance, according to some embodiments;
FIG. 9 shows atomic force images (AFMs) of three AgNWs electrode samples, according to some embodiments;
FIG. 10 depicts the architecture and performance of a first illustrative device formed using inverted deposition techniques, according to some embodiments;
FIG. 11 depicts the architecture and performance of a second illustrative device formed using inverted deposition techniques, according to some embodiments; and
FIG. 12 shows the scattering effect of AgNW electrodes formed using techniques described herein compared with scattering from a conventionally formed ITO electrode, according to some embodiments. DETAILED DESCRIPTION
As discussed above, it may be favorable to prepare electrodes from a solution process in order to minimize fabrication cost. A solution process may be particularly beneficial for preparation of transparent conducting electrodes in optoelectronic devices, such as organic light-emitting diode (OLED) displays. In a conventional optoelectronic device, a transparent electrode is usually thermal-evaporated or sputtered tin doped indium oxide (ITO) or fluorine doped tin oxide (FTO). ITO is commonly used as an anode due to its relatively deep work function, whereas the FTO often serves as a cathode due to its relatively shallow work function. However, these types of metal oxides can be expensive, and so forming an electrode from a less expensive material via solution processing may be an attractive alternative.
For instance, in spite of the recent commercialization of OLED TVs, the extremely high unit price may makes them less competitive to other display technologies such as liquid crystal displays (LCD). One of the main factors keeping the high fabrication costs is from the expensive transparent electrodes. Therefore, it may be beneficial to develop an inexpensive transparent electrode candidate that can be solution-processed. Several solution- processed electrodes have been demonstrated as potential candidates for high performance optoelectronic devices. For example, graphene has been used to produce electrodes in both LED and solar cells devices. Low-temperature processed highly conductive polymers like Poly(3,4-ethylenedioxythiophene) Polystyrene sulfonate (PEDOT:PSS) and nanowire mesh have also been demonstrated as suitable transparent electrodes. However, there are two major hurdles to adopting such materials in solution processed electrode and semiconducting films.
Firstly, while solution processing is a relatively cheap and easy to apply technology, it can be difficult to make complex patterns of solution processed films since, by its nature, solution processing tends to cover an entire area of a surface being treated. Patterning can be performed using cotton tips and/or a razor blade, but may be inexact and time consuming to apply. In devices such as the above-discussed display devices in which precise and/or fine patterning of electrodes is desired, producing a solution processed film with sufficient definition may be difficult or impossible using conventional techniques.
Secondly, it may be desirable to form electrodes or semiconducting films onto flexible substrates that do not have a resistance to high temperatures. Since some solution processing techniques involve high temperatures, this may inhibit or rule out the use of these techniques on certain substrates. For example, polyester (PET) is a flexible plastic substrate that cannot withstand the high temperatures encountered when annealing solution processed films like metal oxides. For some solution-processed transparent electrodes composed of conductive nanowire mesh, such as carbon nanotubes (CNT) and silver nanowires (AgNWs), an additional challenge is introduced by their coarse surfaces with high roughness, which can lead to electrical shorts through adjacent layers once deposited.
Embodiments of the present application are directed to a selective patterning and transferring process which are suitable for producing patterning solution-processed electrodes and semiconducting films without using photolithography. An inverted deposition process may be utilized in which layers are deposited onto a template substrate that is heat resistant in an inverse sequence. A preferred, or "capping" substrate may be added as a final layer, then all the layers removed from the template substrate. Any remaining layers may then be formed on top of the reversed stack (that is, on top of the first layer formed on the template substrate). Complex electrode or semiconducting film patterns may be produced using techniques to oxidize selected regions of the surface of a substrate. This process allows the formation of fine detail, and if the substrate is resistant to high temperatures, can be used as part of the inverted deposition process.
As used herein, "low temperature" may refer to temperatures below 150 °C, or less than 100 °C or less than 75 °C. In some embodiments, low temperature may be between 20 °C and 150 °C, between 30 °C and 120 °C, between 40 °C and 100 °C, or between 50 °C and 80 °C. In some embodiments, low temperature may be between 10 °C and 100 °C, between 20 °C and 90 °C, between 30 °C and 80 °C, or between 40 °C and 70 °C. As used herein, "high temperature" may refer to temperatures higher than a low temperature, irrespective of which range of temperatures are considered "low" according to those of the above illustrative embodiments. Where a temperature of a process is referred to herein, it refers to the temperature to which the layers of a device being fabricated are exposed. For instance, a spin coating process that is referred to as "low temperature" may refer to the temperature that the substrate on which a layer is spin coated is exposed to during the spin coating process. FIG. 1 illustrates a conventional deposition process. In the example of FIG. 1, a number of layers are formed over a substrate in a sequence beginning with the electrode and followed by layers A, B, C and D in that order. As discussed above, if the substrate is not resistant to certain temperatures, this may rule out use solution processing techniques that operate at such temperatures to form the electrode over the substrate. Moreover, the electrode cannot be easily formed into complex patterns over the substrate except for the conventional techniques such as cotton tips or razor blades discussed above.
FIG. 2 illustrates an inverted deposition process, according to some embodiments. In the example of FIG. 2, layers are formed onto a transfer template 201 which is a substrate that may be selected so as to be resistant to temperatures applied during solution processing of at least one of layers B, A, electrode layer 204, and substrate 205 as they are formed over the transfer template layer. After formation of these layers, the transfer template is removed (via a process to be described below) and the layer stack inverted. Additional layers (C and D in the example of FIG. 2) may then be formed over layer 202, which was previously the first layer formed onto the transfer template. As shown in FIG. 2, the order of layer formation may not be sequential as in the conventional process shown in FIG. 1.
According to some embodiments, one or more of layers 202, 203, 204 and 205 may be formed by a wet process, such as spin casting. According to some embodiments, one or more of layers 202, 203, 204 and 205 may be formed so as to follow an underlying pattern (e.g., a pattern of layer 202 in the case of forming layer 203, a pattern of layer 203 in the case of forming layer 204, etc.). Alternatively, one or more of layers 202, 203, 204 and 205 may be formed in a pattern using a selective patterning process, to be described below.
In the example of FIG. 2, while layers 203 and 204 are formed before the inversion of the stack of layers, there is no requirement that any particular layers be formed before or after the inversion, notwithstanding it being desirable to form any layers that utilize a high temperature process prior to the inversion so as to avoid potential damage to the substrate 205. Layers that may be formed without high temperature processes may be formed before or after the inversion. For example, if layer 203 is formed using a high temperature process it may be desirable to form layer 203 prior to the inversion; whereas, if layer 204 may be formed using low temperature processes it may be formed before or after the inversion as either way there may be no risk to damaging the substrate 205.
According to some embodiments, transfer template 201 may comprise any material on which semiconductor layers may be formed. As discussed above, it may in some embodiments be preferable that the transfer template be flexible (e.g., when the device being fabricated is part of a display). According to some embodiments, transfer template 201 comprises an organic polymer, such as but not limited to: polyethylene (e.g., LDPE and/or HDPE), polyimide (PI), polypropylene (PP), polytetrafluoroethylene (PTFE), a silicon-based (silicone-based) organic polymer, such as, but not limited to, polydimethylsiloxane (PDMS) and n-octyltriethoxysilane. According to some embodiments, the electrode 204 may comprise any suitable conductor, including any metal or metal oxide. For example, electrode 204 may include (though is not limited to including): Indium Tin Oxide (ΓΓΌ), Magnesium Silver Alloy (Mg:Ag), Carbon Nanowires (CNW), Carbon Nanotubes (CNT), Silver Nanowires (AgNW), one or more highly conductive polymers such as poly(3,4- ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS), or combinations thereof. Electrode 204 may be transparent, may include one or more transparent components, or may be opaque. For display applications such as OLED displays, it may be preferable that electrode 204 be formed from a transparent conductor, such as ITO. According to some embodiments, layers 202, 203, 206, and 207 may each comprise one or more semiconductor materials.
According to some embodiments, substrate 205 comprises a curable polymer, such as a UV curable polymer. The substrate 205 may be formed over any part of the layer beneath it (layer 204 in the example of FIG. 2), though may preferably be formed over all the whole area of the layer beneath. For example, in use cases where layer 204 is patterned so as to include material is less than the entire area covered by the layer, the substrate 205 may be formed over this entire area. According to some embodiments, the substrate 205 may be formed from a liquid polymer having a relatively low viscosity that is solidified and/or cross- linked via thermal annealing and/or a UV-treatment.
According to some embodiments, a material layer (e.g., an electrode or other layer) formed using a wet process such as spin casting may be formed using a selective patterning process. The process may comprise producing a surface on which the material layer is to be formed that includes both hydrophilic and hydrophobic portions. When the wet process is applied to the surface, the material layer may be formed over the hydrophilic portions only. If the hydrophilic and hydrophobic portions can be formed with well-defined boundaries, a layer having a fine patterned resolution may be formed (e.g., with features sized at or smaller than 100 μιη). According to some aspects, use of a hydrophilic surface on which to form a material layer may have a secondary benefit if the hydrophilic surface may be transformed to a hydrophobic surface subsequent to forming of the material layer on the surface. Such a transformation may allow removal of the hydrophilic surface from a material layer formed upon it. According to some embodiments, a material layer may be formed over a hydrophilic surface, then subsequently the hydrophilic surface may be transformed to a hydrophobic surface and removed from the material layer.
For example, at least a portion of the surface of transfer template 201 may be hydrophilic whilst the remainder is hydrophobic (an illustrative process to produce such a surface is discussed below). Layer 202 may be formed via a wet process such as solution processing to produce a patterned layer over the hydrophilic portion(s) of the template 201. Layers 203, 204 and 205 may be formed over layer 202 via additional wet processes and/or other material fabrication processes. Then, the transfer template may be transformed to have a substantially hydrophobic surface, which may allow for removal of the transfer template from layer 202 during the depicted inversion process. As discussed above, the surface of layer 202 that was previously in contact with the transfer template layer may now have additional layers (such as layer 206) formed upon it.
FIG. 3 depicts an illustrative process for preparing a surface for deposition of a material layer via a wet process, according to some embodiments. Process 300 includes formation of a template layer having a hydrophobic surface in step 310, a step of oxidizing portions of the surface in step 320 to cause those portions to become hydrophilic, a step 330 of spin-coating a solution onto the surface and a step 340 showing the result of step 330 wherein the spin-coated material is formed over the hydrophilic regions of the surface. The template layer (which may, for instance, be layer 201 shown in FIG. 2), may be formed by applying an organosilicon polymer such as polydimethylsiloxane (PDMS) onto glass. The surface of this template layer may be hydrophobic after formation. In step 320, a shadow mask is applied to the template layer and exposed regions of the surface oxidized. According to some embodiments, the portions of the surface may be oxidized by applying an oxygen plasma to the surface for a period of between 10 minutes and 20 minutes. According to some embodiments, the portions of the surface may be oxidized by applying ultraviolet (UV) light and ozone to the surface for a period between 30 minutes and 60 minutes. Irrespective of which technique or techniques is used to oxidize the portions of the surface (oxygen plasma, UV ozone and/or another technique), the net result is to cause those portions to become hydrophilic.
In step 330, a material layer is formed over the surface of the template. Due to the hydrophobic and hydrophilic nature of the portions of the surface, material may be formed by a wet process substantially over only the hydrophilic portions. Any suitable wet fabrication process may be used in step 330, including but not limited to blade coating, spin coating, inkjet printing, spraying, or combinations thereof. A material formed in step 330 via the fabrication process may include a conductive material, such as ΓΓΌ, FTO, PEDOT:PSS, CNT, AgNWs; a semiconductor material; or combinations thereof.
A more detailed, yet non-limiting, example of the above-described process follows below. In this illustrative example, the hydrophobic substrate is an organosilicon polymer such as polydimethylsiloxane (PDMS) prepared onto a glass, quartz, sapphire and/or silicon substrate. In other implementations, the hydrophobic substrate may be prepared via surface energy modification with self-assembly monolayers (SAM) of silane derivatives such as octadecyltrichlorosilane (ODTS) and n-octadecylphosphonic acid (ODPA).
As discussed above, a direct spin-coating of aqueous or alcohol based solutions on top of those hydrophobic surfaces usually leads to incomplete or no film coverage, primarily due to low wetting surface. To successfully deposit electrodes and/or semiconductor layers from solution precursors, one or more portions of the hydrophobic surface are transformed to be hydrophilic using, for example, a UV-ozone or an oxygen plasma treatment. The treatment time should be sufficient to transfer the silane polymer surfaces to silica, which has good wetting with different kinds of solvent. For example, for a Jelight Model 42 UV-ozone cleaner, the treatment time, depending on the type of silane derivatives used, can range from tens of minutes to several hours. The pre-selective patterning process may be performed by shielding the ozone or oxygen plasma with a shadow mask attached to the initial hydrophobic substrates. After the treatment, the surface of the substrate includes both hydrophilic surface areas, corresponding to the open area of the patterned mask, and hydrophobic surface areas, corresponding to the blocked area by the mask. Aqueous or alcohol-based solution precursors may be spin-casted onto the substrates.
Preferably this may be performed drop-by-drop a short time after the UV ozone treatment. In some implementations, the spin-speed of the substrate during drop should be high enough to completely remove the solution on untreated areas. A patterned film is then spontaneously formed upon the substrate and the patterning follows the shape of exposed substrate area during the treatment. With this technique, the pattern of solution-processed films can be spontaneously formed down to a 100 μιη scale. For an inverted deposition process, the films are spin-casted onto the UV-ozone or oxygen plasma treated PDMS substrates in a reverse sequential (e.g., as shown in FIG. 2). The whole stack, along with PDMS, is then annealed above 100 °C to accelerate the hydrophobicity recovery of the PDMS substrates. Due to its hydrophobicity recovery, the adhesion between the PDMS substrate and the adjacent semiconducting layer on top may be weak and as the semiconducting layer stack may be easily separated from the PDMS substrate. The peeling-off may be performed by capping a liquid polymer on top of the stacking layers. The liquid polymer has relatively low viscosity in its initial status, but can be solidified/cross-linked upon thermal annealing or UV-treatment. After the top-capping polymer is solidified/cross-linked, the staking layers are embedded into the polymer matrix and the whole matrix can be peeled off from the PDMS substrates. Therefore, the layer stacking order is reversed to the deposition sequential. Due to the flat interface between PDMS and the solution-processed films, the surface of the top layer is very smooth. And since PDMS can withstand a higher temperature than most of the flexible plastic substrates, a higher temperature-processed film is able to be fabricated on the flexible plastic substrate with this technique.
FIGs. 4-12 illustrate a particular physical implementation of the above-described techniques and are provided merely as one non-limiting example of the practice of such techniques. In the example of FIGs. 4-10, a solution-processed electrode is formed comprising both AgNWs and a PEDOT:PSS conductive polymer and PDMS is used as the substrate template for patterning the films. An epoxy is used as a "capping" substrate (e.g., substrate 205 in FIG. 2) over the material layers formed onto the PDMS, and which becomes a substrate of the layer stack after inversion.
FIG. 4 shows photographs of deionized water drops on top of a PDMS surface, which serves as a probe to detect selective wetting areas on PDMS with hydrophobic / hydrophilic control. As shown in step 420, the oxidized region of the surface (between the dashed lines) exhibit hydrophilicity whereas the remainder of the surface is hydrophobic. As shown in step 430, after annealing of the PDMS at 130 °C for 30 min, the hydrophobicity of the surface is recovered. FIG. 5 shows a spontaneously formed AgNWs pattern on the PDMS template after spin-casting, the figure depicting various widths of a AgNW electrode. FIG. 6 shows the spontaneously-formed AgNWs electrode pattern after transferal to the epoxy substrate (that is, after the capping substrate has been added and the PDMS substrate removed). The electrode patterning shows good precision at the edge as revealed by the microscope image. FIG. 7 shows the spontaneously-formed micro-patterned AgNWs electrode with a line width of 100 μη.
FIG. 8 illustrates the transmittance of an AgNWs electrode as a function of fabricated sheet resistance. FIG. 9 shows atomic force images (AFMs) of three AgNWs electrode samples, being: (A; top) directly spin-coated on PDMS, (B; middle) spin-coated on PDMS template and transferred to epoxy substrate and (C; bottom) spin-coated on patterned PEDOT:PSS on top of PDMS template and transferred to epoxy substrate. For the sample (C), the PEDOT:PSS acts as a thin buffer layer between PDMS template and AgNWs mesh. The 30 nm thick PEDOT:PSS layer is also completely transferred to epoxy substrate together with AgNWs mesh after peeling-off from the PDMS template. The smooth interface between PEDOT:PSS and PDMS leads to its most flat surface among all three samples, with a peak- to-valley roughness of less than 15 nm. For the AgNWs directly-coated on PDMS, the surface is substantially rougher due to the stacking and protrusion of AgNWs mesh, and the peak-to-valley roughness is more than 300 nm. For the AgNWs electrodes transferred from PDMS template without any buffer layer, the surface roughness is also significantly suppressed, with a peak-to-valley roughness of 60 nm.
For sample C, due to its superior smoothness, and the already-transferred PEDOT:PSS capped on top of the AgNWs electrodes, no additional PEDOT:PSS may be necessary to flatten the electrode surface or fill the void area between AgNWs to improve the aspect ratio. A thermal-evaporated phosphorescent green OLED is directly deposited onto the electrodes. The illustrative device's architecture and performance are shown in FIG. 10. The device shows a decent performance with regular turn-on voltage without any leakage current observed. Solution-processed OLEDs may be fabricated onto large-area patterned AgNWs electrodes and compared with commercial large-area ITO electrodes in parallel. Such a device made with AgNWs electrode show 40% higher current efficiency due to the enhanced light out-coupling by scattering. The device architecture and performance are shown in FIG. 11.
The scattering effect of AgNW electrodes formed using techniques described herein compared with the scattering effect of a conventionally formed ITO electrode is shown in FIG. 12. Having thus described several aspects of at least one embodiment of this invention, it is to be appreciated that various alterations, modifications, and improvements will readily occur to those skilled in the art. For instance, techniques described herein may be applied to a variety of optoelectronic devices, including but not limited to, flexible displays (e.g., OLEDs), photovoltaic films, solar cells, photodetectors, phototransistors, LEDs, wearable display patches or other forms of clothing having embedded electronics, wearable devices, active stickers configured to affix to a product.
Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the spirit and scope of the invention. Further, though advantages of the present invention are indicated, it should be appreciated that not every embodiment of the technology described herein will include every described advantage. Some embodiments may not implement any features described as advantageous herein and in some instances one or more of the described features may be implemented to achieve further embodiments. Accordingly, the foregoing description and drawings are by way of example only.
Various aspects of the present invention may be used alone, in combination, or in a variety of arrangements not specifically discussed in the embodiments described in the foregoing and is therefore not limited in its application to the details and arrangement of components set forth in the foregoing description or illustrated in the drawings. For example, aspects described in one embodiment may be combined in any manner with aspects described in other embodiments.
Also, the invention may be embodied as a method, of which an example has been provided. The acts performed as part of the method may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than illustrated, which may include performing some acts simultaneously, even though shown as sequential acts in illustrative embodiments.
Use of ordinal terms such as "first," "second," "third," etc., in the claims to modify a claim element does not by itself connote any priority, precedence, or order of one claim element over another or the temporal order in which acts of a method are performed, but are used merely as labels to distinguish one claim element having a certain name from another element having a same name (but for use of the ordinal term) to distinguish the claim elements. Also, the phraseology and terminology used herein is for the purpose of description and should not be regarded as limiting. The use of "including," "comprising," or "having," "containing," "involving," and variations thereof herein, is meant to encompass the items listed thereafter and equivalents thereof as well as additional items.

Claims

1. A method of producing a device, comprising:
treating a first substrate having a hydrophobic surface such that at least a portion of the surface becomes hydrophilic;
forming at least one material layer over the hydrophilic portion of the substrate surface;
treating the first substrate such that the hydrophilic portion of the first substrate's surface becomes hydrophobic;
removing the first substrate from the at least one conductive layer; and
forming at least one additional layer over the at least one conductive layer.
2. The method of claim 1, further comprising forming a second substrate over the at least one material layer.
3. The method of claim 2, wherein forming the second substrate is performed after treating the first substrate such that the first substrate's surface becomes hydrophobic.
4. The method of claim 1, wherein the at least one material layer is formed via solution processing.
5. The method of claim 1, wherein treating the first substrate such that the first substrate's surface becomes hydrophobic comprises annealing the first substrate at a temperature above 100°C.
6. The method of claim 1, wherein treating the first substrate such that at least the portion of the surface becomes hydrophilic comprises oxidizing the portion of the surface.
7. The method of claim 6, wherein oxidizing the portion of the surface comprises applying ultraviolet radiation to the portion of the surface.
8. The method of claim 6, wherein oxidizing the portion of the surface comprises applying an oxygen plasma to the portion of the surface.
9. The method of claim 1, wherein the first substrate comprises an organosilicon polymer deposited onto a layer of glass.
10. The method of claim 9, wherein the first substrate comprises polydimethylsiloxane (PDMS).
11. The method of claim 1, wherein the at least one material layer comprises a layer of indium tin oxide (ITO).
12. The method of claim 1, wherein the at least one material layer comprises a layer of silver nanowires.
13. The method of claim 1, wherein the at least one material layer comprises a layer of carbon nanotubes.
14. The method of claim 1, wherein the at least one additional layer is formed on a surface of the at least one material layer that contacted the first substrate prior to removal of the first substrate.
15. The method of claim 1, wherein at least part of forming at least one material layer is performed at a temperature above 90 °C and forming the at least one additional layer is performed at a temperature below 90 °C.
16. A method of forming a patterned layer, comprising:
oxidizing a portion of a surface of a substrate, thereby producing an oxidized portion of the surface and a non-oxidized portion of the surface; and
forming a solution processed film over the oxidized portion of the substrate's surface without substantially forming any of the film over the non-oxidized portion of the substrate's surface.
17. The method of claim 16, wherein oxidizing the portion of the surface of the substrate comprises applying an oxygen plasma to the surface of the substrate.
18. The method of claim 16, wherein oxidizing the portion of the surface of the substrate comprises applying ultraviolet radiation to the surface of the substrate while supplying oxygen and/or ozone to the surface.
19. The method of claim 16, wherein the substrate comprises polydimethylsiloxane (PDMS).
20. The method of claim 18, wherein the ultraviolet radiation is applied through a mask to target the portion of the surface of the substrate.
21. The method of claim 16, further comprising removing the substrate from the film.
22. The method of claim 21, further comprising forming a layer of material on a surface of the film that contacted the substrate prior to its removal.
PCT/US2016/068523 2015-12-23 2016-12-23 Patterning and inverted deposition engineering for solution-processed electrodes and semiconducting films WO2017112932A1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114038968A (en) * 2021-11-05 2022-02-11 重庆康佳光电技术研究院有限公司 Coarsening method of N-GaN layer, chip and manufacturing method of chip

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100148159A1 (en) * 2007-04-19 2010-06-17 Ciba Corporation Method for forming a pattern on a substrate and electronic device formed thereby
US20100316849A1 (en) * 2008-02-05 2010-12-16 Millward Dan B Method to Produce Nanometer-Sized Features with Directed Assembly of Block Copolymers
US20130019937A1 (en) * 2011-07-22 2013-01-24 University Of Florida Research Foundation, Inc. Photovoltaic cell enhancement through uvo treatment
US20130240842A1 (en) * 2010-12-07 2013-09-19 Andrew Gabriel Rinzler Active matrix dilute source enabled vertical organic light emitting transistor
US20140183516A1 (en) * 2011-08-18 2014-07-03 Cambridge Display Technology Limited Electronic device
US20140272172A1 (en) * 2013-03-14 2014-09-18 Aruna Zhamu Method for producing conducting and transparent films from combined graphene and conductive nano filaments

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100148159A1 (en) * 2007-04-19 2010-06-17 Ciba Corporation Method for forming a pattern on a substrate and electronic device formed thereby
US20100316849A1 (en) * 2008-02-05 2010-12-16 Millward Dan B Method to Produce Nanometer-Sized Features with Directed Assembly of Block Copolymers
US20130240842A1 (en) * 2010-12-07 2013-09-19 Andrew Gabriel Rinzler Active matrix dilute source enabled vertical organic light emitting transistor
US20130019937A1 (en) * 2011-07-22 2013-01-24 University Of Florida Research Foundation, Inc. Photovoltaic cell enhancement through uvo treatment
US20140183516A1 (en) * 2011-08-18 2014-07-03 Cambridge Display Technology Limited Electronic device
US20140272172A1 (en) * 2013-03-14 2014-09-18 Aruna Zhamu Method for producing conducting and transparent films from combined graphene and conductive nano filaments

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114038968A (en) * 2021-11-05 2022-02-11 重庆康佳光电技术研究院有限公司 Coarsening method of N-GaN layer, chip and manufacturing method of chip
CN114038968B (en) * 2021-11-05 2024-01-12 重庆康佳光电技术研究院有限公司 Coarsening method of N-GaN layer, chip and manufacturing method thereof

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