WO2017112747A1 - Microstructure enhanced absorption photosensitive devices - Google Patents

Microstructure enhanced absorption photosensitive devices Download PDF

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Publication number
WO2017112747A1
WO2017112747A1 PCT/US2016/067977 US2016067977W WO2017112747A1 WO 2017112747 A1 WO2017112747 A1 WO 2017112747A1 US 2016067977 W US2016067977 W US 2016067977W WO 2017112747 A1 WO2017112747 A1 WO 2017112747A1
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Prior art keywords
layer
cases
microstructure
photodetector
holes
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PCT/US2016/067977
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French (fr)
Inventor
Shih-Yuan Wang
Shih-Ping Wang
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W&Wsens Devices, Inc.
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Application filed by W&Wsens Devices, Inc. filed Critical W&Wsens Devices, Inc.
Priority to EP16880012.6A priority Critical patent/EP3411906A4/en
Priority to CN201680082229.1A priority patent/CN109155340A/en
Publication of WO2017112747A1 publication Critical patent/WO2017112747A1/en
Priority to US15/797,821 priority patent/US10446700B2/en
Priority to US16/042,535 priority patent/US10700225B2/en
Priority to US16/296,985 priority patent/US10468543B2/en
Priority to US16/528,958 priority patent/US11121271B2/en
Priority to US17/182,954 priority patent/US11791432B2/en
Priority to US18/113,474 priority patent/US20230215962A1/en
Priority to US18/385,213 priority patent/US20240063317A1/en

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    • HELECTRICITY
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    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier
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    • H01L31/107Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier working in avalanche mode, e.g. avalanche photodiode
    • H01L31/1075Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier working in avalanche mode, e.g. avalanche photodiode in which the active layers, e.g. absorption or multiplication layers, form an heterostructure, e.g. SAM structure
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Abstract

Techniques for enhancing the quantum efficiency (QE) in photodiodes and avalanche photodiodes with the use of microstructures are described. The microstructures, such as holes, effectively increase the absorption of the photons. QE can be enhanced using heterojunction PIN structures which can result in less light absorbed in the P and/or N regions and more light absorbed in the I region. Various alloys of GeSi can be used for I and/or P regions. The microstructured holes can be funnel shaped, aperiodic, non-circular, textured and/or slanted which can further increase QE.

Description

M!CROSTRUCTURE ENHANCED ABSORPTION PHOTOSENSITIVE DEVICES
REFERENCE TO RELATED APPLICATIONS
[0001] This patent application claims the benefit of and incorporates by reference each of the following provisional applications:
U.S. Prov. Ser. No. 62/270,577 filed December 21 , 2015;
U.S. Prov. Ser. No, 62/290,391 filed February 02, 2016;
U.S. Prov. Ser. No. 62/304,907 filed March 07, 2016;
U.S. Prov. Ser. No. 62/334,934 filed May 1 , 2016;
U.S. Prov. Ser. No. 62/338,263 filed May 18, 2016;
U.S. Prov. Ser. No. 62/346,850 filed June 07, 2016;
U.S. Prov. Ser. No. 62/359,349 filed July 07, 2016;
U.S. Prov. Ser. No. 62/366, 188 filed July 25, 2016;
U.S. Prov. Ser. No, 62/368, 109 filed July 28, 2016;
U.S. Prov. Ser. No. 62/374,828 filed August 13, 2016;
U.S. Prov. Ser. No. 62/376,869 filed August 18, 2016;
U.S. Prov. Ser, No. 62/380,364 filed August 27, 2016;
U.S. Prov. Ser. No. 62/383,391 filed September 03, 2016;
U.S. Prov. Ser. No. 62/383,479 filed September 04, 2016;
U.S. Prov. Ser. No. 62/394,222 filed September 14, 2016;
U.S. Prov. Ser. No, 62/398,607 filed September 23, 2016;
U.S. Prov. Ser. No. 62/401 , 126 filed September 28, 2016;
U.S. Prov. Ser. No. 62/406,999 filed October 12, 2016;
U.S. Prov. Ser. No. 62/414,671 filed October 29, 2016; and
U.S. Prov. Ser. No. 62/415,339 filed October 31 , 2016.
[0002] This patent application relates to the following provisional and non- provisional applications that are each incorporated by reference:
international Patent Appl. No. PCT/US14/039208 filed May 22, 2014;
international Patent Appl. No. PCT/US15/061120 filed November 17, 2015;
U.S. Appl. Ser. No. 14/943,898 filed November 17, 2015;
U.S. Appl. Ser. No. 14/945,003 filed November 18, 2015;
U.S. Appl. Ser. No. 14/947,718 filed November 20, 2015; U.S. Appl. Ser. No. 15/309,922 filed November 9, 2016;
U.S. Pat. No. 9,496,435 granted November 15, 2016, based on U.S. Appl. Ser. No. 14/892,821 filed November 20, 2015;
U.S. Pat. No. 9,525,084 granted December 20, 2016, based on said U.S. Appl. Ser. No. 14/945,003;
U.S. Pat. No. 9,530,905 which is expected to be granted on December 27, 2016, based on said U.S. Appl. Ser. No. 14/943,898;
u s. Prov. Ser. No. 61/826,446 fi ed May 22, 2013;
u s. Prov. Ser. No, 61/834,873 fi ed June 13, 2013;
u s. Prov. Ser. No. 61/843,021 fi ed July 4, 2013;
u s. Prov. Ser. No. 61/905, 109 fi ed November 15, 2013;
u s. Prov. Ser, No. 62/017,915 fi ed June 27, 2014;
u s. Prov. Ser. No. 62/081 ,538 fi ed November 18, 2014;
u s. Prov. Ser. No. 62/090,879 fi ed December 11 , 2014;
u s. Prov. Ser. No. 62/100,025 fi ed January 05, 2015;
u s. Prov. Ser. No, 62/11 ,582 fi ed February 03, 2015;
u s. Prov. Ser. No. 62/139,51 1 fi ed March 27, 2015;
u s. Prov. Ser. No. 62/153,443 fi ed April 27, 2015
u s. Prov. Ser, No. 62/154,675 fi ed April 29, 2015;
u s. Prov. Ser. No. 62/157,876 fi ed May 06, 2015;
u s. Prov. Ser. No. 62/171 ,915 fi ed June 05, 2015;
u s. Prov. Ser. No. 62/174,498 fi ed June 1 , 2015
u s. Prov. Ser. No, 62/175,855 fi ed June 15, 2015;
u s. Prov. Ser. No. 62/182,602 fi ed June 21 , 2015;
u s. Prov. Ser. No. 62/188,876 fi ed July 06, 2015;
u s. Prov. Ser. No. 62/197, 120 fi ed July 27, 2015;
u s. Prov. Ser. No. 62/199,607 fi ed July 31 , 2015;
u s. Prov. Ser. No. 62/205,717 fi ed August 15, 2015;
u s. Prov. Ser. No. 62/209,3 1 fi ed August 24, 2015;
u s. Prov. Ser. No, 62/213,556 fi ed September 02, 2015; and
u s. Prov. Ser. No. 62/232,716 fi ed September 25, 2015 A!l of the above-referenced provisional and non-provisional patent applications are collectively referenced herein as "the commonly assigned incorporated
applications." FIELD
[0003] This patent specification relates mainly to photosensitive devices. More particularly, some embodiments relate to photosensitive devices having microstructure enhanced absorption characteristics. BACKGROUND
[0004] Fiber-optic communication is widely used in applications such as telecommunications and communication within large data centers. Because of attenuation losses associated with using shorter optical wavelengths most fiberoptic communication uses optical wavelengths of 800 nm and longer. Commonly used transmission windows exist between 800 nm and 1875 nm. A main component of optical receivers used in fiber-optic communication system is the photo detector, usually in the form of a photodiode (PD) or avalanche photodiode (APD).
[0005] High-quality low-noise APDs can be made from silicon. However, while silicon will absorb light in the visible and near infrared range, it becomes more transparent at longer optical wavelengths. Silicon PDs and APDs can be made for optical wavelengths of 800 nm and longer by increasing the thickness of the absorption Ύ region of the device. However, in order to obtain adequate quantum efficiency, the thickness of the silicon Y region becomes so large that the device's maximum bandwidth is too low for many current and future telecom and data center applications.
[0008] To avoid the inherent problem that silicon PDs and APDs have with longer wavelengths and higher bandwidths, other materials are used. Germanium (Ge) detects infrared out to a wavelength of 1700 nm, but has relatively high multiplication noise. InGaAs can detect out to longer than 1600 nm, and has less multiplication noise than Ge, but still has far greater multiplication noise than silicon. InGaAs is known to be used as the absorption region of a heterostructure diode, most typically involving InP as a substrate and as a multiplication layer. This material system is compatible with an absorption window of roughly 900 to 1700 nm. However, both InGaAs devices are relatively expensive and have relatively high multiplication noise when compared with silicon and are difficult to integrate with Si electronics as a single chip,
[0007] Information published by a major company in the business of photodetectors (See
http://files.shareholder.com/downloads/FNSR/0x0x382377/0b3893ea-fb06-417d- ac71-84f2f9084b0d/Finisar_lnvestor_Presentation.pdf,) indicates at page 0 that the current market for optical communication devices is over 7 billion U.S. dollars with a compounded annual growth rate of 12%. The photodiodes (PD) used for 850-950 nm wavelength employ GaAs material and for 1550-1650 nm wavelength the photodiodes are InP material based, which is both expensive and difficult to integrate with Si based electronics. Therefore, there is a large market and a long- felt need that has not met for the development of a better device. To date there are no Si material based photodiodes nor avalanche photodiodes (APD) for 850-950 nm and no Ge on Si material based photodiodes nor avalanche photodiodes for 1550-1650 nm that are top or bottom illuminated and with data rate of 5 Gb/s or greater, that are commercially available to the knowledge of the inventors herein. However, there has been no lack of trying to develop a better device for this large market. For example, there have been proposals for resonant photodiodes fabricated in Si material (see Resonant-Cavity-Enhanced High-Speed Si
Photodiode Grown by Epitaxial Lateral Overgrowth, Schaub et al., IEEE
PHOTONICS TECHNOLOGY LETTERS, VOL. 11 , NO. 12, DECEMBER 1999), but they have not reached the known commercial market. Other forms of high speed photodiodes in a waveguide configuration have been proposed, such as in 40 GHz Si/Ge uni-traveling carrier waveguide photodiode, Piels et al, DOI 10.1 09/JLT.2014.2310780, Journal of Lightwave Technology (incorporated by reference herein); Monolithic germanium/silicon avalanche photodiodes with 340 GHz gain-bandwidth product, NATURE PHOTONICS j VOL 3 | JANUARY 2009 j www.nature.com/naturephotonics (incorporated by reference herein and referred to herein as "Kang et al. 2009"); High-speed Ge photodetector monolithicaliy integrated with large cross-section silicon-on-insulator waveguide, Feng et al., Applied Physics Letters 95, 261105 (2009), doi: 10.1063/1.3279129 (incorporated by reference herein); where light is coupled edge-wise into an optical waveguide and where the absorption length can be 100 urn or longer to compensate for the weak absorption coefficient of Ge at 1550 nm. In these previously proposed waveguide photodiode structures, light propagates along the length of the waveguide and the electric field is applied across the PIN waveguide such that the direction of light propagation and the direction of the electric field are
predominately perpendicular. Since light in Si travels approximately 1000 times faster than the saturated velocity of electrons/holes, a waveguide PD can be 200 microns long for example and the Ύ in the PIN can be 2 microns for example and achieve a bandwidth of over 10 Gb/s. Such edge coupling of light is costly in packaging as compared to surface illumination as described in this patent specification, where dimensions of the waveguide cross section are typically a few microns as compared to tens of microns for known surface illuminated photodiodes or avalanche photodiodes. Known waveguide PD/APD are often only single mode optical systems whereas surface illuminated PD/APD described in this patent specification can be used in both single and multimode optical systems. In addition, known waveguide photodiodes are difficult to test at wafer level, whereas surface illuminated photodiodes described in this patent specification can be easily tested at wafer level. Known waveguide photodiodes/avalanche photodiodes are used mostly in specialty photonic circuits and are not widely commercially available. A top or bottom illuminated Si and Ge on Si or GeSi on Si PD/APD that can be integrated with Si is not known to be commercially available at data rates of 5 Gb/s or more at wavelengths of 850-950 nm and 1550-1650 nm. In contrast,
photodiodes on Si based material, as described in this patent specification, can be monolithicaliy integrated with integrated electronic circuits on a single Si chip, thereby significantly reducing the cost of packaging, in addition, the
microstructured PD/APD at 850 nm nominal wavelength described in this patent specification can be predominately for short haul, distances less than a meter and in certain cases less than 10 meters and in certain cases less than 100 meters and in certain cases less than 1000 meters optical data transmission for example. The microstructured PD/APD direction of incident optical beam and the electric field in the T region of a PIN or NIP structure, are predominately coiiinear and/or almost collinear. This patent specification enables such a device and is expected to transform the current data centers to almost ail optical data transmission between blades and/or within a blade, that will vastly increase the data transmission bandwidth capabilities and significantly reduce electrical power usage.
[0008] The subject matter claimed herein is not limited to embodiments that solve any specific disadvantages or that operate only in environments such as those described above. Rather, this background is only provided to illustrate one exemplary technology area where some embodiments described herein may be practiced. SUMMARY
[0009] According to some embodiments, a microstructure-enhanced photodetector comprises a photon absorbing l-layer, a top layer over the l-layer, and a bottom layer under the l-!ayer. The !-layer comprises GexSii-x material, where x is more than zero but less than one, and is intentionally divided by microstructures into plural regions such that at some of the regions at least a portion of the l-layer material is absent compared with other regions. Such absence of material can form holes in the l-layer or pillars of l-layer material. The top layer comprises GexSii-x material, where x is between zero and one inclusive, and is doped to P or N conductivity. The bottom layer comprises GexSii-x material, where x is between zero and one inclusive, and is doped to conductivity opposite that of the top layer. The photodetector has photon absorption and quantum efficiency
(QE) that are enhanced compared with an otherwise same device with bulk material l-layer when reverse biased to generate an electrical signal in response to an incident optical beam in a selected wavelength range that is generally coilinear with the microstructures and concurrently illuminates plural microstructures with a substantially continuous cross-section of the beam. Coilinear in this patent specification means that the optical beam is not along the interface between the layers but is at an angle of less than 90 degrees to such interface, and preferably is at an angle of 45 degrees or less to the such interface. The terms "top" and "bottom" apply to a particular orientation of the photodetector; for example, when the photodetector is rotated 90 degrees, the "top" layer can be at one side and the "bottom" layer at an opposite side.
[0010] In some embodiments, the i-iayer forms a heteroj unction with at least one of the top layer and the bottom layer, the x in the i-iayer material is greater than the x of the material of at least one of the top and bottom layers or of both the top and bottom layers.
[0011] In some embodiments, the l-layer comprises a stack of sub-layers of the GexSii- material where at least two of the sub-layers differ in their x-vaiues. In some, the i-layer material consists essentially of Ge and Si.
[0012] In some embodiments, the microstructures comprise holes in the l-layer that interrupt an otherwise continuous I-iayer. The holes can be funnel-shaped, having cross-sections that generally decrease with distance from the top layer. The [0013] icrostructures can extend in both the top layer and the bottom layer. The microstructures can comprise holes in the i-layer that are non-circular in cross- section. The holes can be in an array that is substantially aperiodic, and can comprise an array of holes through to the top layer and into the I-iayer and another array of holes through the bottom layer and into the l-layer. At least one of the top and bottom layers can be textured. The holes in the I-iayer can be are slanted relative to an interface between the top layer and the I-iayer,
[0014] Some embodiments further include a substrate comprising Si on or in which the photodetector is formed, and an integrated circuit built on or in the same substrate and electrically coupled with the photodetector to process said electrical signal. Additional photodetectors can be formed and plural integrated circuits built on or in the same substrate and electrically coupled to process electrical signal from each photodetector. At least one of the photodetectors on or in the substrate can be larger than another of the photodetectors on or in the same substrate.
[0015] In some embodiments, the microstructures have a depth or height in the range of 00-5000 nm (nanometers), a lateral dimension in the range of 50-3000 nm, and spacing in the range of 0-5000 nm. The photodetector can further comprise reflectors surrounding at least the I-iayer and configured to reflect light therefrom back into the i-layer, and in some cases a reflector at least at one of the top layer and the bottom layer configured to reflect light from the i-layer back into the i-layer. [0018] Some embodiments further include a doped charge layer under the I- layer, an avalanche Mayer under the charge layer, and a semiconductor layer under the avalanche Mayer doped to conductivity opposite that of the charge layer, thereby forming a microstructure-enhanced avalanche photodefector.
[0017] In some embodiments, the quantum efficiency of the photodetector is at least 30% in a selected portion of at least one of the wavelength ranges 800-900 nm and 1450-1650 nm of said incident optical beam. In some, the quantum efficiency is at least 30% in a wavelength range of 850 nm ±10 nm for bandwidth of at least 20 Gb/s, and in some the quantum efficiency of the photodetector is at least 30% in a wavelength range of 1550 nm ±10 nm for bandwidth of at least 20 Gb/s. The i-iayer can be Geo.2Sio.8 material that is 2 micrometers thick, and the photodetector in that example can have a quantum efficiency of at least 40% in the wavelength range 850-980 nm of the incident optical beam and bandwidth of at least 20 Gb/s. The l-iayer can be Geo.4Sio.6 material that is 2 micrometers thick, in which case the photodetector can have a quantum efficiency of at least 30% in the wavelength range 1250-1350 nm of the incident optical beam and bandwidth of at least 20 Gb/s.
[0018] Some embodiments comprise a photon absorbing i-iayer, a top layer over the ayer doped to P or N conductivity, and a bottom layer under the i-layer doped to conductivity opposite that of the top layer, where the I-iayer consists essentially of Ge and is intentionally divided by microstructures into regions such that at least a portion of the l-layer material is absent from some of the regions compared with other regions of the i-layer; and each of the top layer and the bottom layer consists essentially of one but not the other of Ge and Si except for being doped to said P or N conductivity. The photodetector has photon absorption and quantum efficiency (QE) that are enhanced compared with an otherwise same device with bulk material I-iayer when reverse biased to generate an electrical signal in response to an incident optical beam at a selected wavelength range that is generally collinear with the microstructures and concurrently illuminates plural microstructures with a substantially continuous cross-section of the beam. Each of the top and bottom layers consists essentially of Ge except for being doped to said P or N conductivity, or each of the top and bottom layers consists essentially of Si except for being doped to said P or N conductivity. The I-layer can form a heterojunction with at least one of the top layer and the bottom layer. The photodetector can further include a doped charge layer under the i-iayer, an avalanche l-layer under the charge layer, and a semiconductor layer under the avalanche l-layer doped to conductivity opposite that of the charge layer, thereby forming a microstructure-enhanced avalanche photodetector. The microstructures can comprise holes in the l-layer that interrupt an otherwise continuous l-layer, and the holes can be funnel-shaped, having cross-sections that generally decrease with distance from the top layer, and can be in an array that is substantially aperiodic. The holes comprise an array of holes through to the top layer and into the i-layer and another array of holes through the bottom layer and into the l-layer. The photodetector can further include a substrate comprising Si on or in which said photodetector is formed, and an integrated circuit built on or in the same substrate and electrically coupled with the photodetector to process said electrical signal.
[0019] A method of making a microstructure-enhanced photodetector can comprise forming a bottom layer of a semiconductor material doped to P or N conductivity, a photo-absorbing l-iayer over the bottom layer, and a top layer that is over the l-layer and is doped to conductivity opposite that of the bottom layer, wherein: the i-iayer comprises one of (i) GexSii-x material, where x is more than zero but less than one , and (ii) essentially only Ge; each of the top layer and the bottom layer can comprise one of (i) GexSh-x material, where x is between zero and one inclusive , and (ii) one but not the other of essentially only Ge and Si. The method further includes forming microstructures that divide the l-iayer structures into plural regions such that at some of the regions at least a portion of the l-iayer material is absent compared with other regions. The resulting photodetector has photon absorption and quantum efficiency (QE) that are enhanced compared with an otherwise same device with bulk material l-layer when reverse biased to generate an electrical signal in response to an incident optical beam in a selected wavelength range that is generally coliinear with the microstructures and concurrently illuminates plural microstructures with a substantially continuous cross-section of the beam. The method can include creating a heterojunction at an interface between the i-iayer and at least one of the top layer and the bottom layer, and can further include forming a charge layer that is under the i-iayer and is doped to a selected conductivity type, an avalanche layer under the doped charge layer, and a semiconductor layer that is under the avalanche layer and is doped to a conductivity type opposite that of the charge layer, thereby forming a
microstructured avalanche photoconductor. The forming of microstructures can comprise forming holes in the l-iayer while keeping the l-layer substantially continuous except for the holes.
[0020] As used herein, the grammatical conjunctions "and", "or" and "and/or" are all intended to indicate that one or more of the cases, object or subjects they connect may occur or be present, in this way, as used herein the term "or" in all cases indicates an "inclusive or" meaning rather than an "exclusive or" meaning.
[0021] As used herein the terms "hole" and "holes" refer to any opening into or through material or materials. In general, the opening can have any shape and cross-section including round, elliptical, polygonal, and random shape.
BRIEF DESCRIPTION OF THE DRAWI GS
[0022] To further clarify the above and other advantages and features of the subject matter of this patent specification, specific examples of embodiments thereof are illustrated in the appended drawings, it should be appreciated that these drawings depict only illustrative embodiments and are therefore not to be considered limiting of the scope of this patent specification or the appended claims. The subject matter hereof will be described and explained with additional specificity and detail through the use of the accompanying drawings in which:
[0023] FIG. 1 is a diagram showing a structure for reflecting the lateral or transverse optical modes in a microstructured photodiode, according to some embodiments;
[0024] FIG. 2 is the diagram of FIG. 1 showing example lateral or transverse reflection modes in the microstructured photodiode, according to some
embodiments;
[0025] FIG. 3 is a schematic diagram showing microstructured holes etched at a slant, according to some embodiments;
[0028] FIG. 4 is a plot showing a simulation of reflection of microstructured holes having a slant, according to some embodiments;
[0027] FIG. 5 is a plot showing FDTD simulated reflection of microstructured holes with dimensions used in FIG. 4 with holes at 15 degrees; [0028] FIG. 6 is a plot showing an FDTD simulation of enhanced absorption characteristics of the structures described in FIGs. 3 and 4;
[0029] FIGs. 7A and 7B are a diagram and table for funnel shaped holes, according to some embodiments;
[0030] FIGs. 8A and 8B are plots showing FDTD simulations of
electromagnetic field impinging on the microstructured holes with a funnel shape as shown in FIGs. 7A and 7B;
[0031] FIGs. 9A-9D are a table and schematic diagrams of P-l-N
microstructured PDs/APDs of Si, SOI and Ge on Si microstructured PD (APD) with funnel shaped holes, according to some embodiments;
[0032] FIG. 10 is a plot showing FDTD simulation results of a microstructured Si PD having a structure as shown in FIG. 9B;
[0033] FIGs. 11 A and 11 B are plots showing FDTD simulation results of a microstructured Si PD (or APD) having a structure as shown in FIG. 9C;
[0034] FIGs. 12A and 12B are plots showing FDTD simulation results of a microstructured Ge on Si PD having a structure as shown in FIG. 9D;
[0035] FIG. 13 is a scanning electron micrograph of an etched microstructure hole where the sidewall has multiple slopes. In certain cases it can have mostly a single slope and in other cases it can have multiple slopes;
[0038] FIGs. 14A-14C are scanning electron micrographs of microstructured holes etched with multiple sidewall angles, according to some embodiments;
[0037] FIGs. 15A-15D are diagrams showing for simplicity two types of microstructure holes, according to some embodiments;
[0038] FIG. 16 is a diagram showing a possible layer structure for monolithic integration of the silicon microstructured photodiode with CMOS and/or BiC OS electronics, according to some embodiments;
[0039] FIG. 7 is cross sectional view showing basic elements of one possible method of integrating a microstructured photodiode with electronics using an epitaxial layer structure as shown in FIG. 16;
[0040] FIG. 18 is a diagram illustrating an inductor integrated into an electronic circuit as part of a transmission line from the microstructured photodetector (PD/APD) to the electronics, according to some embodiments; [0041] FIG. 19 is a basic flow diagram illustrating some aspects for integrating the microstructured photodiode or avalanche photodiode with CMOS/BiCMOS electronics, according to some embodiments;
[0042] FIGs, 20A and 20B are diagrams showing complementary designs for microstructured holes and microstructured pillars, according to some embodiments;
[0043] FIG. 21A is a table showing several different examples of hole diameters and periods in nm in hexagonal and square lattices, according to some embodiments;
[0044] FIG. 22A is a table showing several different examples of hole diameter/periods in nm for square and hexagonal lattices for enhancing absorption in Ge/GeSi/Si on Si or SOI IVlPD/IViAPD, according to some embodiments;
[0045] FIG. 22B is a diagram showing an example of a Ge on Si photodiode where the P Ge can have a thickness range from 0.1-0.5 urn (microns) and the I
Ge layer can have a thickness range of 0.5-5 urn;
[0048] FIGs. 23A and 23B are plots showing a simulation the Si on SOI MPD shown in FIG. 21 C;
[0047] FIG. 24 is a diagram showing a simplistic ray view of light bouncing in a MPD/MAPD device, according to some embodiments;
[0048] FIG. 25 is a diagram showing a Ge on Si microstructured photodiode where light is incident from the backside, according to some embodiments;
[0049] FIG. 26 is a plot showing the absorption (1-R-T) of a microstructure
PD/MAPD that includes power absorbed in all layers, P, I, N for example;
[0050] FIGs. 27A-27C are a table and two example structures showing a range of hole diameters and periods (diameter/period all in nm) for square and/or hexagonal lattices, according to some embodiments;
[0051] FIGs. 28A-28C are scanning electron micrograph cross sections of another example of deep reactive ion etching (DRIE) BOSCH process for etching holes in Si and/or Ge, Ge/ GexSii-x MPD/MAPD, according to some embodiments;
[0052] FIG. 29 is a diagram showing a schematic cross section of variations in the width of the hole diameters, according to some embodiment;
[0053] FIG. 30 is a diagram showing additional microfeatures and/or nanofeatures on the surface of the photodiode and/or avalanche photodiode, according to some embodiments; [0054] FIG. 31 is a schematic cross section showing micro/nano-features which can be on the surface as well as on the microstructure sidewalls, according to some embodiments;
[0055] FIG. 32 shows a possible layer structure for integrating Ge/GeSi
PD/MAPD with CMOS/BiC OS electronics, according to some embodiments;
[0058] FIG. 33A is a diagram showing Ge on Si selective area epitaxial growth (SAEG) also known as selective area growth (SAG) where the Ge is crystalline and/or mostly crystalline such as polycrystaliine;
[0057] FIG. 33B is a diagram showing a simple schematic drawing of a trench- isolated GeSi P-l-N PD integrated with CMOS/BiCMOS electronics, according to some embodiments;
[0058] FIG. 34A is a diagram showing a Ge on Si microstructured PD integrated with electronics, according to some embodiments;
[0059] FIG. 34B shows a cross section schematic of a possible integration of GexS -x on Si and/or SOI integrated with a CMOS/BiCMOS structure as in FIG. 33B, according to some embodiments;
[0080] FIG. 34C is a cross section schematic showing a possible integration of a GexSii-x MPD (MAPD) with CMOS/BiCMOS integrated circuit electronics, according to some embodiments;
[0061] FIG. 35 is a diagram showing a microstructured hole PD with a GeSi alloy I layer heterojunction, according to some embodiments;
[0062] FIG. 36 shows heterojunction GexSh-x alloy microstructure (hole) avalanche photodiode structure P-l-P-l-N configuration, according to some embodiments.
[0063] FIGs. 37A-37C are diagrams showing variations in the I absorbing layer in a MPD/MAPD, according to some embodiments;
[0064] FIGs. 38A and 38B are a top view schematic diagram and an SEM micrograph of a microstructured photodiode, according to some embodiments;
[0065] FIG. 39 is a top view schematic diagram of a MPD/MAPD with irregular hole diameters and spacings, according to some embodiments;
[0066] FIG. 40A is a plot showing experimental results of a 30 micron
(micrometers) diameter Si MPD device, as shown in FIG. 39B; [0067] FIG. 40B is a plot showing experimental results of the measured QE of different hole diameters/periods and MPD diameters verses wavelength from 780 nm to 900 nm, according to some embodiments;
[0068] FIG. 41 is a plot showing the calculated QE verses wavelength for a MPD having a two-micron Si absorbing layer, according to some embodiments;
[0069] FIG. 42 is a plot showing the data rate bandwidth in Gb/s and the enhancement of the quantum efficiency in percent verses thickness of the I layer of a Si MPD (and MAPD for unity gain) with 30 microns diameter, as shown in the scanning electron micrograph of FIG. 39B;
[0070] FIG. 43 is a plot showing data rate bandwidth and QE with absorption enhancement for a 30 micron diameter Ge on Si MPD, according to some embodiments;
[0071] FIG. 44 is a plot showing data rate bandwidth and QE due to
enhancement of absorption verses I layer thicknesses for a GexSh- on Si MPD, according to some embodiments;
[0072] FIG. 45 is a plot showing data rate bandwidth and QE due to
enhancement of absorption verses I layer thicknesses for another GexSii-x on Si MPD, according to some embodiments;
[0073] FIG. 48 is a plot illustrating the effect of microstructures and bond pads on capacitance and their effect on the data rate bandwidth, according to some embodiments;
[0074] FIG. 47 is a plot showing the data rate bandwidth and QE vs. I layer thickness for a Ge on Si MAPD such as in FIG, 36 but with the I GexSh-x layer with x = 1 rather than 0.4, with a 30 micron diameter mesa;
[0075] FIG. 48 is a diagram showing a possible Si MPD P-l-N on SOI or on Si structure with different depths of microstrueture hole etch, according to some embodiments;
[0076] FIG. 49 is a diagram showing layer structures for a Get Sio.e on Si MPD P-l-N on Si or SOI, according to some embodiments;
[0077] FIG. 50 is a diagram showing a multilayered I layer according to some other embodiments; [0078] FIG. 51 is a diagram showing a P-l-N structure with a strained Geo.sSio.s I layer cladded by P Si on top and N Si on bottom, according to some
embodiments;
[0079] FIG. 52 is a diagram showing another variation of a P-l-N PD, according to some embodiments;
[0080] FIG. 53 is a diagram showing the P-i-N layer structure of a MPD on Si or SOI with multiple layers for the I region, according to some other embodiments;
[0081] FIGs. 54A and 54B shows some basic steps in epitaxial lateral over growth (ELOG) of Ge and/or GexSii-x where x can range from 0 to 1 on Si, according to some embodiments;
[0082] FIG. 55 is a cross sectional schematic diagram showing a possible method of integrating a Ge and/or GeSi alloy on Si with CMOS and/or BiCMOS electronics, according to some embodiments;
[0083] FIG. 56 is a cross section diagram showing a variation of the Si MPD of FIG. 48, with added microstructures on both top and bottom surfaces;
[0084] FIG. 57 is a diagram showing trapezoidal holes on both the top and bottom surfaces for a P-i-N structure similar to FIG. 52;
[0085] FIG. 58 is a diagram showing a structure similar to the structure in FIG. 49 where holes are etched both on the top surface and bottom surface;
[0088] FIG. 59 is a diagram showing a GeSi alloy on Si MAPD, according to some embodiments;
[0087] FIG. 60 is a plot showing depletion width in microns with different I layer doping concentration as a function of reverse bias voltage, according to some embodiments;
[0088] FIG. 61 is a diagram showing an MPD with Schottky contact metal or TCO in contact with the I layer, according to some embodiments;
[0089] FIG. 62 is a diagram showing a similar structure as FIG. 61 but includes a thin P layer, according to some embodiments;
[0090] FIG. 63 is a diagram showing a similar structure as FIG. 62 but without the TCO or metal layer on top of the P layer, according to some embodiments;
[0091] FIG. 64 is a cross section schematic diagram showing an MPD/MAPD integrated with CMOS and/or BiCMOS electronics on a single silicon chip, according to some embodiments; - 1 o -
[0092] FIG. 65 is a top view of a MPD/MAPD where reflectors are included at the perimeter of the mesa, according to some embodiments;
[0093] FIGs. 66A and 66B are a cross sections of the MPD/MAPD of FIG. 65 illustrating two different types of DBR;
[0094] FIG. 67 is a simple top view schematic of a MPD/MAPD integrated with electronics ICs CMOS and/or BiCMOS, according to some embodiments;
[0095] FIG. 68 is a top view of a simple schematic of multiple MPDs/MAPDs monoiithicaliy integrated with electronics on a single chip, according to some embodiments;
[0096] FIG. 69 is a cross section schematic diagram of microstructured holes that can be etched in a P-i-N Si/GeSi (SiGe)/ Ge MPD/MAPD, according to some embodiments;
[0097] FIG. 70 is a cross section schematic diagram of a MPD/MAPD similar to that shown in FIG. 69 except the P layer is replaced with a metal or transparent conducting oxide, according to some embodiments;
[0098] FIG. 71 is a cross section schematic diagram of a MPD/MAPD where the microstructured holes can have subterranean holes connecting adjacent vertical holes;
[0099] FIGs. 72A and 72B are cross section and top view schematics of a structure similar to that shown in FIG. 69 but with both holes and pillars in the microstructure for the enhancement of the absorption and quantum efficiency;
[00100] FIG. 73A and 73B are cross section and top view schematics of a hole with a pillar within the hole as in FIG. 72, where a filler at least partially fills the donut trench, according to some embodiments;
[00101] FIGs. 74A and 74B are cross section and top view schematics of a microstructured PD/APD with pillars as the absorption enhancing microstructure;
[00102] FIG. 75A is a plot showing a finite difference time domain simulation of an optical field propagating in a microstructured hole, according to some embodiments;
[00103] FIG. 75B is a top view of an example of random and/or aperiodically spaced holes, according to some embodiments; [00104] FIG. 76A and 76B shows cross section schematics of a microstructure emitter (ME) with a P-i-N structure on SOI substrate, according to some embodiments;
[00105] FIG. 77 is a schematic cross section of the ME monolithically integrated with CMOS/BiCMOS Integrated Circuit (IC) electronics on a single silicon chip, according to some embodiments;
[00106] FIG. 78 is a schematic top view of a ME monolithically integrated with
CMOS/BiCMOS electronic ICs, according to some embodiments;
[00107] FIGs. 79A and 79B are schematic cross section views of two possible microstructured photodiodes, according to some embodiments;
[00108] FIG. 80 is a cross section schematic diagram showing integration of the structure shown in FIG. 79B with a Si integrated circuit (IC) or application specific electronics (ASIC) using CMOS and/or BiCMOS processes;
[00109] FIG. 81 is a cross section schematic diagram showing a large area MPD, according to some embodiments;
[00110] FIG. 82 is a schematic top view diagram of aperiodic/random
microstructured holes arranged in a ceil and the cell is stepped periodically, according to some embodiments;
[00111] FIGs. 83, 84, 85 are top views of rectangular holes arranged in different orientations, according some embodiments;
[00112] FIG. 86 is a plot showing a finite difference time domain simulations of the optical field in some example microstructured hole arrangements; and
[00113] FIG. 87 shows the integration and/or monolithic integration on a single silicon chip of different types of components, according to some embodiments.
DETAILED DESCRIPTION
[00114] A detailed description of examples of preferred embodiments is provided below. While several embodiments are described, it should be understood that the new subject matter described in this patent specification is not limited to any one embodiment or combination of embodiments described herein, but instead encompasses numerous alternatives, modifications, and equivalents, in addition, while numerous specific details are set forth in the following description in order to provide a thorough understanding, some embodiments can be practiced without some or all of these details. Moreover, for the purpose of clarity, certain technical material that is known in the related art has not been described in detail in order to avoid unnecessarily obscuring the new subject matter described herein. It should be clear that individual features of one or several of the specific embodiments described herein can be used in combination with features or other described embodiments. Further, like reference numbers and designations in the various drawings indicate like elements.
[00115] Microstructured photodiode and microstructured avalanche photodiode can enhance the absorption of incident signal photons and can result in a larger quantum efficiency over a similar structure without microstructures for
enhancement of the absorption over a given wavelength range. Enhancement of the absorption can also be viewed as an enhancement in the absorption length. Light can interact in with absorbing iayer(s) for a longer length of time, which if velocity is constant can equivalentiy be longer length. The optical modes excited in a microstructured photodiode/avalanche photodiode can propagate in a direction different from the incident photon direction impinging in the microstructured photodiode/avalanche photodiode (MPD/MAPD), which can include a
predominantly lateral direction in the plane of the epitaxial layers. The optical modes can be any arithmetic combination of vertical and lateral modes, which are complex coupled modes of many resonators that may be similar and/or different. In addition, slow waves can be generated by the microstructures that further enhance absorption and therefore quantum efficiency, which is proportional to absorption in the case of photodiodes. The ratio of quantum efficiency to absorption can range from 1 to 0.5 or smaller for example. For a heterostructure photodiode, for example a P-l-N structure where the P and N are silicon and the I can be GeSi alloy, at longer wavelengths, for example 950 nm or longer, the P and N will absorb less and most of the absorption will occur in the I GeSi layer. This can result in a quantum efficiency to absorption ratio closer to 1 , for example 0.8-0.99 and in some case 0.6-0.9. In the case of avalanche photodiode where there is gain, quantum efficiency can often be greater than 100%. For example, with an absorption of 60% and a ratio of quantum efficiency to absorption ratio of 70% (in the case of unity gain) the quantum efficiency is 42% and with a gain of 2 (3dB) the quantum efficiency can be 84% and with a gain of 4 (6dB) the quantum efficiency can be 164%.
[00116] FIG. 1 is a diagram showing a structure for reflecting the lateral or transverse optical modes in a microstructured photodiode ( PD), according to some embodiments. On a Si substrate 102, that can optionally include a buried oxide (BOX) layer, a micro structure hole array if formed that includes holes 112 formed in array region 1 10. The ring-shaped ohmic metal 120 contact the P region in the case of a PIN structure. Several Bragg Si-air reflectors 130 are formed for reflecting lateral optical waves. In some cases, the transverse optical modes can include be Bloch modes in the microstructured hole and/or pillar array. Note that the holes 112 can include other microstructures such as pillars and/or other forms and/or shapes. For simplicity, holes are mentioned to describe a microstructure for enhancement of the absorption of the incident photons. There can be lateral propagation and/or stationary optical modes associated with the complex coupled modes due to the microstructured hole array(s). These lateral modes can propagate in a direction predominately in the plane of the substrate. Modes propagating perpendicular to the plane of the substrate may also exist and a combination of lateral and vertical modes can exist. Bragg reflectors 130 can be alternating layers of Si and air. The reflectors 130 can be etched into the Si to a depth approximately the same as the holes 112, or they can be deeper or shallower. The Si-air Bragg reflectors 130 reflect the optical waves back toward the microstructured hole arrays for further enhanced absorption and hence can increases the quantum efficiency of the device. Vertical modes can reflect from the index differences of the microstructured regions and the non microstructured regions and/or from different material such as from Ge to Si and/or from from Si to buried silicon dioxide layer. The reflected modes can further interact with the microstructures for enhancement of absorption.
[00117] Ring 120 is formed of an ohmic metal such a P ohmic for a P-l-N photodiode structure for example is shown. According to other embodiments, an N ohmic metal can either be on the top surface where a via and/or mesa can be etched to contact the N layer for example. Note that the P and N can be interchanged. [00118] The Bragg reflector of the Si-air interface can be designed to center at the wavelength of application, for example 850 nm and can reflect light with wavelength ranges from 820 to 880 nm for example. If the material is Ge/GeSi on Si MPD/MAPD (microstructured APD), the center wavelength can be 1300 nm and span from 1250 nm to 350 nm for example. As is well known, the Bragg reflector center wavelengths and wavelength span can be adjusted by the Si/Air thickness/spacing distances and if the material is not air, the index differences of the alternating layer determines the wavelength span.
[00119] In FIG. 1 , light impinges mostly at the array region 1 10 of the MPD/APD 110 into the holes 112 and can be off normal to the plane of the epitaxial layers by 0-50 degrees. In any fiber or lens, impinging light will have a numerical aperture and if the light is off the focal point, light rays of different angles will impinge on the MPS/APD surface. In addition, the impinging light axis can be off normal resulting in greater angular variations of the light impinging on the surface of the MPD/APD device. Different angle of light ray can excite different optical modes of the
MPD/APD that can result in a complex set of optical modes in the MPD/APD which can collectively contribute to enhancement of the absorption that can result in a higher quantum efficiency over a similar structure without microstructures over a given wavelength(s).
[00120] FIG. 2 is the diagram of FIG. 1 showing example lateral or transverse reflection modes in the microstructured photodiode, according to some
embodiments. The dotted double-headed arrows represent a very simplistic ray view of possible lateral or transverse modes that can be predominately in the plane of the substrate and are reflected by the Bragg Si-air reflectors 130. Vertical modes can be reflected by refractive index difference of different regions such as microstructured and non-microstructured regions that may have different effective refractive index due to holes for example, and Si to buried silicon dioxide layers and Ge and/or GeSi and Si regions for example. The Bragg reflectors 130 can be combination of materials having different optical refractive indices that are quarter wavelength or odd integer multiples of quarter wavelength approximate widths. The greater the difference in refractive index, the wider the reflective wavelength span. Reflecting the lateral optical mode back toward the microstructured hole array can further increase the enhanced absorption and thereby increase the quantum efficiency of the microstructured photonic device. The device can be a
photodiode, avaianched photodiode or an optical emitter. Only the top view of the microstructured holes and concentric Bragg reflectors are shown in FIGs. 1 and 2 for simplicity and the entire photodiode/avalanche photodiode and/or any integration with electronics is not shown in these figures but is shown in other figures discussed below.
[00121] FIG. 3 is a schematic diagram showing microstructured holes etched at a slant, according to some embodiments. Holes 312 are shown formed at greater than 1 degree off normal, in some embodiments, holes 312 are 5 degrees or more off normal, incident photons impinge normally and/or almost normal to the surface 300. A benefit of slanted microstructured holes is to reduce reflection to less than 5% and in some embodiments to less than 1 % with or without additional antireflection coatings and/or microstructures such as black silicon for example. In prior photodiodes, both antireflection and/or tilting the photodiode off normal are employed. However tilting photodiodes increase the complexity of packaging and alignment of the optics and electronics. By slanting the microstructured holes the microstructured photodiode, avalanche photodiode and its electronics (such as transimpedance amplifiers and other signal processors and communication electronics that can be monoiithically integrated with the MPD/MAPD as a single chip), can be packaged flat. Such packaging makes assembly easier and reduces the cost of manufacturing. FIG. 3 shows only the holes and/or hole and not the entire MPD/MAPD structure for simplicity. In certain cases, the holes can slant at different angles, for example certain holes and or group of holes can slant at one angle and other holes and or group of holes can slant at a different angle. This can apply for Si, GeSi, Ge on Si microstructured photodiode (MPD) and
microstructured avalanche photodiodes (MAPD) with their associated wavelengths.
[00122] The entire photodiode for example can consist of a PI structure with P and N ohmic contacts, bond metallization, passivation, bridging dielectrics for bond pads, that can be either on SOI (silicon on insulator wafer) or bulk p or n wafers with or without electronics for signal processing on a single chip. In addition, multiple MPD/MAPD such as an array can be formed with or without one or more electronic integrated circuits for example. Other details of the MPD/MAPD such as mesas, vias, and many other elements for a functional PD/MAPD are not shown for simplicity.
[00123] Black silicon can be fabricated on the surface of the MPD/MAPD and/or partially in the holes to further reduce reflection. See e.g., Nanostructured black silicon and the optical reflectance of graded-density surfaces, Branz et a!,,
APPLIED PHYSICS LETTERS 94, 231121 (2009) (incorporated by reference herein). In many optical data communication applications, the reflection from the MPD/MAPD can be reduced by -20dB or to approximately 1 % or less back into the optical fiber that carried the optical signal to the MPD/MAPD for conversion from optical to electrical signal. In some applications the reflection can be less than 5% for example.
[00124] Hole diameters can range from 300 nm to 5000 nm and in some cases, 300 nm to 3000 nm and spacing can range from 100 nm to 3000 nm for a periodic and/or non periodic (aperiodic) arrangement of holes. Wavelength can range from 800 nm to 000 nm for Si and 800 nm to 1350 nm for GexSh-x alloy with x <= (iess than or equal to) 0.4 and 1250 nm to 1750 nm for a Ge absorbing I layer(s) in a P-i- N or N-l-P MPD structure.
[00125] FIG. 4 is a plot showing a simulation of reflection of microstructured holes having a slant, according to some embodiments. The simulation used a FDTD (finite difference time domain of Maxwell equations) for a microstructured hole array that can be used with MPD/MAPD, with a hole diameter of 1300 nm and period of 2000 nm in a hexagonal lattice. The holes are etched at angles of 0, 5 and 15 degrees off normal to a depth of 2000 nm in Si on a silicon substrate. As can be seen from the simulation, 15 degree off normal gave a generally lower reflection that 0 degrees for example. At approximately 870 nm wavelength, the reflection at 15 degree slated holes can have a reflection of iess than 2% and with black silicon, it can be further reduced to 1 % or less. Low reflection is important in transceiver design, in some transceiver design at 850 nm and 10 Gb/s iess than or equal to -12 dB reflection is preferred and in some cases less than or equal to - 20dB is desirable. Angles can range from 2 to 45 degrees from normal for example.
[00126] FIG. 5 is a plot showing FDTD simulated reflection of microstructured holes with dimensions used in FIG. 4 with holes at 15 degrees. Holes at a slant off normal can have an oval shape at the surface and may not be a circle. Reflection can be as low as 2% or less or approximately -16 dB at 845 nm wavelength for example where the incident radiation is approximately normal to the surface of the PD/MAPD, With addition of Black Silicon, where nano features are etched on the surface and partially in the holes, the reflection can be further reduced to 1 % or less at a signal wavelength that can range from 800 nm to 1000 nm. The Black Silicon can also be deposited on the surface of the MPD/MAPD, and in some cases epitaxiaily grown, and in some cases amorphous Si and/or other semiconductor and/or carbon like material and/or dielectrics and/or metallic material, can be deposited and can in some cases be followed by a dry etch to further enhance and/or fabricate the nanostructures that can reduce reflection.
[00127] Similar microstructures and nanostructures to reduce reflection can be implemented on Ge on Si MPD/MAPD, Si/Ge/Si, SiGeSi/Si and Ge/GeSi on Si MPD and MAPD. The wavelengths can span from 800 nm to 1750 nm and in some cases 850 nm to 950 nm and in some cases 1250 nm to 1350 nm and in some cases 1350 nm to 1750 nm. Hole diameters can range from 300 nm to 5000 nm and spacing from 100 nm to 5000 nm where spacing is the distance between the nearest adjacent microstructures. The reflections can be less than 5% and in some cases less than 3% and in some cases less than 2% and in some cases less than 1 % at signal wavelengths that can range from 800 nm to 1750 nm.
[00128] FIG. 6 is a plot showing an FDTD simulation of enhanced absorption characteristics of the structures described in FIGs. 3 and 4. The enhanced absorption characteristics of the microstructured hole arrays can be seen for various angles off normal from 800 nm to 900 nm signal wavelength for MPD and MAPD devices. Curves 610, 612, and 614 show absorption characteristics for holes having slant angles of 0 degrees, 5 degrees and 15 degrees, respectively. At 15 degrees off normal, the absorption is better than 90% at 840 to 860 nm incident wavelength. The high absorption can result in quantum efficiency of >= 40% and in some cases >= 50% and in some cases >=60% and in some cases >=70% and in some cases >=80% and in some cases >=90% at certain wavelengths. The wavelengths range from 800 nm to 900 nm for a P-l-N or N-l-P MPD and P-i(absorption)-P-l(muitiplication)-N MAPD where absorption and generation of photocarriers such as electrons and holes (e-h) in the high electric field I layer (in a reverse bias applied externally) contribute the bulk of the quantum efficiency in a high data rate bandwidth PD with data rate bandwidths of >= 1 Gb/s, and in some cases >= 5 Gb/s and in some cases >= 10 Gb/s and in some cases >= 25 Gb/s and in some cases >= 40 Gb/s and in some cases >= 50 Gb/s. Similarly, the microstructure can be designed for wavelength ranges from 800 nm to 1000 nm. In addition, with hole diameter and period ranging from 300 nm to 5000 nm and 500 nm to 15000 nm respectively, Ge on Si and GeSi on Si
PD/MAPD can also have low reflection and high absorption in certain
wavelengths in the ranges 800 nm to 1750 nm and in some cases 850 nm to 950 nm and in some cases 1250 nm to 1350 nm and in some cases 1350 nm to 1750 nm with reflection <= 5% and in some cases <=3% and in some cases <=2% and in some cases <=1 % and with quantum efficiencies >=3Q%, and in some cases >=40% and in some case >=50% and in some cases >=60% and in some cases >=70% and in some cases >= 80%. Data rate bandwidths can be >= 1 Gb/s, and in some cases >= 5 Gb/s and in some cases >= 10 Gb/s and in some cases >= 25 Gb/s and in some cases >= 40 Gb/s and in some cases >= 50 Gb/s. In the case of Ge on Si, Si/Ge on Si, Si/GeSi on Si, GeSi on Si, Ge/GeSi/Si (single and/or muiti layers such as quantum wells and/or superiattices) on Si (and/or SOI, silicon on insulator) MAPD, the gain can be >~2 and in some cases >=5 and in some cases >=10 at a reverse bias voltage of -10 to-50 volts for example.
[00129] In the examples described, the MPD/MAPD can be on Si substrate and/or SOI substrate and can have multiple SOI layers in some cases. The microstructures can also be pillars, microcavities, micro-protrusions and any combinations thereof.
[00130] FIGs. 7A and 7B are a diagram and table for funnel shaped holes, according to some embodiments. The funnel shaped holes are etched through the Y layer 708 of 2 micrometers thickness of the P-l-N microstructured photodiode in Si. The I layer 708 can range from 0.5 to 3.5 microns. The P layer 710 is 0.3 microns thick (and can range from 0.1 to 1 microns thick), the N layer 708 is 1 micron thick (and can range from 0.1 to 2 microns or more thick), and the N Si substrate 702 can also be a SOI substrate. The described structure is also applicable to a Si P-l-P-l-N MAPD and in addition to Si MPD/MAPD other material systems such as Ge, GeSi, Ge/GeSi/Si on Si and/or SOI with holes and periods and/or spacing for specific wavelength ranges. The angle of the sidewall of the hole with respect to the horizontal surface vary from 85.8 to 80 degrees where 90 degrees is a vertical sidewall and in some cases the angle can vary from 50 to 90 degrees and in some cases 45 to 90 degrees and in some cases 45 to greater than 90 degrees in which case the slope is opposite sign form slope < 90 degrees. Examples of the surface hole diameter are given in the table and varies from 1300 nm to 1900 nm and the period of 2000 nm of a hexagonal lattice that were used in FDTD simulations. Hole diameters and periods can range from 300 to 8000 nm and 400 nm to 16000 nm respectively and the funnel can be trapezoidal and/or a V shape or cone shaped where the sidewails come to an approximate point. In some cases, the sidewall can have multiple angles and in some cases a curved sidewall. For example, the sidewall can have a "smoothly" varying slope with "infinite" angles tangent to the curve, in cases where the microstructures are non periodic, the spacing between adjacent microstructure can range from 0 nm to 10000 nm and in some cases 500 nm to 3000 nm. In some cases, for non-circular microstructures, at least one lateral dimension of the microstructure can range from 100 nm to 5000 nm.
[00131] The angles used for simulations are given in the table of FIG. 7B and are 65.6, 75 and 80 degrees from horizontal. In general, angles can vary from 45 to 90 degrees from horizontal or more for example and in some cases, less than 45 degrees. In addition, the sidewails can have multiple angles for example starting with a smaller angle 65 degrees and transition to a steeper angle of 75 degrees from horizontal. Other ranges are also possible from 30 to 90 degrees and with multiple variations in sidewall angles, in addition, in some cases the angle can be greater than 90 degree, for example from a funnel to a flair, or the slope can change in sign from negative to positive or positive to negative, if the funnel is defined as a positive slope than the flair would be a negative slope. The hole can have multiple slopes and can have multiple positive to negative slopes. Some embodiments can have an angle of 55 +/- 3 degrees, 65 +/- 3 degrees, 70 +/- degrees, 75 +/- 3 degrees, 80 +/- 3 degrees and 85+/- 3 degrees for example. The hole can also have angles greater than 90 degrees. In addition, different faces of the sidewails can have different slopes, at crystailographic planes or non crystallographic planes depending on the etching process that can be isotropic and/or anisotropic process. The same discussion also applies to pillars and other microstructure shapes such as cavities, protrusions. Similarly, this can apply to Ge on Si, GeSi on Si, Si/Ge on Si, Si/GeSi on Si with associated wavelengths.
[00132] FIGs. 8A and 8B are plots showing FDTD simulations of
electromagnetic field impinging on the micro structured holes with a funnel shape as shown in FIGs. 7A and 7B. FIG. 8A shows absorption as a function of wavelength from 800 to 900 nm. The curve is for a microstructured P-l-N PD as shown in FIGs. 7A and 7B, with an T layer of 2 micrometers and the holes etched to 2-2.2 micrometers depth with a funnel or cone shape where the diameter at the surface is 1900 nm and a period of 2000 nm with a hexagonal lattice. The angle of the sidewall for FIG. 8A is 85.8 or approximately 66 degrees with respect to the horizontal surface. From 820 to 860 nm approximately the absorption is 80% or greater. FIG. 8B shows the results for the same hole diameter and period,
1900/2000, but with different angle of the sidewall with respect to the horizontal surface, of approximately 75 degrees. This structure shows less absorption for wavelengths greater than 870 nm and also larger fluctuation of the absorption characteristics as compared to the 66 degree case. The etched depth of the 75 degree funnel is approximately 2.3 microns. The funnel/cone at 88 degrees and in certain cases 55 degrees and angles between 45 and 70 degrees from horizontal can result in a broader absorption characteristic as a function of wavelength and also the variation in the absorption verses wavelength can be less than
approximately 20% and in some cases less than 10%.
[00133] The quantum efficiency (QE) can be >= 30% and in some cases >= 40% and in some cases >:=50% and in some cases >=60% and in some cases >=70%. The quantum efficiency of a microstructured PD/APD is higher than a similar structure without microstructure at certain wavelengths in the range 800 nm to 1000 nm for Si MPD/MAPD. Some photocarriers are lost in the P and N layers of the MPD/MAPD due to recombination; the bulk of the QE comes from photocarriers generated in the I region where there is a high electric field due to a applied reverse bias to the P anode and N cathode.
[00134] Equivalent funnel microstructures also apply to other material systems such as Ge on Si or SOI, GeSi on Si or SOI, Ge/GeSi on Si or SQI and Ge/GeSi/Si on Si or SOI with hole diameter ranging from 300 nm to 4500 nm and periods ranging from 500 nm to 10000 nm. For the P layer, the surface-most layer, thickness can range from 0.1 to 1 micron (in cases where the P layer is mostly transparent to the incident wavelength, for example has a larger bandgap than the absorbing I layer, the layer can be thicker, 0.1 to 3 microns). The I absorbing layer can have thicknesses ranging from 0.5 to 3.5 microns. The N layer can have thicknesses ranging from 0.1 to 1 microns and in the case where the N layer has a larger bandgap than the I absorbing layer, the layer can be thicker, and can range from 0.1 to 5 microns. The P-i-N can be epitaxially grown on N Si substrate or N Si SOI substrate.
[00135] APDs for the Si on Si or Ge and/or GeSi and/or Si on Si or SOI can have the same P-l layers as the MPD, with the addition of a P(charge)- i(multipiication)-N layer where P(charge) can have thickness range of 0.05 to 0.2 microns, l(muitiplication) can have thickness range of 0.1 to 2 microns and N (cathode) can have thickness range of 0.1 to 5 microns. P anode and N cathode doping can be >= 5x1018/cm3 and the P charge layer can be doped >= 1x1017/cm3 and the i absorbing and multiplication layers can be unintentionally doped and/or intrinsic with background doping of <= 5x1018/cm3 for both MPD and APD, Si on Si, Ge on Si, GeSi on Si and Ge/GeSi/Si on Si devices.
[00136] FIGs. 9A-9D are a table and schematic diagrams of P-I-N
microstructured PDs/APDs of Si, SOI and Ge on Si microstructured PD (APD) with funnel shaped holes, according to some embodiments. The table of FIG. 9A gives a sample range of hole diameters at the surface and periods in nm ranging from 1900 nm to 4200 nm in diameter and 2000 nm to 4400 nm in period and sidewall angles with respect to the horizontal surface from 55 to 70 degrees. Although the table specifies a horizontal lattice pattern, other lattice patterns can be used.
Further, a single line or group of holes can have a certain period that is different from the next line or group of holes. Also, the holes could have aperiodic spacing.
[00137] Other diameters and periods are not shown; diameter of the holes can range from 600 nm to 2500 nm in some cases and in some cases can range from 800 nm to 5000 nm, the period can range from 800 nm to 10000 nm and in some cases can range from 800 nm to 5000 nm. The sidewall angle can range from 40 to 90 and/or greater, and can have multiple angles in a single sidewall and different facets of the sidewall can have different multiple angles. The etch depth can depend on the angles of the sidewall, for example the angle can start at 50 degrees and steepen to 80 degrees, and the hole can be etched deeper than a sidewall with a single angle of 50 degrees. Once the opposite sidewalls intersect, continue etching will widen the diameter of the hole in addition to etching deeper, The depth can be determined by simple trigonometry. For example, for a hole diameter of 1900 nm and a sidewall angle of 55 degrees, the depth is
approximately 1.36 microns for the hole in a cone shape.
[00138] Shown in FIGs. 9B and 9C are 3 micron (micrometer) thick "I" layer in Si for operation at 800-900 nm for example, and in some cases 850 nm +/- 30 nm wavelength and in some cases 850 nm to 950 nm, for data rates >= 5 Gb/s, in some cases >= 10 Gb/s, in some cases >= 25 Gb/s and in some cases >= 40 Gb/s.
The MPD/MAPDs can be integrated with electronics such as transimpedance amplifiers and other signal processing, storage and transmitting electronics on Si.
The P and I layer can also be Si and/or GexSii-x alloy where x <= 0.4, in some cases <= 0.2 and in some cases <=0.6. The P layer can have a lower x than the x in the I layer in some cases. The I layer can also be multilayered, with Si and/or
GexSii-x with different or same x values for each layer.
[00139] FIG. 9D shows a Ge on Si P-i-N where the Ύ layer is Ge of 3 microns thick for operation from 1350 to 750 nm and in some cases at 1550 nm +/- 100 nm for example. The I layer can also be GexSii-x where x can range from 0 to 1 , and the i layer can be multilayered with Si and/or GexSi -x where the layers can have the same or different x values, in some cases the x <=0.4 and the P layer can have a x value that is less than the x value in the I layer for GeSi alloys to minimize absorption and generation of photocarriers in the P layer. Data rate bandwidths can be >= 1 Gb/s, in some cases >= 5 Gb/s, in some cases >= 10 Gb/s, in some cases >= 25 Gb/s, in some cases >= 40 Gb/s, in some cases >= 50 Gb/s and in some cases >= 60 Gb/s.
[00140] These microstructures also are applicable to MAPD devices with the addition of charge and multiplication layers as mentioned earlier and can have gain >=2, in some cases >= 5, in some cases >=10 and in some cases >=20.
[00141] Hole diameters can range from 600 to 6000 nm for example and the period can range from 900 to 8000 nm for example. Depending on the sidewall angle, the funnel or cone may be etched partially into the layer and/or etched pasi the T layer, in some cases the funnel or cone may be etched partially into the P layer and in some cases to the SiCfe layer in a SOI (silicon on insulator) substrate. The funnels and/or cones can also be used in microstructured avalanche photodiodes, solar cells, or image sensors. The funnel and/or cone microstructures can also be used for any photon sensors that need extended absorption verses wavelength characteristics, and/or improved sensitivity or higher quantum efficiency over a similar structure without the microstructures at certain wavelengths where the absorption coefficient is insufficient to achieve QE >= 30% given the restrictions to the physical absorption length of the device for particular applications. For example, in high data rate bandwidth optical
photodiodes/avalanche photodiodes, the transit time of the electron and/or holes in the absorbing I layer determines the data rate frequency response of the device. Saturated velocity of holes and electrons range from 5x106 cm/sec to 1x107 cm/sec approximately respectively for an applied field of 1-4x104 V/cm approximately, for example a reverse bias of -3 to -10 V on the anode and cathode across a 2-3 micron thick I layer.
[00142] Not mentioned in the microstructured photodiode/avalanche photodiode processes are passivation of the semiconductor surfaces, removal of crystalline damages due to dry etching, plasma clean, and/or exposure to any high energy particles that may cause crystalline damage that in turn can cause recombination centers for photogenerated carriers which can result in degradation in performance of the photodetector such as reduced QE. Some methods to remove the damage include wet etching to remove crystalline damages, thermal annealing, oxidation, low energy CI and/or other ion(s) etch to name a few. in addition, laser(s) can be used for selective area anneal and oxidation by applying heat via absorption in Si rapidly with short laser pulses.
[00143] Due to the relatively small hole diameters, wet etching inside the holes is difficult if the surface is hydrophobic. Surfactant and ultrasonic baths can be used to assist getting the liquid etchant inside the entire length of the holes.
Another method uses wet (steam) or dry oxidation at 700-1 100 degrees Celsius for a duration of time to grow a Si02 layer out of the Si that was damaged during dry etching, converting approximately 50 nm, in some cases 100 nm and in some cases 30 nm, of damaged Si to SiC>2 using thermal oxidation. The oxide can be - So used as passivation and/or HF or buffered HF can then be used to remove the hydrophilic Si02. A subsequent thermal oxidation and/or other passivations can be applied within the holes to reduce surface states and recombination centers that can degrade absorption and therefore quantum efficiency of the microstructured photodiode.
[00144] FIG. 10 is a plot showing FDTD simulation results of a microstructured Si PD having a structure as shown in FIG. 9B. The plot in FIG. 10 is for a PD with holes having 4200 nm diameter and 4400 nm period in a hexagonal lattice; the holes are funnel shaped and have a sidewall angle of 66 degrees. The plot shows absorption verses wavelength, from 800 to 900 nm. Other lattice structures and periodic or non periodic structures can also be used. The depth of the funnel with a 4200 nm diameter and 66 degree sidewall is approximately 3300 nm. As shown, the absorption is greater than 90% from 800 to 900 nm in wavelength. This can result in a QE of >=40%, in some cases >=50%, in some cases >=60%, in some cases >=70% and in some cases >=80% for a MPD/MAPD device of Si on Si or SOI, Ge on Si or SOI, GeSi on Si or SOI, and Ge/GeSi/Si on Si or SOI.
[00145] Other hole diameter and periods can also be used. For example, hole diameters can range from SOOnm to 5000 nm and period can range from 600 nm to 10000 nm. in addition, the holes can be etched partially in the P layer, to the I layer, partially into the I layer, through the I layer, partially into the N layer, to the oxide layer of the SOI and any combination of depths thereof.
[00148] FIGs. A and 1 B are plots showing FDTD simulation results of a microstructured Si PD (or MAPD) having a structure as shown in FIG. 9C. Holes are etched to approximately 2000 nm to 4300 nm depth from the surface depending on the hole diameter with a sidewall angle of 66 degrees.
[00147] FIG. 11 A shows the absorption verse wavelength 800-900 nm for microstructured holes with 2600 nm hole diameter and 2800 nm period in a hexagonal lattice for this simulation. Other lattice structures and periodic or non periodic structures can also be used. The simulation shows that the absorption is greater than 80% from 800 to 900 nm in wavelength.
[00148] FIG. 11 B shows results for a PD with hole diameter and period of 4200 nm and 4400 nm respectively. Angle of the sidewall is 66 degrees and etched depth is approximately 4300 nm. The absorption is better than 90% and in some cases better than 95% from 800-900 nm wavelength and with ripples of less than 0% in the absorption from 800 to 900 nm wavelength.
[00149] The enhanced absorption can result in QE >= 40% and in some cases >= 50% and in some cases >= 60% and in some cases >=70% and in some cases >= 80% for a MPD/MAPD device that can be integrated with Si electronics and/or SiGe electronics such as BiCMOS.
[00150] Angles from the horizontal of the sidewali can vary by plus minus 1-50% or more, microstructured hole depth, diameter, period can vary by plus or minus 1- 50% or more separately and/or together in any combination.
[00151] Hole (and/or pillar) diameters can range from 300 nm to 5000 nm and periods can range from 400 nm to 10000 nm. in addition, the depth of the hole (or height of the pillar) can range from 0.1 microns to 5 microns or more, the hoie(s) can be etched to the Si02 layer of the SOI for example.
[00152] FIGs. 12A and 12B are plots showing FDTD simulation results of a microstructured Ge on Si PD having a structure as shown in FIG. 9D. Holes are etched to approximately 3300 nm with a sidewali angle of 66 degrees +/- 10 degrees. FIG. 12A shows results for hole diameters and periods of 2600 nm and 2800 nm respectively in a hexagonal lattice for this simulation. Other lattice structures and periodic or non-periodic structures can also be used. The curves show absorption greater than 70% from 1400 to 1700 nm in wavelength.
[00153] FIG. 12B is an absorption verse wavelength plot of a structure having hole diameters and periods of 4200 nm and 4400 nm respectively. The angle of the sidewali is 66 degrees +/- 10 degrees and etched depth is 3300 nm. The curve in FIG. 12B is for hole diameter/period of 4200/4400 nm in hexagonal lattice and with a 66 degree sidewali having absorption better than 85% and in some cases better than 90% for most of the wavelengths from 1400-1700 nm wavelength of light impinging on the surface of the microstructured PD/APD.
[00154] Angles of the sidewali can vary by plus or minus 1-50% or more.
Similarly, the microstructured hole depth, diameter, and period can vary by plus or minus 1-50% or more separately and/or together in any combination,
[00155] Holes that have a lateral dimension greater at the surface than the hole lateral dimension beneath the surface can have higher absorption characteristics than a hole where the surface lateral dimension is approximately the same for the entire length of the etch depth. For example, a funnel hole can have greater absorption over certain wavelength ranges than a comparable cylindrical hole for certain hole diameters. The funnel can be circular or polygonal such as an inverted pyramid for example.
[00156] Hole diameter (for simplicity of discussion diameter is used and implies a circle but other hole shapes such as a square or polygon can be used and, in addition the hole can be elliptical, oval, irregular polygon, irregularly shaped and/or any combination thereof, can range from 500 to 5000 nm or greater. In certain cases, the holes have surface diameters of 800 nm to 4200 nm and have etch angles of approximately 62 to 68 degrees, in some cases the etch angles can be 40 to 90 degrees or more. Periods can range from 600 nm to 10000 nm and in some cases can be 1 100 nm to 5000 nm.
[00157] The FDTD simulations show optical waves propagating in the plane of the surface when light impinges approximately normal to the surface with the microstructured funnels/cones and/or cylinders. This lateral propagation of optical waves increases the absorption of the incident photons for the silicon absorption "I" layer for the photon wavelengths that range from 800 to 100 nm and in some cases 850 nm to 1000 nm. For germanium absorption "I" layers and/or GexSh-x alloys where x can range from 0.01 to 1 and in some cases x <=0.4, the photon wavelengths can range from 1350 to 1800 nm. in some cases, the wavelengths can range from 1250 nm to 1350 nm, 350 nm to 1750 nm, 850 nm to 950 nm, 850 nm to 1000 nm, or 800 nm to 1350 nm.
[00158] In certain cases, the hole diameters at the surface can be less than the incident light wavelength, in certain cases the hole diameters at the surface can be approximately the same as the incident photon wavelength and in certain cases the hole diameters at the surface of the microstructured photodiode/avaianche photodiode can be greater than the incident photon wavelength.
[00159] The funnel holes can be etched to a depth ranging from 0.1 to 4 microns or more and can be etched to the Si02 layer of a SOI substrate. In certain cases, the funnel holes are etched to the N Si layer,
[00160] As noted above, FIG. 12A shows FDTD simulation of absorption vs. wavelength from 1400 nm to 1700 nm for microstructured funnels with 2600 nm diameter and 2800 nm period on a hexagonal lattice. The sidewali angle is 66 degrees and etch depth is 3300 nm. Enhanced absorption is better than 70% across the wavelength range 1400-1700 nm.
[00181] Also as noted above, FIG. 12B shows FDTD simulation of absorption vs. wavelength from 1400-1700 nm for microstructured funnels with 4200 nm diameter and 4400 nm period on a hexagonal lattice. The sidewali angle is 66 degrees and etch depth is 3300 nm. Enhanced absorption is better than 80% across the wavelength range 1400-1700 nm.
[00182] The enhanced absorption can result in QE >=30%, >=40%, >=50%, >=60%, >=7Q%, >=80%, and/or >=90%. The microstructures can be applied to avalanche photodiodes with the same P and I absorbing and N cathode layers but with the addition of P change (Si) and i multiplication (Si) layers between the I absorbing and N cathode layers. Data rate bandwidth of >=1Gb/s, >=5 Gb/s, >=10 Gb/s, >=25 Gb/s, >=40 Gb/s, >= 50Gb/s and/or >= 60 Gb/s for MPD/MAPD devices. With APD, gain can be >=2, >=4, >=6, >=10, >=13, >=15, >=20 for example.
[00183] FIG. 13 is a scanning electron micrograph of an etched microstructure hole where the sidewali has multiple slopes. In certain cases, the hole sidewali can have mostly a single slope and in other cases it can have multiple slopes. The etch shown in FIG, 13 is a standard dry etch for silicon as used in the manufacturing of silicon MEMS (Micro Electrical Mechanical Systems) and CMOS processes for trenching such as BEOL (back end of line) processes for interconnects and also etching processes in CMOS processes. The dry etching can create damage to the silicon surfaces, and thermal oxide passivation, wet etching, low energy ion etching, HF passivation, oxidize and wet etch, to name a few, can be used to remove and/or reduce the damage and/or passivate the surface. Passivation of the etched Si surfaces can include thermal oxide, ALD (atomic layer deposition) oxide and dielectrics, PECVD (plasma enhanced chemical vapor deposition) of oxide and/or dielectrics, CVD (chemical vapor deposition) of oxide and/or dielectrics to name a few.
[00184] Note that other etched shapes can be used, such as a hole having negative slopes, a barrel like hole with a continuous variation of the slope, a bail shaped hole, hour glass shaped holes. [00185] FIGs. 14A- 4C are scanning electron micrographs of microsfructured holes etched with multiple sidewall angles, according to some embodiments. A combination of funnel and cylindrical holes can be used. The holes can also have other shapes such as rectangular, polygonal, amoeba, or clover leaf.
[00186] Hole and/or cavity type microstructures for MPD/MAPD devices are preferable in many cases since the surface is contiguous and electrically connected as compared to pillars or protrusions. With pillars, each pillar is an island and all the pillars need to be electrically connected which adds complexity in processing. This tends to increase the cost of manufacturing the MPD/MAPD devices.
[00187] FIGs. 15A-15D are diagrams showing for simplicity two types of microstrueture holes, according to some embodiments. FIGs. 15A and 15B show trapezoidal holes and FIGs. 15C and 15D show funnel (cone) holes. Different etch depths can affect the absorption of photons in the microstrueture holes and its surrounding in the semiconductor material where the optical field can propagate in a lateral (or predominantly parallel to the surface of the substrate) direction(s) and in addition to a vertical direction(s). Depth of the microstrueture holes can range from 0.05 microns to 5 microns or more. In some cases, holes in a microstrueture set of holes can have multiple etch depths, for example 2 or more etch depths to optimize the lateral optical field modes and waves interaction with the i absorbing layer. The set of holes can also have multiple diameters and/or periods and/or spacings in a non-periodic hole arrangement. The diameters can range from 300 nm to 5000 nm and the periods can range from 400 nm to 10000 nm. The spacings can ranging from 0 to 5000 nm. These dimensions apply to Si on Si (SOI) MPD/MAPD and Ge on Si(SOI) MPD/MAPD and GeSi on Si(SOi) MPD/MAPD and Ge/GeSi/Si on Si(SOI) MPD/MAPD.
[00188] As shown in FIGs. 15A-15D, the Si MPD is formed on Si or SOI and can have the following layer thicknesses: for a P-i-N structure on Si, the P layer thickness can range from 0.05-0.5 microns with doping of > 1x1019/cm3 and in some cases >= 1x1020/cm3; the I absorbing layer thickness can range from 0.5 to 3.5 microns with doping of <= 5x1015/cm3; and the N layer thickness can range from 0.2 to 2 microns or more with doping >= 1x1018/cm3 and in some cases >= 3x1019/cm3. For an N Si substrate and/or N SOI substrate, the N can have a thickness range of 0,01 to 0,2 microns and the SiC>2 can have a thickness ranging from 0.5 to 4 microns or more. These ranges are guidelines and for different applications the ranges can be varied to reflect that particular application.
[00169] The microstructures and layers can be applied to Ge, GeSi, Ge-GeSi, Ge-GeSi-Si on Si or SOI MPD/MAPD with the following ranges for a P-l-N structure on Si: the P (Ge and/or GexSii-x where x <=0.4) layer thickness can range from 0.05-0.5 microns with doping of > 1x1019/cm3 and in some cases >= 1x1020/cm3; the I (Ge and/or GexSii- x<=0.4, and/or multilayer of Ge and/or Si and/or GexSii-x x <1) absorbing layer thickness can range from 0.5 to 3.5 microns with doping of <= 5x10 6/cm3 and in some cases <= 1x1016/cm3 and in some cases <=
1.5x1015/cm3 and the N (Si and/or Ge Sii~x x <=0.4) layer thickness can range from 0.2 to 2 microns or more with doping >= 1x1 Q18/em3 and in some cases >=
3x1019/cm3; on N Si substrate and/or N SOI substrate where the N can have a thickness range of 0.01 to 0.2 microns and the Si02 can have a thickness ranging from 0.5 to 4 microns or more. The ranges are a guideline and for different applications the ranges can be varied to reflect that particular application, in some cases, a buffer Ge layer is grown and/or deposited prior to Ge epitaxial growth on Si. See, e.g., Epitaxially-grown Ge/Si avalanche photodiodes for 1.3 pm light detection, Kang et al., 23 June 2008 / Vol. 16, No. 13 / OPTICS EXPRESS 9366 (incorporated by reference herein and referred to as "Kang et al. 2008"); and High- performance Ge-on-Si hotodetectors, Michel et ai. NATURE PHOTONICS j VOL 4 j AUGUST 2010 j www.nature.com/naturephotonics (incorporated by reference herein and referred to as "Michel et al."). The buffer Ge layer relieves the strain on the Ge epitaxial layer due to lattice mismatch between the Ge and Si layers. The large strain can cause wafer bowing that can make semiconductor processing difficult and increase the cost of manufacturing and the strain can be non reproducible.
[00170] MPD P-l-N structures are shown, but MAPD structures can be made with the insertion of P(Si) charge layer with thickness range 0.05-0.2 microns, doping >= 1x1017/cm3 and I (Si) multiplication layer thickness range 0.3-1.0 microns with doping <= 5x1016/cm3 and in some cases <= 1x1016/cm3 and in some cases <= 1.5x1015/cm3 between the I absorbing layer and the N layer. MAPD can be implemented for Si on Si or SOI MAPD and Ge, GeSi, Ge-GeSi, Ge-GeSi-Si, Si- Ge-Si, Si-GeSi-Si on Si or SO! MAPD, The APD can have a reverse bias voltage between the P anode and the N cathode of -10 to -40 volts, and in some cases -20 to -30 voits with gain ranging from 2 to 10 or more at data rate bandwidths ranging from 1 to 50 Gb/s or more. Wavelengths for Si MPD/MAPD can range from 800 to 950 nm and in some cases 850 to 950 nm. For GexSii-x for x <=0.4 on Si
MPD/MAPD, wavelengths can range from 1250 nm to 1350 nm, 850 to 1000 nm, 850 to 950 nm, 850 to 1350 nm, and in some cases 950 to 1350 nm. For Ge on Si MPD/MAPD, the wavelengths can range from 1350 nm to 1750 nm, 1450 to 1750 nm and in some cases 1500 to 1600 nm.
[00171] The quantum efficiency is proportional to the absorption and can be 10- 80% or more of the absorption. For example, absorption can be 0.9 (90%) at 850 nm wavelength light and the quantum efficiency can be 0.7 (70%) of the absorption due to light lost to regions such as the N and P layers where photo generated carriers recombine before contributing to the photocurrent. Photocarriers generated in the I absorbing layer where there is a high electric field due to an applied external reverse bias, generate the bulk of the quantum efficiency of a P-l-N MPD/MAPD device. Responsivity (R) is photocurrent amp/optical power watt and quantum efficiency (QE) can be derived from responsivity as QE=hfR/q where h is Plank's constant, f the optical frequency and q the electronic charge. Or, QE is approximately R (1.234)/wavelength(um).
[00172] The holes can be etched partially into the I layer and/or through the I layer, as shown in FIGs. 15A and 15C, and/or past the I layer and into the N layer as shown in FIGs, 15B and 15D. The hole can also be etched into the substrate and/or SiO2 layer. Often in the case of the funnel hole, the etch depth is also limited by the diameter of the hole and the angle of the sidewail. In certain cases, funnel shaped holes provide broader and more uniform absorption characteristics with less than 10-20% variations in absorption and/or QE than cylindrical holes over a wavelength span of 50 nm or more.
[00173] FIG. 16 is a diagram showing a possible layer structure for monolithic integration of the silicon microstructured photodiode with CMOS and/or BiCMOS electronics, according to some embodiments. The electronics can include transimpedance amplifiers and other signal processing/conditioning, transmitting- receiving/communication, storage, restoration, computation electronics. In this pariicular example, two buried SiC>2 layers are shown. The photodiode PIN is between the two oxide layers and the CMOS/BiC OS layer is the top layer. Other structures including microstructured avalanche photodiodes and/or Ge, GeSi on Si MPD/MAPD can also be included.
[00174] In some cases, a single oxide layer, no oxide layer or multiple oxide layers can be used. Ion implantation of species such as oxygen for example can be used for isolation. PN junctions can also be used for isolation electrically. Vias can also be etched such that light can enter from the substrate (bottom) side rather than from the top side, in addition, it can include multiple photodiodes each with same and/or different microstructured hole patterns, dimensions, periods, and/or aperiodic and/or pseudo-random in arrangements.
[00175] An array of MPDs such as four 25 Gb/s PDs integrated with respective electronics can form a single chip 4x25 Gb/s device serving asr an aggregated data rata bandwidth of 100 Gb/s optical receiver for optical data communication. The 4 channels can be separate muitimode fibers and/or single fiber used with CWDM (coarse wavelength division multiplexing). Using a single integrated chip significantly reduces the cost of packaging and lowers the cost per Gb/s.
[00176] FIG. 17 is cross sectional view showing basic elements of one possible method of integrating a microstructured photodiode with electronics using an epitaxial layer structure as shown in FIG. 18. Note that the microstructured photodiode can also be a microstructured avalanche photodiode with additional layers for charge and multiplication. The electronics can be first fabricated in the CMOS/BiCMOS layers on the surface, followed by a back end of line (BEOL) process of fabricating the microstructured photodiode by removing the first layer of Si02 exposing the PIN structure where the microstructure holes are dry etched and an isolation mesa/trench also dry etched to the N layer for example. The trench includes sidewail oxide 1734. At the bottom of the trench is the cathode 1730. Metal conductors 1740 and 1742 connect the cathode 1730 and anode 1732, respectively, with the fransimpedance amplifier (TIA) 1780. The passivation of the holes and mesa is not shown. The mesa sidewail can also include a dielectric and/or dielectric and metal reflector to reflect light that may be scattered and/or propagate to the mesa/trench edge back toward the microstructure for increasing the enhanced absorption and thereby the quantum efficiency which is proportional to the absorption with a multiplication factor ranging from 0.2 to 0.9 or more.
BEOL (back end of line) process can also include the interconnection of metal electrodes from the N and P layer of the photodiode to the CMOS electronic circuits as shown.
[00177] FIG. 18 is a diagram illustrating an inductor integrated into an electronic circuit as part of a transmission line from the microstructured photodetector (PD/APD) to the electronics, according to some embodiments. The addition of the inductor 1800 in series with the transmission line of a few nano Henrys, 0.1-10 nH, for example, can cause a peaking of the high frequency (GHz) response of the microstructured photodetector that can result in a higher 3dB bandwidth of the photodetector data rate response. The peaking in frequency domain is equivalent to a ringing in the time domain caused by the exchange of energy between the diode capacitance and the inductance with the resistance acting as a damper, integrated inductors are well known in the field of microwave circuits. According to some embodiments, components such as transistors, capacitors and resistors can be integrated in the electronic circuit as part of the transmission line from the photodetector (PD/APD) to the electronics.
[00178] FIG. 19 is a basic flow diagram illustrating some aspects for integrating the microstructured photodiode or avalanche photodiode with C OS/BiCMOS electronics, according to some embodiments. Note that for clarity, many processing steps are not shown, in this example, the microstructured photodiode, or avalanche photodiode is integrated with CMOS/BiCMOS electronics using back end of line processing methods to connect the photodetector with the electronics and for interconnects within the electronics. In block 1910, processes for forming the CMOS/Bi-CMOS and TIA are carried out. in block 1912 the CMOS/Si02 layer over the PIN region is etched away. In block 1914, the microstructure hole pattern is etched and passivated. In block 1918 the surrounding trench is etched, in block 1918 the sidewail oxide process(es) are carried out in the trench. In block 1920, the N ohmic and electrode to the TIA is formed. Note that forming the bridging dielectric/polyimide is omitted for simplicity, in block 1922 the P ohmic and electrode to the TIA is formed. In block 1924, anti reflective coating(s) are formed, if needed. In block 1928, a backside via is formed for back side illumination, if needed. Note that there are many other methods of integration for example using ion implantation for electrical isolation, pn junctions can also be used for isolation and other methods such as mesoepitaxy. In addition, other material may be epitaxiaily grown such as Ge for other wavelengths of light such as 1300-1700 nm for example and other methods such as self-assembly, lift-off epitaxy and wafer bonding are other examples,
[00179] FIGs. 20A and 20B are diagrams showing complementary designs for microstructured holes and microstructured pillars, according to some embodiments. Using FDTD simulation methods it has been found that both types of
microstructures can show 60% +/- 30% absorption over 0.8-1 μηι wavelength range for hole/pillar diameter ranging from 200 to 4500 nm with periods of 300 to 9000 nm and with sidewalis angle(s) of 50 to 90 degrees or more. Hole depth and pillar heights are a function of the sidewali angle and starting hole/pillar diameter and period. Etch depth can range from 0.05 to 5 microns. Lattice can be square and/or hexagonal and/or other distributions than may have uniform and/or non- uniform hole/pillar spacing. Diameter and shape of hole and pillar can also vary for a given MPD/MAPD device which can be microstructured PD/APD Si on Si/SOI or microstructured PD/APD Ge,GeSi,Si on Si/SOI.
[00180] FIG. 21A is a table showing several different examples of hole diameters and periods in nm in hexagonal and square lattices, according to some embodiments. The examples are for incident light of 850 nm wavelength, at which the bulk material absorption is weak, 535 cm-1 in the case of Si. The I layer thickness is approximately 2 urn for > 10 Gb/s data rate application in optical data communication systems. Without any microstructures, the absorption is
approximately 0% at 850 nm for I layer of 2 urn thickness, with microstructures the enhanced absorption can be 30-90% or greater at 850 nm with 2 urn I layer thickness, if the enhancement of absorption is 90%, this is equivalent to an effective absorption length of 43 um (mircometers) or an effective enhanced absorption of 1500/cm or approximately 20X higher absorption over a structure without microstructures. This can also translate to a Q of approximately 10 (can be defined as the number of round trips over a 2 um distance) for the microstructured photodiode (or APD) as compared to a resonant cavity enhanced (RCE) photodiode or APD the loaded Q is >1000 to 10000. A low Q such as in the case of the microstructured photodiode gives a broader and smoother response over a wider wavelength range than RCE photodiodes that are not believed to be practical and are not known to have been commercialized. In addition to a mostly vertical optical wave propagation, the optical wave in the complex coupled microstructures resonators can also have a lateral optical mode and/or wave propagation which can be mostly orthogonal to the vertical direction. This lateral mode/wave propagation can also significantly enhance the absorption by the interaction of the optical wave with the absorbing region. The quantum efficiency of the MPD/MAPD derive mostly from the photocarriers generated in the high electric field region I layer where the electrons and holes are swept to the cathode and anode respectively. Photocarriers generated outside the high field I region such as the P and N region are recombined and/or diffuse to the I region to contribute to the QE, however these slow diffused electrons and holes are not desirable in a high data rate bandwidth MPD/MAPD since they can degrade the frequency data rate response of the MPD/MAPD. The hole/lattice parameters apply to Si, GeSi, Ge on Si MPD/MAPD with associated wavelengths.
[00181] The QE is proportional to the absorption, the enhanced absorption due to microstructures will also enhance the QE, and since not all absorbed
photocarriers are collected, the QE is typically smaller than the absorption and can range from 0.3 to 0.95 times the absorption.
[00182] To maximize the absorption of photons in the I (absorbing) layer, the P and N layers are kept thin, less than 1 micron for example and in some cases less than 0.5 microns and in some cases less or equal to 0.3 microns. Also in some cases such as GexS -x absorbing I layer, the P and N can have a x value that is less than the x in the absorbing I layer, in some cases one of the layer can be Si and the other layer GexSii-x with x less than the I absorbing GexSh-x layer for Ge/GeSi/Si on Si, Si/Ge/Si on Si, Si/GeSi/Si on Si or SQI MPD/MAPD devices which can also be integrated with electronics on a single Si chip that can include arrays of MPD/MAPD.
[00183] FIGs. 2 B and 21C are diagrams showing two structures of a P-l-N photodiode, according to some embodiments. FIG. 21 B shows a structure without SOI while FIG. 21 C shows a structure with SOI. Note that the thicknesses are shown for simulation purposes and can have a range of 0.1-1.0 urn (micrometers) for the P and N layers, 0.3 to 5 um (morcometers) for the l-iayer. [00184] FIG. 22A is a table showing several different examples of hole diameter/periods in nm for square and hexagonal lattices for enhancing absorption in Ge,GeSi,Si homo and or hetero-junctions on Si or SOI PD/IVIAPD, according to some embodiments. The bulk material absorption is weak; for example, at 1550 nm wavelength, germanium absorption coefficient is 459 cm-1 for a 2 um layer of I Ge for high bandwidth of > 10Gb/s applications. Without microstructured holes for enhanced absorption, the material has approximately 9% absorption for Ge on Si layer that is not strained to the point where the bandgap of Ge narrows by greater than 0.006-0,01 eV. With microstructured holes/pillars the absorption at 550 nm can be enhanced to > 30%. In some cases the absorption at 1550 nm can be enhanced to greater than 50%, 70%, 80% and even greater than 90%. The quantum efficiency can be a fraction of the absorption with the fraction ranging from 0.2 to 0.95 or more, if the enhanced absorption is 80% the quantum efficiency can be 60% or approximately 0.8 of the absorption. The reduced quantum efficiency can be due to light that is absorbed in the P Ge layer and the photocarriers recombine and not contribute significantly to the QE for example.
[00185] FIG. 22B is a diagram showing an example of a Ge on Si photodiode where the P Ge can have a thickness range from 0.1-0.5 um (microns) and the I Ge layer can have a thickness range of 0.5-5 um. The N Si layer can have a thickness range of 0.1-200 um and/or the substrate can be N Si. in addition, the N Si can be on SOI where a buried oxide layer is used. At wavelengths of 1550 nm, Si is mostly transparent with minimal optical losses. The P and I layer can also be GexSii-x where x<1 and in some cases x<= 0,6 and in some cases x<=0,4, the P GexSh -x layer can have a x that is smaller than the x in the GexSii-x 1 layer. The I layer can be multilayers with layers of GexS -x with x <=1 and/or x=0 and can range in thicknesses from 0 nm to 500 nm or in some cases 10 nm to 1000 nm. The multilayers of the I layer can have a total thickness ranging from 0.3 microns to 3.5 microns for data rate greater than 25 Gb/s. For 10 Gb/s the I layer can be thicker, to 5 microns or more for example. For 50 Gb/s the I layer thickness is approximately 1.8 microns or less,
[00186] FIGs. 23A and 23B are plots showing result of a simulation of the Si on SOI PD shown in FIG. 21 C for the indicated hole diameter/periods of square or hexagonal arrays of holes. The microstructured holes are cylindrical for simplicity and etched to the S102 layer. The absorption in the I layer or quantum efficiency is shown on the vertical axis and the wavelength in nm is shown on the horizontal axis from 820 nm to 880 nm. Only photons absorption in the 1 layer which is 2 urn thick is shown which also corresponds to QE. Photons lost in the P and N layers or reflected or transmitted are not counted in the absorption in the I layer. The simulation may be underestimating as the absorbed photons since lateral modes (such as Bloch modes for example) and/or light propagating and/or stationary (such as Eigen modes for example) that reflect form the mesa edge are not included. Lateral reflected modes may add significantly to the quantum efficiency of the photodiode. Quantum efficiency of 80% at 840 nm for holes with diameters of 800 nm and a period of 900 nm in a hexagonal lattice is simulated by FDTD methods giving an enhanced absorption coefficient of 8000 cm-1 compared to a bulk absorption coefficient for Si at 840 nm of 591 cm-1 or an effective absorption length of 27 urn or equivalent^ a Q of approximately 7 or the photons can equivalently make 7 round trips in the vertical direction before dissipating away. Q can also be defined as λ/Δλ where λ is the peak wavelength and Δλ is the linewidth where the amplitude (absorption or quantum efficiency) decrease by ½. For Q of approximately 8 the line centered at 850 nm is about 100 nm for example. This lower Q results in a broader and overall smoother absorption or quantum efficiency curve as a function of incident wavelength. As an example, for a RCE photodiode with a Q of 1000 to 10000, the line width about 850 nm is 0.8 - 0.08 nm which is too sharp for practical applications and therefore not known to have been commercialized.
[00187] FIG. 24 is a diagram showing a simplistic ray view of light bouncing in a PD/ APD device, according to some embodiments. The microstructures can be holes, rectangular grooves, pillars, furrows, trenches, fractals, regular and irregular cavities. The microstructures can be etched partially into the P layer, through the P layer and partially into the I layer (as shown), through the I layer and partially into the N layer, through the N layer and to the oxide layer, or partially into the oxide layer. Light can be coupled into the silicon P, I and N layers and is trapped such that it is reflected or partially reflected from boundaries that present a mismatch in refractive index and/or from reflectors such as a metal reflector 2410. Reflector 2410 can be, for example, Ag, Ai, Au, Cr, Pt, Ni, and/or dielectric Bragg reflectors and/or air/silicon Bragg reflectors. This reflected light can form a propagating and/or stationary mode and the bounce and the greater interaction with the ! layer the greater the quantum efficiency which is proportional to the absorption of photons in the I layer. The complex coupled modes of lightwave generated by the microstructure also can result in propagation and stationary waves both laterally and vertically which can reflect from the boundary discontinuities in the refractive indices and reflectors which also increase the interaction of the photon field with the I region. The increase in interaction of the lightwave with the I region can result in an effective absorption length of 30 microns which at 850 nm for Si can result in a QE of greater than 50% and in some cases greater than 70%.
[00188] Diffraction and refraction by microstructures are methods of lightwave interacting with microstructures that can be subwavelength, wavelength and/or larger than wavelength. Each microstructure can be coupled to neighboring microstructures such that it forms complex coupled resonators (pendulums) modes/waves, Bloch waves, interference, linear and non linear effects, loaded high contrast grating and/or low Q high contrast grating and/or high contrast grating with absorption and/or photonic crystal and/or subwavelength optics, and/or piasmonics to name a few. This complex coupling of modes/lightwaves/optical fields can result in an increase in interaction time and/or length of the optical field with the I region that can result in enhanced quantum efficiency at certain wavelengths over a similar structure without microstructures.
[00189] As in FIG. 1 and FIG. 2 the mesa edge can also be a Bragg reflector such as Si/air/Si/air/Si/air for example or any dielectric layers with different index of refraction.
[00190] To minimize photocurrent generated in the P and N layers, the P and N can be highly doped to greater than 1x1019/cm3 to decrease the minority carrier lifetime, and be as thin as 0,1-0.3 urn to minimize absorption. In addition, the P layer can be replaced with a conducting transparent metal oxide such as indium tin oxide forming a Schottky type contact or a heterojunction P contact for example such that it is partially transparent,
[00191] The P-l-N PD can be also Ge,GeSi homo and or hetero-j unctions on Si or SOI PD/1V1APD devices for example where instead of air/silicon Bragg reflectors it can be Ge/GeSi/air Bragg reflectors. [00192] FIG. 25 is a diagram showing a Ge on Si mierostructured photodiode where light is incident from the backside, according to some embodiments. The light is incident from the backside, the silicon substrate side, and with
mierostructured holes etched in the Ge layer(s), to the Si N layer, into the Si N layer, to an oxide layer such as an SOI layer (not shown for simplicity), or into such an oxide layer. The hole etch depth can range from 0.1 microns to 10 microns and in some cases 0.1 microns to 5 microns from the surface of the P layer or the N layer if the P and N are interchanged. Note that this is also applicable to a Ge on Si avalanche photodiode with the addition of Si P charge layer and Si I avalanche gain layer.
[00193] A metal ohmic contact layer 2510 can be in contact to the P Ge layer for reflecting light back toward the I Ge layer for improving the absorption and also a thinner i Ge layer can be used for a shorter transit time of the electrons and holes that can result in a higher data rate bandwidth. For example, the I layer can be 1 micron thick which can result in a data rate bandwidth of >= 50 Gb/s and with the reflector, the light can reflect and interact with the I layer that can effectively have an absorption length greater than the physical length of the i layer. Instead of metal, the reflector 2510 can also be another type such as a dielectric Bragg reflector for example. Not shown for simplicity is the filler material in the holes or partially in the holes such as poiyimide to prevent the ohmic metal from shorting the P Ge to the i Ge and/or to the N Si. Also not shown are passivation layers, and layers that can be needed for transition from Si to Ge during epitaxial growth. See e.g. Kang et ai 2008and Michel et al. Also not shown are anti reflection layers, vias, polished surfaces, biasing electrodes, transmission lines, N ohmic contacts and electrodes, ohmic metal on P anode and N cathode for example, bond pads, solder bumps, in addition, the mesa walls can have a dielectric, oxide, metal reflector 2410 to reflect photons that might impinge at the mesa edge back toward the I Ge layer for increasing the absorption. If the absorption is in the I Ge layer, this will generate electron hole pairs that are swept out due to reverse bias voltage applied to the P anode and N cathode ohmic contact and will result in an external current in the external circuitry. The ratio of the photogenerated current and the input optical power is the responsivity of the photodiode. Quantum efficiency is approximately equal to responsivity times 1.23985 divided by wavelength in um. [00194] GexSh-x alloy can also be used in the P and I layers where the I layer can have GexSii-x where x <= 0.4 and in some cases <= 0.6 and can be multiple layers where x can range from 0 to 1 for example and in some cases x can range from 0.01 to 0.4 and in some cases from 0.01 to 0.6 for each of the multiple layers. The thickness of each of the multiple layers can range from 3 nm to 300 nm and in some cases from 3 nm to 500 nm and in some cases from 3 nm to 1000 nm or more. The P anode layer can be Ge Sii-x where x is less than the x in the I layer for example to form a heterojunction to reduce absorption of the light in the P layer. If P and N layers are interchanged, then the N cathode layer can be GexSii-x with x less than the x in the I GexSh x layer. At least one of the P or N layera is Si and Ge, GexSh-x that can be grown on the Si to form the I layer. A Ge, GexSii-x buffer layer may be between the Si and the Ge, GexSh-x layer to relieve the strain between the Si and Ge, GexSii-x layers. See e.g., ang et ai 2008 and Michel et al.,
[00195] Quantum efficiencies of >=30%, >=40%, >=50%, >=60%, >=70%, and in some cases >=80% can be achieved over wavelength ranges 850nm-950nm, 850 nm to 1Q0Qnm, 1250nm to 1350 nm, 1350nm to 1650nm, 1500nm to 1750nm, 850 nm to 1250 nm and in some cases 1000 nm to 1350 nm.
[00196] FIG. 26 is a plot showing the absorption (1-R-T) of a microstructure MPD/MAPD that includes power absorbed in ail layers, P, I, N for example. Note that F!Gs. 23A and 23B shows the QE, or the power absorbed in the I layer which is less than the absorption given by 1-R-T where R is reflection and T is
transmission. In some known techniques, for example in solar cell nanostructures, the absorption is shown to be enhanced. However, in many cases the quantum efficiency does not reflect the enhanced absorption and there is no, or marginal, improvement in the QE due to the nanostructures. in almost ail the cases, nanostructured solar cells have worse QE than solar ceils without nanostructures. Using the techniques described herein, microstructured PDs (and also MAPDs), have QE that is enhanced by 2 times to over 10 times (200% to over 1000%) over a similar photodiode without microstructures at wavelength range from 800 nm to 950 nm for Si MPD on SOI. This is also applicable to Ge.GeSi alloy MPD/MAPD on Si or SOI for wavelength ranges 1500 nm to 1750 nm, 1250 nm to 1350 nm, 850 nm to 1000 nm and in some cases 1350 nm to 1650 nm. [00197] This illustrates that for high speed photodiodes, the bulk of the photocurrent should come from photocarriers generated in the high field I layer where a reverse bias is applied between the N cathode and P anode (or P and N, or Schottky metal to semiconductor contact) with an external power supply of between - 1 to -12 V for photodiodes and in some cases between -2 to -6 volts. The photocarriers generated in the I layer are swept out at close to and/or at saturation velocity over a distance of the I layer thickness that can range from 0.5 to 3.5 microns. The PD (MAPD) is transit time limited, which results in the high frequency response of a photodiode, with response to data rates greater than 5 Gb/s, greater than 10 Gb/s, greater than 25 Gb/s, greater than 40 Gb/s and in some cases greater than 50 Gb/s. Photocarriers generated in regions other than the high field ! region are not desirable since they can lead to slow tail in the impulse response of the photodiode which can degrade the frequency response of the photodiode. Often the P and N are highly doped to reduce minority carrier lifetime so that photocarriers generated in those regions are quickly recombined. in Ge/GeSi alloy I region P-l-N MPD/MAPD, the P can be a GexS -x alloy with x less than the x in the GexSii-x I region to minimize photocarrier absorption in the P region. The N region is Si. The P and N can be interchanged and the N can be GexSii-x with x less than the x in the GexSh-x ! region and P is silicon.
[00198] Therefore, in high speed photodiodes, the focus is to generate as much of the photocarriers in the high field I region as possible or practicable which can result in a high QE. This is unlike solar cell (photovoltaic) devices where many known prior art simulations are only focused on the absolute absorption A=1-R-T where R is reflection and T is transmission, in such cases photocarriers can be generated anywhere, including in the P and N region. As a result, the P and N regions are often low doped so that the minority life time is long and the photocarriers can diffuse slowly back to the build-in field of the PN junction.
[00199] For example, an NIP MPD structure with 300 nm N and 2000 nm I and 300 nm P on 2000 nm Si02 on silicon substrate with cylindrical hole etch depth of 2400 nm, and with diameter (nm)/period (nm) of 800/950, 800/1050 and 800/1300 hexagonal lattice, the QE (absorption only in the I layer) and absorption (all regions) can be plotted from 820 to 880 nm wavelength. The QE is 60% at 820 nm wavelength for 800/1050 hexagonal lattice structure and the overall absorption is close to 98%. Approximately 80% of the incident photons are absorbed in the I layer. In some cases, the percentage absorbed in the I layer can range from 30% to 90% or more and in some cases can range from 40% to 80% or more. Simply from the ratio of the sum of the P and N layer thickness to the I layer thickness, 0.6/2, approximately 70% of the photons are absorbed in the I layer.
[00200] In known solar cell techniques it is common for only absorption (1-R-T) to be simulated and measured, in high-speed photodiodes, however, both QE and absorption are simulated and QE is measured. Note that absorption is necessary but not sufficient; the absorption in the high field I layer must also be simulated (which can also be the QE) and optimized or improved. The QE is measured which is a measure of the absorption in the I layer of photogenerated carriers that contribute to an external current,
[00201] FIGs. 27A-27C are a table and two example structures showing a range of hole diameters and periods (diameter/period ail in nm) for square and/or hexagonal lattices, according to some embodiments. The ranges shown are from 250 nm to 4200 nm diameters and periods from 350 to 6200 nm. Other ranges are also possible for example diameters from 50 to 1500 nm and periods from 80 to 3000 nm. The holes can have different shapes - from polygonal to oval and in addition the device can have pillars and/or holes and pillars. Also included are some experimentally measured quantum efficiencies for the structure shown in FIG. 27C ranging from over 40% to over 60% for certain hole diameter/period and etch depth at 800-850 nm wavelength. Not all holes have exactly the
diameter/period listed in the table; due to fabrication process variations, the photolithographic masks were designed with the diameter/period but the finished device can have a somewhat different hole diameter/period. In addition the etch depths are also not necessarily exacyly as shown in FIG. 27C. In some cases, the etch depth of the holes can range from 30-90% of the etch depth of approximately 2600 nm (epitaxial layer variations can change the etch depth to the SiQ2 by 1- 30% or more) and in some cases it can be 100% and/or greater than 100% where the etch is into the SiQ2 BOX (buried oxide) layer for example. The hole/period parameters in the table also apply to Ge, GeSi on Si MPD/MAPD with associated wavelengths. [00202] This is also appiicab!e to GexSh-x on Si and/or SO! where GexSh-x replace Si in the P and i layers in F!Gs. 27B and 27C. The GexSh-x can have x =< 1 for the P and/or I layers, in some cases x <=0.4 for the P and/or I layers, and in some cases the P layer can have an x that is less than the x in the i layer for example. In some cases, the P and/or I layers can have x<=0,6 and in some cases the P and/or I layers can have x <= 0.2.
[00203] The hole diameters can range from 250 nm to 5000 nm, 600 nm to 2000 nm, 900 nm to 3000 nm and in some cases 1000 nm to 3500 nm. The periods can range from 300nm to 7000 nm, 900 nm to 9000 nm and in some cases 1000 nm to 6000 nm. In the cases where the microstructures are not circular, at least one of the dimensions can take the dimension for diameter with the ranges given above, in the case of non-periodic microstructures, the spacing between adjacent microstructures can range from 0 nm to 9000 nm, and in some cases 100 nm to 5000 nm and in some cases 600 nm to 6000 nm.
[00204] In both Si MPD/MAPD and Ge, GexSkx MPD/MAPD on Si and/or SOI, the etch depth of the holes (cavity, voids) or height of the pillars (protrusions, mesa) can range from 100 nm to 10000 nm, from 10 nm to 5000 nm, from 500 nm to 5000 nm, from 300 nm to 5000 nm and in some cases 1000 nm to 6000 nm or more.
[00205] For Si MPD/MAPD on Si and/or SOI, the wavelength can range from 800 nm to 950 nm, from 840 nm to 960 nm, from 820 nm to 860 nm, from 850nm to 950 nm, 850 nm +/- 20 nm and in some cases from 840 nm to 980 nm.
[00206] For Ge, GexSh-x MPD/MAPD on Si and/or SOI, the wavelength ranges from 850 nm to 950 nm, 1250 nm to 1350 nm, 1350 nm to 1550 nm, 1500 nm to 1650 nm, 1500 nm to 1750 nm, 1200 nm to 1600, 900 nm to 1350 nm, 850 nm to 1350 nm, 1350 nm to 1650 nm, 1550 nm +/- 20 nm, 1300 nm +/- 50 nm and in some cases 1600 nm +/- 50 nm.
[00207] Quantum efficiency for both Si and Ge, GexS -x MPD/MAPD can be >= 30% in one or more of the wavelength ranges above, and in some cases >=4Q%, >=50%, >= 60%, >=70%, >=8Q% and in some cases >=90%.
[00208] Data rate bandwidth for both Si and Ge/ GexSh-x MPD/MAPD can be >= 1 Gb/s, >=5 Gb/s, >= 10 Gb/s, >= 20 Gb/s, >= 25, >= 40 Gb/s, >=50 Gb/s and in some cases >=60Gb/s. [00209] For both Si and Ge, GexSh-x MPD/MAPD, the I layer can range from 0,5 to 3.5 microns thick and in some cases 3 to 5 microns thick. The P layer thickness can range from 0.05 to 1 microns thick and in some cases 0.1 to 0.5 microns and in some cases 0.3 to 1 microns. The N layer can range from 0.05 to 1 microns thick and in some cases 0.1 to 0.5 microns and in some cases 0,3 to 1 microns thick. In the case of Ge/ GexSii-x MPD/MAPD, at wavelengths greater than 900 nm and in some cases greater than 000 nm, the N layer is Si and can be thicker, ranging from 0, 1 to 10 microns or more,
[00210] The P and N layer can be interchanged, instead of a P-l-N it can be N-l- P on P Si and/or SOI. Doping ranges are as given previously.
[00211] FIGs. 28A-28C are scanning electron micrograph cross sections of another example of deep reactive ion etching (DRIE) BOSCH process for etching holes in Si and/or Ge, Ge/ GexSii-x MPD/MAPD, according to some embodiments. This process is similar to process used in CMOS and BiCMOS for metal interconnects of different layers. As compared to FIGs. 14A-14C, the DRIE is inductively coupled plasma (iCP) or transformer coupled plasma (TCP) etching also used in CMOS and BiCMOS processing. The lithographic mask dimension of the hole is 650 nm and the processed hole after DRIE range from 697 to 659 nm at the wide and narrow part of the hole as shown for the slow etch process and as much as over 800 nm for a standard etch process as shown on the left micrograph in FIG. 28A. The scalloping is due to the BOSCH process and can be controlled by etch parameters to reduce the scalloping and/or to increase the scalloping.
Scalloping can be defined by the ratio of the diameter at the wide/narrow parts of each scallop. Each scallop in the standard process in FIG. 28A for example can range from approximately 180 to 250 nm height or depth within a single hole. The scallops range from subwavelength to greater than wavelength for 850 nm wavelength in Si, where one wavelength is approximately 233 nm. FIGs. 28A-28C show examples of process variations that can result in dimensional variations. However, with tighter process controls and dedicated processing machines, the process variations and therefore the dimensional variations can be greatly reduced and dimensions can be controlled to certain limits such as less than a few percent variations and in some cases less than 10% variations and in some cases less than 30% variations and in some cases less than 60% variations and in some cases greater than 60% variations.
[00212] FIG. 29 is a diagram showing a schematic cross section of variations in the width of the hole diameters, according to some embodiments. The variation in the diameter can be a function of depth, and can be sub, at, or greater than wavelength in the material (λ/η where λ is the wavelength and n is the refractive index of the material). The variations can be a combination of subwavelength, at wavelength and/or greater than wavelength variations, where the wavelength is defined as the incident average wavelength of the photon. An example may be at 850 nm +/- 10 nm as the incident photon wavelength. The holes (and/or pillars) can be cylindrical (hole 2910), a funnel (hole 2912) and/or an inverted funnel (not shown) and can have a single and/or multiple sidewall slopes (angles) that can be negative and/or positive and/or a combination of negative and positive. The sidewall slope can be defined as the slope at each point of the undulation. The microstructures with variation in the diameter as a function of depth can be on structures such as 2910 or 2912 in FIG. 29 for example and can be on Ge, GeSi on Si and/or SOI photodiodes and also on microstructured avalanche photodiode. Note that these techniques can be applied to other microstructure shapes such as polygons, where variations in one or more dimensions of the width may be as a function of depth.
[00213] The number of undulations within each hole can range from zero to 10s or to 00s or even 1000s. The undulations within each microstructure, hole for example, can support multiple modes of the light wave such that each
microstructure resonator's resonance is broadened as compared to a
microstructure resonator that has perfectly smooth and vertical sidewails. The broadening of the resonance of each microstructure and its complex coupling with its neighbor microstructure resonators can result in a broader absorption verses wavelength characteristics with less ripples, in some cases, with variation of the absorption ripples less than 10% over 20 nm wavelength span about a center wavelength, and in some cases <= 25% amplitude variations of the absorption over a wavelength span of 50 nm about a center wavelength and in some cases <=5Q% over a wavelength span of 60 nm, and in some cases <= 50% over 100 nm wavelength span and in some cases <=10% over 10 nm wavelength span. [00214] FIG. 30 is a diagram showing additional microfeatures and/or nanofeatures on the surface of the photodiode and/or avalanche photodiode, according to some embodiments. The microfeatures and/or nanofeatures can be sub/at/greater than wavelength and/or a combination of sub/at/greater than wavelength on the surface of the photodiode and/or avalanche photodiode. The surface can be semiconductor and/or a transparent metal oxide (TMO) that can be conducting and/or semiconducting. The surface can be P or N type, P or N type coated with TMO and/or I type (not intentionally doped, intrinsic) coated with TMO for example to form a Schottky barrier contact. The microfeatures can reduce reflection thereby improving the quantum efficiency of the microstructured photodiode and/or avalanche photodiode. The TMO and/or transparent conducting oxide (TCO) can be indium tin oxide, ZnO, NiO, Cr-oxide, to name a few. See e.g., Transparent Conducting Oxides - An Up-To-Date Overview, Sfadler, Materials 2012, 5, 661-883, for a review of TMO/TCO (incorporated by reference herein and referred to herein as "Stadier").
[00215] Micro-nano-features such as pyramidal, pyramidal holes, needle-like, micro-nano-voids, for example, shaped features can reduce reflections and enhance light capturing in the microstructures photodetector and thereby improve quantum efficiency,
[00216] In addition, in optical data communication systems, the reflection from photodiodes should be <= 1 % and in some cases <= 5% and in some cases <= 10% at the signal wavelength +/- 2 nm.
[00217] Both Si on Si and/or SOI MPD/MAPD and Ge.GeSi on Si and/or SOI MPD/MAPD can utilize such micro and/or nano features to reduce reflection.
[00218] FIG. 31 is a schematic cross section showing micro/nano-features which can be on the surface as well as on the microstructure sidewalls, according to some embodiments. The micro/nano-feature can be sub/at/great than wavelength and/or a combination of sub/at/greater than wavelength. The features can be on the sidewalls which in addition can have a width undulation as a function of depth that can be sub/at/greater than the optical wavelength which is given by
waveiengfh/n where n is the refractive index. For example, a wavelength at 850 nm in air is 850 nm whereas in Si it is approximately 233 nm where n is 3.65. Note that the "width" is a diameter in the case of circular hole or pillar, or in the case of polygon, at least one dimension has an undulation, more than one dimension can also have undulation at the same and/or different undulation period and/or periods. The micro/nano-features can also be a combination of sub/at/greater than wavelength variations with single and/or multiple shaped features that can be combination or singly of protrusions and/or voids of single or multiple shapes. The micro-nano-features can improve the quantum efficiency by reducing reflections from the surfaces on the sidewaiis. in addition, the holes can have no undulations and simple cylindrical or funnel or have multiple slopes. The micro/nano-features can be on the top surface and/or on the sidewaiis of the holes and/or pillars and/or on the bottom surfaces in the holes which can be semiconductor or insulator such as S1O2 for example. In addition the micro/nano-features can be partially in the hole on its sidewall,
[00219] In addition, in optical data communication systems, the reflection from photodiodes should be <= 1 % and in some cases <= 5% and in some cases <= 0% at the signal wavelength +/- 2 nm.
[00220] Both Si on Si and/or SOI MPD/MAPD and Ge/GeSi on Si and/or SOI PD/MAPD can utilize the micro and/or nano features to reduce reflection.
[00221] FIG. 32 shows a possible layer structure for integrating Ge/GeSi MPD/MAPD with CMOS/BiCMOS electronics, according to some embodiments. There are two SOI layers and the SI02 can have thicknesses greater than 10 nm for example, or a range from 10 to 4000 nm. The N layer can be doped to ranges from 1x1017 dopants/cm3 to 8x1019 dopants/cm3 where the dopants for N type can be P, As, Sb, Bi, Li and in some cases C for example and the layers can have thicknesses ranging from 00 to 3000 nm or more.
[00222] Instead of the N Si layer, a P GexSh-x with x <=0.4 layer and I GexSii-x with x <=0.4 layer on N Si layer can be grown epifaxially, where P GexSh-x can have an x that is less than the I GexSii-x x value. The P GexSh-x layer thickness can range from 0.1 microns to 1 micron and doping can range from 1x1019/cm3 to 3x1020/cm3. The I GexSh-x layer thickness can range from 0.5 microns to 5 microns; the layer is not intentionally doped and can have background doping of <= 5x1016/cm3 and in some cases <= 1x1016/cm3 and in some cases <= 1.5x1015/cm3.
[00223] A layer or layers are included for electronics and for simplicity it is labeled CMOS layer and/or can be a BiCMOS layer(s) with P and N doping. This layer is for fabricating electronics on silicon for signal processing and data communication electronics. The electronics can include transimpedance amplifier, application specific integrated circuits (ASICs), transistors, capacitors, resistors, inductors, memristors, and any electronics necessary for signal processing, storage, and transmitting of data.
[00224] FIG. 32 illustrates a possibility of Ge/GeSi integration with
CMOS/BiCMOS electronics. Other layer structures can include more SO? layers or fewer or no Si02 layers and/or other methods of isolation electrically and/or optically such as voids, ion implantation, buried amorphous layers to name a few. in addition, heteroepitaxy can be used to include electronics that are fabricated on other material families such as lll-V material in addition to Si for example.
[00225] FIG. 33A is a diagram showing Ge (or GeSi) on Si selective area epitaxial growth (SAEG) also known as selective area growth (SAG) where the Ge is crystalline and/or mostly crystalline such as poiycrystailine. The basic steps for simplicity are to remove that portion of CMOS/BiCMOS Si layer and Si02 until the N Si layer is exposed by appropriate standard masking and etching steps that can include dry and/or wet etching that are standard processes in CMOS/BiCMOS processing technology. A mask 3310 is used, for example a dielectric mask such as SiNx and/or SiOx mask(s) deposited by plasma enhanced chemical vapor deposition (PECVD) for example. Ge I layer is formed with thickness ranging from 300 to 4000 nm and not intentionally doped, with background doping of less than 8x1016/cm3 and in some cases <= 1x1016/cm3 and in some cases <= 1.5x1015/cm3 for example or less, followed by a P Ge layer with thickness ranging from 50 to 2000 nm and with doping of P type dopant ranging from 5x1018/cm3 to 1x102Q/cm3 where the P dopant can be C, B, Al, Si, Ga, in to name a few. This is just one example of incorporating Ge on Si and integrating with CMOS/BiCMOS Si electronics, other methods can include amorphous deposition of Ge by PECVD followed by laser annealing for example to convert the amorphous Ge to poly crystalline and/or crystalline Ge locally and with minimal heating of the surrounding material. Epitaxial lift off and wafer bonding are other methods that may be used for heter-material integration. [00228] In some cases, the Ge can be amorphous and/or microcrystalline for either the P and/or I layers. The P-l-N can be reversed and be N-l-P and all the discussion should apply to the N-l-P cases.
[00227] In addition, a Si avalanche region can be included by adding P-Si, l-Si and N-Si, where the P and 1 Si avalanche layers are inserted after the l-Ge layer. Other layers for material growth techniques such as buffer Ge layers are not shown for simplicity.
[00228] FIG. 33B is a diagram showing a simple schematic drawing of a trench- isolated GeSi P-l-N MPD integrated with CMOS/BiCMOS electronics, according to some embodiments. The MPD/MAPD and the electronics are on a single chip which can also include arrays of MPD/MAPD integrated with multiple ASICs or other electronics on a single chip. GexSii-x P and I layers are grown on Si N layer on Si or SOI, a second SOI layer is wafer bonded to the GexSh-x P, which can include a thin Si layer that is not shown between the GexSh-x P and SOI Si02 layer on which the CMOS/BiCMOS ICs (integrated circuits) are fabricated. The GexSii- P layer can have a x<=0.4 and in some cases <=0.1 and in some cases <=0.05 and in some cases the x in the P GexSii-x layer is less than the x in the I GexSh-x layer. After wafer bonding the SOI CMOS/BiCMOS wafer to the GeSi P and I on N Si, the Si and SOI over the GeSi P/i area can be etched to reveal the GeSi P-i on Si N photodiode (avalanched photodiode with Si charge P and Si multiplication I layers not shown), followed by an etch for form trench 3320 which defines the P-l-N photodiode area. The trench 3320 is etched to the N Si layer as shown in FIG. 33B,
[00229] The P GexSh-x layer thickness can range from 0.05 microns to 1 micron and doping can range from >= 5x1018/cm3 to 2x102Q/cm3 or higher P type doping such as B, Ai, Ga, In and sometimes C. The GexSii-x I layer can have x<=0.4 and in some cases <=0.8 and in some cases <=0.8 and in addition can have multiple layers with different value of x for adjacent layers. The overall thickness of the GexS -xX I layer can range from 0.5 microns to 5 microns and in some cases 0.5 microns to 3,5 microns. All layer thicknesses can have +/- 25% approximately in thickness and in some cases +/-x10% or less. The GexSh-x I layer is not intentionally doped and can be intrinsic, with background doping of <= 5x1016/cm3 and in some cases <= 1x1016/cm3 and in some cases <= 5x 015/cm3. The N Si layer can have thickness ranging from 0.1 to 10 microns or more and with N type doping in the range >= 5x1017/cm3 to 5x1019/cm3 or higher and in some cases >= 5x1018/cm3 to 5x1019/cm3 or higher. The N type dopant can include N, P, As, Sb and sometimes C. The Si02 layers in the SO! can range from 0.01 microns to 6 microns or more.
[00230] FIG. 34A is a diagram showing a Ge on Si microstructured PD integrated with electronics, according to some embodiments. The electronics can include a transimpedance amplifier (TIA) and/or with other electronics on Si for signal processing, transmitting, storage, computing, switching for example.
According to some embodiments, arrays of Ge PDs can be connected to multiple ASICs or other electronics on a single chip. MAPDs can also be used with Si charge P layer and Si multiplication I layer inserted between a Ge I and N Si cathode. Microstructured holes 3412 are shown that are etched through the P-Ge and i-Ge and to and/or into the N Si layer. The holes can also be partially etched in to the P-Ge layer, partially into the i-Ge layer and/or etched to the SiCb layer. Light impinges on the top surface where the microstructures are on the Ge.
Electrical contacts are made to the P-Ge anode and N-Si cathode and additional electrodes 3430 and 3432 are used to connect the MPD to the TIA for example. Many steps are not shown for simplicity, such as passivation of the semiconductor surfaces, ohmic contacts, to name a few.
[00231] In addition, Si avalanche gain layers such as P-Si and i-Si can be inserted after the i-Ge to provide a Ge on Si microstructure avalanche photodiode. Light can impinge normal to the surface of the MPD and/or at an angle ranging form 0 to 45 degrees off normal. The angle can be greater than 45 degrees in some cases but less than 90 degrees.
[00232] Another method of monolithic integrating Ge MPD/MAPD
(MicroStructure PhotoDiode/MicroStructure Avalanched PhotoDiode) a "Ge-firsf method is discussed in CMOS-integrated high-speed MSM germanium waveguide photodetector, Assefa et a!., 1 March 2010 / Vol. 18, No. 5 / OPTICS EXPRESS 4986-4999 (incorporated by reference herein and referred to herein as "Assefa et ai."). An amorphous Ge layer is deposited and during subsequent CMOS processing using rapid thermal anneal, the amorphous Ge layer is melted and re- crystallizes into crystalline Ge layer following the Si crystal template. This Front End Of Line (FEOL) CMOS processing can be used to simplify the processing incorporating Ge in the CMOS process, ion implantation can be used to , create a thin P-Ge layer of the order of 0.1-0.3 microns using ions such as boron for example at a dose of > 1x1014/cm2 and at an accelerating energy of approximate 30 KeV for a doping concentration of > 1x1 Q19/em3. Microstructures can then be etched into the P-Ge and i-Ge layers to enhance absorption at wavelengths of 1350 nm to 1800 nm, 1500 nm to 1700 nm and in some cases 1250 nm to 1350 nm. Quantum efficiencies of >= 30% in some of the wavelengths given in the above wavelength ranges. In some cases QE of >=4Q%, >=50%, >=6G%, >=7Q%, or >=80% is achievable in some for wavelengths given in the above ranges.
[00233] Data rate bandwidths of the Ge on Si MPD/MAPD integrated with electronics on a single silicon chip can be >= 1 Gb/s, >=5 Gb/s, >= 10 Gb/s, >= 25 Gb/s, >= 40 Gb/s, >= 50Gb/s and in some cases >= 60 Gb/s. Gain of Ge on Si MAPD integrated with electronics on a single chip can be >=2, >=5, >=10 and in some cases >=20.
[00234] Another method of Ge on Si monolithic integration with CMOS is given in High-Speed Near infrared Optica! Receivers Based on Ge Waveguide
Photodetectors integrated in a CMOS Process, Masini et al., Advances in Optical Technologies Volume 2008, Article ID 98572, 5 pages (incorporated by reference herein and referred to herein as "Masini et al."). Ge on Si epitaxial growth is incorporated during CMOS processing. A waveguide Ge photodiode is shown in Masini et al., where, as described herein, a non-waveguide microstructure photodiode is formed where the incident light is predominately along the direction of the applied electric field and not perpendicular as in the case of the waveguide PD structure. After the Ge epitaxial growth, microstructures such as holes (and/or pillars) are etched into the P and I Ge for enhancing absorption of light at wavelengths in the ranges of 1400 nm to 1800 nm and anywhere in between these ranges such as 1500 nm to 700 nm for example.
[00235] Another method of incorporating Ge with CMOS is wafer bonding as discussed in Development of SiGe Arrays for Visible-Near IR Imaging Applications, Sood et al., Detectors and Imaging Devices: infrared, Focal Plane, Single Photon, Proc. of SPIE Vol. 7780, 77800F, 2010 (incorporated by reference herein). Ge on Si photodiodes and CMOS layers are wafer bonded to form an integrated structure of Ge on Si PD with CMOS electronics. Similarly, the MPD/MAPD can be fabricated separately and wafer bonded to the CMOS wafer. These are all examples of integrating Ge on Si MPD/MAPD with CMOS electronics. Variations can also be employed where the Ge is a GeSi alloy such as GexSh- where x is 0.4 or less for Ge in CMOS technologies and bipolar transistors can also be used to extend the wavelength of the photodiode/avaianche photodiodes with the use of microstructures for further absorption enhancements since the layers are necessarily kept to less than 3 microns for high data bandwidth applications, and in some cases less than or equal to 2 microns and in some cases less than or equal to 1.5 microns.
[00236] In certain cases of the Microstrucfure photodiodes in either Si and/or Ge, GeSi on Si, certain layers can be amorphous and/or non-crystalline and/or polycrystailine and/or microcrystaliine and/or crystalline and can have these types of material in various combinations. For example in a PIN photodiode structure the P and I layers can be microcrystaliine and the N layer crystalline, in some cases microcrystaliine and/or amorphous is preferred due to fabrication processes and/or to reduce cost of manufacturing, and the performance of the photodiode/avaianche photodiode is adequate for a particular application, in the case of an avalanche photodiode, the P and I region can be microcrystaliine and/or amorphous and the P charge layer, I multiplication layer and N layer can be crystalline for example.
[00237] The quantum efficiency (QE) of a Microstructured photodiode and/or Microstructured avalanche photodiode (MPD/MAPD) can be 10 % or greater, and in certain cases 20%, 30%, 50% or greater at wavelength ranges of 900 nm to 000 nm for example than for otherwise same devices that use bulk rather than microstructured photon absorbing layers. QE can be 30%, 40%, 50%, 80%, 80% or greater for wavelength ranges of 800-880 nm and for data bandwidths of 3 Gb/s, 5 Gb/s, 10 Gb/s, 20 Gb/s, 40 Gb/s or greater for such microstructured devices, [00238] The QE of Ge, GexSh-x (x<1 and in some cases x <=0.6 and in some cases x<=0,4) on Si MPD/MAPD can be 0%, 20%, 30%, 50% or greater at wavelength ranges of 1500 nm to 1650 nm, and QE of 30%, 40%, 50%, 60%, 80% or greater for wavelength ranges of 1200-1550 nm, 1550-1650 nm or 1250-1350 nm for data bandwidth of 3 Gb/s, 5 Gb/s, 10 Gb/s, 20 Gb/s, 40 Gb/s or greater. [00239] The depth of the microstructures that can be trench and/or mesa, holes and/or pillars, voids and/or protrusions, can be circular, polygonal, rectangle, and can have either a single sidewall angle and/or multiple sidewail angles either positive and/or negative angles and any combinations thereof, can range from less than 100 nm to over 5000 nm, and the microstructures can have multiple depths for a set of microstructures for example, in certain cases, there may be multiple depths in the microstructures, with depths ranging from less than 100 nm to over 100 nm to 2000 nm or greater, and/or a range of 10-5000 nm. Depth can be from the top of a microstructure to the bottom of the microstructure, for example for a hole, from the surface to the bottom of the hole. If a single microstructure has multiple depths, then the depth can be the depth/length of that particular microstructure with a particular lateral dimension and the second depth can be that depth/length associated with a new particular lateral dimension; for example in the case of a staircase hole, each step can have a particular depth.
[00240] In a set of microstructures, the depth of the holes can be the same for all holes, and in some cases the holes have a range of depths, and in some cases the holes can have different depths, and in some cases they can have random and/or almost random depths. The holes can also have weighted depths, for example, 60% of the microstructures are etched to 4000 nm and 40% are etched to 2000 nm. The distribution can be orderly and/or non-orderly and/or random. There can be other percentages, multiple percentages of distributions from 0- 100%, and other multiple depth ranges from 100 nm to 5000 nm for example.
[00241] The diameter of the holes can range from 300 to 3000 nm, 600 nm to 5000 nm or 800 nm to 2500 nm and the period can range from 400 to 5000 nm or 900 nm to 8000 nm and the holes can be arrayed in a regular lattice such as square, hexagonal, and/or there can be irregular arrangements of the holes. In irregular arrangement of the microstructures the spacing between the nearest edges of adjacent microstructure can range from 0 nm to 5000 nm, 00 nm to 10000 nm and in some cases 250 nm to 2500 nm.
[00242] In the case of rectangular and/or non circular holes, the dimensions apply to the smaller lateral dimensions, for example a rectangular hole can have dimension of 500 x 1500 nm, or 500 x 10000 nm, and/or at least one dimension is in the range of 300-3000 nm and in some cases 100 nm to 6000 nm. The spacing between nearest edges of the microstructure can range from 10 to 5000 nm and in some cases the microstructures can intersect, for example pillars/mesas can touch and voids can merge.
[00243] For Ge on Si microstructured photodiodes, where a reverse bias is applied externally between the anode and cathode of -1 to -10 volts and in the case of Ge,GeSi alloy (Also SiGe) on Si microstructured avalanche photodiode, a reverse bias of -5 to -80 volts may be applied between the anode and the cathode of the APD and in some cases -10 to -30V can be applied,
[00244] The wavelength range for Ge,GeSi on Si MPD/MAPD with enhanced absorption due to the microstructures such as holes (pillars), can be from 1320 nm to 1800 nm, and in some cases from 1350 nm to 1750 nm and in some cases from 1400 nm to 1750 nm and in some cases 1250 nm to 1350 nm. The quantum efficiency for 1310-1350 nm can be in the range 50-90% or more with
microstructures. For wavelengths range 1350-1450 nm, the quantum efficiency can be in the range 40-70% or more. For wavelengths in the range 1450-1550 nm, the QE can be in the range of 20-70% or more. For wavelengths in the range 1550-1650 nm the QE can be in the range of 10-60% or more. For wavelengths in the range of 1650 -1800 nm, the QE can be in the range of 10- 50% or more with microstructures to enhance the absorption,
[00245] Enhancement of the absorption can range from 2 to 200 times, in some cases 3 to 10 times and in some cases 3 to 20 times and in some cases 3 to 50 times the bulk absorption coefficient. For example, at 850 nm wavelength for silicon microstructures the enhancement can be 3-10 times the absorption coefficient of 535/cm without microstructure enhancement. The 3 to 10 times enhancement of the absorption then would result in an enhanced effective absorption coefficient of 605/cm to 5350/cm range respectively. For a 2 micron absorption layer for example without microstructure to enhance the absorption, the QE would be approximately 10% at 850 nm in Si; with microstructure enhancement of the absorption by 3 to 10 times, the QE can be approximately range from 27% to 66% or more at 850 nm wavelength in Si. The QE is enhanced by over 200% to over 600% in photodiodes/avalanche photodiodes with microstructures over a similar photodiode/avaianche photodiode without microstructures. in known prior solar cells using nanostructures, the enhancement in QE is less than a few perceni. The bulk of the solar spectrum is in the visibie where Si and most semiconductors have excellent absorption of visible photons, adding
nanostructures have at most marginal improvements in the QE of solar cells, in fact most nanostructure solar cells have worse QE than solar ceils without any nanostructures,
[00246] Similarly, for Ge at 1550 nm the absorption coefficient is 459/cm without microstructure enhancement; microstructure enhancement of the absorption by 3 to 10 times for example can result in an enhanced effective absorption coefficient of 1377/cm to 4590/cm. The QE without microstructure enhancement at 1550 nm in 2 micron thick Ge can be approximately 9% and with a 3 to 10 times
enhancement of the absorption coefficient the QE can range approximately from 24% to 60% for 1550 nm wavelength in Ge microstructure.
[00247] In Strong Electro-Absorption in GeSi Epitaxy on Siiicon-on-insu!ator (SO!), Luo et al., Micromachines 2012, 3, 345-363 (incorporated by reference herein and referred to herein as "Luo et al.") Geo.94Sio.06 (x=0.94) the absorption coefficient at 550 nm was approximately 1000/cm which for a 2 micron Geo.94Sio.08 layer and can give a quantum efficiency of approximately 18%. W th
microstructures, absorption can be enhanced by 2 to 10 times and in some cases 3 to 10 times or more which can increase the quantum efficiency to approximately from 33% to 86% or more and anywhere in between. Hole and/or pillars diameter and/or at least one lateral dimension can range from 300 nm to 3000 nm and in some cases from 100 nm to 3000 nm, and the period can range from 100 to 10000 nm and can be periodic and/or non-periodic. For non-periodic/aperiodic case the spacing of the nearest edges can from 0 to 10000 nm and in some cases the holes and/or pillars can overlap. The depth of the holes and/or the length of the pillars can range from 100 nm to 5000 nm or more and in some cases can range from 10 nm to 4000 nm and in some cases can range from 300 nm to 4000 nm and anywhere in between.
[00248] FIG. 34B shows a cross section schematic of a possible integration of GexS -x on Si and/or SOI integrated with a CMOS/BiCMOS structure as in FIG. 33B, according to some embodiments. The CMOS/BiCMOS is also on SOI and wafer bonded to the GeSi MPD (MAPD) on Si wafer. icrostructured holes 3412 are etched in the GexSii-x P layer and the GexSii-x I layer entirely and/or partially, and can also be etched into the N Si layer and in some cases to the Si02 layer. Electrodes connecting the P anode and N cathode of the P-l-N PD are attached to the electronic layer and in some cases can include an inductor to peak the high frequency response of the MPD/MAPD. The x value of the GexSh-x alloy for the P and I layers can be <=0,4 and in some cases <=0.2, and in some cases <= 0,6 and in some cases <=0.8 and in some cases < 1.0. The x in the P GexSii-x layer can be less than the x value in the I GexSh x layer for a heterojunction to minimize absorption of the incident photons in the P layer. The P and N layer can be interchanged, in which case the N GexSii-x layer will be on the surface and P Si layer on SOI or P Si wafer.
[00249] Integrating the MPD/MAPD with electronics on a single chip significantly reduces packaging costs and also improves performance in that parasitic capacitance due to bond pads, parasitic inductance due to bond wires, parasitic resistance and impedance are minimized which can result in a larger diameter MPD/MAPD and data rate bandwidths over that of a PDAPD that is not integrated and wirebonded and/or solder bump attached. For example, the diameter of the integrated MPD/MAPD can be 30% or larger and in some cases > 10% and in some cases > 20% and in some cases > 40% and in some cases > 50% than a PD/APD that is not integrated for the same data rate bandwidth. The increase in the diameter of a MPD/MAPD can reduce the cost of packaging due to greater misalignment tolerance of the optical components to couple light to the
MPD/MAPD.
[00250] The GexSii-x P layer can have x <=0.4 and in some cases <=Q,6 and in some cases < 1 , and can have a thickness in the range 0.1 microns to 1 microns and a doping in the range 5x1018/cm3 to 2x1020/cm3 or higher P type (in the case where P and N are interchanged, the N GexSh-x can have the same thickness range as the P GexSh-x and the doping can be in the range 5x1017/cm3 to
1x1020/cm3 or higher N type). The I GexSii-x can have a thickness in the range of 0.5 microns to 3.5 microns and in some cases 0.5 microns to 5 microns. The x can be <= 0.4 and in some cases <=0.6 and in some cases < 1. The doping of the I GexS -x layer can be <= 5x1016/cm3 and in some cases <= 1x10i6/cm3 and in some cases <= 1.5x1015/cm3 entirely and/or partially of the i layer. The N Si can have a thickness in the range 0.1 microns to 10 microns and with a doping in the range 5x 017/cm3 to 5x1019/cm3 or higher N iype. In the case where the P and N are interchanged, the P Si can have the same thickness range as the N Si and with doping in the range 5x1018/cm3 to 2x1020/cm3 or higher P type.
[00251] For I GexSh-x with x <=0.2, the GE enhancement with microstructures in a MPD/ APD can be >= 30% and in some cases >= 40% and in some cases >=50% and in some cases >= 60% and in some cases >= 70% and in some cases >= 80% for a wavelength in the range of 850-950 nm and in some cases 850nm to 000 nm and in some cases 880 nm to 1 100 nm and in some cases 950 nm to 1000 nm and in some cases 950 nm, For <=0.4, the GE enhancement with microstructures in a MPD/MAPD can be >= 30% and in some cases >= 40% and in some cases >=50% and in some cases >= 60% and in some cases >= 70% and in some cases >= 80% for a wavelength in the range 1250 nm to 1350 nm, and in some cases 1000 nm to 1350 nm and in some cases 850 nm to 1000 nm and in some cases 850nm to 1350 nm and in some cases 1350 nm. For x <= 0.96, and in some cases x <=1 , the GE enhancement with microstructures in a MPD/MAPD can be >= 30% and in some cases >= 40% and in some cases >=50% and in some cases >= 60% and in some cases >= 70% and in some cases >= 80% for a wavelength at 1550 nm.
[00252] Data rates for the GexSh-x on Si/SOI MPD/MAPD integrated with electronics on a single chip can be >= 1 Gb/s and in some cases >= 5 Gb/s and in some cases >= 10 Gb/s and in some cases >= 25 Gb/s and in some cases >= 40 Gb/s and in some cases >= 50 Gb/s and in some cases >= 60 Gb/s.
[00253] Gain from the GexSh-x on Si or SOI MAPD can be >=2 and in some cases >= 5, and in some cases >= 10 and in some cases >= 20 and in some cases >=40.
[00254] For photons with wavelengths of 950 nm and longer, light can impinge from the substrate side through the Si, the Si can be thinned and a via 3440 can be added to further remove the Si. Signal light can also impinge from the surface side, normal to the surface and/or at an angle less than 90 degrees and in some cases <= 45 degrees.
[00255] FIG. 34C is a cross section schematic showing a possible integration of a GexSii-x MPD (MAPD) with CMGS/BiCMOS integrated circuit electronics, according to some embodiments. The CMOS/BiCMOS layers can be grown on the GexSii-x P and GexSii-x i layers grown on N Si on N Si wafer and/or SOL Electrical isolation between the P-i-N and the C OS/BiCMOS layers if needed can be accomplished with deep ion implantation of O, H, N, Ar, P, B, for example and/or pn junction isolation using diffusion of ions, and/or the P-I-N MPD (MAPD) can be N-l-P where the top layer of the MPD/MAPD is N Si for example and/or N GexSii-x and the i is GexS -x and the P can be Si and/or GexSii-x. This process avoids the wafer bonding step and can reduce the cost of manufacturing and improve yield.
[00258] The MPD/MAPD area is defined by a trench 3420 or mesa etch to the N (or P) Si layer and microstructure holes are etched in the P GexSh-x layer and the I GexSh -x layer either entirely and/or partially, and in some cases into the N (or P) Si layer and in some cases to the Si02 layer of the SOL Electrodes connecting the anode and cathode of the MPD/MAPD to the electronics ICs are made using standard CMOS/BiCMOS processing.
[00257] For photons with wavelengths of 950 nm and longer, light can impinge from the substrate side through the Si, the Si can be thinned and a via 3440 can be added to further remove the Si; signal light can also impinge from the top surface, normal to the surface and/or at an angle less than 90 degrees and in some cases <= 45 degrees.
[00258] Integrating the MPD/MAPD with electronics on a single chip significantly reduces packaging costs and also improves performance in that parasitic capacitance due to bond pads, parasitic inductance due to bond wires, parasitic resistance and impedance are minimized which can result in a larger diameter MPD/MAPD and data rate bandwidths over that of a PDAPD that is not integrated and wirebonded and/or solder bump attached. For example, the diameter of the integrated MPD/MAPD can be 30% or larger and in some cases > 10% and in some cases > 20% and in some cases > 40% and in some cases > 50% than a PD/APD that is not integrated for the same data rate bandwidth. The increase in the diameter of a MPD/MAPD can reduce the cost of packaging due to greater misalignment tolerance of the optical components to couple light to the
MPD/MAPD.
[00259] The GexSii-x P layer can have x <=0.4 and in some cases <=0.6 and in some cases < 1 , and can have a thickness in the range 0.1 microns to 1 microns and a doping in the range 5x1018/cm3 to 2x1020/cm3 or higher P type. In the case where P and N are interchanged, the N GexSh-x can have the same thickness range as the P GexSh-x and the doping can be in the range 5x1017/cm3 to
2x Q20/cm3 or higher N type. The I GexS -x can have a thickness in the range of 0.5 microns to 3.5 microns and in some cases 0.5 microns to 5 microns. The x can be <= 0.4 and in some cases <=Q,6 and in some cases < 1. The doping of the i GexSh-x layer can be <= 5x1016/cm3 and in some cases <= 1x10 6/cm3 and in some cases <= 1.5x1015/cm3 entirely and/or partially of the I layer. The N Si can have a thickness in the range 0.1 microns to 10 microns and with a doping in the range 5x1017/cm3 to 5x1019/cm3 or higher N type. In the case where the P and N are interchanged, the P Si can have the same thickness range as the N Si and with doping in the range 5x1018/cm3 to 2x1020/cm3 or higher P type.
[00280] For I GexSh-x with x <=0.2, the QE enhancement with microstructures in a MPD/MAPD can be >= 30% and in some cases >= 40% and in some cases >=50% and in some cases >= 60% and in some cases >= 70% and in some cases >= 80% for a wavelength in the range of 850-950 nm and in some cases 850nm to 1000 nm and in some cases 880 nm to 1100 nm and in some cases 950 nm to 1000 nm and in some cases 950 nm. For x <=0.4, the QE enhancement with microstructures in a MPD/MAPD can be >= 30% and in some cases >= 40% and in some cases >=50% and in some cases >= 60% and in some cases >= 70% and in some cases >= 80% for a wavelength in the range 1250 nm to 1350 nm, and in some cases 1000 nm to 1350 nm and in some cases 850 nm to 1000 nm and in some cases 850nm to 1350 nm and in some cases 350 nm. For x <= .96, the QE enhancement with microstructures in a MPD/MAPD can be >= 30% and in some cases >= 40% and in some cases >=50% and in some cases >= 60% and in some cases >= 70% and in some cases >= 80% for a wavelength at 1550 nm.
[00261] Data rates for the GexSh-x on Si/SOI MPD/MAPD integrated with electronics on a single chip can be >= 1 Gb/s and in some cases >= 5 Gb/s and in some cases >= 10 Gb/s and in some cases >= 25 Gb/s and in some cases >= 40 Gb/s and in some cases >= 50 Gb/s and in some cases >= 60 Gb/s.
[00282] Gain from the GexSh-x on Si or SOi MAPD can be >=2 and in some cases >= 5, and in some cases >= 10 and in some cases >= 20 and in some cases >=40. - 85 -
[00283] FIG. 35 is a diagram showing a microstructured hole PD with a GeSi alloy I layer, according to some embodiments. The Ge percentage is in the range 30-40%, for example GexSii- and x range from 0.3 to 0.4 for the I layer, in addition there can be multiple layers in the I layer with x ranging from 0.3 to 0.4 and another layer with x ranging from 0.1 to 0.3 for example and in some cases the x can be 0.01 to 0.2 or to 0.3 or to 0.4. x can be 1 and/or 0.001 and ail the number in between 0 and 1. There can be multiple and/or single layers. The multiple layers can have thicknesses of each layer ranging from 3 nm to 1000 nm or more, and in come cases 1 nm to 100 nm range such as superiattices and/or quantum well layers and/or staircase layers with adjacent layers having a different value of x. See, e.g., Optica! absorption in highly-strained Ge/SiGe quantum wells: the role of Γ→ Δ scattering: Lever et al., https://arxiv.org/pdf/1302.7241v1.pdf (incorporated by reference herein and referred to herein as "Lever et al."). The I absorbing GeSi (SiGe) layer can be multiple quantum wells for example, Si/Sic Gecu/Si with thicknesses of 1 1 nm/14nm/1 1 nm repeated 55 times approximately. The quantum well thickness of each layer can range from 1 nm to 50 nm for example and the barrier can range from 1 nm to 50 nm for example and adjacent layers can have different thicknesses and/or x value. For example, there can be a chirped quantum well, in Lever et al., a quantum well of Si/Sio.4Geo.4/Si with thicknesses of
11 nm/14nm/1 1 nm can have an absorption coefficient of approximately 1000/cm; at 1350 nm wavelength with for approximately 2 micron thick I Si/GeSi/Si quantum well with 55 layers, the quantum efficiency can be 18% at 1350 nm wavelength. By adding microstructures such as holes for example, the absorption can be enhanced by 2-10 times or more that can increase the quantum efficiency to > 30% -80% or more. The quantum well Si/GeSi/Si microstructured PD/APD can function over wavelength ranges of 1250 nm to 1350 nm and in some cases 820 nm to 1350 nm and in some cases 840 nm to 960 nm and in some cases 840 nm to 1000 nm and in some cases 950 nm to 1350 nm with quantum efficiencies in the range of >= 30% to >=8Q% and in some cases >= 90% and in some cases >=50%.
[00284] Optica! Absorption Coefficient Determination and Physical Modelling of Strained SiGe/Si Photodetectors, Polleux et al.,
http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=919052 (incorporated by reference herein and referred to herein as "Polleux et al.") reports that at Sio.eGeo.4 - 86 -
(x=0.4) the absorption coefficient at 300 nm is approximately 200-300/cm which can give a quantum efficiency of approximately 8% at 1300 nm wavelength for a 2 micron thick SiOo.6Geo.4 on Si. With microstructures such as holes, the quantum efficiency can be increased to >=30% and in some cases >= 50% and in some case >=60% and in some cases >=70%,
[00285] In the example shown in FIG. 35, the x can be 0.94 for the GexSh-x I absorbing layer and Lou et al. shows that at approximately 1550 nm wavelength the absorption coefficient is approximately 1000/cm. By including microstructures such as holes with diameter ranging from 300 nm to 3000nm and period ranging from 300 nm to 6000 nm and etched to a depth ranging from 500 nm to 5000 nm, the absorption can be enhanced by 2 to 0 times or more which can result in a quantum efficiency in the range 30% to 80% or greater, and all values between 30% and 80%, at 1550 nm wavelength and in some cases 1400nm to 1550 nm wavelength and in some cases 1500 nm to 1600 nm wavelength and in some cases 1250 nm to 1350 nm.
[00286] For GexSii-x x<=0.4, microstructured absorbing I layer of a PD/APD, can be a single and/or multiple layers that can include superlattice, quantum wells, staircase layers (Lever et ai. discusses quantum well and/or superlattice, and Polieux et al. discusses bulk strained SiGe/Si layer). This is compatible with GeSi CMOS bipolar transistor and Si electronics integration, CMOS integrated Silicon Photonics, Haensch et al., CLEO 2014, S 30.4 where 40% Ge in GeSi is the highest for compatibility with GeSi BiC OS process (incorporated herein by reference). The use of microstructures as described herein can enhance the absorption and thereby increasing the quantum efficiency to a range from 30 % to 70% or greater at wavelengths ranges 900 nm to 1350 nm and in some cases 1250 nm to 1350 nm and in some cases 850 nm to 1000 nm and in some cases 950 nm to 1350 nm and in some cases 850 nm to 950 nm.
[00287] Enhancement of the absorption by microstructures by 2 to 10 times or more can result in more than a factor of 2 to more than a factor of 5 improvement in quantum efficiency over a similar structure without microstructures. Light impinges from the top surface where the microstructures 3512 are fabricated in a
predominantly direction along the electric field, it can be on and/or off normal by 0- 45 degree or more. Light can also impinge from the substrate side at an angle normal to the substrate surface and/or off normal by less than 90 degrees for wavelengths of light where Si is mostly transparent, for example from 980 nm and longer. A via 3540 can be etched in the substrate to allow light to impinge from the cathode side.
[00288] The layer thicknesses and doping can range as follows, starting with the SOI layer the Si02 layer can be 0.1 to 10 microns or more, the N Si layer can be 0.01 to 10 microns with doping N doping > 1x 017/cm3. The N epitaxial layer can be Si and/or GexSh-x with x < 0.4 and and in some cases <= 0.2 and with thickness range from 0.01 to 10 microns and with doping ranging from 1x1017/cm3 to
5x1019/cm3 or greater. The I Ge Si -x layer with x from 0.2 to 0.4 or greater, and with thickness ranging from 0.5 to 3.5 microns and in some cases 0.5 microns to 5 microns, and not intentionally doped with doping background of < 5x1Q16/cm3 and in some cases <= 1x1016/cm3 and in some cases <= 1.5x1015/cm3. Finally, the P Si and/or GexS -x layer with x < 0.4 and in some cases x < 0.2 and with thicknesses ranging from 0.05 to 2 microns and with P doping ranging from 1x1018/cm3 to 3x1020/cm3 or greater. The structure shown is a P-i-N configuration, the P and N can be switched to have a N-l-P on P -Si SOI for example.
[00289] In response to an optical signal source with wavelength ranges of 1450 nm to 1600 nm, and in some cases 1500 nm to 1600 nm and in some cases 850nm to 1000 nm and in some cases 850 nm to 1600 nm in some cases 1250 nm to 1350 nm and in some cases 850 nm to 950 nm and in some cases 1350 +/- 20 nm, the Ge on Si and/or GexSh-x on Si MPD/MAPD data rate bandwidth can be 1 Gb/s or greater, and in some cases >= 5 Gb/s and in some cases >= 10 Gb/s and in some cases >= 20 Gb/s and in some cases >= 25 Gb/s and in some cases >= 40 Gb/s and in some cases >= 50 Gb/s and in some cases >= 60 Gb/s.
[00270] The MPD is reverse biased with the P anode 3530 at a negative voltage with respect to the N cathode 3532; the reverse bias voltage can range from -1 to - 10 volts.
[00271] For photons with wavelengths of 950 nm and longer, light can impinge from the substrate side through the Si, the Si can be thinned and a via 3540 can be added to further remove the Si. Signal light can also impinge from the surface side, normal to the surface and/or at an angle less than 90 degrees and in some cases <= 45 degrees. [00272] FIG. 36 shows GexSii-x alloy microstruciure (hole) avalanche photodiode structure P-l-P-l-N configuration, according to some embodiments. The top P is anode and the bottom N is cathode, and the GexSh-x alloy can have x with ranges from 0 to 1 , and in some cases 0.001 to 0.4 and in some cases 0.2 to 0.4, and in some cases 0 to 0.4, in this example, x=Q,4 and compatible with GexS -x
CMOS/BiCMOS and bipolar transistors electronics. As in FIG. 35, the I- GexSii-x layer can be single and/or multiple layers which can include quantum wells, superiattice, staircase layers to name a few, with different x for adjacent layers where x can range from 0 to 1 and any value in between and/or thicknesses ranging from 3 nm to 2000 nm and in some cases 3 nm to 3500 nm and in some cases 3 nm to 5000 nm. Stress and strain can be built in the GexSh-x alloy and/or Ge iayer(s) to increase the absorption coefficient at longer wavelengths since such strain on the Ge and/or GexSh-x layer(s) can narrow the bandgap as shown in Germanium on Silicon for Near-infrared Light Sensing, Colace et al. IEEE Photonic Journal, Volume 1 , Number 2, August 2009 (incorporated by reference herein).
[00273] The MAPD and MPD layers are similar and in many cases identical except for the extra layers P-Si, charge layer and l-Si multiplication (avalanche) layers in the MAPD. The layers, except for the multiplication and charge layers in the MAPD can be interchanged with the layers in the MPD.
[00274] The layer thicknesses and doping can range as follows, starting with the SOI layer the Si02 layer can be 0.1 to 10 microns or more, the N Si layer (cathode) can be 0.01 to 10 microns with doping N doping => 1x1017/cm3 (=> equal to and/or greater than) and in some cases => 5x1 Q18/cm3. The l-Si multiplication layer 0.2 -2 micron or more, not intentionally doped (intrinsic) with background doping =< 5x1016/cm3 and in some cases <= 1x1016/cm3 and in some cases <= 1.5x1015/cm3 (=< equal to and/or less than) partially and/or entirely in the I region. The P-Si charge layer can have thickness range from 0,02 to 2 microns and with P doping => 1x10r7cm3. The I GexSh-x layer (absorption layer) with x from 0.2 to 0.4 or higher and in some cases 0.4 to 1 , and with thickness ranging from 0.5 to 3.5 microns and not intentionally doped (intrinsic) with doping background of <
5x1016/cm3 and in some cases <= 1x1016/cm3 and in some cases <= 1.5x1015/cm3 partially and/or entirely in the i region. The P Si and/or GexSh-x anode layer with x < 0.4 and in some cases x < 0.2 and can have thicknesses ranging from 0.05 to 2 microns and P doping ranging from 1x1018/cm3 to 3x 020/cm3 or greater. Light impinges from the top surface either normal and/or off normal by as much as 45 degrees to the surface normal. In some cases, a buffer Ge or GeSi alloy is grown on Si prior to the growth of Ge and/or GeSi layers as a strain relief layer.
[00275] In all semiconductor doping, as the layers are grown at high
temperatures, between P and I, and between I and N have diffusion of P and N dopants into the I region. The I region is measured where the doping level have dropped to =< 5x1016/cm3 and in some cases =< 1x1016/cm3 and in some cases =< 5x1015/cm3. in general, the lower the doping the lower the reverse bias voltage to attain the designed i layer thickness. For example, if there is significant diffusion of P and N into the I region, then a higher reverse bias voltage is needed to attain a fully depleted I region of 2 microns than a similar structure with minimum P and N dopant diffusion into the I region.
[00276] With bulk Geo^Sb.e the measured absorption coefficient is
approximately 300/cm at 1300 nm, (see Polieux et al. and Lever et al.) for GeSi quantum wells, the absorption coefficient can be 1000/cm at 1350 nm. With microstructures such as holes, the absorption coefficient can be enhanced by 2-15 times or more which can improve the quantum efficiency to as much as 30% to 50% or more and in some cases >=60% and in some cases >= 70% and in some cases >= 80% or more.
[00277] In response to an optical signal source with wavelength ranges of 1250 nm to 1350 nm, and in some cases 1000 nm to 1350 nm and in some cases 950 nm to 1350 nm and in some cases 850 nm to 950 and in some cases 850 nm to 1750 nm and in some cases 1250nm to 1750 nm and in some cases 1320 +/- 20 nm, the Ge on Si and/or GexSii-x on Si single and/or multiple layers APD can have QE can be >= 30% and in some cases >= 40% and in some cases >=50% and in some cases >=60% and in some cases >=70% and in some cases >=80%. Data rate bandwidth of 1 Gb/s or higher, and in some cases >= 5 Gb/s and in some cases >= 10 Gb/s and in some cases >= 20 Gb/s and in some cases >= 25 Gb/s and in some cases >= 30 Gb/s and in some cases >= 40 Gb/s and in some cases >= 50 Gb/s and in some cases >= 80 Gb/s. Gain can range from 1 to 5 and in some cases can range from 2 to 10 and in some cases can range from 2 to 10 or greater. [00278] The APD is reverse biased with the P anode 3530 at a more negative voltage than the N cathode 3532 and with a reverse bias voltage range of -4 to -50 volts or more, and in some cases -10 to -55 voltages and in some cases -6 to -35 volts,
[00279] In addition Kang et al 2008 and Michel et al. discuss a low temperature grown Ge (or SiGe) buffer layer such that the Ge I absorption layer can be grown with no significant strain. According to some embodiments of the present disclosure, we can use Ge/GeSi buffer layers to reduce and/or eliminate strain.
[00280] In addition, the I absorption layer can be a superiattice of GeSi alloy with Ge fraction x ranging from 0 to 1 for example where adjacent layers can have different x value.
[00281] FIGs. 37A-37C are diagrams showing variations in the I absorbing layer in a MPD/MAPD, according to some embodiments. The absorbing PIN
heterojunction layers can be P(Si and/or Ge and/or Ge Sii-x)-l(Ge and/or GexSii-x and/or Si)-N(Si and/or GexSh-x) or a N(Si and/or GexSh-x~l(Ge and/or Si and/or GexSii-x)-P(Si and/or GexSii-x) microstructure photodiode or a P(Si and/or Ge and/or GexSii-x)-l(Ge and/or GexSii-xand/or Si)-P(Si)-l(Si)-N(Si) microstructure avalanche photodiode where the I absorbing layer can be Ge, Ge and Si multilayers, and/or Ge and/or GexSh- and/or Si layer or multilayers.
[00282] The example in FIG. 37A shows the I layer is GexSh-x where x <=1 ; for x =0.4, the M PD/APD can respond to wavelength ranges from 820 nm to 1350 nm, with the microstructures enhancing the absorption at wavelength ranges 1250 nm to 1350 nm and in some cases 1000 nm to 1350 nm and in some cases 840 nm to 350 nm. Lower x values, for example x = 0.2 can result in quantum efficiency enhancement of microstructured PD/APD of > 40% and in some cases >50% and in some cases > 80% or higher for wavelength ranges 850 nm to 950 nm. For x =0.6, the quantum efficiency of 1250-1350 nm wavelengths can be enhanced from 40% to 70% or greater for microstructured PD/APD.
[00283] Microstructures are not shown in FIGs. 37A-37C. With the addition of microstructures such as holes, the absorption can be further enhanced by 2-10 times or more, that can result in a quantum efficiency of 40% or more and in some cases 50% or more and in some cases 80% or more and in some cases 70% or more and in some cases 80% or more for wavelengths in the range from 850 nm to 550 nm and in some cases 850 nm to 1650 nm or longer, depending on the Ge fraction which can range from x=0.001 to 1 and in some cases 0.2 to 0.4 and in some cases to 0.8 or higher. For thick Ge films of 2 microns or more on Si substrate without strain relief, the tensile strain and in some cases compressive strain can be so high an extend that the Ge on Si wafer is bowed and can result in difficulties in high resolution CMOS type processing. Selective Area Growth (SAG) can be used to epitaxiaily grow Ge and/or GeSi alloy only at specific areas and not across the entire wafer.
[00284] In addition, as shown in FIG. 37B the I layer can be a multilayer of Ge and Si, for x=1 and x=0 respectively, which can increase the absorption coefficient due to the built-in strain and reduce overall stain by compensating layers. A multilayer locally strained is more reproducible than a single layer since the strain can be controlled by the thickness and the fact that there is strain at both surfaces with competing strain or compensating stain layers. In addition, after the holes are etched, epitaxial growth of Si and/or Ge conformal layers can be grown in the holes to provide further strain.
[00285] With different values of x for each layer and with layer thicknesses ranging from 3 nm to 30 nm, quantum wells can be grown (see Lever et al.), for example with x=0.6 and x=1 for alternating layers. Absorption coefficient of approximately 1000/cm can be achieved at 1350 nm wavelength and with the application of microstructures, the quantum efficiency can be enhanced to >=30% and in some cases >= 40% and in some cases >=5Q% and in some cases >=60% and in some cases >= 70% or more at wavelength ranges 1250 nm to 1350 nm and longer. Staircase band gap Sii-xGex Si photodetectors, Lo et ai. Appl. Phys. Lett., Vol. 77, No. 10, 4 September 2000 (incorporated by reference herein) discusses a staircase layer structure used with each layer having a different x ranging from 0.12 to 0.33 and 200 nm thick per layer for 9 layers resulting in a wavelength response ranging from 900 nm to over 1 100 nm with at peak at approximately 975 nm. With the addition of microstructures such as holes and/or pillars, with enhancement in the absorption, the quantum efficiency can be enhanced from 40% to 70 % or more over the wavelength range of 900 nm to 1 150 nm and in some cases from 1000 nm to 350 nm and in some cases from 1250 to 350 nm which can be a factor of 2 to 10 greater than the QE of a similar structure without microstructures.
[00286] Enhancement of the infrared detection efficiency of silicon photon- counting avalanche photodiodes by use of silicon germanium absorbing layers, Loudon et a!., OPTICS LETTERS / Vol. 27, No. 4 / February 15, 2002
(incorporated by reference herein) discusses a GeSi on Si APD with multiple quantum wells of Si/SiojGeo.s where the Si layer range from 8-7 nm and the well Sio Geo.s is 3.5 nm and repeated 25 times for a peak wavelength response at 1210 nm. By increasing the x to 0.4, for a well of Sio.eGeo.4 and by varying the well thickness to 14 nm and barrier (Si) to 11 nm, and with 25-70 periods of the quantum well, absorption coefficient of approximately 300-1000/cm can be obtained. The layer can also be superlattice or multilayers where Sio.6Geo.4 can have thicknesses ranging from 20nm to 2500 nm and Si layer can have
thicknesses ranging from 10 nm to 1000 nm for example. The I absorbing layer of Ge, GexSi i-x, Si is not intentionally doped (Intrinsic), with doping background of < 5x1016/cm3 and in some cases <= 1x1016/cm3 and in some cases <=1.5x1015/cm3. Microstructures are formed in the I absorbing layer and the anode (for P-l-N configuration) layer to enhance the absorption by 2-10 times or more and can result in a quantum efficiency of 30% to 70% or more for wavelength ranges where without microstructure enhancement would be < 30% for example.
[00287] In FIG. 37C, GexSh-x alloys of different fraction of Ge can be grown in multilayers, as shown, X vary between 0 and 0.4 for alternating layers, it should be noted that adjacent layer can have different x value and/or thicknesses. Other variations in x in the layers are also possible such as non-periodic variations, periodic and random/pseudo-random variations, in some cases, the Geo^Sio.e layer can be 300 nm and the Si layer can be 30 nm and repeated 7 times and in some cases the Gec Sio.e layer can be 500 nm and the Si layer 50 nm and repeated 4 times, and in some cases Get Sio.e can be 2000 nm and Si layer 300 nm and the Si layer on top can be the anode for example and the Geo.4Sb.6 layer the I absorbing layer growth epitaxiaily on N silicon layer that can form the cathode.
[00288] The addition of microstructures such as holes and/or pillars and/or other geometric or non geometric shapes of either voids and/or protrusions can enhance the absorption by 2 to 10 times or more and in some cases 2 to 30 times or more and in some cases 2 to 50 times or more, resulting in a quantum efficiency that is higher than a similar structure without microstructures.
[00289] Critical layer thicknesses as a function of x for GexSii-x is given in Calculation of critical layer thickness versus lattice mismatch for GexSii-x/Si Strained layer heterostructures, People et aL AppL Phys. Lett. 47 (3), 1 August 1985 (incorporated by reference herein and referred to herein as "People et al."). Strain and bandgap as a function of x for GexSii-x are shown in Past, Present and Future: SiGe and CMOS Transistor Scaling, Kuhn et al., ECS Transactions, 33 (6) 3-17, 2010 (incorporated by reference herein).
[00290] For example at x=0.4 for for GexSh-x, 20 nm of Geo.4Sio.6 and 5 nm of Si pair can be grown for a total of 80 pairs for a thickness of 2 microns of Geo^Sb.e/Si/ Geo.4Sio.6 superiattice for the I -GeSi absorption layer of a P-i-N on Si PD/MAPD for wavelength ranges of 1250-1350 nm for example.
[00291] For x =0.2, 00 nm of Geo^Sb.s can be grown, a multilayer structure of 100 nm Geo^Sb.s and 10 nm Si pair for a total of 18 pairs for 2 micron thick I-
Geo 2Sio.a/Si/ Geo.aSb.s absorption layer of a P-i-N (or N-l-P) on Si MPD/MAPD (for MAPD, the layers are P(GeSi)-l(GeSi multilayer absorption-P Si-i Si-N Si) for wavelength operation in the range 850-950 nm and in some cases 820 to 980 nm and in some cases 820 to 1000 nm. The MPD/MAPD can have QE >+ 30% and in some cases >=40% and in some cases >=50% and in some cases >=60% and in some cases >=70% and in some cases >=80%.
[00292] Other layer thickness are also possible, GeSi layers can range in thicknesses from 3 nm to 2000 nm and Si layer thicknesses can range from 2 nm to 2000 nm, depending on the x and strain on the layers.
[00293] FIGs. 38A and 38B are a top view schematic diagram and an SEM micrograph of a microsfructured photodiode, according to some embodiments. Light impinges normal and/or almost normal to the plane containing the holes 3822 on this example N-i-P device. The ring ohmic contact 3828 is on the N layer 3810; a mesa with edge 3882 is etched to expose the P layer 3806 with P ohmic contact 3830. P electrode 3890 is attached to the P ohmic contact 3830 and the N electrode 3880 is attached to the N ring ohmic contact 3828. Note that light can impinge on the holes at an angle ranging from 0 (normal) to 60 degrees off normal or more and all angles in between. In addition, for wavelengths greater than 980 nm, light can also impinge from the substrate side with or without a via.
[00294] On a SOI wafer, some basic steps for a N-l-P (can also be P-l-N with P and N interchanged) photodiode, can include: (1) photolithography mask and hole etch (dry etch); (2) thermal oxide passivation; (3) photolithography mask (or just mask) ring N ohmic and e-beam deposit N ohmic metal such as Ti, AI, Pt; (4) mask N mesa electrical isolation and etch to P layer or ion implantation for electrical isolation such as O ion and/or diffusion of dopants; (5) mask and P mesa and etch to Si02 layer; (6) mask P ohmic contact and deposit P ohmic metal such as Ti, Ai, Pt; (7) rapid thermal anneal; (8) mask polyimide and/or dielectric such as
SiOx/SiNx for bridge of bond pad electrode to N ohmic; and (9) mask and deposit bond pad electrodes of Ti, AI. Steps such as oxide etch are not shown for simplicity. Other steps such as dielectric etch masks, dielectric passivation of mesa, holes, anti reflection coating, to name a few are not shown for simplicity.
[00295] The scanning electron micrograph of FIG. 38B shows a 30 micron diameter N mesa microstructured PD with holes of 0,5 microns diameter approximately that are tapered. Other hole diameters are not shown and can range from 0.2 to 2.5 micrometers diameter and in some cases 0.5 to 1.3 micron diameters and in some cases 0.6 to 1.3 microns in diameter. Processing can cause dimension variations as much as +/- 2-20%.
[00296] Electrical RF and DC probes are attached (wire bond, solder bumped, integrated electrodes to Si/GeSi electronics) to the cathode N electrode and the anode P electrode where a reverse bias is applied and also where the electrical signals from the MPD/MAPD are transmitted to electronics for further signal processing and communication. The PD and APD are integral part of an optical receiver for data communication applications in data centers, short reach, coarse wavelength division multiplexing (CWDM), medium reach, long reach, fiber to the home, local area network, storage area network, metropolitan area network, long distance telecom, to name a few.
[00297] The MPD in FIG. 35 and the MAPD in FIG, 36 can also have light impinging from the substrate side where the Si substrate can be polished and/or a via is etched to remove part of the substrate in the path of the light for wavelengths where Si mostly transparent such as greater than 000 nm in wavelength, in some cases 900 nm or greater and in some cases 1200 nm or greater.
[00298] As shown in FIG. 35, a microstructured Ge and/or GeSi alloy
photodiode on SO! Si substrate and in FIG, 38, a microstructured Ge and/or GeSi alloy avalanche photodiode on SOI Si substrate, both the PD and MAPD can be also fabricated on Si substrate without the buried Si02 layer, in both P-l-N PD and P-l-P-l-N MAPD, the Si substrate can be N type Si substrate for example. The P and N can be interchanged to have a N-l-P MPD and N-i-N-i-P MAPD on P type Si substrate for example. And for certain wavelength of light, the light can be incident from the substrate side where the substrate can be polished and/or a via can be etched to remove part of the substrate to allow light to reach the absorbing I layer of the photodetector. Wavelengths can range from 850 nm to 1800 nm, and in some cases 850 nm to 1000 nm, and in some cases 950 nm to 1300 nm, and in some cases 900 to 1650 nm, and in some cases 1000 to 1650 nm, and in some cases 1200 nm to 1750 nm.
[00299] The Ge and GexSii-x alloy with x <= 0.4 for example and in some cases x <= 0.3 and in some cases x <= 0.2 and in some cases x<=1 microstructured photodiode (MPD) and microstructured avalanche photodiode (MAPD) can be integrated with CMOS Si/GeSi electronics into an array of photodetectors and its associated electronics that can be compatible with 100G-CLR4 datacenter applications. See, 10QG-CLR4; https://www.clr4-alliance.org/media/doc/100G- CLR4-Specification_v1 p52_FINAL (incorporated by reference herein). The center wavelengths for Coarse wavelength division multiplexing Long Reach 4x25 Gb/s (1 QQG-CLR4) are: lane L0: 1271 nm with a range approximately 1264 nm- 1278 nm; lane L1 : 1291 nm with a range approximately 1284 nm-1298 nm; lane L2: 1311 nm with a range approximately 1304 nm-1318 nm; lane L3: 1331 nm with a range approximately 1324 nm-1338 nm.
[00300] The integration of the MPD and MAPD can significantly reduce the cost of the optical receiver.
[00301] For short reach (< 100 meters to 300 meters) 100G-SR4 (Short Reach 4x25 Gb/s) and 100G-CSR4 (Coarse wavelength division multiplexing Short Reach 4x25 Gb/s), see, e.g. SWDM Strategies to Extend Performance of VCSELs over MMF Kocot et al., OFC 2016, Tu2G.1 (incorporated by reference herein). For optical receivers used in data center applications the wavelength is typically centered at 850 nm and in some cases a range approximately 805 nm - 880 nm and in some cases a range approximately 800 nm -1000 nm and in some cases a range approximately 850 nm -950 nm. See, 8S0~950nm Wideband OM4
Muitimode Fiber for Next Generation WDM Systems, Molin et a!., OFC 2015 MSB (incorporated by reference herein). Either Si PD and MAPD can be utilized and/or GeSi (also written SiGe) alloy MPD and MAPD can be utilized. In some cases in an array some MPD/APD can be Si and/or some can be GexSh-x alloy MPD/APD where x can range form 0 to 1 and in some cases 0 to 0.4 and in some cases 0 to 0.3 and in some cases 0 to 0.2 and in some cases 0 to 0.1 and in some case x =0.4 and in some cases x <= 0.85. Integration of the MPD/APD with Si and/or GeSi CMOS electronics can significantly reduce the cost of the optical receiver, in addition, arrays of MPD and/or MAPD with Si and/or GeSi electronics can also significantly reduce the cost of packaging of the optical receiver.
[00302] In Si MPD and Si MAPD and/or Ge/GeSi /Si (combinations of Ge and/or GeSi and/or Si) MPD/APD the data rate bandwidth can be >= 5 Gb/s and in some cases >= 10 Gb/s and in some cases >= 25 Gb/s and in some cases >= 40 Gb/s and in some cases >= 45 Gb/sand in some cases >= 50 Gb/s (where >= means greater than and/or equal to).
[00303] In GeSi absorbing I layer MPD/APD, it is advantageous to have the regions cladding the absorbing I GeSi layer to have a larger bandgap than that of the absorbing GexSii-x layer where x can be > 0 but less than or equal to 1. For example if x=0.4, the cladding region can have GexSh-x with x of 0 and/or < 0.4 and in some cases x=0 and/or 0.3 and in some cases x=0 and/or < 0.2 and in some cases x=0 and/or < 0.1 so that photons are absorbed less in the regions cladding the I absorbing region such as the P and N regions. The number of photocarriers generated outside the high field I absorbing region is therefore reduced, and associated degradation of data rate bandwidth and/or the quantum efficiency can be avoided.
[00304] FIG. 39 is a top view schematic diagram of a MPD/MAPD with irregular hole diameters and spacings, according to some embodiments. The device is similar to that shown in FIG. 38A and 38B except for the size and distribution of the microstructured holes 3922. In some cases random hole diameters and/or spacings can be formed and in some cases the hole diameters and spacings can be weighted to tune the absorption characteristics at a certain wavelength and wavelength span. In some cases the holes can have the same diameter and the spacing is irregular while in other cases the spacing can be regular and the hole diameter is varied. The advantage to coupling of resonators with slightly different characteristics is to broaden and flatten the absorption/QE characteristics verses wavelength. The hole diameters can have variations in the range 1-10 percent, the spacing variations in the range of 1-10% and the hole depth can also vary in the range 1-10%, and in some cases the hole diameter can vary in the range 3-20%, the spacing 2-20% and the depth 3-20% and in some cases the hole diameter can vary in the range 0-50% or more, spacing 0-50% or more and depth 0-50% or more.
[00305] P-l-N or N-l-P on Si and/or SOI PD and P-l-P-l-N or N-l-N-l-P on Si and/or SOI APD layers can be composed of Ge Sii-x where x can have values in the range from 0 to 1 and in some cases the absorbing I layer can have multiple layers also composed of GexSh-x where x can have values in the range from 0 to 1. Each layer can have its own x value in the range 0 to 1. In ail Si MPD, MAPD, the x=0 for all layers is a special case. Doping of the layers, hole/pillar diameters and spacings, etch depths, wavelengths, bias voltages, data rate bandwidths as given for Si, Ge, GexSh-x MPD/MAPD previously also apply to this variation in layer composition.
[00308] FIG. 40A is a plot showing experimental results of a 30 micron
(micrometer) diameter Si MPD device, as shown in FIG. 38B. The device structure is according to FIG. 27C but with the P and N interchanged, from a P-l-N to a N-l-P Si MPD. The hole pattern is hexagonal. Hole diameters are 700 nm with a period of 1000 nm. The holes are etched substantially through the I layer, possibly into the P anode layer and possibly to the SiOs layer. Dry etch rate for different hole diameters are different, with smaller hole diameters etching slower than large hole diameter microsfructures.
[00307] FIG 40A shows the impulse response of the 30 micrometers diameter Si MPD. Responding to a mode locked femtosecond 850 nm laser pulse, the electrical signal from the Si MPD is collected and displayed on a sampling scope using a RF probe to the Si PD coplanar transmission line attached to the N cathode and the P anode ohmic metals (not shown in the scanning electron micrograph of FIG. 38B). In addition, the Si MPD is reversed biased to -3 to -4 volts though a bias T that is connected in series to the transmission line between the sampling scope and the Si MPD. A Full Width Half Maximum (FWHM) of the pulse width is measured to be 30 picoseconds (ps) which corresponds to approximately 14.7 GHz -3dB bandwidth using the formula AtAf = 0,44, where At is the FWHM of the impulse response and M is the -3dB bandwidth of the frequency response. Converting GHz to Gb/s, the following formula is used, Gb/s= GHz/0.675. This results in a 21.7 Gb/s data rate bandwidth. Another conversion factor between GHz and Gb/s can be 0.5 which gives a Gb/s of 29.4 Gb/s. The conversion factor can be bit pattern dependent.
[00308] FIG. 40B is a plot showing experimental results of the measured QE (quantum efficiency) of different hole diameters/periods and MPD diameters verses wavelength from 780 nm to 900 nm, according to some embodiments. QE for the 500 micrometer diameter Si MPD (FIG. 27C) test structure with hole diameter of 700 nm and period of 1000 nm showed approximately 60% QE at 780 nm and monotonicaliy decreased to 38-40% QE at 900 nm wavelength. Note that the Si MPD had not been optimized in terms of layer structures, doping concentration, microstructure dimensions; the MPD can be further optimized or improved. Under such optimizations the QE is expected to improve by 10-20% or more.
[00309] FIG. 41 is a plot showing the calculated QE verses wavelength for a MPD having a two-micron Si absorbing layer, according to some embodiments. The QE is plotted for wavelengths from 750 nm to 980 nm. Also plotted are the QE with the absorption coefficient enhanced by 3X, 5X, 7X and 9X. Superposed on the calculated QE is the measured QE for the Si MPD with hole diameter 700 nm and period of 1000 nm of a structure similar to FIG. 27C.
[00310] The experimental QE shows that from approximately 780 nm to 840 nm the QE fails roughly on the 5X enhancement of the Si absorption coefficient, and from 860 nm to 900 nm the experimental QE falls roughly on the 7X enhancement of the Si absorption coefficient. At longer wavelength as the absorption of Si becomes weaker, the enhancement becomes more pronounced due to the microstructures on the Si MPD device. [00311] The enhancement of the QE at 780 nm is approximately 300% and at 900 nm is approximately 860% observed experimentally on a non-optimized Si MPD. As compared to prior art solar cell nanostructures, in many cases solar cells with nanostructures had worst QE than solar cells without nanostructures. In a few cases, the improvement in the QE for solar cells with nanostructures was 5% or less over a comparable solar ceil without the nanostructures.
[00312] According to the present disclosure, using microstructures to enhance the QE of a photodetector applies to ail material whose QE can be enhanced with microstructure over that of a similar structure without microstructures at certain wavelengths. Enhancement of QE with microstructure can be >= 50%, in some cases >= 200%, in some cases >=300%, in some cases >=50Q%, in some cases >= 1000%, in some cases >= 1500%, in some cases >= 2000% and in some cases >= 5000% at certain wavelengths where without microstructures, the absorption is less than 50%, in some cases <= 40%, in some case <= 30%, in some cases <=20%, in some cases <= 10%, in some cases <= 5% and in some cases <=2%.
[00313] Application of microstructures for enhancement of absorption and enhancement of QE by over 10% and in some cases over 100% and in some cases over 200% as compared to a similar structure without microstructures for enhancement, applies to other material besides Si, Ge, GexSii-x for x <= 1 , including lil-V material family, li-VI material family, organic material, glassy material, carbon like material, semiconductors, semimetais, metal, insulators, which in some cases can be a MPD/ APD, and in some cases for image sensing and in some cases for data and tele-communications and in some cases for energy harvesting and in some cases for analytical sensing and in some cases for image storage and in some cases for optical storage. The hole diameter (or at least one lateral dimension) can range from 100 nm to 5000 nm and the spacing (regular or irregular distribution, edge to adjacent edge) can range from 0 nm (touching and/or overlapping) to 5000 nm for materials such as semiconductors, dielectrics, metal, F-cenfers in glass, glass, polymer, semiconducting polymers, graphene to mention a few.
[00314] According to some embodiments, the techniques described herein can be applied to forward bias devices to enhance the gain of a material such that a microstructured emitter ME and/or microstructured laser ML can emit light for lighting applications and/or as a light source for optical data communication. And in some cases for imaging, and in some cases for optical telecommunication and in some cases for fiber to the home and in some cases for lighting and in some cases for free space optical communication.
[00315] FIG. 42 is a plot showing the data rate bandwidth in Gb/s and the enhancement of the quantum efficiency in percent verses thickness of the i layer of a Si MPD (and APD for unity gain) with 30 microns diameter, as shown in the scanning electron micrograph of FIG. 38B, and a structure as shown in FIG. 27B or 27C. For an I layer approximately 2 microns thick, and an enhancement of the absorption by 7 times, the QE can be approximately 50% or more and the data rate bandwidth can be 25 Gb/s or more at 850 nm signal wavelength. For higher data rate bandwidth, the ! layer should be thinner, for example at 1 micron thick, and with a PD/MAPD diameter of 30 microns, the data rate bandwidth can be approximately 48 Gb/s or more and the QE can be >= 80% with an absorption enhancement of 20 times. The data rate bandwidth curve is the solid line and the vertical scale are on the right of the plot, the QE are the dotted lines and the vertical scales are on the left of the plot.
[00316] FIG. 43 is a plot showing data rate bandwidth and QE with absorption enhancement for a 30 micron diameter Ge on Si MPD, according to some embodiments. Data rate bandwidth and QE with absorption enhancement is shown for 1550 nm wavelength verses the i Ge layer absorbing thicknesses. The structure is similar to that shown in FIG. 22B and can be on Si substrate and/or SOI. The wavelength can range from 1350 nm to 1550 nm and in some cases 1250 nm to 1350 nm and in some cases 1350 nm to 1650 nm or longer.
[00317] The data rate bandwidth at a I Ge layer thickness of 2 microns can be approximately 20 Gb/s and with an 8 times enhancement of the absorption using the microstructures. A QE of 50% or more at 1550 nm signal wavelength can be achieved. The solid curve is the data rate bandwidth with the vertical scale on the right and the dotted curves are the QE with the vertical scale on the left. A similar structure without microstructure enhancement and with the Ge layer not under significant stress that the bandgap can narrow, the QE is less than 10% for a 2 microns thick absorbing I Ge layer at 1550 nm. This is for unstrained Ge on Si. [00318] For higher data rate bandwidth, keeping the diameter of the Ge on Si MPD at 30 micrometers, a i Ge layer of 1.5 microns can reach 25 Gb/s
approximately and the QE can be 50% or more with 1 1 times absorption enhancement at a wavelength of 1550 nm. For data rate of 60 Gb/s with 30 micrometers diameter Ge on Si PD, the ! layer is approximately 1 micron thick and a QE of 50% or more can be achieved with an absorption enhancement of 16 times or more by the microstructures at a wavelength of 1550 nm. With great absorption enhancements, for example greater than 16 times the QE will increase correspondingly. In some experiments, absorption enhancements can be as high as 60-70 times for example.
[00319] FIG. 44 is a plot showing data rate bandwidth and QE due to
enhancement of absorption verses I layer thicknesses for a GexSh-x on Si MPD, according to some embodiments. A Geo.2Sio.s on Si or GexSii-x where x<=0.2 on Si or SQI substrate was used. The MPD had a 30 micrometers diameter and the light was 980 nm wavelength. The I layer is Geo.2Sio.8 and the P and/or N layers can be Si and/or GexSii-x with x<=0,2 and can have thickness ranging from 0.1 microns to 2 microns. Doping levels for the P layer can range from 1x1018/cm3 to 2x1Q20/cm3, the I layer can be <= 5x1016/cm3 and in some cases <= 1x1016/cm3 and in some cases <= 1.5x1015/cm3 and the N layer can have doping in the range 5x1017/cm3 to 2x1020/cm3, The P and N doping ions are the same as used in standard silicon P and N doping process that is well known in CMOS and BiCMOS processing.
[00320] With a 2 micron thick Geo.2S .o I layer, the MPD (or MAPD with unity gain) and 30 micron diameter, a data rate bandwidth of approximately 25 Gb/s can be achieved and with an absorption enhancement of 6 times by the microstructure holes (or pillars) with dimensions and spacing's as given in tables in FIG. 21A, 22A and 27A. Also for the ranges given elsewhere in this description, and for example for semiconductor MPD/MAPD, the hole diameter can range from 250 nm to 3000 nm and spacing can range from 0 nm to 5000nm.) a QE of 50% or more can be achieved at 980 nm wavelength. The wavelength ranges can span 850nm to 950 nm, in some cases 850 nm to 980 nm, in some cases 840 nm to 980 nm, in some cases 950 nm to 1000 nm, and in some cases 810 nm to 1000 nm.
[00321] The solid curve is the data rate bandwidth with the vertical axis given on the right and the dotted curves are the QE with the vertical axis on the left. [00322] A one micron thick Geo aSio.s i layer with a 30 micron diameter PD (MAPD) can achieve a data rate bandwidth of 50 Gb/s and a QE of 50% or more with a microstructure enhanced absorption of 12 times over the bulk absorption coefficient at a wavelength of 980 nm. With higher enhancement of the bulk absorption coefficient by the microstructures, higher QE can be achieved. Without enhancement of the absorption coefficient by microstructures, the QE for 2 micron and I micron I layer is less than 12% and 5% respectively.
[00323] FIG. 45 is a plot showing data rate bandwidth and QE due to
enhancement of absorption verses I layer thicknesses for another GexS -x on Si MPD, according to some embodiments. The device is a 39 microns diameter MPD as in FIG. 44 with a Geo.4Sio.6 1 layer cladded with Si and/or GexSii-x with x<=0.4 P anode and N cathode layers with the same doping and thickness ranges as the FIG. 44 MPD on Si and/or SOI. The solid curve is the data rate bandwidth with the vertical axis on the right and the dotted curves are the QE with and without absorption enhancement by microstructures at 1300 nm wavelength with the vertical axis on the left as a function of I layer thickness ranging from 0.1 microns to 3.5 microns. For a 2 micrometers thick I Geo.4Sio.e layer, the 30 micron diameter MPD (MAPD) can achieve 25 Gb/s approximately and a QE of approximately 50% or more with a 1 1 times or more absorption enhancement by the microstructures at 1300 nm wavelength. With a 1.5 mictometers thick I layer, the data rate bandwidth can achieve approximately 50 Gb/s and with 15 times or more absorption enhancement, the QE can be 50% or more at 1300 nm wavelength. The wavelength can span from 1250 nm to 1350 nm and in some cases from 1000 nm to 1300 nm and in some cases from 950 nm to 1300 nm.
[00324] The microstructures can be holes, cavity, pillars, protrusions and one of the lateral dimension can range from 100 nm to 5000 nm, and the spacings can be periodic and/or non periodic and can range from 0 nm (touching and/or overlap) to 5000 nm or more, measured at the adjacent edges of the microstructure. The depth or height of the microstructure can range from 50 nm to 10000 nm and in some cases 300 nm to 5000 nm. in addition, the microstructure can vary in lateral dimension(s) as a function of depth and/or height. The lateral dimension can have multiple dimensions and each of these dimensions can vary the same and/or differently as a function of depth and/or height. In the case of a trench, the lateral dimensions can range from 00 nm to 80000 nm or more for example. These dimensions apply to MPD/MAPD made from semiconductor, non-semiconductor, dielectric, polymer, metallic, carbon like, glass, type of materials to name a few.
[00325] FIG. 48 is a plot illustrating the effect of microstructures and bond pads on capacitance and their effect on the data rate bandwidth, according to some embodiments. Integration of the MPD/MAPD with electronics on a single chip bypasses the need for bond pads and reduces parasitic capacitance. The PD and PD have an I layer thickness of 2 microns. The vertical axis is the data rate bandwidth in Gb/s (at -3dB roll-off) and the horizontal axis is the diameter of the PD or MPD.
[00326] The solid curve is for a Si MPD with holes of 1000 nm in diameter and a period of 2000 nm etched to a depth of 2300 nm as an example and shows that the MPD has over 25 Gb/s data rate bandwidth for MPD with diameter up to 00 microns, whereas a similar PD (photodiode) without microstructures shown in the dash line, for 25 Gb/s the maximum diameter is about 60 micrometers. In both the solid and dash curves are for PD and MPD that are integrated with electronics on a single silicon chip such that parasitic capacitance due to bond pads are
significantly reduced.
[00327] The dotted line shows the PD without microstructures with bond pads that add extra parasitic capacitance that can degrade the data rate bandwidth and limit the data rate bandwidth to 20 Gb/s with a PD diameter of 20 microns. In some cases, 25 Gb/s can be achieved with 30 micrometers diameter PD/ PD with bond pads that have less parasitic capacitance. However, for higher data rate bandwidths, the PD diameter are reduced to less than 30 microns (micrometers) diameter and in some cases to 20 microns diameter or less in the case of PD with bond pads. By integrating the PD/MPD/MAPD with electronics on a single silicon chip significantly reduce the parasitic capacitance, resistance and inductance and allow a larger area MPD/MAPD for the detection of optical signal. The larger area greatly reduces the cost of packaging by relaxing the alignment tolerance of the optical components to focus the signal light into the MPD/MAPD. At data rates of > 40 Gb/s, the diameter of an integrated PD/ PD/MAPD can be as much as 1.2 times and in some cases 2 times or more than a comparable PD/MPD/MAPD that is not integrated but requires bond pads to connect the PD/MPD/MAPD to signal processing electronics and amplifiers such as transimpedance amplifier (TIA).
[00328] FIG. 47 is a plot showing the data rate bandwidth and QE vs. 1 layer thickness for a Ge on Si MAPD such as in FIG. 36 but with the 1 GexSii-x layer with x = 1 rather than 0,4, with a 30 micron diameter mesa. Other I layer structures can have multiple layers of GexSii-x for various value of x <= 1 and various thicknesses to such that each individual layer is not above the critical thickness for a given x (see, People et ai.) for example and with the average dielectric constant of the multilayered I layer used in the calculation of the capacitance, in addition with holes, the capacitance can be further reduced.
[00329] As shown in FIG. 47, the data rate bandwidth is shown in dotted lines with various avalanche gain, from 0 dB gain to 9 dB gain. As gain increases, the data rate bandwidth decreases due to the avalanche time. The avalanche layer thickness is 0.5 micrometers; for a gain of 2x the avalanche transit time is increased by 2x and for a gain of 4x the avalanched transit time is increased by 4x. For a Ge on Si MAPD, with 2 microns I Ge layer and 30 micron diameter mesa, the data rate bandwidth at -3 dB can be over 15 Gb/s with 6 dB avalanche gain.
Together with the microstructure enhancing the absorption further by 5 times, the QE can be in excess of 200% at a wavelength of 1550 nm as shown by the solid curve. Compared to a similar structure Ge on Si APD without microstructure, the QE after 6 dB avalanche gain at 1550 nm wavelength would be approximately 36%. The improvement of the QE of the MAPD as compared to an APD for Ge on Si at 1550 nm is over 500%.
[00330] The wavelength can span from 1350 nm to 1650 nm, in some cases from 1250 nm to 1350 nm, in some cases from 1200 nm to 1700 nm and in some cases 1500 nm to 1600 nm. Other wavelengths are also possible for wavelengths where with the addition of microstructures. The QE can be improved by 40% or more over a similar structure without microstructures. in some cases the improvement can be >=60%, in some cases >=100%, in some cases >= 200% and in some cases >=500%.
[00331] FIG. 48 is a diagram showing a possible Si PD P-l-N on SOI or on Si structure with different depths of microstructure hole etch, according to some embodiments. The holes 4812 shown in dotted lines can be etched to the Si02 layer of ihe SOI, through the I layer and/or partially through the i layer. The hole diameters and spacings/periods are given supra for Si MPDs. Wavelengths, QE and data rates are also as given supra. Doping of B for P type and As for N type are preferred, other dopants such as Ai, P, C, to name a few can also be used, but according to some embodiments dopants are used that are commonly used in CMOS/BiCMOS processing such that integration of the MPD with electronics can be accomplished in the same lab or fab using same or similar fabrication equipment's. The MPD typically is fabricated after most of the electronics steps are processed and certain steps for example thermal treatments/passivation can be combined with thermal treatments/passivation used in CMOS/BiCMOS processing.
[00332] in addition, the I layer thickness can range from 0.5 to 5 microns, in general the P and N regions are kept as thin as possible and still have a sheet resistance of less than 100 ohms so that photons are not lost by absorption in the P and N regions to maximize or increase the QE.
[00333] FIG. 49 is a diagram showing layer structures for a Geo.4Sio.6 on Si MPD P-!-N on Si or SOI, according to some embodiments. The microstructure holes 4912 can be etched to the oxide layer of the SOI, and/or through the i layer and/or partially through the I layer. Examples are shown in the dotted line representation.
[00334] According to People et ai., the critical layer thicknesses for various fractions of Ge in GeSi is given in FIG. 1 of People et ai. For x^O.3 in GexSii-x the critical layer thickness is 50 nm. A Geo.sSio ? layer of thickness 150 nm is grown that is N type with As or P doping of >=3x1019/cm3 on N Si with similar doping. A Geo 4Sio.8 1 layer is grown with doping if any of <= 5x1016/cm3, in some cases <= 1x1016/cm3 and in some cases <= 1.5x1015/cm3 for a thickness of 2 microns (or ranging from 0.5 to 5 microns). The I layer can be "un-strained" since the x difference between the bottom GeSi N layer and the GeSi I layer is 0.1. A
Geo.2Sio.8 P layer of 0.3 microns thick follows with doping of >= 1x 020/cm3 of B ions for example. Microstructured holes 4912 are etched to the oxide layer of the SOI, through the i layer and/or partially through the I layer. Microstructured hole diameters can range from 300 nm to 5000 nm for example and spacing can ranging from 0 nm (touching and/or overlapping) to 5000 nm for the enhancement of absorption of photons with wavelengths ranging from 850 nm to 1350 nm, in some cases from 1250 nm to 1350 nm, in some cases 840 nm to 1300 nm and in some cases 1250 nm to 1550 nm. Data rate bandwidths can be >=1 Gb/s, >= 5 Gb/s, >=1 QGb/s, >=20 Gb/s, >=25 Gb/s, >= 40 Gb/s, and in some cases >= 50 Gb/s. QE can range from >=30% , >= 40%, >=50%, >=60%, >=70% and in some cases >= 80% for certain wavelengths mentioned above.
[00335] FIG. 50 is a diagram showing a multi!ayered I layer according to some other embodiments. The I layer is similar to FIG. 49, except that the I layer is Geo.4Sio.8 of 0.2 microns and Geo^Sio.s of 0.01 microns repeated 10 times for a total I layer thickness of 2.1 microns grown on N type Si with doping of >= 3x1019/cm3 of As or P of 0.5 microns thick on SOI or Si substrate. Wavelengths, hole diameters, spacings, data rate bandwidths and QE are similar to the structure discussed in FIG. 49.
[00336] FIG. 51 is a diagram showing a P-l-N structure with a strained Geo.sSio.s I layer cladded by P Si on top and N Si on bottom, according to some
embodiments. The cladding by P Si on top and N Si on bottom can cause strain on both surfaces of the I layer. The added strain can narrow the Geo.2Sio.8 1 layer bandgap further such that weak absorption, around 1000/cm or less, can occur at wavelengths of 950 nm or greater. A microstructure Geo^Sio.s on Si MPD with hole diameters ranging from 300 nm to 3000 nm and spacing ranging from 0 nm to 3000 nm and etch depth can range from etching to the oxide layer of the SOI and/or through the I layer and/or partially through the I layer. Wavelength can range from 840 nm to 990 nm, in some cases 850 nm to 950 nm, in some cases 850 nm to 1000 nm, in some cases 850 nm to 1250 nm, in some cases 950 nm to 1350 nm and in some cases 1250 nm to 1350 nm. Date rate bandwidth can range from >= 3Gb/s, >=5 Gb/s, >= 10 Gb/s, >=20 Gb/s, >= 25 Gb/s, >= 40 Gb/s, >= 50 Gb/s. QE can range from >= 30%, >=40%, >= 50%, >= 80%, >=70% and in some cases >= 80% enhanced my microstructures. The QE can be enhanced by microstructures by 2 to over 0 times over a similar structure without
microstructures at certain wavelengths.
[00337] FIG. 52 is a diagram showing another variation of a P-l-N MPD, according to some embodiments. The MPD is similar to that shown in FIG. 51 where the I Geo.2Sio.8 layer is grown on a Geo.iSio.g N layer with doping >=
3x1019/cm3 of 0.1 microns thick such that the difference in x is 0.1 between the layers to reduce the strain. In addition, the P GeSi layer is 0.05 fraction Ge with doping of >= 1x1020/cm3 and is 0.3 microns thick.
[00338] In all cases, the GeSi layers can have Ge fraction x varying from 0 to 1 , and doping varying by +/- 10 times and in some cases +/- 5 times. Thicknesses can also vary in the range of +/- 50% and in some cases minus 50% and plus 100% or more.
[00339] FIG. 53 is a diagram showing the P-l-N layer structure of a PD on Si or SOI with multiple layers for the I region, according to some other embodiments. The I region is composed of layers of Geo.sSio.s of 0.2 microns and Si of 0.01 microns repeated 10 times for a total layer thickness of 2.1 microns between P Si with doping >= 1x1020/cm3 of 0.3 microns thick and N Si with doping >= 3x1019/cm3 of 0.5 microns thick. Microstructure holes, shown in the dotted lines, can be etched to the oxide layer of the SOI and/or through the I layer and/or partially through the I layer.
[00340] Hole diameters can range from 300 nm to 3000 nm and spacing can range from 0 nm to 3000 nm and etch depth can range from etching to the oxide layer of the SOI, through the I layer and/or partially through the I layer. Wavelength can range from 840 nm to 990 nm, in some cases 850 nm to 950 nm, in some cases 850 nm to 1000 nm, in some cases 850 nm to 1250 nm, in some cases 950 nm to 1350 nm and in some cases 1250 nm to 1350 nm. Date rate bandwidth can range from >= 3Gb/s, >=5 Gb/s, >= 10 Gb/s, >=20 Gb/s, >= 25 Gb/s, >= 40 Gb/s, >= 50 Gb/s. QE can range from >= 30%, >=40%, >= 50%, >= 60%, >=70% and in some cases >= 80% enhanced my microstructures. The QE can be enhanced by microstructures by 2 to over 10 times over a similar structure without
microstructures at certain wavelengths.
[00341] In all cases, a reverse bias range from -1 V to -20 V for MPD and ~6V to - 45V for MAPD is applied between the anode and the cathode such that the I region is depleted as much as possible or practicable at the applied reverse bias voltage.
[00342] FIGs. 54A and 54B shows some basic steps in epitaxial lateral over growth (ELOG) of Ge and/or GexSii-x where x can range from 0 to 1 on Si, according to some embodiments. See e.g. Ref: Oda et ai, Crystailinity
improvements of Ge waveguides fabricated by epitaxial lateral overgrowth, Japanese Journal of Applied Physics 55, 04EH08 (2018). The surface of the Si can be masked with SiOx and/or SiNx dielectric 5420 with openings 5422 ranging from sub microns to a few microns and where Ge and/or GeSi alloy can nucleate and initiate epitaxial grown. The Ge and/or GeSi epitaxial layer can grow laterally over the dielectric into a continuous planar layer where the layers can the doped P and N and also can have an undoped or low doped I layer between the P and N layer as shown in FIG. 54B. Microstructure holes 5412 can then be etched into the P-l-N Ge and/or GeSi and/or Si layers for a MPD and/or MAPD device. The layers dimensions and dopings and hole diameters and spacings are as given in the earlier discussions in this application.
[00343] FIG. 55 is a cross sectional schematic diagram showing a possible method of integrating a Ge and/or GeSi alloy on Si MPD/MAPD devices with CMOS and/or BiCMOS electronics, according to some embodiments. The electronics can be used to amplify, process, store, transmit, the electrical signal from the MPD/MAPD which converts an optical signal to an electrical signal. Only the basic steps are discussed for simplicity which can include: (1) etch 2-3 micron deep holes with 10-100 micron diameter (or diagonal) hole in CMOS/BiCMOS wafer; (2) deposit dielectric on sidewails and Si surface with nano/micro feature opening to Si surface; (3) ELOG growth of GexSii-x X<=1 layers to form MPD and/or MAPD; (4) planarize with CMOS/BiCMOS surface; (5) fab CMOS/BiCMOS electronics; (6) Back End of Line (BEOL) process of MPD/MAPD; (7) etch
Microstructure holes/features 5512; (8) form mesa/isolation and form P and N ohmic; (9) connect MPD/MAPD Anode and Cathode to electronics, e.g. with electrode 5540. Many steps are not shown and the steps shown may or may not be in the same processing sequence. A reverse bias is applied to the anode and the cathode of the MPD/MAPD at ranges of -1 to -45 V. See, e.g., 310 GHz gain- bandwidth product Ge/Si avalanche photodetector for 1550 nm light detection, Duan et ai., 7 May 2012 / Vol, 20, No. 10 / OPTICS EXPRESS 11031 (incorporated by reference herein).
[00344] In all cases, light (also referred to as an optical signal) can impinge either from the top surface and/or from the bottom surface and in some cases via(s) are etched to remove most of the silicon in cases where silicon may still absorb significant fraction of the incident light also interchangeably called the optical signal. It is desirable that the substrate absorb less than 50% of the incident light at a particular wavelength; vias may be etched into the substrate such that less than 50% of the light is lost due to substrate absorption. Polishing and/or antireflection coating may be used to further reduce losses of the optical signal prior to reaching the I absorbing layer(s).
[00345] FIG. 56 is a cross section diagram showing a variation of the Si PD shown in FIG. 48. The microstructures such as cones 5612 and 5632 are etched on both the top and bottom surfaces for increasing the enhancement of absorption of the MPD for optical data communication. See, e.g., Absorption enhancement in doubie-sided nanocone hole arrays for solar cells] Zhang et al., Journal of Optics, vol. 17, (7) pp. 1-6, 2015 (incorporated by reference herein). The cones 5612 on the top surface, P surface, can have diameters ranging from 300nm to 3000 nm and with spacing ranging from 0 nm to 5000 nm and where the depth of the cone can range from to the oxide layer of the SOI and/or through the I layer and/or partially through the I layer. The angle of the cone from horizontal, can range from 45 degrees to 90 degrees in which case the hole is a cylinder. The cones can have multiple angles ranging from 30 degrees to 90 degrees. The cones 5632 on the bottom surface (substrate side) can be etched to the oxide layer of the SOI and/or through the oxide to the N layer and/or through the N layer. In cases where SOI is not used, the cone can etch to the N layer and/or almost to the N layer and/or into the N layer and/or through the N layer. Diameter of the cones can range from 200 nm to 5000 nm, and spacing can range from 0 nm (intersecting and/or overlapping) to 10000 nm. Angles of the cones can range from 30 degrees to 90 degrees and can have multiple angles.
[00346] The dimensions of the cone of the top and bottom surfaces can be different and/or the same.
[00347] A reverse bias is applied between the anode and cathode ranging from - 1V to -20V, light/optical signal impinging from the top P surface at a normal and/or almost normal angle ranging from 0 to 45 degrees off normal. Enhanced QE due to enhancement of the absorption can be by 2 to 20 times or more as compared to the QE of a similar structure without microstructures at a particular wavelength. The wavelength can range from 840 nm to 950 nm and in some cases 780 nm to 960 nm. The enhanced QE can be >= 30%, in some cases >= 40%, in some cases >=50%, in some cases >=8Q%, in some cases >=70% and in some cases >= 80% at certain wavelengths. The data rate bandwidth can be >= 3Gb/s, in some cases >= 5 Gb/s, in some cases >= 10 Gb/s, in some cases >=20 Gb/s, in some cases >=25 Gb/s, in some cases >= 40 Gb/s and in some cases >= 50 Gb/s.
[00348] In addition, ail or some of the bottom microsfructures 5832 can be coated (5640) with metal, such as Ag, Al, Au, Ni to name a few, and/or dielectric such as Bragg reflectors to prolong the photon interaction with the absorbing layers/regions for maximum or increased QE enhancement.
[00349] FIG. 57 is a diagram showing trapezoidal holes on both the top and bottom surfaces for a P-l-N structure similar to FIG. 52. Trapezoidal holes 5712 and 5732 can be etched into both the top and bottom surfaces. In addition, the holes of the top surface and the bottom surface can be different in both dimension and kind (shape),
[00350] The top surface holes 5712 can be etched through the I layer, and/or partially through the I layer and/or into the oxide layer of a SOI substrate.
icro structure hole dimension, diameter and/or diagonal, can range from 200 nm to 5000 nm and spacing can range from 0 nm to 5000 nm and the angle of the sidewall from horizontal, can range from 30 degree to 90 degree and different sidewalls can have different angles. In addition, sidewalls can have multiple angles.
[00351] The bottom holes 5732 can have dimensions, diameter/diagonal ranging from 200 nm to 10000 nm and spacing ranging from 0 nm to 10000 nm and can be etched to the oxide layer of the SOI, through the oxide layer, partially into the N layer(s) and/or through the N layers.
[00352] The holes can have different dimensions and different etch depths. Angle of the sidewall can range from 30 degree to 90 degrees and can have multiple angles and different sidewalls can have different angles.
[00353] A reverse bias is applied between the anode and cathode ranging from - 1V to -20V, light/optical signal impinging from the top P surface at a normal and/or almost normal angle ranging from 0 to 45 degrees off normal can give an enhanced QE due to enhancement of the absorption of 2 to 20 times or more as compared to the QE of a similar structure without microsfructures at a particular wavelength. The wavelength can range from 840 nm to 950 nm, in some cases 780 nm to 980 nm, in some cases 850 nm to 1000nm, in some cases 950 nm to 1250 nm, in some cases 1250 nm to 1350 nm and in some cases 850 nm to 1350 nm. The enhanced QE can be >= 30%, in some cases >= 40%, in some cases >=50%, in some cases >=60%, in some cases >=70% and in some cases >= 80% at certain wavelengths. The data rate bandwidth can be >= 3Gb/s, in some cases >= 5 Gb/s, in some cases >= 10 Gb/s, in some cases >=2Q Gb/s, in some cases >=25 Gb/s, in some cases >= 40 Gb/s and in some cases >= 50 Gb/s.
[00354] In addition, the bottom microstructures, all or some, can be coated (5740) with metal, such as Ag, Al, Au, Ni to name a few, and/or dielectric such as Bragg reflectors to prolong the photon interaction with the absorbing layers/regions for maximum QE enhancement.
[00355] FIG. 58 is a diagram showing a structure similar to the structure in FIG. 49 where holes are etched both on the top surface and bottom surface. The top surface holes 5812 are similar to holes etched in FIG. 49 and can be a conical shaped hole with same and/or varying diameters/diagonals and with same or different etch depth where the etch depth can be to the oxide layer of the SOI and/or through the I layer and/or partially through the I layer. The etch depth can also be to the N layer, partially through the N layer and/or through the N layer. The top microstructure holes 5812 can enhance the absorption of the photons 2 times or more and in some cases 4 times or more and in some cases 8 times or more and in some cases 12 times or more and in some cases 20 times or more.
[00356] Bottom holes 5832 can also vary in dimensions both laterally and in depth. The lateral dimensions can range from 100 nm to 10000 nm, the depth can range from 200 nm to 5000 nm, and the shape can be conical, pyramidal, rectangular, polygonal and can have sidewall angles ranging from 5 to 90 degrees and each sidewall can have same and/or different angles. The holes can all and/or some coated with metal and/or dielectric layers 5840 such as Bragg mirrors to help enhance the QE of the PD.
[00357] FIG. 59 is a diagram showing a GeSi alloy on Si APD, according to some embodiments. The I layer is Geo. Sio.6 with thickness range of 0.5 to 3.5 microns with doping, if any, less than 5x1016/cm3 and Geo^Sio ? with thickness range of 0.01 to 0.5 microns and with doping, if any, less than 5x1016/cm3, in some cases <= 1x1016/cm3 and in some cases <= 1.5x1015/cm3. The Si P layer (charge layer) has thickness ranging from 0.05 to 0.2 microns and with doping >= 1 017/cm3 of boron ions. The Si i multiplication layer has thickness ranging from 0.1 to 2 microns and with doping, if any, less than 5x1016/cm3, in some cases <= 1x Q 6/cm3 and in some cases <= 1.5x1015/cm3. The N Si cathode has thickness ranging from 0.2 to 10 microns and with doping > 5x1018/cm3 and in some cases >= 3x10 9/cm3 with P or As ions on N Si layer that can be on N Si substrate or SOL The top anode P layer can be Si or Geo.sSio.s with thickness ranging from 0.2 to 0.5 microns and with doping >= 1x102Q/cm3 of boron ions.
[00358] In all cases the GeSi alloy can have x value ranging from 0 to 1 , x value of 0.4, 0.3 and 0.2 are used in this example. Other x values such as 0.6, 0.8, 1 and 0 are also possible and will have different wavelength absorption characteristics. In this example, the wavelength can range from 850 nm to 1000 nm, in some cases from 1250 nm to 1350 nm, in some cases 1250 nm to 1550 nm, in some cases from 850 nm to 1650 nm, in some cases 900 nm to 1350 nm and in some cases 1400 nm to 1580 nm.
[00359] The holes 5912 can be conical with single and/or multiple sidewail angles from the horizontal, ranging from 10 to 90 degrees, trapezoidal also with single and/or multiple sidewail angles ranging from 5 to 90 degrees from the horizontal and cylindrical and/or rectangular holes and/or polygonal holes. The hole diameter/diagonal can range from 100 to 5000 nm and spacing can range from 0 nm to 6000 nm. The depth of the holes can be uniform and/or non-uniform and can range in depth from 100 nm to 10000 nm where the hole can be etched through the i layer, partially through the i layer. The diameter/diagonal of the holes can also be uniform and/or non-uniform. The spacing can be uniform and/or nonuniform. These microstrucfure holes are for enhancing the absorption of the APD.
[00380] The bottom can also have microstructures 5932 with various lateral dimensions and/or depth. Lateral dimensions of the microstructures can range from 100 to 10000 nm, depth or height can range from 10 to 100000 nm, and the shapes can have conical, poiygonal, trapezoidal, pyramidal, cylindrical,
rectangular. Sidewail angle from the horizontal, can vary from 5 to 90 degrees from the horizontal. The bottom microstructures can be coated with metal and/or dielectric 5940 such as Bragg reflectors preventing light from leaking out of the device. [00381] A reverse bias is applied between the anode and cathode ranging from - 0V to -45V, light/optical signal impinging from the top P surface at a normal and/or almost normal angle ranging from 0 to 45 degrees off normal can give an enhanced QE due to enhancement of the absorption by 2 to 20 times or more as compared to the QE of a similar structure without microstructures at a particular wavelength. The wavelength can range from 840 nm to 1350 nm, in some cases 1250 nm to 1350 nm, in some cases 850 nm to 1550nm, in some cases 950 nm to 1550 nm, in some cases 1250 nm to 1350 nm, in some cases 950 nm to 1650 nm and in some cases 1250 nm to 1650 nm. The enhanced QE can be >= 30%, in some cases >= 40%, in some cases >=50%, in some cases >=60%, in some cases >=70% and in some cases >= 80% at certain wavelengths. The data rate bandwidth can be >= 3Gb/s, in some cases >= 5 Gb/s, in some cases >= 10 Gb/s, in some cases >=20 Gb/s, in some cases >=25 Gb/s, in some cases >= 40 Gb/s and in some cases >= 50 Gb/s. Gain can be>= 2 (3dB), >= 4 (6dB), >= 8 (9dB) for example. The total QE where the enhancement and gain combined can be
>=100%, in some cases >=200%, in some cases >= 300%, in some cases
>=400% and in some cases >=500%.
[00382] Other GeSi alloy with Ge fraction x value can be used for the I layer, with x ranging from 0 to 1 and a strain layer with a x different by <= 0.2 can be used to reduce the strain of the GeSi alloy with the higher x value when growing on Si for example. The P layer can be GeSi with an x value that is less than the i GeSi x value for example.
[00383] In the I layers, doping if any, can be Intrinsic, background doping can be <= 5x1016/cm3, in some cases <= 1x1016/cm3, in some cases <= 2x1015/cm3, in some cases <= 1x1015/cm3 and in some cases <= 2x1014/cm3. The background doping can be p or n type, and in some cases n type. This can apply for both the I enhanced absorption layer(s) and the I Si multiplication layer.
[00384] FIG. 60 is a plot showing depletion width in microns with different l-iayer doping concentration as a function of reverse bias voltage, according to some embodiments. Typical operating voltages for a MPD range from -1 to -10 volts. As can be seen in the curves of FIG. 60, at -4V, with a background doping of 1.5x10i S cm-3, the depletion width of the I layer can be approximately 2 microns, and approximately 2.5 microns with a background doping of 1x1015 cm-3, for example. These are for abrupt P-l-N interface doping, in practice, the doping is less abrupt and has a diffusion front in an approximate Gaussian profile, which can result in wider or narrower depletion widths depending on doping concentrations.
[00365] With reverse bias voltage of -1 to -20 volts, the electric field in the I layer of thicknesses ranging from 0,5 to 5 microns, can range from 2x103 V/cm to 4x105 V/cm and in some cases 2x104 V/cm. Saturation velocity of approximately 7-9x106 cm/sec can be reached at the field strength of 2x104 V/cm. See,
http://www.ioffe.ru/SVA/NSM/Semicond/Si/eiectric.htmi (incorporated by reference herein).
[00366] FIG. 61 is a diagram showing an PD with Schottky contact metal or TCO in contact with the I layer, according to some embodiments. The Schottky contact metal semiconductor and/or transparent conducting oxide (TCO) such as indium tin oxide (ITO) is in direct contact with the I layer as shown. Microstructures 61 12 such as holes (and/or pillars) can be etched through the metal and/or TCO layer into the I layer entirely and/or partially, into the N iayer(s) entirely and/or partially, and/or to the silicon dioxide layer of the SOI if SOI is used. The MPD structure can be grown on a Si wafer or a SOI wafer with the following thicknesses and doping ranges. The Si N device layer of the SOI (or on a Si wafer) can be 0.01 to 10 microns thick with N doping >= 1x1017/cm3. Si and/or GexSh-x with x <=1 , layer N is doped to >= 3x1019/cm3 with As or P and can have a thickness ranging from 0.001 to 0.5 microns. The I layer, which can be multilayers, of Si and/or GexSii- with x <=1 (if mulfilayered, layers have a different x than the adjacent layer) is undoped and/or with a background doping of <= 5x1015/cm3 for ail I layers, with thickness ranging from 0.5 to 5 microns. The metal, such as Pt, Ni, Cr, W, and/or TCO layer(s) such as indium tin oxide (ITO) (see, e.g. Stadier) thickness can range from 0.001 to 0.2 microns. Microstructure diameter and/or one of the lateral dimensions can range from 200 nm to 5000 nm and spacing can range from 0 nm (touching and/or overlapping) to 5000 nm. The enhanced QE due to the microstructures can be >= 40%, in some cases >=50%, in some cases >= 60%, in some cases >=70%, in some cases >=80% and in some cases >=90% over a similar structure without microstructures for enhancement of the absorption at certain wavelengths. The wavelengths can range depending on the x value of the GeSi alloy, from 820 nm to 860 nm for x =0; 850 nm to 950 nm, in some cases from 850 nm to 1 00 nm and in some cases 850 nm to 1250 nm for x <= 0.2; from 1000 nm to 1350 nm and in some cases from 1200 to 1400 nm for x<= 0.4; and from 1350 nm to 1850 nm and in some cases 1400 to 1750 nm for x <=1. Data rate bandwidths can range from 5 Gb/s to 80 Gb/s or more for certain I layer thicknesses and diameters of the MPD, where diameters can range from 10 microns to 100 microns or more for example. Light signals impinge normally and/or almost normally, <= 45 degrees off normal, to the surface of the
microstructure and in certain cases can impinge from the bottom surface for free space and/or fiber optics applications in either single mode and/or mu!ti modes. Bottom microstructures 8132 can optionally be included to further enhance absorption and QE.
[00387] Platinum (Pt) for example has a resistivity of 10x10"6 ohms-cm which is approximately 100 times lower than a highly doped P layer of 1 x1020/cm3 with B in Si, a 2.5 nm thick Pt film has about the same sheet resistivity as a 300 nm P Si layer doped to 1x1020/cm3 with Boron.
[00388] Using Pt, with or without a thin P++ layer over the i Si and/or GeSi layer with or without antireflection coatings and with microstructures for absorption enhancement can increase the QE of a MPD/MAPD over that of a P-i-N structure without Pt and/or other meta!/TCO.
[00389] FIG. 62 is a diagram showing a similar structure as FIG. 61 but includes a thin P layer, according to some embodiments. The thin P layer is included such that the MPD is still a P-I-N but the sheet resistance of the thin P layer is reduced by the addition of a TCO for example. The P layer can be Si and/or GexSii-x with x <=1 , with doping >= 1x1019/cm3 and thickness ranging from 0.001 to 0.2 microns. The metal can be Pt, Ni, Cr, W, to name a few and/or TCO such as an ITO layer with thickness ranging from 0.001 to 0.2 microns. Microstructure holes 6212 are etched as in FIG. 61. The holes in both FIG. 61 and 62 can be covered by the ITO or TCO if the holes have a filler such as polyimide covering the opening of the holes so that the TCO/1TO does not coat the sidewall of the holes to cause an electrical short between the P-l and/or the l-N regions. The microstructure holes could alternatively be etched through the metal and/or TCO and into the I region and in some cases into the N region and in some cases to the silicon dioxide region of the SOI. [00370] Platinum (Pt) metal for example has a resistivity of 10x10~6 ohms cm, for a Pt layer of thickness 5 nm the sheet resistance is approximately 20 ohms. The P layer can be thin, for example 50 nm to minimize absorption of incident photons, and the thin Pt of 5 nm can reduce the sheet resistance of the combined P Si and Pt layer to approximately 20 ohms.
[00371] FIG. 63 is a diagram showing a similar structure as FIG. 62 but without the TCO or metal layer on top of the P layer, according to some embodiments. The P layer is Si and/or GexSh-x with x <=1 with doping of >= 1x1020/cm3 and with thickness ranging from 0.1 to 0,3 microns.
[00372] As in all PDs/MAPDs described in this patent specification, with the addition of Si and/or GexSh-x with x <=1 P type charge layer and Si multiplication layer can convert the PD to a MAPD such as in FIG. 36. The charge layer can be GexSii-x with x <=1 and/or Si with doping >= 1x1017/cm3 boron (B) and with thickness ranging from 0.05 to 0.2 microns. The Si I multiplication layer need not be and typically is not intentionally doped; it can be intrinsic, with background doping if any less than 2x10 i6/cm3 and with thickness ranging form 0,2 to 2 microns. The charge layer and the multiplication layer are inserted between the I absorbing iayer(s) and the cathode N layer of the MPD.
[00373] The gain of the MAPD can range from 1 dB to 20 dB for example and depends on the data rate bandwidth desired, the gain bandwidth product is approximately constant, such that the higher the gain the lower the data rate bandwidth in most cases and in some cases only at high gain. See, Kang et al. 2009.
[00374] In all MPDs and MAPDs described in this patent specification, a reverse bias voltage is applied between the anode and cathode. Not shown are
transmission lines attached to the anode and cathode of the MPD and MAPD that bring the electrical signal from the MPD and MAPD to electronics such as transimpedance amplifiers, and/or other electronics for signal processing, storage, transmission, conditioning, analysis, encryption, and any other signal processing for data center usage and/or telecom usage. The electrical signal can also be connected to test instrumentations such as sampling scopes, bit error rate tester, signal analyzers, bias tee, for system, device testing and analysis. Reverse bias voltage for MPD can be any voltage in the range of -1 to -20 volts, and in some cases -3 to -6 volts; for MAPD the reverse bias voltage can be any voltage in the range -4 to -60 volts and in some cases, -10 to -25 volts. Bias voltage supplied to the PD, MAPD can also vary as a function of input optical signal intensity, where the electronics connected to the MPD, MAPD can sense the linearity of the MPD, MAPD for example and change the bias to the MPD and MAPD to maintain a certain linearity and/or bandwidth and/or sensitivity. The electronics can sense the electrical signal from the MPD, MAPD and other parameters such as temperature, for example, and adjust the biasing of the PD and/or MAPD for optimal or better performance. The electronics can receive signal from the MPD/MAPD and also send signal to the MPD, MAPD to adjust for optimal or better performance and/or energy saving mode such as reduced bias in a standby mode until an optical signal is received to "wake-up" the MPD, MAPD for high data rate optical signal to be received and converted to high data rate electrical signal. The electronics has an algorithm and/or look up table and/or be receptive to external commands to interact with the MPD, MAPD for example.
[00375] FIG. 64 is a cross section schematic diagram showing an MPD/MAPD integrated with CMOS and/or BiCMOS electronics on a single silicon chip, according to some embodiments. In the example shown, Si and/or GeSi layers can be grown over the MPD/MPAD layers such that the CMOS and/or BiCMOS electronics can be fabricated first completing ail or almost all processing steps before fabricating the PD/MAPD as part of what is known as back end of the line (BEOL) processing. For example, after all or almost all the processing steps are completed for the CMOS and/or BiCMOS electronics, the CMOS and/or BiCMOS layer can be removed (and in some cases, it may not be necessary to remove), exposing the MPD/MAPD layers which may or may not include a P Si and/or GeSi layer. A trench etch 6420 as shown in a dotted rectangle and empty space (which can be empty and/or filled and/or partially filled with dielectric and/or other electrical insulator material(s) such as polyimide for example) to the N iayer(s) can be provided, where a cathode contact can be made. Both the cathode and anode of the MPD/MAPD connect via transmission lines 6440 to the electronic circuits on the CMOS and/or BiCMOS layer(s). The electronics are further connected (e.g. using interconnect 6442) to other electronics that may be on the same or on a separaie chip. Multiple MPDs and/or MAPDs can be monolithically integrated with one and/or multiple electronic circuits on a single Si chip.
[00376] The PD (and/or APD by adding charge and multiplication layers) monolithically integrated with electronic integrated circuits (IC) can be structures as shown in FlGs. 61 , 62 and 63 where the GexSh-x alloy can have Ge fraction x ranging from 0 to 1 and for BEOL processing that may be preferred for CMOS and/or BiCMOS fabrication since the feature size of the eiectronic elements are constantly getting smaller, at 14 nm node or smaller from previous 22 nm node. However, certain ICs may not require the smallest node and a larger node may suffice. This is still smaller than the feature size of the MPD/MAPD which can be 200 nm approximately and in some cases 00 nm and in some cases 300 nm. Therefore, the smallest feature size elements which in this case are electronic elements are fabricated prior to fabricating the photodetectors. For the CMOS and/or BiCMOS layers to be grown on top of the MPD/MAPD layers, the wafer should have a high degree of flatness for high yield CMOS and/or BiCMOS processing. This degree of flatness may preclude any strain due to GeSi alloy layers which might interfere with CMOS and/or BiCMOS processing. Strain relief layers using buffer layers, superlattices layers of Si and/or GeSi of different x, and/or keeping x < 1 , in some cases x <=G,4 and in some cases x<=Q,2, can be used for managing the warpage of the wafer so that CMOS and/or BiCMOS electronics of certain node can be fabricated successfully with high yield. See, e.g. Kang et al 2008. Microstructure holes 6412 are shown and can be etched through the metal and/or TCO and/or P layer and into the i iayer(s) and in some cases to the N iayer(s) and in some cases to the oxide layer of the SOI.
[00377] In the case where the MPD/MAPD has no top P layer, a Schottky contact with the I layer can be formed with a metal layer such as Pt with a thickness ranging from 1 nm to 10 nm, in some cases 2 - 2,5 nm, and
microstructure holes can be etched through the metal layer and into the I layer, and in some cases into the N layer and in some cases to the oxide layer of the SOI. in this case, the CMOS and/or BiCMOS layer can be on the I layer(s) of the
MPD/MAPD, and/or can be separately doped via ion implantation into the I layer in areas where the eiectronic ICs will be fabricated without further growing epitaxialiy a separate CMOS and/or BiCMOS layer. The MPD/MAPD area can be masked with dielectric, and/or metal and/or polymer to prevent ions from the ion implant process penetrating into the I layer and/or in some cases, the implant is very shallow for CMOS and/or BiCMOS, such that no masking is necessary and a light etch can be used to remove the implanted areas on the MPD/MAPD. In some cases the implanted areas may not need to be removed and can be a part of the MPD/MAPD. icrostructure holes can be etched followed by an electrical isolation trench to define the capacitance of the MPD/MAPD to the N layer for example. Ohmic contacts to the P (if any) and N layers can be formed followed by providing a transmission line from the anode and cathode to the electronics. In the case without a P layer, the anode can be the Schottky metal layer and the cathode the N layer. Thermal anneal, passivations, a nti reflect! on coating, planarization, and other dielectric passivation and isolation layers are not shown for simplicity.
[00378] In addition, microstructure holes and/or other features can be etched in the backside of monolithicaliy integrated MPD and/or MAPD as shown by dotted lines 6432 in FIG. 64 on the bottom of the substrate. The bottom mierosfructures can further improve the absorption efficiency and QE of a MPD and/or MAPD that is integrated with electronic ICs.
[00379] In some cases, front end of the process (FEOL) can be used where the MPD/MAPD can be processed and/or mostly processed before processing the CMOS and/or BiCMOS.
[00380] In most MPD/MAPD monolithic integration with electronic ICs on a single Si chip can be paramount to reducing the cost of an optical receiver. Such integration of the photodetector and electronics on a single Si chip can reduce the cost of an optical receiver by as much as 50% or more due to savings in packaging compared to known prior art where the photodetector and electronics are first mounted on a ceramic chip carrier and then wire bonded connecting the photodetector to the electronic chip. By monolithic integration, three currently separate pieces, GaAs detector, Si electronics, and the ceramic muitichip carrier, are reduced to a single chip.
[00381] In addition, performance is improved in a monolithicaliy integrated MPD/MPAD with electronic ICs by reducing parasitic capacitance, inductance and resistance thereby allowing a larger MPD/MAPD photosensitive area for detection of optical signal. This larger photosensitive area allows greater margin in optical alignment and packaging further reducing cost and improving performance.
[00382] The microstructure holes can be empty and/or filled with air and/or inert gas such as nitrogen, argon, helium to name a few and/or filled and/or partially filled with dielectric material such as SiNx, SiOx, SiC, polymers to name a few and the bottom microstructures may be coated with metal and/or dielectric reflectors to further assist in the enhancement of absorption and QE of the MPD/MAPD.
[00383] FIG. 65 is a top view of a MPD/MAPD where reflectors are included at the perimeter of the mesa, according to some embodiments. Microstructure holes 6512 are shown, the anode which in this example is the top surface P (and/or Schottky and/or a combination of P and metal and/or TCO) ohmic ring/electrode 6520 and mesa followed by an air-semiconductor distributed Bragg reflector (DBR) 6530 followed by the cathode ohmic/electrode 6522 on the N layer. For further details of the air-semiconductor DBR, see, Edge-Emitting Lasers with Short-Period Semiconductor/Air Distributed Bragg Reflector Mirrors,, Yuan et al., IEEE
PHOTONICS TECHNOLOGY LETTERS, VOL. 9, NO. 7, JULY 1997 (incorporated by reference herein). GaAs/Air is used where the GaAs refractive index is approximately similar to Si and GeSi refractive index. A two period quarter wavelength DBR can achieve over 90% reflectivity and with a spectrum width of 100 nm. The addition of a DBR around the periphery of the mesa can keep the lateral propagating optical waves and/or stationary waves within the MPD/MAPD where the interaction of the optical wave with the I absorbing region(s) can further increase the enhancement of the quantum efficiency and enhancement of the absorption efficiency.
[00384] FIGs. 66A and 66B are a cross sections of the MPD/MAPD of FIG. 65 illustrating two different types of DBR. A simple dielectric layer followed by a metal layer can also be used in place of the DBR to reflect the photons leaking out of the MPD/MAPD back into the PD/MAPD for further enhancement of the QE and absorption efficiency in the I region(s). In FIG. 66A, an air/semiconductor DBR 6630 is shown and the number of periods can range from 2 to 10 and in some cases 2 to 4, and the thickness and spacing can be an odd multiple of quarter wavelength where the wavelength is the center wavelength of the DBR. For example, if the center wavelength of the DBR reflector is 880 nm, then 220 nm is approximately quarter wavelength in air, and 65 nm is approximately quarter wavelength in the semiconductor, Si for example, if 65 nm is too thin for processing, 5 quarter wavelength or 325 nm can also be used, or 3 quarter wavelength of 195 nm for example can be used. The reflector can have reflectivity > 60% and in some cases > 90% over 830 nm to 930 nm for example. Other center wavelengths can be used to optimize the MPD/MAPD for optimal or improved QE enhancement using microstructures and DBR at the periphery of the mesa. In FIG. 66B a dielectric DBR 6632, for example TaOx/SiOx is used. See, Fabrication and performance of blue GaN-based vertical-cavity surface emitting laser employing AiN/GaN and Ta 2 O 5/SiO 2 distributed Bragg reflector, Kao et ai., APPLIED PHYSICS LETTERS 87, 081105 2005 (incorporated by reference herein). Eight periods of TaOx/SiOx were used to achieve > 95% reflectivity over almost 100 nm span. As in the air/semiconductor DBR, the center wavelength of the DBR is first chosen and then the layer thickness of the TaO and SiO are quarter wavelength of the center wavelength. As shown in FIG. 66B, the TaOx/SiOx can be coated on the mesa walls of the MPD/MAPD in 8 periods for example, and in some cases 2- 0 periods, and can be followed by a metal layer such as Ag, AI, Ni, Cr, Zr, W, to name a few, to further assist in reflecting any leaking photons back into the
MPD/MAPD structure for further enhancement of the QE and absorption efficiency.
[00385] Also shown in both schematics, the cathode metal 6522 can wrap the sidewail of the N layer to assist in reflecting any photons leaking from the N layer back into the MPD/MAPD. in addition, bottom microstructures 6640 can also be included to assist with enhancement of the QE and absorption efficiency. Further the microstructures can be coated with dielectric and/or metal and/or dielectric DBR and/or any combination of the coatings.
[00386] FIG. 67 is a simple top view schematic of a MPD/MAPD integrated with electronics ICs, CMOS and/or BiCMOS, according to some embodiments. The MPD/MAPD is integrated with electronics ICs CMOS and/or BiCMOS on chip 67 0 using transmission lines 6740 from the MPD/MAPD to the electronic block 6730. A light shield 6744 can be added to cover the electronics from the optical signal light, which could cause interference by generating electron hole (e-h) pairs in the electronic semiconductor. The shield 6744 can be opaque and/or semi-opaque to the wavelengths of the optical signal. The shield 6744 can be a polymer layer, a foam layer, dielectric layer and/or metal layer that can be fabricated as a BEOL process and/or attached during optical and electrical assembly of the transceiver. The electronics 6730 receive electrical signal from the MPD/MAPD for further processing, such as amplification. The electronics 6730 can also interact with the MPD/MAPD to adjust the biasing voltage to conserve power, extend the lifetime of the MPD/MAPD, and optimizing or improving the signal to noise of the MPD/MAPD during operation, in addition, the electronics 6730 can send the electrical signal to other electronics for further processing, storage, analysis, re-transmitting, conditioning, compression, encryption, etc.
[00387] FIG. 68 is a top view of a simple schematic of multiple MPDs/MAPDs monoiithicaliy integrated with electronics on a single chip, according to some embodiments. The MPDs/MAPDs are shown as circular although other shapes can be implemented such as diamond, polygon, ellipsoid, star, triangular, to name a few. The MPDs/MAPDs are monoiithicaliy integrated with CMOS and/or
BiCMOS electronics each with separate and/or shared electronic ICs for processing the electrical signal from the MPD/MAPD that the MPD/MAPD converted from optical signals. The processed electrical signals can be further transmitted to other electronic components. The electronics can interact with each other and route the signal form different MPD/MAPD to different electronics for transmitting to other electronics in a data center, in addition, an optical shield 6844 can be included to shield the electronics from the optical wavelengths of the optical signal that may cause interference. The optical shield 6844 can be an integral part of the chip and/or added at a later stage during assembly of the transceiver.
[00388] Examples of monolithic integrations are given in: A fully-integrated 12.5- Gb/s 850-nm CMOS optical receiver based on a spatially-modulated avalanche photodetector, M.J. Lee et aL 10 February 2014 j Vol. 22, No. 3 j
DOi: 10.1364/OE.22.002511 j OPTICS EXPRESS 251 (incorporated by reference herein), using 130 nm technology node; Assefa et al.; and Monolithic Silicon Photonics at 25 Gb/s, Strieker et al., OFC 2016 © OSA 2016, using 55 nm technology node (incorporated by reference herein and referred to herein as "Strieker et al.").
[00389] Packaging and assembly of the transceivers is a major cost of the optical transceivers and with monolithic integration, the number of parts needed to be packaged is reduced, therefore reducing the overall cost of packaging. In addition, with the reduction of parasitics such as capacitance, inductance and resistances, the MPD/MAPD can have a larger photosensitive area and have the same data rate bandwidth as a similar PD/APD that is not monoiithicaily integrated. The larger photosensitive area allows greater margin for optical alignment and therefore reduces packaging costs.
[00390] It should be noted that in many cases, the term lattice" is used to describe the distribution of the microsiructures such as microsfructured holes. As used herein, the term lattice" can refer to either a periodic or non-periodic structure. As described herein, the distribution of the microstructures can be non- periodic, aperiodic, and can be an amorphous or almost random distribution of the microstructures. The matrix of microstructures that can be periodic, non-periodic, chirped, aperiodic, mixture of periodic and non-periodic, almost random, random, pseudo-random in distribution. Further, the microstructures can vary in both spacing and size such as diameter for example and in some cases one of the lateral dimensions of the microstructures, and in addition the height and/or depth of the microstructures. Spacings can range from 0 nanometer (overlapping and/or touching) between adjacent microstructures to 5000 nm between adjacent nearest edges of the microstructures. One of the lateral dimension and/or diameter can range from 100 nm to 6000 nm. The height and/or depth can range from 100 nm to 10000 nm.
[00391] It should be noted that in monolithic integration other methods of integration are possible, for example in certain cases the CMOS device layers can be grown first followed by the microstructured photodiode and/or microstructured avalanche photodiode P-l-N or N-i-P for PD and P-l-P-l-N or N-l-N-l-P for APD with Si and/or SiGe alloy, in this case the micro structure holes can be etched first, followed by mesa etch followed by CMOS device processing and completing the MPD/MAPD and/or in any other processing sequence. Other integration methods may involve wafer bonding of the MPD/MAPD wafer on CMOS wafer. In certain cases, selective area epitaxy, epitaxial lateral overgrowth techniques may be used in monolithic integration/ integration. [00392] The monolithic integration/ integration can be on SOI wafers and/or wafers without buried oxides, and in some cases, wafers with areas of buried oxide and areas without buried oxides.
[00393] In addition, part of the monolithic integration/integration may involve structures for self-alignment and/or attachment of an optica! fiber to the
PD/ APD. Examples of other structures that may be integrated include: built in zone lens, Fresnel lens, conventional lens, passive and active apertures, passive and active attenuators, microelectro mechanical systems (MEMS) for alignment and/or routing of optical signal, and passive and active filters.
[00394] Monolithic integration and integration is used interchangeably herein and SOI wafers, partial SOI wafers can be used for monolithic integration of photonic devices with electronic devices. For monolithic integration of CMOS electronics with photonic devices, see for example: Monolithic Silicon Photonics at 25 Gb/s, Orcutt el a!., OFC 2018 (incorporated herein by reference); Assefa et a!.; and Strieker et al. where cost of the optical transceiver can be significantly reduced and performance significantly improved.
[00395] FIG. 69 is a cross section schematic diagram of microsfructured holes that can be etched in a P-l-N Si/GeSi (SiGe)/ Ge MPD/MAPD, according to some embodiments. The microstructured holes 6912 can be etched ether through the top layer which in this case is the P layer and into the I layer, in some cases to the N layer and in some cases to the oxide layer if the P-l-N is grown on a SOI substrate. Also shown are holes that are buried beneath the top layer, the P layer in this case, using epitaxial lateral overgrowth methods for example where the holes can be filled or partially filled with dielectrics at the I layer and the P layer is then subsequently grown on the surface of the I layer and the filled holes. Also shown are holes with different etch depths. The holes can be partially etched into the I layer, in some cases through the I layer, in some cases partially into the bottom N iayer(s) and in some cases through the bottom N layer(s). The MPD structure shown is a P-i-N with the top layer P consisting of GexSh-x where x can be 0, 1 and range from 0 to 1. The thicknesses of the P layer ranges from 0.1 to 1.0 microns and doping can be greater than 1x1Q19/cm3 and in some cases greater and/or equal to 1x1020/cm3. The I layer can be GexSii-x where x can be 0, 1 and range from 0 to 1 and can have multiple layers and the thickness can range from 0,5 to 3.5 microns and in some cases 1.0 to 5.0 microns and the layer is not intentionally doped (intrinsic) and have a background doping of less than or equal to 2x1015/cm3 . The N layer(s) can be GexSii-x where x can be 0, 1 and range from 0 to 1 , with thicknesses ranging from 0.01 to 5 microns or more.
[00396] FIG. 70 is a cross section schematic diagram of a MPD/ APD similar to that shown in FIG. 89 except the P layer is replaced with a metal or transparent conducting oxide, according to some embodiments. The transparent conducting oxid (TCO) can be indium tin oxide (ITO) and in some cases a very thin, 0.005 to 0, 1 microns for example, P layer may exist in addition to the metal and TCO layers, if the metal such as Pt is directly on the i layer, it is also called a Schottky junction. Holes 7012 can be etched through the metal and/or TCO layer and into the I layer, in some cases through the I layer and to the N layer, in some cases into the N layer(s) and in some cases through the N iayer(s) to the oxide layer in the case of a SOI substrate. The metal and/or TCO layer can also cover the holes 7012, where using planarization with poiyimide for example, the holes can be partially filled, due to surface tension, only the top portion of the holes can be filled and then removing poiyimide everywhere else on the surface of the I layer, the metal layer and/or TCO can be deposited to form a Schottky junction for example. The metal can be Pt, W, Ai, Cr, Ni, Ag, or any metal alloy such as NiCr, to name a few and can range in thickness from 0.001 to 0.1 microns. In some cases a thin layer of Ge, 0.001 to 0.01 can be deposited first prior to the metals, for an ultra smooth metal surface as a wetting agent Ultrasmooth metal nanolayers for plasmonic applications: surface roughness and specific resistivity, Stefaniuk et a!., 1 April 2014 / Vol, 53, No, 10 / APPLIED OPTICS (incorporated by reference herein).
[00397] FIG. 71 is a cross section schematic diagram of a MPD/MAPD where the microstructured holes can have subterranean holes connecting adjacent vertical holes. The subterranean holes 71 14 can occur when vertical holes 71 12 are in close proximity and overlap and can occur when the holes have "ripples" in the sidewail and where the ripples can intersect and result in holes in the sidewalis resulting in subterranean holes intersecting adjacent vertical holes 7112, Holes can be oval or circular, with one dimension ranging from 10 nm to 2000 nm and length of hole can range from 1 nm to 1000 nm or more. This can result in a three dimensional Iattice of holes that can further enhance light trapping which enhances absorpiion and quantum efficiency. The P-i-N structure is similar to the one in FIG, 69.
[00398] Light trapping, slow waves, lateral modes of the optical field are possible mechanisms for the enhancement of absorption and enhanced quantum efficiency in microstructures, micro/nanostructures in either two and/or three dimensions. Photonic crystal, high contrast grating, diffraction gratings, to name a few are examples of micro and nanostructures that can exhibit slow light. See, Slow light in photonic crystals, Baba, nature photonics VOL 2 AUGUST 2008
www.nature.com/naturephotonics (incorporated by reference herein). The microstructures described in herein can be photonic amorphous crystalline, photonic aperiodic crystalline, photonic poly crystalline, and/or photonic disordered crystalline, for example where the band gaps are not well defined but can be a continuum as in the bandgap of amorphous, disordered, poly crystalline
semiconductors. The slow waves can be represented by a group index, the higher the group index, the slower the optical field propagate. v=c/ng where c is the speed of light in space or vacuum, and ng is the group index and v is the light propagation velocity. The slow propagation of the optical field allows greater interaction of the optical field with the material and therefore enhance the absorption and resulting in enhanced quantum efficiency.
[00399] FIGs. 72A and 72B are cross section and top view schematics of a structure similar to that shown in FIG. 69 but with both holes and pillars in the microstructure for the enhancement of the absorption and quantum efficiency. As shown in FIGs. 72A and 72B, a hole 7212 contains a pillar 7214 in the center. For example, the hole can be etched with a donut shape pattern such that a circular trench can be etched with an island in the middle resulting in a hole with a pillar. In some cases, there can be multiple pillars within the hole, in the example of hole with a single pillar, the hole diameter can be in the range of 100 nm to 5000 nm and the pillar diameter or one of the dimension can be in the range of 10 nm to 4900 nm. The pillar does not need to be centered in the hole and the hole and/or pillar can be other shapes than circular, for example oval, polygon, rectangular, double ellipsoidal, clover leaf, amoeba shaped, star fish, to name a few. The depth of the hole and pillar can range from 00 nm to 10000 nm, and can be buried beneath the top layer and only in the I iayer(s), etched through the top layer into the i iayer(s), in some cases through the i layer, in some cases to the N layer(s), in some cases through the N layers and in some cases to the oxide layer if the MPD/MAPD is fabricated on a SOI wafer, in addition, the holes and pillars can be aperiodic and or periodic.
[00400] Light trapping by micro/nano structures have been compared to rods and cones in the retina. See, Enhanced photovoltaics inspired by the fovea centraiis, Shaiev et al., SCIENTIFIC REPORTS j 5: 8570 j DOi:
10.1038/srep08570 (incorporated by reference herein), where enhancement of absorption have been shown for solar cell applications where the device is operated at zero external bias voltage and with a continuous light source without any signal modulations and where data rate bandwidths are not important. The length of the absorbing region is not a constraint as in high data rate bandwidth photodiodes and is often optimized for maximum efficiency for solar energy conversion to electricity.
[00401] According to some embodiments, the microstructure described herein can be pillars and the pillars can be cones, inverted cones, funnels, circular, oval, polygon, ellipsoidal, clover leaf, amoeba, star, to name a few.
[00402] FIG. 73A and 73B are cross section and top view schematics of a hole 7312 with a pillar 7314 within the hole as in FIG. 72, where a filler 7316 at least partially fills the donut trench, according to some embodiments. The pillar top P layer, in the case of a P-l-N PD structure (or P-l-P-N for a MAPD structure) is connected to the anode electrode by a transparent conducting oxide such as indium tin oxide (ITO) 7320. In order to bridge the trench with the ITO layer 7320, a planarization layer such as poiyimide and/or spin on glass 7316 can be used to fill and/or partially fill the donut trench such that the ITO layer 7320 can contact the p layer of the pillar without electrically shorting the P-i-N structure by deposition of the ITO on the sidewalis of the trench. The transparent conducting oxide can be other material such as a metal layer for example Pt of 1-10 nm thick for example, in the case of ITO the layer 7320 thickness can range from 0 nm to 500 nm or more for example. FIG, 73B shows a top view of the microstructure with a pillar 7314 within the hole 7312. The anode and the anode ring are also shown, and the cathode also shown. The mesa is not shown, and the poiyimide isolation for the anode and the ITO are not shown for example for simplicity. Due to the viscosity of the polyimide and/or spin-on-glass and the dimensions of the trench which can range from 10 nm to 2000 nm or more, the polyimide may not fill the trench entirely as shown in FIG. 73A but only the top portion. In some cases it may fill most of the trench and in some cases the entire trench. In most applications, it may be desirable to fill as little as possible of the trench since this will give the greater refractive index difference between the semiconductor material and the void of the trench.
[00403] In FIGs. 72A, 72B, 73A and 73B only one pillar is shown in the hole, there can be multiple pillars in each hole and different holes can have different and/or same number of pillars. The pillars can have a single sidewail slope and/or can have multiple sidewail slopes from negative to positive, in addition to the many different shapes the pillar can have. Dimensions of the hole can range from 200 nm to 5000 nm and dimension of the pillar can range from 100 nm to 4500 nm and spacing of the microstructure can range from 100 nm to 5000 nm and in some cases the microstructures can be touching. The structure can be applied to Si, Ge, GeSi material systems for MPD/MAPD.
[00404] FIGs. 74A and 74B are cross section and top view schematics of a microstructured PD/APD with pillars as the absorption enhancing microstructure. The P-l-N is similar to that in FIG. 69 for example. For MAPD, the addition of a charge P layer and an i multiplication layer to form a P-l-P-l-N structure with the anode on the top P layer and the cathode on the N layer. The charge P layer can be GeSi alloy or Si and the multiplication I layer can be Si with doping and dimensions as given in previous MAPD structures. Starting with a layer structure as in FIG. 69, pillars 7412 are etched to the I layer, in some cases partially through the i layer, in some cases through the I layer, in some cases partially into the N layer(s) and in some cases through the N layer and to the oxide layer if the PD is grown on a SGI wafer. For MAPD, the pillars can be etched partially through the I layer, in some cases through the I layer, in some cases partially to the charge layer and in some case partially through the multiplication layer. The pillars 7412 can have a lateral dimension ranging from 100 nm to 5000 nm and can have single and/or multiple sidewail slopes from positive to negative. In addition, they can be circular and/or oval and/or polygonal, and/or cioverleaf, and/or triangular and/or rectangular and/or amoeba. In addition, hole and/or holes can be in the pillars for example a straw pillar, and/or a sieve pillar to name a few.
[00405] To connect the top P layer of each pillar, a pianarization process using polyimide and/or spin-on-glass for example as a filler 7416 so that the !TO layer 7420 can bridge across each pillar and connect all and/or almost all the pillars to the anode electrodes and the P layer. The filler 7416 may fill the space 7414 between the pillars fully and/or partially. As shown in FIG. 74A, due to the viscosity of the polyimide, only the top portion of the space between the pillars are filled. The pillars can have spacing ranging from 10 nm to 5000 nm or more. In some cases the spacing for holes and/or pillars of microstructures can range from 200 nm to 2500 nm. in some cases the holes and/or pillars can touch adjacent piliar(s). Hole lateral dimension can range from 100 nm to 3000 nm within the pillar and/or not inside a pillar. The pillar spacing can be periodic and or aperiodic and can range from 100 nm to 5000 nm, pillar diameter can range from 200 nm to 5000 nm and the length of the pillar can range from 500 nm to 5000 nm. The structure can be applied to Si, Ge, GeSi material systems for MPD/MAPD. The periodic and or aperiodic array of pillars can be a mixture of different shapes such as circular, rectangular, oval, polygonal, star, amoeba, to name a few.
[00406] FIG. 74B is a top view of the MPD/MAPD with pillars as the absorption and quantum efficiency enhancing microstructure, and with the anode ring, and anode electrode and cathode electrode. Not shown for simplicity and clarity are the polyimide bridging and isolation layers, mesa, passivation, ring distributed Bragg reflectors, anti reflection coatings, nanostructures to reduce reflection to name a few.
[00407] Hole and pillar dimensions and spacings are similar and can be used interchangeably. From simulations, the hole microstructures are an inverse of the pillar microstructures and the enhancement is similar. However, piilar(s) in hole and hole(s) in pillar may or may not be the inverse of each other.
[00408] For a hole and/or pillar, one of its lateral dimensions can range from 100 nm to 5000 nm, and the spacing from adjacent microstructures can range from 0 nm (touching and/or overlapping) to 5000 nm. The depth of the holes and/or the length of the pillars can range from 100 nm to 10000 nm and in some cases 300 nm to 5000 nm. The spacing can be periodic and/or aperiodic and/or chirped and/or random and/or pseudo random and combination thereof, for example an aperiodic set of microstructures consisting of holes and/or pillars, can be repeated periodically and/or pseudo periodically when not exactly periodic, where the period can be different for example. In addition to being periodic and/or aperiodic, the dimensions of the microstructures can also be varied in an orderly and/or non orderly fashion together with and/or without variations of the periodicity and/or aperiodicity. The length and depth of the microstructures can also be varied. The spacing and/or the lateral dimension and/or the vertical dimension of the microstructure can be varied in combination. Aperiodic and/or partial aperiodic can result in less sensitivity of the quantum efficiency with wavelength and in some cases improve the quantum efficiency at certain wavelengths. See, Optica! absorption enhancement in partially aperiodic silicon nanohole structures for photovo!taics, Lin et a!., CLEO:2013 Technical Digest ® OSA 2013 (incorporated by reference herein), for photovoltaic applications. However, as described herein, the MPD/MAPD is operated at a reverse voltage bias applied externally, ranging from -1 V to -20V for the PD and ~4V to -50V for the MAPD and with a data rate bandwidth of equal to or greater than 1 Gb/s, in some cases >= 3 Gb/s, in some cases >= 5 Gb/s, in some cases >= 10 Gb/s, in some cases >= 20 Gb/s, in some cases >=25 Gb/s, in some cases >=30 Gb/s, in some cases >= 40 Gb/s, in some cases >= 50 Gb/s and in some cases >= 80 Gb/s.
[00409] FIG. 75A is a plot showing a finite difference time domain simulation of an optical field propagating in microstructured holes. A hole diameter of 700 nm and a period of 1000 nm was used in a square lattice in one case and in the second case the holes are aperiodic and or randomly spaced by +/- 100 nm. FIG. 75B is a top view of an example of random period holes, according to some embodiments. The cylindrical holes are etched through the I layer. The MPD have a P-l-N structure on SOI where the I layer is 2 microns thick and the P and N layers each are 0.3 microns thick and the material is silicon. The vertical axis is absorption (1-R-T) of the entire P-l-N structure and the horizontal axis is wavelength from 800 nm to 900 nm. The solid curve 7520 is the enhanced absorption with random spacing by +/- 100 nm from a mean of 1000 nm center to center and the dashed curve 7522 is a fixed square lattice with a period of 1000 nm. Both have a hole diameter of 700 nm. As can be seen, the random aperiodic holes have a "flatter" enhanced absorption verses wavelength response compared to the holes in a square lattice. In addition, for certain wavelengths, the random aperiodic holes have a higher enhanced absorption than that of the periodic holes and with less variations in the amplitude of the ripples. As shown, the wavelength span is from 800 nm to 900 nm for a Si MPD, the same can be applied to Si, Ge, GeSi material system with wavelength span from 800- 000 nm and in some cases from 850 nm to 950 nm and in some cases from 1250 nm to 1350 nm and in some cases from 1350 nm to 1550 nm and in some cases from 1450 nm to 1650 nm.
[00410] Aperiodic holes/pillars can be applied to both MPD and MAPD structures and the spacing can vary from touching or intersecting microstructures, 0 nm, to 5000 nm and in some cases 100 nm to 3000 nm from the nearest edge of an adjacent microstructure, and one of the lateral dimension of the microstructure can range from 50 nm to 3000 nm and in some cases 100 nm to 10000 nm. The length and depth of the pillar/hole can range from 100 nm to 10000 nm or more and in some cases can range from 500 nm to 10000 nm in material systems of Si, Ge, GeSi and any combination thereof,
[00411] The holes can be etched past the first layer which can be the anode or cathode layer and partially into the i layer, in some cases, holes can be etched partially into the i layer without etching holes in the first layer, in some cases holes can be etched through the I layer, in some cases to the anode or cathode layer of a PD or the charge layer of a MAPD, in some cases the hole can be etched to the oxide layer of a SOI wafer and in some cases partially into the cathode or anode or charge layer, in some cases the holes can be etched partially into the multiplication layer of a MAPD and in some cases to the cathode layers of a MAPD and in some cases partially into the cathode layer of a MAPD.
[00412] Similarly, the length of a pillar can include parts and/or all of the I layer and in some cases include parts and/or ail of the top layer and in some cases can include parts and/or all of the lower cladding layer that can be the cathode if the top layer is the anode. For a MAPD, the pillar can include part of and/or all of the charge layer, and in some cases part of and/or ail of the multiplication layer and in some cases part of and/or all of the cathode layers.
[00413] FIG. 76A and 78B shows cross section schematics of a microstructure emitter (ME) with a P-l-N structure on SOI substrate, according to some embodiments. In some cases, the structure can be on a N doped Si substrate without the BOX (buried oxide) layer. The holes 7612 can be periodic and/or aperiodic and can be etched through the I layer and into the cathode and/or anode layer(s), and in some cases the holes can be buried using epitaxial lateral overgrowth for example. Microstructure holes and/or pillars, can generate slow waves which can then increase the interaction time of the optical field with the gain medium. The microstructured emitter is forward biased in the ranges from 0.1 milliamperes to 500 miiliamperes (mA) or more. The bias current is modulated and as a result the light output from the ME is also modulated and modulation data rate can be in the range 100 Mb/s to 40 Gb/s or more. Electrical data signal is applied together with a forward bias to the ME anode and cathode in a forward bias direction to generate an output optical modulated signal that correspond to the input electrical signal.
[00414] The quantum wells can be Si/GexSii-x where x can be any value between 0.2 and 1 , and where the layer thickness of the GexSh-x can be any value between (when range is used from a to b, it also means any value between a to b, including a and b) 1 nm and 20 nm which is the well and the Si (or GexSh-x alloy where x can range from 0 to 0.6) cladding layers can have a value between 5 nm to 100 nm and both the cladding and the well can be undoped and/or not intentionally doped with <= 5x1016/cm3. The number of quantum wells can be a single well or a multiple quantum wells such as 2-15 for example.
[00415] The microstructure holes 7612 can have a lateral dimension ranging from 100 nm to 5000 nm and can have a spacing between adjacent
microstructures ranging from 0 nm (touching and/or overlapping) to 6000 nm and can be periodic and/or aperiodic and/or partially periodic and/or partially aperiodic. The hole etch depth can range from 100 nm to 10000 nm and in some cases the holes can be etched just to the i layer, and in some cases partially through the I layer and in some cases through the I layer and in some cases into the bottom p or n layer.
[00416] The quantum weli(s) of Si/GeSi alloy are clad by a P and N layer that can have thicknesses ranging from 100 nm to 5000 nm and the P and/or N can have a doping of >= 1x1018 / cm3 and in some cases the P and/or N can have a doping of >= 1x1019/cm3 and in some cases the P and/or N can have a doping of >= 1x102Q/cm3. The ME can be fabricated on a SOI wafer or on a p or n Si wafer.
[00417] Distributed Bragg reflectors can be added on the top and bottom of the ME; on the bottom, a via should be etched such that it is in contact to the doped P or N layer and the optical cavity defined by the top and bottom Bragg reflectors is a single wavelength cavity such that the peak optical mode coincides spatially with the position of the quantum well to achieve the maximum overlap of the optical field with the gain medium. In addition, slow waves propagating in the region with the gain media or quantum wells when it is forward biased, can further enhance the gain experienced by the optical wave. The ME can operate in a laser mode, in a light emitting diode mode, in super-radiance mode, in a muitimode and/or single mode. The ME can be directly modulated by a modulating electrical signal where the modulations can represent 0 and 1 for data transmission. The ME light output can also have a modulated output with the modulation data rate ranging from 100 Mb/s to 100 Gb/s and wavelengths ranging from 850 nm to 1650 nm, in some cases 1250 nm to 1350 nm, in some cases 1200 nm to 1600 nm, in some cases 750 nm to 850 nm, in some cases 850 nm to 1000 nm and in some cases 950 nm to 1100 nm.
[00418] Distributed Bragg reflectors (DBR) can be dielectrics with different refractive indicies, Si/air, different transparent conducting oxides with different refractive indices for example.
[00419] FIG. 77 is a schematic cross section of the ME monoiifhically integrated with CMOS/BiCMOS Integrated Circuit (IC) electronics on a single silicon chip, according to some embodiments. The electronics can be used to receive electrical signals from computer processor units (CPU), application specific integrated circuits (ASIC), signal processing and conditioning, storage, drivers, receivers and transmitters, and any other electronics suitable for data communication, processing and storage and routing. The electric signal is applied to the ME anode and cathode together with a direct current biasing current such that the ME is pre biased. The ME can faithfully replicate the electrical pulses into optical signal pulses at data rates ranging from 100 Mb/s to 100 Gb/s, in some cases >= 1 Gb/s, in some cases >= 3 Gb/s, in some cases >= 5Gb/s, in some cases >= 10 Gb/s, in some cases >=20 Gb/s, in some cases >=25 Gb/s, in some cases >= 40 Gb/s and in some cases >= 50 Gb/s. On/Off ratio can be >=2 dB, in some cases >= 3 dB, in some cases >= 5 dB, in some cases >= 10 dB, in some cases >= 13 dB, in some cases >= 16 dB and in some cases >= 20 dB. ON correspond to when the electrical pulse in "1" and the ME gives a higher optical intensity output (On), and OFF is when the electrical pulse is "0" and the ME give a lower optical intensity output (Off).
[00420] FIG. 78 is a schematic top view of a ME monolithicaily integrated with CMOS/BiC OS electronic ICs, according to some embodiments. Integration of ME(s) with electronics can significantly reduce of the cost of packaging of the optical transmitter and therefore the cost of using optics in data communication. Multiple Es can be integrated with single and/or multiple electronics ICs on the same chip.
[00421] FIGs. 79A and 79B are schematic cross section views of two possible microstructured photodiodes, according to some embodiments. The described structures can also be applied to microstructured avalanche photodiodes with the addition of a charge and multiplication layers. The structure of FIG. 79A can be a P-l-N Si and/or GeSi structure where the absorbing I layer can be Si and/or GeSi alloy and the P and/or N layer can also be Si and/or GeSi alloy and where the GeSi alloy can have the Ge fraction vary from 0 to 1. The structure of FIG. 79A can be with a BOX (buried oxide) on Si, also can be called a SOI (silicon on insulator), and/or without a BOX layer in which case the PIN structure can be directly on a N type Si substrate. In addition, a GeSi alloy etch stop layer can be included where the Ge fraction is approximately 1 percent or a few percent and can be doped N type. The layers' thicknesses of the structure of FIG. 79A can be as follows, the top layer P (P and N can be interchanged) can have a thickness ranging from 0.1 to 1 microns and doped to >8x1019/cm3. The i layer where photons absorption can contribute to the photocurrent with a reverse bias, can have a thickness range of 1 to 5 microns, and is not doped intentionally and/or is intrinsic. The N layer can have a thickness ranging from 0.1 to 1 microns and is doped >1x1019/cm3, and can be on an N type device layer of thickness ranging from 0.03 to 0.1 microns. The BOX layer has thickness ranging from 0.2 to 10 microns on Si substrate.
Alternatively, a N type silicon substrate can be used without the BOX layer and it can include an etch stop GeSi alloy layer doped N type >1x10 9/cm3 of thickness ranging from 0.01 to 0.5 microns grown on the N silicon substrate.
[00422] The structure of FIG. 79B is similar to the structure of FIG. 79A, but with the substrate removed to the BOX layer and/or to the GeSi etch stop layer. The removal of the substrate offers greater refractive index contrast between the microstructure region and the regions outside the microstructure which can promote the trapping of the photons and the confinement of the optical slow wave (slow light, slow mode) in the microstructures. The removal of the substrate can improve the enhanced absorption and therefore the enhanced quantum efficiency of the PD/ APD.
[00423] The microstructure holes 7912 can be cylindrical, conical, trapezoidal, oval, and/or any shape regular and/or irregular. The holes 7912 can be etched partially into the i layer, in some cases through the I layer, in some cases partially into the N layer(s) and/or through the N layer, in some cases to the BOX layer and/or the GeSi etch stop layer and in some cases through the BOX layer and/or the etch stop layer. icrostructure holes 7812 are different from microstructure pillars in that the P-l-N material is contiguous and/or sharing a common connected region or mass such as holes in a slice of Swiss cheese. Similar to a slice of Swiss cheese, the microstructure holes can be etched entirely through the p-i-n layers and through the BOX and/or the etch stop layers. In addition, forming ohmic contact to the P and N regions can be made easily on the P and N surfaces. In contrast, pillars are like islands and each pillar need to be electrically connected with all other pillars to form a PD and the pillars cannot be etched from the P layer to the BOX and/or through the etch stop layer since the pillars have no common material to hold them together and will be separated. Fabrication of pillar PDs/MAPDs can therefore be more complex than with microstructured holes and can result in lower yield, that can result in higher cost.
[00424] At least one lateral dimension of the hole, if it is circular cylindrical then the diameter, if if is conical, then the diameter at the surface, can have a range from 250 nm to 2500 nm and in some cases 500 nm to 5000 nm and in some cases 800 nm to 2500 nm. The spacing between the microstructure holes can range from 100 nm to 5000 nm and in some cases 300 nm to 2000 nm and in some cases 250 nm to 2500 nm. The microstructured holes can be arranged in a lattice, such as a square and/or hexagonal lattice, in any periodic and/or aperiodic arrangement and in some cases a group of holes can be aperiodic and the aperiodic group is repeated periodically in a lattice. Multiple groups with different periodic and/or aperiodic arrangement of holes, with different number of holes and dimensions, different group size can be repeated in a periodic and/or aperiodic manner; for example, the center of the MPD/ APD may have a different periodic and/or aperiodic arrangement than microstructure holes off center and near the periphery of the MPD/MAPD,
[00425] In both the structures of F!Gs. 79A and 79B, the optica! signal impinges on the top surface, in this example, the P layer surface. In certain cases, light can also impinge from the bottom substrate surface and in the case of the structure of FIG. 79B. The substrate is removed in the area(s) 7930 where there are
microstructure holes above. Dielectric coatings such as distributed Bragg reflectors can be applied at the bottom of the etch stop layer for example, and/or metallic film applied to the etch stop layer for example to reflect any optical signal that may escape the microstructure hole array. In addition, the etch stop layer and/or a thin remaining substrate layer can be textured to further assist in redirecting the optical signal back into the microstructured hole array to further improve the enhanced absorption.
[00426] Wavelengths for x=0 in GexSii-x, ail-Si MPD/MAPD, range from 800 nm to 980 nm and in some cases from 850 nm to 950 nm. For x = 0.2 with strain, the wavelength can range from 850 nm to 1000 nm and in some cases 950 nm to 1250 nm and in some cases 900 nm to 1350 nm for strained GeSi alloys. For x=Q,4 wavelengths can range from 850 nm to 1100 nm and in some cases, 950 nm to 1250 nm and in some cases 1250 nm to 1350 nm where the GeSi can be strained and the bandgap narrows. For x=0.8, the wavelength can range from 00 nm to 1350 nm and in some cases 950 nm to 1350 nm and in some cases 1250 nm to 1350 nm and in some cases 1250 nm to 1450 nm and in some cases 1350 nm to 1550 nm where the GeSi can be strained. For x=0.8 the wavelength can range from 1250 nm to 1350 nm, in some cases 100 nm to 1300 nm, in some cases 1250 nm to 1450 nm and in some cases from 1250 nm to 1550 nm where the GeSi can be strained and the bandgap narrows. For x=1 , the wavelength can be extended to 1350 nm, in some cases to 1550 nm and in some cases to 1650 nm. The GeSi alloy can be strained in which case the band gap narrows that can result in higher absorption efficiency. In all cases the signal photon wavelengths are kept above the bandgap where absorption coefficient is greater or equal to 10 cm 1 , in some cases >= 50 cm 1 , in some cases >= 100 cm 1 , in some cases >= 400 cm 1 and in some cases >= 800 cm-1. With microstructure holes, the absorption efficiency can be further enhanced by slow waves, lateral optical modes, collective modes for example.
[00427] Both structures FIGs. 79A and 79B can be monolithically integrated with Si CMOS and/or Si/SiGe BiC OS electronics for signal processing, amplification, conditioning, communication, distribution, routing, buffering, and storage and any other signal processing needed for data communication, computing and analytics.
[00428] In addition, in the structure of FIG. 79B, optical signals can also impinge from the bottom. In this case an antireflection coating and/or texturing of the surface with random nanostructures such as "Black Silicon" for example can be employed to reduce reflection of light back into the optical fiber; reflection as low as 5% and in some cases as low as 1 % or less can be desirable or required in certain optical data communication systems, in addition, a dielectric layer(s) and/or a reflector iayer(s) such as metal and/or Bragg reflector can be applied to the top surface such that any optical signal leaking from the microstructure can be reflected back into the microstructure. A textured dielectric layer followed by a metal layer can be applied to the top surface. The texturing is to reduce specular reflection that may reflect into the optical fiber. A scattered and/or diffused reflection may be more desirable.
[00429] In the structure of FIG. 79B, in the case where the optical signal impinges from the top surface, texturing of the surface can be used to reduce reflection and the bottom surface can also be textured or not textured, and can be coated with dielectric layer(s), and/or metal iayer(s) and/or Bragg reflector. In certain applications, it may be desirable to have light impinge both from the top and bottom surfaces simultaneously and/or sequentially in which case the surfaces of both the top and bottom can be textured to reduce reflection.
[00430] In all cases, the microstructure holes can be any shape, for example a hole can be a funnel shape and/or a cone shape with single and/or multiple sidewa!l angles and slopes. In addition, micro-nano-structures can also be on the back surface to further enhance absorption as discussed earlier.
[00431] U.S. Patent No. 8,357,960 (incorporated by reference herein and referred to as "Dutta" herein) discusses spectral broadening using 3D blocks or pillars of direct bandgap material such as InGaAs, InP, GaAs. FIG. 5 of Dutta, shows that simulation of 200 nm diameter pillars of InP with 200 nm spacing can have absorption as much as 80% (average) at wavelengths of 1.4 microns, or photon energies of approximately 0.88 eV which is 0.46 eV narrower than the 1.34 eV bandgap, for a direct bandgap semiconductor InP which is basically transparent at that wavelength. Ref. http://www.ioffe.ru/SVA/NSM/Semicond/lnP/FIGs/843.gif discusses for 1.4 microns correspond to approximately 0.88 eV, the absorption coefficient is much less than 1 , for example if the absorption coefficient of InP at 1.4 micron wavelength is 0.5 cnr1 , only 0.5% of the light will be absorbed over a 100 micron thick InP. A direct bandgap semiconductor such as InP can be broadened with microstructures within approximately 0.02 eV lower than the bandgap edge of 1.34 eV assuming there are no strain narrowing effects. To date, no experimental demonstration has been found of such wide broadening of the absorption below the bandgap. Dutta, as understood, is focused on photon energies that are less than the bandgap. In direct bandgap, materials such as InP, InGaAs, GaAs, photons with energy greater than the bandgap have absorption coefficients of 1x 04 cm 1 or greater and enhancement of absorption at these energies by micro-nano structures are not necessary since the absorption is already close to unity. The emphasis in Dutta is understood to be using pillars for use with photons with energies below the bandgap of the material where most material becomes virtually transparent. By reducing the diameter of the pillar to 100 nm, Dutta says that photons with even lower energies below the bandgap can be absorbed with high efficiency or at least 70%.
[00432] Near-unity broadband absorption designs for semiconducting nanowire arrays via localized radial mode excitation, Fountaine et a!., 5 May 2014 | Vol. 22, No. S3 I DOI: 10.1364/OE.22.00A930 j OPTICS EXPRESS A930 (incorporated by reference and referred to herein as "Fountaine") discusses GaAs pillars on Si with approximately the same pillar dimensions as Dutta and shows absorption efficiency close to unity. However, this is shown only for wavelengths above bandgap and drops to approximately zero at bandgap as shown in FIG. 4c of Fountaine.
[00433] The discussion in Dutta of spectral broadening of inP pillars without strain of photons with wavelengths greater than 990 nm (or greater than 1.25 eV) with absorption efficiency greater than 40% is not believed to be possible.
[00434] According to some embodiments of the present disclosure, absorption enhancement is mostly confined to photon energies that are greater than or above the bandgap of the material, and in some cases the material can be strained in which case the bandgap can narrow. Microstructures are used such as holes and in some cases pillars and in some cases holes and pillars to enhance the material absorption of approximately 200-1000 cm 1 by 2 to 10 times or more such that the enhanced absorption can range from 2000 to 10000 crrr1 and in some cases 4000 to 10000 crrr1 or more. In some cases the material absorption coefficient can be 50 cm or more and the enhancement factor can be 30 or more so that the enhanced absorption coefficient can be >= 1500 cm 1, in some cases >= 3000 cm-1 and in some cases >= 6000 cm-1.
[00435] In addition, the size of the device discussed in Dutta is 5 by 5 microns square. With multimode fiber having core diameters of 50 and 82.5 microns, and a typical ball lens having a focal length of 150 microns, the beam spot size is approximately 3 microns in diameter. This leaves less than 2 microns in alignment tolerance. This tight alignment of the optical elements to the photodiode may require active alignment, where the fiber is illuminated and illuminates the photodiode during assembly. This can be costly in the assembly and packaging of the optical receiver. According to some embodiments of the present disclosure, the MPD/ APDs have a device area from 10 to 100 microns diameter and in some cases 30 to 80 microns in diameter. This large area makes alignment of optical components to the MPD/MAPD easy and does not rely on active alignment.
Passive alignment by robotic means with alignment accuracy of 10 microns or more can greatly reduce the cost of assembly and packaging of the optical receiver.
[00436] In addition, pillar diameters in Dutta are 200 nm and 100 nm, whereas according to some embodiments of the present disclosure the microstructures (which can be holes, and/or pillars) have dimensions of >= 300 nm and in some cases >= 400 nm, in some cases >= 600 nm, in some cases >=7QQ nm, in some cases >=900 nm, in some cases >= 1000 nm, in some cases >= 1200 nm, in some cases >= 1300 nm and in some cases >= 1500 nm.
[00437] Furthermore, the examples discussed in Dutta are all direct bandgap materials, whereas according to some embodiments of the present disclosure both Si and GeSi (SiGe) and Ge are indirect bandgap.
[00438] FIG. 80 is a cross section schematic diagram showing integration of the structure shown in FIG. 79B with a Si integrated circuit (IC) or application specific electronics (ASIC) using CMOS and/or BiCMOS processes. For optical signals impinging from the top surface, the via 7930 can be textured, and/or coated with dielectric iayer(s) such as Si02 for example, a metal layer such as Ai, Cr, Ni for example and/or dielectric Bragg reflectors 8042 to reflect any optical signal that may leak from the pin (or pipin for APD) microstructure back into the microstructure for further absorption enhancements. In certain applications, light can impinge from the bottom surface and the via 7930 can serve as a guide for the optical fiber allowing precision passive alignment of the fiber to the PD/MAPD. In addition, the bottom surface can be textured using dry etching to create Black Silicon for example to reduce reflection and/or an anti reflection (AR) layer(s) and/or dielectric layer can be coated on the via. The top surface can also be coated with a dielectric iayer(s) such as Si02 and/or metal iayer(s) such as AI, Cr, Ni for example and/or dielectric Bragg reflectors. Texturing of the top surface either on the semiconductor and/or on the dielectric layer can be used to reduce specular reflection back into the optical fiber.
[00439] In certain applications, optical signals can impinge from both the top and bottom surface simultaneously and/or sequentially, in which case dielectric layer(s) and/or texturing of the top and bottom surfaces can be used to reduce reflections.
[00440] For high data rate bandwidth of > 20 Gb/s, the MPD/MAPD diameters can range from 10 to 100 microns diameter. However, there are cases where even larger area photodiodes, 200-600 micron diameter MPD/MAPD may be desirable, especially for free space device to device communication such as laptop computers to smartphones to smart watches for example and also recent visible light communication (VLC) where both visible and 850 nm wavelengths can be used for short range free space communication. See, e.g., Modulation and Coding foruDimmabie Visible Light Communication, S.H, Lee et al. IEEE Communications Magazine · February 2015.
[00441] FIG. 81 is a cross section schematic diagram showing a large area MPD, according to some embodiments. The device, which can also be MAPD with the addition of Si charge and multiplication layers, has a device area ranging from 200 to 600 microns diameter. The epitaxial structure is similar to that shown in FIG. 80, except the I layer thickness can range from 4-6 microns. In the case of 5 microns i layer thickness, a 200 micron diameter PD device can have a data bandwidth rate of approximately 19 Gb/s in a 50 ohms transmission line, and 4.8 Gb/s for a 400 micron diameter MPD and approximately 2 Gb/s for a 600 micron diameter MPD. The microstructure hole diameters can range from 100 to 1300 nm and in some cases from 300 nm to 1000 nm. The spacing of the microstructure holes can range from 50 nm to 1000 nm and hole etch depths can range from 300 nm to 8000 nm. The holes can be etched partially into the I layer, past the I layer, into the bottom N or P layer and/or past the N or P layer. The MPD/MAPD can have a higher quantum efficiency with the microstructured holes than a comparable PD/APD with the same layer structure but without microstructured holes. The I layer can be Si and/or an alloy of GeSi where the percentage of Ge can range from 1 % to 100%. In some cases the percentage of Ge can range from 5% to 10%, in some cases from 5% to 20%, in some cases from 10% to 40%, in some cases from 40% to 60% and in some cases greater than 60%. The large area PD/MAPD can be monolithically integrated with Si electronics such as ASICs using CMOS and/or BiCMGS transistors, diodes, capacitors, resistors and other integrated circuit elements and processes. The microstructure holes can be a different shape, for example they can be cylindrical, funnel, cone shape, and the holes can have single and/or multiple sidewali angles and slopes. The holes can be oval, circular, polygonal, amoeba-shaped, rectangular, star-shaped, and/or hour glass-shaped. For non-circular holes, the "diameter" can refer one of the lateral dimensions of the hole.
[00442] It should be noted that in ail the structures in FIG. 79A, 79B, 80 and 81 , the BOX layer may or may not be provided for certain applications. Without the BOX layer, via 7930 can be etched to a stop etch layer, such as SiGeB (for a NIP structure) or a SiGe layer for example, and the bottom of the via 7930 can be coated with dielectric and/or metal and/or multiple dielectric layers with or without texturing to optimize the absorption efficiency of the PD/MAPD for example when light impinges from the top surface. Light can also impinge from the bottom surface, in which cases the bottom surface can be textured to reduce reflection and the top surface can have dielectric and/or metal layers with or without texturing to reflect any stray light back into the microstructure for absorption enhancement.
[00443] FIG. 82 is a schematic top view diagram of aperiodic/random
microstructured holes arranged in a cell and the cell is stepped periodically, according to some embodiments. The holes can be aperiodic and/or random and/or pseudo random within a cell. In the example of FIG. 82, four holes are randomly or pseudo randomly placed within each ceil 8210, and the cell 82 0 stepped periodically. The holes can be aperiodic and/or random with- in a certain cell size and the ceil can then be periodically arranged. The cell size can be small, for example containing four holes, in some cases 10 holes and in some cases 100 holes or more. The ceil can also be global such that the entire surface of the MPD/MAPD is a single cell in which case the microstructured holes are entirely aperiodic and/or random and/or pseudo random. The hole diameters can also be varied in a random and/or pseudo random manner within the ceil.
[00444] In some applications, it is desirable to have the diameter of the
MPD/MAPD as large as 1000 microns and in some cases 500-700 microns for free space communication using visible and infrared wavelength optical signal. It is often desirable to keep the I layer thickness below 10 microns so that the reverse bias voltage can be 10 volts or less and in some cases less that 5 volts. For a 5 micron thick i layer that is intrinsic and/or not intentionally doped, the reverse bias voltage can be below 10 V for example and the data rate bandwidth can be 1 GHz (or approximately 1.48 Gb/s) or more for a 700 micron diameter PD/MAPD. Monolithic integration of the large area MPD/MAPD with Si electronics such as ASIC using CMOS and/or BiCMOS can further increase the diameter of the MPD/MAPD since parasitic capacitances can be reduced. In addition, in the P-i-N (or P-l Absorbing-P-I Si muitiplication-N structure for MAPD) structure, the I layer can be Si and/or GexSii-x alloy where x can range from 0 to 1.
[00445] In addition, microstructured holes can have any desired size and shape and the size and shape at the surface of the P layer for example in a P-I-N PD structure or a P-l-P-!-N MAPD structure, can be different as the hole progresses further into the P-l-N or P-l-P-l-N layers. For example the holes can have a funnel shape, a cone shape and/or fishbowl shape. The shape of the holes can be triangle, rectangle, diamond, polygonal, ellipsoidal, oval, double ellipsoidal, cylindrical, funnel, cone, hourglass, clover leaf, amoeba-shaped, and/or any combinations thereof. For example, rectangular-shaped holes can be combined with circular-shaped holes to form rounded edges and/or cupped edges. The hole can be any combination of geometric patterns and/or non-geometric patterns. An amoeba-shaped hole can be an example of non-geometric pattern, in addition, the microstructured holes can have different shapes and sizes and can be periodic and/or aperiodic, in some cases, a cell of n by m, where n can equal m or not equal m, holes can contain different and/or same hole shapes and sizes and can be aperiodic within that ceil and where the ceil can be stepped periodically.
[00446] FIGs. 83, 84, 85 are top views of rectangular holes arranged in different orientations, according some embodiments. FIG. 83 shows rectangular holes 8312 (in this case square) arranged a square lattice 8310 with the sides of each square aligned with one another, in Fig. 84, each of the holes 8412 are positioned at an angle of rotation in lattice 8410. in FIG. 85 some square holes 8512 are rotated and some holes 8514 are not in lattice 8510. in these examples, the square holes can have a diagonal ranging from 300 nm to 5000 nm and spacing between the holes ranging from 100 nm to 10000 nm in Si and/or Ge and/or GeSi alloy and/or of any combination thereof for the P-i-N layers in the case of a microstructured photodiode and/or P-l-P-l-N layers in the case of a microstructured avalanche photodiode. The rectangular and/or polygonal holes can also apply to a
microstructured emitter such as a light emitting diode and/or vertical cavity surface emitting lasers, and/or lasers and/or threshold-less lasers and/or light emitting diodes and in addition the rectangular and/or polygonal holes can apply to solar cells and any photosensitive devices that requires the capture and trapping of photons.
[00447] The rectangles can be of different size and/or different spacing and can be periodic and/or aperiodic locally and/or globally. In addition, other patterns of arrangements and/or a combination of patterns and aperiodic arrangements can be used, if should be noted that other lattices such as hexagonal are possible and otber polygonal shapes such as triangles, star, clover, amoeba, trapezoidal, pentagon, hexagon, to name a few are also possible.
[00448] It has been found that non-even spacing between adjacent
microstructures such as the twisted square ceils in FIGs. 84 and 85 often can have more uniform absorption and/or quantum efficiency verses incident optical wavelengths characteristics than a similar structure such as FIG. 83 where the spacing is uniform. This could be due to a greater number of optical modes such as resonant optical modes for example in the non-uniform spacing of the
microstructures than a comparable uniform spacing of the microstructures.
Similarly, funnel holes and/or microstructures also exhibit a more uniform absorption and/or quantum efficiency verses optical wavelength characteristics than a similar structure with for example a cylindrical hole where the dimension of the hole in the vertical direction is more or less uniform. In this case the non- uniformity of the dimension is in the vertical direction whereas the non-uniformity of the dimensions of FIGs. 84 and 84 for example is in the horizontal direction. In certain cases, both the vertical and horizontal dimensions of adjacent
microstructures can be non-uniform to further provide a smoother absorption and/or quantum efficiency verses optical wavelength characteristics as compare to a similar structure where the horizontal and vertical dimensions of adjacent microstructures are more or less uniform. A further example are non periodic and/or aperiodic spacing of the microstructures which can result in non uniform spacing of the microstructures that can result in a smoother absorption and/or quantum efficiency verses wavelength characteristics than a similar structure that is periodic for example. The aperiodicity can be local, for example a small cell of 2x2 microstructures, 3x3, 10x10, nxm where n and m are any integer, and the cell can be stepped periodically and or in addition is aperiodicaliy stepped across the surface of the MPD/MAPD.
[00449] FIG. 86 is a plot showing finite difference time domain simulations of the optical field in some example microstructured hole arrangements. The modeled microstructure is made of silicon of 2.6 microns P-l-N photodiode structure where the vertical axis is absorption (also written as 1-R-T where R is reflection and T is transmission), which is also directly proportional to quantum efficiency where the proportionally constant can range from 1 to 0.5 and in some cases from 0.9 to 0.4. The horizontal axis is wavelength of the incident photons. Curve 8610 is for an arrangement of non-rotated square holes as shown in FIG. 83 while curve 8612 is for an arrangement where some of the square holes are rotated as shown in FIG. 85. The structure of FIG. 83 in curve 8810 has holes with 800 nm on each side of the square and 1100 nm period while the structure of FIG. 85 in curve 8612 has holes with the same 800 nm size with some of the holes rotated 30 degrees as shown in FIG. 85 As can be seen the curve 8610 (non-rotated holes) shows significantly more ripples in the absorption verses wavelength plot over a wavelength span from 800 nm to 900 nm than curve 8612 for the same structure but having some holes rotated 30 degrees. Other combinations of angles of rotation can also be used. The rotation angles can be random, some rotated at one or more fixed angle in a certain order and/or a random order. A pattern in a cell of n x m microstructures can be stepped periodically and/or there can be can be a single cell on the surface of the IVIPD/ APD.
[00450] This same principles can be applied to Ge, GeSi, Si based MPD/ APD where the P-l-N and/or P-l-P-l-N layers can be Si, GeSi, Ge based material and/or combinations thereof to address different wavelengths span, for example 830 nm to 950 nm, 850 nm to 1000 nm, 1250 nm to 1350 nm, 1350 nm to 1550 nm, 1400 nm to 1650 nm, 900 nm to 1250 nm and any combination of the span, in some cases it may be desirable to span from 850 nm to 1350 nm or longer.
[00451] The same principles also can be applied to microstructured emitters where spacing between microstructures can be non uniform to allow a smoother emission of the photon intensity verses wavelength over a given wavelength span, [00452] In the microstructured photodiode and microstructured avalanche photodiode, microstructured emitters, the material for the P-l-N, N-i-P, N-i-N, P-i-P, i-N, l-P and P-l-P-l-N, N-l~N~i-P layer(s) can be silicon based and/or germanium based and/or GeSi alloy and or combination thereof. Material in addition to GeSi alloy, such as GeSiSn, GeSiPb, SiGa, SiC, GeSiC, SiSn, SiGeAI, SiGeB, SiGeC, Siin, Geln, SiGeIn, SiGeSb, SiSbC, GeSb, SiAsGaGe, SiA!GaAs, SiAIGaAsGe, Si based with metal nanoparticles, Ge based with metal nanoparticles and/or any other possible combinations of elements in the periodic table with Si and/or Ge based material to name a few that may have different absorption coefficients and/or gain coefficients and can be integrated monolithically with silicon
electronics.
[00453] FIG. 87 shows integration and/or monolithic integration on a single silicon chip of different types of components, according to some embodiments. The components on chip 8710 can include one or more of the following component types: microstructured photodiodes, microstructured avalanche photodiodes, microstructured emitters (such as light emitting diodes and surface emitting lasers), energy harvesting components (such as microstructured solar cells), energy storage components, energy conversion electronics, and/or signal processing and routing electronics, in addition, the MPD/MAPD can be used for different data rate applications and can have different diameters, for example the larger diameter MPD/MPAD can be for data rates of less than 5 Gb/s and the smaller MPD/MAPD can be for data rates of greater than 5 Gb/s and each can have its own and/or share ASICs electronics for signal processing, amplification, conditioning, routing, storage, buffering, and other electronics used for optical data communications. The same can be applied to the microstructured emitters, where different data rate emitters can be integrated and/or monolithically integrated on a single silicon chip with its same and/or separate ASICs for signal processing and driver electronics. The solar cell can be microstructured to improve efficiency and can be used to provide electrical power to the photodetectors and/or photon emitters and/or the electronics, in certain applications, excess and/or intentionally provided optical power from the optical fiber can be used to illuminate the solar cell to provide electrical power to the photodetectors and/or photon emitters such that it can be possible that in certain applications that metal wires are not necessary for the optical transceiver operation. The optical power can also be brought to the solar cell via a separate optical fiber and/or in addition if can also be power by solar energy.
[00454] As shown in FIG. 87, all the photon detection and/or energy conversion and/or photon emitters can have microstructures for light trapping and/or enhancement of the absorption and/or the gain. For each component, the microstructures of holes and/or pillars can be optimized for a specific wavelength range and/or efficiency. In certain cases, not ail photonic devices on the same chip include microstructures. [00455] In addition to applying microstructures for the enhancement of absorption to photodiodes and avalanche photodiodes, this can also be applied to other photodetectors such as phototransistors. See, e.g., A Review of BJT Based Phototransistor, Sharma, et a!,, International Journal of Engineering Research & Technology, Vol. 3 Issue 4, April (2014) (incorporated by reference herein); where microstructures such as holes and/or pillars can be formed on the base of the phototransistor and in some cases on both the emitter and base and in some cases on the emitter, base and collector and in some cases on the base and collector either partially and/or fully. The microstructures can be formed fully and/or partially in the emitter and/or base and/or collector and/or in combinations of emitter/base/collector. The microstructured phototransistors can have a higher optica! gain or quantum efficiency than a similar phototransistor without
microstructures for the enhancement of absorption of the signal photons. Material used for the phototransistor can include Si, GeSi, G and other material family such as lll-V material family. Si/GeSi and/or Ge/Si can form a heterojuncfion bipolar phototransistor. In addition, the Si/GeSi/Ge microstructured enhanced
phototransistor(s) can be monolithically integrated with ASIC (application specific integrated circuits) electronics on a single silicon chip.
[00456] Other photosensors that can have improved quantum efficiency with the application of microstructures for the enhancement of absorption include CMOS optical sensors for image processing. In addition, the microstructured CMOS sensor(s) can be monolithically integrated with ASIC electronics on a single silicon chip.
[00457] This patent application refers to certain theories in explaining the nature and operation of devices, but it should be dear that such theories are based on current understanding and do not affect the actual operation of the disclosed devices even if future developments prove the theories incorrect. This patent specification also refers to numerical ranges of paramaters, and it should be understood that insubstantial departures from such ranges are still within the spirit of the disclosed advancements.
[00458] It should be understood that the figures depicting devices are not to scale and are somewhat idealized, e.g., with straight lines and sharp corners whereas the actual devices may and are likely to have walls that are not as straight or smooth and corners that are somewhat rounded, in fact, depending on processing parameters walls such as the wails of holes or pillars in the
microstructures are likely to be uneven and rough-surfaced, with surface features such as depressions and bumps, which can actually help with effects such as reduced undesirable reflections.
[00459] The semiconductor layers for the detection of light and/or signal processing and distribution integrated circuits can be grown epitaxially using techniques such as vapor phase epitaxy, chemical vapor deposition, plasma enhanced chemical vapor deposition, atomic layer deposition, molecular beam epitaxy, to name a few, and/or selective area epitaxy, selective area epitaxial lateral over growth, epitaxial lateral overgrowth, heteroepitaxy, wafer bonding, epitaxial lift-off process for example and any combination of growth, bonding, lift-off processes. A preferred process for the semiconductor layers is chemical vapor epitaxy or chemical vapor deposition.
[00480] In addition, the microstructure holes can be only in the absorbing high electric field Ύ region and not necessarily extend into and/or through the N and P regions of the PD/APD. The holes can also overlap either the entire length of the hole and/or adjacent holes can partially overlap along the length of the holes.
[00481] Doping of P, I and N regions often have a gradual transition between different doping level regions due in part to diffusion of the dopants during epitaxial growth. Transition from high doping to low doping can occur over a distance of 1 to 1000 nm or more depending on dopant types, doping levels, growth temperatures and epitaxial deposition methods. PIN structures are often P+ P P- 1 N- N N+ where the P and P- and N and N- are transition regions and a very narrow transition region is desirable.
[00462] The P-i-N layers of the PD can be GaxSii-x where x is greater than 0 and can equal to 1 and any value between > 0 and 1 that is grown on and SOI (silicon on insulator) wafer with or without a Si N layer and/or on a Si substrate that is N type and in some cases can be P type. The P and N can be interchanged. For a MAPD device, the layers of the P-i-P can be GaxSh-x where x is greater than 0 and can equal to 1 and any value between > 0 and 1 and the bottom P charge layer can also be Si (where x=0, grown on i Si multiplication layer on N Si on SOI wafer and or Si wafer that is N type and in some cases P type. P and N can be interchanged.
[00483] id-bandgap defects and or impurity levels can be generated in Si, GeSi, Ge material systems using ion implantation for example, and/or high impruirty concentrations resulting in a sub bandgap absorption levels; see for example State-of-the-art all-silicon sub-bandgap, phoiodetectors at telecom and datacom wavelengths, M. Casalino et a!., Laser Photonics Rev., 1-27 (2018) / DOI 10.1002/ipor.201600085 (incorporated by reference herein and referred to as "Casalino et a!."). The same method can be applied to the Si, GeSi, Ge material system MPD, APD to extend the operational wavelengths beyond the material bandgap, for example Si, GeSi, Ge MPD/MAPD can have usable quantum efficiencies of 0% or more at certain wavelengths in the wavelength ranges of 1000 nm to 2000 nm by introducing mid-bandgap absorption levels as described by Casalino et ai. in combination with microstructures for additional absorption enhancements as described in this application.
[00484] Although the foregoing has been described in some detail for purposes of clarity, it will be apparent that certain changes and modifications may be made without departing from the principles thereof, it should be noted that there are many alternative ways of implementing both the processes and apparatuses described herein. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the body of work described herein is not to be limited to the details given herein, which may be modified within the scope and equivalents of the appended claims.

Claims

What it claimed is:
A microstructure-enhanced photodetector comprising:
a photon absorbing l-iayer, a top layer over the l-iayer, and a bottom layer under the i-layer;
wherein:
the l-layer comprises GexSh-x material, where x is more than zero but less than one and is intentionally divided by microstructures into plural regions such that at some of the regions at least a portion of the l-layer material is absent compared with other regions;
the top layer comprises GexSii-x material, where x is between zero and one inclusive, and is doped to P or N conductivity; and the bottom layer comprises GexSii-x material, where x is between zero and one inclusive, and is doped to conductivity opposite that of the top layer; and
said photodetector has photon absorption and quantum efficiency (QE) that are enhanced compared with an otherwise same device with bulk material l-layer when reverse biased to generate an electrical signal in response to an incident optical beam in a selected wavelength range that is generally coilinear with the microstructures and concurrently illuminates plural microstructures with a substantially continuous cross-section of the beam.
The microstructure-enhanced photodetector of claim 1 , in which the l-iayer forms a heterojunction with at least one of the top layer and the bottom layer.
The microstructure-enhanced photodetector of claim 1 , in which the x in the I- layer material is greater than the x of the material of at least one of the top and bottom layers.
4, The microstructure-enhanced photodetecior of claim , in which the x in the I- layer material is greater than the x of the material of each of the top and bottom layers. 5. The microstructure-enhanced photodetector of claim 1 , in which the l-layer comprises a stack of sub-layers of the GexSh-x material where at least two of the sub-layers differ in their x-values.
8. The microstructure-enhanced photodetector of claim 1 , in which the l-iayer material consists essentially of Ge and Si.
7. The microstructure-enhanced photodetector of claim 1 , in which said
microstructures comprise holes in the l-layer that interrupt an otherwise continuous l-layer.
8. The microstructure-enhanced photodetector of claim 1 , in which said
microstructures comprise holes in the l-layer that are funnel-shaped, having cross-sections that generally decrease with distance from the top layer.
9. The microstructure-enhanced photodetector of claim 1 , in which said
microstructures extend in both the top layer and the bottom layer.
10. The microstructure-enhanced photodetector of claim 1 , in which said
microstructures comprise holes in the l-layer that are non-circular in cross- section.
11. The microstructure-enhanced photodetector of claim 1 , in which said
microstructures comprise holes in the l-iayer in an array that is substantially aperiodic.
12. The microstructure-enhanced photodetector of claim 1 , in which said
microstructures comprise an array of holes through to the top layer and into the i-layer and another array of holes through the bottom layer and into the l-layer.
13. The microstructure-enhanced photodetector of claim 1 , in which at least one of the top and bottom layers is textured.
14. The microstructure-enhanced photodetector of claim 1 , in which said
microstructures comprise holes in the l-layer that are slanted relative to an interface between the top layer and the i-layer.
15. The microstructure-enhanced photodetector of claim 1 , further including a substrate comprising Si on or in which said photodetector is formed, and an integrated circuit built on or in the same substrate and electrically coupled with the photodetector to process said electrical signal.
16. The microstructure-enhanced photodetector of claim 1 , further including a substrate comprising Si on or in which said photodetector and additional photodetectors are formed, and plural integrated circuits built on or in the same substrate and electrically coupled with the photodetectors to process electrical signal from each.
17. The microstructure-enhanced photodetector of claim 16, in which at least one of the photodetectors on or in the substrate is larger than another of the photodetectors on or in the same substrate,
18. The microstructure-enhanced photodetector of claim 1 , in which said
microstructures have a depth or height in the range of 100-5000 nm, a lateral dimension in the range of 50-3000 nm, and spacing in the range of 0-5000 nm.
19. The microstructure-enhanced photodetector of claim 1 , further comprising reflectors surrounding at least the l-layer and configured to reflect light therefrom back into the i-iayer.
20. The microstructure-enhanced photodetector of claim 1 , further including a
reflector at least at one of the top layer and the bottom layer configured to reflect light from the l-layer back into the l-layer.
21. The microstruciure-enhanced photodetector of claim 1 , further including a doped charge layer under the l-layer, an avalanche Mayer under the charge layer, and a semiconductor layer under the avalanche l-iayer doped to conductivity opposite that of the charge layer, thereby forming a microstructure- enhanced avalanche photodetector,
22, The microstructure-enhanced photodetector of claim 1 , in which the quantum efficiency of the photodetector is at least 30% in a selected portion of at least one of the wavelength ranges 800-900 nm and 1450-1850 nm of said incident optical beam.
23, The microstructure-enhanced photodetector of claim 22, in which the quantum efficiency of the photodetector is at least 30% in a wavelength range of 850 nm ±10 nm for bandwidth of at least 20 Gb/s.
24. The microstructure-enhanced photodetector of claim 22, in which the quantum efficiency of the photodetector is at least 30% in a wavelength range of 1550 nm ±10 nm for bandwidth of at least 20 Gb/s.
25. The microstructure-enhanced photodetector of claim 1 , in which the l-layer is Geo.2Sio.s material that is 2 micrometers thick, and the photodetector has a quantum efficiency of at least 40% in the wavelength range 850-980 nm of the incident optical beam and bandwidth of at least 20 Gb/s.
26. The microstructure-enhanced photodetector of claim 1 , in which the l-iayer is Geo.4Sio.6 material that is 2 micrometers thick, and the photodetector has a quantum efficiency of at least 30% in the wavelength range 1250-1350 nm of the incident optical beam and bandwidth of at least 20 Gb/s.
27. A microstructure-enhanced photodetector comprising:
a photon absorbing l-iayer, a top layer over the l-iayer doped to P or N conductivity, and a bottom layer under the i-layer doped to conductivity opposite that of the top layer;
wherein: the l-layer consists essentially of Ge and is intentionally divided by microstructures into regions such that at least a portion of the i-layer material is absent from some of the regions compared with other regions of the i-layer; and
each of the top layer and the bottom layer consists essentially of one but not the other of Ge and Si except for being doped to said P or N conductivity; and
said photodetector has photon absorption and quantum efficiency (QE) that are enhanced compared with an otherwise same device with bulk material I-layer when reverse biased to generate an electrical signal in response to an incident optical beam at a selected wavelength range that is generally coilinear with the microstructures and concurrently illuminates plural microstructures with a substantially continuous cross-section of the beam.
28. The microstructure-enhanced photodetector of claim 27, in which each of the top and bottom layers consists essentially of Ge except for being doped to said P or N conductivity.
29. The microstructure-enhanced photodetector of claim 27, in which each of the top and bottom layers consists essentially of Si except for being doped to said P or N conductivity.
30. The microstructure-enhanced photodetector of claim 27, in which the I-layer forms a heterojunction with at least one of the top layer and the bottom layer.
31. The microstructure-enhanced photodetector of claim 27, further including a doped charge layer under the I-layer, an avalanche I-layer under the charge layer, and a semiconductor layer under the avalanche i-layer doped to conductivity opposite that of the charge layer, thereby forming a microstructure- enhanced avalanche photodetector.
32. The microstructure-enhanced photodetector of claim 27, in which said microstructures comprise holes in the l-layer that interrupt an otherwise continuous l-layer.
33. The microstructure-enhanced photodetector of claim 27, in which said
microstructures comprise holes in the l-layer that are funnel-shaped, having cross-sections that generally decrease with distance from the top layer.
34. The microstructure-enhanced photodetector of claim 27, in which said
microstructures comprise holes in the l-layer in an array that is substantially aperiodic.
35. The microstructure-enhanced photodetector of claim 27, in which said
microstructures comprise an array of holes through to the top layer and into the i-layer and another array of holes through the bottom layer and into the l-iayer.
38. The microstructure-enhanced photodetector of claim 1 , further including a substrate comprising Si on or in which said photodetector is formed, and an integrated circuit built on or in the same substrate and electrically coupled with the photodetector to process said electrical signal.
37. A method of making a microstructure-enhanced photodetector comprising:
forming a bottom layer of a semiconductor material doped to P or N conductivity, a photo-absorbing i-iayer over the bottom layer, and a top layer that is over the i-iayer and is doped to conductivity opposite that of the bottom layer;
wherein:
the l-layer comprises one of (i) GexSh-x material, where x is more than zero but less than one , and (ii) essentially only Ge; each of the top layer and the bottom layer comprises one of (i)
GexSh-x material, where x is between zero and one inclusive , and (ii) one but not the other of essentially only Ge and Si; forming microstruetures that divide the l-!ayer structures into plural regions such that at some of the regions at least a portion of the I- layer material is absent compared with other regions;
wherein said photodetector has photon absorption and quantum efficiency (QE) that are enhanced compared with an otherwise same device with bulk material l-iayer when reverse biased to generate an electrical signal in response to an incident optical beam in a selected wavelength range that is generally coilinear with the microstruetures and concurrently illuminates plural microstruetures with a substantially continuous cross-section of the beam.
38. The method of claim 37, which said forming comprises creating a
heteroj unction at an interface between the i-iayer and at least one of the top layer and the bottom layer.
39. The method of claim 37, further including forming a charge layer that is under the i-iayer and is doped to a selected conductivity type, an avalanche layer under the doped charge layer, and a semiconductor layer that is under the avalanche layer and is doped to a conductivity type opposite that of the charge layer, thereby forming a microstructured avalanche photoconductor.
40. The method of claim 37, in which the forming of microstruetures comprises forming holes in the I-iayer while keeping the I-iayer substantially continuous except for the holes.
PCT/US2016/067977 2013-05-22 2016-12-21 Microstructure enhanced absorption photosensitive devices WO2017112747A1 (en)

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CN201680082229.1A CN109155340A (en) 2015-12-21 2016-12-21 Micro-structure enhancing absorbs light-sensitive device
US15/797,821 US10446700B2 (en) 2013-05-22 2017-10-30 Microstructure enhanced absorption photosensitive devices
US16/042,535 US10700225B2 (en) 2013-05-22 2018-07-23 Microstructure enhanced absorption photosensitive devices
US16/296,985 US10468543B2 (en) 2013-05-22 2019-03-08 Microstructure enhanced absorption photosensitive devices
US16/528,958 US11121271B2 (en) 2013-05-22 2019-08-01 Microstructure enhanced absorption photosensitive devices
US17/182,954 US11791432B2 (en) 2013-05-22 2021-02-23 Microstructure enhanced absorption photosensitive devices
US18/113,474 US20230215962A1 (en) 2013-05-22 2023-02-23 Microstructure enhanced absorption photosensitive devices
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US10446700B2 (en) 2013-05-22 2019-10-15 W&Wsens Devices, Inc. Microstructure enhanced absorption photosensitive devices
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