WO2017096766A1 - Method and device for eliminating interference and smart television set - Google Patents

Method and device for eliminating interference and smart television set Download PDF

Info

Publication number
WO2017096766A1
WO2017096766A1 PCT/CN2016/084270 CN2016084270W WO2017096766A1 WO 2017096766 A1 WO2017096766 A1 WO 2017096766A1 CN 2016084270 W CN2016084270 W CN 2016084270W WO 2017096766 A1 WO2017096766 A1 WO 2017096766A1
Authority
WO
WIPO (PCT)
Prior art keywords
voltage
clock pulse
pulse
interference
preset
Prior art date
Application number
PCT/CN2016/084270
Other languages
French (fr)
Chinese (zh)
Inventor
王云华
Original Assignee
深圳Tcl数字技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳Tcl数字技术有限公司 filed Critical 深圳Tcl数字技术有限公司
Publication of WO2017096766A1 publication Critical patent/WO2017096766A1/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/125—Discriminating pulses
    • H03K5/1252—Suppression or limitation of noise or interference
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/436—Interfacing a local distribution network, e.g. communicating with another STB or one or more peripheral devices inside the home

Definitions

  • the present invention relates to the field of television technologies, and in particular, to a method and device for removing interference and a smart television.
  • the invention provides a method, a device and a smart television for removing interference, aiming at solving the technical problem of data transmission error caused by pulse interference of the IIC bus.
  • the present invention provides a method for removing interference, and the method for removing interference includes the following steps:
  • the step of determining whether there is an interference pulse in the current inter-chip IIC bus when detecting the read/write data command includes:
  • the step of determining whether the current inter-chip IIC bus has an interference pulse when detecting the read/write data command comprises:
  • the step of adjusting the voltage of the clock pulse comprises:
  • the voltage of the clock pulse is increased when the voltage of the clock pulse is less than or equal to the second predetermined voltage.
  • the preset condition comprises:
  • the detected SDA bus pulse is a sustained low level and jumps high at the end of the low level duration, and the clock pulse is continuously high during the SDA bus pulse change.
  • the present invention also provides an apparatus for removing interference, and the apparatus for removing interference includes:
  • a determining module configured to determine whether an interference pulse exists in a current internal integrated circuit IIC bus when detecting a read/write data command
  • the monitoring module is configured to monitor the serial data SDA bus pulse and the clock pulse of the IIC bus in real time when there is an interference pulse on the current IIC bus;
  • an adjustment module configured to adjust a voltage of the clock pulse when the SDA bus pulse and the clock pulse satisfy a preset condition.
  • the determining module comprises:
  • An acquiring unit configured to acquire a voltage of a current clock pulse when detecting a read/write data command
  • the first determining unit is configured to determine whether the voltage of the acquired clock pulse is greater than the first preset voltage, wherein when the voltage of the acquired clock pulse is greater than the first preset voltage, determining that the current IIC bus has an interference pulse.
  • the adjustment module comprises:
  • a second determining unit configured to determine whether a voltage of the clock pulse is greater than a second preset voltage
  • An adjusting unit configured to decrease a voltage of the clock pulse when a voltage of the clock pulse is greater than a second preset voltage; and increase the clock when a voltage of the clock pulse is less than or equal to a second preset voltage The voltage of the pulse.
  • the preset condition comprises:
  • the detected SDA bus pulse is a sustained low level and jumps high at the end of the low level duration, and the clock pulse is continuously high during the SDA bus pulse change.
  • the present invention also provides a smart television comprising the apparatus for removing interference as described in any of the above.
  • the invention determines whether there is an interference pulse in the current internal integrated circuit IIC bus when detecting the read/write data command, and then monitors the serial data SDA bus pulse and the clock pulse of the IIC bus in real time when there is an interference pulse on the current IIC bus. Then, when the SDA bus pulse and the clock pulse satisfy the preset condition, the voltage of the clock pulse is adjusted, and the voltage of the clock pulse is adjusted when the interference pulse exists on the IIC bus, thereby avoiding the change of the SDA bus pulse and the clock pulse caused by the interference pulse.
  • the problem of data transmission error between the external device and the main chip of the smart TV caused by the change of the start condition or the stop condition of the IIC bus protocol is caused by correcting the high and low levels of the clock pulse to ensure the data transmission of the IIC bus.
  • FIG. 1 is a schematic flow chart of a first embodiment of a method for removing interference according to the present invention
  • FIG. 2 is a schematic diagram of a refinement process of determining an interference pulse step in a second embodiment of the method for removing interference according to the present invention
  • FIG. 3 is a schematic flowchart of a step of adjusting a voltage of a clock pulse in a third embodiment of the method for removing interference according to the present invention
  • FIG. 4 is a schematic diagram of functional modules of a first embodiment of the apparatus for removing interference according to the present invention.
  • FIG. 5 is a schematic diagram of a refinement function module of a determining module in a second embodiment of the apparatus for removing interference according to the present invention
  • FIG. 6 is a schematic diagram of a refinement function module of an adjustment module in a third embodiment of the apparatus for removing interference according to the present invention.
  • FIG. 1 is a schematic flowchart of a first embodiment of a method for removing interference according to the present invention.
  • the method for removing interference includes:
  • Step S10 when detecting a read/write data command, determining whether there is an interference pulse in the current internal integrated circuit IIC bus;
  • the read/write data command refers to a data command sent by the main chip of the smart TV to an external device requesting to read/write data stored by the device.
  • the voltage of the current clock pulse is obtained, and then the voltage of the acquired clock pulse is determined to be greater than the first preset voltage, and the voltage of the acquired clock pulse is obtained.
  • the current IIC bus has an interference pulse
  • the first preset voltage is the minimum voltage when the IIC bus has an interference pulse
  • the specific value can be set according to the current IIC bus and the smart television system, further Ground
  • you can use the voltage of the IIC bus clock pulse divided by the number of analog to digital digits to get an intermediate value, and then compare the intermediate value with the preset value to determine whether the current IIC bus has interference pulses, for example, When the number of digits of the analog to digital is 256, that is, ADC_Bit(x1) 256 (8bit), the preset value is 2, if the calculated intermediate value is greater than 2, the current IIC bus has interference pulses, otherwise the current IIC bus does not.
  • Step S20 real-time monitoring the serial data SDA bus pulse and clock pulse of the IIC bus when the current IIC bus has an interference pulse
  • the SDA bus pulse and the clock pulse level of the IIC bus are detected in real time.
  • the voltage of the SDA bus pulse and the clock pulse can be detected in real time, and then the detected voltage is converted.
  • the voltage range is low when 0V ⁇ 0.25V, and the voltage range is high when it is 3.5V ⁇ 5V.
  • the specific range of high and low level in this embodiment is based on the actual situation of the current circuit. determine.
  • Step S30 adjusting the voltage of the clock pulse when the SDA bus pulse and the clock pulse satisfy a preset condition.
  • the preset condition includes: the detected SDA bus pulse is a continuous low level and jumps to a high level at the end of the low level duration, and the clock pulse is continuous during the change of the SDA bus pulse. High level.
  • the clock pulse By detecting the change of the clock pulse and the SDA bus pulse in real time, it is determined whether the detected clock pulse and the change of the SDA bus pulse satisfy the preset condition, and then the clock pulse is adjusted when the change of the clock pulse and the SDA bus pulse satisfies the preset condition.
  • the voltage specifically, when the voltage of the clock pulse is greater than the second preset voltage, lowering the voltage of the clock pulse, and increasing the voltage of the clock pulse when the voltage of the clock pulse is less than or equal to the second predetermined voltage, wherein the second pre- Set the voltage according to the specific conditions of the current IIC bus.
  • the voltage of the clock pulse is adjusted to be half or multiple adjustment. That is, when the voltage of the clock pulse is lowered, the voltage of the clock pulse is reduced to half of the actual voltage value, and when the voltage of the clock pulse is increased, the voltage of the clock pulse is increased to twice the actual voltage value.
  • the read/write data command when the read/write data command is detected, it is determined whether the current internal integrated circuit IIC bus has an interference pulse, and then the serial data SDA bus pulse and the clock of the IIC bus are monitored in real time when there is an interference pulse on the current IIC bus. Pulse, then adjust the voltage of the clock pulse when the SDA bus pulse and the clock pulse meet the preset conditions, realize the voltage of the clock pulse when the interference pulse exists on the IIC bus, and avoid the SDA bus pulse and the clock pulse generated due to the interference pulse.
  • the change of the start condition or the stop condition of the IIC bus protocol caused by the change causes the data transmission error between the external device and the main chip of the smart TV, and the data transmission of the IIC bus is ensured by correcting the high and low levels of the clock pulse, thereby improving the user.
  • the change of the start condition or the stop condition of the IIC bus protocol caused by the change causes the data transmission error between the external device and the main chip of the smart TV, and the data transmission of the IIC bus is ensured by correcting the high and low levels of the clock pulse, thereby improving the user.
  • step S10 includes:
  • Step S11 acquiring a voltage of a current clock pulse when detecting a read/write data command
  • the read/write data command refers to a data command sent by the main chip of the smart TV to an external device requesting to read/write data stored by the device, and acquiring the current clock pulse when detecting the read/write data command.
  • the voltage, and thus the voltage of the clock pulse determines if there is any pulse interference on the current IIC bus.
  • Step S12 determining whether the voltage of the acquired clock pulse is greater than the first preset voltage, wherein when the voltage of the acquired clock pulse is greater than the first preset voltage, determining that the current IIC bus has an interference pulse.
  • the first preset voltage is the minimum voltage when the IIC bus has an interference pulse, and the specific value can be set according to the current IIC bus and the smart television system. Further, for the convenience, the voltage of the IIC bus clock pulse can be divided. Obtain an intermediate value by the number of digits of the analog to digital number, and then compare the intermediate value with the preset value to determine whether there is an interference pulse on the current IIC bus.
  • the pulse interference makes it possible to accurately determine whether the current IIC bus has pulse interference according to the voltage of the clock pulse, thereby improving the accuracy of determining the pulse interference and further improving the user experience.
  • step S30 includes:
  • Step S31 determining whether the voltage of the clock pulse is greater than a second preset voltage
  • Step S32 when the voltage of the clock pulse is greater than the second preset voltage, reducing the voltage of the clock pulse;
  • Step S33 increasing the voltage of the clock pulse when the voltage of the clock pulse is less than or equal to the second preset voltage
  • the voltage of the clock pulse when the voltage of the clock pulse is greater than the second preset voltage, the voltage of the clock pulse is decreased, and when the voltage of the clock pulse is less than or equal to the second preset voltage, the voltage of the clock pulse is increased, wherein the second pre- Set the voltage according to the specific conditions of the current IIC bus.
  • the voltage of the clock pulse is adjusted to be half or multiple adjustment. That is, when the voltage of the clock pulse is lowered, the voltage of the clock pulse is reduced to half of the actual voltage value, and when the voltage of the clock pulse is increased, the voltage of the clock pulse is increased to twice the actual voltage value.
  • FIG. 4 is a schematic diagram of functional modules of a first embodiment of an apparatus for removing interference according to the present invention.
  • the apparatus for removing interference includes:
  • the determining module 10 is configured to determine whether an interference pulse exists in the current internal integrated circuit IIC bus when detecting the read/write data command;
  • the read/write data command refers to a data command sent by the main chip of the smart TV to an external device requesting to read/write data stored by the device.
  • the determining module 10 can obtain the voltage of the current clock pulse when detecting the read/write data command, and then determine whether the voltage of the acquired clock pulse is greater than the first preset voltage, and obtain the clock. When the voltage of the pulse is greater than the first preset voltage, the determining module 10 determines that there is an interference pulse in the current IIC bus, wherein the first preset voltage is a minimum voltage when the interference pulse exists on the IIC bus, and the specific value may be based on the current IIC bus and the smart The television system performs setting.
  • the intermediate voltage value can be obtained by dividing the voltage of the IIC bus clock pulse by the number of analog digits, and then comparing the intermediate value with the preset value to determine whether the current IIC bus is There is an interference pulse.
  • the preset value is 2
  • the monitoring module 20 is configured to monitor the serial data SDA bus pulse and the clock pulse of the IIC bus in real time when the current IIC bus has an interference pulse;
  • the monitoring module 20 detects the SDA bus pulse and the clock pulse level of the IIC bus in real time, and can also detect the voltage of the SDA bus pulse and the clock pulse in real time, and then detects the voltage.
  • the voltage is converted to a level. Under normal circumstances, the voltage range is 0V ⁇ 0.25V, and the voltage range is 3.5V ⁇ 5V.
  • the specific range of the high and low levels is based on the current circuit. The actual situation is determined.
  • the adjusting module 30 is configured to adjust a voltage of the clock pulse when the SDA bus pulse and the clock pulse satisfy a preset condition.
  • the preset condition includes: the detected SDA bus pulse is a continuous low level and jumps to a high level at the end of the low level duration, and the clock pulse is continuous during the change of the SDA bus pulse. High level.
  • the adjustment module 30 determines whether the detected clock pulse and the change of the SDA bus pulse satisfy the preset condition, and then adjusts when the change of the clock pulse and the SDA bus pulse satisfies the preset condition.
  • the voltage of the clock pulse specifically, when the voltage of the clock pulse is greater than the second preset voltage, lowering the voltage of the clock pulse, and increasing the voltage of the clock pulse when the voltage of the clock pulse is less than or equal to the second predetermined voltage, wherein
  • the second preset voltage is set according to the specific conditions of the current IIC bus.
  • the voltage of the clock pulse is adjusted to be half or multiple adjustment. That is, when the voltage of the clock pulse is lowered, the voltage of the clock pulse is reduced to half of the actual voltage value, and when the voltage of the clock pulse is increased, the voltage of the clock pulse is increased to twice the actual voltage value.
  • the determining module 10 determines whether the current internal integrated circuit IIC bus has an interference pulse, and then when the current IIC bus has an interference pulse, the detecting module 20 monitors the serial of the IIC bus in real time.
  • the adjustment module 30 adjusts the voltage of the clock pulse, thereby realizing the adjustment of the voltage of the clock pulse when the interference pulse exists on the IIC bus, thereby avoiding interference
  • the pulse causes the change of the start condition or stop condition of the IIC bus protocol caused by the change of the SDA bus pulse and the clock pulse, which causes the data transmission error between the external device and the main chip of the smart TV, and the high and low levels of the clock pulse are corrected.
  • the data transmission of the IIC bus improves the user experience.
  • the determining module 10 includes:
  • the obtaining unit 11 is configured to acquire a voltage of a current clock pulse when detecting a read/write data command
  • the read/write data command refers to a data command sent by the main chip of the smart TV to an external device to request reading/writing data stored by the device.
  • the obtaining unit 11 obtains the current The voltage of the clock pulse, and thus the voltage of the clock pulse, determines whether there is pulse interference on the current IIC bus.
  • the first determining unit 12 is configured to determine whether the voltage of the acquired clock pulse is greater than the first preset voltage, wherein when the voltage of the acquired clock pulse is greater than the first preset voltage, determining that the current IIC bus has an interference pulse
  • the first preset voltage is the minimum voltage when the IIC bus has an interference pulse, and the specific value can be set according to the current IIC bus and the smart television system. Further, for the convenience, the voltage of the IIC bus clock pulse can be divided. Obtain an intermediate value by the number of digits of the analog to digital number, and then compare the intermediate value with the preset value to determine whether there is an interference pulse on the current IIC bus.
  • the obtaining unit 11 acquires the voltage of the current clock pulse, and then the first determining unit 12 determines whether the voltage of the acquired clock pulse is greater than the first preset voltage, according to The judgment result determines whether the current IIC bus has pulse interference, so that whether the current IIC bus has pulse interference is accurately determined according to the voltage of the clock pulse, the accuracy of determining the pulse interference is improved, and the user experience is further improved.
  • the adjustment module 30 includes:
  • a second determining unit 31 configured to determine whether a voltage of the clock pulse is greater than a second preset voltage
  • the adjusting unit 32 is configured to: when the voltage of the clock pulse is greater than the second preset voltage, lower the voltage of the clock pulse; when the voltage of the clock pulse is less than or equal to the second preset voltage, increase the Clock pulse voltage
  • the voltage of the clock pulse when the voltage of the clock pulse is greater than the second preset voltage, the voltage of the clock pulse is decreased, and when the voltage of the clock pulse is less than or equal to the second preset voltage, the voltage of the clock pulse is increased, wherein the second pre- Set the voltage according to the specific conditions of the current IIC bus.
  • the voltage of the clock pulse is adjusted to be half or multiple adjustment. That is, when the voltage of the clock pulse is lowered, the voltage of the clock pulse is reduced to half of the actual voltage value, and when the voltage of the clock pulse is increased, the voltage of the clock pulse is increased to twice the actual voltage value.
  • the second determining unit 31 determines whether the voltage of the clock pulse is greater than a second preset voltage, and then when the voltage of the clock pulse is greater than the second preset voltage, the adjusting unit 32 decreases the voltage of the clock pulse, or When the voltage of the clock pulse is less than or equal to the second preset voltage, the adjusting unit 32 increases the voltage of the clock pulse, and realizes that the voltage of the clock pulse is adjusted according to the magnitude of the current clock pulse, thereby enabling accurate adjustment.
  • the voltage of the current clock pulse avoids the problem of data transmission error between the external device and the main chip of the smart TV caused by the start condition or the stop condition of the IIC bus protocol caused by the change of the SDA bus pulse and the clock pulse caused by the interference pulse. Further improve the user experience.
  • the present invention further provides a smart television comprising the apparatus for removing interference of any of the above embodiments.

Abstract

A method and device for eliminating interference and a smart television set. The method comprises: determining whether an interference pulse exists in a current inter-integrated circuit (IIC) bus when sensing a read/write data instruction (S10); monitoring in real time a serial data (SDA) bus pulse and a clock pulse of the IIC bus when an interference pulse exists in the current IIC bus (S20); and adjusting the voltage of the clock pulse when the SDA bus pulse and the clock pulse satisfy a predetermined condition (S30). Voltage adjustment for a clock pulse when an interference pulse exists in an IIC bus is implemented, thereby avoiding the problem of data transmission error between an external apparatus and a main chip of a smart television set caused by a change in a start or stop condition of an IIC bus protocol due to a change in an SDA bus pulse and the clock pulse because of the interference pulse; and data transmission of the IIC bus is ensured by correcting the high-low level of the clock pulse.

Description

去除干扰的方法、装置及智能电视  Method, device and smart television for removing interference
技术领域Technical field
本发明涉及电视技术领域，尤其涉及一种去除干扰的方法、装置及智能电视。The present invention relates to the field of television technologies, and in particular, to a method and device for removing interference and a smart television.
背景技术Background technique
随着智能电视系统的发展，智能电视的功能越来越丰富，进而造成智能电视主机板增加了很多与这些功能对应的外部设备，而外部设备与智能电视的主芯片之间多采用IIC（Inter-Integrated Circuit，内部集成电路）总线连接。With the development of smart TV systems, the functions of smart TVs are becoming more and more abundant, which in turn causes smart TV motherboards to add a lot of external devices corresponding to these functions, and IIC (Inter) is used between the external devices and the main chips of smart TVs. -Integrated Circuit, internal integrated circuit) bus connection.
但是，随着挂载的设备越来越多，IIC总线上会经常出现各种脉冲电平干扰的情况，进而造成IIC总线的SDA（Serial Data，串行数据）总线脉冲及时钟脉冲发生变化，导致外部设备与智能电视的主芯片之间数据传输错误，甚至造成从设备卡死无法响应主芯片的请求。However, with the increasing number of mounted devices, various pulse level interferences often occur on the IIC bus, which in turn causes the SDA of the IIC bus (Serial). Data, serial data) The bus pulse and the clock pulse change, causing data transmission errors between the external device and the main chip of the smart TV, and even causing the slave device to be stuck and unable to respond to the request of the master chip.
发明内容Summary of the invention
本发明提供一种去除干扰的方法、装置及智能电视，旨在解决由于IIC总线的脉冲干扰造成数据传输错误的技术问题。The invention provides a method, a device and a smart television for removing interference, aiming at solving the technical problem of data transmission error caused by pulse interference of the IIC bus.
为实现上述目的，本发明提供的一种去除干扰的方法，所述去除干扰的方法包括以下步骤：To achieve the above object, the present invention provides a method for removing interference, and the method for removing interference includes the following steps:
在侦测到读/写数据指令时，确定当前内部集成电路IIC总线是否存在干扰脉冲；When detecting a read/write data command, determining whether there is an interference pulse on the current internal integrated circuit IIC bus;
在当前IIC总线存在干扰脉冲时，实时监测IIC总线的串行数据SDA总线脉冲及时钟脉冲；Real-time monitoring of the serial data SDA bus pulse and clock pulse of the IIC bus when there is an interference pulse on the current IIC bus;
在所述SDA总线脉冲及时钟脉冲满足预设条件时，调整所述时钟脉冲的电压；其中，Adjusting a voltage of the clock pulse when the SDA bus pulse and the clock pulse satisfy a preset condition; wherein
所述在侦测到读/写数据指令时，确定当前片间IIC总线是否存在干扰脉冲的步骤包括：The step of determining whether there is an interference pulse in the current inter-chip IIC bus when detecting the read/write data command includes:
在侦测到读/写数据指令时，获取当前时钟脉冲的电压；Obtaining the voltage of the current clock pulse when detecting a read/write data command;
确定获取到的时钟脉冲的电压是否大于第一预设电压，其中，在获取到的时钟脉冲的电压大于第一预设电压时，确定当前IIC总线存在干扰脉冲。Determining whether the voltage of the acquired clock pulse is greater than the first preset voltage, wherein when the voltage of the acquired clock pulse is greater than the first preset voltage, determining that the current IIC bus has an interference pulse.
优选地，所述在侦测到读/写数据指令时，确定当前片间IIC总线是否存在干扰脉冲的步骤包括：Preferably, the step of determining whether the current inter-chip IIC bus has an interference pulse when detecting the read/write data command comprises:
在侦测到读/写数据指令时，获取当前时钟脉冲的电压；Obtaining the voltage of the current clock pulse when detecting a read/write data command;
确定获取到的时钟脉冲的电压是否大于第一预设电压，其中，在获取到的时钟脉冲的电压大于第一预设电压时，确定当前IIC总线存在干扰脉冲。Determining whether the voltage of the acquired clock pulse is greater than the first preset voltage, wherein when the voltage of the acquired clock pulse is greater than the first preset voltage, determining that the current IIC bus has an interference pulse.
优选地，所述调整所述时钟脉冲的电压的步骤包括：Preferably, the step of adjusting the voltage of the clock pulse comprises:
确定所述时钟脉冲的电压是否大于第二预设电压；Determining whether the voltage of the clock pulse is greater than a second preset voltage;
在所述时钟脉冲的电压大于第二预设电压时，降低所述时钟脉冲的电压；Decreasing a voltage of the clock pulse when a voltage of the clock pulse is greater than a second predetermined voltage;
在所述时钟脉冲的电压小于或等于第二预设电压时，增大所述时钟脉冲的电压。The voltage of the clock pulse is increased when the voltage of the clock pulse is less than or equal to the second predetermined voltage.
优选地，所述预设条件包括：Preferably, the preset condition comprises:
检测到的SDA总线脉冲为持续的低电平并在低电平的持续时间结束时跳转为高电平，在SDA总线脉冲的变化过程中时钟脉冲为持续的高电平。The detected SDA bus pulse is a sustained low level and jumps high at the end of the low level duration, and the clock pulse is continuously high during the SDA bus pulse change.
此外，为实现上述目的，本发明还提供一种去除干扰的装置，所述去除干扰的装置包括：In addition, in order to achieve the above object, the present invention also provides an apparatus for removing interference, and the apparatus for removing interference includes:
确定模块，用于在侦测到读/写数据指令时，确定当前内部集成电路IIC总线是否存在干扰脉冲；a determining module, configured to determine whether an interference pulse exists in a current internal integrated circuit IIC bus when detecting a read/write data command;
监测模块，用于在当前IIC总线存在干扰脉冲时，实时监测IIC总线的串行数据SDA总线脉冲及时钟脉冲；The monitoring module is configured to monitor the serial data SDA bus pulse and the clock pulse of the IIC bus in real time when there is an interference pulse on the current IIC bus;
调整模块，用于在所述SDA总线脉冲及时钟脉冲满足预设条件时，调整所述时钟脉冲的电压。And an adjustment module, configured to adjust a voltage of the clock pulse when the SDA bus pulse and the clock pulse satisfy a preset condition.
优选地，所述确定模块包括：Preferably, the determining module comprises:
获取单元，用于在侦测到读/写数据指令时，获取当前时钟脉冲的电压；An acquiring unit, configured to acquire a voltage of a current clock pulse when detecting a read/write data command;
第一确定单元，用于确定获取到的时钟脉冲的电压是否大于第一预设电压，其中，在获取到的时钟脉冲的电压大于第一预设电压时，确定当前IIC总线存在干扰脉冲。The first determining unit is configured to determine whether the voltage of the acquired clock pulse is greater than the first preset voltage, wherein when the voltage of the acquired clock pulse is greater than the first preset voltage, determining that the current IIC bus has an interference pulse.
优选地，所述调整模块包括：Preferably, the adjustment module comprises:
第二确定单元，用于确定所述时钟脉冲的电压是否大于第二预设电压；a second determining unit, configured to determine whether a voltage of the clock pulse is greater than a second preset voltage;
调整单元，用于在所述时钟脉冲的电压大于第二预设电压时，降低所述时钟脉冲的电压；在所述时钟脉冲的电压小于或等于第二预设电压时，增大所述时钟脉冲的电压。An adjusting unit, configured to decrease a voltage of the clock pulse when a voltage of the clock pulse is greater than a second preset voltage; and increase the clock when a voltage of the clock pulse is less than or equal to a second preset voltage The voltage of the pulse.
优选地，所述预设条件包括：Preferably, the preset condition comprises:
检测到的SDA总线脉冲为持续的低电平并在低电平的持续时间结束时跳转为高电平，在SDA总线脉冲的变化过程中时钟脉冲为持续的高电平。The detected SDA bus pulse is a sustained low level and jumps high at the end of the low level duration, and the clock pulse is continuously high during the SDA bus pulse change.
此外，为实现上述目的，本发明还提供一种智能电视，所述智能电视包括上述任一项所述的去除干扰的装置。Furthermore, in order to achieve the above object, the present invention also provides a smart television comprising the apparatus for removing interference as described in any of the above.
本发明通过在侦测到读/写数据指令时，确定当前内部集成电路IIC总线是否存在干扰脉冲，接着在当前IIC总线存在干扰脉冲时，实时监测IIC总线的串行数据SDA总线脉冲及时钟脉冲，然后在SDA总线脉冲及时钟脉冲满足预设条件时，调整时钟脉冲的电压，实现了在IIC总线存在干扰脉冲时调整时钟脉冲的电压，避免了由于干扰脉冲造成SDA总线脉冲及时钟脉冲产生变化引起的IIC总线协议的开始条件或停止条件变化而导致外部设备与智能电视的主芯片之间数据传输错误的问题，通过修正时钟脉冲的高低电平保证了IIC总线的数据传输。The invention determines whether there is an interference pulse in the current internal integrated circuit IIC bus when detecting the read/write data command, and then monitors the serial data SDA bus pulse and the clock pulse of the IIC bus in real time when there is an interference pulse on the current IIC bus. Then, when the SDA bus pulse and the clock pulse satisfy the preset condition, the voltage of the clock pulse is adjusted, and the voltage of the clock pulse is adjusted when the interference pulse exists on the IIC bus, thereby avoiding the change of the SDA bus pulse and the clock pulse caused by the interference pulse. The problem of data transmission error between the external device and the main chip of the smart TV caused by the change of the start condition or the stop condition of the IIC bus protocol is caused by correcting the high and low levels of the clock pulse to ensure the data transmission of the IIC bus.
附图说明DRAWINGS
图1为本发明去除干扰的方法第一实施例的流程示意图；1 is a schematic flow chart of a first embodiment of a method for removing interference according to the present invention;
图2为本发明去除干扰的方法第二实施例中确定干扰脉冲步骤的细化流程示意图；2 is a schematic diagram of a refinement process of determining an interference pulse step in a second embodiment of the method for removing interference according to the present invention;
图3为本发明去除干扰的方法第三实施例中调整时钟脉冲的电压步骤的细化流程示意图；3 is a schematic flowchart of a step of adjusting a voltage of a clock pulse in a third embodiment of the method for removing interference according to the present invention;
图4为本发明去除干扰的装置第一实施例的功能模块示意图；4 is a schematic diagram of functional modules of a first embodiment of the apparatus for removing interference according to the present invention;
图5为本发明去除干扰的装置第二实施例中确定模块的细化功能模块示意图；5 is a schematic diagram of a refinement function module of a determining module in a second embodiment of the apparatus for removing interference according to the present invention;
图6为本发明去除干扰的装置第三实施例中调整模块的细化功能模块示意图。FIG. 6 is a schematic diagram of a refinement function module of an adjustment module in a third embodiment of the apparatus for removing interference according to the present invention.
本发明目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。The implementation, functional features, and advantages of the present invention will be further described in conjunction with the embodiments.
具体实施方式detailed description
应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。It is understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
本发明提供一种去除干扰的方法。参照图1，图1为本发明去除干扰的方法第一实施例的流程示意图。The present invention provides a method of removing interference. Referring to FIG. 1, FIG. 1 is a schematic flowchart of a first embodiment of a method for removing interference according to the present invention.
在本实施例中，该去除干扰的方法包括：In this embodiment, the method for removing interference includes:
步骤S10，在侦测到读/写数据指令时，确定当前内部集成电路IIC总线是否存在干扰脉冲；Step S10, when detecting a read/write data command, determining whether there is an interference pulse in the current internal integrated circuit IIC bus;
其中，读/写数据指令是指智能电视的主芯片发送至某一外部设备请求读/写该设备存储的数据的数据指令。本实施例中，可以通过在侦测到读/写数据指令时，获取当前时钟脉冲的电压，然后确定获取到的时钟脉冲的电压是否大于第一预设电压，在获取到的时钟脉冲的电压大于第一预设电压时，当前IIC总线存在干扰脉冲，其中，第一预设电压为IIC总线存在干扰脉冲时的最小电压，其具体数值可以根据当前IIC总线以及智能电视系统进行设定，进一步地，为便于实现，可以用IIC总线时钟脉冲的电压除以模拟转数字的位数得到一个中间数值，然后将该中间数值与预设数值进行比较判断当前IIC总线是否存在干扰脉冲，譬如，在模拟转数字的位数为256时，即ADC_Bit(x1)=256(8bit)，此时预设数值为2，若计算得到的中间数值大于2，当前IIC总线存在干扰脉冲，否则当前IIC总线不存在干扰脉冲，例如，在时钟脉冲的电压：Dig_Vot(x1)=5V时，经过计算得到中间数值IIC_Digital_Detet（x1）=(Dig_Vot/ADC_Bit)*100=1.95，此时当前IIC总线不存在干扰脉冲，在时钟脉冲的电压：Dig_Vot(x2)=10V时，经过计算得到中间数值IIC_Digital_Detet（x2）=(Dig_Vot/ADC_Bit)*100=3.90，此时当前IIC总线存在干扰脉冲。The read/write data command refers to a data command sent by the main chip of the smart TV to an external device requesting to read/write data stored by the device. In this embodiment, when the read/write data command is detected, the voltage of the current clock pulse is obtained, and then the voltage of the acquired clock pulse is determined to be greater than the first preset voltage, and the voltage of the acquired clock pulse is obtained. When the first preset voltage is greater than the first preset voltage, the current IIC bus has an interference pulse, wherein the first preset voltage is the minimum voltage when the IIC bus has an interference pulse, and the specific value can be set according to the current IIC bus and the smart television system, further Ground, for ease of implementation, you can use the voltage of the IIC bus clock pulse divided by the number of analog to digital digits to get an intermediate value, and then compare the intermediate value with the preset value to determine whether the current IIC bus has interference pulses, for example, When the number of digits of the analog to digital is 256, that is, ADC_Bit(x1)=256 (8bit), the preset value is 2, if the calculated intermediate value is greater than 2, the current IIC bus has interference pulses, otherwise the current IIC bus does not. There is an interference pulse, for example, when the voltage of the clock pulse: Dig_Vot(x1)=5V, the intermediate value IIC_Digital_Detet (x1 is calculated) =(Dig_Vot/ADC_Bit)*100=1.95, at this time, there is no interference pulse on the current IIC bus. When the voltage of the clock pulse: Dig_Vot(x2)=10V, the intermediate value IIC_Digital_Detet(x2)=(Dig_Vot/ADC_Bit) is calculated. *100=3.90, there is interference pulse on the current IIC bus.
步骤S20，在当前IIC总线存在干扰脉冲时，实时监测IIC总线的串行数据SDA总线脉冲及时钟脉冲；Step S20, real-time monitoring the serial data SDA bus pulse and clock pulse of the IIC bus when the current IIC bus has an interference pulse;
根据时钟脉冲的电压确定当前IIC总线存在干扰脉冲时，实时检测IIC总线的SDA总线脉冲及时钟脉冲的电平，当然也可以实时检测SDA总线脉冲及时钟脉冲的电压，然后将检测到的电压转化为电平，一般情况下，电压范围在0V~0.25V时为低电平，电压范围在3.5V~5V时为高电平，本实施例中高低电平的具体范围根基当前电路的实际情况确定。According to the voltage of the clock pulse, when the interference pulse is present on the current IIC bus, the SDA bus pulse and the clock pulse level of the IIC bus are detected in real time. Of course, the voltage of the SDA bus pulse and the clock pulse can be detected in real time, and then the detected voltage is converted. For the level, under normal circumstances, the voltage range is low when 0V~0.25V, and the voltage range is high when it is 3.5V~5V. The specific range of high and low level in this embodiment is based on the actual situation of the current circuit. determine.
步骤S30，在所述SDA总线脉冲及时钟脉冲满足预设条件时，调整所述时钟脉冲的电压。Step S30, adjusting the voltage of the clock pulse when the SDA bus pulse and the clock pulse satisfy a preset condition.
其中，上述预设条件包括：检测到的SDA总线脉冲为持续的低电平并在低电平的持续时间结束时跳转为高电平，在SDA总线脉冲的变化过程中时钟脉冲为持续的高电平。The preset condition includes: the detected SDA bus pulse is a continuous low level and jumps to a high level at the end of the low level duration, and the clock pulse is continuous during the change of the SDA bus pulse. High level.
通过实时检测时钟脉冲与SDA总线脉冲的变化，确定检测到的时钟脉冲与SDA总线脉冲的变化是否满足预设条件，然后在时钟脉冲与SDA总线脉冲的变化满足预设条件时，调整时钟脉冲的电压，具体的，在时钟脉冲的电压大于第二预设电压时，降低时钟脉冲的电压，在时钟脉冲的电压小于或等于第二预设电压时，增大时钟脉冲的电压，其中第二预设电压根据当前IIC总线的具体情况设定。当然，在当前IIC总线是否存在干扰脉冲的步骤是通过中间数值确定时，也可以根据该中间数值调整时钟脉冲的电压，例如，在ADC_Bit(x1)=256(8bit)，若计算得到的中间数值小于或等于1，则增大时钟脉冲的电压，若计算得到的中间数值大于1，则降低时钟脉冲的电压，优选地，本实施例中，时钟脉冲的电压的调整为对半或倍数调整，即在降低时钟脉冲的电压时将时钟脉冲的电压降低为实际电压值的一半，在增大时钟脉冲的电压时将时钟脉冲的电压增大为实际电压值的二倍。By detecting the change of the clock pulse and the SDA bus pulse in real time, it is determined whether the detected clock pulse and the change of the SDA bus pulse satisfy the preset condition, and then the clock pulse is adjusted when the change of the clock pulse and the SDA bus pulse satisfies the preset condition. The voltage, specifically, when the voltage of the clock pulse is greater than the second preset voltage, lowering the voltage of the clock pulse, and increasing the voltage of the clock pulse when the voltage of the clock pulse is less than or equal to the second predetermined voltage, wherein the second pre- Set the voltage according to the specific conditions of the current IIC bus. Of course, in the current IIC bus whether there is interference pulse is determined by the intermediate value, the voltage of the clock pulse can also be adjusted according to the intermediate value, for example, in ADC_Bit(x1)=256 (8bit), if the calculated intermediate value If the value is less than or equal to 1, the voltage of the clock pulse is increased. If the calculated intermediate value is greater than 1, the voltage of the clock pulse is decreased. Preferably, in this embodiment, the voltage of the clock pulse is adjusted to be half or multiple adjustment. That is, when the voltage of the clock pulse is lowered, the voltage of the clock pulse is reduced to half of the actual voltage value, and when the voltage of the clock pulse is increased, the voltage of the clock pulse is increased to twice the actual voltage value.
本实施例通过在侦测到读/写数据指令时，确定当前内部集成电路IIC总线是否存在干扰脉冲，接着在当前IIC总线存在干扰脉冲时，实时监测IIC总线的串行数据SDA总线脉冲及时钟脉冲，然后在SDA总线脉冲及时钟脉冲满足预设条件时，调整时钟脉冲的电压，实现了在IIC总线存在干扰脉冲时调整时钟脉冲的电压，避免了由于干扰脉冲造成SDA总线脉冲及时钟脉冲产生变化引起的IIC总线协议的开始条件或停止条件变化而导致外部设备与智能电视的主芯片之间数据传输错误的问题，通过修正时钟脉冲的高低电平保证了IIC总线的数据传输，提高了用户体验。In this embodiment, when the read/write data command is detected, it is determined whether the current internal integrated circuit IIC bus has an interference pulse, and then the serial data SDA bus pulse and the clock of the IIC bus are monitored in real time when there is an interference pulse on the current IIC bus. Pulse, then adjust the voltage of the clock pulse when the SDA bus pulse and the clock pulse meet the preset conditions, realize the voltage of the clock pulse when the interference pulse exists on the IIC bus, and avoid the SDA bus pulse and the clock pulse generated due to the interference pulse. The change of the start condition or the stop condition of the IIC bus protocol caused by the change causes the data transmission error between the external device and the main chip of the smart TV, and the data transmission of the IIC bus is ensured by correcting the high and low levels of the clock pulse, thereby improving the user. Experience.
基于第一实施例提出本发明去除干扰的方法的第二实施例，参照图2，在本实施例中，步骤S10包括：A second embodiment of the method for removing interference according to the present invention is proposed based on the first embodiment. Referring to FIG. 2, in the embodiment, step S10 includes:
步骤S11，在侦测到读/写数据指令时，获取当前时钟脉冲的电压；Step S11, acquiring a voltage of a current clock pulse when detecting a read/write data command;
其中，读/写数据指令是指智能电视的主芯片发送至某一外部设备请求读/写该设备存储的数据的数据指令，通过在侦测到读/写数据指令时，获取当前时钟脉冲的电压，进而通过时钟脉冲的电压确定当前IIC总线是否存在脉冲干扰。The read/write data command refers to a data command sent by the main chip of the smart TV to an external device requesting to read/write data stored by the device, and acquiring the current clock pulse when detecting the read/write data command. The voltage, and thus the voltage of the clock pulse, determines if there is any pulse interference on the current IIC bus.
步骤S12，确定获取到的时钟脉冲的电压是否大于第一预设电压，其中，在获取到的时钟脉冲的电压大于第一预设电压时，确定当前IIC总线存在干扰脉冲。Step S12: determining whether the voltage of the acquired clock pulse is greater than the first preset voltage, wherein when the voltage of the acquired clock pulse is greater than the first preset voltage, determining that the current IIC bus has an interference pulse.
其中，第一预设电压为IIC总线存在干扰脉冲时的最小电压，其具体数值可以根据当前IIC总线以及智能电视系统进行设定，进一步地，为便于实现，可以用IIC总线时钟脉冲的电压除以模拟转数字的位数得到一个中间数值，然后将该中间数值与预设数值进行比较判断当前IIC总线是否存在干扰脉冲，譬如，在模拟转数字的位数为256时，即ADC_Bit(x1)=256(8bit)，此时预设数值为2，若计算得到的中间数值大于2，当前IIC总线存在干扰脉冲，否则当前IIC总线不存在干扰脉冲，例如，在时钟脉冲的电压：Dig_Vot(x1)=5V时，经过计算得到中间数值IIC_Digital_Detet（x1）=(Dig_Vot/ADC_Bit)*100=1.95，此时当前IIC总线不存在干扰脉冲，在时钟脉冲的电压：Dig_Vot(x2)=10V时，经过计算得到中间数值IIC_Digital_Detet（x2）=(Dig_Vot/ADC_Bit)*100=3.90，此时当前IIC总线存在干扰脉冲。The first preset voltage is the minimum voltage when the IIC bus has an interference pulse, and the specific value can be set according to the current IIC bus and the smart television system. Further, for the convenience, the voltage of the IIC bus clock pulse can be divided. Obtain an intermediate value by the number of digits of the analog to digital number, and then compare the intermediate value with the preset value to determine whether there is an interference pulse on the current IIC bus. For example, when the number of bits of the analog to digital is 256, that is, ADC_Bit(x1) =256 (8bit), the preset value is 2, if the calculated intermediate value is greater than 2, there is interference pulse on the current IIC bus, otherwise there is no interference pulse on the current IIC bus, for example, the voltage of the clock pulse: Dig_Vot (x1 When =5V, the intermediate value IIC_Digital_Detet(x1)=(Dig_Vot/ADC_Bit)*100=1.95 is calculated. At this time, there is no interference pulse on the current IIC bus. When the voltage of the clock pulse: Dig_Vot(x2)=10V, The intermediate value IIC_Digital_Detet(x2)=(Dig_Vot/ADC_Bit)*100=3.90 is calculated, and the current IIC bus has an interference pulse.
本实施例中，通过在侦测到读/写数据指令时，获取当前时钟脉冲的电压，接着确定获取到的时钟脉冲的电压是否大于第一预设电压，根据判断结果确定当前IIC总线是否存在脉冲干扰，使得能够根据时钟脉冲的电压准确的确定当前IIC总线是否存在脉冲干扰，提高了确定脉冲干扰的准确性，进一步提高了用户体验。In this embodiment, when detecting the read/write data command, acquiring the voltage of the current clock pulse, and then determining whether the voltage of the acquired clock pulse is greater than the first preset voltage, determining whether the current IIC bus exists according to the determination result. The pulse interference makes it possible to accurately determine whether the current IIC bus has pulse interference according to the voltage of the clock pulse, thereby improving the accuracy of determining the pulse interference and further improving the user experience.
基于第一实施例提出本发明去除干扰的方法的第三实施例，参照图3，在本实施例中，步骤S30包括：A third embodiment of the method for removing interference according to the present invention is proposed based on the first embodiment. Referring to FIG. 3, in the embodiment, step S30 includes:
步骤S31，确定所述时钟脉冲的电压是否大于第二预设电压；Step S31, determining whether the voltage of the clock pulse is greater than a second preset voltage;
步骤S32，在所述时钟脉冲的电压大于第二预设电压时，降低所述时钟脉冲的电压；Step S32, when the voltage of the clock pulse is greater than the second preset voltage, reducing the voltage of the clock pulse;
步骤S33，在所述时钟脉冲的电压小于或等于第二预设电压时，增大所述时钟脉冲的电压Step S33, increasing the voltage of the clock pulse when the voltage of the clock pulse is less than or equal to the second preset voltage
本实施例中，在时钟脉冲的电压大于第二预设电压时，降低时钟脉冲的电压，在时钟脉冲的电压小于或等于第二预设电压时，增大时钟脉冲的电压，其中第二预设电压根据当前IIC总线的具体情况设定。当然，在当前IIC总线是否存在干扰脉冲的步骤是通过中间数值确定时，也可以根据该中间数值调整时钟脉冲的电压，例如，在ADC_Bit(x1)=256(8bit)，若计算得到的中间数值小于或等于1，则增大时钟脉冲的电压，若计算得到的中间数值大于1，则降低时钟脉冲的电压，优选地，本实施例中，时钟脉冲的电压的调整为对半或倍数调整，即在降低时钟脉冲的电压时将时钟脉冲的电压降低为实际电压值的一半，在增大时钟脉冲的电压时将时钟脉冲的电压增大为实际电压值的二倍。In this embodiment, when the voltage of the clock pulse is greater than the second preset voltage, the voltage of the clock pulse is decreased, and when the voltage of the clock pulse is less than or equal to the second preset voltage, the voltage of the clock pulse is increased, wherein the second pre- Set the voltage according to the specific conditions of the current IIC bus. Of course, in the current IIC bus whether there is interference pulse is determined by the intermediate value, the voltage of the clock pulse can also be adjusted according to the intermediate value, for example, in ADC_Bit(x1)=256 (8bit), if the calculated intermediate value If the value is less than or equal to 1, the voltage of the clock pulse is increased. If the calculated intermediate value is greater than 1, the voltage of the clock pulse is decreased. Preferably, in this embodiment, the voltage of the clock pulse is adjusted to be half or multiple adjustment. That is, when the voltage of the clock pulse is lowered, the voltage of the clock pulse is reduced to half of the actual voltage value, and when the voltage of the clock pulse is increased, the voltage of the clock pulse is increased to twice the actual voltage value.
本实施例通过确定所述时钟脉冲的电压是否大于第二预设电压，接着在时钟脉冲的电压大于第二预设电压时，降低所述时钟脉冲的电压，或者在所述时钟脉冲的电压小于或等于第二预设电压时，增大所述时钟脉冲的电压，实现了根据当前时钟脉冲的电压的大小调整时钟脉冲的电压，进而能够准确的调整当前时钟脉冲的电压，避免了由于干扰脉冲造成SDA总线脉冲及时钟脉冲产生变化引起的IIC总线协议的开始条件或停止条件变化而导致外部设备与智能电视的主芯片之间数据传输错误的问题，进一步提高了用户体验。In this embodiment, by determining whether the voltage of the clock pulse is greater than a second preset voltage, and then when the voltage of the clock pulse is greater than the second preset voltage, reducing the voltage of the clock pulse, or the voltage of the clock pulse is less than Or equal to the second preset voltage, increasing the voltage of the clock pulse, realizing that the voltage of the clock pulse is adjusted according to the voltage of the current clock pulse, thereby accurately adjusting the voltage of the current clock pulse, and avoiding the interference pulse The problem of the data transmission error between the external device and the main chip of the smart TV caused by the change of the start condition or the stop condition of the IIC bus protocol caused by the change of the SDA bus pulse and the clock pulse further improves the user experience.
本发明进一步提供一种去除干扰的装置。参照图4，图4为本发明去除干扰的装置第一实施例的功能模块示意图。The invention further provides an apparatus for removing interference. Referring to FIG. 4, FIG. 4 is a schematic diagram of functional modules of a first embodiment of an apparatus for removing interference according to the present invention.
在本实施例中，该去除干扰的装置包括：In this embodiment, the apparatus for removing interference includes:
确定模块10，用于在侦测到读/写数据指令时，确定当前内部集成电路IIC总线是否存在干扰脉冲；The determining module 10 is configured to determine whether an interference pulse exists in the current internal integrated circuit IIC bus when detecting the read/write data command;
其中，读/写数据指令是指智能电视的主芯片发送至某一外部设备请求读/写该设备存储的数据的数据指令。本实施例中，确定模块10可以通过在侦测到读/写数据指令时，获取当前时钟脉冲的电压，然后确定获取到的时钟脉冲的电压是否大于第一预设电压，在获取到的时钟脉冲的电压大于第一预设电压时，确定模块10确定当前IIC总线存在干扰脉冲，其中，第一预设电压为IIC总线存在干扰脉冲时的最小电压，其具体数值可以根据当前IIC总线以及智能电视系统进行设定，进一步地，为便于实现，可以用IIC总线时钟脉冲的电压除以模拟转数字的位数得到一个中间数值，然后将该中间数值与预设数值进行比较判断当前IIC总线是否存在干扰脉冲，譬如，在模拟转数字的位数为256时，即ADC_Bit(x1)=256(8bit)，此时预设数值为2，若计算得到的中间数值大于2，确定模块10确定当前IIC总线存在干扰脉冲，否则当前IIC总线不存在干扰脉冲，例如，在时钟脉冲的电压：Dig_Vot(x1)=5V时，经过计算得到中间数值IIC_Digital_Detet（x1）=(Dig_Vot/ADC_Bit)*100=1.95，此时当前IIC总线不存在干扰脉冲，在时钟脉冲的电压：Dig_Vot(x2)=10V时，经过计算得到中间数值IIC_Digital_Detet（x2）=(Dig_Vot/ADC_Bit)*100=3.90，此时当前IIC总线存在干扰脉冲。The read/write data command refers to a data command sent by the main chip of the smart TV to an external device requesting to read/write data stored by the device. In this embodiment, the determining module 10 can obtain the voltage of the current clock pulse when detecting the read/write data command, and then determine whether the voltage of the acquired clock pulse is greater than the first preset voltage, and obtain the clock. When the voltage of the pulse is greater than the first preset voltage, the determining module 10 determines that there is an interference pulse in the current IIC bus, wherein the first preset voltage is a minimum voltage when the interference pulse exists on the IIC bus, and the specific value may be based on the current IIC bus and the smart The television system performs setting. Further, for the convenience of implementation, the intermediate voltage value can be obtained by dividing the voltage of the IIC bus clock pulse by the number of analog digits, and then comparing the intermediate value with the preset value to determine whether the current IIC bus is There is an interference pulse. For example, when the number of bits of the analog to digital is 256, that is, ADC_Bit(x1)=256 (8bit), the preset value is 2, and if the calculated intermediate value is greater than 2, the determination module 10 determines the current There is interference pulse on the IIC bus, otherwise there is no interference pulse on the current IIC bus, for example, when the voltage of the clock pulse: Dig_Vot(x1)=5V After calculation, the intermediate value IIC_Digital_Detet(x1)=(Dig_Vot/ADC_Bit)*100=1.95 is obtained. At this time, there is no interference pulse on the current IIC bus. When the voltage of the clock pulse: Dig_Vot(x2)=10V, the intermediate value IIC_Digital_Detet is calculated. (x2)=(Dig_Vot/ADC_Bit)*100=3.90, at this time, there is an interference pulse on the current IIC bus.
监测模块20，用于在当前IIC总线存在干扰脉冲时，实时监测IIC总线的串行数据SDA总线脉冲及时钟脉冲；The monitoring module 20 is configured to monitor the serial data SDA bus pulse and the clock pulse of the IIC bus in real time when the current IIC bus has an interference pulse;
根据时钟脉冲的电压确定当前IIC总线存在干扰脉冲时，监测模块20实时检测IIC总线的SDA总线脉冲及时钟脉冲的电平，当然也可以实时检测SDA总线脉冲及时钟脉冲的电压，然后将检测到的电压转化为电平，一般情况下，电压范围在0V~0.25V时为低电平，电压范围在3.5V~5V时为高电平，本实施例中高低电平的具体范围根基当前电路的实际情况确定。When the current IIC bus has an interference pulse according to the voltage of the clock pulse, the monitoring module 20 detects the SDA bus pulse and the clock pulse level of the IIC bus in real time, and can also detect the voltage of the SDA bus pulse and the clock pulse in real time, and then detects the voltage. The voltage is converted to a level. Under normal circumstances, the voltage range is 0V~0.25V, and the voltage range is 3.5V~5V. In this embodiment, the specific range of the high and low levels is based on the current circuit. The actual situation is determined.
调整模块30，用于在所述SDA总线脉冲及时钟脉冲满足预设条件时，调整所述时钟脉冲的电压。The adjusting module 30 is configured to adjust a voltage of the clock pulse when the SDA bus pulse and the clock pulse satisfy a preset condition.
其中，上述预设条件包括：检测到的SDA总线脉冲为持续的低电平并在低电平的持续时间结束时跳转为高电平，在SDA总线脉冲的变化过程中时钟脉冲为持续的高电平。The preset condition includes: the detected SDA bus pulse is a continuous low level and jumps to a high level at the end of the low level duration, and the clock pulse is continuous during the change of the SDA bus pulse. High level.
通过实时检测时钟脉冲与SDA总线脉冲的变化，调整模块30确定检测到的时钟脉冲与SDA总线脉冲的变化是否满足预设条件，然后在时钟脉冲与SDA总线脉冲的变化满足预设条件时，调整时钟脉冲的电压，具体的，在时钟脉冲的电压大于第二预设电压时，降低时钟脉冲的电压，在时钟脉冲的电压小于或等于第二预设电压时，增大时钟脉冲的电压，其中第二预设电压根据当前IIC总线的具体情况设定。当然，在当前IIC总线是否存在干扰脉冲的步骤是通过中间数值确定时，也可以根据该中间数值调整时钟脉冲的电压，例如，在ADC_Bit(x1)=256(8bit)，若计算得到的中间数值小于或等于1，则增大时钟脉冲的电压，若计算得到的中间数值大于1，则降低时钟脉冲的电压，优选地，本实施例中，时钟脉冲的电压的调整为对半或倍数调整，即在降低时钟脉冲的电压时将时钟脉冲的电压降低为实际电压值的一半，在增大时钟脉冲的电压时将时钟脉冲的电压增大为实际电压值的二倍。By detecting the change of the clock pulse and the SDA bus pulse in real time, the adjustment module 30 determines whether the detected clock pulse and the change of the SDA bus pulse satisfy the preset condition, and then adjusts when the change of the clock pulse and the SDA bus pulse satisfies the preset condition. The voltage of the clock pulse, specifically, when the voltage of the clock pulse is greater than the second preset voltage, lowering the voltage of the clock pulse, and increasing the voltage of the clock pulse when the voltage of the clock pulse is less than or equal to the second predetermined voltage, wherein The second preset voltage is set according to the specific conditions of the current IIC bus. Of course, in the current IIC bus whether there is interference pulse is determined by the intermediate value, the voltage of the clock pulse can also be adjusted according to the intermediate value, for example, in ADC_Bit(x1)=256 (8bit), if the calculated intermediate value If the value is less than or equal to 1, the voltage of the clock pulse is increased. If the calculated intermediate value is greater than 1, the voltage of the clock pulse is decreased. Preferably, in this embodiment, the voltage of the clock pulse is adjusted to be half or multiple adjustment. That is, when the voltage of the clock pulse is lowered, the voltage of the clock pulse is reduced to half of the actual voltage value, and when the voltage of the clock pulse is increased, the voltage of the clock pulse is increased to twice the actual voltage value.
本实施例通过在侦测到读/写数据指令时，确定模块10确定当前内部集成电路IIC总线是否存在干扰脉冲，接着在当前IIC总线存在干扰脉冲时，检测模块20实时监测IIC总线的串行数据SDA总线脉冲及时钟脉冲，然后在SDA总线脉冲及时钟脉冲满足预设条件时，调整模块30调整时钟脉冲的电压，实现了在IIC总线存在干扰脉冲时调整时钟脉冲的电压，避免了由于干扰脉冲造成SDA总线脉冲及时钟脉冲产生变化引起的IIC总线协议的开始条件或停止条件变化而导致外部设备与智能电视的主芯片之间数据传输错误的问题，通过修正时钟脉冲的高低电平保证了IIC总线的数据传输，提高了用户体验。In this embodiment, when detecting the read/write data command, the determining module 10 determines whether the current internal integrated circuit IIC bus has an interference pulse, and then when the current IIC bus has an interference pulse, the detecting module 20 monitors the serial of the IIC bus in real time. Data SDA bus pulse and clock pulse, and then when the SDA bus pulse and the clock pulse satisfy the preset condition, the adjustment module 30 adjusts the voltage of the clock pulse, thereby realizing the adjustment of the voltage of the clock pulse when the interference pulse exists on the IIC bus, thereby avoiding interference The pulse causes the change of the start condition or stop condition of the IIC bus protocol caused by the change of the SDA bus pulse and the clock pulse, which causes the data transmission error between the external device and the main chip of the smart TV, and the high and low levels of the clock pulse are corrected. The data transmission of the IIC bus improves the user experience.
基于第一实施例提出本发明去除干扰的装置的第二实施例，参照图5，在本实施例中，确定模块10包括：A second embodiment of the apparatus for removing interference according to the present invention is proposed based on the first embodiment. Referring to FIG. 5, in the embodiment, the determining module 10 includes:
获取单元11，用于在侦测到读/写数据指令时，获取当前时钟脉冲的电压；The obtaining unit 11 is configured to acquire a voltage of a current clock pulse when detecting a read/write data command;
其中，读/写数据指令是指智能电视的主芯片发送至某一外部设备请求读/写该设备存储的数据的数据指令，通过在侦测到读/写数据指令时，获取单元11获取当前时钟脉冲的电压，进而通过时钟脉冲的电压确定当前IIC总线是否存在脉冲干扰。The read/write data command refers to a data command sent by the main chip of the smart TV to an external device to request reading/writing data stored by the device. When the read/write data command is detected, the obtaining unit 11 obtains the current The voltage of the clock pulse, and thus the voltage of the clock pulse, determines whether there is pulse interference on the current IIC bus.
第一确定单元12，用于确定获取到的时钟脉冲的电压是否大于第一预设电压，其中，在获取到的时钟脉冲的电压大于第一预设电压时，确定当前IIC总线存在干扰脉冲The first determining unit 12 is configured to determine whether the voltage of the acquired clock pulse is greater than the first preset voltage, wherein when the voltage of the acquired clock pulse is greater than the first preset voltage, determining that the current IIC bus has an interference pulse
其中，第一预设电压为IIC总线存在干扰脉冲时的最小电压，其具体数值可以根据当前IIC总线以及智能电视系统进行设定，进一步地，为便于实现，可以用IIC总线时钟脉冲的电压除以模拟转数字的位数得到一个中间数值，然后将该中间数值与预设数值进行比较判断当前IIC总线是否存在干扰脉冲，譬如，在模拟转数字的位数为256时，即ADC_Bit(x1)=256(8bit)，此时预设数值为2，若计算得到的中间数值大于2，当前IIC总线存在干扰脉冲，否则当前IIC总线不存在干扰脉冲，例如，在时钟脉冲的电压：Dig_Vot(x1)=5V时，经过计算得到中间数值IIC_Digital_Detet（x1）=(Dig_Vot/ADC_Bit)*100=1.95，此时当前IIC总线不存在干扰脉冲，在时钟脉冲的电压：Dig_Vot(x2)=10V时，经过计算得到中间数值IIC_Digital_Detet（x2）=(Dig_Vot/ADC_Bit)*100=3.90，此时当前IIC总线存在干扰脉冲。The first preset voltage is the minimum voltage when the IIC bus has an interference pulse, and the specific value can be set according to the current IIC bus and the smart television system. Further, for the convenience, the voltage of the IIC bus clock pulse can be divided. Obtain an intermediate value by the number of digits of the analog to digital number, and then compare the intermediate value with the preset value to determine whether there is an interference pulse on the current IIC bus. For example, when the number of bits of the analog to digital is 256, that is, ADC_Bit(x1) =256 (8bit), the preset value is 2, if the calculated intermediate value is greater than 2, there is interference pulse on the current IIC bus, otherwise there is no interference pulse on the current IIC bus, for example, the voltage of the clock pulse: Dig_Vot (x1 When =5V, the intermediate value IIC_Digital_Detet(x1)=(Dig_Vot/ADC_Bit)*100=1.95 is calculated. At this time, there is no interference pulse on the current IIC bus. When the voltage of the clock pulse: Dig_Vot(x2)=10V, The intermediate value IIC_Digital_Detet(x2)=(Dig_Vot/ADC_Bit)*100=3.90 is calculated, and the current IIC bus has an interference pulse.
本实施例中，通过在侦测到读/写数据指令时，获取单元11获取当前时钟脉冲的电压，接着第一确定单元12确定获取到的时钟脉冲的电压是否大于第一预设电压，根据判断结果确定当前IIC总线是否存在脉冲干扰，使得能够根据时钟脉冲的电压准确的确定当前IIC总线是否存在脉冲干扰，提高了确定脉冲干扰的准确性，进一步提高了用户体验。In this embodiment, when the read/write data command is detected, the obtaining unit 11 acquires the voltage of the current clock pulse, and then the first determining unit 12 determines whether the voltage of the acquired clock pulse is greater than the first preset voltage, according to The judgment result determines whether the current IIC bus has pulse interference, so that whether the current IIC bus has pulse interference is accurately determined according to the voltage of the clock pulse, the accuracy of determining the pulse interference is improved, and the user experience is further improved.
基于第一实施例提出本发明去除干扰的装置的第三实施例，参照图6，在本实施例中，调整模块30包括：A third embodiment of the apparatus for removing interference according to the present invention is provided based on the first embodiment. Referring to FIG. 6, in this embodiment, the adjustment module 30 includes:
第二确定单元31，用于确定所述时钟脉冲的电压是否大于第二预设电压；a second determining unit 31, configured to determine whether a voltage of the clock pulse is greater than a second preset voltage;
调整单元32，用于在所述时钟脉冲的电压大于第二预设电压时，降低所述时钟脉冲的电压；在所述时钟脉冲的电压小于或等于第二预设电压时，增大所述时钟脉冲的电压The adjusting unit 32 is configured to: when the voltage of the clock pulse is greater than the second preset voltage, lower the voltage of the clock pulse; when the voltage of the clock pulse is less than or equal to the second preset voltage, increase the Clock pulse voltage
本实施例中，在时钟脉冲的电压大于第二预设电压时，降低时钟脉冲的电压，在时钟脉冲的电压小于或等于第二预设电压时，增大时钟脉冲的电压，其中第二预设电压根据当前IIC总线的具体情况设定。当然，在当前IIC总线是否存在干扰脉冲的步骤是通过中间数值确定时，也可以根据该中间数值调整时钟脉冲的电压，例如，在ADC_Bit(x1)=256(8bit)，若计算得到的中间数值小于或等于1，则增大时钟脉冲的电压，若计算得到的中间数值大于1，则降低时钟脉冲的电压，优选地，本实施例中，时钟脉冲的电压的调整为对半或倍数调整，即在降低时钟脉冲的电压时将时钟脉冲的电压降低为实际电压值的一半，在增大时钟脉冲的电压时将时钟脉冲的电压增大为实际电压值的二倍。In this embodiment, when the voltage of the clock pulse is greater than the second preset voltage, the voltage of the clock pulse is decreased, and when the voltage of the clock pulse is less than or equal to the second preset voltage, the voltage of the clock pulse is increased, wherein the second pre- Set the voltage according to the specific conditions of the current IIC bus. Of course, in the current IIC bus whether there is interference pulse is determined by the intermediate value, the voltage of the clock pulse can also be adjusted according to the intermediate value, for example, in ADC_Bit(x1)=256 (8bit), if the calculated intermediate value If the value is less than or equal to 1, the voltage of the clock pulse is increased. If the calculated intermediate value is greater than 1, the voltage of the clock pulse is decreased. Preferably, in this embodiment, the voltage of the clock pulse is adjusted to be half or multiple adjustment. That is, when the voltage of the clock pulse is lowered, the voltage of the clock pulse is reduced to half of the actual voltage value, and when the voltage of the clock pulse is increased, the voltage of the clock pulse is increased to twice the actual voltage value.
本实施例通过第二确定单元31确定所述时钟脉冲的电压是否大于第二预设电压，接着在时钟脉冲的电压大于第二预设电压时，调整单元32降低所述时钟脉冲的电压，或者在所述时钟脉冲的电压小于或等于第二预设电压时，调整单元32增大所述时钟脉冲的电压，实现了根据当前时钟脉冲的电压的大小调整时钟脉冲的电压，进而能够准确的调整当前时钟脉冲的电压，避免了由于干扰脉冲造成SDA总线脉冲及时钟脉冲产生变化引起的IIC总线协议的开始条件或停止条件变化而导致外部设备与智能电视的主芯片之间数据传输错误的问题，进一步提高了用户体验。In this embodiment, the second determining unit 31 determines whether the voltage of the clock pulse is greater than a second preset voltage, and then when the voltage of the clock pulse is greater than the second preset voltage, the adjusting unit 32 decreases the voltage of the clock pulse, or When the voltage of the clock pulse is less than or equal to the second preset voltage, the adjusting unit 32 increases the voltage of the clock pulse, and realizes that the voltage of the clock pulse is adjusted according to the magnitude of the current clock pulse, thereby enabling accurate adjustment. The voltage of the current clock pulse avoids the problem of data transmission error between the external device and the main chip of the smart TV caused by the start condition or the stop condition of the IIC bus protocol caused by the change of the SDA bus pulse and the clock pulse caused by the interference pulse. Further improve the user experience.
本发明进一步提供一种智能电视，该智能电视包括上述任一实施例的去除干扰的装置。The present invention further provides a smart television comprising the apparatus for removing interference of any of the above embodiments.
以上仅为本发明的优选实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。The above are only the preferred embodiments of the present invention, and are not intended to limit the scope of the invention, and the equivalent structure or equivalent process transformations made by the description of the present invention and the drawings are directly or indirectly applied to other related technical fields. The same is included in the scope of patent protection of the present invention.

Claims (16)

  1. 一种去除干扰的方法，其特征在于，所述去除干扰的方法包括以下步骤： A method for removing interference, characterized in that the method for removing interference comprises the following steps:
    在侦测到读/写数据指令时，确定当前内部集成电路IIC总线是否存在干扰脉冲；When detecting a read/write data command, determining whether there is an interference pulse on the current internal integrated circuit IIC bus;
    在当前IIC总线存在干扰脉冲时，实时监测IIC总线的串行数据SDA总线脉冲及时钟脉冲；Real-time monitoring of the serial data SDA bus pulse and clock pulse of the IIC bus when there is an interference pulse on the current IIC bus;
    在所述SDA总线脉冲及时钟脉冲满足预设条件时，调整所述时钟脉冲的电压；其中，Adjusting a voltage of the clock pulse when the SDA bus pulse and the clock pulse satisfy a preset condition; wherein
    所述在侦测到读/写数据指令时，确定当前片间IIC总线是否存在干扰脉冲的步骤包括：The step of determining whether there is an interference pulse in the current inter-chip IIC bus when detecting the read/write data command includes:
    在侦测到读/写数据指令时，获取当前时钟脉冲的电压；Obtaining the voltage of the current clock pulse when detecting a read/write data command;
    确定获取到的时钟脉冲的电压是否大于第一预设电压，其中，在获取到的时钟脉冲的电压大于第一预设电压时，确定当前IIC总线存在干扰脉冲。Determining whether the voltage of the acquired clock pulse is greater than the first preset voltage, wherein when the voltage of the acquired clock pulse is greater than the first preset voltage, determining that the current IIC bus has an interference pulse.
  2. 如权利要求1所述的去除干扰的方法，其特征在于，所述调整所述时钟脉冲的电压的步骤包括：The method of removing interference according to claim 1, wherein said step of adjusting a voltage of said clock pulse comprises:
    确定所述时钟脉冲的电压是否大于第二预设电压；Determining whether the voltage of the clock pulse is greater than a second preset voltage;
    在所述时钟脉冲的电压大于第二预设电压时，降低所述时钟脉冲的电压；Decreasing a voltage of the clock pulse when a voltage of the clock pulse is greater than a second predetermined voltage;
    在所述时钟脉冲的电压小于或等于第二预设电压时，增大所述时钟脉冲的电压。The voltage of the clock pulse is increased when the voltage of the clock pulse is less than or equal to the second predetermined voltage.
  3. 如权利要求1所述的去除干扰的方法，其特征在于，所述预设条件包括：The method for removing interference according to claim 1, wherein the preset condition comprises:
    检测到的SDA总线脉冲为持续的低电平并在低电平的持续时间结束时跳转为高电平，在SDA总线脉冲的变化过程中时钟脉冲为持续的高电平。The detected SDA bus pulse is a sustained low level and jumps high at the end of the low level duration, and the clock pulse is continuously high during the SDA bus pulse change.
  4. 如权利要求3所述的去除干扰的方法，其特征在于，所述调整所述时钟脉冲的电压的步骤包括：The method of removing interference according to claim 3, wherein said step of adjusting a voltage of said clock pulse comprises:
    确定所述时钟脉冲的电压是否大于第二预设电压；Determining whether the voltage of the clock pulse is greater than a second preset voltage;
    在所述时钟脉冲的电压大于第二预设电压时，降低所述时钟脉冲的电压；Decreasing a voltage of the clock pulse when a voltage of the clock pulse is greater than a second predetermined voltage;
    在所述时钟脉冲的电压小于或等于第二预设电压时，增大所述时钟脉冲的电压。The voltage of the clock pulse is increased when the voltage of the clock pulse is less than or equal to the second predetermined voltage.
  5. 一种去除干扰的装置，其特征在于，所述去除干扰的装置包括：A device for removing interference, characterized in that the device for removing interference comprises:
    确定模块，用于在侦测到读/写数据指令时，确定当前内部集成电路IIC总线是否存在干扰脉冲；a determining module, configured to determine whether an interference pulse exists in a current internal integrated circuit IIC bus when detecting a read/write data command;
    监测模块，用于在当前IIC总线存在干扰脉冲时，实时监测IIC总线的串行数据SDA总线脉冲及时钟脉冲；The monitoring module is configured to monitor the serial data SDA bus pulse and the clock pulse of the IIC bus in real time when there is an interference pulse on the current IIC bus;
    调整模块，用于在所述SDA总线脉冲及时钟脉冲满足预设条件时，调整所述时钟脉冲的电压。And an adjustment module, configured to adjust a voltage of the clock pulse when the SDA bus pulse and the clock pulse satisfy a preset condition.
  6. 如权利要求5所述的去除干扰的装置，其特征在于，所述确定模块包括：The apparatus for removing interference according to claim 5, wherein the determining module comprises:
    获取单元，用于在侦测到读/写数据指令时，获取当前时钟脉冲的电压；An acquiring unit, configured to acquire a voltage of a current clock pulse when detecting a read/write data command;
    第一确定单元，用于确定获取到的时钟脉冲的电压是否大于第一预设电压，其中，在获取到的时钟脉冲的电压大于第一预设电压时，确定当前IIC总线存在干扰脉冲。The first determining unit is configured to determine whether the voltage of the acquired clock pulse is greater than the first preset voltage, wherein when the voltage of the acquired clock pulse is greater than the first preset voltage, determining that the current IIC bus has an interference pulse.
  7. 如权利要求5所述的去除干扰的装置，其特征在于，所述调整模块包括：The apparatus for removing interference according to claim 5, wherein the adjustment module comprises:
    确定单元，用于确定所述时钟脉冲的电压是否大于第二预设电压；a determining unit, configured to determine whether a voltage of the clock pulse is greater than a second preset voltage;
    第二调整单元，用于在所述时钟脉冲的电压大于第二预设电压时，降低所述时钟脉冲的电压；在所述时钟脉冲的电压小于或等于第二预设电压时，增大所述时钟脉冲的电压。a second adjusting unit, configured to reduce a voltage of the clock pulse when a voltage of the clock pulse is greater than a second preset voltage; and increase a voltage when a voltage of the clock pulse is less than or equal to a second preset voltage The voltage of the clock pulse.
  8. 如权利要求5所述的去除干扰的装置，其特征在于，所述预设条件包括：The apparatus for removing interference according to claim 5, wherein the preset condition comprises:
    检测到的SDA总线脉冲为持续的低电平并在低电平的持续时间结束时跳转为高电平，在SDA总线脉冲的变化过程中时钟脉冲为持续的高电平。The detected SDA bus pulse is a sustained low level and jumps high at the end of the low level duration, and the clock pulse is continuously high during the SDA bus pulse change.
  9. 如权利要求8所述的去除干扰的装置，其特征在于，所述确定模块包括：The apparatus for removing interference according to claim 8, wherein the determining module comprises:
    获取单元，用于在侦测到读/写数据指令时，获取当前时钟脉冲的电压；An acquiring unit, configured to acquire a voltage of a current clock pulse when detecting a read/write data command;
    第一确定单元，用于确定获取到的时钟脉冲的电压是否大于第一预设电压，其中，在获取到的时钟脉冲的电压大于第一预设电压时，确定当前IIC总线存在干扰脉冲。The first determining unit is configured to determine whether the voltage of the acquired clock pulse is greater than the first preset voltage, wherein when the voltage of the acquired clock pulse is greater than the first preset voltage, determining that the current IIC bus has an interference pulse.
  10. 如权利要求8所述的去除干扰的装置，其特征在于，所述调整模块包括：The apparatus for removing interference according to claim 8, wherein the adjustment module comprises:
    确定单元，用于确定所述时钟脉冲的电压是否大于第二预设电压；a determining unit, configured to determine whether a voltage of the clock pulse is greater than a second preset voltage;
    第二调整单元，用于在所述时钟脉冲的电压大于第二预设电压时，降低所述时钟脉冲的电压；在所述时钟脉冲的电压小于或等于第二预设电压时，增大所述时钟脉冲的电压。a second adjusting unit, configured to reduce a voltage of the clock pulse when a voltage of the clock pulse is greater than a second preset voltage; and increase a voltage when a voltage of the clock pulse is less than or equal to a second preset voltage The voltage of the clock pulse.
  11. 一种智能电视，其特征在于，所述智能电视包括权利要求5所述的去除干扰的装置。 A smart television, characterized in that the smart television comprises the interference removing device of claim 5.
  12. 如权利要求11所述的智能电视，其特征在于，所述确定模块包括：The smart television of claim 11, wherein the determining module comprises:
    获取单元，用于在侦测到读/写数据指令时，获取当前时钟脉冲的电压；An acquiring unit, configured to acquire a voltage of a current clock pulse when detecting a read/write data command;
    第一确定单元，用于确定获取到的时钟脉冲的电压是否大于第一预设电压，其中，在获取到的时钟脉冲的电压大于第一预设电压时，确定当前IIC总线存在干扰脉冲。The first determining unit is configured to determine whether the voltage of the acquired clock pulse is greater than the first preset voltage, wherein when the voltage of the acquired clock pulse is greater than the first preset voltage, determining that the current IIC bus has an interference pulse.
  13. 如权利要求11所述的智能电视，其特征在于，所述调整模块包括：The smart television of claim 11, wherein the adjustment module comprises:
    确定单元，用于确定所述时钟脉冲的电压是否大于第二预设电压；a determining unit, configured to determine whether a voltage of the clock pulse is greater than a second preset voltage;
    第二调整单元，用于在所述时钟脉冲的电压大于第二预设电压时，降低所述时钟脉冲的电压；在所述时钟脉冲的电压小于或等于第二预设电压时，增大所述时钟脉冲的电压。a second adjusting unit, configured to reduce a voltage of the clock pulse when a voltage of the clock pulse is greater than a second preset voltage; and increase a voltage when a voltage of the clock pulse is less than or equal to a second preset voltage The voltage of the clock pulse.
  14. 如权利要求11所述的智能电视，其特征在于，所述预设条件包括：The smart television of claim 11, wherein the preset condition comprises:
    检测到的SDA总线脉冲为持续的低电平并在低电平的持续时间结束时跳转为高电平，在SDA总线脉冲的变化过程中时钟脉冲为持续的高电平。The detected SDA bus pulse is a sustained low level and jumps high at the end of the low level duration, and the clock pulse is continuously high during the SDA bus pulse change.
  15. 如权利要求14所述的智能电视，其特征在于，所述确定模块包括：The smart television of claim 14, wherein the determining module comprises:
    获取单元，用于在侦测到读/写数据指令时，获取当前时钟脉冲的电压；An acquiring unit, configured to acquire a voltage of a current clock pulse when detecting a read/write data command;
    第一确定单元，用于确定获取到的时钟脉冲的电压是否大于第一预设电压，其中，在获取到的时钟脉冲的电压大于第一预设电压时，确定当前IIC总线存在干扰脉冲。The first determining unit is configured to determine whether the voltage of the acquired clock pulse is greater than the first preset voltage, wherein when the voltage of the acquired clock pulse is greater than the first preset voltage, determining that the current IIC bus has an interference pulse.
  16. 如权利要求14所述的智能电视，其特征在于，所述调整模块包括：The smart television of claim 14, wherein the adjustment module comprises:
    确定单元，用于确定所述时钟脉冲的电压是否大于第二预设电压；a determining unit, configured to determine whether a voltage of the clock pulse is greater than a second preset voltage;
    第二调整单元，用于在所述时钟脉冲的电压大于第二预设电压时，降低所述时钟脉冲的电压；在所述时钟脉冲的电压小于或等于第二预设电压时，增大所述时钟脉冲的电压。a second adjusting unit, configured to reduce a voltage of the clock pulse when a voltage of the clock pulse is greater than a second preset voltage; and increase a voltage when a voltage of the clock pulse is less than or equal to a second preset voltage The voltage of the clock pulse.
PCT/CN2016/084270 2015-12-09 2016-06-01 Method and device for eliminating interference and smart television set WO2017096766A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201510907256.5 2015-12-09
CN201510907256.5A CN105356865B (en) 2015-12-09 2015-12-09 Remove the method, apparatus and smart television of interference

Publications (1)

Publication Number Publication Date
WO2017096766A1 true WO2017096766A1 (en) 2017-06-15

Family

ID=55332765

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/084270 WO2017096766A1 (en) 2015-12-09 2016-06-01 Method and device for eliminating interference and smart television set

Country Status (2)

Country Link
CN (1) CN105356865B (en)
WO (1) WO2017096766A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105356865B (en) * 2015-12-09 2018-09-21 深圳Tcl数字技术有限公司 Remove the method, apparatus and smart television of interference

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1591366A (en) * 2003-09-04 2005-03-09 纬创资通股份有限公司 Noise resisting clock signal circuit
US20120176550A1 (en) * 2011-01-06 2012-07-12 Hendrickson Alan F Receiver and Method of Receiving Analog and Digital Television Signals
CN103401743A (en) * 2013-07-02 2013-11-20 深圳市九洲电器有限公司 Method and device for eliminating interference signals for I2C (Inter-IC BUS)
CN104320109A (en) * 2014-09-28 2015-01-28 迈普通信技术股份有限公司 Pulse anti-interference method and device
CN105356865A (en) * 2015-12-09 2016-02-24 深圳Tcl数字技术有限公司 Method and device for removing interference and smart television

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19960785A1 (en) * 1999-12-16 2001-06-21 Thomson Brandt Gmbh Input filter stage for a data stream and method for filtering a data stream
CN1187915C (en) * 2003-01-24 2005-02-02 杭州国芯科技有限公司 Method for detecting impulse interference in digital signal transmission
CN103731329A (en) * 2012-10-12 2014-04-16 苏州工业园区新宏博通讯科技有限公司 Anti-interference method of I2C bus communication system
CN104834624B (en) * 2015-05-26 2018-08-24 广东正力通用电气有限公司 A kind of anti-interference method of iic bus interface

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1591366A (en) * 2003-09-04 2005-03-09 纬创资通股份有限公司 Noise resisting clock signal circuit
US20120176550A1 (en) * 2011-01-06 2012-07-12 Hendrickson Alan F Receiver and Method of Receiving Analog and Digital Television Signals
CN103401743A (en) * 2013-07-02 2013-11-20 深圳市九洲电器有限公司 Method and device for eliminating interference signals for I2C (Inter-IC BUS)
CN104320109A (en) * 2014-09-28 2015-01-28 迈普通信技术股份有限公司 Pulse anti-interference method and device
CN105356865A (en) * 2015-12-09 2016-02-24 深圳Tcl数字技术有限公司 Method and device for removing interference and smart television

Also Published As

Publication number Publication date
CN105356865B (en) 2018-09-21
CN105356865A (en) 2016-02-24

Similar Documents

Publication Publication Date Title
WO2018032681A1 (en) Bluetooth pairing method and bluetooth device
WO2017008521A1 (en) Mobile terminal-based smart home appliance control method and mobile terminal, and accessory
WO2017202109A1 (en) System for detecting and displaying performance parameters of set top box and method therefor
WO2015135443A1 (en) Method and apparatus for simulating sound in virtual scenario, and terminal
WO2017092267A1 (en) Channel processing method and device
WO2017201897A1 (en) Method and device for collecting fault information of smart television
WO2018161571A1 (en) Method, device, medium, and electronic apparatus for dynamically adjusting power saving level of terminal
WO2020062616A1 (en) Method and apparatus for regulating gamma value of display panel, and display device
WO2017181503A1 (en) Display terminal backlight brightness adjustment method, device and television set
WO2013037257A1 (en) Method and mobile terminal for preventing mobile terminal memory card from being frequently hot-plugged
WO2018028121A1 (en) Method and device for managing storage space of data partition
WO2013004030A1 (en) Liquid crystal display, and driving method and device thereof
WO2016123773A1 (en) Communication device
WO2017045418A1 (en) Memory remaining capacity-based method and system for adjusting camera frame rate
WO2017036209A1 (en) Audio data play method based on smart television, and smart television and system
WO2019075909A1 (en) Air conditioner, control method and device therefor, and computer readable storage medium
WO2016061812A1 (en) Image data processing method and apparatus
WO2018053963A1 (en) Method and apparatus for upgrading system of smart television
WO2015058508A1 (en) Control method based on bluetooth communication technology, controlled device and controlling device
WO2018161588A1 (en) Broadcast receiver queue adjustment method, apparatus, storage medium, and electronic device
WO2017096766A1 (en) Method and device for eliminating interference and smart television set
WO2016101252A1 (en) Channel information display method and apparatus for intelligent television
WO2016095270A1 (en) Safety monitoring system and monitoring method therefor
WO2014086057A1 (en) Broken line repair method, broken line repair device, and broken line repair structure
WO2016095253A1 (en) Method and apparatus for controlling radio frequency power

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16871971

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 15.10.2018)

122 Ep: pct application non-entry in european phase

Ref document number: 16871971

Country of ref document: EP

Kind code of ref document: A1