WO2017095397A1 - Structures with fillable low-k materials based on cyclic carbosilane precursors - Google Patents

Abstract

Described herein are carbosilane-based devices that include a structure comprising a plurality of openings, and a dielectric material disposed within the openings. In some embodiments, the dielectric material comprises cross-linked cyclic carbosilane units having a ring structure including C and Si, where at least a first cyclic carbosilane unit is linked to at least two adjacent cyclic carbosilane units. In other embodiments, the dielectric material comprises cross-linked cyclic carbosilane units having a ring structure including C and Si, wherein the cross-linked carbosilane units are capped with Si-H groups or Si-H2 groups. Methods of fabricating such devices are disclosed as well.

Description

STRUCTURES WITH FILLABLE LOW-K MATERIALS

BASED ON CYCLIC CARBOSILANE PRECURSORS

Technical Field

[0001] This disclosure relates generally to the field of integrated circuits and semiconductor manufacturing, and more specifically, to structures with fi liable low k materials and methods for manufacturing such structures.

Background

[0002] For the past several decades, the scaling of features in integrated circuits (ICs) has been a driving force behind an ever-growing semiconductor industry. Sca ling to smaller and smaller features enables increased densities of functional units on the limited real estate of semiconductor IC chips. For example, shrinking transistor size allows for the incorporation of an increased number of memory or logic devices on a chip, lending to the fabrication of products with increased capacity.

[0003] IC chips are used in a variety of devices including automobiles, computers, appliances, mobile phones and consumer electronics. A plura lity of IC chips can typically be formed on a single silicon wafer, i.e. a silicon disk having a diameter of, for example, 300 millimeters (mm), which is then diced apart to create individual chips. IC chips can include features sizes on the nanometer scale and can comprise hundreds of millions of

components. Improved materials and manufacturing techniques have reduced features sizes to, for example, less than 45 nanometers (nm).

[0004] The drive for the ever-increasing capacity, however, is not without issue. The desire to make smaller IC chips continuously places demands on the methods and materials used to manufacture these devices. For example, integration of advanced backend interconnects of IC chips requires materials with unique compositions that can be deposited completely into gaps or openings without forming voids. In particular, there is a need for fabricating structures that include gaps or openings filled with dielectric materials exhibiting favorable properties an interlayer dielectric material, such as e.g. relatively low, e.g. less than 2.2, dielectric values, low electrical leakage, and thermal stability. Brief Description of the Drawings

[0005] FIG. 1 provides a schematic flow chart illustrating one pathway for providing a carbosilane-based dielectric material within openings of a structure, according to some embodiments of the present disclosure.

[0006] FIG. 2 illustrates a cyclic carbosilane monomer that can be used to make precursor oligomers, according to some embodiments of the present disclosure.

[0007] FIG. 3 provides chemical structures illustrating a cross-linked material, an oligomer from which the cross-linked material can be made and the monomer of FIG. 2, according to some embodiments of the present disclosure.

[0008] FIG. 4 provides chemical structures of four different TSCH derivatives each of which can serve as a monomer to make oligomer and dielectric material, according to some embodiments of the present disclosure.

[0009] FIG. 5 illustrates equations for synthesizing various carbosilane precursors, according to some embodiments of the present disclosure.

[0010] FIGs. 6a through 6e provide chemical structures of different species that are representative of a cyclic carbosilane oligomer identified as "13a" that can be used in accordance with various embodiments of the present disclosure.

[0011] FIG. 7 illustrates equations for synthesizing higher molecular weight precursors, according to some embodiments of the present disclosure.

[0012] FIG. 8 illustrates synthesis of smaller oligomeric precursors, according to some embodiments of the present disclosure.

[0013] FIG. 9 illustrates an exemplary structure comprising openings filled with a carbosilane-based dielectric material, according to some embodiments of the present disclosure.

[0014] FIG. 10 provides a schematic illustration of an interposer, according to some embodiments of the present disclosure. [0015] FIG. 11 provides a schematic illustration of a computing device built in accordance with some embodiments of the present disclosure.

Detailed Description

[0016] Described herein are carbosilane-based devices that include a structure comprising a plurality of openings, and a dielectric material disposed within the openings. In some embodiments, the dielectric material comprises cross-linked cyclic carbosilane units having a ring structure including C and Si, where at least a first cyclic carbosilane unit is linked to at least two adjacent cyclic carbosilane units. In some further embodiments, at least a second cyclic carbosilane unit may be linked to at least four adjacent cyclic carbosilane units. Still some other cyclic carbosilane units may be linked to three adjacent carbosilane units. The difference between minimum number of adjacent linked carbosilane units may arise as a result of using different starting materials (e.g. at least two for the molecules shown in FIG. 8, and at least four for the molecules shown in FIG. 6). The difference may also arise depending on the extent to which cross-linking has taken place. Some of the cyclic units, e.g. those near the center of the precursor molecule, may be bonded to a large number of neighbors, e.g. to at least four. When cross-linking between these precursor molecules is small, the peripheral cyclic units of the molecule may be bonded to only a few other cyclic units, e.g. to only one, two or three.

[0017] In other embodiments, the dielectric material comprises cross-linked cyclic carbosilane units having a ring structure including C and Si, wherein the cross-linked carbosilane units are capped with Si— H groups or Si— H₂ groups.

[0018] Methods of fabricating such devices are disclosed as well.

[0019] In the following description, various aspects of the illustrative implementations will be described using terms commonly employed by those skilled in the art to convey the substance of their work to others skilled in the art. However, it will be apparent to those skilled in the art that the present disclosure may be practiced with only some of the described aspects. For purposes of explanation, specific numbers, materials and

configurations are set forth in order to provide a thorough understanding of the illustrative implementations. However, it will be apparent to one skilled in the art that the present disclosure may be practiced without the specific details. In other instances, well-known features are omitted or simplified in order not to obscure the illustrative implementations.

[0020] Various operations will be described as multiple discrete operations, in turn, in a manner that is most helpful in understanding the present disclosure, however, the order of description should not be construed to imply that these operations are necessarily order dependent. In particular, these operations need not be performed in the order of presentation.

[0021] The terms "over," "under," "between," and "on" as used herein refer to a relative position of one material layer or component with respect to other layers or components. For example, one layer disposed over or under another layer may be directly in contact with the other layer or may have one or more intervening layers. Moreover, one layer disposed between two layers may be directly in contact with the two layers or may have one or more intervening layers. In contrast, a first layer "on" a second layer is in direct contact with that second layer. Similarly, unless explicitly stated otherwise, one feature disposed between two features may be in direct contact with the adjacent features or may have one or more intervening layers.

[0022] Implementations of the disclosure may be formed or carried out on a substrate, such as a semiconductor substrate. In one implementation, the semiconductor substrate may be a crystalline substrate formed using a bulk silicon or a silicon-on-insulator substructure. In other implementations, the semiconductor substrate may be formed using alternate materials, which may or may not be combined with silicon, that include but are not limited to germanium, indium antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide, indium gallium arsenide, gallium antimonide, or other combinations of group lll-V or group IV materials. Although a few examples of materials from which the substrate may be formed are described here, any material that may serve as a foundation upon which a semiconductor device may be built falls within the spirit and scope of the present disclosure. [0023] In various embodiments, the interconnects as described herein may be used to connect various components associated with an integrated circuit. Components include, for example, transistors, diodes, power sources, resistors, capacitors, inductors, sensors, transceivers, receivers, antennas, etc. Components associated with an integrated circuit may include those that are mounted on an integrated circuit or those connected to an integrated circuit. The integrated circuit may be either analog or digital and may be used in a number of applications, such as microprocessors, optoelectronics, logic blocks, audio amplifiers, etc., depending on the components associated with the integrated circuit. The integrated circuit may be employed as part of a chipset for executing one or more related functions in a computer.

[0024] In the embodiments where at least some of the components associated with an integrated circuit are transistors, a plurality of transistors, such as metal-oxide- semiconductor field-effect transistors (MOSFET or simply MOS transistors), may be fabricated on the substrate. In various implementations of the disclosure, the MOS transistors may be planar transistors, nonplanar transistors, or a combination of both.

Nonplanar transistors include FinFET transistors such as double-gate transistors and tri-gate transistors, and wrap-around or all-around gate transistors such as nanoribbon and nanowire transistors. Although the implementations described herein may illustrate only planar transistors, it should be noted that the disclosure may also be carried out using nonplanar transistors.

[0025] Each MOS transistor includes a gate stack formed of at least two layers, a gate interconnect support layer and a gate electrode layer. The gate interconnect support layer may include one layer or a stack of layers. The one or more layers may include silicon oxide, silicon dioxide (Si0₂) and/or a high-k dielectric material. The high-k dielectric material may include elements such as hafnium, silicon, oxygen, titanium, tantalum, lanthanum, aluminum, zirconium, barium, strontium, yttrium, lead, scandium, niobium, and zinc.

Examples of high-k materials that may be used in the gate interconnect support layer include, but are not limited to, hafnium oxide, hafnium silicon oxide, lanthanum oxide, lanthanum aluminum oxide, zirconium oxide, zirconium silicon oxide, tantalum oxide, titanium oxide, barium strontium titanium oxide, barium titanium oxide, strontium titanium oxide, yttrium oxide, aluminum oxide, lead scandium tantalum oxide, and lead zinc niobate. In some embodiments, an annealing process may be carried out on the gate interconnect support layer to improve its quality when a high-k material is used.

[0026] The gate electrode layer is formed on the gate interconnect support layer and may consist of at least one P-type workfunction metal or N-type workfunction metal, depending on whether the transistor is to be a PMOS or an NMOS transistor. In some

implementations, the gate electrode layer may consist of a stack of two or more metal layers, where one or more metal layers are workfunction metal layers and at least one metal layer is a fill metal layer. Further metal layers may be included for other purposes, such as a barrier layer.

[0027] For a PMOS transistor, metals that may be used for the gate electrode include, but are not limited to, ruthenium, palladium, platinum, cobalt, nickel, and conductive metal oxides, e.g., ruthenium oxide. A P-type metal layer will enable the formation of a PMOS gate electrode with a workfunction that is between about 4.9 eV and about 5.2 eV. For an NMOS transistor, metals that may be used for the gate electrode include, but are not limited to, hafnium, zirconium, titanium, tantalum, aluminum, alloys of these metals, and carbides of these metals such as hafnium carbide, zirconium carbide, titanium carbide, tantalum carbide, and aluminum carbide. An N-type metal layer will enable the formation of an NMOS gate electrode with a workfunction that is between about 3.9 eV and about 4.2 eV.

[0028] In some implementations, when viewed as a cross-section of the transistor along the source-channel-drain direction, the gate electrode may consist of a "U"-shaped structure that includes a bottom portion substantially parallel to the surface of the substrate and two sidewall portions that are substantially perpendicular to the top surface of the substrate. In another implementation, at least one of the metal layers that form the gate electrode may simply be a planar layer that is substantially parallel to the top surface of the substrate and does not include sidewall portions substantially perpendicular to the top surface of the substrate. In further implementations of the disclosure, the gate electrode may consist of a combination of U-shaped structures and planar, non-U-shaped structures. For example, the gate electrode may consist of one or more U-shaped metal layers formed atop one or more planar, non-U-shaped layers.

[0029] In some implementations of the disclosure, a pair of sidewall spacers may be formed on opposing sides of the gate stack that bracket the gate stack. The sidewall spacers may be formed from a material such as silicon nitride, silicon oxide, silicon carbide, silicon nitride doped with carbon, and silicon oxynitride. Processes for forming sidewall spacers are well known in the art and generally include deposition and etching process steps. In an alternate implementation, a plurality of spacer pairs may be used, for instance, two pairs, three pairs, or four pairs of sidewall spacers may be formed on opposing sides of the gate stack.

[0030] As is well known in the art, source and drain regions are formed within the substrate adjacent to the gate stack of each MOS transistor. The source and drain regions are generally formed using either an implantation/diffusion process or an etching/deposition process. In the former process, dopants such as boron, aluminum, antimony, phosphorous, or arsenic may be ion-implanted into the substrate to form the source and drain regions. An annealing process that activates the dopants and causes them to diffuse further into the substrate typically follows the ion implantation process. In the latter process, the substrate may first be etched to form recesses at the locations of the source and drain regions. An epitaxial deposition process may then be carried out to fill the recesses with material that is used to fabricate the source and drain regions. In some implementations, the source and drain regions may be fabricated using a silicon alloy such as silicon germanium or silicon carbide. In some implementations the epitaxially deposited silicon alloy may be doped in situ with dopants such as boron, arsenic, or phosphorous. In further embodiments, the source and drain regions may be formed using one or more alternate semiconductor materials such as germanium or a group lll-V material or alloy. And in further embodiments, one or more layers of metal and/or metal alloys may be used to form the source and drain regions.

[0031] One or more interlayer dielectrics may be deposited over the MOS transistors. The ILD layers may be formed using dielectric materials known for their applicability in integrated circuit structures, such as dielectric materials. Examples of dielectric materials that may be used include, but are not limited to, silicon dioxide (Si0₂), carbon doped oxide (CDO), silicon nitride, organic polymers such as perfluorocyclobutane or

polytetrafluoroethylene, fluorosilicate glass (FSG), and organosilicates such as

silsesquioxane, siloxane, or organosilicate glass. The ILD layers may include pores or air gaps to further reduce their dielectric constant.

[0032] In general, a low-k dielectric material is a dielectric material that has a lower dielectric constant (k) than silicon dioxide (Si0₂). Silicon dioxide has a dielectric constant of 3.9. The use of dielectric materials in integrated circuit devices has enabled continued device size reduction. Although a variety of materials have lower dielectric constants than Si0₂ not all materials are suitable for integration into integrated circuits and integrated circuit manufacturing processes. Embodiments of the present disclosure describe low-k dielectric materials with k being less than 3.9. However, teachings provided herein are also applicable to dielectric materials with k higher than that of Si0₂, e.g. to carbosilane-based dielectric materials having k that is in the range of 3.9-4.1. Materials with a k-value higher than 3.9 are useful for a number of applications, specifically ones where the higher k material would also bring unusual properties such as e.g. different etch rate relative to Si0₂, allowing the material to be uniquely etched in a given etch chemistry/condition.

[0033] In general, an interlayer dielectric (ILD) or inter metal dielectric (IMD) film is the insulating material used between metal conductors and devices (such as transistors) in integrated circuit devices.

[0034] To provide context, conventionally, fabrication techniques used for integrating advanced interconnects require materials with unique compositions that can be deposited completely into gaps without forming voids. At the dimensions currently used, materials deposited conformally by atomic layer deposition (ALD), chemical vapor deposition (CVD) or with conventional plasma-enhanced chemical vapor deposition (PECVD) techniques leave seams and/or voids. Improvements with respect to this issue would be desirable.

[0035] Carbosilane materials may provide advantageous properties for interlayer dielectrics, such as low dielectric constant values, low electrical leakage, unique etch properties, mechanical integrity, and thermal stability. However, there are currently no known carbosilane materials possessing both such properties and the ability to flow into gaps or openings without or with reduced amount of defects. In addition, there are no known ways to control the cross-linking of such dielectric materials.

[0036] Some embodiments of the present disclosure are based on synthesizing non-volatile oligomers containing multiple trisilacyclohexane ring groups connected by short chemical linkers. These oligomers are spun onto a wafer and, due to their low glass transition temperature (Tg), can fill or reflow into patterned holes and gaps. After the fill is complete, the oligomers are subjected to some shock (thermal, chemical, UV, etc) that causes the oligomers to crosslink into a solid thin film that fills the vertical features of the chip. The material may be subsequently cured.

[0037] In various aspects, carbosilane-based assemblies or devices are disclosed. The assemblies include a structure comprising a plurality of openings, and a carbosilane-based dielectric material disposed within the plurality of openings. The plurality of openings may include openings, holes, or gaps (referred to herein as simply "openings") of various aspect ratios, where, as used herein, "aspect ratio" refers to a ratio between a height or a depth of an opening to a width of an opening. In various embodiments, openings described herein may have aspect ratios between 1 and 20, including all values and ranges therein, e.g.

between 1 and 15, between 5 and 10, etc. Preferably, dimensions of the openings are on the nanometer scale, e.g. with a width of an opening being about 20 nm and a depth of an opening being about 100 nm, i.e. aspect ratio of 5. Therefore, such structures with openings are sometimes described as nanostructures or nanopatterned structures.

[0038] Nanostructures described herein could be a part of a semiconductor device or an IP package, e.g. a part of an interconnect, e.g. a backend interconnect, used for providing electrical conductivity in the semiconductor device or the IC package. As used herein, the term "backend interconnect" is used to describe a region of an IC chip containing wiring between transistors and other elements, while the term "frontend interconnect" is used to describe a region of an IC chip containing the rest of the wiring. Nanostructures described herein may be used in any devices or assemblies where one electrically conductive element of the wiring needs to be separated from another electrically conductive element, which could be done both in backend and frontend interconnects. Such devices or assemblies would typically provide an electronic component, such as e.g. a transistor, a die, a sensor, a processing device, or a memory device, and an interconnect for providing electrical connectivity to the component. The interconnect includes a plurality of conductive regions, e.g. trenches and vias filled with electrically conductive materials as known in the art.

Another term commonly used in the art for a plurality of trenches and vias filled with electrically conductive materials is a "metallization stack." The plurality of openings filled with dielectric materials as described herein could be used to electrically isolate at least some of the conductive regions from one another. For example, the structure in which the openings are made could be made of a conductive material.

[0039] The dielectric material provided within the openings includes cyclic carbosilane units. The material can be, for example, a dielectric material, a spin-on dielectric material, an interlayer dielectric material and/or an etch-selective material. The material can be made from cyclic carbosilane precursors that can be applied to a nanopatterrned substrate, for example a silicon wafer, or any other structure with openings by techniques such as spin coating or other suitable deposition processes such as vapor phase deposition. In some embodiments, the resulting material can exhibit relatively low dielectric values (e.g., less than 2.2), may be hydrophobic, and can be resistant to chemical attack (such as chemicals used in typical integrated circuit fabrication processes).

[0040] In some cases, oxygen concentration may vary in the dielectric material, depending on where within the opening a particular part of the material is. For example, oxygen concentration could be lower in parts of the material that are closer to the bottom of the openings and higher towards the top of the openings. In some cases, oxygen concentration may be at or below a first value in a first portion of the dielectric material and be between the first value and a second value, the second value being greater than the first value, in a second portion of the dielectric material disposed within the plurality of openings. For example, the first value could be 10%, and the second value could be 30%. Control of the differences in oxygen concentration may be achieved by control of the bake and cure temperatures, control of the ambient environment during bakes/cures and through introduction of O-based cross-linking reactants such as water. [0041] In various embodiments, oxygen concentration throughout the dielectric material disposed within the openings may be at or below 15%, preferably at or below 20%, more preferably at or below 30%. Control of this overall oxygen concentration may be achieved by control of the bake and cure temperatures, control of the ambient environment during bakes/cures and through introduction of O-based cross-linking reactants such as water.

[0042] Similarly, porosity of the dielectric film may vary in the dielectric material, depending on where within the opening a particular part of the material is. In various cases, porosity could be lower or higher in parts of the material that are closer to the bottom of the openings than in parts closer to the top of the openings. In some cases, porosity may be at or below a first value in a first portion of the dielectric material and be between the first value and a second value, the second value being greater than the first value, in a second portion of the dielectric material disposed within the plurality of openings. For example, the first value could be 5% and the second value could be 10% or the first value 10% and the second value 15%.

[0043] In various embodiments, porosity throughout the dielectric material disposed within the openings may be between 0-60%, e.g. between 0-40%, including all values and ranges within 0-60%, depending e.g. on the desired dielectric constant. Control of the overall porosity may be achieved by treating the dielectric material after crosslinking to improve or otherwise customize the dielectric constant. For example, control may be achieved by control of bake/cure conditions and also by incorporation of specific amounts of porogen. Porosity could also be reduced in the upper region of the material by deposition of a second amount of material that could fill in the pores of the first amount of fully cured material.

[0044] Embodiments of the present disclosure describe cyclic carbosilane monomers that may be used to produce oligomers (precursors) that in turn can be disposed on a structure comprising a plurality of openings, to provide a carbosilane-based dielectric film within the openings. The oligomeric material can be polymerized into a hard, cross-linked material. A flow chart illustrating some of the steps that can be used from monomer to a carbosilane- based dielectric material provided within openings of a structure, in accordance with some embodiments, is provided in FIG. 1. [0045] As shown with box (11) in FIG. 1, first, oligomers are synthesized from raw materials based on the cyclic carbosilane monomers such as the one illustrated in FIG. 2. Formation of the oligomers from raw materials is illustrated in FIG. 3. As shown with box (12) in FIG. 1, next, low k spin coating solution is formulated. As shown with box (13) in FIG. 1, the solution is then spin-coated on a nanopatterned wafer comprising a plurality of openings to be filled with a carbosilane-based dielectric material. As shown with box (14) in FIG. 1, next, reflow bake is then performed in order to fill the openings without leaving or substantially reducing voids. As shown with box (15) in FIG. 1, the oligomer material filling the openings may then be cross-linked to form a solid material. Cross-linked final dielectric material is illustrated in FIG. 3. As shown with box (16) in FIG. 1, the solid material may then be subject to hardening and cure.

[0046] Dielectric materials disclosed herein comprise an interconnected matrix of chemically and thermally stable C-rich trisilacyclohexane (TSCH) units. The TSCH units are covalently attached via different linkages depending on specific TSCH oligomers and crosslinkers used, as described in greater detail below. For example, using oxygen, water, alcohols, or ethers as crosslinking agents leads to SiOSi linkages between two TSCH units. In other cases, the SiOSi linkages can be formed from precursors that contain oxygen as a functional group (R or X). Different functional groups, R and X, and different numbers of R and X can be used to control the molecular weight (size) of the oligomers (some examples are illustrated in FIG. 3). Depending on the specific chemical species of R and X, the number of X and R on a TSCH ring, and whether or not an external crosslinker is used, large or small oligomers can be targeted.

[0047] Details of each of the boxes shown in FIG. 1 are now described in greater detail.

Box (11) of FIG. 1: Oligomer Synthesis

[0048] As described herein, the dielectric material provided within the openings includes cyclic carbosilane units made based on the cyclic carbosilane monomers as shown in FIG. 2.

[0049] In various embodiments, cyclic carbosilanes can include rings having various numbers of cyclic members and may have equal numbers of Si and C atoms in the ring. The number of ring members may be, for example, 4, 6, 8, 10, 12, 14, or more. In one set of embodiments, the dielectric material may be comprised of cyclic carbosilane units that consist of six member rings, each of which includes three carbon atoms and three silicon atoms in the ring. The cyclic carbosilanes may be void of cyclic atoms that are not Si or C. Low k dielectric materials can be produced from oligomers made from two or more C-rich trisilacyclohexane (TSCH) derivatives. The TSCH derivatives may be the same or different and may include different functional groups attached to the cyclic Si atoms. The cyclic carbons may also be functionalized or may be void of functional groups. In some embodiments, each cyclic Si atom in the TSCH unit may be independently bonded to an R group and a cross-linkable X group, as shown in FIG. 1.

[0050] In some specific embodiments, R can be, for example, H, methyl, ethyl, O— CH3 or O- Et. The R group attached to Si may be the same or different as X and may include, for example, H, alkyi or OR' where R' is a functional group, such as, for example, an alkyi group comprising hydrogen atoms and from 1 to 10 carbon atoms or from 1 to 30 carbon atoms. In addition, R' optionally comprises heteroatoms such as oxygen atoms, nitrogen atoms, sulfur atoms, chlorine atoms, and or fluorine atoms. The functional group R' can be a group such as, -CH3, -CH2CH3, -CH2CH2CH3, -CH₂CH2aCH₂CH3,— CH2CH2CH2CH2CH3, - CH₂CH(CH₃)2, -CH₂CH₂CH(CH3)2, -CH2CH2CH(CH₂CH₃)2, -CH2OCH3 and— CH2CH2OCH3. R' may also include phenyl groups, allyl groups and vinyl groups. Examples include C6H5— CH2, and CH2=CH. In certain embodiments R' is a methyl group, ethyl group, or can be SiR"3 where R" can be the same or different and can be H or an alkyi group such as, for example, -CH₃,— CH2CH3, -C(CH₃)₃, -CH(CH₃)₂,— CH2CH2CH3 or— CH2CH2CH2CH3.

[0051] X can be a cross-linkable functional group such as H, OEt or O— CH3. Examples of specific pairings of R and X bound to a common cyclic Si can include, for example, H, H; H, CH3; O-Et, O-Et; CH3, O-Et; and H, O-Et. The R X pairs may be independently selected for each cyclic Si in the cyclic carbosilane unit. In some embodiments, the R X pairs for each cyclic Si in a given unit are the same. Exemplary TSCH derivatives that may be useful as monomer units include 1,3,5-Trisilacyclohexane; 1,1,3,3,5, 5-hexamethyl-l,3,5- trisilacyclohexane; 1,1,3, 3,5,5-hexaethoxy- 1,3, 5-trisilacyclohexane; l,3,5-trimethyl-l,3,5- trisilacyclohexane; l,3,5-triethoxy-l,3,5-trimethyl-l,3,5-trisilacyclohexane; and 1,3,5- triethoxy-l,3,5-trisilacyclohexane.

[0052] In some embodiments, an oligomeric or cross-linked dielectric material may include a cyclic carbosilane unit that is bound to greater than two additional cyclic carbosilane units. In many embodiments, the dielectric material may include a cyclic carbosilane unit that is bound to greater than three additional carbosilane units. For instance, a single TSCH unit (or other cyclic carbosilane) may be covalently bound to three, four, five or six independent TSCH (or other cyclic carbosilane) units. The cyclic carbosilane units may be linked to each other via the cyclic carbon atoms or the cyclic silicon atoms on each of the respective rings. In some embodiments, adjacent cyclic carbosilane units are each linked to each other via cyclic silicon atoms. For example, a silicon atom of a six membered carbosilane ring may be linked to a silicon atom of an adjacent six membered ring via a linking group that may be a single atom such as oxygen. A cyclic carbosilane ring or unit is adjacent to another cyclic carbosilane ring or unit if it is covalently bonded to that ring or unit directly or via an atom or linking group that does not include an additional cyclic carbosilane ring or unit. In some embodiments, linking groups may be limited to, at most, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,11, or 12 atoms.

[0053] Properties such as the average molecular weight of the oligomers can be predetermined by controlling reaction conditions such as concentration of components (including monomers and catalyst), time of addition, solvent or co-solvents, and

temperature. Molecular weights may be selected to improve the applicability of the precursor when spun onto a structure with a plurality of openings, e.g. on a substrate.

Exemplary average molecular weights for precursors may be greater than or equal to 280, greater than 500, greater than 1000, greater than 2000 or greater than 5000. The oligomers may include, for instance, dimers, trimers, tetramers, pentamers, hexamers, heptamers, octomers, nonomers, or may contain greater than 10, greater than 20 or greater than 30 cyclic carbosilane units. The precursors may be branched and may be essentially void of linear oligomers of greater than three or four monomer units. To provide for dendrimeric branching, some cyclic carbosilane units may be chemically bound to three, four, five or six adjacent cyclic carbosilane units. In some embodiments, two, three, four or more different oligomers may be physically mixed together and then coated onto a nanopatterned structure. These oligomers may differ, for example, with regard to cyclic carbosilane structure, average molecular weight, molecular weight distribution, atomic percent C, atomic percent Si, atomic percent 0, ratio of C:Si:0, amount of branching, capping species and/or porogen content.

[0054] In one set of embodiments, different types of oligomers can be produced by joining TSCH derivatives in various ratios. The ratios are often not 1:1 on an equivalents basis. In certain embodiments, monomers may be reacted in ratios (equivalents basis) greater than or equal to 2:1, 3:1, 4:1, 5:1, 6:1, 7:1 or 8:1.

[0055] FIG. 4 provides four examples of suitable monomeric cyclic carbosilanes that are either TSCH or TSCH derivatives and could be used for synthesizing precursors for the dielectric material to be provided in the openings, as described herein. In FIG. 4, monomers 1 and 2 are representative of Si— H functionalized species while monomers 3 and 4 are representative of Si— O-Et functionalized species. By selecting different cyclic carbosilanes and reacting them together in pre-selected ratios, some examples of which are shown in FIGs. 5 and 7, a high molecular weight oligomer with tailored properties can be formed. For instance, the oligomer may be selectively capped substantially with Si— O-Et groups or substantially with Si— H or Si— H₂ groups. As used herein, an oligomer is substantially capped with a group if that group occupies more than 99% of the available Si locations. The presence or absence of these groups can be confirmed with the use of ^XH Nuclear Magnetic Resonance (NMR) technique.

[0056] A following notation is used herein to identify various oligomeric precursors formed using monomers 1-4 shown in FIG. 4: "oligomer-NiN₂L" (also referred to as "oligo- N1N2L" or simply "NiN₂L"). Each of Ni and N₂ is an integer between 1 and 4 indicating a respective one of the monomers 1-4 shown in FIG. 4, and L is a letter a, b, c, etc. In this notation, "NiN₂" indicates an oligomer formed using a larger number of equivalents of monomer Ni and a smaller number of equivalents of monomer N₂. A particular letter L indicates whether the oligomer was formed directly from the monomers Ni and N₂, in which cases letter "a" is used to indicate the initial synthesis, or whether the oligomer was formed from an oligomer formed in the previous cycle and some additional monomers Ni or N₂, in which cases letter "b" is used to indicate that the oligomer NiN₂b was formed using NiN₂a and additional monomers, letter "c" is used to indicate that the oligomer NiN₂c was formed using NiN₂b and additional monomers, etc. For example, "oligomer-13a" refers to an oligomer formed using a larger number of equivalents of monomer 1 and a smaller number of equivalents of monomer 3, synthesized from the monomers 1 and 3, "oligomer-13b" refers to an oligomer formed using an oligomer-13a and additional monomers 1 or 3, "oligomer-31a" refers to an oligomer formed using a larger num ber of equivalents of monomer 3 and a smaller number of equivalents of monomer 1, etc. Additional numbers N3 and N₄ may also be used, indicating use of more than two monomers Ni or N₂ to synthesize an oligomer. For example, "oligomer-134a" refers to an oligomer formed using a larger num ber of equivalents of monomer 1 (i.e. Ni=l) a nd a smaller number of equivalents of monomer 3 (i.e. N₂=3), and still a smaller number of equivalents of monomer 4 (i.e. N3=4).

[0057] In various embodiments, the cyclic carbosilane monomers as shown in FIG. 2 can be reacted directly or may use a cross-linker to form Si— 0— Si linkages from Si— H and Si— O-Et groups, a coupling agent such as a strong Lewis acid may be used. Examples of suitable strong Lewis acids include tris(pentafluorophenyl)borane (B(C6Fs)3).

[0058] Cyclic carbosilane monomers including Si— H groups can react with cyclic carbosilane monomers including Si— O-Et groups until the availability of one of the two groups is exhausted. Reaction may be facilitated in a dry, non-aqueous solvent system. Solvents may be hydrocarbons and may be either a liphatic or aromatic or a mixture. In some

embodiments, aromatic solvents such as toluene, benzene, xylene or ethyl benzene may be used. By reacting a greater amount (equivalents basis) of an Si— H₂ (or Si— H)

functionalized monomer with a lesser amount of an Si— O-Et functionalized monomer, a n Si— H₂ (or Si— H) capped oligomer can be formed where all or essentially all of the O-Et groups have been converted to Si— O— Si linking groups that form the oligomer.

Conversely, by reacting a greater amount of Si— O-Et functionalized monomer with a lesser amount of Si— H functionalized monomer, the resulting precursor oligomer can exhibit an absence of Si— H groups and a large number of Si— O-Et groups. Either oligomer

termination may be useful for subsequent cross-linking or binding to an additional substance such as a porogen. If the limiting component includes Si— O-Et groups, the SiH or S1H2 groups in the majority component will convert all, or substantially all, of the Si— O-Et groups to Si— 0— Si linkages, evolving ethane in the process. If the limiting component includes SiH and/or S1H2 groups, then the resulting oligomer will be predominantly capped with Si— O-Et or Si— (OEt)₂ groups. Additional cyclic carbosilane monomers as well as other compounds may be incorporated to alter the structure of the oligomer precursors. For instance, the oligomer may be the product of two, three, four or more different monomers.

[0059] The synthesis of a oligomer precursor produced by com bining cyclic carbosilane "1" with cyclic carbosilane "3" (as shown in FIG. 4) is illustrated in equation (51) of FIG. 5, in which 6 equivalents of monomer 1 are reacted with 1 equivalent of monomer 3 in a solvent in the presence of B(C6Fs)3. As the ratio of monomer 1 to monomer 3 (equivalents basis) is 6:1, a ll Si— O-Et groups are converted to Si— O— Si linking groups and the resulting oligomer is S1 H2 capped. Examples of several species that are representative of oligomer 13a are illustrated by the structures shown in FIGs. 6a-6e. As illustrated, some of the cyclic carbosilane units are covalently bonded to five or six adjacent cyclic carbosila ne units.

Although the number of monomer units in each of these species of oligomer 13a can vary, each Si forms either a Si— 0— Si linking group or retains an S1H2 group, and Si— O-Et groups are essentially absent. A group is "essentially absent" if it represents less than 0.1% of the Si groups in the oligomer.

[0060] Equations (52) through (58) shown in FIG. 5 represent additional embodiments in which different precursor oligomers with various capping species can be chosen by preselecting the ratio of monomers to be reacted. Each pairing reacts a monomer including Si— H functional groups with an unequal (on equivalents basis) amount of a monomer including Si— O-Et functional groups. The resulting oligomers are identified and the predominant capping species are indicated in FIG. 5.

[0061] Building an oligomer can occur in stages, and in some embodiments a higher molecular weight oligomer can be produced by reacting an oligomer with additional monomer of a same or different type as was used in the initial reaction. For instance, oligomer 13a can attach to cyclic carbosilane monomer "3" to build a higher molecula r weight oligomer identified as oligomer 13b. If pendant Si— O-Et or Si-(OEt)₂ groups are desired, an excess of monomer 3 or monomer 4 can be reacted with a previously formed oligomer. To keep the periphery of the oligomer capped with SiH2 groups, as in 13a, the additional monomer can be added in an amount where the equivalents of monomer do not exceed the equivalents of SiH2 groups available on oligomer 13a. The second generation oligomer 13b can be reacted with additional monomer in a similar manner to produce an even higher molecular weight oligomer, 13c. Two example embodiments of multi-step oligomer syntheses are provided in FIG. 7 as examples (71) and (72). Oligomers 13b and 13c include components from monomers 1 and 3. Oligomers 134a and 134b include oligomers from monomers 1, 3 and 4.

[0062] In FIG. 7, notation such as e.g. part (70) of the example (71) is to be interpreted as follows: 1 equivalent of oligomer 13a is reacted with 1/6 equivalent of monomer 3 in a solvent in the presence of B(CeFs)3 to produce oligomer 13b.

[0063] Smaller oligomers can be made by controlling the reaction of only one oligomer (e.g., 1) with a crosslinking group. An example is oligomer 11a. In the presence of the same catalyst, 1 can be crosslinked by the addition of molecules such as ethanol, ethers, or water as shown in FIG. 8. Ratios of 2:1 and 4:1 l:ethanol gave films with nice coatings that can fill the same features and survive all bakes as oligol3a.

[0064] FIG. 8 illustrates that smaller oligomers can be made by reaction of

trisilacyclohexane with a coreactant such as ethanol, or other alcohols such as methanol or others, or diethyl ether, or other ethers such as dibenzyl ether, which contributes just one oxygen atom that ends up as cross-linking atom between two trisilacyclohexane rings.

[0065] Chemical structures and experimental molecular weight distribution may be obtained using Gel Permeation Chromatography (GPC). Comparing oligomer 13a with oligomer 11a using GPC reveals that the largest peak of oligomer 11a is nearly 9 times smaller than the largest peak of oligomer 13a. As a result, the molecular weight distribution of the oligomer 11a materials is about 9x less than oligomer 13a. Smaller molecules should allow fill into smaller opening features while nevertheless being large enough to prevent volatilization during processing. [0066] Instead of or in addition to B(C6Fs)3, other strong Lewis acids can be used to effect above chemical transformations including trialkylsilylium cations with weakly coordinating counteranions like triflate, B(C6Fs)₄ etc.

[0067] Oligomers of the desired composition and molecular weight can also be obtained using other coupling reactions not involving strong Lewis acid catalysts. For example, Si- brominated (or chlorinated) trisilacyclohexanes can be used and subjected to controlled hydrolysis reactions to form the same types of oligomers presented above. For example, 1,3,5-tribromotrisilacyclohexane could be reacted directed with water or in conjunction with 1-bromotrisilacyclohexane to give oligomeric species with SiH functionality retained.

[0068] A diagram illustrating the relationship between monomer raw material, low k precursor oligomer, and the low k cross-linked dielectric material (prior to curing of box 16), in accordance with some example embodiments, is provided in FIG. 3.

Box (12) of FIG. 1: Solution Formulation

[0069] Low k precursors described in the previous section are mixed with solvent to various dilution. In various embodiments, solvents such as toluene, 2-heptanone, or cyclohexanone may be used. The oligomers can exhibit low volatility (lower than the cyclic carbosilane monomer or dimer, for instance) so that the oligomers can be disposed on and

quantitatively retained on a substrate prior to being cross-linked.

[0070] For the cases of larger molecular oligomers, the organic solvent, any unreacted raw materials, and low molecular weight precursors can be removed in a rotary evaporator or a similar apparatus. Remaining high molecular weight oligomers can be re-dissolved into new solvents, e.g. 2-heptanone. At this point, a new solvent than the one used in the oligomer synthesis may be used. However, use of new solvents other than that used for reaction synthesis could have manufacturing, environmental health and safety (EHS), and fillability implications. Whether the rotary evaporator is used for solvent exchange or not, the precursor oligomers may then be diluted to target concentrations for spin coating. The dilution tunes the thickness of the film that results after spin coating. Depending upon the aspect ratio of the features needing to be filled, the dilution can be tuned for incomplete fill, nearly complete fill, or complete fill with various amounts of overburden (i.e. when not only all of the openings are filled, but also there is a layer of thin film over the structure).

Box (13) of FIG. 1: Spin Coating the Solution

[0071] Precursor coating can happen by dispensing and spin coating of the precursor formulation described above using industry standard spin tracks. For example, in some embodiments, spin coating the precursor onto the structure with the openings may include spin coating for 1-60 seconds, including all values and ranges therein, at 500-6000 rotations per minute (rpm), including all values and ranges therein.

[0072] In other embodiments, precursor may be provided on the structure with opening by means other than spin coating, such as e.g. dipcoating, dropcasting, solution immersion, and flowable chemical vapor deposition (CVD) methods.

Box (14) of FIG. 1: Reflow Bake about Tg

[0073] After spin coating, depending on the topography of the nanostructure, it is possible that the precursor materials do not properly and/or completely fill the openings provided in a structure. Dense fill of precursor oligomers can be accomplished by heating up the precursors above their glass transition temperature Tg, a process referred to herein as a "reflow bake" to indicate that the structure with the openings onto which the precursor was coated is baked to allow complete and uniform reflow of the precursor into the openings. A person of ordinary skill in the art would readily recognize that different molecular weight species can provide different Tg values and, therefore, different temperatures need to be applied for controlling the reflow bake process. For example, in some embodiments, a reflow bake process for the oligol3a precursors may include heating the precursor to 125 degrees Celsius for 5 minutes, preferably under nitrogen gas.

Box (15) of FIG. 1: Cross-linking

[0074] After the oligomers have been adequately filled into the topographical features on the wafer, precursors may be cross-linked into a solid carbosilane material using any one of several methods. [0075] Cross-linking agents may be selected based on the specific precursor oligomers that are being linked. For example, if the oligomers present SiH groups, multifunctional molecules such as silanes containing C=C and C=0 bonds may be used. These molecules include tetravinylsilane, tetraallylsilane and 1,3,5-trivinyltrisilacyclohexane, for example.

[0076] The cross-linking can be facilitated, for example, by heat, radiation, a chemical catalyst, or any other means that activate cross-linking.

[0077] In case of heat-assisted cross-linking, in some embodiments, temperature may range from 150 to 500 degrees Celsius, from 200 to 450 degrees Celsius, from 250 to 400 degrees Celsius, and from 300 to 375 degrees Celsius. For the case of oligol3a or oligolla, a 180- 350 degrees Celsius bake, i.e. soft-bake, in air for about 5 to 60 minutes, including all values and ranges therein, leads to conversion of two terminal Si-H groups into Si-O-Si bonds that bridge neighboring precursors into a solid dielectric material network. Different schemes may be required depending on whether Si-H, Si-O-Et, or other capping groups are present in the precursor and what specific functionality the cross-linking is intended to bring. For example, Si-O-Et and other groups (such as Si-H or Si-OEt) could crosslink into Si-O-Si groups. Crosslinking groups containing C=C or C=0 could could crosslinking with SiH groups into C-C- Si or C-O-Si groups. The crosslinking described here brings mechanical stability such as stiffness (high Young's modulus), reduced swelling in organic solvent, and reduced material shrinkage after exposure to UV photons, free electrons, or electron beams.

[0078] In case of radiation-assisted cross-linking, UV activation may be used, with UV radiation comprising a broad range of wavelengths. With some activators such as Si-H bonds, C=C, or C=0 bonds, any wavelength below 300 nm can be effective. Intensity of UV radiation should be selected to be adequate to fully cross-link the oligomers. In some embodiments an intensity of from 0.01 to 1.0 W/cm² has been found effective. Exposure time can be adjusted for specific carbosilane systems as well as specific wavelengths and radiation intensity. To achieve complete crosslinking, times from 5 seconds to 20 minutes have been used in many embodiments.

[0079] Si— H bonds can also be reacted with compounds including air, or alcohol or Si— OR functionality. In other embodiments, a cross-linking agent such as water can be added to the precursor to link Si— H moieties. The choice of a specific cross-linking agent can also be based on the desired composition of the dielectric material. For example, the ratio of C to 0 to Si in the dielectric material can be tailored by using specific cross-linking agents. Cross- linking may be activated, for example, thermally or via a catalyst. Catalysts include, for example, strong acids or Lewis acids. In general, the term "strong acid" is used to describe an acid with pK_a value being less than 3. As is well-known, pK_a is a measure of strength of acids, with the smaller value of pK_a, the stronger the acid. Parameter pK_a refers to the logarithmic constant of the acid dissociation constant, K_a.

[0080] To avoid cross-linking during the spin coating process, an acid catalyst can be introduced in a masked form that releases acid only after activation, such as thermal activation via a thermal acid generator (TAG) or photochemical activation via a photoacid generator (PAG). Exemplary photo acid generators include diaryliodonium and

triarylsulfonium salts possessing weakly coordinating counter anions such as

trifluoromethanesulfonate, nonaflurorbutanesulfonate, hexafluorophosphate,

tetrafluoroborate, para-toluenesulfonate. Examples of neutral photoacid generators include those in the arylsulfonate family such as phenyltrifluoromethanesulfonate and those in the N-sulfonated amine and imides family such as N- trifluoromethanesulfonatomaleimide. Other classes of compounds common in the photolithographic and photopolymerization fields are also useful in various example embodiments of the disclosure. Examples of photobase generators include amines protected with photodecomposable nitrobenzylcarbamate or other carbamate groups. Other classes of compounds common in the photolithographic and photopolymerization fields and used as PAGs and PBGs are also useful in embodiments of the disclosure.

Through the introduction of less stable substituents, the above described photoacid and photobase generators can be tuned to also behave as thermal acid and thermal base generators, respectively. For example, sulfonium salts possessing two aryl substituents and one alkyl substituent can behave as thermal acid generators. Additionally, due to the thermal instability of carbamate towards the release of C02, common photobase generators can also serve as thermal base generators in the dielectric material. Typical temperatures for carbamate-containing TAGs are temperatures between 200 and 400 degrees Celsius.

[0081] In a similar manner, Lewis acids can be released using thermal Lewis acid generators (ThLAGS) or photochemical Lewis acid generators (PhLAGS). The masked activator, e.g., PhLAG or ThLAG, can be stably incorporated into the precursor oligomers and

polymerization can be delayed indefinitely but initiated on demand by the application of, for instance, heat or UV radiation. For instance, heating of the precursor can thermally activate the components to provide the energy necessary for Si— O— Si (or other Si— XL-Si) reactions to occur. Some compounds can act as both a ThLAG and a PhLAG. Such compounds include the triphenylsulfonium salt of B(C6Fs)3 that can be irradiated by UV light (e.g., 254 nm) to release the strong Lewis acid B(C6Fs)3. Analogous methods for base generation can also be used. Lewis acid generators, both ThLAGs and PhLAGs, may be also be used to link existing precursor oligomers with cyclic carbosilane monomers including those used to build the oligomer initially. For instance, Si-OEt capped monomers such as monomers 3 and 4 from FIG. 4 can be added to an Si— H capped oligomer such as oligomer 13a along with a ThLAG or PhLAG and then the mixture can be spin coated onto the structure with openings. Upon unmasking via heat or UV radiation, the available Lewis acid can catalyze the reaction between the oligomer and the monomer, leading to a solid cross-linked dielectric material that can be a low k dielectric material.

[0082] Cross-linked layers comprised of the carbosilane compounds described herein can exhibit low k values. For instance, the dielectric constant (k) values for the cross-linked carbosilane materials in the openings of the structure may be less than 6.0, preferably less than 3.5, less than 3.0, less than 2.5, less than 2.0, less than 1.8 or less than 1.6. Specific ranges for k values can include 1.6 to 3.6, 2.6 to 3.6, 1.6 to 2.6, 1.6 to 2.2, 2.2 to 2.6, 1.0 to 2.5, 1.0 to 1.8 and 1.0 to 1.6. In other embodiments, dielectric materials possessing higher k values may be preferred and can be produced using cyclic carbosilanes. For example, these cross-linked dielectric materials may exhibit k values of greater than 3.0, greater than 3.2 and greater than 3.4. Specific ranges include 3.0 to 4.0, 3.2 to 3.6 and 3.4 to 3.5. [0083] In various embodiments, the oligol3a and oligolla precursors show nominally identical FTIR spectra immediately after deposition (box (13) of FIG. 1) and have nominally identical refractive indexes after deposition and after cross-linking soft-bake (box (15) of FIG. 1). The only observable differences in the FTIR spectrum are due to the differences in molecular weight because the oligolla species has slightly more Si-H groups (2150 per centimeter) and slightly fewer Si-O-Si links (1100 per centimeter) per TSCH ring (1350 per centimeter) than the oligol3a species. This is consistent with fewer numbers of bridging Si- O-Si groups between TSCH rings. After the cross-linking soft bake, the Si-H groups are reacted with air to form a network of TSCH rings crosslinked by Si-O-Si groups, and both oligomers will become even more chemically similar in the final crosslinked network. The solid dielectric materials are, therefore, expected to have nominally identical properties, with the main difference being in the molecular weight of the starting formulation, which can help tune Tg and/or fill properties.

Box (16) of FIG. 1: Harden and Cure (optional)

[0084] Once the solid carbosilane material is set into a cross-linked network, the wafer can be subjected to higher temperature outgassing bakes at 400-450 degrees Celsius, including all values and ranges therein, for 1-30 minutes, including all values and ranges therein, in order to remove any thermally labile species. Preferably, the outgassing bake is carried out under nitrogen gas. As used herein, the term "outgassing" is used to describe release of zero or more gases that may have been dissolved, trapped, absorbed, or otherwise included within the cross-linked carbosilane material.

[0085] The material may also be subsequently cured, e.g. by using heat, UV photons or/and electron beams, in order to mechanically harden and/or change the etch properties of the carbosilane material. In some embodiments, curing may involve heating the solid carbosilane material between 200-450 degrees Celsius, including all values and ranges therein, while simultaneously exposing to optical radiation of 170-254 nm wavelengths (i.e., deep ultraviolet light), including all values and ranges therein. In other embodiments, curing may involve heating the solid carbosilane material between 200-450 degrees Celsius, including all values and ranges therein, and exposing the solid carbosilane material to electrons.

Exemplary Structure

[0086] FIG. 9 provides a schematic illustration of a cross-section of a structure 91 comprising a plurality of openings 92 filled with carbosilane dielectric material 93, according to some embodiments of the present disclosure. As can be seen, FIG. 9 is drawn to reflect example real world process limitations, in that the features are not drawn with precise right angles and straight lines. The structure 91 can be disposed on a substrate 94, and an etch- stop layer 95 may be provided to ensure that when the openings 92 are made by etching the structure 91, etching does not extend into the substrate 94. Height H and width W of the openings 92 are also indicated in FIG. 9.

[0087] In a particular example shown in FIG. 9, the dielectric material 93 is shown to fill the features 92 to a large extend, but not completely - the upper parts of the openings 92 are not filled with the material 93. However, in other embodiments, the dielectric material may fill the features completely and may even form a thin film covering the entire structure 92.

[0088] In various embodiments, each one of the structure 91 and the substrate 94 may be comprised of one or more of silicon, silicon dioxide, germanium, indium, antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide and gallium antimonide. In some embodiments, the structure 91 may be an interlayer dielectric (ILD). Two or more layers of the interlayer dielectric may be stacked to form an integrated circuit. In some embodiments, the ILD may include one or more sacrificial layers deposited over a dielectric substrate. The ILD may include one or more dielectric materials, which are understood to be materials that are insulators but are polarized upon application of an electric field. In some embodiments, the material layer may include a low-k dielectric material, that is, a material with a dielectric constant that is lower than 3.9, i.e., the dielectric constant of silicon dioxide, including all values and ranges from 1.5 to 3.8, such as 1.7, 1.9, 2.1, 2.8, 2.7, etc. Non-limiting examples from which the dielectric materials of the structure 91 may be selected include fluorine-doped silicon dioxide, carbon doped oxide (i.e., carbon-doped silicon dioxide), organo silicate glass, silicon oxycarbide, hydrogenated silicon oxycarbide, porous silicon dioxide, and organic polymer dielectrics such as polyimide,

polytetrafluoroethylene, polynorbornenes, benzocyclobutene, hydrogen silsequioxane and methylsilsesquioxane. The structure 91 layer may have a thickness in the range of 50 nm to 300 nm, including all values and ranges therein, such as 100 nm to 300 nm, 100 nm to 200 nm, etc.

Implementation in an interposer

[0089] In accordance with embodiments of the disclosure, structures comprising openings filled with carbosilane dielectric materials disclosed herein may be used in the fabrication of an interposer, such as e.g. the one shown in FIG. 10. In particular, the structures described herein may be used in the fabrication of various interconnects and metallization stacks of the interposer shown in FIG. 10. For example, the structures described herein may be used in forming dielectric regions within the interposer 1000, e.g. regions between at least some of the trenches 1008 and vias 1010, which could be done instead of or in addition to a conventional dual damascene process. Use of the approaches and materials described herein may then be identified by the analysis of the localized dielectric material properties as described herein, such as e.g., density, porosity, propensity for film shrinkage, mechanical properties, and/or chemical composition gradients of oxygen and hydrogen.

[0090] FIG. 10 illustrates an interposer 1000 that includes one or more embodiments of the disclosure. The interposer 1000 is an intervening substrate used to bridge a first substrate 1002 to a second substrate 1004. The first substrate 1002 may be, for instance, an integrated circuit die. The second substrate 1004 may be, for instance, a memory module, a computer motherboard, or another integrated circuit die. Generally, the purpose of an interposer 1000 is to spread a connection to a wider pitch or to reroute a connection to a different connection. For example, an interposer 1000 may couple an integrated circuit die to a ball grid array (BGA) 1006 that can subsequently be coupled to the second substrate 1004. In some embodiments, the first and second substrates 1002/1004 may be attached to opposing sides of the interposer 1000. In other embodiments, the first and second substrates 1002/1004 may be attached to the same side of the interposer 1000. In further embodiments, three or more substrates may be interconnected by way of the interposer 1000.

[0091] The interposer 1000 may be formed of an epoxy resin, a fiberglass-reinforced epoxy resin, a ceramic material, or a polymer material such as polyimide. In further

implementations, the interposer may be formed of alternate rigid or flexible materials that may include the same materials described above for use in a semiconductor substrate, such as silicon, germanium, and other group lll-V and group IV materials.

[0092] The interposer may include metal interconnect trenches 1008 and vias 1010, including but not limited to through-silicon vias (TSVs) 1012. The vias 1010 may be enclosed by first and second diffusion barrier layers as described herein. The interposer 1000 may further include embedded devices 1014, including both passive and active devices. Such devices include, but are not limited to, capacitors, decoupling capacitors, resistors, inductors, fuses, diodes, transformers, sensors, and electrostatic discharge (ESD) devices. More complex devices such as radio-frequency (RF) devices, power amplifiers, power management devices, antennas, arrays, sensors, and MEMS devices may also be formed on the interposer 1000.

Implementation in a computing device

[0093] In accordance with embodiments of the disclosure, structures comprising openings filled with carbosilane dielectric materials disclosed herein may be used in the fabrication of a computing device, such as e.g. the one shown in FIG. 11. In particular, the structures described herein may be used in the fabrication of various interconnects and metallization stacks of the computing device shown in FIG. 11.

[0094] Figure 11 illustrates a computing device 1100 in accordance with one embodiment of the disclosure. The computing device 1100 may include a number of components. In one embodiment, these components may be attached to one or more motherboards. In an alternate embodiment, some or all of these components may be fabricated onto a single system-on-a-chip (SoC) die. The components in the computing device 1100 include, but are not limited to, an integrated circuit die 1102 and at least one communications logic unit 1108. In some implementations the communications logic unit 1108 may be fabricated within the integrated circuit die 1102 while in other implementations the communications logic unit 1108 may be fabricated in a separate integrated circuit chip that may be bonded to a substrate or motherboard that may be shared with or electronically coupled to the integrated circuit die 1102. The integrated circuit die 1102 may include a CPU 1104 as well as on-die memory 1106, often used as cache memory, that can be provided by technologies such as embedded DRAM (eDRAM) or spin-transfer torque memory (STTM or STT-MRAM).

[0095] Computing device 1100 may include other components that may or may not be physically and electrically coupled to the motherboard or fabricated within an SoC die. These other components include, but are not limited to, volatile memory 1110 (e.g., DRAM), non-volatile memory 1112 (e.g., ROM or flash memory), a graphics processing unit 1114 (GPU), a digital signal processor 1116, a crypto processor 1142 (a specialized processor that executes cryptographic algorithms within hardware), a chipset 1120, an antenna 1122, a display or a touchscreen display 1124, a touchscreen controller 1126, a battery 1128 or other power source, a power amplifier (not shown), a voltage regulator (not shown), a global positioning system (GPS) device 1128, a compass 1130, a motion coprocessor or sensors 1132 (that may include an accelerometer, a gyroscope, and a compass), a speaker 1134, a camera 1136, user input devices 1138 (such as a keyboard, mouse, stylus, and touchpad), and a mass storage device 1140 (such as hard disk drive, compact disk (CD), digital versatile disk (DVD), and so forth).

[0096] The communications logic unit 1108 enables wireless communications for the transfer of data to and from the computing device 1100. The term "wireless" and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communications channels, etc., that may communicate data through the use of modulated electromagnetic radiation through a non-solid medium. The term does not imply that the associated devices do not contain any wires, although in some embodiments they might not. The communications logic unit 1108 may implement any of a number of wireless standards or protocols, including but not limited to Wi-Fi (IEEE 802.11 family), WiMAX (IEEE 802.16 family), IEEE 802.20, long term evolution (LTE), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPRS, CDMA, TDMA, DECT, Bluetooth, derivatives thereof, as well as any other wireless protocols that are designated as 3G, 4G, 5G, and beyond. The computing device 1100 may include a plurality of communications logic units 1108. For instance, a first communications logic unit 1108 may be dedicated to shorter range wireless

communications such as Wi-Fi and Bluetooth and a second communications logic unit 1108 may be dedicated to longer range wireless communications such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO, and others.

[0097] The processor 1104 of the computing device 1100 may include one or more interconnects or other lithographically patterned features that are formed in accordance with embodiments of the present disclosure. The term "processor" may refer to any device or portion of a device that processes electronic data from registers and/or memory to transform that electronic data into other electronic data that may be stored in registers and/or memory.

[0098] The communications logic unit 1108 may also include one or more interconnects or other lithographically patterned features that are formed in accordance with embodiments of the present disclosure.

[0099] In further embodiments, another component housed within the computing device 1100 may contain one or more interconnects or other lithographically patterned features that are formed in accordance with embodiments of the present disclosure.

[00100] In various embodiments, the computing device 1100 may be a laptop computer, a netbook computer, a notebook computer, an ultrabook computer, a smartphone, a tablet, a personal digital assistant (PDA), an ultra mobile PC, a mobile phone, a desktop computer, a server, a printer, a scanner, a monitor, a set-top box, an

entertainment control unit, a digital camera, a portable music player, or a digital video recorder. In further implementations, the computing device 1100 may be any other electronic device that processes data.

[00101] Some Examples in accordance with various embodiments of the present disclosure are now described. [00102] Example 1 provides a carbosilane-based device. The device includes a structure including a plurality of openings; and a dielectric material disposed within the plurality of openings, the dielectric material including cross-linked cyclic carbosilane units having a ring structure including C and Si, where at least a first cyclic carbosilane unit is linked to at least two adjacent cyclic carbosilane units.

[00103] Example 2 provides the device according to Example 1, where oxygen concentration in the dielectric material is at or below a first value in a first portion of the dielectric material disposed within the plurality of openings and is between the first value and a second value, the second value being greater than the first value, in a second portion of the dielectric material disposed within the plurality of openings.

[00104] Example 3 provides the device according to Example 2, where the first portion is closer to a bottom of the plurality of openings than the second portion.

[00105] Example 4 provides the device according to Example 1, where oxygen concentration in the dielectric material is at or below 15%, preferably at or below 20%, more preferably at or below 30%.

[00106] Example 5 provides the device according to any one of the preceding Examples, where the plurality of openings have aspect ratios of 1 or more, where an aspect ratio is a ratio of a depth of an opening to a width of the opening.

[00107] Example 6 provides the device according to Example 5, where the plurality of openings have aspect ratios between 1 and 20.

[00108] Example 7 provides the device according to any one of the preceding

Examples, where the first cyclic carbosilane unit is linked via Si— O— Si links to each of the at least two separate cyclic carbosilane units.

[00109] Example 8 provides the device according to any one of the preceding

Examples, where at least one cyclic Si atom in the first cyclic carbosilane unit is covalently bonded to two adjacent cyclic carbosilane units. [00110] Example 9 provides the device according to any one of the preceding Examples, where the cyclic ca rbosila ne units are essentially free of Si— O-Et groups.

[00111] Example 10 provides the device according to any one of the preceding Examples, where essentially all of the cyclic carbosilane units are capped with Si— H groups or Si— H₂ groups.

[00112] Example 11 provides the device according to any one of Exa mple 1-9, where the cyclic carbosilane units are essentially free of Si— H groups.

[00113] Example 12 provides the device according to any one of the preceding Examples, where the cyclic carbosilane units are capped with Si— O-Et or Si(OEt)₂ groups.

[00114] Example 13 provides the device according to any one of the preceding Examples, where the dielectric material includes two or more structurally distinct cyclic carbosilane units.

[00115] Example 14 provides the device according to any one of the preceding Examples, where the dielectric material has a k value between 1.5 and 6.0, preferably a k value less than 3.9.

[00116] Example 15 provides the device according to any one of the preceding Examples, where the dielectric material has a k value lower tha n the k value of the substrate.

[00117] Example 16 provides the device according to any one of the preceding Examples, where the dielectric materia l has a porosity of between 0-60%.

[00118] Example 17 provides the device according to any one of the preceding Examples, where a porosity of the dielectric material is at or below a first value in a first portion of the dielectric material disposed within the plurality of openings a nd is between the first value and a second value, the second value being greater than the first value, in a second portion of the dielectric material disposed within the plurality of openings. [00119] Example 18 provides a device that includes a structure including a plurality of openings and a dielectric material disposed within the plurality of openings, the dielectric material including cross-linked cyclic carbosilane units having a ring structure including C and Si, where the cross-linked carbosilane units are capped with Si— H groups or Si— H₂ groups.

[00120] Example 19 provides the device according to Example 18, where oxygen concentration in the dielectric material is at or below a first value in a first portion of the dielectric material disposed within the plurality of openings and is between the first value and a second value, the second value being greater than the first value, in a second portion of the dielectric material disposed within the plurality of openings.

[00121] Example 20 provides the device according to Example 19, where the first portion is closer to a bottom of the plurality of openings than the second portion.

[00122] Example 21 provides the device according to Example 18, where oxygen concentration in the dielectric material is at or below 15%, preferably at or below 20%, more preferably at or below 30%.

[00123] Example 22 provides the device according to any one of Examples 18-21, where the plurality of openings have aspect ratios of 1 or more, where an aspect ratio is a ratio of a depth of an opening to a width of the opening.

[00124] Example 23 provides the device according to Example 22, where the plurality of openings have aspect ratios between 1 and 20.

[00125] Example 24 provides the device according to any one of Examples 18-23, where the dielectric material has a k value of less than 2.6.

[00126] Example 25 provides the device according to any one of Examples 18-24, where the structure is included of one or more of silicon, silicon dioxide, germanium, indium, antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide and gallium antimonide. [00127] Example 26 provides the device according to any one of Examples 18-25, where adjacent cross-linked cyclic carbosilane units are linked via cyclic Si atoms in each cyclic carbosilane unit.

[00128] Example 27 provides the device according to any one of Examples 18-26, where the two adjoining cyclic carbosilane units are linked via an oxygen atom.

[00129] Example 28 provides the device according to any one of Examples 18-27, where all adjoining cyclic carbosilane units are linked via Si atoms in the carbosilane ring.

[00130] Example 29 provides the device according to any one of Examples 18-28, where the dielectric material exhibits a water uptake of less than or equal to 5.0%.

[00131] Example 30 provides the device according to any one of Examples 18-29, where the cyclic carbosilane units include 6 member rings including three carbon atoms and three silicon atoms.

[00132] Example 31 provides the device according to any one of Examples 18-30, where the dielectric material exhibits a time to 10 nm loss of greater than 5 minutes for 0.5% HF or 1.0% KOH.

[00133] Example 32 provides a semiconductor device including the device according to any one of Examples 1-17.

[00134] Example 33 provides a semiconductor device including the device according to any one of Examples 18-31.

[00135] Example 34 provides a method of making a device including a structure with a plurality of openings filled with a carbosilane material. The method includes providing a cyclic carbosilane precursor onto the structure including the plurality of openings; heating the precursor provided on the structure to a temperature above a glass transition temperature of the precursor; and providing an excitation to cross-link the precursor into a solid carbosilane material within the plurality of openings. [00136] Example 35 provides the method according to Example 34, where the precursor includes multiple 1,3,5-trisilacyclohexane rings where the rings are bonded to one another via an oxygen atom or/and a terminal hydrogen atom.

[00137] Example 36 provides the method according to Examples 34 or 35, where providing the precursor onto the structure includes spin-coating the precursor onto the structure for 0-60 seconds at 500-6000 rotations per minute (rpm).

[00138] Example 37 provides the method according to any one of Examples 34-36, where heating the precursor provided on the structure to the temperature above the glass transition temperature of the precursor includes heating the precursor to 125 degrees Celsius for 5 minutes.

[00139] Example 38 provides the method according to Example 37, where the heating is carried out under nitrogen gas.

[00140] Example 39 provides the method according to any one of Examples 34-38, where providing the excitation to cross-link the precursor into the solid carbosilane material within the plurality of openings includes baking the structure at 200 to 350 degrees Celsius for 5 to 60 minutes.

[00141] Example 40 provides the method according to any one of Examples 34-38, where providing the excitation to cross-link the precursor into the solid carbosilane material within the plurality of openings includes providing an optical excitation.

[00142] Example 41 provides the method according to any one of Examples 34-40, further including performing an outgassing of the solid carbosilane material.

[00143] Example 42 provides the method according to Example 41, where the outgassing includes baking the structure at 400 to 450 degrees Celsius for 1 to 30 minutes.

[00144] Example 43 provides the method according to any one of Examples 34-42, further including curing the solid carbosilane material. [00145] Example 44 provides the method according to Example 43, where curing includes heating the solid carbosilane material between 200-450 degrees Celsius while simultaneously exposing to optical radiation of 170-254 nanometer wavelengths.

[00146] Example 45 provides the method according to Example 43, where curing includes heating the solid carbosilane material between 200-450 degrees Celsius and exposing the solid carbosilane material to electrons.

[00147] Example 46 provides an integrated circuit package that includes a

component, and an interconnect region for providing electrical connectivity to the component. The interconnect region includes a plurality of conductive regions; a structure including a plurality of openings, the plurality of openings configured to electrically isolate at least some of the plurality of conductive regions; and a dielectric material disposed within the plurality of openings, the dielectric material including cross-linked cyclic carbosilane units having a ring structure including C and Si, where at least a first cyclic carbosilane unit is linked to at least two adjacent cyclic carbosilane units.

[00148] Example 47 provides the integrated circuit package according to Example 46, where the component includes a transistor, a die, a sensor, a processing device, or a memory device.

[00149] Example 48 provides the integrated circuit package according to Examples 46 or 47, where the structure and the dielectric material form the carbosilane-based device according to any one of Examples 2-17.

[00150] Example 49 provides a computing device including the integrated circuit package according to any one of Examples 46-48.

[00151] Example 50 provides an integrated circuit package that includes a

component, and an interconnect region for providing electrical connectivity to the component. The interconnect region includes a plurality of conductive regions; a structure including a plurality of openings, the plurality of openings configured to electrically isolate at least some of the plurality of conductive regions; and a dielectric material disposed within the plurality of openings, the dielectric material including cross-linked cyclic carbosilane units having a ring structure including C and Si, where the cross-linked carbosilane units are capped with Si— H groups or Si— l-h groups.

[00152] Example 51 provides the integrated circuit package according to Example 50, where the component includes a transistor, a die, a sensor, a processing device, or a memory device.

[00153] Example 52 provides the integrated circuit package according to Examples 50 or 51, where the structure and the dielectric material form the carbosilane-based device according to any one of Examples 19-21.

[00154] Example 53 provides a computing device that includes the integrated circuit package according to any one of Examples 50-52.

[00155] The above description of illustrated implementations of the disclosure, including what is described in the Abstract, is not intended to be exhaustive or to limit the disclosure to the precise forms disclosed. While specific implementations of, and examples for, the disclosure are described herein for illustrative purposes, various equivalent modifications are possible within the scope of the disclosure, as those skilled in the relevant art will recognize.

[00156] These modifications may be made to the disclosure in light of the above detailed description. The terms used in the following claims should not be construed to limit the disclosure to the specific implementations disclosed in the specification and the claims. Rather, the scope of the disclosure is to be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation.

Claims

Claims

1. A carbosilane-based device, the device comprising: a structure comprising a plurality of openings; and a dielectric material disposed within the plurality of openings, the dielectric material comprising cross-linked cyclic carbosilane units having a ring structure including C and Si, wherein at least a first cyclic carbosilane unit is linked to at least two adjacent cyclic carbosilane units.

2. The device according to claim 1, wherein oxygen concentration in the dielectric material is at or below a first value in a first portion of the dielectric material disposed within the plurality of openings and is between the first value and a second value, the second value being greater than the first value, in a second portion of the dielectric material disposed within the plurality of openings.

3. The device according to claim 2, wherein the first portion is closer to a bottom of the plurality of openings than the second portion.

4. The device according to claim 1, wherein oxygen concentration in the dielectric material is at or below 15%, preferably at or below 20%, more preferably at or below 30%.

5. The device according to any one of the preceding claims, wherein the plurality of openings have aspect ratios between 1 and 20, wherein an aspect ratio is a ratio of a depth of an opening to a width of the opening.

6. The device according to any one of claims 1-4, wherein the first cyclic carbosilane unit is linked via Si— O— Si links to each of the at least two separate cyclic carbosilane units.

7. The device according to any one of claims 1-4, wherein the cyclic carbosilane units are essentially free of Si— O-Et groups.

8. The device according to any one of claims 1-4, wherein essentially all of the cyclic carbosilane units are capped with Si— H groups or Si— H₂ groups.

9. The device according to any one of claim 1-4, wherein the cyclic carbosilane units are essentially free of Si— H groups.

10. The device according to any one of claims 1-4, wherein the cyclic carbosilane units are capped with Si— O-Et or Si(OEt)₂ groups.

11. The device according to any one of claims 1-4, wherein the dielectric material comprises two or more structurally distinct cyclic carbosilane units.

12. The device according to any one of claims 1-4, wherein a porosity of the dielectric material is at or below a first value in a first portion of the dielectric material disposed within the plurality of openings and is between the first value and a second value, the second value being greater than the first value, in a second portion of the dielectric material disposed within the plurality of openings.

13. A device comprising: a structure comprising a plurality of openings; and a dielectric material disposed within the plurality of openings, the dielectric material comprising cross-linked cyclic carbosilane units having a ring structure including C and Si, wherein the cross-linked carbosilane units are capped with Si— H groups or Si— H₂ groups.

14. The device according to claim 13, wherein oxygen concentration in the dielectric material is at or below a first value in a first portion of the dielectric material disposed within the plurality of openings and is between the first value and a second value, the second value being greater than the first value, in a second portion of the dielectric material disposed within the plurality of openings.

15. The device according to claim 14, wherein the first portion is closer to a bottom of the plurality of openings than the second portion.

16. The device according to claim 13, wherein oxygen concentration in the dielectric material is at or below 15%, preferably at or below 20%, more preferably at or below 30%.

17. The device according to any one of claims 13-16, wherein the plurality of openings have aspect ratios of 1 or more, wherein an aspect ratio is a ratio of a depth of an opening to a width of the opening.

18. The device according to any one of claims 13-16, wherein the dielectric material exhibits a water uptake of less than or equal to 5.0%.

19. The device according to any one of claims 13-16, wherein the cyclic carbosilane units comprise 6 member rings including three carbon atoms and three silicon atoms.

20. A method of making a device comprising a structure with a plurality of openings filled with a carbosilane material, the method comprising: providing a cyclic carbosilane precursor onto the structure comprising the plurality of openings; heating the precursor provided on the structure to a temperature above a glass transition temperature of the precursor; and providing an excitation to cross-link the precursor into a solid carbosilane material within the plurality of openings.

21. The method according to claim 20, wherein the precursor comprises multiple 1,3,5-trisilacyclohexane rings where the rings are bonded to one another via an oxygen atom or/and a hydrogen atom.

22. The method according to claims 20 or 21, wherein heating the precursor provided on the structure to the temperature above the glass transition temperature of the precursor comprises heating the precursor to 125 degrees Celsius for 5 minutes.

23. The method according to claims 20 or 21, wherein providing the excitation to cross-link the precursor into the solid carbosilane material within the plurality of openings comprises baking the structure at 200 to 350 degrees Celsius for 5 to 60 minutes.

24. The method according to claims 20 or 21, further comprising curing the solid carbosilane material, wherein curing comprises heating the solid carbosilane material between 200-450 degrees Celsius while simultaneously exposing to optical radiation of 170- 254 nanometer wavelengths.

25. The method according to claims 20 or 21, further comprising curing the solid carbosilane material, wherein curing comprises heating the solid carbosilane material between 200-450 degrees Celsius and exposing the solid carbosilane material to electrons.