WO2019022715A1

WO2019022715A1 - Improved dielectric materials for semiconductor devices

Info

Publication number: WO2019022715A1
Application number: PCT/US2017/043685
Authority: WO
Inventors: James M. Blackwell; Tayseer MAHDI; Jeffery D. Bielefeld; Marie KRYSAK; Robert L. Bristol; John J. Plombon; Florian Gstrein
Original assignee: Intel Corporation
Priority date: 2017-07-25
Filing date: 2017-07-25
Publication date: 2019-01-31

Abstract

Disclosed herein are improved dielectric materials for semiconductor devices and methods of forming such dielectric materials. In one implementation, an integrated circuit includes a semiconductor substrate having features arranged above the semiconductor substrate. At least one of the features has a dielectric material in combination with at least one curing agent coated or deposited thereon. Following curing of the dielectric material and at least one curing agent, the density of a top portion of the dielectric film is within 10% of the density of a bottom portion of the dielectric film.

Description

IMPROVED DIELECTRIC MATERIALS FOR SEMICONDUCTOR DEVICES

Background

100011 Integrated circuits (IC) continue to shrink while performance and cost demands cause designers to create integrated circuits with an increasing number of devices per unit area. Semiconductor manufacturing processes are continually developed and employed to enable the manufacture of smaller and smaller features on an IC.

[0002 j Dielectric materials deposited within patterned features by spin-coating and flowable chemical vapor deposition (CVD) methods can suffer from low density and non- uniformity. Known methods to increase density and to reduce non-uniformity, do not lead to curing of the entire film throughout the patterned structure. For example, exposing the dielectric materials to ultraviolet (UV) light has a di sproportionate effect on the top portion of the film.

Brief Description of the Drawings

j 0003] The present disclosure described herein is illustrated by way of example and not by way of limitation in the accompanying figures. For simplicity and clarity of illustration, features i llustrated in the figures are not necessari ly drawn to scale. For example, the dimensions of some features may be exaggerated relative to other features for clarity.

Further, where considered appropriate, reference label s have been repeated among the figures to indicate corresponding or analogous elements.

[0004] FIG. I A illustrates a dielectric film as set forth in the prior art.

[0005] FIG. I B illustrates an exemplary dielectric film formed with a curing agent that has increased density and uniformity compared to conv entional dielectric fi lms.

[0006] FIG. 2 is a schematic view of various methods for contacting the dielectric material with curing agents.

100071 FIG. 3 is a flow diagram il lustrating a method for bottom -up pretreatment of a curing agent in a dielectric material according to an implementation of the disclosure.

[0008] FIG. 4 is a flow diagram illustrating a method for on -board inclusion of a curing agent in a dielectric material according to an implementation of the disclosure.

[0009] FIG. 5 i s a flow diagram illustrating a method for top-down infusion of a curing agent in a dielectric material according to an implementation of the disclosure.

[0010] FIG. 6 is a flow diagram illustrating a combined method of forming a dielectric material according to an i mpl ementation of the di sclosure. [0011] FIG. 7 is an interposer in accordance with one or more implementations of the di sclosure.

[0012] FIG. 8 i s a computing device built in accordance with one or more implementations of the disclosure.

Detailed Description

[0013] Described herein are methods of forming dielectric films by contacting dielectric materials with curing agents and systems incorporating such dielectric films. In the following description, various aspects of the illustrative implementations will be described using terms commonly employed by those skilled in the art to convey the substance of their work to others skilled in the art. Howev er, it will be apparent to those skilled in the art that the implementations of the present disclosure may be practiced with only some of the described aspects. For purposes of explanation, specific numbers, materials and configurations are set forth in order to provide a thorough understanding of the illustrative implementations.

However, it will be apparent to one skilled in the art that the implementations of the present disclosure may be practiced without the specific details. In other instances, well-known features are omitted or simplified in order not to obscure the illustrative implementations.

[0014] Various operations will be described as multiple discrete operations, in turn, in a manner that is most helpful in understanding the implementations; however, the order of description should not be construed to imply that these operations are necessarily order dependent. In particular, these operations need not be performed in the order of presentation.

[0015] The terms "over," "under,^" "between," and "on" as used herein refer to a relative position of one material layer or component with respect to other layers or components. For example, one layer di posed over or under another layer may be di rectly in contact with the other layer or may have one or more intervening layers. Moreover, one layer disposed between two layers may be directly in contact with the two layers or may have one or more intervening layers. In contrast, a first layer "on" a second layer is in direct contact with that second layer. Similarly, unless explicitly stated otherwise, one feature disposed between two features may be in direct contact with the adjacent features or may have one or more intervening layers.

[0016] Implementations of the disclosure may be formed or carried out on a substrate, such as a semiconductor substrate. In one implementation, the semiconductor substrate may be a crystalline substrate formed using a bulk silicon or a si 1 i con-on-i n sul ator substructure. In other implementations, the semiconductor substrate may be formed using alternate materials. which may or may not be combined with silicon, that include but are not limited to germanium, indium antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide, indium gallium arsenide, gallium antimonide, or other combinations of group 1 II-V, group IV materials, or group Ill-nitrides, such as gallium nitride (GaN). Although a few- examples of material s from which the semiconductor substrate may be formed are described here, any material that may serve as a foundation upon which a semiconductor device may be bui lt falls within the spirit and scope of the present disclosure.

[0017] A plurality of transistors, such as metal-oxide-semiconductor field-effect transistors (MOSFET or simply MOS transistors), may be fabricated on the semiconductor substrate. In various implementations of the disclosure, the MOS transistors may be planar transistors, nonplanar transistors, or a combination of both. Nonplanar transistors may include FinFET transistors such as double-gate transistors and tri -gate transistors, and wrap-around or all- around gate transistors such as nanoribbon and nanowire transistors. Although the implementations described herein may il lustrate only planar transistors, it should be noted that the implementations may also be carried out using nonplanar transistors.

[0018] Each MOS transistor includes a gate stack formed of at least two layers, a gate dielectric film and a gate electrode layer. The gate dielectric film may include one layer or a stack of layers. The one or more layers may include silicon oxide, silicon dioxide and/or a high-k dielectric material . The high-k dielectric material may include elements such as hafnium, silicon, oxygen, titanium, tantalum, lanthanum, aluminum, zirconium, barium, strontium, yttrium, lead, scandium, niobium, and zinc. Examples of high-k materials that may be used in the gate dielectric film include, but are not limited to, silicon nitride, silicon carbide, nitrogen doped silicon carbide, silicon nitride doped with carbon, si licon oxynitride and silicon oxycarbide, silicon oxide and metal oxides, oxynitrides, oxvcarbides and silicates such as hafnium oxide, zirconium oxide, titanium oxide, tantalum oxide, hafnium oxycarbide, tantalum oxynitride, aluminum oxide, aluminum oxynitride, lanthanum oxide, zirconium silicon oxide and titanium sil icon oxide.

[0019] In some implementations, an annealing process may be carried out on the gate dielectric film to improve its quality when a high-k material i s used.

100201 The gate electrode layer is formed on the gate dielectric film and may consist of at least one P-type workfunction metal or N-type workfunction metal, depending on whether the transistor is to be a PMOS or an NMOS transistor. In some implementations, the gate electrode layer may consi st of a stack of two or more metal layers, where one or more metal layers are work function metal layers and at least one metal layer is a fill metal layer. Further metal layers may be included for other purposes, such as a barrier layer.

[0021] For a PMOS transistor, metals that may be used for the gate electrode include, but are not limited to, ruthenium, palladium, platinum, cobalt, nickel, and conductive metal oxides, e.g., ruthenium oxide. A P-type metal layer will enable the formati on of a PMOS gate electrode with a workfunction that is between about 4.9 eV and about 5.2 eV. For an NMOS transistor, metal s that may be used for the gate electrode include, but are not limited to, hafnium, zirconium, titanium, tantalum, aluminum, alloys of these metals, and carbides of these metals such as hafnium carbide, zirconium carbide, titanium carbide, tantalum carbide, and aluminum carbide. An N-type metal layer wi ll enable the formation of an MOS gate electrode with a workfunction that is between about 3.9 eV and about 4 2 eV.

[0022 J In some implementations, a pair of sidewall spacers may be formed on opposing sides of the gate stack that bracket the gate stack. The sidewall spacers may be formed from a material such as silicon nitride (SiN), si licon oxide, silicon carbide ( SiC ), si licon nitride doped with carbon, and silicon oxynitride. Processes for forming sidewall spacers are known in the art and generally include deposition and etching. In an alternate implementation, a plurality of spacer pairs may be used, for instance, two pairs, three pai s, or four pai s of sidewall spacers may be formed on opposing sides of the gate stack.

[0023] In some implementations, source and drain regions are formed within the semiconductor substrate adjacent to the gate stack of each MOS transi stor. The source and drain regions are generally formed using either an i mpl antati on/di fYusi on process or an etching/deposition process. In the former process, dopants such as boron, aluminum, antimony, phosphorous, or arsenic may be ion-implanted into the semiconductor substrate to form the source and drain regions. An annealing process that activates the dopants and causes them to diffuse further into the semiconductor substrate typi cally follows the ion implantation process. In the latter process, the semiconductor substrate may first be etched to form recesses at the locations of the source and drain regions. An epitaxial deposition process may then be carried out to fill the recesses with material that i s used to fabricate the source and drain regions. In some implementations, the source and drain regions may be fabricated using a silicon alloy such as silicon germanium or silicon carbide. In some implementations, the epi taxi ally deposited silicon alloy may be doped in situ with dopants such as boron, arsenic, or phosphorous. In further implementations, the source and drain regions may be formed using one or more alternate semiconductor material s such as germanium or a group III-V material or alloy. In further implementations, one or more layers of metal and/or metal alloys may be used to form the source and drain regions.

[0024] One or more interlayer dielectrics (ILD) are deposited over the MOS transi stors. The ILD layers may be formed using dielectric materials known for their applicability in integrated circuit structures, such as low-k dielectric material s. Examples of dielectric materials that may be used include, but are not limited to, SiO;>, carbon doped oxide (CDO), SiN, organic polymers such as perfluorocyclobutane or pol y tetrafl uoroethy 1 ene, fluorosilicate glass (FSG), and organosilicates such as silsesquioxane, siloxane, or organosilicate glass. The ILD layers may include pores or air gaps to further reduce their dielectric constant.

[0025] Enhancing the quality of dielectric films coated or deposited within patterned features of semiconductor devices can lead to better electrical characteristics of the films. As patterned features become smaller, it becomes increasingly difficult to deposit the dielectric film within the features and to do so with a particular density and uniformity throughout. Dielectric films formed by spin-coating and flowable CVD methods are soft and have a low density. They may be den silled by exposing the films to UV light or annealing (collectiv ely referred to as "curing^"), but the top portion of the dielectric films, closest to the UV light or heat, may be disproportionately densified as compared to a bottom portion of the dielectric film . Following den si fi cation, the films may be polished with a chemical-mechanical polishing (CMP) slurry. In some implementations, the polished film is cured and polished again, and such sequence may be repeated as many times as needed or desired.

[0026] Figure 1A is a schematic view of a prior art structure 100 hav ing a dielectric film 108 exposed to UV light. The structure 100 includes a semiconductor substrate 102. On top of the semiconductor substrate may be a Si N material 104 that forms a feature 106, such as a trench. A dielectric film 108 fills and ov erlays the feature 106. As shown in Figure I A, the dielectric film 108 has a higher density of material 1 10 (represented by the circles, collectiv el ) near the top portion of the feature 106 than in the lower portions of the feature 106.

[0027] Figure IB is a schematic view of an exemplary structure 120 having a cured dielectric film 128 in accordance with implementations of the disclosure. The structure 120 includes a semiconductor substrate 122, which may be formed of any suitable material for fabricating a semiconductor device, such as those described abov e. In certain

implementations, the semiconductor substrate 1 22 may have one or more semiconductor dev ices formed thereon. [0028] On top of the semiconductor substrate may be a SiN material 124 that forms a feature 126, such as a trench. A dielectric film 128 fills and overlays the feature 126. The dielectric film 128 includes a curing agent (shown in FIG. 2) that may be applied (i) to the surface of the feature 126 prior to coating or deposition of the dielectric material; (ii) together with the dielectric material precursor gas during coating or deposition of the dielectric film 128; (iii) to the dielectric material following coating or deposition of the material; or (iv) any combination of (i), (ii) and (iii) in accordance with implementations of the di sclosure. In some implementations, the curing agent may be applied to the dielectric material following a CMP process. After depositing the curing agent and dielectric material, the dielectric film 128 may be cured, for example, at a temperature of up to 650°C for a period of about 1 min to about 24 h. As shown in Figure IB, the dielectric film 128 has a uniform density 130 (represented by the circles, collectively) throughout the depth of the film. The term "uniform density^" refers to a comparison of the density at or near the top of the film with the density at or near the bottom of the film and/or the density throughout the depth of the film . The density from top to bottom of the film can be measured and compared using any standard technique known to those of ordinary skill in the art, including, but not limited to, visual inspection of sample cross-sections, time of flight secondary ion mass spectrometry (TOF- SIMS), x-ray photoelectron spectroscopy (XPS), transmission electron microscopy with energy dispersive x-ray analysis (TEM EDX). In certain implementations, "unifonn density^" means that the density at or near the top of the film is within ± 10%, or ± 5%, or ± 2% of the density at or near the bottom of the film. A film that is not uniformly cured, will have different etch rates for the top of the film as compared to the bottom of the film and/or throughout the depth of the film .

[0029] Figure 2 is a schematic view of an exemplary structure 200 having a dielectric film 208 with at least one curing agent 209, 2 1 1 , 2 13 in accordance with implementations of the disclosure. The structure 200 includes a semiconductor substrate 202, which may be of any suitable material for fabricating a semiconductor device, such as those described above. In certain implementations, the semiconductor substrate 202 may have one or more

semiconductor devices formed thereon.

[0030] On top of the semiconductor substrate 202 may be a Si N material 204 that forms a feature 206, such as a trench. A dielectric film 208 fills and overlays the feature 206. The dielectric film 208 includes at least one curing agent 209, 2 1 1 , 2 1 3. In accordance with implementations of the di sclosure, curing agent 209 may be applied to the surface of feature 206 prior to coating or deposition of the dielectric material to form the dielectric film 208. Curing the dielectric film 208 following such pre-treatment with curing agent 209, may cause the dielectric film 208 to density from the "bottom -up,^" resulting in a more uniform density throughout dielectric film 208. The resulting dielectric film 208 may contain the curing agent 209 at a concentration of about 0. 1 wt% to about 10 wt%, or about 0.25 wt% to about 7.5 wt%, or about 0.5 wt% to about 5.0 wt% or at about 0.5 wt% to about 2.5 wt% or at about 0.25 wt%, 0.5 wt% or about 0.75 wt% or about 1 .0 wt% of the total weight of the dielectric film 208.

[0031] in accordance with implementations of the discl osure, curing agent 21 1 may be coated or deposited together with the dielectric material to form dielectric film 208. Curing agent 2 1 1 may be included with or supplied simultaneously with the dielectric material precursor gas. The curing agent 2 1 1 may be at a concentration of about 0. 1 wt% to about 10 wt%, or about 0.25 wt% to about 7.5 wt%, or about 0.5 wt% to about 5.0 wt% or at about 0.5 wt% to about 2.5 wt% or at about 0.25 wt%, 0.5 wt% or about 0.75 wt% or about 1.0 wt% of the total weight of the deposited film . In this inclusion or "on-board^" approach, curing agent 2 1 1 may be intermixed with the coated or deposited dielectric material as shown in Figure 2. Curing dielectric film 208 following the on-board approach can result in a uniform density of the film and an increased density as compared to a film that does not include a curing agent.

[0032] According to further implementations of the disclosure, after the dielectric material is deposited or coated, the dielectric material may be contacted with curing agent 2 13 to form the dielectric film 208. Curing agent 213 may be deposited prior to CMP of the dielectric material or following CMP of the dielectric material . Curing agent 213 may infuse into the dielectric material from the "top-down^" to form the dielectric fi lm 208. Curing dielectric film 208 following the infusion may cause the curing agent to enter the depth of the film and help density the film throughout.

[0033] In accordance with implementations of the di sclosure, the above-mentioned pre- treatment, on-board or top-down approaches can be used alone or in any combination in order to achieve a uniform density of the dielectric film throughout the feature. For example, curing agents 209, 21 1 and 213 may be the same or different and may be selected to obtain a particular density and uniformity throughout the film. In implementations, when a curing agent is added, the crossl inking may occur at room temperature, or an external stimuli, such as thermal energy or ultraviolet light, can be added to activate the curing agent and initiate the chemistry (e.g., crosslinking). [0034] Examples of materials that may be used to form the feature of structures 120 and 200 include, but are not limited to, SiN, silicon oxide, SiC, silicon nitride doped with carbon, silicon oxynitride and silicon oxycarbide. Examples of dielectric material s that may be used to form the dielectric film 1 28, 208 include, but are not limited to, silicon nitride, silicon carbide, nitrogen doped silicon carbide, si licon nitride doped with carbon, silicon oxynitride and silicon oxycarbide, silicon oxide and metal oxides, oxynitrides, oxy carbides and silicates such as hafnium oxide, zirconium oxide, titanium oxide, tantalum oxide, hafnium oxycarbide, tantalum oxynitride, aluminum oxide, aluminum oxynitride, lanthanum oxide, zirconium silicon oxide and titanium sil icon oxide.

[0035] Examples of curing agents that may be used include, but are not limited to, cross- linking agents, catalysts, initiators, chromophores and elements with a unique x-ray absorption cross-section as compared to the dielectric film. Exemplary cross-linking agents include, but are not limited to, amines and pol amines (e.g., for nitrogen-doped silicon carbide ), unsaturated hydrocarbons and unsaturated si lanes with carbon-carbon (C-C) double and triple bonds and silane for silicon carbide, metal alkoxides, carboxylates for metal oxides, amines and polyamines for silicon nitride and for nitrogen-doped silicon carbide. Films rich in carbon (C), nitrogen (N) and oxygen (O) can also have cross-li nking agents added to them (e.g., a SiC film rich in N as an amine based crosslinker). Exemplary catalysts include, but are not limited to, hydrosilation catalysts, dehydrogenative coupling catalysts and acidic condensation catalysts. Exemplary initiators include, but are not limited to, a hydrogen atom abstraction from silicon-hydrogen bonds and an addition to carbon-carbon double bonds or triple bonds. Exemplary chromophores, include, but are not limited to electron sources based on naphthalene, anthracene, biphenyl, pyrene, fluorine and combinations thereof. Exemplary elements include, but are not limited to, first, second and third row early and late transition metal s (e.g., Ti, Zr, Pt, Pd, Ir, Rh, Ru) and third group elements (e.g., B, Al). In

implementations, for a silicon containing dielectric material the curing agent may be a benzyl, naphthyl and anthracenyl si lane.

[0036] In implementations, the curing agent may be selected to have the same elements as in the dielectric material to maintain the electrical characteristics of the resulting dielectric film. For example, if a vinylsilane is used as a curing agent for a SiC film, then the electrical characteri sties of the resulting film, as compared to a SiC film without the curing agent, would be maintained across a broad range of curing agent concentrations. In another example, if a borane-containing compound is used as a curing agent for a SiC film, this curing agent may alter the electrical characteri sties of the dielectric material if present at a high concentration. In implementations, the concentration of the curing agents should be high enough to enable sufficient densifi cation of the dielectric film, but low enough so as not to alter the electrical characteristics of the resulting dielectric fi lm as compared to a dielectric film without a curing agent.

[0037] In implementations, the dielectric film may be formed using the infusion method where a silicon nitride dielectric material is deposited to fill and overlay feature 206 and subsequently contacted with ammonia as curing agent 213, which infuses into the dielectric material to form the dielectric film 208. Similarly, the deposited dielectric material may be a metal oxide dielectric material and curing agent 213 may be water. In implementations, feature 206 may be pretreated with a chlorosilane curing agent on which is deposited a silicon containing dielectric material to form dielectric fil m 208. In implementations, a carboxylic acid or hydrosilation or dehydrogenative coupling catalyst as curing agent 2 1 1 may be simultaneously deposited with a silicon-hydrogen containing dielectric material to form dielectric fi lm 208.

[0038] Figure 3 i s a flow diagram illustrating a method 300 for fabricating a device with an improved dielectric film according to an implementation of the di sclosure. Certain elements of the method 300 may be performed in a different order, simultaneously with other elements, or with additional intermediate elements, and certain elements may be omitted in some implementations, as would be appreciated by one of ordinary skill in the art.

[0039] The method 300 begins at block 310 by providing a semiconductor substrate with at least one feature arranged above the semiconductor substrate. The semiconductor substrate may include any material as described above. The feature may be a trench and may include any material as described above.

[0040] At block 320, a curing agent is deposited on a surface of the feature in accordance w ith the "pre-treatment^" approach as described above with respect to Figure 2 (pre-treatment

- bottom -up). The curing agent may be any curing agent as described above. Depositing the curing agent may include a technique such as grafting monolayers onto the surface, implanting molecules into the semiconductor substrate with an implanter, coating the surface w ith polymer films, molecular layer deposition and atomic layer deposition. Grafting monolayers onto the surface may include exposing the surface to a grafting agent. The grafting agent may include, but i s not limited to, a chlorosilane, an alkoxysilane, aminosilane, a si loxane and a silyl chl oride. Grafting monolayers onto the surface may also include, but is not limited to, spin-coating the curing agent or vapor phase deliv ery of reactive molecules.

The reactive molecules may include, but are not l imited to, ca bosi lanes and aminosilanes. [0041] At block 330, a dielectric film is coated or deposited onto the curing agent. The dielectric material may be any material as described above. The dielectric film may be deposited by any suitable technique including, but not limited to, spin-coating and f!owable chemical vapor deposition.

10042] At block 340, the dielectric film coated or deposited on the curing agent is cured by exposing the dielectric film to one or more technique including, but not limited to, UV light and heat. In implementations, the dielectric fi lm may be annealed at a temperature of up to 650°C, or from 200°C - 650°C, or from 250°C to 350°C. In implementations, the temperature may begin at room temperature and gradually increase to 200°C followed by a gradual increase to 650°C. Curing the diel ectric film may uniformly densify the material throughout the layer. For example, the density of the material near the top of the dielectric film may be within ± 10%, or ± 5% or ± 2% of the density near the bottom of the dielectric fi lm. When the dielectric material in the dielectric film is SiC, the cured dielectric film may have a density of about 2.5 g/cm³ to about 5.0 g/cm ^> or about 3.0 g/cm³ to about 4.0 g/cnv , or about 3.2 g/cm³.

[0043] Figure 4 i s a flow diagram il lustrating a method 400 for fabricating a device with an improved dielectric film according to an implementation of the di sclosure. Certain elements of the method 400 may be performed in a different order, simultaneously with other elements, or with additional intermediate elements, and certain elements may be omitted in some implementations, as would be appreciated by one of ordinary skill in the art.

[0044] The method 400 begins at block 410 by providing a semiconductor substrate with at least one feature arranged above the semiconductor substrate. The semiconductor substrate may include any material as described above. The feature may be a trench and may include any material as described above.

[0045] At block 430, a dielectri c film i s coated or deposited onto the at least one feature together with a curing agent to form an "Όη-board^" layer as described above. The dielectric material may include any material as described above and the curing agent may include any material as described above. The dielectric film and curing agent may be deposited by any suitable technique including, but not limited to, spin -coating and flowab!e chemical vapor deposition. In an implementation, a precursor gas of the dielectric material is mixed with a precursor of the curing agent and the surface of at least one feature is exposed to the gas mixture. The gas mixture is coated or deposited onto at least one feature, for example, as shown in Figure 2 (inclusion - on -board). In another implementation, a precursor of the dielectric material and a precursor of the curing agent are alternately coated or deposited onto at least one feature.

100461 At block 440, the dielectric film with the curing agent on-board is cured by exposing the layer to one or more technique including, but not limited to, UV light and heat. In implementations, the dielectric film may be annealed at a temperature of up to 650°C, or from 200°C - 650°C, or from 250°C to 350°C. In implementations, the temperature may begin at room temperature and gradually increase to 200°C followed by a gradual increase to 650°C. Curing the dielectric film may uniformly density the material throughout the layer. For example, the density of the material near the top of the dielectric film may be within ±10%, or ±5% or ±2% of the density near the bottom of the dielectric film.

[0047] Figure 5 is a flow diagram illustrating a method 500 for fabricating a device with an improved dielectric film according to an implementation of the disclosure. Certain elements of the method 500 may be performed in a different order, simultaneously with other elements, or with additional intermediate elements, and certain elements may be omitted in some implementations, as would be appreciated by one of ordinary skill in the art.

[0048] The method 500 begins at block 5 10 by providing a semiconductor substrate with at least one feature arranged above the semiconductor substrate. The semiconductor substrate may include any material as described above. The feature may be a trench and may include any material as described above.

[0049] At block 530, a dielectric film is coated or deposited onto the at least one feature. The dielectric material may include any material as described above. The dielectric film may be coated or deposited by any suitable technique including, but not limited to, spin -coating and flowable chemical vapor deposition.

[0050] At block 535, the dielectric film is contacted with a curing agent. The curing agent may include any material as described above. In an implementation, the curing agent may penetrate or infuse into the dielectric film in a top-down approach as shown in Figure 2. In an implementation, infusion from the top-down can occur using spin-on materials where the active chemical diffuses into the dielectric film below. Examples of active chemicals include, but are not limited to, acid catalysts, a vinyl crosslinker, an alkyne cross! inker, hydrosi lanes and carboxylic acids. In another implementation, infusion from the top-down can occur using volatile molecular weight species designed to react with certain chemical functionality within the dielectric film. Examples include, but are not limited to, acetylene, water, ozone, oxygen, ammonia, ethylene, silane and hydrazine. [0051] At block 540, the dielectric film infused with the curing agent is cured by exposing the layer to one or more technique including, but not limited to, UV light and heat. In implementations, the dielectric film may be annealed at a temperature of up to 650°C, or from 200°C - 650°C, or from 250°C to 350°C. In implementations, the temperature may begin at room temperature and gradually increase to 200°C followed by a gradual increase to 650°C. Curing the dielectric film may uniformly density the material throughout the layer. For example, the density of the material near the top of the dielectric film may be within ±10%, or ±5% or ±2% of the density near the bottom of the dielectric film.

[0052] Figure 6 is a flow diagram illustrating a method 600 for fabricating a device with an improved dielectric film according to an implementation of the disclosure. Method 600 may be a combination of the methods set forth in Figures 3, 4 nd 5. Certain elements of method 600 may be performed in a different order, simultaneously with other elements, or with additional intermediate elements, and certain elements may be omitted in some

implementations, as would be appreciated by one of ordinary skill in the art.

[0053] The method 600 begins at block 610 by providing a semiconductor substrate with at least one feature arranged above the semiconductor substrate. The semiconductor substrate may include any material as described above. The feature may be a trench and may include any material as described above.

[0054] At block 620, a first curing agent is deposited on a surface of the feature in accordance with the "pre-treatment" approach as described above (see, e.g., Figure 2 - p re- treatment - bottom-up). The first curing agent may be any curing agent as described above. Depositing the first curing agent may include a technique such as grafting monolayers onto the surface, implanting molecules into the semiconductor substrate with an implanter, coating the surface with polymer films, molecular layer deposition and atomic layer deposition. Grafting monolayers onto the surface may include exposing the surface to a grafting agent. The grafting agent may include, but is not limited to, a chlorosilane, an alkoxysilane, aminosilane, a siloxane and a silyl chloride. Grafting monolayers onto the surface may also include, but is not limited to, spin-coating the curing agent or vapor phase delivery of reactive molecules. The reactive molecules may include, but are not limited to, carbosi lanes and aminosilanes.

[0055] At block 630, a dielectric film is coated or deposited onto the at least one feature together with a second curing agent to form an "on-board" layer as described above. The dielectric material may include any material as described above and the curing agent may include any material as described above. The second curing agent may be the same as the first curing agent or the first and second curing agents may be different. The dielectric film and second curing agent may be deposited by any suitable technique including, but not limited to, spin-coating and flow able chemical vapor deposition. In an implementation, a precursor gas of the dielectric material is mixed with a precursor of the second curing agent and the surface of the at least one feature is exposed to the gas mixture. The gas mixture is coated or deposited onto the at least one feature, for example, as shown in Figure 2

(inclusion - on-board). In another implementation, a precursor of the dielectric material and a precursor of the second curing agent are alternately coated or deposited onto the at least one feature.

[0056] At block 635, the dielectric film is optionally contacted with a third curing agent. The third curing agent may include any material as described above. The third curing agent may be the same as the first and second curing agent, or the third curing agent may be different from one or both of the first curing agent and the second curing agent. In an implementation, the third curing agent may penetrate or infuse into the dielectric film in a top-down approach as shown in Figure 2. In an i mplementation, infusion from the top-down can occur using spin-on materials as the third curing agent where the active chemical diffuses into the dielectric film below. Examples of active chemicals include, but are not limited to, acid catalysts, vinyl and alkyne crossl inkers, hydrosi lanes and carboxylic acids. In another implementation, infusion of the third curing agent from the top-down can occur using volatile species designed to react with certain chemical functionality within the dielectric film.

Examples include, but are not limited to, acetylene, water, ozone, oxygen, ammonia, si lane, ethylene and hydrazine.

[0057] At block 640, the dielectric film and first, second and optionally third curing agents are cured by exposing them to one or more technique including, but not limited to, UV light and heat. In implementations, the dielectric film and curing agents may be annealed at a temperature of up to 650°C, or from 200°C - 650°C, or from 250°C to 350°C. In

implementations, the temperature may begin at room temperature and gradually increase to 200°C followed by a gradual increase to 650°C. Curing the dielectric film may uniformly density the material throughout the layer. Curing the dielectric fil m and curing agents may uniformly densify the material throughout the layer. For example, the density of the material near the top of the layer may be within ±10%, or ±5% or ±2% of the density near the bottom of the dielectric film. [0058] Figure 7 illustrates an interposer 700 for use with one or more implementations of the di sclosure. The interposer 700 is an intervening substrate used to bridge a first substrate 702 to a second substrate 704. The first substrate 702 may be, for instance, an integrated circuit die. The second substrate 704 may be, for instance, a memory module, a computer motherboard, or another i ntegrated circuit die. Generally, the purpose of an interposer 700 is to spread a connection to a wider pitch or to reroute a connection to a different connection. For example, an interposer 700 may couple an integrated circuit die to a ball grid array (BGA ) 706 that can subsequently be coupled to the second substrate 704. In some implementations, the first and second substrates 702/704 are attached to opposing sides of the interposer 700. In other implementations, the first and second substrates 702/704 are attached to the same side of the interposer 700. And in further implementations, three or more substrates are interconnected by way of the interposer 700.

[0059] The interposer 700 may be formed of an epoxy resin, a fi bergl a ss-rei n forced epoxy resin, a ceramic material , or a polymer material such as polyimide. In further

implementations, the interposer may be formed of alternate rigid or flexible materials that may include the same materials described above for use in a semiconductor substrate, such as silicon, germanium, and other group III-V and group IV materials.

[0060] The interposer may include metal interconnects 708 and vias 710, including but not limited to through-silicon vias ( TSVs) 6 12. The interposer 700 may further include embedded devi ces 7 14, including both passive and active devices. Such devices include, but are not limited to, capacitors, decoupling capacitors, resistors, inductors, fuses, diodes, transformers, sensors, and electrostatic discharge (ESD) devices. More complex devices such as radio-frequency (RF) devices, power amplifiers, power management devices, antennas, arrays, sensors, and MEMS devices may also be formed on the interposer 700.

[0061] In accordance with implementations of the disclosure, apparatuses or processes disclosed herein may be used in the fabrication of the interposer 700, and/or may be interfaced directly with the interposer 700.

[0062] Figure 8 illustrates a computing dev ice 800 built in accordance with

implementations of the di sclosure. The computing device 800 may include a number of components. In one implementation, these components are attached to one or more motherboards. In an alternate implementation, some or all of these components are fabricated onto a single system-on-a-chip (SoC) die, such as an SoC used for mobi le devices.

The components in the computing device 800 include, but are not limited to, an integrated circuit die 802 and at least one communications logic unit 808. In some implementations the communications logic unit 808 is fabricated within the integrated circuit die 802 while in other implementations the communications logic unit 808 is fabricated in a separate integrated circuit chip that may be bonded to a substrate or motherboard that is shared with or electronically coupled to the integrated circuit die 802. The integrated circuit die 802 may include a CPU 804 as well as on-die memory 806, often used as cache memory, that can be provided by technologies such as embedded DRAM (eDRAJVl), SRAM, or spin-transfer torque memory (STT-MRAM ). It may be noted that, in certain implementations, the integrated circuit die 802 may include fewer elements (e.g., without the processor 804 and/or on-die memory 806) or additional elements other than the processor 804 and on-die memory 806. hi one implementation, the integrated circuit die 802 may include one or more components produced using any implementations of pattern replication described herein. For example, one or more components of the integrated circuit die 802 may utilize a metal grating layer having variable pitches. In one implementation, the integrated circuit die 802 may be a part of an LED-based display device with multiple LED arrays and a thin film transistor (TFT) backplane, with or without the processor 804 and/or on-die memory 806. In another example, the integrated circuit die 802 may include some or all the elements described herein, as well as include additional elements.

[0063] Computing device 800 may include other components that may or may not be physically and electrically coupled to the motherboard or fabricated within an SoC die.

These other components include, but are not limited to, volatile memory 810 (e.g., DRAM), non-volatile memory 8 12 (e.g., ROM or flash memory), a graphics processing unit 8 14

(GPU), a digital signal processor 816, a crypto processor 842 (e.g., a specialized processor that executes cryptographic algorithms within hardware), a chipset 820, at least one antenna

822 (in some implementations two or more antenna may be used), a display or a touchscreen display 824, a touchscreen controller 826, a battery 830 or other power source, a power amplifier (not shown), a voltage regulator (not shown), a global positioning system (GPS) device 828 (which may further include a compass), a motion coprocessor or sensors 832 (that may include an accelerometer, a gyroscope, and a compass), a microphone (not shown), a speaker 834, a camera 836, user input devices 838 (such as a keyboard, mouse, stylus, and touchpad), and a mass storage device 840 (such as hard disk drive, compact disk (CD), digital versatile disk (DVD), and so forth). The computing device 800 may incorporate further transmission, telecommunication, or radio functionality not already described herein. In some implementations, the computing device 800 includes a radio that is used to communicate over a distance by modulating and radiating electromagnetic waves in air or space. In further implementations, the computing device 800 includes a transmitter and a receiver (or a transceiver) that is used to communicate over a distance by modulating and

radiating electromagnetic waves in ai or space.

[0064] The communications logic unit 808 enables wireless communications for the transfer of data to and from the computing device 800. The term "wireless" and its deriv atives may be used to describe circuits, devices, systems, methods, techniques, communications channels, etc., that may communicate data through the use of modulated electromagnetic radiation through a n on -sol id medium . The term does not imply that the associated devices do not contain any wires, although in some implementati ons they might not. The communications logic unit 808 may implement any of a number of wireless standards or protocols, including but not limited to Wi-Fi (IEEE 802. 1 1 family), YVi MAX ( IEEE 802. 16 family), IEEE 802.20, long term evolution (LTE), Ev-DO, HSPA+, HSDPA+, HSUPA÷ EDGE. GSM, GPRS, CDMA, TDM A, DECT, Infrared ( IR), Near Field

Communication (NFC), Bluetooth, derivatives thereof, as well as any other wireless protocols that are designated as G, 4G, 5G, and beyond. The computing dev ice 800 may include a plurality of communicati ons logic units 808. For instance, a first communications logic unit 808 may be dedicated to shorter range wireless communications such as Wi-Fi, NFC, and Bluetooth and a second communications logic unit 808 may be dedicated to longer range wireless communications such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO, and others.

[0065] The processor 804 of the computing device 800 includes one or more devices, such as transi stors, metal interconnects, or LEDs, formed in accordance w ith implementations of the disclosure. The term "processor^" may refer to any dev ice or portion of a device that processes electronic data from regi sters and/or memory to transform that electronic data into other electronic data that may be stored in registers and/or memory.

[0066] The communications logic unit 808 may also include one or more devices, such as transistors, metal interconnects, or LEDs, formed i n accordance with implementati ons of the disclosure.

[0067] In further implementations, another component housed within the computing device 800 may contain one or more devices, such as transistors, metal interconnects, or LEDs, formed in accordance with implementations of the disclosure.

[0068] In various implementations, the computing dev ice 800 may be a laptop computer, a netbook computer, a notebook computer, an ultrabook. computer, a smartphone, a

dumbphone, a tablet, a tablet/laptop hybrid, a personal digital assistant ( PDA ), an ultra mobile PC, a mobile phone, a desktop computer, a server, a printer, a scanner, a monitor, a set-top box, an entertainment control unit, a digital camera, a portable music player, or a digital video recorder. In further implementations, the computing device 800 may be any other electronic device that processes data.

[0069] The following di scussion provides a variety of exemplary implementations.

Implementations of the disclosure include an integrated circuit comprising: a semiconductor substrate; a plurality of features above the semiconductor substrate; and a dielectric film on a surface of at least one of the plurality of features, wherein the dielectric film comprises a curing agent.

[0070] Additional implementations include an integrated circuit, wherein a density of a top portion of the dielectric film is within ±10% of a density of a bottom portion of the dielectric film.

[0071] Further implementations include an integrated circuit, wherein a density of a top portion of the dielectric film is within ±5% of a density of a bottom portion of the dielectric film.

[0072] Additional implementations include an integrated circuit, wherein a density of a top portion of the dielectric film is within ±2% of a density of a bottom portion of the dielectric film .

[0073] Further implementations include an integrated circuit, wherein the dielectric film comprises a material selected from a group consisting of silicon nitride, silicon carbide, nitrogen doped silicon carbide, silicon nitride doped with carbon, silicon oxynitride and silicon oxycarbide, sil icon oxide and metal oxides, oxynitrides, oxycarbides and silicates such as hafnium oxide, zirconium oxide, titanium oxide, tantalum oxide, hafnium oxycarbide, tantalum oxynitride, aluminum oxide, aluminum oxynitride, lanthanum oxide, zirconium silicon oxide and titanium silicon oxide.

[0074] Additional implementations include an integrated circuit, wherein the dielectric film compri ses a silicon nitride dielectric material and ammonia as a curing agent, or a metal oxide dielectric material and water as a curing agent, or a silicon containing dielectric material and a chlorosi lane curing agent, or a silicon-hydrogen containing dielectric material and a carboxylic acid or hydrosilation or dehydrogenative coupling catalyst.

[0075] Further implementations include an integrated circuit, wherein the curing agent comprises a material selected from a group consisting of a cross-linking agent, a catalyst, an initiator, a chromophore and an element with a unique x-ray absorption cross-section in relation to a dielectric material of the dielectric film. [0076] Additional implementations include an integrated circuit, wherein the cross-linking agent comprises a material selected from a group consisting of a vinyl si lane for silicon carbide, a metal alkoxide, a carboxylate for metal oxide, an amine and polyamine for silicon nitride and an amine and polyamine for nitrogen-doped silicon carbide.

[0077] Further implementations include an integrated circuit, wherein the catalyst comprises a material selected from a group consisting of a hydrosilation catalyst,

dehydrogenas e coupling catalyst and an acidic condensation catalyst.

[0078] Additional implementations include an integrated circuit, wherein the initiator compri ses a material selected from a group consisting of a hydrogen atom abstraction from silicon-hydrogen bonds and an addition to carbon-carbon double bonds or carbon-carbon- triple bonds.

[0079] Further implementations include an integrated circuit, wherein the chromophore comprises an electron source based on naphthalene, anthracene, biphenyl, pyrene, fluorine and combinations thereof.

[0080] Implementations of the disclosure include a computing device comprising: an integrated circuit die comprising: a semiconductor substrate; a plurality of features above the semiconductor substrate; and a dielectric film on a surface of at least one of the plurality of features, wherein the dielectric film comprises a curing agent.

[0081 ] Additional implementations include a computing device, wherein a density of a top portion of the dielectric film is within ±10% of a density of a bottom portion of the dielectric film.

[0082] Further implementations include a computing device, wherein a density of a top portion of the dielectric film is within ±5% of a density of a bottom portion of the dielectric film.

[0083] Additional implementations include a computing dev ice, wherein a density of a top portion of the dielectric film is within ±2% of a density of a bottom portion of the dielectric film.

[0084] Further implementations include a computing device, wherein the dielectric film comprises a material selected from a group consisting of silicon nitride, silicon carbide, nitrogen doped silicon carbide, silicon nitride doped with carbon, silicon oxynitride and silicon oxycarbide, silicon oxide and metal oxides, oxynitrides, oxy carbides and silicates such as hafnium oxide, zirconium oxide, titanium oxide, tantalum oxide, hafnium oxycarbide, tantalum oxynitride, aluminum oxide, aluminum oxynitride, lanthanum oxide, zirconium silicon oxide and titanium silicon oxide. [0085] Additional implementations include a computing device, wherein the dielectric film comprises a silicon containing dielectric material and a benzyl, naphthyl and anthracenyl silane as curing agent.

[0086] Further implementations include a computing device, wherein the curing agent comprises a material selected from a group consisting of a cross-linking agent, a catalyst, an initiator, a chromophore and an element with a unique x-ray absorption cross-section as compared to a dielectric material of the dielectric film .

[0087] Additional implementations include a computing device, wherein the cross-linking agent comprises a material selected from a group consi sting of a vinyl si lane for silicon carbide, a metal alkoxide, a carboxylate for metal oxide, an amine and polyamine for silicon nitride and an amine or polyamine for nitrogen-doped silicon carbide.

[0088] Further implementations include a computing device, wherein the catalyst comprises a material selected from a group consisting of a hydrosi!ation catalyst, dehydrogenative coupling catalyst and an acidic condensation catalyst.

[0089] Additional implementations include a computing device, wherein the initiator comprises a material selected from a group consisting of a hydrogen atom abstraction from silicon-hydrogen bonds and an addition to carbon-carbon double bonds or carbon-carbon triple bonds.

[0090] Further implementations include a computing device, wherein the chromophore comprises an electron source based on naphthal ene, anthracene, biphenyl, pyrene, fluorine and combinations thereof.

[0091 ] Implementations of the disclosure include a method of forming a dielectric film, compri sing: providing a semiconductor substrate compri sing a plurality of features arranged above the semiconductor substrate; depositing a curing agent on a surface of at least one of the plurality of features; depositing a dielectric material on the curing agent; and curing the dielectric material to form the dielectric film .

[0092] Further implementations include a method of forming a dielectric film, wherein a density of a top portion of the dielectric film is within ±10% of a density of a bottom portion of the dielectric film.

[0093] Further implementations include a method of forming a dielectric film, wherein a density of a top portion of the dielectric film is w ithin ±5% of a density of a bottom portion of the dielectric fi lm . 10094] Additional implementations include a method of forming a dielectric film, wherein a density of a top portion of the dielectric film is within ±2% of a density of a bottom portion of the dielectric film.

[0095] Further implementations include a method of forming a dielectric film, wherein depositing the curing agent comprises grafting monolayers onto the surface.

[0096] Additional implementations include a method of forming a dielectric film, wherein grafting monolayers onto the surface compri ses exposing the surface to a grafting agent.

[0097] Further implementations include a method of forming a dielectric film, wherein the grafting agent is selected from a group consisting of a chlorosilane, an alkoxysilane, aminosilane, a carbosilane, siloxane and a silyl chloride.

[0098] Additional impl ementations include a method of forming a dielectric film, wherein grafting monolayers onto the surface comprises spin- coating or vapor phase delivery of reactive molecules.

[0099] Further implementations include a method of forming a dielectric fi lm, wherein the reactive molecules comprise aminosilanes.

[0100] Additional impl ementations include a method of forming a dielectric fi lm, wherein depositing the curing agent comprises a technique selected from a group consisting of implanting molecules into the semiconductor substrate, coating the surface w ith polymer films, molecular layer deposition and atomic layer deposition.

[0101] Further implementations include a method of forming a dielectric film, wherein the curing agent comprises a material selected from a group consisting of a cross-linking agent, a catalyst, an initiator, a chromophore and an element with a unique x-ray absorption cross- section as compared to the dielectric material .

[0102] Additional implementations include a method of forming a dielectric film, wherein the cross-linking agent compri ses a material selected from a group consisting of a vinyl si lane for silicon carbide, a metal alkoxide, a carboxylate for metal oxide, an amine or polyamine for silicon nitride and an amine or polyamine for nitrogen-doped silicon carbide.

[0103] Further implementations include a method of forming a dielectric film, wherein the catalyst comprises a material selected from a group con si sting of a hydrosilation catalyst, dehydrogenative coupling catalyst and an acidic condensation catalyst.

[0104] Additional implementations include a method of forming a diel ectric film, wherein the initiator comprises a material selected from a group consisti ng of a hydrogen atom abstraction from silicon-hydrogen bonds and an addition to carbon-carbon double bonds or carbon-carbon triple bonds. [0105] Further implementations include a method of forming a dielectric film, wherein the chromophore comprises an electron source based on naphthalene, anthracene, biphenyl, pyrene, fluorine and combinations thereof.

[0106] Additional implementations include a method of forming a diel ectric film, wherein depositing the dielectric fi lm comprises depositing a material selected from a group consisting of silicon nitride, silicon carbide, nitrogen doped silicon carbide, silicon nitride doped with carbon, silicon oxynitride and silicon oxycarbide, si licon oxide and metal oxides, oxynitrides, oxycarbides and silicates such as hafnium oxide, zirconium oxide, titanium oxide, tantalum oxide, hafnium oxycarbide, tantalum oxynitride, aluminum oxide, aluminum oxynitride, lanthanum oxide, zirconium silicon oxide and titanium silicon oxide.

101071 Further implementations include a method of forming a dielectric film, wherein curing the dielectric film comprises exposing the dielectric material deposited on the curing agent to heat at a temperature up to 650°C for a period of about 1 min to about 24 h.

[0108] Implementations of the disclosure include a method of forming a dielectric film, comprising: providing a semiconductor substrate comprising a plurality of features arranged above the semiconductor substrate; depositing a mixture of a dielectric material and a curing agent on a surface of at least one feature to form the dielectric film; and curing the dielectric film.

[0109] Additional implementations include a method of forming a dielectric film, wherein a density of a top portion of the cured dielectric film is within ±10% of a density of a bottom portion of the cured dielectric film .

[0110] Further implementations include a method of forming a dielectric film, wherein a density of a top portion of the dielectric film i s within ±5% of a density of a bottom portion of the dielectric film.

[0111] Additional implementations include a method of forming a diel ectric film, wherein a density of a top portion of the dielectric film is within ±2% of a density of a bottom portion of the dielectri film.

[0112] Further implementations include a method of forming a dielectric film, wherein depositing the dielectric film comprises exposing the surface to a dielectric material precursor gas compri sing a curing agent.

[0113] Additional implementations include a method of forming a dielectric film, wherein the curing agent comprises a material selected from a group con si sting of a cross-linking agent, a catalyst, an initiator, a chromophore and an element with a unique x-ray absorption cross-section as compared to the dielectric material .

[0114] Further implementations include a method of forming a dielectric film, wherein the cross-linking agent comprises a material selected from a group consi sting of a vinyl si lane for silicon carbide, a metal alk oxide, a carboxylate for metal oxide, an amine or polyamine for silicon nitride and an amine or polyamine for nitrogen-doped silicon carbide.

[0115] Additional impl ementations include a method of forming a dielectric fi lm, wherein the catal st compri ses a material selected from a group consisting of a hydrosilation catalyst, dehydrogenative coupling catalyst and an acidic condensation catalyst.

[0116] Further implementations include a method of forming a dielectric film, wherein the initiator compri ses a material selected from a group consisting of a hydrogen atom

abstraction from silicon-hydrogen bonds and an addition to carbon-carbon double bonds or carbon-carbon triple bonds.

{01 1 7] Additional implementations include a method of forming a dielectric film, wherein the chromophore comprises an electron source based on naphthalene, anthracene, biphenyl, pyrene, fluorine and combinations thereof.

[0118] Further implementations include a method of forming a dielectric film, wherein depositing the dielectric film comprises depositing a material selected from a group consisting of silicon nitride, silicon carbide, nitrogen doped silicon carbide, silicon nitride doped with carbon, silicon oxynitride and silicon oxycarbide, silicon oxide and metal oxides, oxynitrides, oxycarbides and silicates such as hafnium oxide, zirconium oxide, titanium oxide, tantalum oxide, hafnium oxycarbide, tantalum oxynitride, aluminum oxide, aluminum oxynitride, lanthanum oxide, zirconium silicon oxide and titanium si licon oxide.

[0119] Additional implementations include a method of forming a dielectric film, wherein curing the dielectric film compri ses exposing the dielectric film deposited on the curing agent to heat at a temperature up to 650°C for a period of about 1 min to about 24 h.

[01 20] Further implementations include a method of forming a dielectri film, further comprising:before the curing, contacting the dielectric film with a curing agent that penetrates into the dielectric film.

[0121] Additional implementations include a method of forming a diel ectric film, wherein contacting the dielectric film comprises spin-coating the curing agent onto the dielectric film.

[0122] Further implementations include a method of forming a dielectric film, wherein the curing agent diffuses into the dielectric fi lm. [0123] Additional implementations include a method of forming a dielectric film, wherein the curing agent is selected from a group consisting of an acid catalyst, a vinyl cross! inker, an alkyne crosslinker, a hydrosilane, a carboxylic acid, acetylene, water, ozone, oxygen, ammonia, ethylene and hydrazine.

[0124] The above descri tion of illustrated implementations of the disclosure, including what is described in the Abstract, is not intended to be exhaustive or to limit the

implementations to the precise forms disclosed. While specific implementations of, and examples for, the implementations are described herein for illustrative purposes, various equivalent modifications are possible within the scope of the disclosure, as those skilled in the relevant art will recognize.

Claims

Claims What is claimed is:

1. An integrated circuit comprising:

a semiconductor substrate;

a plurality of features above the semiconductor substrate; and

a dielectric film on a surface of at least one of the plurality of features, wherein the dielectric film compri ses a curing agent.

2. A computing device comprising:

an integrated circuit die compri sing:

a semiconductor substrate;

a plurality of features above the semiconductor substrate; and a dielectric film on a surface of at least one of the plurality of features, herein the diel ectric film comprises a curing agent.

3. The computing device of claim 1 or claim 2, wherein a density of a top portion of the dielectric fi lm is w ithin ±10% of a density of a bottom portion of the dielectric film .

4. The computing device of claim 1 or claim 2, wherein the dielectric film compri ses a material selected from a group consisting of silicon nitride, silicon carbide, nitrogen doped silicon carbide, silicon nitride doped with carbon, silicon oxvnitride and silicon oxvcarbide, silicon oxide and metal oxides, oxynitrides, oxycarbides and silicates such as hafnium oxide, zirconium oxide, titanium oxide, tantalum oxide, hafnium oxvcarbide, tantalum oxynitride, aluminum oxide, aluminum oxynitride, lanthanum oxide, zirconium silicon oxide and titanium silicon oxide.

5. The computing device of claim 1 or claim 2 wherein the dielectric film comprises a silicon containing dielectric material and a benzyl, naphthyl and anthracenyl si lane as curing agent.

6. A method of forming a dielectric film, comprising:

providing a semiconductor substrate comprising a plurality of features arranged above the semiconductor substrate; depositing a curing agent on a surface of at least one of the plurality of features; depositing a dielectric material on the curing agent; and

curing the dielectric material to form the dielectric film.

7. The method of claim 6, wherein depositing the curing agent comprises grafting monolayers onto the surface.

8. The method of claim 7, wherein grafting monolayers onto the surface comprises exposing the surface to a grafting agent.

9. The method of claim 8, wherein the grafting agent i s selected from a group consi sting of a chiorosilane, an aikoxysilane, aminosilane, a carbosilane, siloxane and a silyl chloride.

10. The method of claim 7, wherein grafting monolayers onto the surface compri ses spin- coating or vapor phase delivery of reactive molecules.

1 1 . The method of claim 10, wherein the reactive molecules comprise aminosilanes.

12. The method of claim 6, wherein depositing the curing agent comprises a technique selected from a group consi sting of implanting molecules into the semiconductor substrate, coating the surface with polymer films, molecular layer deposition and atomic layer deposition.

13. A method of forming a dielectric film, comprising:

providing a semiconductor substrate comprising a plurality of features arranged above the semiconductor substrate;

depositing a mixture of a dielectric material and a curing agent on a surface of at least one feature to form the dielectric film; and

curing the dielectric fi lm .

14. The method of claim 6 or claim 13, wherein a density of a top portion of the cured dielectric fi lm is w ithin ±10% of a density of a bottom portion of the cured dielectric film.

15. The method of claim 6 or claim 13, wherein a density of a top portion of the dielectric film is within ±5% of a density of a bottom portion of the dielectric film.

16. The method of claim 6 or claim 13, wherein a density of a top portion of the dielectric film is within ±2% of a density of a bottom portion of the dielectric film .

17. The method of claim 1 3, wherein depositing the dielectric fi lm compri ses exposing the surface to a dielectric material precursor gas comprising a curing agent.

18. The method of claim 6 or claim 13, wherein the curing agent comprises a material selected from a group consi sting of a cross-linking agent, a catalyst, an initiator, a

chromophore and an element with a unique x-ray absorption cross-section as compared to the dielectric material .

19. The method of claim 1 8, herein the cross-linking agent comprises a material selected from a group consi sting of a vinylsilane for silicon carbide, a metal alkoxide, a carboxylate for metal oxide, an amine or polyamine for silicon nitride and an amine or polyamine for nitrogen-doped silicon carbide.

20. The method of claim 18, wherein the catalyst comprises a material selected from a group consisting of a hydrosilation catalyst, dehydrogenative coupling catalyst and an acidic condensation catalyst.

2 1 . The method of claim 1 8, wherein the initiator comprises a material selected from a group consisting of a hydrogen atom abstraction from silicon -hydrogen bonds and an addition to carbon-carbon double bonds or carbon-carbon triple bonds.

22. The method of claim 1 8, wherein the chromophore comprises an electron source based on naphthalene, anthracene, bi phenyl , pyrene, fluorine and combinations thereof.

23. The method of claim 6 or claim 1 3, wherein the dielectric material is selected from a group consisting of silicon nitride, silicon carbide, nitrogen doped si licon carbide, silicon nitride doped with carbon, silicon oxynitride and silicon oxycarbide, silicon oxide and metal oxides, oxynitrides, oxycarbides and si licates such as hafnium oxide, zi conium oxide. titanium oxide, tantalum oxide, hafnium oxycarbide, tantalum oxynitride, aluminum oxide, aluminum oxynitride, lanthanum oxide, zirconium silicon oxide and titanium silicon oxide.

24. The method of claim 6 or claim 13, wherein curing the dielectric material or the dielectric film compri ses exposing the dielectric material or the dielectric fi lm to heat at a temperature up to 650°C for a period of about 1 min to about 24 h.

25. The method of claim 13, further comprising:

before the curing, contacting the dielectric film with a curing agent that penetrates into the dielectric film,

wherein contacting the dielectric film comprises spin-coating the curing agent onto the dielectric film, and

wherein the curing agent diffuses into the dielectric film.