WO2017083469A1 - Techniques for filling a structure using selective surface modification - Google Patents
Techniques for filling a structure using selective surface modification Download PDFInfo
- Publication number
- WO2017083469A1 WO2017083469A1 PCT/US2016/061245 US2016061245W WO2017083469A1 WO 2017083469 A1 WO2017083469 A1 WO 2017083469A1 US 2016061245 W US2016061245 W US 2016061245W WO 2017083469 A1 WO2017083469 A1 WO 2017083469A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- chamber
- substrate
- cavity
- energetic flux
- fill material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
- H10W20/057—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches by selectively depositing, e.g. by using selective CVD or plating
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/02—Pretreatment of the material to be coated
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/04—Coating on selected surface areas, e.g. using masks
- C23C16/045—Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
- C23C16/45525—Atomic layer deposition [ALD]
- C23C16/45527—Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
- C23C16/45525—Atomic layer deposition [ALD]
- C23C16/45527—Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
- C23C16/45536—Use of plasma, radiation or electromagnetic fields
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
- C23C16/45525—Atomic layer deposition [ALD]
- C23C16/45544—Atomic layer deposition [ALD] characterized by the apparatus
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/48—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation
- C23C16/482—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation using incoherent light, UV to IR, e.g. lamps
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/52—Controlling or regulating the coating process
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/56—After-treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01332—Making the insulator
- H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
- H10D64/01342—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid by deposition, e.g. evaporation, ALD or laser deposition
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
- H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
- H10P14/43—Chemical deposition, e.g. chemical vapour deposition [CVD]
- H10P14/432—Chemical deposition, e.g. chemical vapour deposition [CVD] using selective deposition
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6326—Deposition processes
- H10P14/6328—Deposition from the gas or vapour phase
- H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H10P14/6339—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
- H10P14/6502—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6938—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
- H10P14/6939—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
- H10P14/69391—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing aluminium, e.g. Al2O3
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6938—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
- H10P14/6939—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
- H10P14/69392—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing hafnium, e.g. HfO2
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6938—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
- H10P14/6939—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
- H10P14/69393—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing tantalum, e.g. Ta2O5
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/04—Apparatus for manufacture or treatment
- H10P72/0402—Apparatus for fluid treatment
- H10P72/0418—Apparatus for fluid treatment for etching
- H10P72/0422—Apparatus for fluid treatment for etching for wet etching
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
- H10W20/095—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by irradiating with electromagnetic or particle radiation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
- H10W20/096—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by contacting with gases, liquids or plasmas
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/61—Formation of materials, e.g. in the shape of layers or pillars of insulating materials using masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
Definitions
- the present embodiments relate to processing device structures, and more particularly, to filling cavities in a device structure.
- device fabrication such as semiconductor device fabrication may entail filling of small cavities such as trenches, holes, or other structures.
- cavities may be filled with metal material, insulator material, or other material.
- metal material such as aluminum, copper, or other material.
- insulator material such as silicon, silicon, or other material.
- a trench may have an aspect ratio greater than one, in particular, greater than two.
- deposition techniques to fill a trench when filling material is introduced into the trench, the deposition of the filling material may take place on multiple exposed surfaces, including the bottom of the trench as well as trench sidewalls. This type of deposition may result in overhang and the formation of buried holes within the trench, leading to undesirable properties of a resulting device structure.
- a method of device processing may include providing a cavity in a layer, directing energetic flux to a bottom surface of the cavity, performing an exposure of the cavity to a moisture-containing ambient, and introducing a fill material in the cavity using an atomic layer deposition (ALD) process.
- the fill material may be selectively deposited on the bottom surface of the cavity with respect to a sidewall of the cavity.
- a system may include a transfer chamber, where the transfer chamber is arranged to transport a substrate between a plurality of locations.
- the system may include an energetic flux chamber, where the energetic flux chamber is coupled to the transfer chamber to receive the substrate, where the energetic flux chamber directs energetic flux in a directional fashion to the substrate.
- the system may further include a moisture chamber, the moisture chamber being coupled to the transfer chamber and providing an H2O ambient to the substrate.
- the system may also include an atomic layer deposition chamber, the atomic layer deposition chamber being coupled to the transfer chamber and providing a first reactant and a second reactant to the substrate, the first reactant and the second reactant forming at least one monolayer of a fill material.
- the system may include an etch chamber, the etch chamber being coupled to the transfer chamber and directing an etchant to the substrate for etching the fill material.
- a processing apparatus may include a process chamber to house a substrate; an energetic flux source, the energetic flux source providing energetic flux to the substrate in a directional manner; and a moisture source, the moisture source providing H2O to the substrate; and an atomic layer deposition source.
- the atomic layer deposition source may provide at least two species to the substrate for depositing a fill material on the substrate using an atomic layer deposition process.
- the energetic flux source, the moisture source, and the atomic layer deposition source may be coupled to the process chamber.
- FIGs. 1A to ID illustrate exemplary operations involved in a method according to embodiments of the disclosure
- FIGs. 2A to 2C depict exemplary operations according to other embodiments of the disclosure.
- FIGs. 3A to 3C depict exemplary operations according to additional embodiments of the disclosure.
- FIG. 4 illustrates Fourier transform Infrared spectra comparing results of film growth on a substrate with and without exposure to energetic flux before an atomic layer deposition process
- FIG. 5 is a composite diagram illustrating a comparison of film growth on a substrate using an atomic layer deposition process, with and without exposure to energetic flux before performing the atomic layer deposition;
- FIG. 6 presents an exemplary process flow according to embodiments of the disclosure
- FIG. 7 presents an exemplary system according to embodiments of the disclosure.
- FIG. 8 presents an exemplary apparatus according to embodiments of the disclosure.
- the embodiments described herein provide novel device processing including processing for filling a cavity, such as a trench or via in a substrate.
- a cavity such as a trench or via in a substrate.
- techniques are provided for improving trench-fill or via-fill for cavities including high aspect ratio cavities where the aspect ratio is greater than 1.
- the embodiments are not limited in this context.
- FIG. 1A to FIG. ID illustrate exemplary operations involved in a method for filling a cavity according to embodiments of the disclosure.
- the cavity may be provided in a structure such as a substrate base or a layer disposed on a substrate base in various embodiments.
- a substrate base may, for example, be a material such as a semiconductor, insulator, or other material forming the major part of a substrate. Any number of layers may be disposed on the substrate base.
- the layer 106 may represent a substrate base or may be a layer arranged within or on a substrate (not shown).
- the layer 106 may be composed of silicon oxide, silicon nitride, or silicon oxy carbide. The embodiments are not limited in this context.
- the cavity 100 may have different structure according to various embodiments of the disclosure.
- the cavity 100 may have a via structure where the cavity has an oval or circular shape within an X-Y plane according to the Cartesian coordinate system shown.
- the sidewall 104 may be just one sidewall defining the side of the cavity 100.
- the cavity has a trench structure where the trench includes a pair of opposing sidewalls, shown as the sidewall 104. Additionally, such a trench may include opposing endwalls (not shown).
- the cavity 100 may also include a bottom surface 102, as shown.
- the cavity may have a complex shape within the X-Y plane, such as any targeted trench partem to be filled.
- the sidewalls and bottom surface of the cavity 100 may be terminated by surface species 108, such as oxygen.
- the surface species 108, disposed on the surface of the cavity 100 may be configured to react with certain reactive species provided in a deposition process to facilitate deposition of a target material such as an insulator or metal.
- the energetic flux 1 12 may be provided in an energetic flux chamber, where the energetic flux 1 12 may be ions, electrons, or photons, or a combination thereof.
- the energetic flux 112 may be provided in a directional fashion to the bottom surface 102 of cavity 100 where the bottom surface 102 is impacted preferentially in comparison to the sidewalls 104.
- the ions may be directed in a collimated fashion toward the bottom surface 102.
- the ions may be directed as an ion beam containing ions having parallel trajectories.
- the ions may be provided to have trajectories parallel to the sidewalls 104, for example.
- a parallel beam of ions may be directed parallel to the sidewalls 104 so as to strike the bottom surface 102 and not to strike the sidewalls 104.
- the ions or other energetic flux may selectively alter the bottom surface 102 while not altering the sidewalls 104.
- energetic ions may be provided using a known beamline ion implanter, compact ion beam source, plasma source, or other known source capable of providing collimated ions.
- the energy of the energetic flux may be arranged to provide adequate energy to alter the surfaces of cavity 100 exposed to the energetic flux, in a manner rendering the surfaces more susceptible to formation of hydroxide (OH) terminations.
- the ion energy of ions may be tailored to provide adequate energy to render impacted surface(s) susceptible to hydroxide formation, while not imparting excessive damage to the impacted surface(s).
- the ion energy of ions provided as energetic flux 112 may range between 5 eV and 500 eV.
- ions may be provided as inert gas ions including Ar ions, or may be reactive ions, including C ions.
- the photons may be provided as ultraviolet phonons in the ultraviolet (UV) energy range or vacuum ultraviolet photons in the vacuum ultraviolet (VUV) energy range.
- the photon energy of photons used as energetic flux 112 may be in the range of 7 eV to 10 eV.
- the cavity 100 may be exposed to a moisture-containing (H2O) ambient in conjunction with exposure to the energetic flux 112.
- the moisture-containing ambient may be provided subsequently to the providing of the energetic flux 112.
- FIG. 1C there is shown a scenario of the cavity 100 after exposure to energetic flux 112 and after exposure to moisture-containing ambient.
- the energetic flux 112 has been selectively directed to the bottom surface 102 while not impacting the sidewalls 104, as suggested by FIG. IB.
- the bottom surface 102 may now be terminated by OH groups, while the sidewalls 104 are not terminated by OH groups.
- This difference may result as a consequence of alteration of the trench bottoms using the energetic flux 112 in conjunction with H2O. While the sidewalls 104 are exposed to H2O during the exposure of the cavity to moisture-containing ambient, the sidewalls 104, being unaltered by energetic flux 112, may not react with H2O to form an OH reaction product on their surface.
- the cavity 100 may be exposed to a deposition process, such as atomic layer deposition (ALD).
- ALD generally involves sequential exposure to two or more reactants to deposit a given monolayer of material.
- an ALD process may be performed to selectively deposit a material such as an oxide, nitride or metal, such as Ta.
- the oxide may be a high dielectric constant material, where examples of high dielectric constant materials include AI2O3, Hf02, Ta20s, and other materials where the dielectric constant is greater than the dielectric constant of S1O2.
- ALD atomic layer deposition
- deposition of the fill material using an ALD process may be selectively promoted on the bottom surface 102 with respect to the sidewalls 104.
- the OH-termination of the bottom surface 102 may promote deposition of an aluminum-containing reactant, hafnium- containing reactant, or tantalum-containing reactant, to name certain materials.
- this OH-termination may accordingly result in selective growth of AI2O3, HfC , Ta205, or tantalum metal on the bottom surface 102, as opposed to the sidewalls 104.
- the given ALD process may be performed in a cyclic fashion to generate bottom-up filling of a given material as suggested by the fill material 120 shown in FIG. ID.
- growth from sidewalls 104 generally may be suppressed while growth of layers parallel to the bottom surface 102 is enhanced. This growth may help avoid pinch-off, even for high-aspect ratio trenches or vias.
- FIG. 2A to FIG. 2C illustrate a sequence for selective ALD in accordance with the present embodiments. While illustrated for a planar substrate configuration, the process of FIGs. 2A to 2C may be employed in the aforementioned sequence shown in FIGs. 1 A to 1C.
- a dielectric substrate 200 is provided.
- the dielectric substrate 200 may represent the surfaces of cavity 100 in some examples. In other words, the planar surface of the dielectric substrate 200 may present the same material as surfaces of the cavity 100.
- a portion 202 of the dielectric substrate 200 is selectively altered so as to generate functional groups 204 on the portion 202, while not generating functional groups 204 on the portion 206.
- selective ALD may be promoted on the portion 202, where the ALD process is enhanced by the presence of the functional groups 204.
- a layer 208 may subsequently be deposited on the portion 202 by ALD, while no layer grows on the portion 206.
- FIG. 3A to FIG. 3C there is shown a specific implementation of the process of FIGs. 2A to 2C according to an embodiment of the disclosure.
- a silicon oxy carbide substrate 300 such as BDIIx
- a mask 302 is provided to mask a portion 304 of the silicon oxy carbide substrate 300.
- energetic flux 308 is directed to an unmasked portion 306 of the silicon oxy carbide substrate 300.
- an energetic flux chamber generating the energetic flux 308 may be an ultraviolet chamber, where the ultraviolet chamber comprises an ultraviolet radiation source.
- the ultraviolet radiation source may emit radiation having a wavelength between 150 nm and 200 nm, for example.
- the energetic flux may constitute 172 nm ultraviolet radiation (NBUV).
- NBUV 172 nm ultraviolet radiation
- the portion 304 and portion 306 are also exposed to a moisture-containing ambient.
- selective growth of an HfCh layer 310 takes place by exposing the entirety of the silicon oxy carbide substrate 300 to a subsequent ALD process. As shown, the HfCh layer 310 grows just on the unmasked portion 306 and not on the portion 304.
- FIG. 4 illustrates Fourier transform Infrared spectra comparing results of film growth on the silicon oxy carbide substrate 300 in regions with and without exposure to energetic flux before an ALD process is performed.
- the spectrum 402 taken in the unmasked portion 306 shows an absorption peak in the range of 3400 wavenumbers, characteristic of film formation.
- the spectrum 404, taken in the portion 304, shows no peak indicative of film formation.
- FIG. 5 is a composite diagram illustrating a comparison of film growth on a substrate using an atomic layer deposition process, comparing regions of a substrate with and without exposure to UV photon flux before performing the atomic layer deposition.
- ALD and etching such as HF etching
- FIG. 5 is a composite diagram illustrating a comparison of film growth on a substrate using an atomic layer deposition process, comparing regions of a substrate with and without exposure to UV photon flux before performing the atomic layer deposition.
- an example of selective ALD deposition of HfC on silicon oxy carbide is shown. The graph of FIG.
- the amount of hafnium oxide deposited on a substrate sample as a function of the number of ALD cycles performed.
- the amount of hafnium oxide is indicated by the intensity of an X-ray photoelectron spectroscopy (XPS) signal used to measure a given sample.
- the curve 502 represents the amount of hafnium oxide deposited on a substrate portion exposed to UV flux and moisture before ALD, shown as a function of the number of ALD cycles.
- the curve 504 represents hafnium oxide deposited on a substrate portion exposed to moisture while not exposed to UV flux before ALD.
- an initial series of 20 ALD cycles is performed before an etching process is performed.
- the amount of hafnium oxide increases with number of ALD cycles in the two cases, while the rate of deposition in the UV-exposed substrate portion is perhaps three to four times the rate of deposition in the unexposed substrate portion.
- the exposed region subject to UV flux and unexposed region of the substrate are subject to an etch, where the etch removes a target amount of hafnium oxide material.
- the respective amount of hafnium oxide remaining after etch in the two samples is illustrated by the point 506 and point 508.
- no hafnium oxide remains on the unexposed portion after etch, while a hafnium oxide layer remains on the exposed portion.
- a series of 20 more ALD cycles is performed, followed by a second etch. At the end of this process, no hafnium oxide remains on the unexposed portion, while hafnium oxide remains on the exposed portion.
- FIG. 5 shows cross-sectional electron micrographs of UV-exposed samples and unexposed samples at various stages of processing.
- approximately 3 nm hafnium oxide layer is deposited after 40 ALD cycles in this example.
- FIG. 5 performed on planar substrates, is exemplary and may be applied to enhance bottom-up trench-fill or via-fill process.
- bottom-up fill of a cavity may be enhanced by performing selective exposure of a bottom surface to energetic flux, in conjunction with exposure to moisture, subsequent ALD of fill material into the cavity, and etching of fill material after the ALD process.
- any unwanted deposition on a sidewall of a trench occurring after a sequence of ALD may be removed. This removal may facilitate an improved bottom-up trench-fill process, avoiding the type of growth causing void formation or other unwanted microstructure.
- a 4 nm thick layer of fill material may be deposited in a trench, generally in a bottom-up manner, as shown in FIG. ID.
- an etch may be performed for removing 0.5 nm of fill material. This etch may be effective to remove any residual fill material from sidewalls exposed above the surface of the fill material in the trench. Said differently, no fill material may be present on exposed regions of the sidewalls above a surface of the fill material after the etch process. The etch may also recess the fill material by 0.5 nm.
- an additional ALD process may be performed to continue the bottom-up trench-fill process. This sequence may be repeated as needed until a trench is completely filled or filled to a target level.
- FIG. 6 presents an exemplary process flow 600 according to embodiments of the disclosure.
- the operation is performed of providing a cavity in a layer.
- energetic flux is directed to a bottom surface of the cavity.
- the energetic ion flux may include ions having a target ion energy, such as an ion energy of 500 eV or less.
- an exposure of the cavity to a moisture-containing ambient is performed. According to various embodiments, the exposure to moisture-containing ambient may be conducted after block 604.
- a fill material is introduced in the cavity using an ALD process, wherein a fill material is selectively deposited on the bottom surface of the cavity with respect to a sidewall of the cavity.
- the fill material may constitute an oxide such as a high dielectric constant material, or a metal.
- an etch process is performed.
- the etch process may be arranged to remove a predetermined amount of fill material.
- decision block 612 a determination is made as to whether the fill process is complete. If so, the flow ends. If not, the flow returns to block 608.
- FIG. 7 presents atop plan view (X-Y plane) of an exemplary system, shown as system 700, according to embodiments of the disclosure.
- the system 700 may be used for performing the fill processes in accordance with the embodiments disclosed herein.
- the system 700 may be configured as a cluster tool, including a loadlock 702 and transfer chamber 704 to transport a substrate 720 to and between various processing chambers.
- the transfer chamber 704 and processing chambers may be coupled to evacuation apparatus such as known pumping systems (not shown) for maintaining the transfer chamber 704 and other processing chambers, discussed below, under vacuum conditions, or under controlled ambient conditions. Accordingly, the substrate 720 may be transported between the various processing chambers and transfer chamber 704 without exposure to ambient.
- the system 700 may include a plasma immersion chamber 706, coupled to the transfer chamber 704, where the substrate 720 is exposed to ions directed in a parallel fashion into cavities in the substrate 720.
- the system 700 may further include a moisture chamber 708, coupled to the transfer chamber 704, and providing a controlled exposure to H2O.
- the system 700 may also include an atomic layer deposition chamber, shown as ALD chamber 710, coupled to the transfer chamber 704, and arranged according to known apparatus to expose the substrate 720 to an atomic layer deposition process for a given material system, such as AI2O3, HfC , Ta205, or tantalum metal, for example.
- the ALD chamber 710 may, for example, be coupled to two or more sources of vapor species to be controllably directed into the ALD chamber 710 to perform an atomic layer deposition process.
- the system 700 may also include an etch chamber 712, coupled to the transfer chamber 704, where the substrate 720 may be exposed within the etch chamber 712 to an etchant such as HF or other etchant for removing a predetermined amount of material during filling of a cavity.
- the system 700 may additionally include a UV chamber 714, coupled to the transfer chamber 704, and directing ultraviolet radiation at a predetermined wavelength range to the substrate 720.
- the substrate 720 may be transferred into the UV chamber 714, where ultraviolet radiation may be directed in a controlled fashion to the bottom of a cavity in the substrate 720, as generally depicted in FIG. IB.
- the substrates 720 may accordingly be transferred between the various process chambers of the system 700 without being exposed to outside ambient.
- the UV chamber 714 may include energetic lamps producing radiation with peak energy in the range of 172 nm, and an energy range between approximately 7 eV to 10 eV.
- the system 700 may further include a controller 730 to direct and coordinate transport and processing of a substrate 720, among the different processing chambers of system 700.
- the controller 730 may include any combination of software and hardware, including logic, memory, and a user interface, to control processing of a substrate among a plurality of processing chambers of the system 700, including plasma immersion chamber 706, moisture chamber 708, ALD chamber 710, and etch chamber 712.
- the controller 730 may direct the substrate 720 to be transferred between various process chambers of system 700 in a cyclic process according to a recipe for filling a cavity.
- a cyclic process may entail transferring the substrate 720 multiple times into and out of a given processing chamber(s), and may entail transferring the substrate 720 between different processing chambers multiple times to complete a cavity fill process.
- the substrate 720 may be transported into the UV chamber 714 for a first exposure to energetic photons to alter a bottom surface of cavities within the substrate 720.
- the substrate 720 may subsequently be transported via transfer chamber 704 to moisture chamber 708 for a second exposure, where the bottom surface of cavities becomes OH-terminated, as described above with respect to FIG. 1C.
- the substrate 720 may be transported to the ALD chamber 710 for an initial ALD processing sequence, where the substrate 720 is exposed to a first number of ALD cycles.
- the first number of ALD cycles may be a predetermined number of ALD cycles arranged to deposit a fill material to a predetermined thickness in the cavities.
- the substrate 720 may be transported to the etch chamber 712 to etch the fill material to a predetermined amount. This etch of the fill material may result in the fill material being removed entirely from unwanted surfaces not directly exposed to UV radiation, where the growth rate of fill material may be much less, as discussed above with respect to FIG. 5.
- the substrate 720 may then be transferred back to the ALD chamber 710 for an additional number of ALD cycles.
- a second ALD processing sequence may be performed, where the substrate 720 is exposed to a second number of ALD cycles to increase the thickness of fill material in the cavities.
- This second ALD processing sequence may be followed by transferring the substrate 720 back to the etch chamber 712, for a second etch process.
- the cycling between ALD chamber 710 and etch chamber 712 may be performed according to a predetermined recipe to optimize bottom up filling of a cavity.
- the substrate 720 may be processed without exposure to ambient outside the system 700.
- a processing apparatus for performing a cavity fill process may include fewer process chambers, such as just one process chamber.
- an apparatus 800 may include a process chamber 802 to house a substrate, such as the substrate 720.
- the apparatus 800 may further include an energetic flux source 804 providing energetic flux to the substrate in a directional manner, as well as a moisture source 806, where the moisture source 806 provides H2O to the substrate 720.
- the apparatus 800 may also include an atomic layer deposition source 808, where the atomic layer deposition source 808 provides at least two species to the substrate for depositing a fill material on the substrate 720 using an atomic layer deposition process.
- the atomic layer deposition source in particular, may include multiple gas sources or vapor sources, where a given gas source or vapor source provides one component of an ALD process.
- the energetic flux source 804, moisture source 806, and atomic layer deposition source 808, may all be coupled to the process chamber 802 for the different processing to be performed therein.
- the present embodiments provide the advantage of filling narrow trenches and trenches having high aspect ratio without buried voids by favoring growth just on a target surface, such as the bottom of a trench.
- the present embodiments provide a further advantage scalability to smaller dimensions, since cavities such as trenches may be filled from the bottom up.
- the present disclosure is not to be limited in scope by the specific embodiments described herein. Indeed, other various embodiments of and modifications to the present disclosure, in addition to those described herein, will be apparent to those of ordinary skill in the art from the foregoing description and accompanying drawings. Thus, such other embodiments and modifications are intended to fall within the scope of the present disclosure.
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Physics & Mathematics (AREA)
- Plasma & Fusion (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Electromagnetism (AREA)
- Chemical Vapour Deposition (AREA)
- Formation Of Insulating Films (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
Claims
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020187013726A KR20180069038A (en) | 2015-11-13 | 2016-11-10 | Techniques for filling structures using selective surface modification |
| CN201680065565.5A CN108352300B (en) | 2015-11-13 | 2016-11-10 | Semiconductor device processing method, system and apparatus |
| JP2018522791A JP6938491B2 (en) | 2015-11-13 | 2016-11-10 | Semiconductor device processing methods and semiconductor device processing systems and equipment |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201562255017P | 2015-11-13 | 2015-11-13 | |
| US62/255,017 | 2015-11-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2017083469A1 true WO2017083469A1 (en) | 2017-05-18 |
Family
ID=58690322
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2016/061245 Ceased WO2017083469A1 (en) | 2015-11-13 | 2016-11-10 | Techniques for filling a structure using selective surface modification |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US9935005B2 (en) |
| JP (2) | JP6938491B2 (en) |
| KR (1) | KR20180069038A (en) |
| CN (1) | CN108352300B (en) |
| TW (1) | TWI705478B (en) |
| WO (1) | WO2017083469A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20210002672A (en) * | 2018-05-28 | 2021-01-08 | 가부시키가이샤 코쿠사이 엘렉트릭 | Semiconductor device manufacturing method, substrate processing device and recording medium |
| CN115786872A (en) * | 2022-11-22 | 2023-03-14 | 中建材光子科技有限公司 | Surface selective atomic layer deposition method using pre-bonding method |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10916420B2 (en) | 2018-06-07 | 2021-02-09 | Tokyo Electron Limited | Processing method and plasma processing apparatus |
| US10707100B2 (en) | 2018-06-07 | 2020-07-07 | Tokyo Electron Limited | Processing method and plasma processing apparatus |
| CN110783187B (en) | 2018-07-25 | 2024-04-19 | 东京毅力科创株式会社 | Plasma processing method and plasma processing apparatus |
| CN116837349A (en) | 2018-07-26 | 2023-10-03 | 东京毅力科创株式会社 | Plasma processing apparatus |
| TWI833804B (en) * | 2018-09-21 | 2024-03-01 | 美商應用材料股份有限公司 | Gap-fill with aluminum-containing films |
| TWI845607B (en) * | 2019-02-20 | 2024-06-21 | 荷蘭商Asm Ip私人控股有限公司 | Cyclical deposition method and apparatus for filling a recess formed within a substrate surface |
| US11993845B2 (en) | 2019-03-05 | 2024-05-28 | Applied Materials, Inc. | High selectivity atomic layer deposition process |
| JP6783888B2 (en) * | 2019-03-15 | 2020-11-11 | 株式会社Kokusai Electric | Manufacturing method of semiconductor devices, substrate processing devices and recording media |
| JP7613805B2 (en) * | 2020-10-12 | 2025-01-15 | 東京エレクトロン株式会社 | Embedding method and film forming apparatus |
| KR20220124103A (en) | 2021-03-02 | 2022-09-13 | 에이에스엠 아이피 홀딩 비.브이. | Methods and systems for filling gaps |
| KR20220124630A (en) * | 2021-03-02 | 2022-09-14 | 에이에스엠 아이피 홀딩 비.브이. | Methods and systems for forming layers comprising vanadium and oxygen |
| JP7305700B2 (en) * | 2021-04-19 | 2023-07-10 | 株式会社Kokusai Electric | Substrate processing method, semiconductor device manufacturing method, substrate processing apparatus, and program |
| TW202348832A (en) | 2022-05-03 | 2023-12-16 | 荷蘭商Asm Ip私人控股有限公司 | Vapor deposition process, method of filling gap on substrate with vanadium oxide, and method of forming gap fill layer |
| WO2025221828A1 (en) * | 2024-04-16 | 2025-10-23 | Applied Materials, Inc. | Area selective carbon partial gapfill process |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8173538B2 (en) * | 2006-11-30 | 2012-05-08 | Advanced Micro Devices, Inc. | Method of selectively forming a conductive barrier layer by ALD |
Family Cites Families (43)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US651382A (en) * | 1898-10-14 | 1900-06-12 | Simon E Pettee | Mail-canceling machine. |
| US5342792A (en) * | 1986-03-07 | 1994-08-30 | Canon Kabushiki Kaisha | Method of manufacturing semiconductor memory element |
| JPH0233153A (en) * | 1988-07-22 | 1990-02-02 | Toshiba Corp | Manufacture of semiconductor device |
| US5985759A (en) * | 1998-02-24 | 1999-11-16 | Applied Materials, Inc. | Oxygen enhancement of ion metal plasma (IMP) sputter deposited barrier layers |
| US6228720B1 (en) * | 1999-02-23 | 2001-05-08 | Matsushita Electric Industrial Co., Ltd. | Method for making insulated-gate semiconductor element |
| US6391785B1 (en) * | 1999-08-24 | 2002-05-21 | Interuniversitair Microelektronica Centrum (Imec) | Method for bottomless deposition of barrier layers in integrated circuit metallization schemes |
| US6300219B1 (en) * | 1999-08-30 | 2001-10-09 | Micron Technology, Inc. | Method of forming trench isolation regions |
| US6498091B1 (en) * | 2000-11-01 | 2002-12-24 | Applied Materials, Inc. | Method of using a barrier sputter reactor to remove an underlying barrier layer |
| US6686278B2 (en) * | 2001-06-19 | 2004-02-03 | United Microelectronics Corp. | Method for forming a plug metal layer |
| US6861334B2 (en) * | 2001-06-21 | 2005-03-01 | Asm International, N.V. | Method of fabricating trench isolation structures for integrated circuits using atomic layer deposition |
| JP3477462B2 (en) * | 2001-08-21 | 2003-12-10 | 松下電器産業株式会社 | Method for manufacturing semiconductor device |
| US6531382B1 (en) * | 2002-05-08 | 2003-03-11 | Taiwan Semiconductor Manufacturing Company | Use of a capping layer to reduce particle evolution during sputter pre-clean procedures |
| JP2006505127A (en) * | 2002-10-29 | 2006-02-09 | エーエスエム インターナショナル エヌ.ヴェー. | Oxygen cross-linking structure and method |
| DE10261466B4 (en) * | 2002-12-31 | 2007-01-04 | Advanced Micro Devices, Inc., Sunnyvale | A method of making a conductive barrier layer having improved adhesion and resistance properties |
| US7842605B1 (en) * | 2003-04-11 | 2010-11-30 | Novellus Systems, Inc. | Atomic layer profiling of diffusion barrier and metal seed layers |
| CN100541736C (en) * | 2003-11-11 | 2009-09-16 | 东京毅力科创株式会社 | Substrate processing method |
| DE102004005702A1 (en) * | 2004-02-05 | 2005-09-01 | Siltronic Ag | Semiconductor wafer, apparatus and method for producing the semiconductor wafer |
| KR20070089197A (en) * | 2004-11-22 | 2007-08-30 | 어플라이드 머티어리얼스, 인코포레이티드 | Substrate Processing Equipment Using Batch Processing Chamber |
| JP2007019191A (en) * | 2005-07-06 | 2007-01-25 | Fujitsu Ltd | Semiconductor device and manufacturing method thereof |
| US20070065578A1 (en) * | 2005-09-21 | 2007-03-22 | Applied Materials, Inc. | Treatment processes for a batch ALD reactor |
| EP2036120A4 (en) * | 2006-05-30 | 2012-02-08 | Applied Materials Inc | NOVEL PLASMA CURING AND PLASMA CURING PROCESS TO ENHANCE THE QUALITY OF SILICON DIOXIDE FILM |
| TW200810019A (en) * | 2006-06-08 | 2008-02-16 | Tokyo Electron Ltd | Film forming apparatus, film forming method, computer program and storage medium |
| US7625820B1 (en) * | 2006-06-21 | 2009-12-01 | Novellus Systems, Inc. | Method of selective coverage of high aspect ratio structures with a conformal film |
| JP2009543355A (en) * | 2006-07-03 | 2009-12-03 | アプライド マテリアルズ インコーポレイテッド | Cluster tools for advanced front-end processing |
| US20080119057A1 (en) * | 2006-11-20 | 2008-05-22 | Applied Materials,Inc. | Method of clustering sequential processing for a gate stack structure |
| JP2008141125A (en) * | 2006-12-05 | 2008-06-19 | Sekisui Chem Co Ltd | Semiconductor device and manufacturing method thereof |
| US20080242097A1 (en) * | 2007-03-28 | 2008-10-02 | Tim Boescke | Selective deposition method |
| JP4720808B2 (en) * | 2007-09-21 | 2011-07-13 | セイコーエプソン株式会社 | Adhesive sheet, joining method and joined body |
| US7964504B1 (en) * | 2008-02-29 | 2011-06-21 | Novellus Systems, Inc. | PVD-based metallization methods for fabrication of interconnections in semiconductor devices |
| US7943527B2 (en) * | 2008-05-30 | 2011-05-17 | The Board Of Trustees Of The University Of Illinois | Surface preparation for thin film growth by enhanced nucleation |
| US7981763B1 (en) * | 2008-08-15 | 2011-07-19 | Novellus Systems, Inc. | Atomic layer removal for high aspect ratio gapfill |
| KR20100093349A (en) * | 2009-02-16 | 2010-08-25 | 삼성전자주식회사 | Method of forming a thin film and fabricating method of semiconductor integrated circuit device |
| US8945305B2 (en) * | 2010-08-31 | 2015-02-03 | Micron Technology, Inc. | Methods of selectively forming a material using parylene coating |
| JP5679581B2 (en) * | 2011-12-27 | 2015-03-04 | 東京エレクトロン株式会社 | Deposition method |
| CN103515207B (en) * | 2012-06-19 | 2016-08-10 | 中芯国际集成电路制造(上海)有限公司 | Oxide layer, HKMG structure median surface layer, MOS transistor forming method and MOS transistor |
| US20140374907A1 (en) * | 2012-06-21 | 2014-12-25 | Applied Materials, Inc. | Ultra-thin copper seed layer for electroplating into small features |
| US9040465B2 (en) * | 2012-11-19 | 2015-05-26 | Intermolecular, Inc. | Dielectric doping using high productivity combinatorial methods |
| US9171960B2 (en) * | 2013-01-25 | 2015-10-27 | Qualcomm Mems Technologies, Inc. | Metal oxide layer composition control by atomic layer deposition for thin film transistor |
| JP5931780B2 (en) * | 2013-03-06 | 2016-06-08 | 東京エレクトロン株式会社 | Selective epitaxial growth method and film forming apparatus |
| US9217201B2 (en) * | 2013-03-15 | 2015-12-22 | Applied Materials, Inc. | Methods for forming layers on semiconductor substrates |
| TWI649803B (en) * | 2013-09-30 | 2019-02-01 | 蘭姆研究公司 | Gap filling with variable aspect ratio variable characteristics of plasma assisted atomic layer deposition and plasma assisted chemical vapor deposition synthesis |
| CN105047600B (en) * | 2014-04-24 | 2019-01-18 | 台湾积体电路制造股份有限公司 | Semiconductor structure and its manufacturing method |
| US9997373B2 (en) * | 2014-12-04 | 2018-06-12 | Lam Research Corporation | Technique to deposit sidewall passivation for high aspect ratio cylinder etch |
-
2016
- 2016-11-10 KR KR1020187013726A patent/KR20180069038A/en not_active Ceased
- 2016-11-10 CN CN201680065565.5A patent/CN108352300B/en active Active
- 2016-11-10 US US15/347,948 patent/US9935005B2/en active Active
- 2016-11-10 JP JP2018522791A patent/JP6938491B2/en active Active
- 2016-11-10 WO PCT/US2016/061245 patent/WO2017083469A1/en not_active Ceased
- 2016-11-14 TW TW105136985A patent/TWI705478B/en not_active IP Right Cessation
-
2018
- 2018-02-23 US US15/904,020 patent/US10559496B2/en active Active
-
2021
- 2021-09-01 JP JP2021142704A patent/JP7168741B2/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8173538B2 (en) * | 2006-11-30 | 2012-05-08 | Advanced Micro Devices, Inc. | Method of selectively forming a conductive barrier layer by ALD |
Non-Patent Citations (4)
| Title |
|---|
| GHOSAL, SUTAPA ET AL.: "Controlling Atomic Layer Deposition of Ti02 in Aerogels through Surface Functionalization", CHEMISTRY OF MATERIALS, vol. 21, no. 9, 2009, pages 1989 - 1992, XP055381877 * |
| HONG, JUNSIC ET AL.: "ALD Resist Formed by Vapor-Deposited Self-Assembled Monolayers", LANGMUIR, vol. 23, no. 3, 2007, pages 1160 - 1165, XP055368936 * |
| RAS, ROBIN H. A. ET AL.: "Blocking the Lateral Film Growth at the Nanoscale in Area-Selective Atomic Layer Deposition", JOURNAL OF THE AMERICAN CHEMICAL SOCIETY, vol. 130, no. 34, 2008, pages 11252 - 11253, XP055381873 * |
| TAGAWA, MASAHITO ET AL.: "Atomic Beam-Induced Fluorination of Polyimide and Its Application to Site-Selective Cu Metallization", LANGMUIR, vol. 23, no. 23, 2007, pages 11351 - 11354, XP055381874 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20210002672A (en) * | 2018-05-28 | 2021-01-08 | 가부시키가이샤 코쿠사이 엘렉트릭 | Semiconductor device manufacturing method, substrate processing device and recording medium |
| KR102582496B1 (en) | 2018-05-28 | 2023-09-26 | 가부시키가이샤 코쿠사이 엘렉트릭 | Semiconductor device manufacturing method, substrate processing device, and recording medium |
| KR102690321B1 (en) * | 2018-05-28 | 2024-08-05 | 가부시키가이샤 코쿠사이 엘렉트릭 | Semiconductor device production method, substrate processing device, and program |
| CN115786872A (en) * | 2022-11-22 | 2023-03-14 | 中建材光子科技有限公司 | Surface selective atomic layer deposition method using pre-bonding method |
Also Published As
| Publication number | Publication date |
|---|---|
| JP7168741B2 (en) | 2022-11-09 |
| US20180218943A1 (en) | 2018-08-02 |
| US10559496B2 (en) | 2020-02-11 |
| JP6938491B2 (en) | 2021-09-22 |
| TWI705478B (en) | 2020-09-21 |
| CN108352300B (en) | 2022-03-29 |
| KR20180069038A (en) | 2018-06-22 |
| JP2019501518A (en) | 2019-01-17 |
| CN108352300A (en) | 2018-07-31 |
| US20170140983A1 (en) | 2017-05-18 |
| US9935005B2 (en) | 2018-04-03 |
| TW201727701A (en) | 2017-08-01 |
| JP2021192446A (en) | 2021-12-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10559496B2 (en) | Techniques for filling a structure using selective surface modification | |
| JP7682948B2 (en) | High Energy Atomic Layer Etching | |
| KR102723608B1 (en) | Method of post-deposition treatment for silicon oxide film | |
| US10727080B2 (en) | Tantalum-containing material removal | |
| US9947549B1 (en) | Cobalt-containing material removal | |
| KR102629835B1 (en) | Substrate processing apparatus | |
| KR102630751B1 (en) | 3D NAND etching | |
| KR20160087348A (en) | Integrating atomic scale processes: ald (atomic layer deposition) and ale (atomic layer etch) | |
| CN105489485A (en) | Method of processing target object | |
| TW201639000A (en) | Selective deposition using masks and directional plasma treatment | |
| US10714340B2 (en) | Method for processing workpiece | |
| TW201826385A (en) | Carbon-based film self-limiting cyclic etching method | |
| US11823903B2 (en) | Method for processing workpiece | |
| JP5159165B2 (en) | Recess filling method | |
| KR20200000377A (en) | Method for area-selective etching of silicon nitride layers for the manufacture of microelectronic workpieces | |
| US11205576B2 (en) | Monolayer film mediated precision material etch | |
| CN105810581A (en) | Etching method | |
| CN111448641B (en) | High Energy Atomic Layer Etching | |
| US20230298869A1 (en) | Subtractive copper etch | |
| WO2025175032A1 (en) | An in-situ ruthenium or cobalt liner for improved high aspect ratio etch with bow control |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 16864969 Country of ref document: EP Kind code of ref document: A1 |
|
| WWE | Wipo information: entry into national phase |
Ref document number: 2018522791 Country of ref document: JP |
|
| ENP | Entry into the national phase |
Ref document number: 20187013726 Country of ref document: KR Kind code of ref document: A |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 16864969 Country of ref document: EP Kind code of ref document: A1 |