WO2017069923A1 - Gapfill film modification for advanced cmp and recess flow - Google Patents

Gapfill film modification for advanced cmp and recess flow Download PDF

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Publication number
WO2017069923A1
WO2017069923A1 PCT/US2016/054453 US2016054453W WO2017069923A1 WO 2017069923 A1 WO2017069923 A1 WO 2017069923A1 US 2016054453 W US2016054453 W US 2016054453W WO 2017069923 A1 WO2017069923 A1 WO 2017069923A1
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Prior art keywords
gap fill
fill material
ion
ion species
implanted
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PCT/US2016/054453
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French (fr)
Inventor
Erica CHEN
Ludovic Godet
Srinivas D. Nemani
Ellie Y. Yieh
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Applied Materials Inc
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Applied Materials Inc
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Priority to KR1020187014475A priority Critical patent/KR102764884B1/en
Priority to JP2018520451A priority patent/JP6955489B2/en
Priority to CN201680052233.3A priority patent/CN108352357B/en
Publication of WO2017069923A1 publication Critical patent/WO2017069923A1/en
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/098—Manufacture or treatment of dielectric parts thereof by filling between adjacent conductive parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/095—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by irradiating with electromagnetic or particle radiation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/40—Ion implantation into wafers, substrates or parts of devices into insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H10P52/40—Chemomechanical polishing [CMP]
    • H10P52/402—Chemomechanical polishing [CMP] of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H10P52/40—Chemomechanical polishing [CMP]
    • H10P52/403—Chemomechanical polishing [CMP] of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/06—Planarisation of inorganic insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0121—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] in regions recessed from the surface, e.g. in trenches or grooves
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/097—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating

Definitions

  • Implementations of the present disclosure generally relate to methods for forming gap fill materials on a substrate. More specifically, implementations provided herein relate to a process flow for forming gap fill materials.
  • STI shallow trench isolation
  • ILD inter-metal dielectric layers
  • PMD pre- metal dielectrics
  • passivation layers patterning applications, etc.
  • Gap fill materials may be deposited by various deposition processes, such as flowable chemical vapor deposition (FCVD), spin-on, atomic layer deposition (ALD), plasma enhanced chemical vapor deposition (PECVD), or low pressure chemical vapor deposition (LPCVD).
  • FCVD flowable chemical vapor deposition
  • ALD atomic layer deposition
  • PECVD plasma enhanced chemical vapor deposition
  • LPCVD low pressure chemical vapor deposition
  • the as- deposited gap fill materials are usually of poor quality, characterized by high wet etch rate ratio (WERR) and high stress.
  • WERR wet etch rate ratio
  • Subsequent processes, such as curing and/or annealing are performed to improve the quality of the gap fill materials. Even then, the gap fill materials still face several key challenges such as dishing, caused by chemical mechanical polishing (CMP) processes, and nonplanar recess profile.
  • CMP chemical mechanical polishing
  • Implementations of the present disclosure generally relate to methods for forming gap fill materials on a substrate.
  • a method for treating a gap fill material includes implanting a first ion species in the gap fill material using a first ion energy, implanting a second ion species in the gap fill material using a second ion energy, wherein the first ion energy is greater than the second ion energy, annealing the gap fill material after exposure to the second ion species, and performing a chemical mechanical polishing process on the gap fill material, wherein a dishing of the gap fill material is less than 8 nm.
  • a method for treating a gap fill material includes implanting helium ion species in the gap fill material using a first ion energy, implanting silicon ion species in the gap fill material using a second ion energy, wherein the first ion energy is greater than the second ion energy, annealing the gap fill material after exposure to the silicon ion species, and performing a chemical mechanical polishing process on the annealed gap fill material.
  • a method for forming a gap fill material includes depositing a gap fill material on a substrate and treating the gap fill material.
  • the treating includes implanting helium ion species in the gap fill material using a first ion energy and implanting silicon ion species in the gap fill material using a second ion energy, wherein the first ion energy is greater than the second ion energy.
  • the method further includes annealing the gap fill material after exposure to the silicon ion species to form an annealed gap fill material, and performing a chemical mechanical polishing process on the annealed gap fill material.
  • Figure 1 illustrates a method for forming a gap fill material on a substrate according to one implementation described herein.
  • Figures 2A - 2B are charts illustrating effects of ion implantation on wet etch rate ratio according to implementations described herein.
  • Figures 3A - 3B are charts illustrating effects of ion implantation on film stress according to implementations described herein.
  • Figures 4A - 4C are charts illustrating effects of ion implantation on dishing according to implementations described herein.
  • Figure 5 is a chart illustrating effects of ion implantation on ion concentration at different temperatures according to implementations described herein.
  • Figure 6 illustrates a method for treating the gap fill material on a substrate according to one implementation described herein.
  • Implementations described herein relate to methods for forming gap fill materials. After the gap fill material is deposited and before a CMP process is performed on the gap fill material, one or more ion implantation processes are utilized to treat the deposited gap fill material.
  • the one or more ion implantation processes include implanting a first ion species in the gap fill material using a first ion energy, and then implanting a second ion species in the gap fill material using a second ion energy that is lower than the first ion energy.
  • the one or more ion implantation processes minimize CMP dishing and improve recess profile.
  • FIG. 1 illustrates a method 100 for forming a gap fill material on a substrate according to one implementation described herein.
  • a gap fill material is deposited on a substrate.
  • the substrate generally has features formed thereon and one or more processing chambers may be utilized to deposit the gap fill material between the features on the substrate.
  • the gap fill material may be deposited by any suitable process, such as FVCD, Spin-on, ALD, PECVD, or LPCVD.
  • the gap fill material may be any suitable material, such as a dielectric material.
  • a plurality of fins are formed spaced apart on the substrate, and the gap fill material, or shallow trench isolation (STI) structure, is deposited between the fins on the substrate.
  • STI shallow trench isolation
  • the STI structures may be formed by an insulating material, such as silicon dioxide.
  • the gap fill material may be the interlevel dielectric (ILD) layer deposited between a plurality of polycrystalline silicon gates, and the ILD layer may be formed by silicon dioxide.
  • ILD interlevel dielectric
  • the gap fill material such as the STI structure or the ILD layer, may be cured subsequent to the deposition process to remove moisture and residual organics, harden and densify the material.
  • the curing is typically performed using low temperature processes at a temperature of about 100 degrees Celsius or less. Such processes include exposure to inductively coupled plasma, ultraviolet light, ozone, e-beam, acidic or basic vapors, an aqueous environment such as heated deionized water, and a combination or succession of such treatments.
  • one or more ion implantation processes may be performed on the gap fill material.
  • the as deposited and cured gap fill material may have high WERR and high stress, along with dishing issue caused by subsequent CMP process and nonplanar recess profile. Dishing is defined by the difference in height between the lowest point of the gap fill material and the highest point of the gap fill material at the end of the CMP process.
  • the nonplanar surface caused by the dishing issue may be aggravated by the subsequent recess process or wet/soft clean process.
  • the recess process is a removal process, such as an etching process performed on the gap fill material.
  • the gap fill material may be treated by one or more ion implantation processes.
  • the one or more ion implantation processes generally incorporate ion species into the gap fill material to break bonds in the gap fill material. As a result, reactivity and conversion of the gap fill material during the subsequent annealing process are increased. The one or more ion implantation processes also improves the WERR of the gap fill material.
  • Figures 2A - 2B are charts illustrating effects of ion implantation on WERR according to implementations described herein. In one implementation, silicon ion species are implanted into the gap fill material.
  • Figure 2A shows a chart illustrating the effect of ion energy on WERR. As shown in Figure 2A, low WERR, such as 2, is achieved at an implantation depth of 100 nm of shallower for both ion energy levels. However, in order to achieve low WERR deeper into the gap fill material, such as greater than 100 nm, higher ion energy, such as 60 keV, may be used compared to lower ion energy, such as 30 keV.
  • FIG. 2B shows a chart illustrating the effect of ion energy on WERR. As shown in Figure 2B, WERR remains low for gap fill material implanted with helium ion species in both dense and open areas. Dense area is referred to relatively more features located within a specific area, and open area is referred to relatively less features located within a specific area.
  • Figures 3A - 3B are charts illustrating effects of ion implantation on film stress according to implementations described herein. As shown in Figures 3A and 3B, for both Si and He ion species, the film stress, or the stress of the gap fill material, becomes more compressive as implant dosage increases.
  • the implant dosage may range from about 1 x 10 15 to about 5 x 10 17 atoms per cm 2 .
  • FIGS 4A - 4C are charts illustrating effects of ion implantation on dishing according to implementations described herein.
  • dishing may occur after the subsequent CMP process, and dishing is defined by the difference in height (nm) between the lowest point of the gap fill material and the highest point of the gap fill material at the end of the CMP process.
  • Figure 4A illustrates reduced dishing with silicon ion species implanted in the gap fill material compared to without silicon ion species implantation.
  • gap fill material that is 15% or 35% overpolished during the CMP process has a dishing of 0 nm when silicon ion species are implanted in the gap fill material prior to the CMP process.
  • gap fill material that is 15% or 35% overpolished during the CMP process has a dishing of less than 5 nm when silicon ion species are implanted in the gap fill material prior to the CMP process.
  • Figure 4B also illustrates reduced dishing with helium ion species implanted in the gap fill material compared to without helium ion species implantation.
  • the dishing is much lower for the gap fill material that has been implanted with helium ion species compared to without helium ion species implantation in both dense and open areas.
  • Figure 4C is a chart illustrating dishing at the end of a recess process following the CMP process. As shown in Figure 4C, dishing is reduced with helium ion species implanted in the gap fill materials in both dense and open areas.
  • dishing of the gap fill material following the CMP process or recess process is less than about 8 nm when one or more ion implantation process is performed on the gap fill material prior to the CMP and recess processes.
  • the one or more ion implantation processes may be performed at any suitable temperatures, ranging from below 0 degrees Celsius to about 500 degrees Celsius.
  • ion species are implanted at a temperature of greater than 450 degrees Celsius, such as about 500 degrees Celsius. It has been found that when implantation temperature is greater than 450 degrees Celsius, the ion species accumulation in the gap fill material is reduced, which leads to less damage to the gap fill material.
  • Figure 5 is a chart illustrating effects of ion implantation on ion concentration at different temperatures according to implementations described herein.
  • the concentration of the helium ion species in the gap fill material is lower when the ion implantation process is performed at 500 degrees Celsius compared to the ion implantation process performed at 300 degrees Celsius. Again, lower concentration of implanted ion species minimizes damage to the gap fill material. Thus, in some implementations, the one or more ion implantation processes are performed at a temperature greater than 450 degrees Celsius, such as 500 degrees Celsius.
  • the ion species implanted in the gap fill material may be any suitable ion species, such as silicon ion species, helium ion species, hydrogen ion species, nitrogen ion species, or other inert ion species, such as argon ion species.
  • small sized ion species such as helium ion species, are implanted in the gap fill material in order to minimize damage to the gap fill material.
  • gap fill material implanted with silicon ion species shows improved dishing over gap fill material implanted with helium ion species.
  • more than one ion implantation processes are performed to treat the gap fill material.
  • Figure 6 illustrates a method 600 for treating the gap fill material on a substrate according to one implementation described herein.
  • a first ion species are implanted in the gap fill material at a first ion energy.
  • the first ion species are helium ion species.
  • the first ion species are implanted in the gap fill material at a first depth.
  • a second ion species are implanted in the gap fill material at a second ion energy.
  • the second ion species are silicon ion species and the second ion energy is less than the first ion energy.
  • the silicon ion species are implanted in the gap fill material at a second depth that is shallower than the first depth.
  • dishing is improved since gap fill material implanted with silicon ion species shows a better result in dishing compared to gap fill material implanted with helium ion species.
  • the depths of the first and second ion species may be determined by the amount of gap fill material to be removed by the CMP process.
  • the first and second ion species may be any suitable ion species, such as silicon ion species, helium ion species, hydrogen ion species, nitrogen ion species, or other inert ion species, such as argon ion species.
  • the first ion species are the same as the second ion species.
  • the two implantation processes of the same ion species help to improve the uniformity of the implanted ion species.
  • the gap fill material may be annealed.
  • Annealing of the gap fill material may be performed either in the deposition chamber, the ion implantation chamber, or a different annealing apparatus, such as a rapid thermal processing chamber.
  • the annealing process may be performed at a temperature of about 500 degree Celsius.
  • Water vapor may be provided during the annealing process to steam anneal the gap fill material.
  • the gap fill material is silicon dioxide. It is believed that oxygen atoms in the steam may advantageously be incorporated into the silicon dioxide gap fill material by bonding to Si dangling bonds and increase the oxygen content of the silicon dioxide material. It is contemplated that the steam annealing process may also prevent shrinkage of the silicon dioxide material due to the availability of oxygen atoms for increased Si-0 bonding.
  • a CMP process is performed on the gap fill material, as shown in block 140. As described before, dishing caused by the CMP process is minimized by the addition of the one or more ion implantation processes in the process flow.

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  • Mechanical Treatment Of Semiconductor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)

Abstract

Implementations described herein relate to methods for forming gap fill materials. After the gap fill material is deposited and before a CMP process is performed on the gap fill material, one or more ion implantation processes are utilized to treat the deposited gap fill material. The one or more ion implantation processes include implanting a first ion species in the gap fill material using a first ion energy, and then implanting a second ion species in the gap fill material using a second ion energy that's lower than the first ion energy. The one or more ion implantation processes minimize CMP dishing and improve recess profile.

Description

GAPFILL FILM MODIFICATION FOR ADVANCED CMP AND RECESS
FLOW
BACKGROUND
Field
[0001] Implementations of the present disclosure generally relate to methods for forming gap fill materials on a substrate. More specifically, implementations provided herein relate to a process flow for forming gap fill materials.
Description of the Related Art
[0002] In semiconductor processing, devices are being manufactured with continually decreasing feature dimensions. Often, features utilized to manufacture devices at these advanced technology nodes include high aspect ratio structures and it is often necessary to fill gaps between the high aspect ratio structures with a gap fill material, such as an insulating material. Examples where insulating materials are utilized for gap fill applications include shallow trench isolation (STI), inter-metal dielectric layers (ILD), pre- metal dielectrics (PMD), passivation layers, patterning applications, etc. As device geometries shrink and thermal budgets are reduced, void-free filling of high aspect ratio spaces becomes increasingly difficult due to limitations of existing deposition processes.
[0003] Gap fill materials may be deposited by various deposition processes, such as flowable chemical vapor deposition (FCVD), spin-on, atomic layer deposition (ALD), plasma enhanced chemical vapor deposition (PECVD), or low pressure chemical vapor deposition (LPCVD). The as- deposited gap fill materials are usually of poor quality, characterized by high wet etch rate ratio (WERR) and high stress. Subsequent processes, such as curing and/or annealing, are performed to improve the quality of the gap fill materials. Even then, the gap fill materials still face several key challenges such as dishing, caused by chemical mechanical polishing (CMP) processes, and nonplanar recess profile.
[0004] Therefore, there is a need for improved processes for forming gap fill materials.
SUMMARY
[0005] Implementations of the present disclosure generally relate to methods for forming gap fill materials on a substrate. In one implementation, a method for treating a gap fill material includes implanting a first ion species in the gap fill material using a first ion energy, implanting a second ion species in the gap fill material using a second ion energy, wherein the first ion energy is greater than the second ion energy, annealing the gap fill material after exposure to the second ion species, and performing a chemical mechanical polishing process on the gap fill material, wherein a dishing of the gap fill material is less than 8 nm.
[0006] In another implementation, a method for treating a gap fill material includes implanting helium ion species in the gap fill material using a first ion energy, implanting silicon ion species in the gap fill material using a second ion energy, wherein the first ion energy is greater than the second ion energy, annealing the gap fill material after exposure to the silicon ion species, and performing a chemical mechanical polishing process on the annealed gap fill material.
[0007] In another implementation, a method for forming a gap fill material includes depositing a gap fill material on a substrate and treating the gap fill material. The treating includes implanting helium ion species in the gap fill material using a first ion energy and implanting silicon ion species in the gap fill material using a second ion energy, wherein the first ion energy is greater than the second ion energy. The method further includes annealing the gap fill material after exposure to the silicon ion species to form an annealed gap fill material, and performing a chemical mechanical polishing process on the annealed gap fill material. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to implementations, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only exemplary implementations and are therefore not to be considered limiting of its scope, may admit to other equally effective implementations.
[0009] Figure 1 illustrates a method for forming a gap fill material on a substrate according to one implementation described herein.
[0010] Figures 2A - 2B are charts illustrating effects of ion implantation on wet etch rate ratio according to implementations described herein.
[0011] Figures 3A - 3B are charts illustrating effects of ion implantation on film stress according to implementations described herein.
[0012] Figures 4A - 4C are charts illustrating effects of ion implantation on dishing according to implementations described herein.
[0013] Figure 5 is a chart illustrating effects of ion implantation on ion concentration at different temperatures according to implementations described herein.
[0014] Figure 6 illustrates a method for treating the gap fill material on a substrate according to one implementation described herein.
[0015] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one implementation may be beneficially incorporated in other implementations without further recitation. DETAILED DESCRIPTION
[0016] Implementations described herein relate to methods for forming gap fill materials. After the gap fill material is deposited and before a CMP process is performed on the gap fill material, one or more ion implantation processes are utilized to treat the deposited gap fill material. The one or more ion implantation processes include implanting a first ion species in the gap fill material using a first ion energy, and then implanting a second ion species in the gap fill material using a second ion energy that is lower than the first ion energy. The one or more ion implantation processes minimize CMP dishing and improve recess profile.
[0017] Figure 1 illustrates a method 100 for forming a gap fill material on a substrate according to one implementation described herein. At block 1 10, a gap fill material is deposited on a substrate. The substrate generally has features formed thereon and one or more processing chambers may be utilized to deposit the gap fill material between the features on the substrate. The gap fill material may be deposited by any suitable process, such as FVCD, Spin-on, ALD, PECVD, or LPCVD. The gap fill material may be any suitable material, such as a dielectric material. In one implementation, a plurality of fins are formed spaced apart on the substrate, and the gap fill material, or shallow trench isolation (STI) structure, is deposited between the fins on the substrate. The STI structures may be formed by an insulating material, such as silicon dioxide. In another implementation, the gap fill material may be the interlevel dielectric (ILD) layer deposited between a plurality of polycrystalline silicon gates, and the ILD layer may be formed by silicon dioxide.
[0018] The gap fill material, such as the STI structure or the ILD layer, may be cured subsequent to the deposition process to remove moisture and residual organics, harden and densify the material. The curing is typically performed using low temperature processes at a temperature of about 100 degrees Celsius or less. Such processes include exposure to inductively coupled plasma, ultraviolet light, ozone, e-beam, acidic or basic vapors, an aqueous environment such as heated deionized water, and a combination or succession of such treatments.
[0019] Next, at block 120, one or more ion implantation processes may be performed on the gap fill material. The as deposited and cured gap fill material may have high WERR and high stress, along with dishing issue caused by subsequent CMP process and nonplanar recess profile. Dishing is defined by the difference in height between the lowest point of the gap fill material and the highest point of the gap fill material at the end of the CMP process. The nonplanar surface caused by the dishing issue may be aggravated by the subsequent recess process or wet/soft clean process. The recess process is a removal process, such as an etching process performed on the gap fill material. In order to reduce WERR, stress, and dishing, the gap fill material may be treated by one or more ion implantation processes.
[0020] The one or more ion implantation processes generally incorporate ion species into the gap fill material to break bonds in the gap fill material. As a result, reactivity and conversion of the gap fill material during the subsequent annealing process are increased. The one or more ion implantation processes also improves the WERR of the gap fill material. Figures 2A - 2B are charts illustrating effects of ion implantation on WERR according to implementations described herein. In one implementation, silicon ion species are implanted into the gap fill material. Figure 2A shows a chart illustrating the effect of ion energy on WERR. As shown in Figure 2A, low WERR, such as 2, is achieved at an implantation depth of 100 nm of shallower for both ion energy levels. However, in order to achieve low WERR deeper into the gap fill material, such as greater than 100 nm, higher ion energy, such as 60 keV, may be used compared to lower ion energy, such as 30 keV.
[0021] In another implementation, helium ion species are implanted into the gap fill material. Figure 2B shows a chart illustrating the effect of ion energy on WERR. As shown in Figure 2B, WERR remains low for gap fill material implanted with helium ion species in both dense and open areas. Dense area is referred to relatively more features located within a specific area, and open area is referred to relatively less features located within a specific area.
[0022] Figures 3A - 3B are charts illustrating effects of ion implantation on film stress according to implementations described herein. As shown in Figures 3A and 3B, for both Si and He ion species, the film stress, or the stress of the gap fill material, becomes more compressive as implant dosage increases. The implant dosage may range from about 1 x 1015 to about 5 x 1017 atoms per cm2.
[0023] Figures 4A - 4C are charts illustrating effects of ion implantation on dishing according to implementations described herein. As described above, dishing may occur after the subsequent CMP process, and dishing is defined by the difference in height (nm) between the lowest point of the gap fill material and the highest point of the gap fill material at the end of the CMP process. Figure 4A illustrates reduced dishing with silicon ion species implanted in the gap fill material compared to without silicon ion species implantation. As shown in Figure 4A, in a dense area, gap fill material that is 15% or 35% overpolished during the CMP process has a dishing of 0 nm when silicon ion species are implanted in the gap fill material prior to the CMP process. Similarly, in an open area, gap fill material that is 15% or 35% overpolished during the CMP process has a dishing of less than 5 nm when silicon ion species are implanted in the gap fill material prior to the CMP process.
[0024] Figure 4B also illustrates reduced dishing with helium ion species implanted in the gap fill material compared to without helium ion species implantation. As shown in Figure 4B, for gap fill material in features having a pitch ratio A and features having a pitch ratio B, the dishing is much lower for the gap fill material that has been implanted with helium ion species compared to without helium ion species implantation in both dense and open areas. Figure 4C is a chart illustrating dishing at the end of a recess process following the CMP process. As shown in Figure 4C, dishing is reduced with helium ion species implanted in the gap fill materials in both dense and open areas. As shown in Figures 4A - 4C, dishing of the gap fill material following the CMP process or recess process is less than about 8 nm when one or more ion implantation process is performed on the gap fill material prior to the CMP and recess processes.
[0025] The one or more ion implantation processes may be performed at any suitable temperatures, ranging from below 0 degrees Celsius to about 500 degrees Celsius. In some implementations, in order to minimize damage to the gap fill material, ion species are implanted at a temperature of greater than 450 degrees Celsius, such as about 500 degrees Celsius. It has been found that when implantation temperature is greater than 450 degrees Celsius, the ion species accumulation in the gap fill material is reduced, which leads to less damage to the gap fill material. Figure 5 is a chart illustrating effects of ion implantation on ion concentration at different temperatures according to implementations described herein. As shown in Figure 5, the concentration of the helium ion species in the gap fill material is lower when the ion implantation process is performed at 500 degrees Celsius compared to the ion implantation process performed at 300 degrees Celsius. Again, lower concentration of implanted ion species minimizes damage to the gap fill material. Thus, in some implementations, the one or more ion implantation processes are performed at a temperature greater than 450 degrees Celsius, such as 500 degrees Celsius.
[0026] The ion species implanted in the gap fill material may be any suitable ion species, such as silicon ion species, helium ion species, hydrogen ion species, nitrogen ion species, or other inert ion species, such as argon ion species. In some implementations, small sized ion species, such as helium ion species, are implanted in the gap fill material in order to minimize damage to the gap fill material. However, as shown in Figures 4A - 4C, gap fill material implanted with silicon ion species shows improved dishing over gap fill material implanted with helium ion species. Thus, in some implementations, more than one ion implantation processes are performed to treat the gap fill material.
[0027] Figure 6 illustrates a method 600 for treating the gap fill material on a substrate according to one implementation described herein. At block 602, a first ion species are implanted in the gap fill material at a first ion energy. In one implementation, the first ion species are helium ion species. At the first ion energy, the first ion species are implanted in the gap fill material at a first depth. At block 604, a second ion species are implanted in the gap fill material at a second ion energy. In one implementation, the second ion species are silicon ion species and the second ion energy is less than the first ion energy. With lower ion energy, the silicon ion species are implanted in the gap fill material at a second depth that is shallower than the first depth. As a result, following the subsequent CMP process, dishing is improved since gap fill material implanted with silicon ion species shows a better result in dishing compared to gap fill material implanted with helium ion species. The depths of the first and second ion species may be determined by the amount of gap fill material to be removed by the CMP process. The first and second ion species may be any suitable ion species, such as silicon ion species, helium ion species, hydrogen ion species, nitrogen ion species, or other inert ion species, such as argon ion species. In some implementations, the first ion species are the same as the second ion species. The two implantation processes of the same ion species help to improve the uniformity of the implanted ion species.
[0028] Referring back to Figure 1 , at block 130, following the one or more ion implantation processes, the gap fill material may be annealed. Annealing of the gap fill material may be performed either in the deposition chamber, the ion implantation chamber, or a different annealing apparatus, such as a rapid thermal processing chamber. The annealing process may be performed at a temperature of about 500 degree Celsius. Water vapor may be provided during the annealing process to steam anneal the gap fill material. In one implementation, the gap fill material is silicon dioxide. It is believed that oxygen atoms in the steam may advantageously be incorporated into the silicon dioxide gap fill material by bonding to Si dangling bonds and increase the oxygen content of the silicon dioxide material. It is contemplated that the steam annealing process may also prevent shrinkage of the silicon dioxide material due to the availability of oxygen atoms for increased Si-0 bonding.
[0029] Following the annealing process, a CMP process is performed on the gap fill material, as shown in block 140. As described before, dishing caused by the CMP process is minimized by the addition of the one or more ion implantation processes in the process flow.
[0030] While the foregoing is directed to implementations of the present disclosure, other and further implementations of the disclosure may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.

Claims

Claims:
1 . A method for treating a gap fill material, comprising:
implanting a first ion species in the gap fill material using a first ion energy;
implanting a second ion species in the gap fill material using a second ion energy, wherein the first ion energy is greater than the second ion energy; annealing the gap fill material after exposure to the second ion species; and
performing a chemical mechanical polishing process on the gap fill material, wherein a dishing of the gap fill material is less than 8 nm.
2. The method of claim 1 , wherein the first ion species comprises silicon.
3. The method of claim 2, wherein the second ion species comprises helium.
4. The method of claim 1 , wherein the first ion species and the second ion species comprises same ion species.
5. The method of claim 1 , wherein the first ion species are implanted in the gap fill material at a first depth.
6. The method of claim 5, wherein the second ion species are implanted in the gap fill material at a second depth, wherein the second depth is shallower than the first depth.
7. A method for treating a gap fill material, comprising:
implanting helium ions in the gap fill material using a first ion energy; implanting silicon ions in the gap fill material using a second ion energy, wherein the first ion energy is greater than the second ion energy; annealing the gap fill material after exposure to the silicon ion species; and
performing a chemical mechanical polishing process on the annealed gap fill material.
8. The method of claim 7, wherein the annealing the gap fill material comprises steam annealing.
9. The method of claim 7, wherein the helium ion species are implanted at a temperature greater than 450 degrees Celsius.
10. The method of claim 7, wherein the implanting of helium ion species has a dosage of 1 x 1015 to about 5 x 1017 atoms per cm2.
1 1 . The method of claim 7, wherein the implanting of silicon ion species has a dosage of 1 x 1015 to about 5 x 1017 atoms per cm2.
12. A method for forming a gap fill material, comprising:
depositing a gap fill material on a substrate;
treating the gap fill material, the treating comprising:
implanting helium ions in the gap fill material using a first ion energy; and
implanting silicon ions in the gap fill material using a second ion energy, wherein the first ion energy is greater than the second ion energy;
annealing the gap fill material after exposure to the silicon ion species to form an annealed gap fill material; and
performing a chemical mechanical polishing process on the annealed gap fill material.
13. The method of claim 12, wherein the helium ion species are implanted in the gap fill material at a first depth.
14. The method of claim 13, wherein the silicon ion species are implanted in the gap fill material at a second depth, wherein the second depth is shallower than the first depth.
15. The method of claim 12, wherein the helium ion species are implanted at a temperature greater than 450 degrees Celsius.
PCT/US2016/054453 2015-10-23 2016-09-29 Gapfill film modification for advanced cmp and recess flow Ceased WO2017069923A1 (en)

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