WO2017067420A1 - 数据传输的方法、设备及系统 - Google Patents

数据传输的方法、设备及系统 Download PDF

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Publication number
WO2017067420A1
WO2017067420A1 PCT/CN2016/102163 CN2016102163W WO2017067420A1 WO 2017067420 A1 WO2017067420 A1 WO 2017067420A1 CN 2016102163 W CN2016102163 W CN 2016102163W WO 2017067420 A1 WO2017067420 A1 WO 2017067420A1
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Prior art keywords
dma
virtual address
address
host
memory address
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PCT/CN2016/102163
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English (en)
French (fr)
Inventor
王一静
缪勰
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP16856851.7A priority Critical patent/EP3361387B1/en
Priority to KR1020187012924A priority patent/KR102209452B1/ko
Publication of WO2017067420A1 publication Critical patent/WO2017067420A1/zh
Priority to US15/958,234 priority patent/US20180239726A1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/282—Cycle stealing DMA
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0831—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
    • G06F12/0835—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means for main memory peripheral accesses (e.g. I/O or DMA)
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1081—Address translation for peripheral access to main memory, e.g. direct memory access [DMA]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/109—Address translation for multiple virtual address spaces, e.g. segmentation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/62—Details of cache specific to multiprocessor cache arrangements
    • G06F2212/621—Coherency control relating to peripheral accessing, e.g. from DMA or I/O device
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/656—Address space sharing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/657—Virtual address space management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/28—DMA
    • G06F2213/2804—Systems and methods for controlling the DMA frequency on an access bus

Definitions

  • the present invention relates to the field of data transmission, and in particular, to a method, a device, and a data transmission system for performing DMA data transmission between an I/O device and at least one host device.
  • hosts In a distributed environment, in order to improve the scalability and utilization of I/O devices, there are often scenarios in which multiple hosts share I/O device resources. Multiple hosts share I/O resources, which can improve the overall efficiency of I/O resources. The host can dynamically apply and release resources according to requirements. At the same time, hosts can share data by sharing I/O resources to synchronize data information and status on different hosts.
  • DMA Direct Memory Access
  • the host allocates a DMA memory address space for the DMA operation, and the I/O device directly reads and writes data in the DMA memory address space, thereby completing the DMA mode data transmission.
  • the DMA operation is implemented by the DMA message, and the I/O device sends a DMA message to the host.
  • the DMA message contains the DMA address, and the DMA address is located in the DMA memory address space allocated by the host for the DMA operation.
  • the I/O device can directly read and write data on the DMA memory address space of the host.
  • the DMA packet is For the read message of the memory, the data is carried by the one or more completion command packets in response to the read message, and is copied from the memory to the I/O device; when the host reads the I/O device, as needed The size of the copied data.
  • the DMA packet generated by the I/O device is one or more write packets. The packet carries the copied data.
  • the write message reaches the DMA memory address space of the target host, and the data payload in the packet is copied. Go to the corresponding memory space. Due to the DMA operation, the data transfer process does not require the host CPU to participate, thereby achieving independent high-speed read and write of the host data by the I/O device.
  • the existing multi-host I/O resource sharing technology cannot effectively solve the problem that multiple hosts access the same I/O device under high-speed connection.
  • the host can access the external extended I/O resources at a high speed
  • the I/O device is still in an exclusive state, that is, one I/O device can only be used by one host at a time. access.
  • the IP network causes additional performance overhead loss due to network protocol layer processing, and is subject to network bandwidth. Limited, and there is a large delay, so it is not suitable for short-distance high-performance I / O data transmission applications.
  • the present invention provides a DMA data transmission method, device, and data transmission system between an I/O device and at least one host device, so that multiple hosts share the same I through DMA data transmission. /O devices to enable efficient data transfer and synchronization between multiple hosts and shared I/O devices.
  • an embodiment of the present invention provides a computer system including a plurality of hosts, one or more input/output I/O devices, and the plurality of hosts and the one or more A data transmission device to which an I/O device is connected.
  • the data transmission device maps the DMA memory addresses of the multiple hosts to the virtual address of the global virtual address space, and obtains a DMA message with a DMA virtual address sent by the host, and the DMA virtual in the DMA message The address is modified to the mapped DMA memory address, and the modified DMA message is sent to the target host.
  • the I/O device can perform DMA operations on multiple hosts through a DMA message including a DMA virtual address. Since the DMA virtual address is located in the same global virtual address space, the DMA memory address conflict is not sent relative to the prior art, thereby realizing that multiple hosts share the same I/O device.
  • the respective DMA memory addresses of the host form one or more DMA memory address intervals
  • the global virtual address space has a virtual address interval corresponding to the memory address interval of each host.
  • the host may send a DMA operation start request according to the target host DMA address information, thereby instructing the I/O device to initiate a DMA operation to the target host for data transmission.
  • a host in the system can obtain a DMA virtual address of another host, thereby sending a DMA operation start request to the I/O device with the DMA virtual address of the other host as a DMA address, thereby implementing the host.
  • the system can be instructed to perform data transmission with another host by the I/O device.
  • a host in the system can obtain the DMA memory address of another host by obtaining the DMA virtual address corresponding to the DMA memory address according to the corresponding relationship, thereby sending the I/O device to another host.
  • the DMA virtual address is a DMA operation start request of the DMA address, so that the host can instruct the I/O device to perform data transmission with another host through the system.
  • a host in the system can send a DMA operation start request to the data transmission device by sending the DMA memory address of the other host as the DMA address by acquiring the DMA memory address of the other host, and the data transmission device will The DMA memory address in the DMA operation start request is converted into a corresponding DMA virtual address and forwarded to the corresponding other host so that the host can instruct the I/O device to perform data transmission with another host through the system. Thereby, the system instructs the I/O device to perform data transmission with another host according to the DMA memory address of the other host.
  • a host in the system uses at least one DMA write operation command to enable the I/O device to perform DMA write operation to other hosts, thereby synchronizing the data to Other hosts.
  • the data transmission device determines that the DMA operation performed on the target host meets the permission requirement according to the operation type of the DMA message and the permission requirement of the target host, and performs the modification of the message when the content is met. send.
  • the DMA message further includes a permission identifier, and determines whether the content meets the permission requirement according to the operation type of the DMA message, the permission identifier, and the permission requirement of the target host, and reports when the content is met. Modification and transmission of the text. Through the access control, the security of the transmission system can be improved and the specific host can be forwarded.
  • an embodiment of the present invention provides a data transmission method, where the method is applied to a computer system in which a plurality of hosts share one or more input/output I/O devices, and the one or more I/O devices pass
  • the direct memory access DMA accesses the respective DMA memory addresses of the plurality of hosts, and the DMA memory addresses are mapped one by one to the virtual address of the global virtual address space. Mapping the DMA memory addresses of the plurality of hosts to the virtual address of the global virtual address space, and acquiring the DMA packet with the DMA virtual address sent by the host, and modifying the DMA virtual address in the DMA packet to The mapped DMA memory address, and the modified DMA message is sent to the target host.
  • the I/O device can perform DMA operations on multiple hosts through a DMA message including a DMA virtual address. Since the DMA virtual address is located in the same global virtual address space, the DMA memory address conflict is not sent relative to the prior art, thereby realizing that multiple hosts share the same I/O device.
  • the respective DMA memory addresses of the host form one or more DMA memory address intervals
  • the global virtual address space has a virtual address interval corresponding to the memory address interval of each host.
  • obtaining registration information of one or more hosts of the plurality of hosts including an identifier ID and a DMA memory address of the corresponding host, and allocating the host according to the DMA memory address of the host Virtual address and add or update to the corresponding relationship.
  • obtaining registration information of one or more hosts of the plurality of hosts including an identifier ID and a DMA memory address interval of the corresponding host, according to one or more DMA memory address intervals of the host Assigning one or more virtual address intervals to the host and adding or updating them to the corresponding relationship.
  • the update information is sent to the host, thereby instructing the host to synchronously update the stored in the host.
  • the DMA message further includes a permission identifier, and determines whether the content meets the permission requirement according to the operation type of the DMA message, the permission identifier, and the permission requirement of the target host, and reports when the content is met. Modification and transmission of the text. Through the access control, the security of the transmission system can be improved and the specific host can be forwarded.
  • the DMA memory address query command sent by the host may be accepted, and the DMA memory address corresponding to the host is obtained according to the correspondence between the DMA virtual address, the DMA memory address, and the host.
  • the DMA virtual address on the global virtual address space and then send the DMA virtual address to the host through the return message
  • a DMA operation start request sent by any host to an I/O device may be obtained, where the DMA operation start request includes a DMA memory address of another host, and is used to indicate the I/O device to The other host performs a DMA operation.
  • the DMA virtual address is determined with the DMA memory address, and the DMA memory address in the operation command is modified into a DMA virtual address and sent to the I/O device.
  • the present invention provides a data transmission method, wherein the method is applied to a plurality of hosts sharing one or more input/output I/O devices through a data transmission device, the one or more I
  • the /O device accesses the respective DMA memory addresses of the plurality of hosts by direct memory access DMA, and the DMA memory addresses are mapped one by one to the virtual address of the global virtual address space.
  • the DMA virtual address performs a DMA operation, and the DMA virtual address maps the DMA memory address of the target host to the DMA virtual address on the global virtual address space.
  • the DMA address information is a DMA memory address
  • a DMA operation start request including a DMA memory address of the destination host is sent to the data transmission device, instructing the data transmission device to initiate the DMA operation request.
  • the DMA address is modified by the target host's DMA memory address to the corresponding DMA virtual address on the global virtual address space, and the DMA operation start request is forwarded to the target host.
  • the DMA address information is the DMA memory address, according to the DMA virtual
  • the correspondence between the pseudo address, the DMA memory address, and the host acquires the DMA virtual address of the DMA of the target host, and sends the DMA operation start request including the DMA virtual address to the I/O device.
  • the DMA address information is the destination host DMA virtual address, and a DMA operation start request including the DMA virtual address is sent to the I/O device to instruct it to perform a DMA operation on the target host.
  • the host allocates a DMA memory address and sends a registration ID containing the host's identification ID and the host's DMA memory address.
  • the host allocates a DMA memory address range and sends registration information including the host's identification ID and the host's DMA memory address range.
  • the host acquires the update information including the DMA virtual address, the DMA memory address, and the correspondence between the hosts, and adds or updates the corresponding relationship to the existing DMA virtual address according to the update information. , the correspondence between the DMA memory address and the host.
  • an embodiment of the present invention provides a data transmission device, where the data transmission device is respectively connected to the multiple hosts and the one or more input/output I/O devices, the multiple hosts Sharing one or more I/O devices, the one or more I/O devices accessing respective DMA memory addresses of the plurality of hosts by direct memory access DMA, the device having the data transmission in the first aspect of the foregoing method
  • the corresponding function of the device and the function of the corresponding method in the second aspect may be implemented by hardware or by corresponding software implemented by hardware.
  • the hardware or software includes one or more modules corresponding to the functions described above.
  • an embodiment of the present invention provides a data transmission device, where the device is configured to share one or more input/output I/O devices, and the device has a host implemented in the first aspect of the foregoing method.
  • the functions may be implemented by hardware or by corresponding software implemented by hardware.
  • the hardware or software includes one or more modules corresponding to the functions described above.
  • an embodiment of the present invention provides a data transmission device, where the data transmission device is respectively connected to the multiple hosts and the one or more input/output I/O devices, the multiple hosts Sharing one or more I/O devices that access DMA via direct memory Accessing a respective DMA memory address of a plurality of hosts, the processor comprising a processor configured to support a device to perform a corresponding function of the data transmission device of the first aspect and a corresponding method of the second aspect, There are also transmitters and receivers in the structure of the apparatus for implementing instructions or information for transmitting or receiving the corresponding functions of the data transmission apparatus of the first aspect and the corresponding methods of the second aspect to interact with other apparatus.
  • the apparatus can also include a memory for coupling with the processor that retains the necessary program instructions and data.
  • an embodiment of the present invention provides a data transmission device, where the device is configured to share one or more input/output I/O devices, where the device includes a processor, and the processor It is configured to support the apparatus to perform the respective functions of the host in the first aspect described above and the corresponding methods in the third aspect.
  • transmitters and receivers in the structure of the apparatus for implementing instructions or information for transmitting or receiving the corresponding functions of the data transmission apparatus of the first aspect and the corresponding methods of the second aspect to interact with other apparatus.
  • the apparatus can also include a memory for coupling with a processor that retains program instructions and data necessary for the base station.
  • the DMA virtual address of the DMA packet is modified to the DMA memory address of the target host of the DMA operation, and the modified DMA is obtained.
  • the message is sent to the target host, and the I/O device can perform DMA operation on multiple hosts by using a DMA message including a DMA virtual address. Since the DMA virtual address has a one-to-one correspondence with the DMA memory address on the host and is located in the same global virtual address space, the DMA memory address conflict is not transmitted compared to the prior art. Since multiple hosts share the same I/O device, I/O resources are saved and the utilization of I/O devices is improved.
  • the DMA operation is used to manage the DMA operation, the reliability and security of the entire network data transmission are improved.
  • the permission control it is also possible to expand the scenarios used by the network, classify and manage different DMA operations, and implement more complicated network deployment and transmission methods.
  • FIG. 1 is a schematic diagram of a correspondence relationship between a DMA memory interval and a virtual address interval in an embodiment of the present invention
  • FIG. 2 is a schematic diagram of a network topology environment of a data transmission device according to an embodiment of the present invention
  • FIG. 3 is a schematic diagram of a hardware interconnection architecture of a network transmission device according to an embodiment of the present invention.
  • FIG. 4 is a schematic flow chart of a first data transmission method in an embodiment of the present invention.
  • FIG. 5 is a schematic flowchart of a specific implementation manner of a data transmission method according to an embodiment of the present disclosure
  • 6A is a schematic flowchart of a second data transmission method according to an embodiment of the present invention.
  • 6B is still another schematic flowchart of a second data transmission method according to an embodiment of the present invention.
  • FIG. 7 is a schematic flowchart of a third data transmission method in an embodiment of the present invention.
  • FIG. 8 is a schematic flowchart of an implementation process of performing authority control on a message according to an embodiment of the present invention.
  • FIG. 9 is a schematic flowchart of a fourth data transmission method according to an embodiment of the present invention.
  • FIG. 10 is a schematic structural diagram of a data transmission device according to an embodiment of the present invention.
  • FIG. 11 is another schematic structural diagram of a data transmission device according to an embodiment of the present invention.
  • FIG. 12 is a schematic flowchart diagram of a data transmission system according to an embodiment of the present invention.
  • FIG. 13 is a schematic flow chart of another data transmission system according to an embodiment of the present invention.
  • FIG. 14 is a schematic structural diagram of another data transmission device according to an embodiment of the present invention.
  • FIG. 15 is a schematic structural diagram of still another data transmission device according to an embodiment of the present invention.
  • Embodiments of the present invention provide a data transmission method between multiple hosts and I/O devices, so as to implement data transmission between multiple hosts and I/O devices through DMA, and reduce multiple hosts and hosts and I /O device time bandwidth usage and data latency, thereby improving the performance and stability of data transmission.
  • Embodiments of the present invention also provide corresponding devices and data transmission systems. The details are described below separately.
  • Global virtual address space In the present technique, multiple hosts share the same I/O device. As explained in the background, the DMA memory addresses of these hosts are conflicting on the I/O device.
  • the global virtual address space is independent of all hosts, and within this space, the user is an external I/O device.
  • the size of the global virtual address space is greater than or equal to the sum of the DMA memory addresses of all hosts connected to the I/O device. Therefore, the global virtual address space can map DMA memory addresses of different hosts into their own address space. Since the DMA memory addresses of different hosts are mapped into the unified global virtual address space, this solves the problem that the DMA addresses of different hosts are used when they are used on the same I/O device.
  • the DMA virtual address is a memory address located in the global virtual address space, and the DMA virtual address corresponds to the DMA memory address of a host.
  • the DMA address of the DMA message sent by the I/O device when performing DMA operation on the host is not the DMA memory address on the host, but the DMA virtual address.
  • the I/O device performs DMA operations on the global virtual address space through the DMA virtual address, so that when the I/O device is connected to multiple hosts, the DMA address conflict as described in the background art does not occur.
  • the present invention realizes DMA data transmission between the I/O device and the plurality of hosts by converting the DMA virtual address in the DMA message to the corresponding DMA memory address on the host.
  • Virtual address range In a possible scenario, the DMA memory address in the host is continuous. That is, one or more DMA memory address intervals are formed, and DMA memory address intervals of different hosts are mapped into the global virtual address space. Each DMA memory address interval corresponds to a virtual address space on the global virtual address space. Referring to FIG. 1, the correspondence between the DMA memory interval and the virtual address interval of the host can be more intuitively understood: as shown in the figure, the DMA memory address ranges of the host 1, the host 2, and the host 3 respectively correspond to the host in the global virtual address space. 1. Virtual address range of host 2 and host 3. The DMA memory address of the host 1 and the host 2 is in a continuous DMA memory address interval, so the mapped virtual address interval is also a continuous virtual address interval. The DMA memory address of the host 3 is distributed in three DMA memory address intervals, and different DMA memory address intervals are discontinuous. Therefore, three DMA memory address intervals respectively map three virtual address intervals. Virtual address
  • the interval is located in the global virtual address space, and the size of the virtual address interval is the size of the DMA memory address interval of the host, so that the DMA virtual address in the virtual address interval can be in one-to-one correspondence with the DMA memory address in the DMA memory address interval, and the global virtual address The space is greater than or equal to the sum of all virtual address ranges.
  • the present invention is applied to a distributed environment in which an I/O device is connected to at least one host device.
  • a distributed environment in order to improve the scalability and utilization of the I/O device, there are often multiple host shared I/Os.
  • the scenario of device resources Multiple hosts share I/O resources, which can improve the overall efficiency of I/O resources.
  • the host can dynamically apply and release resources according to requirements. 2 depicts a network topology environment in which the host 1, the host 2, and the host 3 are connected to the I/O device 1, the I/O device 2, and the I/O device 3 through data transmission devices.
  • PCIe Peripheral Component Interconnect Express
  • the device is connected to a PCIe device.
  • the data transmission device can implement the function of the PCIe hardware interconnection device.
  • the PCIe hardware interconnect architecture is implemented by the non-PCIe specification.
  • PCIe packet forwarding of interconnected devices multiple hosts can access the same PCIe device.
  • Host 1 and host 2 and host 3 share I/O devices as shown.
  • the hardware platform provides the ability to allow different hosts to access the same PCIe device externally.
  • the network topology environment and the hardware interconnection architecture to which the present invention is applied may have various changes and extensions to implement data transmission between the I/O device and at least one host in the present invention.
  • DMA operations include DMA write operations and DMA read operations.
  • DMA write operations can be used to copy data from the I/O device to the target host's DMA memory address, while DMA read operations can copy data from the target host's DMA memory address to I. /O device.
  • the DMA write operation includes the following steps:
  • the I/O device driver software According to the received DMA operation start request, the I/O device driver software generates an IO command packet, including the instruction information of the data in the DMA copy I/O device to the memory, the source data address and the target memory DMA address on the IO device. ;
  • the IO device receives the command packet, and generates one or more DMA write messages according to the size of the data to be copied.
  • the destination address of the packet is a memory DMA address, and the packet carries the copied data.
  • the DMA write message arrives at the physical memory space of the host, and the data payload in the message is copied to the corresponding target memory DMA address;
  • the DMA read operation includes the following steps:
  • the I/O device driver software According to the received DMA operation start request, the I/O device driver software generates an IO command packet, including the DMA copy memory data to the IO device instruction information, the IO device target address and the memory source data DMA address (in this In the invention, the DMA address of the target memory DMA address and the memory source data in the read operation in the foregoing write operation are collectively referred to as a DMA address);
  • the IO device receives the command packet and generates a memory read message (in the present invention, the aforementioned DMA write message and DMA read message are collectively referred to as DMA message), and the target address of the message is memory source data. DMA address and indicate the size of the data to be read;
  • the host memory controller receives the DMA read message, generates the completion message, and fills the specified memory data into the completed message payload, and returns the message to the IO device according to the IO device ID of the DMA read message. To copy data to the IO device. (It is worth noting that the completion of the message is not The DMA message referred to in the present invention)
  • FIG. 4 is a schematic flowchart of a first data transmission method according to an embodiment of the present invention. It should be noted that the method is applied to a computer system in which multiple hosts share one or more input/output I/O devices.
  • the one or more I/O devices access respective DMA memory addresses of the plurality of hosts by direct memory access DMA, and the DMA memory addresses are mapped one by one to a virtual address of the global virtual address space.
  • the implementation body of the method can have multiple implementations in the network topology.
  • the implementation body can be a separate data transmission device, or a data transmission module integrated on the I/O device, or a data transmission device integrated on a host and connected to other hosts and I/O devices.
  • the method of the embodiment of the present invention may include the following steps:
  • the DMA operation of the I/O device to the host is implemented by using a DMA message, that is, the DMA address in the DMA message is the DMA memory address of the destination host, and the target host is stored in the DMA memory address according to the DMA address.
  • the data is read and written.
  • the DMA address of the DMA message is a virtual address in the global virtual address space.
  • the virtual address corresponds to the DMA memory address of the target host.
  • the virtual address corresponding to the target host DMA memory address is actually read and written. Since the virtual address range is located in the same global virtual address space, when the I/O device performs DMA operations on multiple connected hosts, there is no problem of DMA memory address range conflict.
  • S402. Determine, according to a correspondence between a DMA virtual address, a DMA memory address, and a host, a DMA memory address corresponding to the DMA virtual address and a target host, where the DMA memory address is mapped to the DMA virtual address.
  • a DMA memory address the target host is a host where the DMA memory address mapped to the DMA virtual address is located
  • the DMA memory address corresponding to the DMA virtual address and the target host can be determined according to the DMA virtual address of the DMA message.
  • the manner of obtaining may be various, including but not limited to the following: according to the DMA virtual address of the DMA message, querying in the address translation table to obtain a target The DMA memory address of the host; or, by sending a query command to other devices, the DMA memory address of the returned target host is obtained; or, by a preset address translation rule, the DMA virtual address is converted into the DMA memory address of the target host.
  • the query instruction may be sent to other devices, such as the host where the management system is located, or other device having the DMA address translation function, and the query instruction includes the DMA virtual address with the query.
  • the device queries the DMA memory address corresponding to the DMA virtual address, and returns the DMA memory address by using an instruction. After the return instruction is obtained, the DMA memory address corresponding to the DMA virtual address can be obtained.
  • the DMA virtual address can be transferred to the target host's DMA memory address by a preset address translation rule.
  • the target host's DMA memory address is in a range, and the interval size is a uniform size.
  • the global virtual address space is also assigned a corresponding interval, and the interval is associated with The corresponding virtual address is successively arranged according to the host number from the start address of the global virtual address space, and the memory size of the difference between the DMA virtual address and the start address of the global virtual address space is divided by the size of the memory interval.
  • the obtained quotient is the number of the target host, and the remainder is the size from the start address of the target host's memory interval to the DMA memory address, so that the DMA memory address of the target host can be obtained.
  • the correspondence between the DMA virtual address, the DMA memory address, and the host includes: the DMA memory addresses of the plurality of hosts constitute a plurality of DMA memory address intervals, and each host corresponds to one or more a DMA memory address interval; the global virtual address space includes a plurality of virtual address intervals that do not overlap, the plurality of virtual address intervals are in one-to-one correspondence with the plurality of DMA memory address intervals, and the virtual address in the virtual address interval One-to-one correspondence with the DMA memory address in the corresponding DMA memory address range.
  • determining, according to the correspondence relationship, that the DMA memory address corresponding to the DMA virtual address and the target host are determined by querying the correspondence table.
  • the corresponding relationship table may directly include a correspondence between the DMA memory address, the DMA virtual address, and the corresponding host.
  • the corresponding relationship table may directly include a correspondence between the DMA memory address, the DMA virtual address, and the corresponding host.
  • the address translation table may include a host ID, a DMA memory address of the host, a DMA virtual address, and the like. When the table is looked up, the DMA memory address corresponding to the DMA virtual address may be directly obtained and correspondingly Host.
  • the address here can be a specific address or an address range.
  • the memory address in the DMA memory address interval and the virtual address in the DMA virtual address interval may be non-contiguous.
  • the address translation table may include a host ID, a DMA memory address range start address of the host, a virtual address interval start address, and an interval size.
  • the difference between the virtual address and the starting address of the virtual address interval can be obtained, according to the difference and the start of the host DMA memory address interval. Address, you can get the DMA memory address.
  • the virtual address interval and the memory address interval are consecutive, and the number of entries in the address translation table can be effectively reduced.
  • the address translation table is located on the address translation module hardware, implemented as a private register or device memory, or in the management system memory.
  • the query can be queried by directly accessing the address translation table; when located in the management system memory, and the management system is located on a non-local device, it can be sent by sending a query instruction with a virtual address.
  • the feedback instruction with the DMA memory address is accepted to obtain the DMA memory address.
  • the address translation table can be obtained by manually setting it in advance or by synchronizing with other devices located in the network.
  • the address translation table may be automatically generated or updated by: acquiring registration information of the host, where the registration information includes an identifier of the host and a DMA memory address range of the host; and DMA memory according to the host An address interval, the virtual address interval is allocated to the host, the virtual address interval is located in a global virtual address space, and an address in the virtual address interval corresponds to an address in a DMA memory address interval of the host; Corresponding relationship between the DMA memory address of the host and the virtual address interval is added to the address translation table or the corresponding relationship existing in the host in the address translation table is updated by the correspondence.
  • the registration information of the host may be sent by the host to the execution entity device of the method after the host accesses the network, or the registration information of the host accessing the network may be sent to the execution host device of the method by the management system.
  • the memory address range of the host can be through the memory address
  • the starting address and interval size are represented by a specific continuous or non-contiguous address or a collection of address intervals. Allocating a virtual address interval to the host, that is, assigning a virtual address interval corresponding to the size of the host according to the size of the memory address interval of the host, and adding the virtual address interval to the global virtual address space, or replacing the host with the virtual address interval A virtual address range that already exists on the global virtual address space. It can be understood that when the virtual address interval is allocated, the virtual address interval and the memory address interval of the host should be guaranteed to have a one-to-one correspondence.
  • the correspondence between the DMA virtual address, the DMA memory address, and the host is added or modified by acquiring registration information of one or more hosts of the multiple hosts, where the registration is performed.
  • the information includes an identifier ID and a DMA memory address of the corresponding host; the virtual address is allocated to the host according to the DMA memory address of the host, where the virtual address is located in a global virtual address space, and the virtual address is DMA with the host
  • the memory address is in one-to-one correspondence; the host ID, and the DMA memory address of the host and the virtual address correspondence are added or updated to a correspondence between the DMA virtual address, the DMA memory address, and the host.
  • the correspondence between the DMA virtual address, the DMA memory address, and the host is obtained by adding or modifying the multiple manners as follows.
  • Registration information of one or more hosts in the host the registration information includes an identifier ID and a DMA memory address interval of the corresponding host; and assigning one or more to the host according to one or more DMA memory address intervals of the host a virtual address interval, the virtual address interval is located in a global virtual address space, the one or more virtual address intervals are in one-to-one correspondence with one or more DMA memory address intervals of the host, and virtual in the virtual address interval
  • the address is in one-to-one correspondence with the DMA memory address in the corresponding DMA memory address interval; adding or updating the correspondence between the host ID and the DMA memory address interval of the host and the virtual address interval to the DMA virtual address , the correspondence between the DMA memory address and the host.
  • the update information may be sent to the host actively after the address translation table is updated, or after receiving the query command sent by the host, it is determined whether the corresponding relationship is updated, and if the update occurs, the main information is updated.
  • the machine sends an update message.
  • the update information may be sent to all hosts, or may be sent to some specific hosts or to the host where the management system is located.
  • the update of the correspondence relationship may be completed by the data transmission device, or may be completed by a management system in the network, or by any host.
  • the following is a specific implementation manner for creating or updating a correspondence relationship.
  • the correspondence relationship is stored by the address translation table, and the address translation table is updated by the host in the network, and the updated address is converted.
  • the table is synchronized to other devices.
  • the host communicates with the data transmission device and the I/O device via the PCIe bus. This implementation includes the following steps:
  • the host enumerates the PCIe device object of the data transmission device
  • the host uses the local DMA address and the I/O device ID as inputs, and allocates a virtual address interval;
  • the host where the DMA memory address is located may be obtained at the same time, so that the modified DMA message is sent to the host. Since the DMA operation is initiated or executed by the DMA message, the DMA message sent by the I/O device is sent to the destination.
  • the standard host, I / O device can achieve DMA operation on the target host.
  • the data transmission device 503 acquires the DMA message 502 sent by the I/O device 501.
  • the DMA address of the DMA message 502 is the DMA virtual address 0xabcd, and the virtual address is located in the global virtual address space.
  • the correspondence is stored by the address translation table, and the address allocation and query are performed by the aforementioned virtual address interval.
  • the data transmission device 503 queries the address translation table according to the virtual address, and can locate the entry 504, that is, the virtual address is located in a virtual address interval with a starting address of 0xa000 and a size of 1G.
  • the virtual address interval corresponds to a DMA memory address having a starting address of 0x0 and a size of 1G on the host 3. Therefore, according to the difference bcd between the start address of the virtual address interval and the virtual address, and the start address of the DMA memory address of the host 3, the DMA memory address corresponding to the virtual address in the DMA memory address range of the host 3 can be obtained. Is 0x0bcd.
  • the DMA address in the DMA message 502 is modified from the virtual address 0xabcd to the DMA memory address 0x0bcd on the host 3 to obtain the modified DMA message 505.
  • the DMA message 505 is sent to the host 3, causing the I/O device to initiate or perform a DMA operation on the DMA memory address on the host 3.
  • the DMA virtual address of the DMA message is modified to the DMA memory address of the target host of the DMA operation by acquiring the DMA message sent by the I/O device, and the modification is performed.
  • the subsequent DMA message is sent to the target host, and the I/O device can perform DMA operation on multiple hosts by using a DMA message including a DMA virtual address.
  • the DMA virtual addresses are located on the same global virtual address space, DMA memory address conflicts are not sent relative to the prior art.
  • data transmission can be performed simultaneously between multiple hosts and I/O devices, data transfer between hosts can be realized by DMA operations of I/O devices without network transmission between hosts. Because the link bus of the host and the I/O device has the characteristics of high bandwidth and low delay, and does not require the intervention of the host CPU, the timeliness and efficiency of the network transmission are improved, and the scenario of the network application is expanded.
  • the DMA virtual address is obtained, and the correspondence between the DMA virtual address, the DMA memory address, and the host is obtained by the target host.
  • the DMA virtual address query can be efficiently performed.
  • improve the execution efficiency of modifying the DMA address of the DMA message when the correspondence is stored in the remote management system, the data transmission can be simplified
  • the hardware complexity of the device expands and enriches the specific implementation of the data transmission device.
  • the host by sending update information to the host after the corresponding relationship is updated, the correspondence between the host and the address translation table in the data transmission device may be updated synchronously. Therefore, the host can independently perform mutual conversion between the DMA virtual address and the corresponding DMA memory address, thereby expanding the application scenario of the present invention.
  • FIG. 6A and FIG. 6B are schematic flowcharts of a second data transmission method according to an embodiment of the present invention. This embodiment will be described in conjunction with the first embodiment.
  • the method of this embodiment includes the steps S401, S402, and S403 in the first embodiment, and thus the description is the same as or similar to the step, in this embodiment. I won't go into details here.
  • the DMA operation can be initiated by the host by sending a DMA operation initiation request to the I/O device, the DMA operation initiates the DMA memory address contained in the request, thereby instructing the I/O device to initiate a DMA operation to the DMA memory address.
  • the I/O needs to initiate a DMA operation to the DMA virtual address, that is, to send a DMA message with the DMA virtual address as the DMA address. Therefore, the DMA operation start request accepted by the I/O device should also be the DMA virtual address.
  • the DMA operation start request sent by the host to the I/O device can be directly a DMA virtual address, so that the I/O device can receive the DMA operation start request including the DMA virtual address.
  • the host may locally store the corresponding update relationship with the data transmission device by using the method provided in the first embodiment, so as to obtain the DMA virtual address in the DMA operation start request by the corresponding relationship;
  • the DMA virtual address can also be obtained by sending a query command to another device storing the address translation table.
  • the DMA operation start request sent by the host to the I/O device may also be the DMA memory address of the target host, and the DMA memory address in the operation command is modified to the corresponding DMA virtual by sending an operation command to the data transmission device. Address and send the modified DMA operation start request to the I/O device.
  • the data transmission device may feed back a query command to the host by using the following method.
  • the data transmission method further includes
  • S601 Receive a query command sent by the host, where the query command includes a DMA memory address of the host that needs to be queried;
  • S602 Acquire, according to a correspondence between a DMA virtual address, a DMA memory address, and a host, a DMA virtual address on the global virtual address space corresponding to a DMA memory address of the host;
  • S603 Send a return message to the host, where the return message includes a DMA virtual address in a global virtual address space corresponding to the DMA memory address of the host.
  • Obtaining a DMA virtual address on the global virtual address space corresponding to the DMA memory address of the target host has multiple implementation manners, and the obtaining manner is the same as the foregoing obtaining the DMA memory address corresponding to the DMA virtual address. I won't go into details here.
  • the manner of obtaining the DMA virtual address corresponding to the DMA memory address can be implemented by querying the address translation table.
  • the obtaining the DMA virtual address on the global virtual address space corresponding to the DMA memory address of the target host includes: querying in the address translation table according to the DMA memory address of the target host, acquiring the target host a DMA virtual address on a global virtual address space corresponding to the DMA memory address, the address translation table including a virtual address in the virtual address interval on the global virtual address space and a DMA of a host corresponding to the virtual address interval Correspondence of memory addresses in the memory address range;
  • the address translation table may be the address translation table in the foregoing first method embodiment, or may be a separate address translation table optimized for querying the corresponding DMA virtual address according to the DMA memory address.
  • the target host's DMA memory address is 0x0bcd.
  • the host DMA memory address with a memory start address of 0x0 and a size of 1G can be located.
  • the start address of the DMA virtual address interval corresponding to the entry is 0xa000. Therefore, according to the difference between the DMA memory address and the memory start address, and the start address of the DMA virtual address interval, the corresponding DMA can be obtained.
  • the virtual address is 0xabcd.
  • the data transmission device may acquire a DMA operation initiation request sent by the host, and modify it and forward it to the I/O device.
  • the data transmission method further includes:
  • S606 sends the modified DMA operation start request to the I/O device.
  • the DMA virtual address in the global virtual address space corresponding to the DMA memory address of the target host is obtained by receiving the query command sent by the host, and the return message is sent to the host.
  • the host is caused to obtain a DMA virtual address corresponding to the DMA memory address, so that a DMA operation start request including the DMA virtual address can be sent, instructing the I/O device to initiate a DMA operation on the DMA memory address corresponding to the DMA virtual address.
  • the I/O device by acquiring a DMA operation start request sent by the host to the I/O device, modifying the DMA memory address of the target host of the DMA operation start request to a DMA virtual address on the corresponding global virtual address space;
  • the modified DMA operation start request is sent to the I/O device, so that the DMA operation start request sent by the host can be used to instruct the I/O device to initiate a DMA virtual address for the DMA memory address corresponding to the DMA virtual address.
  • FIG. 7A is a schematic flowchart of a third data transmission method according to an embodiment of the present invention. This embodiment will be described with reference to the first embodiment and the second embodiment.
  • the method in this embodiment includes the steps S401, S402, and S403 in the first embodiment, and may include the S601 in the second embodiment.
  • -S606 step so the description of the same or similar to the step is not repeated in this embodiment.
  • the DMA message sent by the I/O device for performing DMA operation on the destination host may be controlled. That is, after receiving the DMA message, the data transmission device determines whether the DMA operation of the DMA message to the destination host meets the permission requirement, and when the DMA message has the DMA operation permission to the destination host, DMA address of the DMA message to modify.
  • the method further includes:
  • Determining whether the DMA operation performed on the target host meets the permission requirements may be implemented in various manners. For example, it may be determined by querying the identifier of the individual host and the permission table corresponding to the DMA operation type; or, when the foregoing correspondence is met; The relationship is stored in the address translation table, and the address conversion table can be queried to determine whether the permission requirement is met.
  • the address translation table adds an operation type item compared to the foregoing address translation table. When the DMA virtual address is located to the entry in the address translation table, the type of DMA operation that can be performed by the destination host corresponding to the virtual address interval in which the DMA virtual address is located can be obtained.
  • At least one of the following information is included: a type of the DMA message, a permission identifier of the DMA message, and an identifier of a host that sends the DMA message.
  • the privilege identifier is an identifier used to identify the feature of the message in which the DMA operation authority is associated.
  • the privilege identifier may be information that already exists in a general DMA packet.
  • the privilege identifier may refer to an identifier of an I/O device that sends the DMA packet, and the specific I/O device may be implemented by determining the privilege identifier.
  • the privilege identifier may also be information that does not exist in the newly added general DMA message, for example, the privilege identifier may be an identification ID of the type of data to be transmitted by the DMA operation, thereby The I/O device can transmit a specific data type to a specific host through DMA, or the permission identifier can be an identification ID of the host that instructs the I/O device to initiate a DMA operation, thereby implementing a specific host with permission initiation I.
  • the /O device performs DMA operations on a particular host.
  • the permission identifier may be an identification ID of a single information as listed above, or may be an identification ID after combining several kinds of information, for example.
  • the privilege identifier can be used to identify a DMA message transmitted by a particular I/O device that transmits a particular data type.
  • determining whether the DMA operation performed on the target host meets the permission requirement may be implemented in various manners.
  • the privilege table including the host ID, the privilege identifier, and the corresponding DMA operation type may be queried to determine whether the privilege requirement is met;
  • the address translation table is queried to determine whether the privilege requirement is met, and the address translation table increases the operation type and the privilege identifier compared to the foregoing address translation table.
  • an example of controlling the rights of the message after adding the operation type and the permission identifier in the address translation table is as follows: the data transmission device acquires the DMA message 802 and the DMA message 802 sent by the I/O device.
  • the DMA address is DMA virtual address 0xabcd, and the ID is 0001.
  • the starting address of the virtual address interval corresponding to the DMA virtual address can be located as 0xa000, the space size is 1G, and the corresponding memory interval of the host is the starting address of the host 1 is 0x0, and the size is 1G. Memory space.
  • the DMA operation authority of the identification ID to the host 1 is R, that is, the DMA message with the identification ID of 0001 can only initiate a read operation to the DMA memory interval of the host 1. Therefore, when the operation type of the DMA message 802 is a write operation, the data transfer device modifies the DMA address of the DMA message 802 and sends it to the host 1 in accordance with the permission requirement.
  • the authority control when the I/O device performs the DMA operation on the host can be realized. Since the I/O device is connected to multiple hosts at the same time, the reliability and security of the entire network data transmission can be improved by the authority control. In addition, through the access control, you can also expand the scenarios used by the network to achieve more complex network deployment and transmission methods.
  • FIG. 9 is a schematic flowchart diagram of a fourth data transmission method according to an embodiment of the present invention.
  • This embodiment will be described in conjunction with the first, second, and third embodiments, and concepts or terms that have appeared in the foregoing embodiments appearing in the present embodiment and have the same meaning or similar, are in this embodiment. No more details will be made.
  • the method of this embodiment corresponds to some steps of the method in the foregoing embodiment. Therefore, the present embodiment can be understood and expanded in combination with the related steps in the foregoing embodiments.
  • the execution body of the data transmission method provided by this embodiment is a host in the network topology described in FIG. 2, which represents an independent physical host, runs an independent OS, and has an independent DMA address space.
  • the method is used to implement a host to instruct an I/O device to perform a DMA operation on a target host, and the method includes the following steps:
  • the target host refers to the host that the host executing the method is to instruct the I/O device to perform the DMA operation, that is, the host where the DMA memory address corresponding to the DMA virtual address in the DMA message sent by the I/O device for the DMA operation is located.
  • the target host is the host itself that executes the method, and the host instructs the I/O device to initiate a DMA operation to the host, thereby implementing data exchange between the host and the I/O device;
  • the target host is a host other than the host connected to the same I/O device, the host instructs the I/O device to initiate a DMA operation to other hosts, thereby implementing the I/O device and other Data exchange between hosts.
  • the DMA address information may be the DMA memory address information of the target host or the DMA virtual address information.
  • the DMA memory address information can be obtained by allocating the DMA memory address range; when the target host is another host, the DMA memory address or DMA of the target host can be obtained by querying the address translation table.
  • the virtual address can also be obtained by receiving a DMA memory address or a DMA virtual address included in a request command sent by another device.
  • DMA operations by I/O devices can be initiated by DMA operation initiation requests.
  • a DMA operation start request can be sent to the I/O device.
  • the DMA operation start request includes a memory address where the data read by the I/O device or a memory address used to store the data sent by the I/O device.
  • the I/O device After receiving the DMA operation start request, the I/O device initiates a DMA operation to the memory address to read the data or Write to complete the data exchange.
  • the DMA operation start request can be used not only to instruct the I/O device to perform DMA operations with the local machine, but also to instruct I/ The O device performs DMA operations with other hosts.
  • the host can perform DMA mode data exchange between the host and the I/O device and between the host and the host through the embodiment.
  • the sending the DMA operation start request according to the DMA address information of the target host includes sending the DMA operation start request to the data a DMA address of the DMA operation start request is a DMA memory address of the target host, to indicate that the data transfer device modifies the DMA address in the DMA operation start request from the target host's DMA memory address to A corresponding DMA virtual address on the global virtual address space, and forwarding the DMA operation start request to the target host.
  • the host will use the DMA memory address as the DMA address of the DMA operation indicated by the DMA operation initiation request. Since the DMA message sent by the DMA operation of the I/O device needs to be a DMA virtual address, the DMA operation start request is sent to the data transmission device, and the DMA operation in the DMA operation start request is requested by the data transfer device. The address is converted into a corresponding DMA virtual address, and the converted DMA operation start request is sent to the I/O device.
  • the sending the DMA operation start request according to the DMA address information of the target host includes: the DMA address according to the target host
  • the sending a DMA operation start request includes: acquiring, according to a correspondence between the DMA virtual address, the DMA memory address, and the host, a DMA virtual address on the global virtual address space corresponding to the DMA memory address of the target host,
  • the DMA operation start request is sent to the I/O device, and the DMA address of the DMA operation start request is the DMA virtual address.
  • the memory address of the target host querying in the address translation table to obtain a virtual address corresponding thereto can be understood in combination with the query method provided in the foregoing embodiment.
  • the memory address range of the address is 0x0
  • the memory address space of size 1G the memory address space of size 1G
  • the starting address of the corresponding virtual address range is 0xa000. Therefore, the virtual address corresponding to the memory address should be 0xabcd.
  • the DMA operation start request may be directly sent to the I/O device connected thereto; or may be forwarded by other devices, including the data transfer device, to initiate the DMA operation request. Send to an I/O device connected to the interconnect.
  • the sending the DMA operation start request according to the DMA address information of the target host includes: sending the DMA operation start request to the I/O
  • the DMA address of the DMA operation is a DMA virtual address on a global virtual address space corresponding to the DMA memory address of the target host.
  • a DMA operation start request when sent to an I/O device, it may be directly sent to the I/O device connected to it by the DMA operation start request; or forwarded by other devices, including the data transfer device, to the DMA An operation start request is sent to the I/O device connected to the connection.
  • the host allocates a DMA memory address, where the DMA memory address is used by one or more I/O devices to access the DMA memory address by direct memory access DMA, and send registration information.
  • the registration information includes the identification ID of the host and the DMA memory address of the host.
  • the host may send the registration information after accessing the network or reassigning the memory address interval, and may send the registration information to the data transmission device or to the host where the management system is located to update the corresponding relationship stored by the data transmission device or other host. .
  • the host allocates a DMA memory address interval, and the DMA memory address interval is composed of a DMA memory address for one or more I/O devices to access the DMA by direct memory access. Describe the DMA memory address. And sending registration information, the registration information including the identification ID of the host and the DMA memory address range of the host. The host may send the registration information after accessing the network or reassigning the memory address interval, and may send the registration information to the data transmission device or to the host where the management system is located to update the corresponding relationship stored by the data transmission device or other host.
  • the host may also update the address translation stored locally.
  • the table thereby keeping the local address translation table synchronized with the address translation table of the data transfer device.
  • the method further includes: acquiring update information, where the update information includes a DMA virtual address, a DMA memory address, and a correspondence between the hosts that are to be updated; and the DMA virtual address and the DMA memory address to be updated according to the update information.
  • the correspondence with the host is added or updated to the correspondence between the existing DMA virtual address, the DMA memory address, and the host.
  • the specific representation of the correspondence between the DMA memory address interval and the virtual address interval of the host in the update information should correspond to it.
  • the implementation form of the specific address translation table can be referred to the manner enumerated in the first embodiment.
  • the update information can come from the data transfer device or from other devices on the network, such as the host where the management system is located, or other host connected to the host.
  • the DMA operation start request is sent by acquiring the DMA address information of the target host and according to the DMA address information of the target host, so that the I/O device initiates a DMA operation on the target host.
  • data transfer between the I/O device and the target host can be managed.
  • the I/O device functions as a data storage device, it can also implement fast data synchronization between the host and the target host through the I/O device, thereby improving network transmission efficiency.
  • FIG. 10 is a schematic structural diagram of a data transmission device 1001 according to an embodiment of the present invention.
  • the data transmission device provided in this embodiment can be used to perform the methods of the first, second, and third embodiments of the foregoing embodiments. Therefore, the present embodiment can be understood in conjunction with the foregoing embodiments, and the concepts or terms that have the same or similar meanings have been described in the foregoing embodiments, which are not described in this embodiment.
  • the data transmission device functions as a data transmission device in the network topology described in FIG. 2.
  • the device can be a stand-alone device connected to the host and I/O devices respectively; it can also be a module integrated on the I/O device, or integrated on a host, with other hosts and I/O devices. Connected modules, That is, as long as it is satisfied to connect with the host and I/O in the network topology.
  • the device can be connected to the host and the I/O device through a high-speed bus, such as a PCIe bus.
  • a virtual PCIe device is enumerated, and the hardware resources of the virtual PCIe device are corresponding to the shared PCIe I/O device.
  • Data transmission device 1001 is respectively coupled to the plurality of hosts and the one or more input/output I/O devices, the plurality of hosts sharing one or more I/O devices, the one or more I
  • the /O device accesses the DMA memory addresses of the plurality of hosts by direct memory access DMA, and the DMA memory addresses are mapped one by one to the virtual address of the global virtual address space, and the device includes:
  • the receiving module 1002 is configured to acquire a DMA message sent by the I/O device, where the DMA message carries a DMA virtual address, where the DMA virtual address is a virtual address in the global virtual address space;
  • the conversion module 1003 is configured to determine, according to a correspondence between a DMA virtual address, a DMA memory address, and a host, a DMA memory address corresponding to the DMA virtual address and a target host, where the DMA memory address is mapped to the DMA a DMA memory address on the virtual address, the target host being a host to which the DMA memory address mapped to the DMA virtual address is located; and modifying the DMA virtual address in the DMA message to be mapped to the The DMA memory address of the DMA virtual address;
  • the sending module 1004 sends the modified DMA message to the target host.
  • the conversion module determines, according to the correspondence between the DMA virtual address, the DMA memory address, and the host, the DMA virtual address corresponding to the DMA virtual address and the target host, the DMA virtual address.
  • Corresponding relationship between the DMA memory address and the host includes: the DMA memory addresses of the plurality of hosts constitute a plurality of DMA memory address intervals, and each host corresponds to one or more DMA memory address intervals; the global virtual address space Include a plurality of virtual address intervals that do not overlap, the plurality of virtual address intervals are in one-to-one correspondence with the plurality of DMA memory address intervals, and the virtual address in the virtual address interval and the DMA memory address in the corresponding DMA memory address interval One-to-one correspondence.
  • the correspondence between the DMA virtual address, the DMA memory address, and the host may be stored by using an address translation table.
  • the address translation table is the address described in the foregoing method embodiment.
  • the conversion table, the address translation table may be stored in a memory or a register of the data transmission device, and is queried by the conversion module 1003; when the data transmission device is not an independent node in the network topology, the address translation table is also It can be stored in the memory or register of the host or I/O device where the data transmission device is located, and the sneak and query can be performed through the conversion module 1003.
  • the address translation table can be obtained by manually setting it in advance or by synchronizing with other devices located in the network.
  • the receiving module is further configured to acquire registration information of one or more hosts of the multiple hosts, where the registration information includes an identifier ID and a DMA memory address of the corresponding host;
  • the device further includes a virtual address maintenance module, configured to allocate a virtual address to the host according to the DMA memory address of the host, where the virtual address is located in a global virtual address space, the virtual address and a DMA memory address of the host One-to-one correspondence; and adding or updating the host ID, the DMA memory address of the host, and the virtual address correspondence to a correspondence relationship between the DMA virtual address, the DMA memory address, and the host.
  • the receiving module is further configured to acquire registration information of one or more hosts of the multiple hosts, where the registration information includes an identifier ID and a DMA memory address interval of the corresponding host;
  • the device further includes a virtual address maintenance module, configured to allocate one or more virtual address intervals to the host according to one or more DMA memory address intervals of the host, where the virtual address interval is located in a global virtual address space.
  • the one or more virtual address intervals are in one-to-one correspondence with one or more DMA memory address intervals of the host, and the virtual addresses in the virtual address interval are in one-to-one correspondence with the DMA memory addresses in the corresponding DMA memory address intervals; And adding or updating the correspondence between the host ID and the DMA memory address interval of the host and the virtual address interval to a correspondence relationship between the DMA virtual address, the DMA memory address, and the host.
  • the registration information of the host may be sent by the host to the execution entity device of the method after the host accesses the network, or the registration information of the host accessing the network may be sent to the execution host device of the method by the management system.
  • the memory address range of the host may be represented by the start address and the interval size of the memory address, or by a specific continuous or non-contiguous address or a collection of address intervals. Assign a virtual address interval to the host, that is, allocate a virtual address interval corresponding to the size of the memory address range of the host, and add the virtual address interval to the global virtual address space, or use the The virtual address interval replaces the virtual address interval that the host belongs to in the global virtual address space. It can be understood that when the virtual address interval is allocated, the virtual address interval and the memory address interval of the host should be guaranteed to have a one-to-one correspondence.
  • the corresponding relationship may be synchronously updated to the host: the sending module is further configured to: when the correspondence between the DMA virtual address, the DMA memory address, and the host is updated, to the host Sending update information to instruct the host to synchronously update a correspondence between the DMA virtual address, the DMA memory address, and the host stored in the host.
  • the update information may be part of the information that changes in the correspondence relationship, and the update information may be used for the synchronization update of the device that has stored the corresponding relationship before the update; or may be a complete address translation table.
  • the update information may be sent to the host actively after the address translation table is updated, or after receiving the query command sent by the host, determine whether the address translation table is updated, and if the update occurs, send the update information to the host.
  • the update information may be sent to all hosts, or may be sent to some specific hosts or to the host where the management system is located.
  • the data transmission device 1108 receives the DMA message 1101 sent by the I/O device through the PCIe bridge 1102, and the DMA address of the DMA message 1101 is a virtual address.
  • the PCIe bridge transfers the DMA message 1101 to the DMA address translation logic module 1103.
  • the DMA address translation logic module includes a processing chip 1104 and a register 1105.
  • the processing chip 1104 accesses the address translation table 1106 stored in the register 1105, and the DMA according to the DMA message 1101.
  • the virtual address obtains a DMA memory address corresponding to the virtual address, and the DMA address of the DMA message 1101 is modified from the virtual address to the memory address to obtain a modified DMA message 1107.
  • the DMA address translation logic module 1103 transfers the modified DMA message 1107 to the PCIeDMA engine 1108, which sends the DMA message 1101 to the target host by the PCIe DMA engine 1108, thereby causing the I/O device to initiate a DMA operation to the target host.
  • the PCIe bridge and the PCIeDMA engine may implement the receiving module and the transmitting module of the foregoing embodiments.
  • the network transmission device 1001 modifies the DMA virtual address of the DMA message to the DMA memory address of the target host of the DMA operation by acquiring the DMA message sent by the I/O device, and The modified DMA message is sent to the target host, and the I/O device can perform DMA on multiple hosts by using a DMA message including a DMA virtual address. operating. Since the DMA virtual addresses are located on the same global virtual address space, DMA memory address conflicts are not sent relative to the prior art. Since data transmission can be performed simultaneously between multiple hosts and I/O devices, data transfer between hosts can be realized by DMA operations of I/O devices without network transmission between hosts. Because the link bus of the host and the I/O device has the characteristics of high bandwidth and low delay, and does not require the intervention of the host CPU, the timeliness and efficiency of the network transmission are improved, and the scenario of the network application is expanded.
  • the correspondence between the address translation table and the data transmission device in the host may be synchronously updated. Therefore, the host can independently perform mutual conversion between the DMA virtual address and the corresponding DMA memory address, thereby expanding the application scenario of the present invention.
  • the network transmission device may further feed back a query command sent by the host: the receiving module is further configured to: receive a query command sent by the host, and transmit the query command to the virtual address query module, where The query command includes the DMA memory address of the target host that needs to be queried;
  • the device further includes a virtual address query module, configured to acquire a query command transmitted from the receiving module, and query a DMA virtual address corresponding to the global virtual address space according to the DMA memory address of the target host, and the global The DMA virtual address on the virtual address space is transmitted to the sending module;
  • a virtual address query module configured to acquire a query command transmitted from the receiving module, and query a DMA virtual address corresponding to the global virtual address space according to the DMA memory address of the target host, and the global The DMA virtual address on the virtual address space is transmitted to the sending module;
  • the sending module is further configured to: obtain a DMA virtual address in the global virtual address space transmitted by the virtual address query module, and send a return message to the host, where the return packet includes the global virtual address The DMA virtual address on the space.
  • Obtaining a DMA virtual address on the global virtual address space corresponding to the DMA memory address of the target host has multiple implementation manners, and the obtaining manner is the same as the foregoing obtaining the DMA memory address corresponding to the DMA virtual address. I won't go into details here.
  • the network transmission device may further implement modification and forwarding of a DMA operation initiation request sent by the host:
  • the receiving module is further configured to: acquire a DMA operation start request sent by any one host to the I/O device, where the DMA operation start request includes a DMA memory address of another host, the DMA An operation start request is used to instruct the I/O device to perform a DMA operation to the another host;
  • the conversion module is further configured to: determine, according to a correspondence between the DMA virtual address, the DMA memory address, and the host, the DMA on the global virtual address space corresponding to the DMA memory address in the DMA operation start request a virtual address; and modifying the DMA memory address in the DMA operation initiation request to the determined DMA virtual address
  • the sending module is further configured to: send the modified DMA operation start request to the I/O device device.
  • obtaining a DMA virtual address on the global virtual address space corresponding to the DMA memory address of the target host has multiple implementation manners, and the acquisition manner is the same as the foregoing DMA memory address corresponding to the DMA virtual address. The same, no longer repeat here.
  • the data transmission acquires a DMA virtual address in a global virtual address space corresponding to the DMA memory address of the target host by receiving a query command sent by the host, and sends a return report to the host.
  • the host obtains a DMA virtual address corresponding to the DMA memory address, so that a DMA operation start request including the DMA virtual address can be sent, instructing the I/O device to initiate DMA to the DMA memory address corresponding to the DMA virtual address. operating.
  • the I/O device by acquiring a DMA operation start request sent by the host to the I/O device, modifying the DMA memory address of the target host of the DMA operation start request to a DMA virtual address on the corresponding global virtual address space;
  • the modified DMA operation start request is sent to the I/O device, so that the DMA operation start request sent by the host can be used to instruct the I/O device to initiate a DMA virtual address for the DMA memory address corresponding to the DMA virtual address.
  • the network transmission device may also implement permission control on the DMA message.
  • the converting module is further configured to: after determining the DMA memory address and the target host corresponding to the DMA virtual address, determining according to the operation type of the DMA message and the permission requirement of the target host The DMA operation performed on the target host meets the permission requirement, and if so, the DMA virtual address of the DMA message is modified to the DMA memory address of the target host of the DMA operation.
  • Determining whether the DMA operation performed on the target host meets the permission requirements may be implemented in various manners, for example, by querying a separate permission table including the host ID and the corresponding DMA operation type. To determine whether the permission requirement is met; or, query the address translation table to determine whether the permission requirement is met, and the address conversion table increases the operation type item compared to the foregoing address conversion table.
  • the type of DMA operation that can be performed by the destination host corresponding to the virtual address interval in which the DMA virtual address is located can be obtained.
  • the DMA message further includes the privilege identifier; the converting module is further configured to: after determining the DMA memory address and the target host corresponding to the DMA virtual address, according to the DMA The operation type of the message, the permission identifier, and the permission requirement of the target host determine whether the DMA operation performed by the DMA message including the permission identifier on the target host meets the permission requirement, and if yes, The DMA virtual address of the DMA message is modified to the DMA memory address of the target host of the DMA operation.
  • the privilege identifier is an identifier used to identify the feature of the message in which the DMA operation authority is associated.
  • the privilege identifier may be information that already exists in a general DMA packet.
  • the privilege identifier may refer to an identifier of an I/O device that sends the DMA packet, and the specific I/O device may be implemented by determining the privilege identifier.
  • the privilege identifier may also be information that does not exist in the newly added general DMA message, for example, the privilege identifier may be an identification ID of the type of data to be transmitted by the DMA operation, thereby The I/O device can transmit a specific data type to a specific host through DMA, or the permission identifier can be an identification ID of the host that instructs the I/O device to initiate a DMA operation, thereby implementing a specific host with permission initiation I.
  • the /O device performs DMA operations on a particular host.
  • the permission identifier may be an identification ID of a single information as listed above, or may be an identification ID after combining several kinds of information.
  • the permission identifier may be used to identify a specific I/O device to send. Transfer DMA messages of a specific data type.
  • the authority control when the I/O device performs the DMA operation on the host can be realized. Since the I/O device is connected to multiple hosts at the same time, the reliability and security of the entire network data transmission can be improved by the authority control. In addition, through the access control, you can also expand the scenarios used by the network to achieve more complex network deployment and transmission methods.
  • the present invention provides an embodiment of a data transmission system.
  • the data transmission system provided in this embodiment includes the apparatus that can perform the foregoing first, second, third, and fourth method embodiments. Therefore, the embodiment can be understood in combination with the foregoing embodiment, in this embodiment.
  • Concepts or terms that have appeared in the foregoing embodiments and have the same or similar meanings are not described in this embodiment.
  • the system includes at least one host, the computer system includes a plurality of hosts, one or more input/output I/O devices, and the plurality of hosts and the one or more A data transmission device to which an I/O device is connected.
  • the data transmission device is configured to map the DMA memory addresses of the multiple hosts to the virtual address of the global virtual address space.
  • the data transmission device is further configured to acquire the DMA carried by the I/O device.
  • a DMA message of the virtual address the DMA virtual address is a virtual address in the global virtual address space; determining a DMA corresponding to the DMA virtual address according to a correspondence between a DMA virtual address, a DMA memory address, and a host a memory address and a target host, the DMA memory address being a DMA memory address mapped to the DMA virtual address, the target host being a host where the DMA memory address is located; and the DMA in the DMA message
  • the virtual address is modified to be the DMA memory address mapped to the DMA virtual address; and the modified DMA message is sent to the target host.
  • the correspondence between the DMA virtual address, the DMA memory address, and the host includes: each DMA memory address of the multiple hosts constitutes a plurality of DMA memory address intervals, and each host corresponds to one or more a DMA memory address interval; the global virtual address space includes a plurality of virtual address intervals that do not overlap, the plurality of virtual address intervals are in one-to-one correspondence with the plurality of DMA memory address intervals, and the virtual address in the virtual address interval Corresponding to the DMA memory address in the corresponding DMA memory address interval; determining the DMA memory address corresponding to the DMA virtual address and the target host includes: determining, according to the virtual address interval according to the DMA virtual address, a DMA memory address interval corresponding to the virtual address interval; determining, according to the DMA memory address interval, a host corresponding to the DMA memory address interval and a DMA memory address mapped to the DMA virtual address in the DMA memory address interval.
  • the system can implement a host to instruct the I/O device to initiate a DMA operation to another host, in one
  • the multiple hosts include a first host and a second host, where the first host is configured to acquire a DMA virtual address of the second host, and corresponding to a DMA memory address of the second host
  • the DMA virtual address is a DMA address
  • a DMA operation start request is sent to the I/O device, and the DMA operation start request is used to instruct the I/O device to perform a DMA operation to the second host.
  • the first host may acquire the DMA virtual address of the second host, and may receive the data transmission request sent by the second host; or may be a data transmission request sent by the host where the management system is located; Alternatively, the first host may obtain the virtual address interval of the second host by querying the address translation table, thereby obtaining the DMA virtual address of the second host.
  • the first host sends a DMA operation start request to the I/O device, and when the I/O device is directly connected to the host, the DMA operation start request may be directly sent; when the I/O device and the host are indirectly connected through the data transmission device
  • the DMA operation initiation request may be forwarded to the I/O device by a data transmission device.
  • the multiple hosts include a first host and a second host, where the first host is configured to acquire a DMA virtual address of the second host, and a DMA memory address of the second host
  • the corresponding DMA virtual address is used as a DMA address to send a DMA operation start request to the I/O device, and the DMA operation start request is used to instruct the I/O device to perform a DMA operation on the second host.
  • the plurality of hosts includes a first host and a second host, where the first host is configured to acquire a DMA memory address of the second host, and according to a correspondence between a DMA virtual address, a DMA memory address, and a host Obtaining a DMA virtual address on a global virtual address space corresponding to the DMA memory address of the target host, and sending the DMA operation start request to the I/O device, where the DMA address of the DMA operation start request is DMA virtual address.
  • the first host may obtain the DMA memory address of the second host, which may be a data transmission request sent by the second host; or may be a data transmission sent by the host where the management system is located.
  • the request may be: or the first host obtains the memory address range of the second host by querying the address translation table, thereby obtaining the DMA memory address of the second host.
  • the first host sends a DMA operation start request to the data transfer device, and after the data transfer device obtains the DMA operation start request, the data transfer device may refer to the method of the first method embodiment to initiate the DMA operation start request.
  • the DMA memory address is translated into a corresponding DMA virtual address, and the modified DMA operation start request is sent to the I/O device.
  • FIG. 12 is a specific implementation manner of an embodiment of the present invention:
  • host 1 acts as the primary node of the distributed file system, storing file system metadata information
  • host 2 is the ordinary primary distributed file system node.
  • the host 2 requests the data information on the host 1 to synchronize the local file system information.
  • the process is as follows, as shown in Figure 7:
  • Host 1 and Host 2 share an I/O device, and Host 2 allocates a receive data buffer space, and obtains a DMA virtual address range of the global virtual address space through a DMA address translation table.
  • S1202 The host 2 initiates a request to acquire data on the host 1, and the host 2 sends the DMA virtual address on the DMA virtual address interval to the host 1.
  • the host 1 receives the request and confirms that the DMA operation start request is locally generated, and the DMA address of the DMA operation start request is the DMA virtual address on the virtual address interval of the host 2, and is sent to the I/O device in response to the DMA operation start request.
  • the I/O device After receiving the DMA operation start request, the I/O device initiates a DMA operation, that is, sends a DMA message, where the DMA address of the message is a DMA virtual address.
  • the data transmission device acquires a DMA operation start request, determines that the destination host of the DMA message is the host 2 according to the DMA address conversion table, and modifies the DMA address of the DMA message to be the DMA memory address of the host 2.
  • the data transmission device sends the DMA message to the host 2, the DMA message accesses the memory address of the host 2, and the I/O device initiates a DMA operation to the host 2.
  • the embodiment may also implement the authority control on the DMA message.
  • the conversion module included in the data transmission device is further configured to: after determining the DMA memory address corresponding to the DMA virtual address and the target host, according to the operation type and location of the DMA packet The permission requirements of the target host are determined to be The DMA operation performed by the target host meets the permission requirement. If yes, the DMA virtual address of the DMA message is modified to the DMA memory address of the target host of the DMA operation.
  • the DMA message further includes the privilege identifier
  • the data transmission device is further configured to: after determining the DMA memory address corresponding to the DMA virtual address and the target host, according to the operation type and location of the DMA packet Determining the privilege identifier and the privilege requirement of the target host, determining whether the DMA operation performed by the DMA packet including the privilege identifier on the target host meets a privilege requirement, and if yes, DMA of the DMA packet The virtual address is modified to the DMA memory address of the target host of the DMA operation.
  • the present invention provides an embodiment of another data transmission system.
  • the data transmission system provided in this embodiment includes the apparatus that can perform the foregoing first, second, third, and fourth method embodiments. Therefore, the embodiment can be understood in combination with the foregoing embodiment, in this embodiment.
  • Concepts or terms that have appeared in the foregoing embodiments and have the same or similar meanings are not described in this embodiment.
  • the at least one host includes a first host, and the first host is configured to send at least one DMA write operation command to the I/O device after the data in the I/O device is updated, the DMA operation start request is used to indicate I/O design Prepare DMA writes to other hosts except the first host to synchronize data to other hosts.
  • the plurality of hosts includes a first host, and the first host is configured to send at least one DMA write operation command to the I/O device after the data in the I/O device is updated, the DMA operation start request is used to indicate The I/O device performs a DMA write operation to a host other than the first host to synchronize data to other hosts.
  • the data update of the I/O device can refer to the method in the foregoing embodiment, and the I/O device reads the data located at the host DMA memory address to the I/O device through the DMA read operation, thereby implementing data update.
  • the data area that needs to be updated is locked until the data update process is completed, thereby preventing other hosts from accessing the data during the update process.
  • the data transmission system includes a management system, and the management system is located on the first host, and is configured to be responsible for synchronous management of hotspot data between hosts.
  • the second host updates the hotspot data of the I/O device, and synchronizes the updated hotspot data to other hosts after the update, where the data synchronization process includes The following steps:
  • the second host sends a data synchronization request to the first host, where the data synchronization request includes a DMA memory address where the data to be updated by the second host is located.
  • the management system located on the first host locks the hotspot data area to be updated on the I/O device, and updates the locked status to other hosts, and the other The host is temporarily unable to access the locked hotspot data.
  • the management system obtains a DMA virtual address corresponding to the DMA memory address of the second host by querying the address translation table, and sends a DMA read operation command to the I/O device, and the DMA address of the DMA read operation command is the A DMA virtual address indicating that the I/O device initiates a DMA read operation to the second host.
  • the I/O device receives the DMA read operation command, and sends a DMA message.
  • the operation type of the DMA message is a read operation
  • the DMA address is a DMA virtual address of the second host.
  • the DMA address translation device modifies the DMA address of the DMA degree operation command to the DMA memory address of the second host, and sends the modified DMA message to the second host, thereby
  • the I/O device initiates a DMA read operation to the DMA memory address of the second host to update the hotspot data to the I/O device.
  • the second host After the DMA read operation is completed, the second host notifies the management system on the first host, and the management system unlocks the hotspot data on the I/O.
  • the management system on the first host sends at least one DMA write operation command to the I/O device, where the DMA operation start request is used to instruct the I/O device to perform a DMA write operation to other hosts than the first host.
  • the I/O device sends a DMA message according to the DMA write operation command, where the DMA address of the DMA message is a DMA virtual address of another host, and the operation type of the message is a write operation, and is used for other hosts. Initiate a DMA write operation.
  • the data transmission device acquires the DMA packet, and modifies the DMA address of the DMA packet to a DMA memory address of another host, and sends the DMA address to another host, so that the I/O device sends a DMA write operation to the other host respectively. Therefore, the new hotspot data will be written to other hosts.
  • the privilege control of the DMA packet can also be implemented, and the specific manner of implementation is not described herein.
  • the privilege control of DMA messages is implemented in a specific implementation. Because the privilege identifiers may refer to multiple types of information, a variety of specific privilege control methods may be implemented, for example, it may be for a specific host, only specific I/O devices can perform DMA reads and/or writes; or, for a particular host, only certain types of data can be read and/or written by DMA; or, for a particular host, only specific hosts or The DMA operation initiated by the management system can perform DMA reading and/or writing, and the like.
  • the management system can actively update the cached data on other hosts, and compare the network transmission of the prior art by the DMA method, thereby improving the performance of data processing. Since other hosts can passively update local data, that is, if the host is not involved, the data of the local cache space is updated in real time, thereby improving the data timeliness and reliability of the entire network.
  • the DMA operation can be filtered to improve the reliability and security of the entire network data transmission.
  • you can also expand the scenarios used by the network to achieve more complex network deployment and transmission methods.
  • an embodiment of the present invention further provides a data transmission device 1400, where the data transmission device is respectively connected to the multiple hosts and the one or more input/output I/O devices, The hosts share one or more I/O devices, and the one or more I/O devices access the DMA memory addresses of the plurality of hosts by directly accessing the DMA.
  • the structure of the device includes a processor 1401. The processor is configured to support the apparatus to perform the corresponding method performed by the data transmission device in the above embodiment, and the structure of the device further includes a transmitter 1402 and a receiver 1403 for implementing transmission or reception of the data transmission device and other components in the above embodiments. Instructions or information that the device interacts with.
  • the apparatus can also include a memory for coupling with the processor that retains the necessary program instructions and data.
  • an embodiment of the present invention further provides a computer device 1500, which is connected to the data transmission device, thereby sharing one or more I/O devices with other plurality of computer devices.
  • the one or more I/O devices access the DMA memory addresses of the plurality of hosts by directly accessing the DMA.
  • the structure of the device includes a processor 1501 configured to support the device to execute the host in the foregoing embodiment.
  • the corresponding method is implemented, and the device is also provided with a transmitter 1502 and a receiver 1503 for implementing an instruction or information for transmitting or receiving the data transmission device interacting with other devices in the above embodiment.
  • the apparatus can also include a memory for coupling with the processor that retains the necessary program instructions and data.
  • the program may be stored in a computer readable storage medium, and the storage medium may include: ROM, RAM, disk or CD.

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Abstract

一种数据传输的方法、设备和系统，用于I/O设备和多个主机设备之间进行DMA数据传输。将所述多个主机的DMA内存地址一一映射到全局虚拟地址空间的虚拟地址上，获取I/O设备发送的携带有DMA虚拟地址的DMA报文（S401）；根据DMA虚拟地址、DMA内存地址和主机之间的对应关系，确定所述DMA虚拟地址对应的DMA内存地址和目标主机（S402）；将所述DMA报文中的所述DMA虚拟地址修改为映射到所述DMA虚拟地址的所述DMA内存地址；以及将修改后的所述DMA报文向所述目标主机发送（S403）。上述方法可以实现I/O设备与多个主机进行DMA数据传输，提高I/O设备的利用率，拓展网络传输的适用场景。

Description

数据传输的方法、设备及系统 技术领域
本发明涉及数据传输领域，具体涉及用于I/O设备和至少一个主机设备之间进行DMA数据传输方法、设备以及数据传输系统。
背景技术
在分布式环境中，为了提升I/O设备的可扩展性和利用率,往往存在多个主机共享I/O设备资源的场景。多个主机共享I/O资源，可以提升I/O资源的整体使用效率，主机可以按照需求动态的申请和释放资源。同时，主机间可以通过共享I/O资源，进行数据传输，以同步不同主机上的数据信息和状态。
I/O设备在进行数据传输时，一般使用直接内存存取(Direct Memory Access，简称DMA)技术传输I/O设备上的数据，从而实现独立于CPU的后台批量数据传输。在DMA操作中，主机为DMA操作分配DMA内存地址空间，I/O设备直接在DMA内存地址空间上进行数据读写，从而完成DMA方式数据传输。DMA操作通过DMA报文实现，I/O设备向主机发送DMA报文，DMA报文中包含DMA地址，DMA地址位于主机为DMA操作所分配的DMA内存地址空间上。通过DMA报文中的DMA地址，I/O设备可以直接对主机的DMA内存地址空间上的数据进行读写，具体的，例如，当主机对I/O设备进行写操作时，DMA报文为对内存的读报文，数据通过对该读报文所响应的一个或多个完成命令包携带，从内存拷贝到I/O设备上；当主机对I/O设备进行读操作时，根据需要拷贝的数据大小，I/O设备生成的DMA报文为一个或者多个写报文，报文携带拷贝的数据，写报文到达目标主机的DMA内存地址空间，将报文中的数据载荷复制到对应的内存空间中。由于DMA操作中，数据传输的过程无需主机CPU进行参与，从而实现了I/O设备对主机数据独立的高速读写。
当多个主机共享同一个I/O设备时，由于每个主机都拥有独立的DMA内存地址空间，对于I/O设备而言，会存在多个DMA内存地址空间的冲突，从 而导致DMA操作无法进行。现有的多主机I/O资源共享技术不能有效的解决多个主机在高速连接下共同访问同一I/O设备的问题。例如在一种现有技术中，虽然能使得主机高速访问外部扩展的I/O资源，但是使用I/O设备的时候还是处于独占状态，即一个I/O设备只能同一时间被一个主机所访问。又如在令一种现有技术中，虽然可以通过IP技术来实现多个主机共享同一个网络I/O设备，但IP网络因为网络协议层处理导致了额外的性能开销损耗，且受到网络带宽所限，且存在较大的延时，因而不适合短距离的高性能I/O数据传输应用。
发明内容
有鉴于此，本发明提供了一种用于I/O设备和至少一个主机设备之间进行DMA数据传输方法、设备以及数据传输系统，以实现多个主机在通过DMA数据传输方式下共享同一I/O设备，从而使多个主机与共享的I/O设备之间实现高效的数据传输和同步。
第一方面，本发明实施例提供一种计算机系统，所述计算机系统包括多个主机、一个或多个输入/输出I/O设备、以及分别与所述多个主机和所述一个或多个I/O设备连接的数据传输设备。其中数据传输设备将所述多个主机的DMA内存地址一一映射到全局虚拟地址空间的虚拟地址上，并获取主机发送的带有DMA虚拟地址的DMA报文，将DMA报文中的DMA虚拟地址修改为所映射的DMA内存地址，以及将修改后的所述DMA报文向目标主机发送。可见，通过该计算机系统，I/O设备可以通过包含DMA虚拟地址的DMA报文，实现对多个主机进行DMA操作。由于DMA虚拟地址位于同一个全局虚拟地址空间上，因此相对于现有技术，不会发送DMA内存地址冲突，从而实现了多个主机共享同一个I/O设备。
在一种可能的设计中，主机各自的DMA内存地址组成一个或多个DMA内存地址区间，全局虚拟地址空间上有与各个主机的内存地址区间所一一对应的虚拟地址区间。获取带有DMA虚拟地址的DMA报文后，根据DMA虚拟地址所在的虚拟地址区间找到对应的内存地址区间，从而确定DMA内存地址以及内存地址所在的主机。由于通过内存地址区间和虚拟地址区间来实现虚拟地址、内存地址和主机之间的对应关系，从而简化了对应关系的复杂度。
在一种可能的设计中，主机可以根据目标主机DMA地址信息来发送DMA操作启动请求，从而指示I/O设备对目标主机发起DMA操作，进行数据传输。
在一种可能的设计中，系统中一个主机可以通过获取另一主机的DMA虚拟地址，从而向I/O设备发送以另一主机的DMA虚拟地址为DMA地址的DMA操作启动请求，从而实现主机可以通过该系统指示I/O设备与另一主机进行数据传输。
在一种可能的设计中，系统中的一个主机可以通过获取另一主机的DMA内存地址，并根据对应关系得到DMA内存地址对应的DMA虚拟地址，从而向I/O设备发送以另一主机的DMA虚拟地址为DMA地址的DMA操作启动请求，从而实现主机可以通过该系统指示I/O设备与另一主机进行数据传输。
在一种可能的设计中，系统中一个主机可以通过获取另一主机的DMA内存地址，从而向数据传输设备发送以另一主机的DMA内存地址为DMA地址的DMA操作启动请求，数据传输设备将DMA操作启动请求中的DMA内存地址转换为相对应的DMA虚拟地址，并转发给对应的另一主机从而实现主机可以通过该系统指示I/O设备与另一主机进行数据传输。从而实现根据另一主机的DMA内存地址通过该系统指示I/O设备与另一主机进行数据传输。
在一种可能的设计中，系统中I/O设备数据发生更新后，系统中的一个主机通过至少一条DMA写操作命令，使I/O设备向其他主机进行DMA写操作，从而将数据同步到其他主机。
在一种可能的设计中，数据传输设备根据DMA报文的操作类型和所述目标主机的权限要求确定对所述目标主机进行的DMA操作符合权限要求，当符合时才进行报文的修改和发送。
在一种可能的设计中，DMA报文还包含权限标识，根据所述DMA报文的操作类型、所述权限标识和所述目标主机的权限要求确定是否符合权限要求，当符合时才进行报文的修改和发送。通过权限控制，可以提高传输系统的安全性，并实现对特定的主机进行转发。
第二方面，本发明实施例提供一种数据传输方法，方法应用于多个主机共享一个或多个输入/输出I/O设备的计算机系统，所述一个或多个I/O设备通过 直接内存访问DMA的方式访问多个主机各自的DMA内存地址，所述DMA内存地址被一一映射到全局虚拟地址空间的虚拟地址上。将所述多个主机的DMA内存地址一一映射到全局虚拟地址空间的虚拟地址上，并获取主机发送的带有DMA虚拟地址的DMA报文，将DMA报文中的DMA虚拟地址修改为所映射的DMA内存地址，以及将修改后的所述DMA报文向目标主机发送。可见，通过该计算机系统，I/O设备可以通过包含DMA虚拟地址的DMA报文，实现对多个主机进行DMA操作。由于DMA虚拟地址位于同一个全局虚拟地址空间上，因此相对于现有技术，不会发送DMA内存地址冲突，从而实现了多个主机共享同一个I/O设备。
在一种可能的设计中，主机各自的DMA内存地址组成一个或多个DMA内存地址区间，全局虚拟地址空间上有与各个主机的内存地址区间所一一对应的虚拟地址区间。获取带有DMA虚拟地址的DMA报文后，根据DMA虚拟地址所在的虚拟地址区间找到对应的内存地址区间，从而确定DMA内存地址以及内存地址所在的主机。由于通过内存地址区间和虚拟地址区间来实现虚拟地址、内存地址和主机之间的对应关系，从而简化了对应关系的复杂度。
在一种可能的设计中，获取所述多个主机中的一个或多个主机的包含相应主机的标识ID和DMA内存地址的注册信息，根据所述主机的DMA内存地址，为所述主机分配虚拟地址，并添加或更新到对应关系中。
在一种可能的设计中，获取所述多个主机中的一个或多个主机的包含相应主机的标识ID和DMA内存地址区间的注册信息，根据所述主机的一个或多个DMA内存地址区间，为所述主机分配一个或多个虚拟地址区间，并添加或更新到对应关系中。
在一种可能的设计中，当所述DMA虚拟地址、DMA内存地址和主机之间的对应关系发生更新后，向主机发送更新信息，从而指示所述主机同步更新存储在所述主机的所述DMA虚拟地址、DMA内存地址和主机之间的对应关系。
在一种可能的设计中，根据DMA报文的操作类型和所述目标主机的权限要求确定对所述目标主机进行的DMA操作符合权限要求，当符合时才进行报文的修改和发送。
在一种可能的设计中，DMA报文还包含权限标识，根据所述DMA报文的操作类型、所述权限标识和所述目标主机的权限要求确定是否符合权限要求，当符合时才进行报文的修改和发送。通过权限控制，可以提高传输系统的安全性，并实现对特定的主机进行转发。
在一种可能的设计中，可以接受主机所发送的包含DMA内存地址查询命令，并更根据DMA虚拟地址、DMA内存地址和主机之间的对应关系，获取与所述主机的DMA内存地址相对应的所述全局虚拟地址空间上的DMA虚拟地址，然后将DMA虚拟地址通过返回报文发送给主机
在一种可能的设计中，可以获取任意一个主机向I/O设备发送的DMA操作启动请求，所述DMA操作启动请求包含另一主机的DMA内存地址，用于指示所述I/O设备向所述另一主机进行DMA操作。根据DMA虚拟地址、DMA内存地址和主机之间的对应关系，确定与DMA内存地址对DMA虚拟地址，并将操作命令中的DMA内存地址修改为DMA虚拟地址，并发送给I/O设备。
第三方面，本发明提供了一种数据传输方法，其特征在于，所述方法应用于多个主机通过数据传输设备共享一个或多个输入/输出I/O设备，所述一个或多个I/O设备通过直接内存访问DMA的方式访问多个主机各自的DMA内存地址，所述DMA内存地址被一一映射到全局虚拟地址空间的虚拟地址上。获取目标主机的DMA地址信息，根据所述目标主机的DMA地址信息，发送DMA操作启动请求，所述DMA操作启动请求包含DMA地址，用以指示所述I/O设备对在全局虚拟地址空间上的DMA虚拟地址进行DMA操作，所述DMA虚拟地址为目标主机的DMA内存地址映射到全局虚拟地址空间上的DMA虚拟地址。
在一种可能的设计中，DMA地址信息为DMA内存地址，将包含有目的主机的DMA内存地址的DMA操作启动请求发送给所述数据传输设备，指示数据传输设备将所述DMA操作启动请求中的DMA地址由目标主机的DMA内存地址修改为与之相对应的全局虚拟地址空间上的DMA虚拟地址，并将所述DMA操作启动请求转发给目标主机。
在一种可能的设计中，DMA地址信息为DMA内存地址，根据DMA虚 拟地址、DMA内存地址和主机之间的对应关系，获取目标主机的DMA的DMA虚拟地址，将所述包含DMA虚拟地址的DMA操作启动请求发送给I/O设备。
在一种可能的设计中，DMA地址信息为目的主机DMA虚拟地址，将包含有DMA虚拟地址的DMA操作启动请求发送给I/O设备，指示其对目标主机进行DMA操作。
在一种可能的设计中，主机分配DMA内存地址，并发送包含主机的识别ID和主机的DMA内存地址注册信息。
在一种可能的设计中，主机分配DMA内存地址区间，并发送注册信息，所述注册信息包含主机的识别ID和主机的DMA内存地址区间。
在一种可能的设计中，主机获取息包括需要更新的DMA虚拟地址、DMA内存地址和主机之间的对应关系的更新信息，并根据更新信息将对应关系添加或者更新到已经存在的DMA虚拟地址、DMA内存地址和主机之间的对应关系中。
第四方面，本发明实施例提供了一种数据传输设备，所述数据传输设备分别与所述多个主机和所述一个或多个输入/输出I/O设备相连接，所述多个主机共享一个或多个I/O设备，所述一个或多个I/O设备通过直接内存访问DMA的方式访问多个主机各自的DMA内存地址，该装置具有实现上述方法中第一方面中数据传输装置的相应功能和第二方面中的相应方法的功能。所述功能可以通过硬件实现，也可以通过硬件执行相应的软件实现。所述硬件或软件包括一个或多个与上述功能相对应的模块。
第五方面，本发明实施例提供了一种数据传输设备，其特征在于，所述设备用于共享一个或多个输入/输出I/O设备，该装置具有实现上述方法中第一方面中主机的相应功能和第三方面中的相应方法的功能。所述功能可以通过硬件实现，也可以通过硬件执行相应的软件实现。所述硬件或软件包括一个或多个与上述功能相对应的模块。
第六方面，本发明实施例提供了一种数据传输设备，所述数据传输设备分别与所述多个主机和所述一个或多个输入/输出I/O设备相连接，所述多个主机共享一个或多个I/O设备，所述一个或多个I/O设备通过直接内存访问DMA 的方式访问多个主机各自的DMA内存地址，装置的结构中包括处理器，所述处理器被配置为支持装置执行上述第一方面中数据传输装置的相应功能和第二方面中的相应方法，装置的结构中还有发送器和接收器，用于实现发送或者接收上述第一方面中数据传输装置的相应功能和第二方面中的相应方法与其他设备交互的指令或者信息。所述装置还可以包括存储器，所述存储器用于与处理器耦合，其保存必要的程序指令和数据。
第七方面，本发明实施例提供了一种数据传输设备，其特征在于，所述设备用于共享一个或多个输入/输出I/O设备，装置的结构中包括处理器，所述处理器被配置为支持装置执行上述第一方面中主机的相应功能和第三方面中的相应方法。装置的结构中还有发送器和接收器，用于实现发送或者接收上述第一方面中数据传输装置的相应功能和第二方面中的相应方法与其他设备交互的指令或者信息。所述装置还可以包括存储器，所述存储器用于与处理器耦合，其保存基站必要的程序指令和数据。
可见，本发明实施例通过获取I/O设备发送的DMA报文，将所述DMA报文的DMA虚拟地址修改为所述DMA操作的目标主机的DMA内存地址，并将所述修改后的DMA报文发送给所述目标主机，I/O设备可以通过包含DMA虚拟地址的DMA报文，实现对多个主机进行DMA操作。由于DMA虚拟地址与主机上的DMA内存地址一一对应，且位于同一个全局虚拟地址空间上，因此相对于现有技术，不会发送DMA内存地址冲突。由于多个主机共享同一个I/O设备，因此，节省了I/O资源，提高了I/O设备的利用率。
此外，由于多个主机可以同时与同一I/O设备连接并进行数据传输，因此主机间的数据传输可以通过I/O设备的DMA操作实现，而不需在主机间直接进行数据传输。由于主机与I/O设备的链接总线具有高带宽和低延时的特点，且DMA操作中数据传输无需主机CPU进行干预，因此提高了网络传输传输性能和同步性能。
此外，由于通过DMA报文对DMA操作进行权限管理，提高整个网络数据传输的可靠性和安全性。此外，通过权限控制，还可以拓展网络使用的场景，对不同的DMA操作进行分类管理，实现更加复杂的网络部署和传输方式。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作一简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本发明实施例中DMA内存区间与虚拟地址区间的对应关系示意图；
图2是本发明实施例中数据传输设备的网络拓扑环境示意图；
图3是本发明实施例中网络传输设备的硬件互联构架示意图；
图4是本发明实施例中第一种数据传输方法的流程示意图；
图5是本发明实施例中一种数据传输方法具体的实现方式的流程示意图；
图6A是本发明实施例中第二种数据传输方法的流程示意图；
图6B是本发明实施例中第二种数据传输方法的又一流程示意图；
图7是本发明实施例中第三种数据传输方法的流程示意图；
图8是本发明实施例中对报文进行权限控制的一种实现过程的流程示意图；
图9是本发明实施例中第四种数据传输方法的流程示意图；
图10是本发明实施例中一种数据传输设备的结构示意图；
图11是本发明实施例中一种数据传输设备的另一结构示意图；
图12是本发明实施例中一种数据传输系统的流程示意图；
图13是本发明实施例中另一种数据传输系统的流程示意图。
图14是本发明实施例中另一种数据传输设备的结构示意图；
图15是本发明实施例中又一种数据传输设备的结构示意图。
具体实施方式
本发明实施例提供一种多个主机和I/O设备之间的数据传输方法，以实现多个主机与I/O设备之间通过DMA进行数据传输，降低多个主机之间以及主机与I/O设备时间的带宽占用和数据延迟，从而提高数据传输的性能和稳定性。
本发明实施例还提供了相应的设备及数据传输系统。以下分别进行详细说明。
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
为了方便理解本发明实施例，首先在此介绍本发明实施例描述中会引入的术语。
全局虚拟地址空间：而本发明技术中，多个主机共享同一个I/O设备，正如在背景技术中所阐述的，这些主机的DMA内存地址在I/O设备上是冲突的。全局虚拟地址空间独立于所有主机，在这个空间内，使用者是外部I/O设备。全局虚拟地址空间的空间大小大于或等于所有与I/O设备相连接的主机的DMA内存地址的总和。因此，全局虚拟地址空间可以将不同主机的DMA内存地址映射到自己的地址空间中。由于不同主机的DMA内存地址映射到统一的全局虚拟地址空间中，这解决了不同主机的DMA地址在同一个I/O设备上使用的时候冲突的问题。
DMA虚拟地址：DMA虚拟地址是位于全局虚拟地址空间上某一内存地址，DMA虚拟地址与一台主机的DMA内存地址相对应。在本发明中，I/O设备对主机进行DMA操作时发送的DMA报文的DMA地址并不是主机上的DMA内存地址，而是DMA虚拟地址。I/O设备通过DMA虚拟地址对全局虚拟地址空间进行DMA操作，因此当I/O设备与多个主机连接时，也不会发生如背景技术中所介绍的DMA地址冲突。同时，本发明通过将DMA报文中的DMA虚拟地址转换为与之相对应的主机上的DMA内存地址，从而实现了I/O设备与多个主机进行DMA数据传输。
虚拟地址区间：在一种可能的场景下，主机中的DMA内存地址是连续的， 即组成一个或多个DMA内存地址区间，不同主机的DMA内存地址区间被映射到全局虚拟地址空间中。每一个DMA内存地址区间对应到全局虚拟地址空间上即为一个虚拟地址区间。结合图1，可以更直观的理解主机的DMA内存区间与虚拟地址区间的对应关系：如图所示，主机1、主机2和主机3的DMA内存地址区间分别在全局虚拟地址空间上对应为主机1、主机2和主机3的虚拟地址区间。其中，主机1和主机2的DMA内存地址在一个连续的DMA内存地址区间中，因此在虚拟地址区间中所映射的也是连续的虚拟地址区间。主机3的DMA内存地址分布在三个DMA内存地址区间中，不同的DMA内存地址区间之间是不连续的，因此，三个DMA内存地址区间分别映射了三个虚拟地址区间。在虚拟地址
区间位于全局虚拟地址空间上，虚拟地址区间的大小为主机的DMA内存地址区间大小，使得虚拟地址区间中的DMA虚拟地址可以与DMA内存地址区间中的DMA内存地址一一对应，而全局虚拟地址空间大于或等于所有虚拟地址区间的总和。
本发明应用在I/O设备与至少一个主机设备相连接的分布式环境下，在分布式环境中，为了提升I/O设备的可扩展性和利用率，往往存在多个主机共享I/O设备资源的场景。多个主机共享I/O资源，可以提升I/O资源的整体使用效率，主机可以按照需求动态的申请和释放资源。图2描述了本发明的一种网络拓扑环境，主机1、主机2、主机3通过数据传输设备与I/O设备1、I/O设备2、I/O设备3相连接。图3描述了本发明实施的一种硬件互联架构，在该架构下，主机通过快捷外围部件互连标准(Peripheral Component Interconnect Express,PCIe)链路直连到外部的PCIe硬件互联设备，PCIe硬件互联设备连接PCIe设备。在本发明实施例中，数据传输装置可以实现该PCIe硬件互联设备的功能。PCIe硬件互联架构是非PCIe规范实现，通过互联设备的PCIe数据包转发，可以实现多个主机访问同一个PCIe设备。如图中主机1和主机2以及主机3共享I/O设备。该硬件平台提供了一种能力，使得不同Host能访问到外部同一个PCIe设备。当然，基于本发明的思想，本发明所应用的网络拓扑环境和硬件互联构架可以有多种变化和拓展，以实现本发明中I/O设备与至少一个主机之间的数据传输。
由于本发明应用于I/O设备和至少一个主机设备之间进行DMA数据传输，为了方便对本发明的理解，现有技术中DMA操作的流程进行简要的介绍。
DMA操作包含DMA写操作和DMA读操作，DMA写操作可以实现将数据从I/O设备拷贝到目标主机的DMA内存地址中，而DMA读操作可以将数据从目标主机的DMA内存地址拷贝到I/O设备中。
DMA写操作包括如下步骤：
1、根据接收到的DMA操作启动请求，I/O设备驱动软件生成一个IO命令包，包含DMA拷贝I/O设备中的数据到内存的指令信息，IO设备上源数据地址和目标内存DMA地址；
2、IO设备接收到该命令包，根据需要拷贝的数据大小，生成一个或者多个DMA写报文，报文的目标地址为内存DMA地址，报文携带拷贝的数据；
3、将DMA写报文发送至对应的通道(一般为pcie链路)；
4、DMA写报文到达主机的物理内存空间，将报文中的数据载荷复制到对应的目标内存DMA地址上；
DMA读操作包括如下步骤：
1、根据接收到的DMA操作启动请求，I/O设备驱动软件生成一个IO命令包，包含DMA拷贝内存数据到IO设备的指令信息，IO设备上目标地址和内存源数据的DMA地址(在本发明中，前述写操作中目标内存DMA地址和读操作中内存源数据的DMA地址统称为DMA地址)；
2.IO设备接收到该命令包，生成一个内存读报文(在本发明中，将前述的DMA写报文和DMA读报文统称为DMA报文)，报文的目标地址是内存源数据的DMA地址，并指明要读的数据的大小；
3.将内存读报文发送至目标主机对应的通道(一般pcie链路)；
4.主机内存控制器接收到DMA读报文，生成完成报文，并将指定的内存数据填充到所述完成报文载荷，完成报文根据DMA读报文的IO设备ID，返回给IO设备，从而将数据拷贝至IO设备。(值得注意的是，完成报文并不是 本发明所称的DMA报文)
参考图4，是本发明实施例提供的第一种数据传输方法的流程示意图，需要说明的是，所述方法应用于多个主机共享一个或多个输入/输出I/O设备的计算机系统，所述一个或多个I/O设备通过直接内存访问DMA的方式访问多个主机各自的DMA内存地址，所述DMA内存地址被一一映射到全局虚拟地址空间的虚拟地址上。该方法的实施主体可以在网络拓扑中可以有多种的实现方式。例如，实施主体可以使单独的数据传输设备，也可以是集成在I/O设备上的数据传输模块，或者是集成在某一主机上，与其他主机和I/O设备相连的数据传输设备。本发明实施例的方法可以包括如下步骤：
S401、获取I/O设备发送的DMA报文，所述DMA报文中携带DMA虚拟地址，所述DMA虚拟地址为在所述全局虚拟地址空间上的虚拟地址。
如背景技术所述，I/O设备对主机的DMA操作通过DMA报文来实现，即DMA报文中的DMA地址为目的主机的DMA内存地址，根据DMA地址对目标主机存储在DMA内存地址上的数据进行读写。在本发明实施例中，DMA报文的DMA地址为全局虚拟地址空间上的虚拟地址，如前所述，该虚拟地址与目标主机的DMA内存地址相对应。对于I/O设备而言，当通过DMA报文对目标主机的DMA内存地址进行DMA操作时，实际上是对目标主机DMA内存地址所对应的虚拟地址进行读写操作。由于虚拟地址区间位于同一个全局虚拟地址空间上，因此I/O设备对多个相连接的主机进行DMA操作时，不会出现DMA内存地址区间冲突的问题。
S402、根据DMA虚拟地址、DMA内存地址和主机之间的对应关系，确定所述DMA虚拟地址对应的DMA内存地址和目标主机，其中，所述DMA内存地址为映射到所述DMA虚拟地址上的DMA内存地址，所述目标主机为映射到所述DMA虚拟地址的所述DMA内存地址所在的主机
由于DMA虚拟地址与主机以及主机的DMA内存地址是一一对应关系，因此，可以根据DMA报文的DMA虚拟地址，确定所述DMA虚拟地址对应的DMA内存地址和目标主机。获取的方式可以有多种，包括但不限于如下方式：根据所述DMA报文的DMA虚拟地址，在地址转换表中查询，获得目标 主机的DMA内存地址；或者，通过向其他设备发送查询指令，获取返回的目标主机的DMA内存地址；或者，通过预设的地址转换规则，将DMA虚拟地址转化为目标主机的DMA内存地址。
例如，可以向其他设备，如管理系统所在的主机，或者其他具有DMA地址转换功能的设备发送查询指令，所述查询指令中包含了带查询的DMA虚拟地址。设备接收到查询指令后，查询到所述DMA虚拟地址所对应的DMA内存地址，并将所述DMA内存地址通过指令返回。获取所述返回指令后，即可获得而所述DMA虚拟地址所对应的DMA内存地址。
又例如，可以通过预设的地址转换规则，将DMA虚拟地址转哈为目标主机的DMA内存地址。例如可列举的一种转换方式中，目标主机的DMA内存地址在一个区间中，该区间大小为统一大小，如1G，全局虚拟地址空间中也分配有对应的区间，所述区间中有与之对应的虚拟地址，从全局虚拟地址空间的起始地址开始依次按照主机编号连续排列，则DMA虚拟地址与全局虚拟地址空间的起始地址之间的差值的内存大小，除以内存区间大小，所得的商为目标主机的编号，余数为从目标主机的内存区间的起始地址起算到DMA内存地址的大小，从而可以得到目标主机的DMA内存地址。
在一种实现方式中，所述DMA虚拟地址、DMA内存地址和主机之间的对应关系包括：所述多个主机各自的DMA内存地址组成多个DMA内存地址区间，每个主机对应一个或多个DMA内存地址区间；所述全局虚拟地址空间包含不重叠的多个虚拟地址区间，所述多个虚拟地址区间与所述多个DMA内存地址区间一一对应，且虚拟地址区间中的虚拟地址与对应的DMA内存地址区间中的DMA内存地址一一对应。
结合图1以及前述对虚拟地址区间介绍，可以对本实现方式中的对应关系进行理解。
在一种实现方式中，根据对应关系确定确定所述DMA虚拟地址对应的DMA内存地址和目标主机可以通过查询对应关系表来实现。
在一种情况下，对应关系表中可以直接包含DMA内存地址、DMA虚拟地址以及所对应的主机三者之间的对应关系。从而通过三个元素中的任意一 个，均可以查询到与之相对应的另外两个元素。
在一种实现方式中，地址转换表可以包含主机ID，主机的DMA内存地址，DMA虚拟地址等字段，查表时，可以直接通过DMA虚拟地址得到与之相相对应的DMA内存地址以及相对应的主机。此处的地址可以为一个具体的地址，也可以是一段地址区间。本实现方式中，DMA内存地址区间中的内存地址以及DMA虚拟地址区间中的虚拟地址均可以是非连续的。在另一种实现方式中，地址转换表可以包含主机ID，主机的DMA内存地址区间起始地址，虚拟地址区间起始地址，区间大小等字段。查表时，根据虚拟地址和虚拟地址区间的起始地址以及区间大小，可以得到虚拟地址与虚拟地址区间的起始地址之间的差值，根据所述差值和主机DMA内存地址区间起始地址，可以得到DMA内存地址。本实现方式用于虚拟地址区间与内存地址区间为连续的情况，可以有效的减小地址转换表的表项数量。
地址转换表位于地址转换模块硬件上，以私有的寄存器或者设备内存实现，也可以是位于管理系统内存中。当位于私有寄存器或者设备内存中时，通过直接访问地址转换表可进行查询；当位于管理系统内存中时，且管理系统位于非本地的设备上是，可以通过发送带有虚拟地址的查询指令，并接受反馈的带有DMA内存地址的返回指令，从而获取DMA内存地址。
地址转换表可以通过预先人工进行设定，或者通过位于网络中的其他设备进行同步从而获得地址转换表。在另一种实现方式中，地址转换表可以通过如下方式自动生成或者更新：获取主机的注册信息，所述注册信息包含主机的识别ID和主机的DMA内存地址区间；根据所述主机的DMA内存地址区间，为所述主机分配虚拟地址区间，所述虚拟地址区间位于全局虚拟地址空间上，所述虚拟地址区间内地址与所述主机的DMA内存地址区间内地址相对应；将所述主机ID、所述主机的DMA内存地址以及所述虚拟地址区间的对应关系添加到所述地址转换表中或者用所述对应关系更新所述地址转换表中所述主机已经存在的对应关系。主机的注册信息可以有主机在接入网络后，由主机发送给本方法的执行主体设备，或者可以通过管理系统将接入网络的主机的注册信息发送给本方法的执行主体设备。主机的内存地址区间可以是通过内存地址 的起始地址和区间大小来表示，也可以通过具体的连续或非连续的地址或地址区间的集合来表示。为主机分配虚拟地址区间，即根据主机的内存地址区间大小，分配与之相应大小的虚拟地址区间，并将虚拟地址区间添加到全局虚拟地址空间上，或者用所述虚拟地址区间替换所属主机在全局虚拟地址空间上已存在的虚拟地址区间。可以理解的，在分配虚拟地址区间时，应当保证虚拟地址区间与主机的内存地址区间为一一对应关系。
在一种实现方式下，所述DMA虚拟地址、DMA内存地址和主机之间的对应关系通过如下方式添加或修改：获取所述多个主机中的一个或多个主机的注册信息，所述注册信息包含相应主机的标识ID和DMA内存地址；根据所述主机的DMA内存地址，为所述主机分配虚拟地址，所述虚拟地址位于全局虚拟地址空间上，所述虚拟地址与所述主机的DMA内存地址一一对应；将所述主机ID、以及所述主机的DMA内存地址和所述虚拟地址对应关系添加或更新到所述DMA虚拟地址、DMA内存地址和主机之间的对应关系中。
在另一种实现方式下，当对应关系中包含了虚拟地址区间或者内存地址区间时，所述DMA虚拟地址、DMA内存地址和主机之间的对应关系通过如下方式添加或修改获取所述多个主机中的一个或多个主机的注册信息，所述注册信息包含相应主机的标识ID和DMA内存地址区间；根据所述主机的一个或多个DMA内存地址区间，为所述主机分配一个或多个虚拟地址区间，所述虚拟地址区间位于全局虚拟地址空间上，所述一个或多个虚拟地址区间与所述主机的一个或多个DMA内存地址区间一一对应，且虚拟地址区间中的虚拟地址与对应的DMA内存地址区间中的DMA内存地址一一对应；将所述主机ID、以及所述主机的DMA内存地址区间和所述虚拟地址区间的对应关系添加或更新到所述DMA虚拟地址、DMA内存地址和主机之间的对应关系中。
在一种实现方式中，当所述DMA虚拟地址、DMA内存地址和主机之间的对应关系发生更新后，向主机发送更新信息，用以指示所述主机同步更新存储在所述主机的所述DMA虚拟地址、DMA内存地址和主机之间的对应关系。
可以理解的，更新信息可以在地址转换表更新后主动发送给主机，也可以接收主机发送的查询命令后，判断对应关系是否发生更新，若发生更新则向主 机发送更新信息。可以向全部主机发送所述更新信息，也可以向部分特定主机发送，或者向管理系统所在主机发送。
可以理解的，对应关系的更新可以通过所述的数据传输设备来完成，也可以通过网络中的管理系统完成，或者通过任一主机完成。下面列举一种对应关系创建或者更新的具体实现方式，在本实现方式中，对应关系由地址转换表来进行存储，地址转换表的更新是由网络中的主机完成，并将更新后的地址转换表向其他设备进行同步。主机与数据传输设备以及I/O设备之间通过PCIe总线进行通信。本实现方式包含如下步骤：
a)主机枚举数据传输设备的PCIe设备对象；
b)主机枚举发现远端共享的PCIe设备；
c)通过访问数据传输设备获取本机ID；
d)主机将本机DMA地址和I/O设备ID作为输入，分配虚拟地址区间；
e)等待分配动作完成，获得新的全局虚拟地址空间；
f)根据上述信息，在主机本地内存创建或者更新地址转换表；
g)初始化数据传输设备的中断信息，后续地址转换表项如果有更新，通过中断通知当前主机，并更新本主机内的副本信息；
h)I/O设备的添加和删除，或者当前主机关机，都需要先向全局数据传输设备更新相关信息，并由数据传输设备通过中断的方式通知其他关心这些信息的主机；
S403、将所述DMA报文中的所述DMA虚拟地址修改为映射到所述DMA虚拟地址的所述DMA内存地址；以及，将修改后的所述DMA报文向所述目标主机发送。
在前述步骤中，获取DMA内存地址时，可以同时获得所述DMA内存地址所在的主机，从而将修改后的DMA报文发送给所述的主机。由于DMA操作由DMA报文所发起或者执行，当I/O设备所发送的DMA报文被发送到目 标主机，I/O设备可实现对该目标主机进行DMA操作。
结合图5，是本实施例的一种具体的实现方式。数据传输设备503获取由I/O设备501发送的DMA报文502，DMA报文502的DMA地址为DMA虚拟地址0xabcd，该虚拟地址位于全局虚拟地址空间上。对应关系通过地址转换表进行存储，并通过前述的虚拟地址区间来来进行地址的分配和查询。数据传输设备503根据虚拟地址，在地址转换表中查询，可以定位到表项504，即所述虚拟地址位于起始地址为0xa000，大小为1G的虚拟地址区间上。从表项504可知，该虚拟地址区间与主机3上的的起始地址为0x0，大小为1G的DMA内存地址相对应。因此，根据虚拟地址区间的起始地址与虚拟地址的差值bcd，以及主机3的DMA内存地址的起始地址，可以得到该虚拟地址在主机3的DMA内存地址区间中所对应的DMA内存地址为0x0bcd。将DMA报文502中的DMA地址由虚拟地址0xabcd修改为主机3上的DMA内存地址0x0bcd，得到修改后的DMA报文505,。将DMA报文505发送给主机3，从而使I/O设备对主机3上的DMA内存地址发起或者执行DMA操作。
可见，在本发明实施例中，通过获取I/O设备发送的DMA报文，将所述DMA报文的DMA虚拟地址修改为所述DMA操作的目标主机的DMA内存地址，并将所述修改后的DMA报文发送给所述目标主机，I/O设备可以通过包含DMA虚拟地址的DMA报文，实现对多个主机进行DMA操作。由于DMA虚拟地址位于同一个全局虚拟地址空间上，因此相对于现有技术，不会发送DMA内存地址冲突。由于多个主机与I/O设备之间可以同时进行数据传输，因此主机间的数据传输可以通过I/O设备的DMA操作实现，而不需主机间进行网络传输。由于主机与I/O设备的链接总线具有高带宽和低延时的特点，且无需主机CPU进行干预，因此提高了网络传输的及时性和高效性，拓展了网络应用的场景。
此外，在本发明实施例中，获取DMA虚拟地址以及目标主机可以DMA虚拟地址、DMA内存地址和主机之间的对应关系获得，当对应关系存储于本地时，可以高效的进行DMA虚拟地址的查询，提高修改DMA报文的DMA地址的执行效率；当对应关系存储于远端的管理系统中时，可以简化数据传输 设备的硬件复杂度，拓展了和丰富了数据传输设备的具体实现方式。
此外，在本发明实施例中，通过当所述对应关系发生更新后，向主机发送更新信息，可以实现主机中的对应关系与数据传输设备中的地址转换表同步更新。因此，主机可以独立进行DMA虚拟地址和与之相对应的DMA内存地址之间的相互转化，从而扩展了本发明的应用场景。
结合图6A和图6B，是本发明实施例提供的第二种数据传输方法的流程示意图。本实施例将结合第一种实施例进行说明，本实施例的方法包含了第一种实施例中的S401、S402、S403步骤，因此与所述步奏相同或相似的描述，在本实施例中不再赘述。
由于DMA操作可以由主机通过向I/O设备发送DMA操作启动请求来发起，DMA操作启动请求中包含的DMA内存地址，从而指示I/O设备向所述的DMA内存地址发起DMA操作。在本发明中，结合第一种实施例所描述，I/O需要向DMA虚拟地址发起DMA操作，即发送以DMA虚拟地址为DMA地址的DMA报文。因此，I/O设备所接受到的DMA操作启动请求也应该为DMA虚拟地址。
主机向I/O设备发送的DMA操作启动请求可以直接为DMA虚拟地址，从而使I/O设备可以接收到包含DMA虚拟地址的DMA操作启动请求。在这种情况下，主机可以在通过第一种实施例中提供的方法，在本地存储与数据传输设备同步更新的对应关系，从而通过所述对应关系获取DMA操作启动请求中的DMA虚拟地址；也可以通过向存储有地址转换表的其他设备发送查询命令，来获取所述的DMA虚拟地址。主机向I/O设备发送的DMA操作启动请求还可以为目标主机的DMA内存地址，并通过将操作命令发送给数据传输设备，将所述操作命令中的DMA内存地址修改为相对应的DMA虚拟地址，并将修改后的DMA操作启动请求发送给I/O设备。
结合图6A，在本发明实施例的一种实现方式中，数据传输设备可以通过如下方法向主机反馈查询命令。所述数据传输方法还包括
S601：接收主机发送的查询命令，所述查询命令中包含需要查询的主机的DMA内存地址；
S602：根据DMA虚拟地址、DMA内存地址和主机之间的对应关系，获取与所述主机的DMA内存地址相对应的所述全局虚拟地址空间上的DMA虚拟地址；
S603：向所述主机发送返回报文，所述返回报文中包含所述主机的DMA内存地址所对应的全局虚拟地址空间上的DMA虚拟地址。
获取与所述目标主机的DMA内存地址相对应的全局虚拟地址空间上的DMA虚拟地址有多种实现方式，获取方式与前述通过DMA虚拟地址获取与之相对应的DMA内存地址的原理相同，此处不再赘述。
在一种实现具体的方式中，获取DMA内存地址相对应的DMA虚拟地址的方式可以通过查询地址转换表来实现。所述获取与所述目标主机的DMA内存地址相对应的全局虚拟地址空间上的DMA虚拟地址包括：根据所述目标主机的DMA内存地址，在地址转换表中查询，获取与所述目标主机的DMA内存地址相对应的全局虚拟地址空间上的DMA虚拟地址，所述地址转换表包含所述全局虚拟地址空间上的虚拟地址区间中的虚拟地址与与所述虚拟地址区间相对应的主机的DMA内存地址区间中的内存地址的对应关系；
所述地址转换表可以为前述第一种方法实施例中的地址转换表，也可以是针对根据DMA内存地址查询相对应DMA虚拟地址进行优化后的单独的地址转换表。在一种可列举的方式中，目标主机的DMA内存地址为0x0bcd，根据该地址，可以定位到内存起始地址为0x0，大小为1G的主机DMA内存地址。该表项所对应的DMA虚拟地址区间的起始地址为0xa000，因此，根据所述DMA内存地址与内存起始地址的差值，以及DMA虚拟地址区间的起始地址，可以得到相对应的DMA虚拟地址为0xabcd。
结合图6B,在另一种实现方式中，数据传输设备可以获取主机发送的DMA操作启动请求，将其修改后转发给I/O设备。所述数据传输方法还包括：
S604，获取主机向I/O设备发送的DMA操作启动请求，所述操作命令包 含目标主机的DMA内存地址，用于指示I/O设备向目标主机进行DMA操作；
S605将所述DMA操作启动请求的目标主机的DMA内存地址修改为与之相对应的全局虚拟地址空间上的DMA虚拟地址；
S606将所述修改后的DMA操作启动请求发送给I/O设备。
同样的，根据DMA虚拟地址、DMA内存地址和主机之间的对应关系，确定与所述DMA操作启动请求中的所述DMA内存地址对应的所述全局虚拟地址空间上的DMA虚拟地址的方式与前述通过DMA虚拟地址获取与之相对应的DMA内存地址的原理相同，此处不再赘述。
可见，在本发明实施例中，通过接收主机发送的查询命令，获取与所述目标主机的DMA内存地址相对应的全局虚拟地址空间上的DMA虚拟地址，并向所述主机发送返回报文，使主机获得与DMA内存地址相对应的DMA虚拟地址，从而可以发送包含所述DMA虚拟地址的DMA操作启动请求，指示I/O设备对所述DMA虚拟地址所对应的DMA内存地址发起DMA操作。或者，通过获取主机向I/O设备发送的DMA操作启动请求，将所述DMA操作启动请求的目标主机的DMA内存地址修改为与之相对应的全局虚拟地址空间上的DMA虚拟地址；将所述修改后的DMA操作启动请求发送给I/O设备，从而使主机所发送的DMA操作启动请求可以用于指示I/O设备对所述DMA虚拟地址所对应的DMA内存地址发起DMA虚拟地址。
结合图7A，是本发明实施例提供的第三种数据传输方法的流程示意图。本实施例将结合第一种实施例和第二种实施例进行说明，本实施例的方法包含了第一种实施例中的S401、S402、S403步骤，并可以包含第二种实施例中S601-S606步骤，因此与所述步奏相同或相似的描述，在本实施例中不再赘述。
本实施例可以实现对I/O设备发送的用于对目的主机进行DMA操作的DMA报文进行权限控制。即当数据传输设备接收到DMA报文后，会判断所述DMA报文对目的主机的的DMA操作是否符合权限要求，当所述DMA报文具有对目的主机的DMA操作的权限时，才对所述DMA报文的DMA地址 进行修改。
结合图7，在本实施例的一种实现方式中，所述方法还包括：
S701、确定所述DMA虚拟地址对应的DMA内存地址和目标主机；
S702、根据所述DMA报文的权限信息和所述目标主机的权限要求确定对所述目标主机进行的DMA操作符合权限要求；
S703、如果符合，将所述DMA报文的DMA虚拟地址修改为所述DMA操作的目标主机的DMA内存地址。
判断对目标主机进行的DMA操作是否符合权限要求可以通过多种方式实现，例如，可以通过查询单独的主机的标识和对应DMA操作类型的权限表来判断是否符合权限要求；或者，当前述的对应关系存储在地址转换表中，可以通过查询地址转换表来判断是否符合权限要求，所述地址转换表相比于前述地址转换表，增加操作类型一项。根据DMA虚拟地址定位到所述地址转换表中的表项时，可以获得对该DMA虚拟地址所在虚拟地址区间所对应的目的主机可进行的DMA操作类型。
在本实施例的另一种实现方式中，包括以下信息中的至少一种：所述DMA报文的类型、所述DMA报文的权限标识和发送所述DMA报文的主机的标识。
本实现方式中，在判断DMA操作是否具有权限时，增加了权限标识作为考虑因素。权限标识是是指用于识别所在报文与DMA操作权限相关的特征的标识。权限标识可以为一般DMA报文中已经存在的信息，例如，权限标识可以指发送所述DMA报文的I/O设备的识别ID，通过对权限标识的判断，可以实现特定的I/O设备具有权限对特定的主机进行特定的DMA操作；权限标识也可以是新增加的一般DMA报文中并不存在的信息，例如，权限标识可以是对DMA操作所要传输的数据种类的识别ID，从而I/O设备可以将实现特定的数据种类通过DMA方式与特定的主机进行传输，或者，权限标识可以是指示I/O设备发起DMA操作的主机的识别ID，从而实现特定的主机具有权限发起I/O设备对某一特定主机进行DMA操作。可以理解的是，权限标识可以如上述列举的为某一单一信息的识别ID，也可以是几种信息组合后的识别ID，例 如，权限标识可以用于识别某一特定I/O设备发送的传输某一特定数据种类的DMA报文。
类似的，判断对目标主机进行的DMA操作是否符合权限要求可以通过多种方式实现，例如，可以通过查询单独的包含主机ID、权限标识和对应DMA操作类型的权限表来判断是否符合权限要求；或者，查询地址转换表来判断是否符合权限要求，所述地址转换表相比于前述地址转换表，增加操作类型以及权限标识两项内容。
结合图8，现列举一种在地址转换表中增加操作类型以及权限标识以后，对报文进行权限控制的例子：数据传输设备获取到I/O设备发送的DMA报文802，DMA报文802的DMA地址为DMA虚拟地址0xabcd，识别ID为0001。根据DMA虚拟地址，可以定位所述DMA虚拟地址所对应的虚拟地址区间的起始地址为0xa000，空间大小为1G，所对应的主机的内存区间为主机1的起始地址为0x0，大小为1G的内存空间。而根据识别ID0001，可知该识别ID对主机1的DMA操作权限为R，即识别ID为0001的DMA报文只可以对主机1的DMA内存区间发起读操作。因此，当DMA报文802的操作类型为写操作时，符合权限要求，数据传输设备将DMA报文802的DMA地址进行修改，并发送给主机1。
可见，在本实施例中，通过对DMA报文进行权限判断，可以实现对I/O设备对主机进行DMA操作时的权限控制。由于I/O设备同时与多个主机相连接，通过权限控制，可以提高整个网络数据传输的可靠性和安全性。此外，通过权限控制，还可以拓展网络使用的场景，实现更加复杂的网络部署和传输方式。
结合图9，是本发明实施例提供的第四种数据传输方法的流程示意图。本实施例将结合第一种、第二种以及第三种实施例进行说明，在本实施例中出现的前述实施例中已经出现，且含义相同或相近似的概念或者术语，在本实施例中不再进行赘述。本实施例的方法与前述实施例中方法的部分步骤相对应，因此，可以结合前述实施例中的相关步骤对本实施例进行理解和拓展。
本实施例所提供的数据传输方法的执行主体是图2所描述的网络拓扑中的主机，代表一个独立的物理主机，运行独立的OS，拥有独立的DMA地址空间。本方法用以实现主机指示I/O设备向目标主机进行DMA操作，所述方法包括如下步骤：
S901、获取目标主机的DMA地址信息；
目标主机是指执行本方法的主机所要指示I/O设备进行DMA操作的目标主机，即I/O设备进行DMA操作所发送的DMA报文中DMA虚拟地址所对应的DMA内存地址所在的主机。在一种可能的场景下，目标主机即为执行方法的主机本身，则主机指示I/O设备向所述主机发起DMA操作，从而实现主机与I/O设备之间的数据交换；在另一种可能的场景下，目标主机为与同一I/O设备相连接的本方法执行主机之外的其他主机，则主机指示I/O设备向其他主机发起DMA操作，从而实现I/O设备与其他主机之间进行数据交换。
DMA地址信息可以为目标主机的DMA内存地址信息，也可以为DMA虚拟地址信息。当目标主机为本方法执行主机时，通过分配DMA内存地址区间，即可获取DMA内存地址信息；当目标主机为其他主机时，可以通过在地址转换表中查询得到目标主机的DMA内存地址或者DMA虚拟地址，也可以通过接收有其他设备发送的请求指令中所包含的DMA内存地址或者DMA虚拟地址获得。
S902、根据所述目标主机的DMA地址信息，发送DMA操作启动请求，所述DMA操作启动请求包含DMA地址，用以指示所述I/O设备对在全局虚拟地址空间上的DMA虚拟地址进行DMA操作，所述DMA虚拟地址为目标主机的DMA内存地址映射到全局虚拟地址空间上的DMA虚拟地址。
正如背景技术中所介绍，I/O设备进行DMA操作可以由DMA操作启动请求所发起。在现有技术中，由于一个I/O设备只能与一个主机相连接进行DMA操作，因此，当主机需要与I/O设备进行数据交换时，可以向I/O设备发送DMA操作启动请求，DMA操作启动请求中包含用以I/O设备读取的数据所在内存地址或者用以存储I/O设备所发送的数据的内存地址。I/O设备接收DMA操作启动请求后，即向所述内存地址发起DMA操作，将数据读取或 者写入，从而完成数据交换。在本发明中，由于多台主机同时与I/O设备相连，并可以进行DMA操作，因此，DMA操作启动请求不但可以用于指示I/O设备与本机进行DMA操作，还可以指示I/O设备与其他主机进行DMA操作。在分布式共享I/O设备的场景下，主机可以通过本实施例进行主机与I/O设备、以及主机与主机之间的DMA方式的数据交换。
当DMA地址信息包括目标主机的DMA内存地址时，在一种实现方式中，所述根据所述目标主机的DMA地址信息，发送DMA操作启动请求包括将所述DMA操作启动请求发送给所述数据传输设备，所述DMA操作启动请求的DMA地址为所述目标主机的DMA内存地址，用以指示数据传输设备将所述DMA操作启动请求中的DMA地址由目标主机的DMA内存地址修改为与之相对应的全局虚拟地址空间上的DMA虚拟地址，并将所述DMA操作启动请求转发给目标主机。。
结合前述第二种实施例中的步骤，在这种实现方式中，主机将DMA内存地址作为DMA操作启动请求所指示的DMA操作的DMA地址。由于I/O设备的进行DMA操作所发送DMA报文需要为DMA虚拟地址，因此，将所述DMA操作启动请求发送给数据传输设备，由数据传输设备将所述DMA操作启动请求中的DMA内存地址转化为与之相对应的DMA虚拟地址，并将转换后的DMA操作启动请求发送给I/O设备。
当DMA地址信息包括目标主机的DMA内存地址时，在另一种实现方式中，所述根据所述目标主机的DMA地址信息，发送DMA操作启动请求包括：所述根据所述目标主机的DMA地址信息，发送DMA操作启动请求包括：根据DMA虚拟地址、DMA内存地址和主机之间的对应关系，获取与所述目标主机的DMA内存地址相对应的全局虚拟地址空间上的DMA虚拟地址，将所述DMA操作启动请求发送给I/O设备，所述DMA操作启动请求的DMA地址为所述DMA虚拟地址。
根据目标主机的内存地址，在地址转换表中进行查询获得与之相对应的虚拟地址，可以结合前述实施例中提供给的查询方法进行理解。具体的，例如，当目标主机的内存地址为0x0bcd时，在地址转换表中查询，可得到该内存地 址所在内存地址区间为起始地址为0x0，大小为1G的内存地址空间，与之相对应的虚拟地址区间的起始地址为0xa000，因此，所述内存地址所对应的虚拟地址应为0xabcd。
当DMA操作启动请求发送给I/O设备，可以是直接将DMA操作启动请求发送到与之相连接的I/O设备上；或者通过其他设备，包括数据传输设备进行转发，将DMA操作启动请求发送到与之间接连接的I/O设备上。
当DMA地址信息包括目标主机的DMA虚拟地址，在一种实现方式中，所述根据所述目标主机的DMA地址信息，发送DMA操作启动请求包括：将所述DMA操作启动请求发送给I/O设备，所述DMA操作的DMA地址为所述目标主机的DMA内存地址所对应的全局虚拟地址空间上的DMA虚拟地址。
同样的，当DMA操作启动请求发送给I/O设备，可以是直接将DMA操作启动请求发送到与之相连接的I/O设备上；或者通过其他设备，包括数据传输设备进行转发，将DMA操作启动请求发送到与之间接连接的I/O设备上。
在本实施例的一种实现方式中，主机分配DMA内存地址，所述DMA内存地址用于一个或多个I/O设备通过直接内存访问DMA的方式访问所述DMA内存地址，并发送注册信息，所述注册信息包含主机的识别ID和主机的DMA内存地址。主机可以在接入网络或者重新分配了内存地址区间后发送注册信息，可以将注册信息发送给数据传输设备，或者发送给管理系统所在主机，用以更新数据传输设备或者其他主机所存储的对应关系。
在另一种实现方式中主机分配DMA内存地址区间，所述DMA内存地址区间由DMA内存地址组成，所述DMA内存地址用于一个或多个I/O设备通过直接内存访问DMA的方式访问所述DMA内存地址。并发送注册信息，所述注册信息包含主机的识别ID和主机的DMA内存地址区间。主机可以在接入网络或者重新分配了内存地址区间后发送注册信息，可以将注册信息发送给数据传输设备，或者发送给管理系统所在主机，用以更新数据传输设备或者其他主机所存储的对应关系
在本实施例的另一种实现方式中，主机还可以更新存储于本地的地址转换 表，从而保持本地的地址转换表与数据传输设备的地址转换表同步。所述方法还包括：获取更新信息，所述更新信息包括需要更新的DMA虚拟地址、DMA内存地址和主机之间的对应关系；根据所述更新信息，将需要更新的DMA虚拟地址、DMA内存地址和主机之间的对应关系添加或更新到已经存在的DMA虚拟地址、DMA内存地址和主机之间的对应关系中。
根据对应关系的具体实现形式不同，更新信息中主机的DMA内存地址区间与虚拟地址区间的对应关系的具体表现形式应当与之对应。具体地址转换表的实现形式可以参考第一种实施例中所列举的方式。更新信息可以来自数据传输设备，也可以来自网络中的其他设备，如管理系统所在的主机，或者其他与主机相连接的主机。
可见，在本发明实施例中，通过获取目标主机的DMA地址信息，并根据所述目标主机的DMA地址信息，发送DMA操作启动请求，从而使I/O设备对目标主机发起DMA操作。在多主机共享I/O设备的环境下，可以对I/O设备与目标主机之间的数据传输进行管理。当I/O设备作为数据存储设备时，还可实现主机与目标主机之间通过I/O设备进行快速的数据同步，从而提高网络传输效率。
此外，通过发送更新信息，或者通过获取对应关系的更新信息，可以实现当网络拓扑发生变化，或者主机的DMA内存地址发送变化后，及时对对应关系进行更新，并将更新信息与其他设备同步。
结合图10，是本发明实施例提供的一种数据传输设备1001的结构示意图。本实施例中提供的数据传输设备可用于执行前述实施例中第一种、第二种以及第三种实施例的方法。因此，可以结合前述实施例对本实施例进行理解，在本实施例中出现的前述实施例中已经出现，且含义相同或相近似的概念或者术语，在本实施例中不再进行赘述。
本数据传输设备在图2所述的网络拓扑结构中作为数据传输设备。本设备可以为一个独立的设备，分别于主机以及I/O设备相连接；也可以是集成在I/O设备上的模块，或者是集成在某一主机上，与其他主机和I/O设备相连的模块， 即只要满足在网络拓扑中与主机和I/O设法相连接即可。本设备可以通过高速总线，如PCIe总线与主机以及I/O设备连接，对于与设备相连接的主机而言，枚举到的是一个虚拟的PCIe设备，这个虚拟PCIe设备的硬件资源对应到共享的PCIe I/O设备。
数据传输设备1001分别与所述多个主机和所述一个或多个输入/输出I/O设备相连接，所述多个主机共享一个或多个I/O设备，所述一个或多个I/O设备通过直接内存访问DMA的方式访问多个主机各自的DMA内存地址，所述DMA内存地址被一一映射到全局虚拟地址空间的虚拟地址上，所述设备包括：
接收模块1002，用于获取I/O设备发送的DMA报文，所述DMA报文中携带DMA虚拟地址，所述DMA虚拟地址为在所述全局虚拟地址空间上的虚拟地址；
转换模块1003，用于根据DMA虚拟地址、DMA内存地址和主机之间的对应关系，确定所述DMA虚拟地址对应的DMA内存地址和目标主机，其中，所述DMA内存地址为映射到所述DMA虚拟地址上的DMA内存地址，所述目标主机为映射到所述DMA虚拟地址的所述DMA内存地址所在的主机；以及将所述DMA报文中的所述DMA虚拟地址修改为映射到所述DMA虚拟地址的所述DMA内存地址；
发送模块1004，将修改后的所述DMA报文向所述目标主机发送。
在一种实施方式下，转换模块所述根据所述DMA虚拟地址、DMA内存地址和主机之间的对应关系，确定所述DMA虚拟地址对应的DMA内存地址和目标主机时，所述DMA虚拟地址、DMA内存地址和主机之间的对应关系包括：所述多个主机各自的DMA内存地址组成多个DMA内存地址区间，每个主机对应一个或多个DMA内存地址区间；所述全局虚拟地址空间包含不重叠的多个虚拟地址区间，所述多个虚拟地址区间与所述多个DMA内存地址区间一一对应，且虚拟地址区间中的虚拟地址与对应的DMA内存地址区间中的DMA内存地址一一对应。
所述的所述DMA虚拟地址、DMA内存地址和主机之间的对应关系可以通过地址转换表来进行存储。地址转换表即为前述方法实施例中所描述的地址 转换表，地址转换表可以存储在所述数据传输设备的内存或者寄存器中，由转换模块1003读取后进行查询；当数据传输设备不是网络拓扑中的一个独立节点，侧所述地址转换表也可以存储在所述数据传输设备所在的主机或者I/O设备的内存或寄存器中，并通过转换模块1003进行赌气和查询。
地址转换表可以通过预先人工进行设定，或者通过位于网络中的其他设备进行同步从而获得地址转换表。在另一种实现方式中，所述接收模块还用于，获取所述多个主机中的一个或多个主机的注册信息，所述注册信息包含相应主机的标识ID和DMA内存地址；所述设备还包括虚拟地址维护模块，用于根据所述主机的DMA内存地址，为所述主机分配虚拟地址，所述虚拟地址位于全局虚拟地址空间上，所述虚拟地址与所述主机的DMA内存地址一一对应；以及将所述主机ID、以及所述主机的DMA内存地址和所述虚拟地址对应关系添加或更新到所述DMA虚拟地址、DMA内存地址和主机之间的对应关系中。
在另一种实现方式中，所述接收模块还用于，获取所述多个主机中的一个或多个主机的注册信息，所述注册信息包含相应主机的标识ID和DMA内存地址区间；所述设备还包括虚拟地址维护模块，用于根据所述主机的一个或多个DMA内存地址区间，为所述主机分配一个或多个虚拟地址区间，所述虚拟地址区间位于全局虚拟地址空间上，所述一个或多个虚拟地址区间与所述主机的一个或多个DMA内存地址区间一一对应，且虚拟地址区间中的虚拟地址与对应的DMA内存地址区间中的DMA内存地址一一对应；以及将所述主机ID、以及所述主机的DMA内存地址区间和所述虚拟地址区间的对应关系添加或更新到所述DMA虚拟地址、DMA内存地址和主机之间的对应关系中。
主机的注册信息可以有主机在接入网络后，由主机发送给本方法的执行主体设备，或者可以通过管理系统将接入网络的主机的注册信息发送给本方法的执行主体设备。主机的内存地址区间可以是通过内存地址的起始地址和区间大小来表示，也可以通过具体的连续或非连续的地址或地址区间的集合来表示。为主机分配虚拟地址区间，即根据主机的内存地址区间大小，分配与之相应大小的虚拟地址区间，并将虚拟地址区间添加到全局虚拟地址空间上，或者用所 述虚拟地址区间替换所属主机在全局虚拟地址空间上已存在的虚拟地址区间。可以理解的，在分配虚拟地址区间时，应当保证虚拟地址区间与主机的内存地址区间为一一对应关系。
在一种实施例中，可以将所述对应关系向主机进行同步更新：所述发送模块还用于，当所述DMA虚拟地址、DMA内存地址和主机之间的对应关系发生更新后，向主机发送更新信息，用以指示所述主机同步更新存储在所述主机的所述DMA虚拟地址、DMA内存地址和主机之间的对应关系。更新信息可以是对应关系中发生变化的部分信息，此种更新信息可用于已经存储了更新前的对应关系的设备的同步更新；或者，可以是完整的地址转换表。可以理解的，更新信息可以在地址转换表更新后主动发送给主机，也可以接收主机发送的查询命令后，判断地址转换表是否发生更新，若发生更新则向主机发送更新信息。可以向全部主机发送所述更新信息，也可以向部分特定主机发送，或者向管理系统所在主机发送。
结合图11，列举本实施例一种具体的实现方式。数据传输设备1108通过PCIe桥1102接收I/O设备发送的DMA报文1101，DMA报文1101的DMA地址为虚拟地址。PCIe桥将DMA报文1101传送给DMA地址转换逻辑模块1103，DMA地址转换逻辑模块包含处理芯片1104和寄存器1105，处理芯片1104访问寄存器1105中存储的地址转换表1106，根据DMA报文1101的DMA虚拟地址，得到与所述虚拟地址相对应的DMA内存地址，并将DMA报文1101的DMA地址由所述虚拟地址修改为所述内存地址，得到修改后的DMA报文1107。DMA地址转换逻辑模块1103将所述修改后的DMA报文1107传送给PCIeDMA引擎1108，由PCIeDMA引擎1108将所述DMA报文1101发送给目标主机，从而使I/O设备向目标主机发起DMA操作，在本实现方式中，PCIe桥和PCIeDMA引擎可实现前述实施例的接收模块和发送模块。
可见，在本实施例中，网络传输设备1001通过获取I/O设备发送的DMA报文，将所述DMA报文的DMA虚拟地址修改为所述DMA操作的目标主机的DMA内存地址，并将所述修改后的DMA报文发送给所述目标主机，I/O设备可以通过包含DMA虚拟地址的DMA报文，实现对多个主机进行DMA 操作。由于DMA虚拟地址位于同一个全局虚拟地址空间上，因此相对于现有技术，不会发送DMA内存地址冲突。由于多个主机与I/O设备之间可以同时进行数据传输，因此主机间的数据传输可以通过I/O设备的DMA操作实现，而不需主机间进行网络传输。由于主机与I/O设备的链接总线具有高带宽和低延时的特点，且无需主机CPU进行干预，因此提高了网络传输的及时性和高效性，拓展了网络应用的场景。
此外，在本发明实施例中，通过当所述对应关系发生更新后，向主机发送更新信息，可以实现主机中的地址转换表与数据传输设备中的对应关系同步更新。因此，主机可以独立进行DMA虚拟地址和与之相对应的DMA内存地址之间的相互转化，从而扩展了本发明的应用场景。
在一种实施例中，所述网络传输设备还可以反馈主机所发送的查询命令：所述接收模块还用于，接收主机发送的查询命令，将所述查询命令传输到虚拟地址查询模块，所述查询命令中包含需要查询的目标主机的DMA内存地址；
所述设备还包括虚拟地址查询模块，用于获取从接收模块传输的查询命令，根据所述目标主机的DMA内存地址查询与之相对应的全局虚拟地址空间上的DMA虚拟地址，将所述全局虚拟地址空间上的DMA虚拟地址传输到发送模块；
所述发送模块还用于，获取所述虚拟地址查询模块传输的所述全局虚拟地址空间上的DMA虚拟地址，向所述主机发送返回报文，所述返回报文中包含所述全局虚拟地址空间上的DMA虚拟地址。
获取与所述目标主机的DMA内存地址相对应的全局虚拟地址空间上的DMA虚拟地址有多种实现方式，获取方式与前述通过DMA虚拟地址获取与之相对应的DMA内存地址的原理相同，此处不再赘述。
在一种实施例中，所述网络传输设备还可实现对主机发送的DMA操作启动请求进行修改和转发：
所述接收模块还用于，获取任意一个主机向I/O设备发送的DMA操作启动请求，所述DMA操作启动请求包含另一主机的DMA内存地址，所述DMA 操作启动请求用于指示所述I/O设备向所述另一主机进行DMA操作；
所述转换模块还用于，根据DMA虚拟地址、DMA内存地址和主机之间的对应关系，确定与所述DMA操作启动请求中的所述DMA内存地址对应的所述全局虚拟地址空间上的DMA虚拟地址；以及将所述DMA操作启动请求中的所述DMA内存地址修改为确定的所述DMA虚拟地址
所述发送模块还用于，将所述修改后的DMA操作启动请求向所述I/O设备设备。
同样的，获取与所述目标主机的DMA内存地址相对应的全局虚拟地址空间上的DMA虚拟地址有多种实现方式，获取方式与前述通过DMA虚拟地址获取与之相对应的DMA内存地址的原理相同，此处不再赘述。
可见，在本发明实施例中，数据传输通过接收主机发送的查询命令，获取与所述目标主机的DMA内存地址相对应的全局虚拟地址空间上的DMA虚拟地址，并向所述主机发送返回报文，使主机获得与DMA内存地址相对应的DMA虚拟地址，从而可以发送包含所述DMA虚拟地址的DMA操作启动请求，指示I/O设备对所述DMA虚拟地址所对应的DMA内存地址发起DMA操作。或者，通过获取主机向I/O设备发送的DMA操作启动请求，将所述DMA操作启动请求的目标主机的DMA内存地址修改为与之相对应的全局虚拟地址空间上的DMA虚拟地址；将所述修改后的DMA操作启动请求发送给I/O设备，从而使主机所发送的DMA操作启动请求可以用于指示I/O设备对所述DMA虚拟地址所对应的DMA内存地址发起DMA虚拟地址。
在一种实施例中，所述网络传输设备还可以实现对DMA报文的权限控制。在一种具体的实施方式，所述转换模块还用于，确定所述DMA虚拟地址对应的DMA内存地址和目标主机后，根据所述DMA报文的操作类型和所述目标主机的权限要求确定对所述目标主机进行的DMA操作符合权限要求，如果符合，将所述DMA报文的DMA虚拟地址修改为所述DMA操作的目标主机的DMA内存地址。
判断对目标主机进行的DMA操作是否符合权限要求可以通过多种方式实现，例如，可以通过查询单独的包含主机ID和对应DMA操作类型的权限表 来判断是否符合权限要求；或者，查询地址转换表来判断是否符合权限要求，所述地址转换表相比于前述地址转换表，增加操作类型一项。根据DMA虚拟地址定位到所述地址转换表中的表项时，可以获得对该DMA虚拟地址所在虚拟地址区间所对应的目的主机可进行的DMA操作类型。
在另一种具体的实施方式中，所述DMA报文还包含所述权限标识；所述转换模块还用于，确定所述DMA虚拟地址对应的DMA内存地址和目标主机后，根据所述DMA报文的操作类型、所述权限标识和所述目标主机的权限要求确定所述包含所述权限标识的DMA报文对所述目标主机进行的所述DMA操作是否符合权限要求，如果符合，将所述DMA报文的DMA虚拟地址修改为所述DMA操作的目标主机的DMA内存地址。
本实现方式中，在判断DMA操作是否具有权限时，增加了权限标识作为考虑因素。权限标识是是指用于识别所在报文与DMA操作权限相关的特征的标识。权限标识可以为一般DMA报文中已经存在的信息，例如，权限标识可以指发送所述DMA报文的I/O设备的识别ID，通过对权限标识的判断，可以实现特定的I/O设备具有权限对特定的主机进行特定的DMA操作；权限标识也可以是新增加的一般DMA报文中并不存在的信息，例如，权限标识可以是对DMA操作所要传输的数据种类的识别ID，从而I/O设备可以将实现特定的数据种类通过DMA方式与特定的主机进行传输，或者，权限标识可以是指示I/O设备发起DMA操作的主机的识别ID，从而实现特定的主机具有权限发起I/O设备对某一特定主机进行DMA操作。可以理解的是，权限标识可以如上述列举的为某一单一信息的识别ID，也可以是几种信息组合后的识别ID，例如，权限标识可以用于识别某一特定I/O设备发送的传输某一特定数据种类的DMA报文。
可见，在本实施例中，通过对DMA报文进行权限判断，可以实现对I/O设备对主机进行DMA操作时的权限控制。由于I/O设备同时与多个主机相连接，通过权限控制，可以提高整个网络数据传输的可靠性和安全性。此外，通过权限控制，还可以拓展网络使用的场景，实现更加复杂的网络部署和传输方式。
本发明提供一种数据传输系统的实施例。本实施例中提供的数据传输系统包含可以执行前述第一种、第二种、第三种以及第四种方法实施例的设备因此，可以结合前述实施例对本实施例进行理解，在本实施例中出现的前述实施例中已经出现，且含义相同或相近似的概念或者术语，在本实施例中不再进行赘述。
在本实施例中，所述系统包括至少一个主机，所述计算机系统包括多个主机、一个或多个输入/输出I/O设备、以及分别与所述多个主机和所述一个或多个I/O设备连接的数据传输设备。
其中，所述数据传输设备用于将所述多个主机的DMA内存地址一一映射到全局虚拟地址空间的虚拟地址上；所述数据传输设备还用于获取I/O设备发送的携带有DMA虚拟地址的DMA报文，所述DMA虚拟地址为在所述全局虚拟地址空间上的虚拟地址；根据DMA虚拟地址、DMA内存地址和主机之间的对应关系，确定所述DMA虚拟地址对应的DMA内存地址和目标主机，所述DMA内存地址为映射到所述DMA虚拟地址上的DMA内存地址，所述目标主机为所述DMA内存地址所在的主机；将所述DMA报文中的所述DMA虚拟地址修改为映射到所述DMA虚拟地址的所述DMA内存地址；以及将修改后的所述DMA报文向所述目标主机发送。
在一种实现方式下，所述DMA虚拟地址、DMA内存地址和主机之间的对应关系包括：所述多个主机各自的DMA内存地址组成多个DMA内存地址区间，每个主机对应一个或多个DMA内存地址区间；所述全局虚拟地址空间包含不重叠的多个虚拟地址区间，所述多个虚拟地址区间与所述多个DMA内存地址区间一一对应，且虚拟地址区间中的虚拟地址与对应的DMA内存地址区间中的DMA内存地址一一对应；所述确定所述DMA虚拟地址对应的DMA内存地址和目标主机包括：根据所述DMA虚拟地址所述的虚拟地址区间确定与所述虚拟地址区间对应的DMA内存地址区间；根据所述DMA内存地址区间确定与所述DMA内存地址区间对应的主机以及与在所述DMA内存地址区间中映射到所述DMA虚拟地址的DMA内存地址。
本系统可以实现一个主机指示I/O设备向另一主机发起DMA操作，在一 种实现方式中，所述多个主机包括第一主机和第二主机，所述第一主机用于获取所述第二主机的DMA虚拟地址，以及将所述第二主机的DMA内存地址所对应的DMA虚拟地址作为DMA地址，向所述I/O设备发送DMA操作启动请求，所述DMA操作启动请求用于指示I/O设备向所述第二主机进行DMA操作。
在本实现方式中，第一主机可以获取所述第二主机的DMA虚拟地址，可以是接收第二主机所发送的数据传输请求；或者，可以是由管理系统所在的主机发送的数据传输请求；或者，可以是第一主机通过查询地址转换表获得第二主机的虚拟地址区间，从而得到第二主机的DMA虚拟地址。第一主机向I/O设备发送DMA操作启动请求，当I/O设备与主机直接相连接时，可以直接发送所述DMA操作启动请求；当I/O设备与主机通过数据传输设备间接相连接时，可以通过数据传输设备将所述DMA操作启动请求转发给所述I/O设备。
在一种实现方式中，所述多个主机包括第一主机和第二主机，所述第一主机用于获取所述第二主机的DMA虚拟地址，以及将所述第二主机的DMA内存地址所对应的DMA虚拟地址作为DMA地址，向I/O设备发送DMA操作启动请求，所述DMA操作启动请求用于指示所述I/O设备向所述第二主机进行DMA操作。
或者，所述多个主机包括第一主机和第二主机，所述第一主机用于获取所述第二主机的DMA内存地址，以及根据DMA虚拟地址、DMA内存地址和主机之间的对应关系，获取与所述目标主机的DMA内存地址相对应的全局虚拟地址空间上的DMA虚拟地址，将所述DMA操作启动请求发送给I/O设备，所述DMA操作启动请求的DMA地址为所述DMA虚拟地址。
本实现方式中，类似的，第一主机可以获取所述第二主机的DMA内存地址，可以是接收第二主机所发送的数据传输请求；或者，可以是由管理系统所在的主机发送的数据传输请求；或者，可以是第一主机通过查询地址转换表获得第二主机的内存地址区间，从而得到第二主机的DMA内存地址。第一主机向数据传输设备发送DMA操作启动请求，数据传输设备在获取所述DMA操作启动请求后，可以参考第一种方法实施例的方法，将DMA操作启动请求中 的DMA内存地址转换为与之相对应的DMA虚拟地址，并将修改后的DMA操作启动请求发送给I/O设备。
在分布式系统中，多个主机共享I/O设备，并可以将I/O设备作为数据存储设备。当主机之间需要进行数据交换是，可以通过本实施例中的数据传输系统，通过DMA方式快速进行数据交换。结合图12，是本发明实施例的一种具体的实现方式：
在分布式文件系统场景中，主机1作为分布式文件系统主节点，存储文件系统元数据信息，主机2为普通主分布式文件系统节点。主机2请求主机1上的数据信息，进行本地文件系统信息的同步。该流程如下，如图7所示：
S1201、主机1和主机2共享I/O设备，主机2分配接收数据缓存空间，通过DMA地址转换表，获取全局虚拟地址空间的DMA虚拟地址区间。
S1202、主机2发起请求获取主机1上的数据，同时主机2发送DMA虚拟地址区间上的DMA虚拟地址给主机1。
S1203、主机1接收到请求并确认，在本地生成DMA操作启动请求，DMA操作启动请求的DMA地址为主机2虚拟地址区间上的DMA虚拟地址，并就DMA操作启动请求发送给I/O设备。
S1204、I/O设备接收到DMA操作启动请求后，对发起DMA操作，即发送DMA报文，所述报文的DMA地址为DMA虚拟地址。
S1205、数据传输设备获取DMA操作启动请求，根据DMA地址转换表确定DMA报文的目的主机为主机2，同时将DMA报文的DMA地址修改为为主机2的DMA内存地址。
S1206、数据传输设备把DMA报文发送给主机2，DMA报文访问主机2内存地址，I/O设备向主机2发起DMA操作。
在一种实现方式中，结合前述第三种方法实施例，本实施例还可以实现对DMA报文的权限控制。所述数据传输设备所包含的转换模块还用于，所述数据传输设备还用于，确定所述DMA虚拟地址对应的DMA内存地址和目标主机后，根据所述DMA报文的操作类型和所述目标主机的权限要求确定对所述 目标主机进行的DMA操作符合权限要求，如果符合，将所述DMA报文的DMA虚拟地址修改为所述DMA操作的目标主机的DMA内存地址。或者，所述DMA报文还包含所述权限标识，所述数据传输设备还用于，确定所述DMA虚拟地址对应的DMA内存地址和目标主机后，根据所述DMA报文的操作类型、所述权限标识和所述目标主机的权限要求确定所述包含所述权限标识的DMA报文对所述目标主机进行的所述DMA操作是否符合权限要求，如果符合，将所述DMA报文的DMA虚拟地址修改为所述DMA操作的目标主机的DMA内存地址。
可见，在本实施例中，在整一个交互过程中，主机之间仅进行了简单的信息交互，传递目标DMA地址信息，所有需要传输的数据都通过I/O设备和主机间的DMA方式进行了传输，同时由于I/O设备与主机之间总线的高带宽，低延时，这种方式下，数据传输性能得到了显著的提升。不仅省略了数据在主机间网络上的拷贝，同时DMA操作无需CPU介入，使得主机1和主机2的CPU性能在整个数据拷贝过程中得到了释放。
此外，通过对DMA报文的权限控制，可以只对符合权限的DMA报文进行转发，进而只有复核权限的DMA操作才能对第二主机发起。由此提高了DMA操作的安全性，且可以由此实现对DMA操作的过滤，拓展网络使用的场景，实现更加复杂的网络部署和传输方式。
本发明提供另一种数据传输系统的实施例。本实施例中提供的数据传输系统包含可以执行前述第一种、第二种、第三种以及第四种方法实施例的设备因此，可以结合前述实施例对本实施例进行理解，在本实施例中出现的前述实施例中已经出现，且含义相同或相近似的概念或者术语，在本实施例中不再进行赘述。
本实施例应用与在分布式协作的环境下，不同的主机需要访问位于公共I/O设备的热点数据，且这些数据需要在多个主机间实时同步。所述至少一个主机包括第一主机，所述第一主机用于当I/O设备中的数据更新后，向I/O设备发送至少一条DMA写操作命令，所述DMA操作启动请求用以指示I/O设 备向除第一主机以外的其他主机进行DMA写操作，从而将数据同步到其他主机。
所述多个主机包括第一主机，所述第一主机用于当I/O设备中的数据更新后，向I/O设备发送至少一条DMA写操作命令，所述DMA操作启动请求用以指示I/O设备向除第一主机以外的其他主机进行DMA写操作，从而将数据同步到其他主机
I/O设备的数据更新可以参考前述实施例中的方法，I/O设备将位于主机DMA内存地址上的数据通过DMA读操作读取到I/O设备上，从而实现数据的更新。在一种具体的实现方式中，当I/O设备进行数据更新时，将需要更新的数据区域上锁，直到数据更新过程完毕后进行解锁，从而防止其他主机在更新过程中访问所述数据。
在一种实现方式中，所述数据传输系统中包含管理系统，管理系统位于所述第一主机上，用于负责热点数据在主机之间的同步管理。结合图13，在可列举的一种实施方式中，第二主机对I/O设备的热点数据进行更新，并在更新后将更新后的热点数据同步到其他主机上，所述数据同步过程包含如下步骤：
S1301，第二主机向第一主机发送数据同步请求，所述数据同步请求包含第二主机所要更新的数据所在的DMA内存地址。
S1302，位于第一主机上的管理系统接收到第二主机所发送的数据请求后，将I/O设备上要更新的热点数据区域进行上锁，并将上锁状态更新到其他主机上，其他主机暂时无法访问上锁热点数据。此外，管理系统通过查询地址转换表，获得与第二主机的DMA内存地址相对应的DMA虚拟地址，并向I/O设备发送DMA读操作命令，所述DMA读操作命令的DMA地址为所述DMA虚拟地址，用以指示I/O设备向第二主机发起DMA读操作。
S1303，I/O设备接收到所述DMA读操作命令，发送DMA报文，所述DMA报文的操作类型为读操作，DMA地址为第二主机的DMA虚拟地址。
S1304，DMA地址转换设备将所述DMA度操作命令的DMA地址修改为第二主机的DMA内存地址，并将修改后的DMA报文发送给第二主机，从而 使I/O设备向第二主机的DMA内存地址发起DMA读操作，将热点数据更新到I/O设备上。
S1305，当DMA读操作完成后，第二主机通知第一主机上的管理系统，管理系统将I/O上的热点数据解锁。
S1306，第一主机上的管理系统向I/O设备发送至少一条DMA写操作命令，所述DMA操作启动请求用以指示I/O设备向除第一主机以外的其他主机进行DMA写操作。
S1307，I/O设备根据DMA写操作命令，分别发送DMA报文，所述DMA报文的DMA地址为其他主机的DMA虚拟地址，所述报文的操作类型为写操作，用于向其他主机发起DMA写操作。
S1308，数据传输设备获取所述的DMA报文，将DMA报文的DMA地址修改为其他主机的DMA内存地址，并分别发送给其他主机，使I/O设备分别向其他主机发送DMA写操作，从而将跟新后的热点数据写入其他主机。
在一种实现方式中，类似于上一种实现方式，也可以实现对DMA报文的权限控制，实现的具体方式不再赘述。对DMA报文的权限控制在具体的实现中，由于权限标识可能指代的多种类型的信息，因此，可以实现多种具体的权限控制方式，例如：可以是对特定的主机，只有特定的I/O设备可以进行DMA读和/或写；或者，对于特定的主机，只有特定类型的数据可以通过DMA方式进行读和/或写；或者，可以是对特定的主机，只有特定的主机或者管理系统所发起的DMA操作才能进行DMA读和/或写等。
可见，在本实施例中，管理系统可以主动去更新其他主机上的缓存数据，且通过DMA方式，比较现有技术的网络传输，提升了数据处理的性能。由于其他主机可以被动的更新本地的数据，即主机在未介入的情况下，本地缓存空间的数据得到实时更新，因而提升了整个网络的数据及时性以及可靠性。
此外，通过对DMA报文的权限控制，可以实现对DMA操作的筛选，提高整个网络数据传输的可靠性和安全性。此外，通过权限控制，还可以拓展网络使用的场景，实现更加复杂的网络部署和传输方式。
结合图14，本发明实施例还提供了一种数据传输设备1400，所述数据传输设备分别与所述多个主机和所述一个或多个输入/输出I/O设备相连接，所述多个主机共享一个或多个I/O设备，所述一个或多个I/O设备通过直接内存访问DMA的方式访问多个主机各自的DMA内存地址，装置的结构中包括处理器1401，所述处理器被配置为支持装置执行上述实施例中数据传输设备所执行的相应方法，装置的结构中还有发送器1402和接收器1403，用于实现发送或者接收上述实施例中数据传输装置与其他设备交互的指令或者信息。所述装置还可以包括存储器，所述存储器用于与处理器耦合，其保存必要的程序指令和数据。
结合图15，本发明实施例还提供了一种计算机装置1500，所述计算机系装置与所述的数据传输装置相连接，从而与其他多个计算机装置共享一个或多个I/O设备，所述一个或多个I/O设备通过直接内存访问DMA的方式访问多个主机各自的DMA内存地址，装置的结构中包括处理器1501，所述处理器被配置为支持装置执行上述实施例中主机所执行的相应方法，装置的结构中还有发送器1502和接收器1503，用于实现发送或者接收上述实施例中数据传输装置与其他设备交互的指令或者信息。所述装置还可以包括存储器，所述存储器用于与处理器耦合，其保存必要的程序指令和数据。
本领域普通技术人员可以理解上述实施例的各种方法中的全部或部分步骤是可以通过程序来指令相关的硬件来完成，该程序可以存储于一计算机可读存储介质中，存储介质可以包括：ROM、RAM、磁盘或光盘等。
以上对本发明实施例所提供的数据传输方法、设备以及数据传输系统进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想；同时，对于本领域的一般技术人员，依据本发明的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本发明的限制。

Claims (25)

  1. 一种计算机系统，其特征在于，所述计算机系统包括多个主机、一个或多个输入/输出I/O设备、以及分别与所述多个主机和所述一个或多个I/O设备连接的数据传输设备，其中，
    所述数据传输设备用于将所述多个主机的DMA内存地址一一映射到全局虚拟地址空间的虚拟地址上；
    所述数据传输设备还用于获取I/O设备发送的携带有DMA虚拟地址的DMA报文，所述DMA虚拟地址为在所述全局虚拟地址空间上的虚拟地址；根据DMA虚拟地址、DMA内存地址和主机之间的对应关系，确定所述DMA虚拟地址对应的DMA内存地址和目标主机，所述DMA内存地址为映射到所述DMA虚拟地址上的DMA内存地址，所述目标主机为所述DMA内存地址所在的主机；将所述DMA报文中的所述DMA虚拟地址修改为映射到所述DMA虚拟地址的所述DMA内存地址；以及将修改后的所述DMA报文向所述目标主机发送。
  2. 根据权利要求1所述系统，其特征在于，所述数据传输设备具体用于，所述根据所述DMA虚拟地址、DMA内存地址和主机之间的对应关系，确定所述DMA虚拟地址对应的DMA内存地址和目标主机时，
    所述DMA虚拟地址、DMA内存地址和主机之间的对应关系包括：所述多个主机各自的DMA内存地址组成多个DMA内存地址区间，每个主机对应一个或多个DMA内存地址区间；所述全局虚拟地址空间包含不重叠的多个虚拟地址区间，所述多个虚拟地址区间与所述多个DMA内存地址区间一一对应，且虚拟地址区间中的虚拟地址与对应的DMA内存地址区间中的DMA内存地 址一一对应；
    所述确定所述DMA虚拟地址对应的DMA内存地址和目标主机，包括：根据所述DMA虚拟地址所述的虚拟地址区间确定与所述虚拟地址区间对应的DMA内存地址区间；根据所述DMA内存地址区间确定与所述DMA内存地址区间对应的主机以及与在所述DMA内存地址区间中映射到所述DMA虚拟地址的DMA内存地址。
  3. 根据权利要求1或2所述系统，其特征在于，其中，
    所述多个主机中的任意一个主机用于获取所述目标主机的DMA内存地址；向所述数据传输设备发送DMA操作启动请求，所述DMA操作启动请求中携带有所述目标主机的所述DMA内存地址；
    所述数据传输设备用于接收所述DMA操作启动请求；根据DMA虚拟地址、DMA内存地址和主机之间的对应关系确定所述DMA操作启动请求中携带的所述DMA内存地址对应的DMA虚拟地址，并将所述DMA操作启动请求中携带的所述DMA内存地址修改为所述DMA虚拟地址；将修改后的所述DMA操作启动请求发送给所述I/O设备；
    所述I/O设备用于接收所述数据传输设备发送的所述DMA操作启动请求，所述DMA操作启动命令用于指示所述I/O设备对所述目标主机发起DMA操作。
  4. 根据权利要求1或2所述系统，其特征在于，其中，
    所述多个主机中的任意一个主机用于获取所述目标主机的DMA虚拟地址；向所述I/O设备发送DMA操作启动请求，所述DMA操作启动请求中携带有所述目标主机的所述DMA虚拟地址；
    所述I/O设备用于接收所述任意一个主机发送的所述DMA操作启动请求,所述DMA操作启动命令用于指示所述I/O设备对所述目标主机发起DMA操作。
  5. 根据权利要求4所述系统，其特征在于，其中，
    所述任意一个主机在获取所述目标主机的DMA虚拟地址方面具体用于：
    根据所述任意一个主机上存储的所述所述DMA虚拟地址、DMA内存地址和主机之间的对应关系，获取所述目标主机所对应的DMA虚拟地址。
  6. 根据权利要求1-5中任一所述系统，其特征在于，
    所述数据传输设备还用于，确定所述DMA虚拟地址对应的DMA内存地址和目标主机后，根据所述DMA报文的权限信息和所述目标主机的权限要求确定对所述目标主机进行的DMA操作是否符合权限要求，如果符合，将所述DMA报文的DMA虚拟地址修改为所述DMA操作的目标主机的DMA内存地址。
  7. 根据权利要求6所述系统，其特征在于，所述DMA报文的权限信息包括以下信息中的至少一种：所述DMA报文的类型、所述DMA报文的权限标识和发送所述DMA报文的主机的标识。
  8. 一种数据传输方法，其特征在于，所述方法应用于多个主机共享一个或多个输入/输出I/O设备的计算机系统，所述一个或多个I/O设备通过直接内存访问DMA的方式访问多个主机各自的DMA内存地址，所述DMA内存地址被一一映射到全局虚拟地址空间的虚拟地址上，所述方法包括：
    获取I/O设备发送的DMA报文，所述DMA报文中携带DMA虚拟地址， 所述DMA虚拟地址为在所述全局虚拟地址空间上的虚拟地址；
    根据DMA虚拟地址、DMA内存地址和主机之间的对应关系，确定所述DMA虚拟地址对应的DMA内存地址和目标主机，其中，所述DMA内存地址为映射到所述DMA虚拟地址上的DMA内存地址，所述目标主机为映射到所述DMA虚拟地址的所述DMA内存地址所在的主机；
    将所述DMA报文中的所述DMA虚拟地址修改为映射到所述DMA虚拟地址的所述DMA内存地址；
    将修改后的所述DMA报文向所述目标主机发送。
  9. 根据权利要求8所述方法，其特征在于，所述DMA虚拟地址、DMA内存地址和主机之间的对应关系包括：所述多个主机各自的DMA内存地址组成多个DMA内存地址区间，每个主机对应一个或多个DMA内存地址区间；所述全局虚拟地址空间包含不重叠的多个虚拟地址区间，所述多个虚拟地址区间与所述多个DMA内存地址区间一一对应，且虚拟地址区间中的虚拟地址与对应的DMA内存地址区间中的DMA内存地址一一对应；
    所述根据所述DMA虚拟地址、DMA内存地址和主机之间的对应关系，确定所述DMA虚拟地址对应的DMA内存地址和目标主机，包括：
    根据所述DMA虚拟地址所述的虚拟地址区间确定与所述虚拟地址区间对应的DMA内存地址区间；
    根据所述DMA内存地址区间确定与所述DMA内存地址区间对应的主机以及与在所述DMA内存地址区间中映射到所述DMA虚拟地址的DMA内存地址。
  10. 根据权利要求8-9中任一所述方法，其特征在于，所述方法还包括： 确定所述DMA虚拟地址对应的DMA内存地址和目标主机后，根据所述DMA报文的权限信息和所述目标主机的权限要求确定对所述目标主机进行的DMA操作是否符合权限要求，如果符合，将所述DMA报文的DMA虚拟地址修改为所述DMA操作的目标主机的DMA内存地址。
  11. 根据权利要求10所述方法，其特征在于，所述DMA报文的权限信息包括以下信息中的至少一种：所述DMA报文的类型、所述DMA报文的权限标识和发送所述DMA报文的主机的标识。
  12. 根据权利要求8-11所述方法，其特征在于，所述方法还包括：接收所述DMA操作启动请求，所述DMA操作启动请求中携带有所述目标主机的所述DMA内存地址；根据DMA虚拟地址、DMA内存地址和主机之间的对应关系确定所述DMA操作启动请求中携带的所述DMA内存地址对应的DMA虚拟地址，并将所述DMA操作启动请求中携带的所述DMA内存地址修改为所述DMA虚拟地址；将修改后的所述DMA操作启动请求发送给所述I/O设备。
  13. 一种数据传输方法，其特征在于，所述方法应用于计算机系统中的任意一个主机，在所述计算机系统中，多个主机通过数据传输设备共享一个或多个输入/输出I/O设备；所述一个或多个I/O设备通过直接内存访问DMA的方式访问多个主机各自的DMA内存地址，所述DMA内存地址被一一映射到全局虚拟地址空间的虚拟地址上，所述方法包括：
    发送DMA操作启动请求，用以指示所述I/O设备对在全局虚拟地址空间上的DMA虚拟地址进行DMA操作，所述DMA虚拟地址为目标主机的DMA 内存地址映射到全局虚拟地址空间上的DMA虚拟地址。
  14. 根据权利要求13所述方法，其特征在于，所述发送DMA操作启动请求具体包括：
    获取所述目标主机的DMA内存地址；
    向所述数据传输装置发送DMA操作启动请求，所述DMA操作启动请求中携带有所述目标主机的所述DMA内存地址，用以指示数据传输设备根据DMA虚拟地址、DMA内存地址和主机之间的对应关系确定所述DMA操作启动请求中携带的所述DMA内存地址对应的DMA虚拟地址，并将所述DMA操作启动请求中携带的所述DMA内存地址修改为所述DMA虚拟地址，以及将修改后的所述DMA操作启动请求发送给所述I/O设备。
  15. 根据权利要求13所述方法，其特征在于，所述发送DMA操作启动请求具体包括：
    获取所述目标主机的DMA虚拟地址；向所述I/O设备发送DMA操作启动请求，所述DMA操作启动请求中携带有所述目标主机的所述DMA虚拟地址。
  16. 根据权利要求15所述方法，其特征在于，所述任意一个主机在获取所述目标主机的DMA虚拟地址方面具体用于：
    根据所述任意一个主机上存储的所述所述DMA虚拟地址、DMA内存地址和主机之间的对应关系，获取所述目标主机所对应的DMA虚拟地址。
  17. 一种数据传输设备，其特征在于，所述数据传输设备分别与所述多个主机和所述一个或多个输入/输出I/O设备相连接，所述多个主机共享一个或 多个I/O设备，所述一个或多个I/O设备通过直接内存访问DMA的方式访问多个主机各自的DMA内存地址，所述DMA内存地址被一一映射到全局虚拟地址空间的虚拟地址上，所述设备包括：
    接收模块，用于获取I/O设备发送的DMA报文，所述DMA报文中携带DMA虚拟地址，所述DMA虚拟地址为在所述全局虚拟地址空间上的虚拟地址；
    转换模块，用于根据DMA虚拟地址、DMA内存地址和主机之间的对应关系，确定所述DMA虚拟地址对应的DMA内存地址和目标主机，其中，所述DMA内存地址为映射到所述DMA虚拟地址上的DMA内存地址，所述目标主机为映射到所述DMA虚拟地址的所述DMA内存地址所在的主机；以及将所述DMA报文中的所述DMA虚拟地址修改为映射到所述DMA虚拟地址的所述DMA内存地址；
    发送模块，将修改后的所述DMA报文向所述目标主机发送。
  18. 根据权利要求17所述设备，其特征在于，所述转换模块具体用于，所述根据所述DMA虚拟地址、DMA内存地址和主机之间的对应关系，确定所述DMA虚拟地址对应的DMA内存地址和目标主机时，
    所述DMA虚拟地址、DMA内存地址和主机之间的对应关系包括：所述多个主机各自的DMA内存地址组成多个DMA内存地址区间，每个主机对应一个或多个DMA内存地址区间；所述全局虚拟地址空间包含不重叠的多个虚拟地址区间，所述多个虚拟地址区间与所述多个DMA内存地址区间一一对应，且虚拟地址区间中的虚拟地址与对应的DMA内存地址区间中的DMA内存地址一一对应；
    所述确定所述DMA虚拟地址对应的DMA内存地址和目标主机，包括：根据所述DMA虚拟地址所述的虚拟地址区间确定与所述虚拟地址区间对应的DMA内存地址区间；根据所述DMA内存地址区间确定与所述DMA内存地址区间对应的主机以及与在所述DMA内存地址区间中映射到所述DMA虚拟地址的DMA内存地址。
  19. 根据权利要求17或18中任一所述设备，其特征在于，所述转换模块还用于，确定所述DMA虚拟地址对应的DMA内存地址和目标主机后，根据所述DMA报文的权限信息和所述目标主机的权限要求确定对所述目标主机进行的DMA操作是否符合权限要求，如果符合，将所述DMA报文的DMA虚拟地址修改为所述DMA操作的目标主机的DMA内存地址。
  20. 根据权利要求19中任一所述设备，其特征在于，在根据所述DMA报文的权限信息和所述目标主机的权限要求确定对所述目标主机进行的DMA操作是否符合权限要求方面，所述转换模块具体用于，所述DMA报文的权限信息包括以下信息中的至少一种：所述DMA报文的类型、所述DMA报文的权限标识和发送所述DMA报文的主机的标识。
  21. 根据权利要求19-20中任一所述设备，其特征在于，
    所述接收模块还用于，接收所述DMA操作启动请求，所述DMA操作启动请求中携带有所述目标主机的所述DMA内存地址，所述DMA操作启动请求用于指示所述I/O设备向目标主机进行DMA操作；
    所述转换模块还用于，根据DMA虚拟地址、DMA内存地址和主机之间的对应关系确定所述DMA操作启动请求中携带的所述DMA内存地址对应的DMA虚拟地址，并将所述DMA操作启动请求中携带的所述DMA内存地址 修改为所述DMA虚拟地址；
    所述发送模块还用于，将修改后的所述DMA操作启动请求发送给所述I/O设备。
  22. 一种数据传输设备，其特征在于，所述设备通过数据传输设备共享一个或多个输入/输出I/O设备，所述一个或多个I/O设备通过直接内存访问DMA的方式访问多个主机各自的DMA内存地址，所述DMA内存地址被一一映射到全局虚拟地址空间的虚拟地址上，所述设备包括：
    DMA操作启动请求生成模块，用于生成DMA操作启动请求，所述DMA操作启动请求用以指示所述I/O设备对在全局虚拟地址空间上的DMA虚拟地址进行DMA操作，所述DMA虚拟地址为目标主机的DMA内存地址映射到全局虚拟地址空间上的DMA虚拟地址。
    信息发送模块，用于发送所述DMA操作启动请求。
  23. 根据要求权利要求22所述设备，其特征在于，生成DMA操作启动请求时，所述DMA操作启动请求生成模块具体用于，
    获取所述目标主机的DMA内存地址；向所述数据传输装置发送DMA操作启动请求，所述DMA操作启动请求中携带有所述目标主机的所述DMA内存地址，用以指示数据传输设备根据DMA虚拟地址、DMA内存地址和主机之间的对应关系确定所述DMA操作启动请求中携带的所述DMA内存地址对应的DMA虚拟地址，并将所述DMA操作启动请求中携带的所述DMA内存地址修改为所述DMA虚拟地址；
    以及，所述信息发送模块具体用于，将修改后的所述DMA操作启动请求 发送给所述I/O设备。
  24. 根据求权利要求22所述设备，其特征在于，生成DMA操作启动请求时，所述DMA操作启动请求生成模块具体用于，
    获取所述目标主机的DMA虚拟地址，生成携带DMA虚拟地址的DMA操作启动请求；
    以及，所述信息发送模块具体用于，将修改后的所述DMA操作启动请求发送给所述数据传输装置。
  25. 根据权利要求24所述设备，其特征在于，获取所述目标主机的DMA虚拟地址时，所述DMA操作启动请求生成模块具体用于，
    根据所述任意一个主机上存储的所述所述DMA虚拟地址、DMA内存地址和主机之间的对应关系，获取所述目标主机所对应的DMA虚拟地址。
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