WO2017063158A1

WO2017063158A1 - Circuit and method for acquiring pam4 decoding thresholds and optical network unit

Info

Publication number: WO2017063158A1
Application number: PCT/CN2015/091937
Authority: WO
Inventors: 李胜平; 高波
Original assignee: 华为技术有限公司
Priority date: 2015-10-14
Filing date: 2015-10-14
Publication date: 2017-04-20
Also published as: CN107534628A; CN107534628B

Abstract

The invention relates to the technical field of communications. Disclosed in an embodiment of the invention are a circuit and method for acquiring PAM4 decoding thresholds and an optical network unit for increasing accuracy of decoding thresholds, and reducing complexity in realizing a circuit. The decoding thresholds comprise Vth1, Vth2 and Vth3, and Vth1, Vth2 and Vth3 satisfy the following condition: Vth1 < Vth2 < Vth3. The circuit comprises a mean value module and a microprocessor. After determining that a signal inputted to the mean value module is a target signal, the microprocessor collects a target decoding threshold obtained by performing, by the mean value module, mean value computation on received voltages of symbols in the target signal. When the target signal is a first signal, the target decoding threshold is Vth1, and the first signal comprises a symbol representing 00 and a symbol representing 01; and/or when the target signal is a third signal, the target decoding threshold is Vth3, and the third signal comprises a symbol representing 10 and a symbol representing 11. The technical solution provided in the embodiment of the invention is applicable to a scenario for acquiring PAM4 decoding thresholds.

Description

Circuit, method and optical network unit for acquiring decoding threshold of PAM4

Technical field

The present invention relates to the field of communications technologies, and in particular, to a circuit, method, and optical network unit for acquiring a decoding threshold of a PAM4 (Pulse Amplitude Modulation 4).

Background technique

With the large-scale deployment of FTTH (Fiber-to-the-Home), the bandwidth requirements for optical access are increasing. Currently, the optical access mainstream adopts PON (Passive Optical Network) technology. Various PON technologies, such as GPON (Gigabit PON, Gigabit Passive Optical Network), EPON (Ethernet PON, Ethernet Passive Optical Network), 10G-EPON, 10G-GPON, etc., coexist. For TDM PON (Time Division Multiplex PON), when single-wave transmission exceeds 10Gb/s, if low-speed NRZ (Non-Return to Zero) is used, Code, its bandwidth efficiency will be lower, and the dispersion will become very serious. Therefore, when single-wave transmission exceeds 10Gb/s, multi-order or high-order modulation is used, for example, PAM4 modulation, Duobinary modulation, QPSK (Quadrature Phase Shift Keyin) Modulation, OFDM (Orthogonal Frequency Division Multiplexing) modulation, and the like.

Wherein, in the PAM4 mode, the receiving device first acquires three decoding thresholds, namely: Vth1, Vth2, and Vth3, where Vth1 < Vth2 < Vth3; then, the received voltage signal is PAM4 decoded by using the three decoding thresholds. At present, the decoding threshold is generally obtained by performing a mean operation on the voltage amplitude of each symbol in the voltage signal to obtain Vavg, Vavg as Vth2, and obtaining a peak value Vpeak of the voltage amplitude of each symbol in the voltage signal, and then, Using the formula Vth1=Vavg-2*(Vpeak-Vavg)/3), Vth1 is obtained; using the formula Vth3 = Vavg + 2 * (Vpeak - Vavg) / 3, and Vth3 is obtained.

In the above process of obtaining the decoding threshold, a peak is required. At present, the peak circuit is generally used to obtain the peak value; however, the accuracy of the peak value obtained by the peak circuit is not high, which may result in the accuracy of the acquired Vth1 and/or Vth3. not tall. In particular, when an overshoot or noise is included in the signal, the overshoot or noise may be taken as a peak, resulting in a large error between the acquired peak and the actual peak. In addition, due to the complexity of the peak circuit implementation, the circuit for obtaining the decoding threshold is complicated to implement.

Summary of the invention

Embodiments of the present invention provide a circuit, method, and optical network unit for acquiring a decoding threshold of a PAM 4 for improving the accuracy of acquiring a decoding threshold of the PAM 4 and reducing the complexity of a circuit for acquiring a decoding threshold.

In order to achieve the above object, embodiments of the present invention adopt the following technical solutions:

In a first aspect, a circuit for obtaining a decoding threshold of a PAM4 is provided, where a decoding threshold of the PAM4 includes a first decoding threshold, a second decoding threshold, and a third decoding threshold, wherein the first decoding threshold is smaller than the second Decoding a threshold, the second decoding threshold being less than the third decoding threshold; the circuit comprising:

An averaging module and a microprocessor coupled to the output of the averaging module;

The averaging module is configured to perform an averaging operation on a received voltage of all symbols in the input signal;

The microprocessor is configured to: after determining that the signal input to the averaging module is a target signal, acquiring a value obtained by performing averaging operation on a received voltage of the symbol in the target signal by the averaging module, and using the value as a target decoding Threshold value

Wherein, when the target signal is the first signal, the target decoding threshold is the first decoding threshold, and the first signal is composed of a symbol representing a binary number 00 and a symbol representing a binary number 01; and/or And when the target signal is the third signal, the target decoding threshold is the third decoding threshold, and the third signal is composed of a symbol representing a binary number 10 and a symbol representing a binary number 11.

With reference to the first aspect, in a first possible implementation, the circuit further includes: a decoding module and a medium access control MAC module;

The input end of the MAC module is connected to the output end of the decoding module, and the output end of the MAC module is connected to the microprocessor;

The decoding module is configured to decode the input signal to obtain a decoding result;

The MAC module is configured to identify whether the decoding result is a preset decoding result, and output a control signal when identifying that the decoding result is the preset decoding result, where the control signal is used to indicate the The microprocessor inputs a signal of the averaging module as the target signal from a point in time when the control signal is received, after a point in time when the control signal is received.

With reference to the first possible implementation manner of the first aspect, in a second possible implementation manner, the MAC module is further configured to: when it is determined that the decoding result is the preset decoding result, to a sending device Sending a request message; wherein the request message is used to instruct the sending device to send the target signal.

In conjunction with the first possible implementation or the second possible implementation of the first aspect, in a third possible implementation, the decoding module further includes three threshold inputs; the three threshold inputs The input decoding thresholds are equal; wherein the equal decoding threshold is: the first decoding threshold, the second decoding threshold, or the third decoding threshold that have been acquired.

In combination with the first aspect, the first possible implementation of the first aspect, or the third possible implementation manner, in a fourth possible implementation, the target signal includes a plurality of repeated representations. A symbol of a binary array; wherein the first binary array is composed of one or more binary numbers.

With reference to the fourth possible implementation manner of the first aspect, in a fifth possible implementation, when the target signal is the first signal, the representation included in the first binary array is 00 The number of symbols is equal to the number of symbols representing 01; and/or, when the target signal is the third signal, the first binary array The number of symbols included in representation 10 is equal to the number of symbols representing 11.

With reference to any one of the first possible implementation of the first aspect to the third possible implementation, in a sixth possible implementation, the preset decoding result includes multiple repeated second binary An array; wherein the second binary array is composed of one or more binary numbers.

With reference to the first aspect, the first possible implementation of the first aspect to the sixth possibility, in a seventh possible implementation, the microprocessor is further configured to determine, when determining that the signal input to the mean module is And acquiring, by the averaging module, a value obtained by performing an averaging operation on a received voltage of the symbol in the second signal, and using the value as the second decoding threshold; wherein, in the second signal The binary number represented by the symbol is a random number.

In combination with the first aspect, the first possible implementation of the first aspect, or the seventh possible implementation, in an eighth possible implementation, the microprocessor is further configured to: store the One or more of a first decoding threshold, the second decoding threshold, and the third decoding threshold.

In a second aspect, a method for obtaining a decoding threshold of a PAM4 is provided, where a decoding threshold of the PAM4 includes a first decoding threshold, a second decoding threshold, and a third decoding threshold, where the first decoding threshold is smaller than the second a decoding threshold, where the second decoding threshold is smaller than the third decoding threshold; the method includes:

Determining the target signal;

Performing an average operation on the received voltage of the symbol in the target signal to obtain a target decoding threshold;

With reference to the second aspect, in a first possible implementation manner, the determining the target signal includes:

Decoding the received voltage signal from the transmitting device to obtain a decoding result;

When it is recognized that the decoding result is a preset decoding result, a voltage signal from the transmitting device received after the current time point value from the current time point is used as the target signal.

In conjunction with the first possible implementation of the second aspect, in a second possible implementation, the method further includes:

And when the decoding result is the preset decoding result, sending a request message to the sending device, where the request message is used to instruct the sending device to send the target signal.

With reference to the first possible implementation manner or the second possible implementation manner of the second aspect, in a third possible implementation manner, the received voltage signal from the sending device is decoded to obtain a decoding result, include:

The received voltage signal from the transmitting device is decoded by using three equal decoding thresholds to obtain a decoding result; wherein the equal decoding threshold is the first decoding threshold that has been acquired, the first Two decoding thresholds or the third decoding threshold.

With reference to the second aspect, the first possible implementation manner of the second aspect, and the third possible implementation manner, in a fourth possible implementation manner, the target signal includes multiple repeated representations. A symbol of a binary array; wherein the first binary array is composed of one or more binary numbers.

With reference to the fourth possible implementation manner of the second aspect, in a fifth possible implementation, when the target signal is the first signal, the representation included in the first binary array is 00 The number of symbols is equal to the number of symbols representing 01; and/or, when the target signal is the third signal, the number and representation of symbols representing the number 10 contained in the first binary array The number of symbols of 11 is equal.

In combination with the first possible implementation of the second aspect, the third possible implementation manner, in the sixth possible implementation, the preset decoding result includes multiple repeated second binary An array; wherein the second binary array is composed of one or more symbols representing a binary number.

With reference to the second aspect, the first possible implementation manner of the second aspect, and the sixth possible implementation manner, in a seventh possible implementation manner, the method further includes: The received voltage of the symbol is averaged to obtain the second decoding threshold; wherein the binary number represented by the symbol in the second signal is a random number.

With reference to the second aspect, the first possible implementation manner of the second aspect, and the seventh possible implementation manner, in an eighth possible implementation manner, the method further includes: storing the first decoding One or more of a threshold, the second decoding threshold, and the third decoding threshold.

In a third aspect, an optical network unit is provided, the optical network unit comprising any one of the first aspect provided above for acquiring a decoding threshold of the PAM4.

In the above technical solution, the first decoding threshold and/or the third decoding threshold are obtained by using the averaging module, and the average value obtained by the averaging module is higher than the peak obtained by the peak circuit (also referred to as a peak module). Therefore, the circuit provided by the embodiment of the present invention can improve the accuracy of the acquired decoding threshold; in addition, the averaging module is simpler to implement than the peak module, and therefore, the complexity of the circuit for acquiring the decoding threshold can be reduced.

DRAWINGS

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the embodiments or the description of the prior art will be briefly described below. It is obvious that the drawings in the following description are only the present invention. For some embodiments, other drawings may be obtained from those of ordinary skill in the art in light of the inventive workability.

1 is a system architecture diagram of an optical communication field to which the technical solution provided by the embodiment of the present invention is applied;

2 is a schematic diagram of a circuit for acquiring a decoding threshold of a PAM 4 according to an embodiment of the present invention;

FIG. 3 is a schematic structural diagram of a receiving device according to an embodiment of the present disclosure;

4 is a schematic diagram of another circuit for acquiring a decoding threshold of a PAM 4 according to an embodiment of the present invention;

FIG. 5 is a schematic structural diagram of another receiving device according to an embodiment of the present disclosure;

FIG. 6 is a schematic structural diagram of a decoding module according to an embodiment of the present disclosure;

FIG. 7 is a schematic diagram of another circuit for acquiring a decoding threshold of a PAM 4 according to an embodiment of the present disclosure;

FIG. 8 is a schematic flowchart of a method for acquiring a decoding threshold of a PAM 4 according to an embodiment of the present disclosure;

FIG. 9 is a schematic flowchart diagram of another method for obtaining a decoding threshold of a PAM 4 according to an embodiment of the present invention.

detailed description

The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are only a part of the embodiments of the present invention, but not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

In order to facilitate the understanding of those skilled in the art, the following is first explained:

1), transmitting device, receiving device

The technical solutions provided by the embodiments of the present invention can be applied to the field of optical communications, the field of wireless communications, the field of wired communications, and the like. In different communication fields, signals transmitted between a transmitting device and a receiving device are different. For example, in the field of optical communications, a signal transmitted between the two is an optical signal; in the field of wireless communication, a signal transmitted between the two RF signal No. In the field of wired communication, the signal transmitted between the two is an electrical signal.

The "sending device" and the "receiving device" can be any physical device or virtual module that needs to send and receive signals. As an example, the sending device may be an OLT (Optical Line Terminal), and the receiving device may be an ONU (Optical Network Unit).

2), PAM4 mode, transmission voltage, receiving voltage

In the PAM4 mode, the transmitting device first performs PAM4 coding. Specifically, the binary numbers 00, 01, 10, and 11 in the data stream to be transmitted are respectively coded into symbols having different voltage amplitudes to obtain a voltage signal; The voltage signal is sent to the receiving device. Wherein, the voltage amplitude indicating the sign of 00 is marked as V1, the voltage amplitude indicating the sign of 01 is marked as V2, the voltage amplitude indicating the sign of 10 is marked as V3, and the voltage amplitude indicating the sign of 11 is expressed as V4. Then, the following relationship is satisfied between V1, V2, V3, and V4: V1 < V2 < V3 < V4.

In the PAM4 mode, the receiving device first receives the voltage signal; then, acquires three decoding thresholds, namely, Vth1, Vth2, and Vth3, where Vth1<Vth2<Vth3; then, the PAM4 decoding is performed by using the three decoding thresholds, specifically: Assuming that the voltage amplitude of a certain symbol in the voltage signal is V, then if V≤Vth1, the binary number represented by the symbol is considered to be 00; if Vth1<V≤Vth2, the binary number represented by the symbol is considered to be 01; if Vth2 < V ≤ Vth3, the binary number represented by the symbol is considered to be 10; if V>Vth3, the binary number represented by the symbol is considered to be 11.

It should be noted that, regardless of whether the signal transmitted between the transmitting device and the receiving device is an optical signal, a radio frequency signal or an electrical signal, in the PAM4 mode, the signals obtained by the transmitting device are all voltage signals; correspondingly, the receiving devices are all The voltage signal corresponding to the received signal (such as an optical signal, a radio frequency signal or an electrical signal) is decoded. Based on this, the signal transmitted between the transmitting device and the receiving device is taken as a voltage signal as an example for description. However, those skilled in the art should understand that in the field of optical communication, the transmitting device sends a voltage signal to the receiving device, which may specifically include: the transmitting device will voltage The number is converted into an optical signal, and the optical signal is sent to the receiving device. Correspondingly, the receiving device receiving the voltage signal may specifically include: the receiving device receiving the optical signal, and converting the optical signal into a voltage signal. Corresponding examples can be derived in the field of wireless communication or other fields of communication, which are not enumerated here.

In the embodiment of the present invention, the voltage amplitude of the symbol obtained by the transmission device is referred to as “transmission voltage” in order to distinguish the voltage amplitude of the symbol obtained by the transmission device and the voltage amplitude of the symbol obtained by the receiving device. The voltage amplitude obtained before the receiving device is decoded is referred to as “receive voltage”.

Since a signal (such as an optical signal, a radio frequency signal, or an electrical signal) is transmitted from the transmitting device to the receiving device, some energy is lost. Therefore, the transmitting voltage of a symbol obtained by the transmitting device and the receiving device are obtained before decoding. The received voltage of the symbol is different.

Since the distance between the same transmitting device and the different receiving devices, the communication quality, and the like may be different, the amount of energy lost in the process of transmitting the same signal from the transmitting device to the different receiving device is different, which may cause different receiving devices. The received voltages of the voltage signals corresponding to the same signal received from the same transmitting device are different. For example, the transmission voltages of the symbols obtained by the transmitting device for encoding "00, 01, 10, 11" are 10V, 20V, 30V, and 40V respectively; the three decoding thresholds obtained by the receiving device 1 may be: 15V, 25V, 35V, the three decoding thresholds obtained by the receiving device 2 may be: 5V, 10V, 15V, and the like. Therefore, in specific implementation, each receiving device needs to determine three decoding thresholds that are suitable for itself.

FIG. 1 is a system architecture diagram of an optical communication field to which the technical solution provided by the embodiment of the present invention is applied. In FIG. 1, the sending device is an OLT, and the receiving device is an ONU as an example. An OLT can connect one or more ONUs through optical fibers. In Figure 1, an OLT is connected to three ONUs (ONU1, ONU2, and ONU3 respectively) as an example. Wherein: the OLT performs PAM4 encoding on the binary data stream to be sent, and converts the encoded voltage signal (ie, the transmitted voltage signal) into an optical signal. No., then the optical signal is transmitted to the ONU through the optical fiber. The ONU is used to convert the received optical signal into a voltage signal (ie, a received voltage signal), and performs PAM4 decoding on the converted voltage signal to obtain a binary data stream.

3), and / or, first, second, third

"and / or" is just an association relationship describing the associated object, indicating that there can be three kinds of relationships, for example, A and / or B, which can mean: A exists separately, A and B exist simultaneously, and B exists separately. Kind of situation. In addition, the character "/" in this article generally indicates that the contextual object is an "or" relationship.

"First", "second" and "third" are merely for the purpose of clearly explaining the relevant content, and do not make any other restrictions.

FIG. 2 is a schematic diagram of a circuit for acquiring a decoding threshold of a PAM 4 according to an embodiment of the present invention. The decoding threshold of the PAM 4 includes a first decoding threshold, a second decoding threshold, and a third decoding threshold, wherein the first decoding threshold is less than the second decoding threshold, and the second decoding threshold is less than the third decoding threshold. The circuit shown in FIG. 2 includes an averaging module 11 and a microprocessor 12 coupled to the output of the averaging module 11. In the embodiment of the present invention, the first decoding threshold, the second decoding threshold, and the third decoding threshold are respectively marked as: Vth1, Vth2, and Vth3.

The averaging module 11 is configured to perform an averaging operation on the received voltages of all the symbols in the input signal.

The microprocessor 12 is configured to collect a value obtained by averaging the received voltage of the symbol in the target signal by the averaging module 11 after determining that the signal of the input averaging module 11 is the target signal, and use the value as the target decoding threshold.

Wherein, when the target signal is the first signal, the target decoding threshold is a first decoding threshold, and the first signal is composed of a symbol representing a binary number 00 and a symbol indicating a binary number 01. And/or, when the target signal is the third signal, the target decoding threshold is a third decoding threshold, and the third signal is composed of a symbol representing a binary number 10 and a symbol representing the binary number 11.

The circuit for obtaining the decoding threshold of the PAM4 provided by the embodiment of the present invention may be applied to the receiving device, and may be applied to the process of performing PAM4 decoding. The three decoding thresholds obtained by the embodiment of the present invention may be applied to the process of PAM4 decoding. in.

The "signal input by the averaging module 11", that is, the signal input to the averaging module 11, is a voltage signal. The averaging module 11 can be any averaging circuit of the prior art.

The working principle of the averaging module 11 is: performing an averaging operation on the received voltages of all the symbols in the input signal; specifically: receiving voltages of the symbols in the input signal in the first preset time period before the current time point Perform the mean operation. The embodiment of the present invention does not limit the specific value of the first preset time period and the manner in which the specific value is obtained. Assuming that the first preset time period is 200 ns (nanoseconds), if the current time point is 200 ns, the averaging module 11 performs a reception voltage of all symbols in the input signal in a time period between 0 and 200 ns. Mean operation; if the current time point is 201 ns, the averaging module 11 performs an averaging operation on the received voltages of all symbols in the input signal in the period of 1 ns to 201 ns; if the current time point is 300 ns, the averaging module 11 The received voltages of all the symbols in the signals input during the period of 100 ns to 300 ns are averaged.

The embodiment of the present invention does not limit the specific implementation method for the microprocessor 12 to determine that the signal of the input averaging module 11 is the target signal. For details, refer to the following.

The "target signal", "first signal" and "third signal" are voltage signals. It should be noted that, in order to facilitate the understanding by those skilled in the art, the target signal corresponding to the “third decoding threshold” is referred to as “the third signal” in the embodiment of the present invention, that is, the “second signal” does not appear in this embodiment. In the case of the "third signal" is used. In addition, in order to facilitate the understanding of the core technology provided by the embodiment of the present invention, the target signal is marked as a binary data stream. In fact, if the signal transmitted between the transmitting device and the receiving device is an electrical signal, the target signal is For receiving the voltage signal received by the device; if the signal transmitted between the transmitting device and the receiving device is a radio frequency signal, the target signal is a voltage signal obtained by converting the radio frequency signal received by the receiving device; if the transmitting device is connected The signal transmitted between the receiving devices is an optical signal, and the target signal is a voltage signal obtained by the receiving device converting the received optical signal. Further, the target data is subjected to PAM4 decoding to obtain a binary data stream.

Taking the signal transmitted between the transmitting device and the receiving device as an optical signal, as shown in FIG. 3, the receiving device including the circuit for acquiring the decoding threshold of the PAM4 provided in this embodiment may further include a conversion circuit; The terminal is used for inputting an optical signal sent by the transmitting device, and the conversion circuit is configured to convert the input optical signal into a voltage signal, and input the voltage signal to the averaging module 11. The conversion circuit may include a photoelectric converter and a transimpedance amplifier; wherein the photoelectric converter is for converting the optical signal into a current signal; and the transimpedance amplifier is for converting the current signal obtained by the photoelectric converter into a voltage signal. Wherein, in this embodiment, the optical signal input to the conversion circuit is an optical signal corresponding to the target voltage.

The "first signal" may be composed of at least one symbol representing 00 and at least one symbol representing 01. For example, the "first signal" may be expressed as any one of the following: 0001, 000100010001, 000000010101. The number of symbols representing 00 and the number of symbols representing 01 is not limited, and the more the number of symbols included in the first signal and the number of symbols representing 01, the higher the accuracy of the acquired Vth1. Optionally, the difference between the number of symbols representing 00 in the first signal and the number of symbols representing 01 is less than or equal to a first preset threshold. The first preset threshold is a value that is predetermined within a range allowed by the error in the process of acquiring Vth1; the smaller the absolute value of the first preset threshold is, the higher the accuracy of the acquired Vth1 is. Preferably, when the number of symbols representing 00 is equal to the number of symbols representing 01, the acquired Vth1 is optimal.

Similarly, the "third signal" may be composed of at least one symbol representing 10 and at least one symbol representing 11, for example, "third signal" may be expressed as any of the following: 101110111011, 101010111111. The number of symbols representing 10 and the number of symbols representing 11 is not limited, and the more the number of symbols included in the third signal and the number of symbols representing 11, the higher the accuracy of the acquired Vth3. Optionally, the difference between the number of symbols representing 10 in the third signal and the number of symbols representing 11 is less than or equal to the second pre- The threshold value is set. The second preset threshold value refers to a value that is predetermined within a range allowed by the error during the process of acquiring Vth3; wherein the smaller the absolute value of the second preset threshold is, the accuracy of the acquired Vth3 is obtained. The higher. Preferably, when the number of symbols representing 10 is equal to the number of symbols representing 11, the acquired Vth3 is optimal. It should be noted that the first preset threshold and the second preset threshold may be equal or not equal; preferably, both are 0.

Optionally, the target signal includes a plurality of repeated symbols representing the first binary array; wherein the first binary array is composed of one or more binary numbers. Specifically: when the target signal is the first signal, the number of 00 and 01 in the first binary array may or may not be equal. Similarly, when the target signal is the third signal, the number of 10 and 11 in the first binary array may or may not be equal.

The symbols representing 00, 01, 10, and 11 are grouped by Vth2: the symbols whose received voltage is less than Vth2 are grouped into one group, and the symbols whose received voltage is greater than Vth2 are classified into another group; thus, the representation 00 can be The symbols and symbols representing 01 are classified into the first group, and the symbols representing 10 and the symbols representing 11 are classified into the second group. Then, in the first group, Vth1 is used to distinguish between the symbol representing 00 and the symbol representing 01; therefore, the pair includes only the symbol representing 00 and the symbol representing 01, and the symbol representing 00 and the number representing symbol 01 are equal. The value obtained after the first signal is averaged is Vth1. Similarly, in the second group, Vth3 is used to distinguish between the symbol representing 10 and the symbol representing 11; therefore, the pair includes only the symbol representing 10 and the symbol representing 11, and the symbol representing 10 and the number of symbols representing 11. The value obtained after the equal third signal is averaged is Vth3.

The circuit for obtaining the decoding threshold of the PAM4 provided by the embodiment of the present invention obtains the first decoding threshold and/or the third decoding threshold by using the averaging module, and the mean value peak circuit (also referred to as a peak module) obtained by the averaging module The accuracy of the obtained peak is high, and therefore, the circuit provided by the embodiment of the present invention can improve the accuracy of the acquired decoding threshold. In addition, the averaging module is simpler to implement than the peak module, so The complexity of the circuit that acquires the decoding threshold is reduced.

Optionally, the microprocessor 12 is further configured to: when determining that the signal of the input averaging module 11 is the second signal, collecting a value obtained by averaging the received voltage of the symbol in the second signal by the averaging module 11 The value is used as a second decoding threshold; wherein the binary number represented by the symbol in the second signal is a random number, in other words, the binary number represented by the different symbols in the second signal is approximately evenly distributed; thus, as long as there is an input mean module 11 The voltage signal is a voltage signal sent by the transmitting device, and the microprocessor 12 can obtain Vth2. In order to improve the accuracy of Vth2, optionally, the second signal contains more symbols. In a specific implementation, the microprocessor 12 may first acquire Vth2 before acquiring Vth1 and/or Vth3.

In the embodiment of the present invention, when the microprocessor 12 acquires Vth1 and/or Vth3, and Vth2, there is no requirement for the linearity of the optical device/RF device of the receiving device, that is, the three decoding thresholds may be uniformly distributed or may be uneven. distributed. The three non-uniform distribution thresholds refer to Vth2-Vth1≠Vth3-Vth2. For example, the three decoding thresholds are: 5V, 10V, and 20V, respectively. The three decoding thresholds are uniformly distributed, that is, Vth2-Vth1=Vth3-Vth2. For example, the three decoding thresholds are: 5V, 10V, and 15V.

In addition, when the three decoding thresholds of the PAM 4 are evenly distributed, the microprocessor 12 can obtain Vth3 according to the formula Vth3=Vth2+(Vth2-Vth1), that is, Vth3=2*Vth2-Vth1 after acquiring Vth2 and Vth1. Alternatively, after acquiring Vth2 and Vth3, Vth1 is obtained according to the formula Vth1=Vth2-(Vth3-Vth2), that is, Vth1=2*Vth2-Vth3.

An alternative implementation in which the microprocessor 12 determines that the signal of the input averaging module 11 is the target signal is provided below.

FIG. 4 is a schematic diagram of another circuit for acquiring a decoding threshold of the PAM 4 according to an embodiment of the present invention. Based on the circuit shown in FIG. 2, the circuit shown in FIG. 4 further includes a decoding module 13 and a MAC (Media Access Control) module 14. The input end of the MAC module 14 is connected to the output end of the decoding module 13, The output of the MAC module 14 is coupled to the microprocessor 12.

The decoding module 13 is configured to decode the input signal to obtain a decoding result.

The MAC module 14 is configured to identify whether the decoding result obtained by the decoding module 13 is a preset decoding result, and output a control signal when it is recognized that the decoding result obtained by the decoding module 13 is a preset decoding result; wherein the control signal is used by the control signal The signal input to the averaging module 11 after the time point when the microprocessor 12 is instructed to receive the control signal from the time point when the control signal is received is used as the target signal.

For example, the control signal is used to instruct the microprocessor 12 to input the signal of the averaging module 11 within a second preset time period after the time point when the control signal is received from the time point when the control signal is received. And as the target signal, wherein the second preset time period is greater than or equal to the first preset time period.

If the second preset time period is equal to the first preset time period, the value collected by the microprocessor 12 is a value obtained by the mean value module 11 performing an average operation on the received voltages of all symbols in the target signal. If the second preset time period is greater than the first preset time period, the value collected by the microprocessor 12 is a value obtained by the mean value module 11 performing an average operation on the received voltage of the partial symbols in the target signal; wherein The partial symbol is specifically a symbol input into the averaging module 11 within a first preset time period before the end of the second preset time period from the end of the second preset time period.

For example, if the first preset time period is 200 ns and the second preset time period is 200 ns, then if the microprocessor 12 is receiving the control signal at the 100 ns, the microprocessor inputs the data from 100 ns to 300 ns. The signal of the processor 12 is used as the target signal, and then the value output by the averaging module 11 is collected from the 300 ns, and the value is taken as the target decoding threshold. In this case, the value acquired by the microprocessor 12 is a value obtained by the averaging module 11 performing an average operation on the symbols input in the 100 ns to 300 ns.

For another example, if the first preset time period is 200 ns and the second preset time period is 300 ns, then if the microprocessor 12 receives the control signal at the 100 ns, the microprocessor inputs the data from 100 ns to 400 ns. The signal of the microprocessor 12 is used as the target signal, and then The value output by the averaging module 11 is started at 400 ns, and this value is taken as the target decoding threshold. In this case, the value acquired by the microprocessor 12 is a value obtained by the averaging module 11 performing an averaging operation on the symbols input in the second ns to 400 ns.

It should be noted that, when the second preset time period is greater than the first preset time period, the value collected by the microprocessor 12 is the average value of the “partial symbol”; therefore, in order to improve the acquired target decoding threshold. Accuracy, optionally, when the target signal is the first signal, the number of symbols representing 00 contained in the first binary array is equal to the number of symbols representing 01; and/or, when the target signal is In the third signal, the number of symbols representing 10 contained in the first binary array is equal to the number of symbols representing 11. This alternative implementation may result in a difference between the number of symbols representing 00 and 01 in "partial symbols" or the number of symbols representing 10 and 11. Wherein, the less binary data in the first binary array, the smaller the difference between the number of symbols representing 00 and 01 or the number of symbols representing 10 and 11 in the "partial symbol", so that the acquired target decoding threshold is The higher the accuracy.

The "decoding module 13", that is, the PAM4 decoding circuit, may specifically be any PAM4 decoding circuit in the prior art. The PAM4 decoding circuit is configured to perform PAM4 decoding on the decoded voltage signal. The optional implementation directly uses the PAM4 decoding circuit used in the process of decoding the existing PAM4 as the decoding module 13. In addition, the added MAC module 14 is also the MAC module used in the process of decoding the existing PAM4. In other words, in the optional implementation, the microprocessor 12 determines that the signal of the input averaging module 11 is a target signal, but only adds the function of the existing module or device, and does not need to add a new module or device. In this way, resources can be saved.

The decoding module 13 can include one decoded signal input and three threshold inputs. The decoding signal input end is used for inputting the voltage signal to be decoded; the three threshold input terminals are respectively Vth1 input end, Vth2 input end and Vth3 input end, respectively for inputting Vth1, Vth2 and Vth3. Based on this, the "decoding module 13 is used to decode the input signal to obtain a decoding threshold" can be understood as: the decoding module 13 is configured to use the Vth1, Vth2, and Vth3 input by the three threshold inputs to input the decoding signal. Input to be decoded The compressed signal is decoded to obtain a decoding result Rx. The decoding signal input end of the decoding module 13 can be connected to the output end of the conversion circuit, as shown in FIG. 5.

The “voltage signal to be decoded” refers to a voltage signal received by the receiving device from the transmitting device. Specifically: in the process of PAM4 decoding, the "to-be-decoded voltage signal" refers to the actual valid data to be decoded; in the process of acquiring the decoding threshold of the PAM4 (ie, before the process of PAM4 decoding), the "to-be-decoded voltage signal" It can be understood as a delimiter for causing the MAC module 14 to determine the control signal. Wherein, when the target signal is the first signal, the “delimiter” is specifically the first delimiter. In this case, the “preset decoding result” is specifically a decoding result obtained by decoding the first delimiter. That is, the first preset decoding result; when the target signal is the third signal, the "delimiter" is specifically the second delimiter. In this case, the "preset decoding result" is specifically decoding the second delimiter. The decoded result obtained after that is the second preset decoding result. The first delimiter is different from the second delimiter, and the first preset decoding result is different from the second preset decoding result.

It should be noted that the delimiter may be a special binary data stream that is determined by the sending device in advance; the preset decoding result may be delimited by the receiving device according to the decoding threshold input by the three threshold inputs of the decoding module 13 in advance. The binary data stream obtained after decoding.

In order to reduce the probability that the receiving device recognizes the delimiter as a delimiter, that is, the probability that the non-preset decoding result is recognized as the decoding result, the receiving device needs to set a special preset decoding result. Optionally, the receiving device may use multiple binary numbers as a preset decoding result, wherein the more the binary number included in the preset decoding result, the higher the accuracy of identifying the decoding result. Further, the receiving device may use multiple repeated binary arrays as a preset decoding result, for example, the preset decoding result may be a binary number converted into a hexadecimal number F0F0C3 F0F0C3 F0F0C3 F0F0C3 F0F0C3, that is, 5 repeated The binary number of the hexadecimal array F0F0C3 is converted. Of course, it is also possible to use any other special binary number that is different from the actual valid data.

Similarly, the sending device needs to set a special delimiter. Optional, sending A plurality of binary data can be used as a delimiter, wherein the more binary data the delimiter contains, the higher the recognition accuracy of the receiving device. Further optionally, the transmitting device can use multiple repeated binary arrays as one delimiter. It should be noted that, when the delimiter set by the transmitting device is not a plurality of repeated binary arrays, the receiving device determines the pre-determined according to the delimiter and the decoding threshold input by the three threshold inputs of the decoding module 13. It is also possible that the decoding threshold may be a plurality of repeated binary arrays.

The specific example is used to illustrate how to use the decoding module 13 to perform decoding in the process of acquiring Vth1 and/or Vth3 to obtain a decoding result; thereby explaining the information interaction between the transmitting device and the receiving device in the process.

As shown in FIG. 6, the decoding module 13 may include three LA (Limiting Amplifiers), LA1, LA2, and LA3, and an AND gate and an exclusive OR gate, between devices. See Figure 6 for the connection relationship. If the signals output from the outputs of LA1, LA2, and LA3 are denoted as C1, C2, and C3, respectively, and the signal output from the output of the AND gate is denoted as D, then

&C2; The decoding result Rx outputted by the output terminal of the decoding module 13 is a 2-bit binary number, wherein the upper bit is C2 and the lower bit is D. It should be noted that the unit module shown by the dashed box in FIG. 6 is used to make the high bit in the decoding result outputted by the output end of the decoding module 13 be C2 and the low bit is D. Not limited.

The decoding module 13 can operate normally when the decoding thresholds are input to the three threshold inputs of the decoding module 13; and, according to

&C2, in conjunction with FIG. 6, it can be seen that when the decoding thresholds input by the three threshold inputs are equal, the comparison results of LA1, LA2, and LA3 are all D, that is, the comparison results of LA1, LA2, and LA3 can be correctly transmitted to the decoding module 13 The output. It can be seen that when the decoding thresholds input by the three threshold inputs are equal, the decoding module 13 can operate normally; and the decoding module 13 will receive the received voltage greater than the "equal decoding threshold input by the three threshold inputs". The symbol is decoded to 11, and the symbol whose received voltage is less than the "equal decoding threshold input by the three threshold inputs" is decoded to 00.

In a specific implementation, the three threshold input ends of the decoding module 13 may be set to a value close to Vth1, a value close to Vth2, or a value close to Vth3; or may be set to Vth1, Vth2, or Vth3; For example, the decoding principle of the decoding module 13 is explained:

Assuming that the decoding thresholds input by the three threshold inputs are both Vth1, when the decoding signal input terminal of the decoding module 13 inputs a symbol indicating "00", the output of the decoding module 13 outputs 00; when the decoding module 13 decodes When a signal indicating "01", "10" or "11" is input to the signal input terminal, the output terminal of the decoding module 13 outputs 11.

Assuming that the decoding thresholds input by the three threshold inputs are both Vth2, then when the decoding signal input terminal of the decoding module 13 inputs a symbol indicating "00" or "01", the output of the decoding module 13 outputs 00; when decoding When the decoding signal input terminal of the module 13 inputs a symbol indicating "10" or "11", the output terminal of the decoding module 13 outputs 11.

Assuming that the decoding thresholds input by the three threshold inputs are both Vth3, then when the decoding signal input terminal of the decoding module 13 inputs a symbol indicating "00", "01" or "10", the output of the decoding module 13 is output. 00; When the decoding signal input terminal of the decoding module 13 inputs a symbol indicating "11", the output terminal of the decoding module 13 outputs 11.

It can be seen from the above analysis that the decoding threshold input by the three threshold inputs is set according to the above method, so that the decoding module 13 can work normally; thus, by setting the delimiter, the decoding threshold input by the three threshold inputs, and the preset decoding. As a result, the MAC module 14 can be made to recognize whether any of the decoding results is a preset decoding result, that is, whether any of the to-be-decoded voltage signals is a preset delimiter.

Based on this, in an optional implementation manner, the sending device may send the target signal after sending the delimiter and then within the second preset time period; thus, the mean module 11 in the receiving device is in the second pre- Let the value output at the end of the time period be the target decoding threshold within the allowable range of the error.

In another optional implementation, the sending device may send the optical signal corresponding to the target signal in the second preset time period when receiving the request message sent by the receiving device. No. / RF signal / electrical signal. Specifically, the MAC module 14 is further configured to send a request message to the sending device when the decoding result is a preset decoding result, where the request message is used to instruct the sending device to send a signal. (optical signal/radio frequency signal/electrical signal) such that the signal input to the averaging module 11 during the second predetermined period of time is the target signal.

Based on the above description, when the three threshold inputs of the decoding module 13 input the already acquired Vth2 or Vth3, the MAC module 14 can recognize whether the decoding result of the decoding module 13 is the first preset decoding result, thereby acquiring Vth1. When the three threshold inputs of the decoding module 13 input the already acquired Vth2 or Vth1, the MAC module 14 can recognize whether the decoding result of the decoding module 13 is the second preset decoding result, thereby acquiring Vth3. In the following, the Vth2 that has been acquired is input by the three threshold inputs of the decoding module 13 to obtain Vth1 and Vth3 as an example for description.

In an optional implementation, the microprocessor 12 is further configured to: store one or more of a first decoding threshold, a second decoding threshold, and a third decoding threshold. In this way, the decoding threshold can be quickly determined after the system failure is recovered.

As shown in FIG. 7, a DAC (Digital to Analog Converter) may be disposed in the microprocessor 12 to convert the acquired decoding threshold represented by the digital signal into an analog signal and store it. In addition, an ADC (Analog to Digital Converter) may be provided in the microprocessor 12 to convert the stored decoding threshold represented by the analog signal into a digital signal and output for use by the decoding module 13.

An embodiment of the present invention further provides a receiving device, where the receiving device includes any of the circuits provided above for acquiring a decoding threshold of the PAM 4. The receiving device may be an optical network unit ONU.

FIG. 8 is a method for obtaining a decoding threshold of a PAM4 according to an embodiment of the present invention. The decoding threshold of the PAM4 includes a first decoding threshold, a second decoding threshold, and a third decoding threshold, where the first decoding threshold is smaller than the second. Decoding threshold, second decoding threshold is small The third decoding threshold. The method shown in Figure 8 includes the following steps S801-S802:

S801: Determine a target signal.

The execution body of the method provided in this embodiment may be a receiving device, such as an optical network unit ONU. The explanation of the related content in this embodiment can be referred to the embodiment shown above.

S802: Perform a mean operation on the received voltage of the symbol in the target signal to obtain a target decoding threshold. Wherein, when the target signal is the first signal, the target decoding threshold is a first decoding threshold, and the first signal is represented by a symbol representing a binary number 00. And the symbol representing the binary number 01; and/or, when the target signal is the third signal, the target decoding threshold is the third decoding threshold, and the third signal is composed of the symbol representing the binary number 10 and the symbol representing the binary number 11.

Optionally, the target signal includes a plurality of repeated symbols representing the first binary array; wherein the first binary array is composed of one or more binary numbers. Further optionally, when the target signal is the first signal, the number of symbols representing 00 included in the first binary array is equal to the number of symbols representing 01; and/or, when the target signal is the third signal The number of symbols representing the number 10 contained in the first binary array is equal to the number of symbols representing 11.

The method for obtaining the decoding threshold of the PAM4 provided by the embodiment of the present invention obtains the first decoding threshold and/or the third decoding threshold by using the method of averaging, since the average is obtained by the averaging circuit (also referred to as the averaging module). Compared with the peak circuit (also referred to as a peak module), the averaging module is simple to implement; and the mean value obtained by the averaging module is higher than the peak value obtained by the peak circuit, and therefore, the method provided by the embodiment of the present invention is utilized. The accuracy of the acquired decoding threshold can be improved.

The method may further include: performing a mean operation on the received voltage of the symbol in the second signal to obtain a second decoding threshold; wherein the binary number represented by the symbol in the second signal is random data.

Step S801 may include: decoding a received voltage signal from a transmitting device (such as an optical line terminal OLT) to obtain a decoding result; identifying the decoding node If the decoding result is preset, the voltage signal from the transmitting device is received as the target signal from the current time point after the current time point value. Specifically, when it is recognized that the decoding result is a preset decoding result, a voltage signal from the transmitting device is received as a target signal from a current time point within a preset time period after the current time point value. . The “preset time period” is the “second preset time period” described in the above embodiment, and related explanations and examples and reference to the above. Further, the method may further include: sending a request message to the sending device when the decoding result is the preset decoding result; wherein the request message is used to instruct the sending device to send the target signal, specifically for indicating that the sending device is The target signal is transmitted within the preset time period.

For example, the preset decoding result includes a plurality of repeated second binary arrays; wherein the second binary array is composed of one or more symbols representing binary numbers.

Optionally, decoding the received voltage signal from the sending device to obtain a decoding result may include: decoding, by using three equal decoding thresholds, the received voltage signal from the sending device to obtain a decoding result; The equal decoding threshold is the first decoding threshold, the second decoding threshold, or the third decoding threshold that have been acquired.

Additionally, the method can also include storing one or more of a first decoding threshold, a second decoding threshold, and a third decoding threshold.

FIG. 9 is a schematic flowchart diagram of a method for acquiring a decoding threshold of a PAM 4 according to an embodiment of the present invention. The method shown in FIG. 9 may include the following steps S901-S906.

S901: The receiving device performs an average operation on the received voltage of the symbol in the second signal from the transmitting device to obtain Vth2, and stores Vth2.

S902: The receiving device sets all three decoding thresholds to Vth2.

S903: The receiving device decodes the received voltage signal from the transmitting device by using three decoding thresholds that have been set to obtain a decoding result.

The "voltage signal" in step S903 can be any voltage signal.

S904: The receiving device determines whether the decoding result is a preset decoding result.

If yes, go to step S905; if no, go back to step S903.

Wherein, when the step S903-S906 is used to acquire the Vth1, that is, the "target signal" in the following step S906 is the first signal, the "preset decoding result" in the step S904 is the first preset decoding result; in this case When the "voltage signal" in step S903 is the "first delimiter" described in the above embodiment, the determination result of the step S904 is "YES"; otherwise, the judgment result of the step S904 is "NO".

When the step S903-S906 is used to acquire Vth3, that is, the "target signal" in the following step S906 is the third signal, the "preset decoding result" in the step S904 is the second preset decoding result; in this case, when When the "voltage signal" in step S903 is the "second delimiter" described in the above embodiment, the result of the determination in step S904 is "YES"; otherwise, the result of the determination in step S904 is "NO".

S905: The receiving device sends a request message to the sending device, where the request message is used to instruct the sending device to send the target signal to the receiving device within a preset time period.

S906: The receiving device performs an average operation on the received voltage of the symbol in the target signal from the transmitting device to obtain a target decoding threshold, and stores a target decoding threshold.

The "target signal" in step S906 is a voltage signal obtained after the energy loss or the like in the transmission process of the "target signal" in step S905.

It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and are not limited thereto; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that The technical solutions described in the foregoing embodiments are modified, or the equivalents of the technical features are replaced. The modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

A circuit for acquiring a decoding threshold of a fourth-order pulse amplitude modulation PAM4, wherein the decoding threshold of the PAM4 includes a first decoding threshold, a second decoding threshold, and a third decoding threshold, wherein the first decoding threshold is less than The second decoding threshold, the second decoding threshold is smaller than the third decoding threshold; the circuit includes:

An averaging module and a microprocessor coupled to the output of the averaging module;

The averaging module is configured to perform an averaging operation on a received voltage of all symbols in the input signal;

The microprocessor is configured to: after determining that the signal input to the averaging module is a target signal, acquiring a value obtained by performing averaging operation on a received voltage of the symbol in the target signal by the averaging module, and using the value as a target decoding Threshold value

Wherein, when the target signal is the first signal, the target decoding threshold is the first decoding threshold, and the first signal is composed of a symbol representing a binary number 00 and a symbol representing a binary number 01; and/or And when the target signal is the third signal, the target decoding threshold is the third decoding threshold, and the third signal is composed of a symbol representing a binary number 10 and a symbol representing a binary number 11.
The circuit of claim 1 further comprising: a decoding module and a medium access control MAC module;

The input end of the MAC module is connected to the output end of the decoding module, and the output end of the MAC module is connected to the microprocessor;

The decoding module is configured to decode the input signal to obtain a decoding result;

The MAC module is configured to identify whether the decoding result is a preset decoding result, and output a control signal when identifying that the decoding result is the preset decoding result, where the control signal is used to indicate the The microprocessor inputs a signal of the averaging module as the target signal from a point in time when the control signal is received, after a point in time when the control signal is received.
The circuit of claim 2 wherein:

The MAC module is further configured to: when the decoding result is that the decoding result is the preset decoding result, send a request message to the sending device, where the request message is used to instruct the sending device to send the target signal.
Circuit according to claim 2 or 3, characterized in that

The decoding module further includes three threshold inputs;

The decoding thresholds input by the three threshold inputs are equal; wherein the equal decoding thresholds are: the first decoding threshold, the second decoding threshold, or the third decoding threshold that have been acquired.
A circuit according to any one of claims 1 to 4, wherein said target signal comprises a plurality of repeated symbols representing a first binary array; wherein said first binary array is comprised of one or Consists of multiple binary numbers.
The circuit according to claim 5, wherein when said target signal is said first signal, said number of symbols representing 00 contained in said first binary array is different from a symbol representing 01 The number is equal; and/or, when the target signal is the third signal, the number of symbols representing the number 10 included in the first binary array is equal to the number of symbols representing 11.
The circuit according to any one of claims 2 to 4, wherein the preset decoding result comprises a plurality of repeated second binary arrays; wherein the second binary array is composed of one or more The binary number is composed.
The circuit according to any one of claims 1 to 7, wherein the microprocessor is further configured to: when determining that the signal input to the averaging module is a second signal, acquiring the averaging module The value obtained by performing the mean operation on the received voltage of the symbol in the two signals is used as the second decoding threshold; wherein the binary number represented by the symbol in the second signal is a random number.
A circuit according to any of claims 1-8, characterized in that

The microprocessor is further configured to: store one or more of the first decoding threshold, the second decoding threshold, and the third decoding threshold.
A method for obtaining a decoding threshold of a fourth-order pulse amplitude modulation PAM4, wherein the decoding threshold of the PAM4 includes a first decoding threshold, a second decoding threshold, and a third decoding threshold, wherein the first decoding threshold is less than The second decoding threshold, the second decoding threshold is smaller than the third decoding threshold; the method includes:

Determining the target signal;

Performing an average operation on the received voltage of the symbol in the target signal to obtain a target decoding threshold;

Wherein, when the target signal is the first signal, the target decoding threshold is the first decoding threshold, and the first signal is composed of a symbol representing a binary number 00 and a symbol representing a binary number 01; and/or And when the target signal is the third signal, the target decoding threshold is the third decoding threshold, and the third signal is composed of a symbol representing a binary number 10 and a symbol representing a binary number 11.
The method of claim 10, wherein the determining the target signal comprises:

Decoding the received voltage signal from the transmitting device to obtain a decoding result;

When it is recognized that the decoding result is a preset decoding result, a voltage signal from the transmitting device received after the current time point value from the current time point is used as the target signal.
The method of claim 11 wherein the method further comprises:

And when the decoding result is the preset decoding result, sending a request message to the sending device, where the request message is used to instruct the sending device to send the target signal.
The method according to claim 11 or 12, wherein the decoding of the received voltage signal from the transmitting device to obtain a decoding result comprises:

Deriving a received voltage signal from the transmitting device by using three equal decoding thresholds to obtain a decoding result; wherein the equal decoding threshold is obtained The first decoding threshold, the second decoding threshold, or the third decoding threshold obtained.
A method according to any one of claims 10-13, wherein said target signal comprises a plurality of repeated symbols representing a first binary array; wherein said first binary array is comprised of one or Consists of multiple binary numbers.
The method according to claim 14, wherein when the target signal is the first signal, the number of symbols representing 00 included in the first binary array and the symbol representing 01 The number is equal; and/or, when the target signal is the third signal, the number of symbols representing the number 10 included in the first binary array is equal to the number of symbols representing 11.
The method according to any one of claims 11 to 13, wherein the preset decoding result comprises a plurality of repeated second binary arrays; wherein the second binary array is composed of one or more The symbolic representation of a binary number.
The method according to any one of claims 10 to 16, wherein the method further comprises: performing a mean operation on a received voltage of a symbol in the second signal to obtain the second decoding threshold; wherein The binary number represented by the symbol in the second signal is a random number.
The method according to any one of claims 10-17, wherein the method further comprises: storing one or more of the first decoding threshold, the second decoding threshold, and the third decoding threshold One.
An optical network unit, characterized in that the optical network unit comprises the circuit for acquiring a decoding threshold of a fourth-order pulse amplitude modulation PAM4 according to any one of claims 1-9.