WO2017047311A1 - Photoelectric transducer and production method for same - Google Patents

Photoelectric transducer and production method for same Download PDF

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Publication number
WO2017047311A1
WO2017047311A1 PCT/JP2016/073872 JP2016073872W WO2017047311A1 WO 2017047311 A1 WO2017047311 A1 WO 2017047311A1 JP 2016073872 W JP2016073872 W JP 2016073872W WO 2017047311 A1 WO2017047311 A1 WO 2017047311A1
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WIPO (PCT)
Prior art keywords
amorphous semiconductor
photoelectric conversion
conversion element
semiconductor layer
semiconductor substrate
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PCT/JP2016/073872
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French (fr)
Japanese (ja)
Inventor
雄太 松本
親扶 岡本
潤 斉藤
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シャープ株式会社
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Priority claimed from JP2015185468A external-priority patent/JP6639169B2/en
Priority claimed from JP2015185470A external-priority patent/JP6624864B2/en
Application filed by シャープ株式会社 filed Critical シャープ株式会社
Publication of WO2017047311A1 publication Critical patent/WO2017047311A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/072Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
    • H01L31/0745Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer or HIT® solar cells; solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Definitions

  • One embodiment of the present invention relates to a photoelectric conversion element and a method for manufacturing the photoelectric conversion element.
  • Patent Document 1 describes a method for manufacturing a photoelectric conversion element including a step of patterning a p-type amorphous semiconductor layer and an n-type amorphous semiconductor layer formed on a substrate by etching.
  • the surface of the substrate is exposed by etching the n-type amorphous semiconductor layer formed on the substrate. Contaminants may adhere to the exposed substrate surface.
  • the surface of the substrate may be roughened by the etching of the n-type amorphous semiconductor layer. Therefore, there has been a problem that the characteristics and reliability of the photoelectric conversion element deteriorate.
  • One embodiment of the present invention has been made in view of the above problems, and an object thereof is to provide a photoelectric conversion element having improved characteristics and reliability and a method for manufacturing the photoelectric conversion element.
  • the photoelectric conversion element according to the first aspect of the present invention is provided on a semiconductor substrate having a first surface and a second surface opposite to the first surface, and on the second surface.
  • the first amorphous semiconductor layer includes a first impurity having a first conductivity type.
  • the first amorphous semiconductor region includes a first impurity and a second impurity having a second conductivity type.
  • the first amorphous semiconductor layer and the first amorphous semiconductor region constitute one layer that extends continuously.
  • a photoelectric conversion element includes a semiconductor substrate having a first surface and a second surface opposite to the first surface, and a tunnel dielectric layer provided on the second surface
  • a first amorphous semiconductor layer having a first conductivity type, and a second conductivity different from the first conductivity type, provided on the tunnel dielectric layer.
  • a first amorphous semiconductor region having a mold The first amorphous semiconductor layer includes a first impurity having a first conductivity type.
  • the first amorphous semiconductor region includes a first impurity and a second impurity having a second conductivity type.
  • the first amorphous semiconductor layer and the first amorphous semiconductor region constitute one layer that extends continuously.
  • a first conductive material is formed on a second surface of a semiconductor substrate having a first surface and a second surface opposite to the first surface.
  • the first amorphous semiconductor layer includes a first impurity having a first conductivity type.
  • the method for manufacturing a photoelectric conversion element according to the third aspect of the present invention further includes forming a first amorphous semiconductor region having the second conductivity type in the first amorphous semiconductor layer.
  • the formation of the first amorphous semiconductor region in the first amorphous semiconductor layer means that a part of the first amorphous semiconductor layer has a second conductivity type different from the first conductivity type. Doping with a second impurity.
  • a method for manufacturing a photoelectric conversion element comprising: forming a tunnel dielectric layer on a second surface of a semiconductor substrate having a first surface and a second surface opposite to the first surface. Forming a first amorphous semiconductor layer having a first conductivity type on the tunnel dielectric layer.
  • the first amorphous semiconductor layer includes a first impurity having a first conductivity type.
  • the method for manufacturing a photoelectric conversion element according to the fourth aspect of the present invention further includes forming a first amorphous semiconductor region having the second conductivity type in the first amorphous semiconductor layer.
  • the formation of the first amorphous semiconductor region in the first amorphous semiconductor layer means that a part of the first amorphous semiconductor layer has a second conductivity type different from the first conductivity type. Doping with a second impurity.
  • a photoelectric conversion element having improved characteristics and reliability can be provided.
  • FIG. 7 is a schematic plan view of a photoelectric conversion element according to Embodiments 1 to 7.
  • FIG. FIG. 2 is a schematic cross-sectional view of the photoelectric conversion element according to Embodiments 1 to 3 along a cross-sectional line II-II shown in FIG. It is a schematic sectional drawing which shows 1 process in the manufacturing method of the photoelectric conversion element which concerns on Embodiment 1 to Embodiment 6 and Embodiment 8 to Embodiment 13.
  • FIG. FIG. 7 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 3 in the method for manufacturing the photoelectric conversion element according to Embodiment 1 to Embodiment 6 and Embodiment 8 to Embodiment 13.
  • FIG. 5 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 4 in the method for manufacturing the photoelectric conversion element according to Embodiment 1 to Embodiment 6.
  • FIG. 6 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 5 in the method for manufacturing the photoelectric conversion element according to Embodiment 1 to Embodiment 6. It is a schematic sectional drawing which shows the next process of the process shown in FIG. 6 in the manufacturing method of the photoelectric conversion element which concerns on Embodiment 1 to Embodiment 6.
  • FIG. FIG. 8 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 7 in the method for manufacturing the photoelectric conversion element according to Embodiment 1 to Embodiment 6.
  • FIG. 8 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 7 in the method for manufacturing the photoelectric conversion element according to Embodiment 1 to Embodiment 6.
  • FIG. 9 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 8 in the method for manufacturing the photoelectric conversion element according to Embodiment 1.
  • FIG. 9 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 8 in the method for manufacturing the photoelectric conversion element according to Embodiment 2 and Embodiment 5.
  • FIG. 11 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 10 in the method for manufacturing a photoelectric conversion element according to Embodiment 2.
  • FIG. 9 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 8 in the method for manufacturing the photoelectric conversion element according to Embodiment 3 and Embodiment 6.
  • FIG. 9 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 8 in the method for manufacturing the photoelectric conversion element according to Embodiment 3 and Embodiment 6.
  • FIG. 13 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 12 in the method for manufacturing the photoelectric conversion element according to Embodiment 3.
  • FIG. 7 is a schematic cross-sectional view of the photoelectric conversion element according to any of Embodiments 4 to 6 along a cross-sectional line XIV-XIV shown in FIG.
  • FIG. 9 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 8 in the method for manufacturing a photoelectric conversion element according to Embodiment 4.
  • FIG. 11 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 10 in the method for manufacturing the photoelectric conversion element according to Embodiment 5.
  • FIG. 13 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 12 in the method for manufacturing the photoelectric conversion element according to Embodiment 6.
  • FIG. 8 is a schematic cross-sectional view of the photoelectric conversion element according to Embodiment 7 taken along a cross-sectional line XVIII-XVIII shown in FIG. It is a schematic plan view of the photoelectric conversion element according to Embodiments 8 to 14.
  • FIG. 20 is a schematic cross-sectional view of the photoelectric conversion element according to any of Embodiments 8 to 10 along a cross-sectional line XX-XX shown in FIG. It is a schematic sectional drawing which shows the next process of the process shown in FIG.
  • FIG. 22 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 21 in the method for manufacturing the photoelectric conversion element according to the eighth to thirteenth embodiments.
  • FIG. 23 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 22 in the method for manufacturing the photoelectric conversion element according to the eighth to thirteenth embodiments.
  • FIG. 24 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 23 in the method for manufacturing the photoelectric conversion element according to the eighth to thirteenth embodiments. It is a schematic sectional drawing which shows the next process of the process shown in FIG.
  • FIG. 26 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 25 in the method for manufacturing a photoelectric conversion element according to Embodiment 8. It is a schematic sectional drawing which shows the next process of the process shown in FIG. 25 in the manufacturing method of the photoelectric conversion element which concerns on Embodiment 9 and Embodiment 12.
  • FIG. FIG. 28 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 27 in the method for manufacturing the photoelectric conversion element according to Embodiment 9. It is a schematic sectional drawing which shows the next process of the process shown in FIG.
  • FIG. 30 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 29 in the method for manufacturing the photoelectric conversion element according to Embodiment 10.
  • FIG. 20 is a schematic cross sectional view of the photoelectric conversion element according to any of the eleventh to thirteenth embodiments, taken along a sectional line XXXI-XXXI shown in FIG.
  • FIG. 26 is a schematic sectional view showing a step subsequent to the step shown in FIG. 25 in the method for manufacturing the photoelectric conversion element according to the eleventh embodiment.
  • FIG. 28 is a schematic sectional view showing a step subsequent to the step shown in FIG.
  • FIG. 30 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 29 in the method for manufacturing the photoelectric conversion element according to Embodiment 13.
  • FIG. 20 is a schematic cross sectional view of the photoelectric conversion element according to Embodiment 14 taken along a cross sectional line XXXV-XXXV shown in FIG.
  • the photoelectric conversion element 1 which concerns on Embodiment 1 is demonstrated.
  • the photoelectric conversion element 1 of the present embodiment includes a semiconductor substrate 11, a first amorphous semiconductor layer 17, a first amorphous semiconductor region 16, a first electrode 19, and a second electrode 18. And mainly.
  • the semiconductor substrate 11 may be an n-type or p-type semiconductor substrate. In the present embodiment, an n-type single crystal silicon substrate is used as the semiconductor substrate 11.
  • the semiconductor substrate 11 has a first surface 11a and a second surface 11b opposite to the first surface 11a.
  • the first surface 11a of the semiconductor substrate 11 may be a light incident surface.
  • the first surface 11a and the second surface 11b of the semiconductor substrate 11 have a first direction (for example, x direction) and a second direction (for example, y direction) that intersects the first direction (for example, x direction).
  • the thickness direction of the semiconductor substrate 11 is a third direction (for example, z direction) that intersects the first direction (for example, x direction) and the second direction (for example, y direction).
  • the photoelectric conversion element 1 may include a second amorphous semiconductor layer 15 having i-type on the second surface 11 b of the semiconductor substrate 11.
  • An i-type is formed between the first amorphous semiconductor layer 17 and the second surface 11b of the semiconductor substrate 11 and between the first amorphous semiconductor region 16 and the second surface 11b of the semiconductor substrate 11.
  • a second amorphous semiconductor layer 15 may be provided. Specifically, the second amorphous semiconductor layer 15 may be in contact with the second surface 11 b of the semiconductor substrate 11.
  • an i-type amorphous silicon film is used as the second amorphous semiconductor layer 15.
  • the second amorphous semiconductor layer 15 having i-type carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the second surface 11 b of the semiconductor substrate 11. Recombination can be suppressed.
  • the i-type second amorphous semiconductor layer 15 can improve the passivation characteristics of the photoelectric conversion element 1.
  • amorphous semiconductor means not only an amorphous semiconductor in which dangling bonds of atoms constituting the semiconductor are not terminated with hydrogen, but also hydrogenated amorphous silicon and the like. Also included is an amorphous semiconductor in which dangling bonds of atoms constituting the semiconductor are terminated with hydrogen.
  • i-type semiconductor is not only a completely intrinsic semiconductor but also a sufficiently low concentration (the n-type impurity concentration is less than 1 ⁇ 10 15 / cm 3 and the p-type impurity concentration is 1 ⁇ 10
  • a semiconductor mixed with n-type or p-type impurities of less than 15 / cm 3 is also included.
  • the photoelectric conversion element 1 of the present embodiment includes the first amorphous semiconductor layer 17 having the first conductivity type on the second surface 11b of the semiconductor substrate 11.
  • the first amorphous semiconductor layer 17 having the first conductivity type may be provided on the surface of the second amorphous semiconductor layer 15 opposite to the semiconductor substrate 11.
  • the first amorphous semiconductor layer 17 includes a first impurity having the first conductivity type.
  • the first amorphous semiconductor layer 17 may be a p-type or n-type amorphous semiconductor layer.
  • the first impurity may be a p-type impurity such as boron or an n-type impurity such as phosphorus.
  • the first impurity is a p-type impurity such as boron
  • the first amorphous semiconductor layer 17 is a p-type amorphous silicon film.
  • the photoelectric conversion element 1 according to the present embodiment is provided in the first amorphous semiconductor layer 17 and includes a first amorphous semiconductor region 16 having a second conductivity type different from the first conductivity type.
  • the photoelectric conversion element 1 of the present embodiment is provided on the second surface 11b of the semiconductor substrate 11 and includes a first amorphous semiconductor region 16 having a second conductivity type different from the first conductivity type.
  • the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 constitute one layer that extends continuously.
  • the surfaces of the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 on the side opposite to the semiconductor substrate 11 may constitute one surface extending continuously.
  • the first amorphous semiconductor region 16 includes a first impurity having a first conductivity type and a second impurity having a second conductivity type different from the first conductivity type.
  • the first amorphous semiconductor region 16 contains the second impurity having the second conductivity type more than the first impurity having the first conductivity type. Region 16 as a whole has the second conductivity type.
  • the first amorphous semiconductor region 16 may be an n-type or p-type amorphous semiconductor region.
  • the second impurity may be an n-type impurity such as phosphorus or a p-type impurity such as boron.
  • the second impurity is an n-type impurity such as phosphorus
  • the first amorphous semiconductor region 16 is an n-type amorphous silicon region.
  • the first amorphous semiconductor region 16 may be provided in a stripe shape extending in the second direction (for example, the y direction).
  • the concentration of the first impurity in the first amorphous semiconductor region 16 is the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged, that is, the first May be constant in the direction (for example, the x direction).
  • the concentration of the first impurity in the first amorphous semiconductor region 16 is such that the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged. Is constant in the first amorphous semiconductor region 16 in the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged. It means that the variation in the concentration of the impurity is within 30% of the average concentration of the first impurity in the first amorphous semiconductor region 16 in this direction.
  • the concentration of the first impurity in the first amorphous semiconductor region 16 may be substantially the same as the concentration of the first impurity in the first amorphous semiconductor layer 17.
  • the concentration of the first impurity in the first amorphous semiconductor region 16 is substantially the same as the concentration of the first impurity in the first amorphous semiconductor layer 17.
  • the difference between the average concentration of the first impurity in one amorphous semiconductor region 16 and the average concentration of the first impurity in the first amorphous semiconductor layer 17 is the first concentration in the first amorphous semiconductor layer 17. It is within 20% of the average concentration of one impurity.
  • the concentration of the second impurity in the first amorphous semiconductor region 16 is the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged, that is, the first May be constant in the direction (for example, the x direction).
  • the concentration of the second impurity in the first amorphous semiconductor region 16 is such that the first amorphous semiconductor region 16 and the first amorphous semiconductor layer 17 are alternately arranged.
  • the variation in the impurity concentration is within 30% of the average concentration of the second impurity in the first amorphous semiconductor region 16 in this direction.
  • the photoelectric conversion element 1 of the present embodiment includes a first electrode 19 that is electrically connected to the first amorphous semiconductor layer 17.
  • the first electrode 19 may be provided on the second surface 11 b of the semiconductor substrate 11. More specifically, the first electrode 19 may be provided on the first amorphous semiconductor layer 17.
  • the first electrode 19 may be provided in a stripe shape extending in the second direction (for example, the y direction).
  • a metal electrode may be exemplified as the first electrode 19.
  • silver (Ag) is used as the first electrode 19.
  • the first electrode 19 may be a p-type electrode.
  • the photoelectric conversion element 1 of this embodiment includes a second electrode 18 that is electrically connected to the first amorphous semiconductor region 16.
  • the second electrode 18 may be provided on the second surface 11 b of the semiconductor substrate 11. More specifically, the second electrode 18 may be provided on the first amorphous semiconductor region 16.
  • the second electrode 18 may be provided in a stripe shape extending in the second direction (for example, the y direction).
  • a metal electrode may be exemplified as the second electrode 18.
  • silver (Ag) is used as the second electrode 18.
  • the second electrode 18 may be an n-type electrode.
  • the semiconductor substrate 11 and the first amorphous semiconductor layer 17 are heterojunction through the second amorphous semiconductor layer 15, and the semiconductor substrate 11 and the first amorphous semiconductor layer 17 are connected.
  • the amorphous semiconductor region 16 is heterojunction with the second amorphous semiconductor layer 15. Therefore, the photoelectric conversion element 1 has improved passivation characteristics and a high open circuit voltage V OC . According to the photoelectric conversion element 1 of the present embodiment, the efficiency of converting light energy into electrical energy can be improved.
  • the first surface 11a of the semiconductor substrate 11 may include an uneven structure. Light enters the photoelectric conversion element 1 from the first surface 11a side.
  • the concavo-convex structure on the first surface 11a of the semiconductor substrate 11 that is the light incident surface reflection of incident light on the first surface 11a of the semiconductor substrate 11 can be suppressed, and more Light can enter the photoelectric conversion element 1.
  • the efficiency of converting light energy into electric energy in the photoelectric conversion element 1 can be improved.
  • the photoelectric conversion element 1 of the present embodiment may include an i-type third amorphous semiconductor layer 12 on the first surface 11 a of the semiconductor substrate 11.
  • an i-type third amorphous semiconductor layer 12 on the first surface 11 a of the semiconductor substrate 11.
  • the photoelectric conversion element 1 of the present embodiment may include a fourth amorphous semiconductor layer 13 having the same conductivity type as the semiconductor substrate 11 on the first surface 11 a of the semiconductor substrate 11.
  • a fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 may be provided on the third amorphous semiconductor layer 12 having i type.
  • the fourth amorphous semiconductor layer 13 can be an n-type or p-type amorphous semiconductor layer.
  • an n-type amorphous silicon film is used as the fourth amorphous semiconductor layer 13.
  • the fourth amorphous semiconductor layer 13 having the same conductivity type as the semiconductor substrate 11 may function as a surface electric field layer.
  • the fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 generates an electric field in the vicinity of the first surface 11a of the semiconductor substrate 11, and an energy band is generated in the vicinity of the first surface 11a of the semiconductor substrate 11. Curve. Carriers approaching the first surface 11 a of the semiconductor substrate 11 are pushed back into the semiconductor substrate 11 by the electric field and the curvature of the energy band. Therefore, recombination of carriers on the first surface 11a of the semiconductor substrate 11 can be suppressed.
  • a dielectric layer 14 may be provided on the first surface 11 a of the semiconductor substrate 11.
  • the dielectric layer 14 may be composed of a single layer or a plurality of layers. Examples of the material of the dielectric layer 14 include silicon nitride (SiN x ) and silicon oxide (SiO x ).
  • the dielectric layer 14 may function as an antireflection film.
  • the dielectric layer 14 may function as a passivation film.
  • a semiconductor substrate 11 having a first surface 11a and a second surface 11b opposite to the first surface 11a is prepared.
  • an uneven structure may be formed on first surface 11 a of semiconductor substrate 11.
  • the first surface 11a of the semiconductor substrate 11 which is an n-type single crystal silicon substrate is anisotropically etched using potassium hydroxide (KOH), whereby the first surface 11a of the semiconductor substrate 11 is uneven.
  • KOH potassium hydroxide
  • i-type third amorphous semiconductor layer 12 may be formed on first surface 11 a of semiconductor substrate 11.
  • a fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 may be formed on the first surface 11 a of the semiconductor substrate 11.
  • a fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 may be formed on the i-type third amorphous semiconductor layer 12.
  • a method for forming the third amorphous semiconductor layer 12 and the fourth amorphous semiconductor layer 13 is not particularly limited, and may be, for example, a plasma chemical vapor deposition (CVD) method.
  • CVD plasma chemical vapor deposition
  • dielectric layer 14 may be formed on first surface 11 a of semiconductor substrate 11. Specifically, the dielectric layer 14 may be formed on the fourth amorphous semiconductor layer 13 having the same conductivity type as the semiconductor substrate 11.
  • the formation method of the dielectric layer 14 is not particularly limited, but may be, for example, a plasma chemical vapor deposition (CVD) method.
  • an i-type second amorphous semiconductor layer 15 may be formed on the second surface 11 b of the semiconductor substrate 11.
  • first amorphous semiconductor layer 17 having the first conductivity type is formed on second surface 11 b of semiconductor substrate 11.
  • the first amorphous semiconductor layer 17 having the first conductivity type is formed on the second amorphous semiconductor layer 15 having the i type.
  • the first amorphous semiconductor layer 17 includes a first impurity having the first conductivity type.
  • a method for forming the second amorphous semiconductor layer 15 and the first amorphous semiconductor layer 17 is not particularly limited, and may be, for example, a plasma chemical vapor deposition (CVD) method.
  • CVD plasma chemical vapor deposition
  • the first amorphous semiconductor region 16 having the second conductivity type is formed in the first amorphous semiconductor layer 17.
  • the formation of the first amorphous semiconductor region 16 in the first amorphous semiconductor layer 17 means that a second portion different from the first conductivity type is formed in a part of the first amorphous semiconductor layer 17. Doping with a second impurity having a conductivity type.
  • the first amorphous semiconductor region 16 includes a first impurity having a first conductivity type and a second impurity having a second conductivity type different from the first conductivity type.
  • the first amorphous semiconductor region 16 contains the second impurity having the second conductivity type more than the first impurity having the first conductivity type. Region 16 as a whole has the second conductivity type.
  • the concentration of the first impurity in the first amorphous semiconductor region 16 is constant in the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged. Also good.
  • the concentration of the first impurity in the first amorphous semiconductor region 16 may be substantially the same as the concentration of the first impurity in the first amorphous semiconductor layer 17.
  • the first amorphous semiconductor region 16 may exist over the entire thickness of the first amorphous semiconductor layer 17.
  • Doping the second impurity in part of the first amorphous semiconductor layer 17 may include ion implantation of the second impurity in part of the first amorphous semiconductor layer 17. That is, the second impurity may be doped into part of the first amorphous semiconductor layer 17 by ion implantation. Specifically, by irradiating a part of the first amorphous semiconductor layer 17 with the ion beam 21 of the second impurity, the second impurity is applied to a part of the first amorphous semiconductor layer 17. It may be doped. Thus, the first amorphous semiconductor region 16 having the second conductivity type may be formed in the first amorphous semiconductor layer 17.
  • a mask 22 having an opening corresponding to a part of the first amorphous semiconductor layer 17 and covering the other part of the first amorphous semiconductor layer 17 may be used.
  • the first impurity contained in the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 are added to the first amorphous semiconductor layer 17.
  • the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 may be annealed.
  • a first electrode 19 that is electrically connected to the first amorphous semiconductor layer 17 is formed on the second surface 11 b of the semiconductor substrate 11. Specifically, the first electrode 19 is formed on the first amorphous semiconductor layer 17.
  • a second electrode 18 that is electrically connected to the first amorphous semiconductor region 16 is formed on the second surface 11 b of the semiconductor substrate 11. Specifically, the second electrode 18 is formed on the first amorphous semiconductor region 16.
  • the photoelectric conversion element 1 of this Embodiment and its manufacturing method is demonstrated.
  • the photoelectric conversion element 1 of the present embodiment is provided on a semiconductor substrate 11 having a first surface 11a and a second surface 11b opposite to the first surface 11a, and the second surface 11b,
  • the first amorphous semiconductor layer 17 includes a first impurity having the first conductivity type.
  • the first amorphous semiconductor region 16 includes a first impurity and a second impurity having a second conductivity type.
  • the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 constitute one layer that extends continuously.
  • a structure that can be manufactured without exposing the second surface 11b of the semiconductor substrate 11 after the first amorphous semiconductor layer 17 is formed on the second surface 11b of the semiconductor substrate 11 is described in this embodiment.
  • the photoelectric conversion element 1 is provided.
  • a structure that can be manufactured without contamination of the second surface 11b of the semiconductor substrate 11 or roughening of the second surface 11b of the semiconductor substrate 11 due to etching of the amorphous semiconductor layer is described in this embodiment.
  • the photoelectric conversion element 1 is provided.
  • the photoelectric conversion element 1 of the present embodiment has improved characteristics and reliability.
  • the first amorphous semiconductor region 16 may exist over the entire thickness of the first amorphous semiconductor layer 17. The distance between the first amorphous semiconductor region 16 and the semiconductor substrate 11 can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the second conductivity type of the first amorphous semiconductor region 16 are the first. A single amorphous semiconductor region 16 can be collected with higher efficiency. According to the photoelectric conversion element 1 of the present embodiment, the efficiency of converting light energy into electrical energy can be improved.
  • the concentration of the first impurity in the first amorphous semiconductor region 16 is such that the first amorphous semiconductor region 16 and the first amorphous semiconductor layer 17 are the same. It may be constant in the alternately arranged directions.
  • the first amorphous semiconductor layer 17 is formed on the second surface 11b of the semiconductor substrate 11, a structure that can be manufactured without exposing the second surface 11b of the semiconductor substrate 11 is formed in the photoelectric conversion element 1.
  • the photoelectric conversion element 1 of the present embodiment has improved characteristics and reliability.
  • the first amorphous semiconductor layer 17 and the second surface 11 b of the semiconductor substrate 11 and the first amorphous semiconductor region 16 and the second of the semiconductor substrate 11 are used.
  • An i-type second amorphous semiconductor layer 15 may be further provided between the first surface 11b and the first surface 11b.
  • the second amorphous semiconductor layer 15 having i-type carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the second surface 11 b of the semiconductor substrate 11. Recombination can be suppressed.
  • the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
  • the photoelectric conversion element 1 is provided on the second surface 11b of the semiconductor substrate 11, and the first electrode 19 electrically connected to the first amorphous semiconductor layer 17 and the semiconductor A second electrode 18 that is provided on the second surface 11 b of the substrate 11 and electrically connected to the first amorphous semiconductor region 16 may be further provided.
  • the first electrode 19 and the second electrode 18 are not provided on the first surface 11a side of the semiconductor substrate 11 which is a light incident surface. Light incident on the photoelectric conversion element 1 is not blocked by the first electrode 19 and the second electrode 18. According to the photoelectric conversion element 1 of the present embodiment, a high short-circuit current J SC can be obtained, and the efficiency of converting light energy into electric energy can be improved.
  • the photoelectric conversion element 1 of the present embodiment may further include a dielectric layer 14 on the first surface 11a of the semiconductor substrate 11.
  • the dielectric layer 14 functions as an antireflection film
  • the dielectric layer 14 can cause more light to enter the photoelectric conversion element 1.
  • the efficiency of converting light energy into electrical energy can be improved.
  • the dielectric layer 14 functions as a passivation film
  • the carrier generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 is the first dielectric layer 14 of the semiconductor substrate 11. It is possible to suppress recombination on the surface 11a.
  • the efficiency of converting light energy into electrical energy can be improved.
  • the photoelectric conversion element 1 of the present embodiment may further include a third amorphous semiconductor layer 12 having i-type on the first surface 11 a of the semiconductor substrate 11.
  • a third amorphous semiconductor layer 12 having i-type carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the first surface 11 a of the semiconductor substrate 11. Recombination can be suppressed.
  • the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
  • the photoelectric conversion element 1 of the present embodiment may further include a fourth amorphous semiconductor layer 13 having the same conductivity type as the semiconductor substrate 11 on the first surface 11 a of the semiconductor substrate 11.
  • the fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 has the first surface 11 a of the semiconductor substrate 11 among the carriers generated in the semiconductor substrate 11 when light enters the photoelectric conversion element 1.
  • the carrier approaching can be pushed back into the semiconductor substrate 11.
  • the fourth amorphous semiconductor layer 13 can suppress recombination of this carrier on the first surface 11 a of the semiconductor substrate 11. According to the photoelectric conversion element 1 of the present embodiment, the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
  • the first surface 11a of the semiconductor substrate 11 may include an uneven structure.
  • the concavo-convex structure on the first surface 11 a of the semiconductor substrate 11 that is the light incident surface more light can be incident into the photoelectric conversion element 1.
  • the efficiency of converting light energy into electrical energy can be improved.
  • the manufacturing method of the photoelectric conversion element 1 according to the present embodiment includes the first surface 11a and the second surface 11b of the semiconductor substrate 11 having the second surface 11b opposite to the first surface 11a. Forming a first amorphous semiconductor layer 17 having one conductivity type.
  • the first amorphous semiconductor layer 17 includes a first impurity having the first conductivity type.
  • the method for manufacturing the photoelectric conversion element 1 according to the present embodiment further includes forming the first amorphous semiconductor region 16 having the second conductivity type in the first amorphous semiconductor layer 17.
  • the formation of the first amorphous semiconductor region 16 in the first amorphous semiconductor layer 17 means that a second portion different from the first conductivity type is formed in a part of the first amorphous semiconductor layer 17. Doping with a second impurity having a conductivity type.
  • the photoelectric conversion element 1 can be manufactured without exposing the second surface 11b of the semiconductor substrate 11.
  • the photoelectric conversion element 1 can be manufactured without the contaminants adhering to the second surface 11b of the semiconductor substrate 11 or the second surface 11b of the semiconductor substrate 11 being roughened by etching of the amorphous semiconductor layer. According to the method for manufacturing the photoelectric conversion element 1 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
  • the first amorphous semiconductor region 16 may exist over the entire thickness of the first amorphous semiconductor layer 17. The distance between the first amorphous semiconductor region 16 and the semiconductor substrate 11 can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the second conductivity type of the first amorphous semiconductor region 16 are the first. A single amorphous semiconductor region 16 can be collected with higher efficiency. According to the manufacturing method of the photoelectric conversion element 1 of the present embodiment, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
  • the concentration of the first impurity in the first amorphous semiconductor region 16 is the same as that of the first amorphous semiconductor region 16 and the first amorphous semiconductor layer. It may be constant in a direction in which 17 and 17 are alternately arranged.
  • the photoelectric conversion element 1 can be manufactured without exposing the second surface 11b of the semiconductor substrate 11. According to the method for manufacturing the photoelectric conversion element 1 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
  • the first amorphous semiconductor layer 17 is formed on the second surface 11 b of the semiconductor substrate 11 before the first amorphous semiconductor layer 17 is formed on the second surface 11 b of the semiconductor substrate 11.
  • an i-type second amorphous semiconductor layer 15 may be further formed.
  • the second amorphous semiconductor layer 15 having i-type carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the second surface 11 b of the semiconductor substrate 11. Recombination can be suppressed.
  • the photoelectric conversion element with which the passivation characteristic and the efficiency which converts light energy into electrical energy were improved can be manufactured.
  • doping a second impurity into a part of the first amorphous semiconductor layer 17 causes a part of the first amorphous semiconductor layer 17 to be doped. Ion implantation of the second impurity may be included. According to the method for manufacturing the photoelectric conversion element 1 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
  • the first electrode 19 that is electrically connected to the first amorphous semiconductor layer 17 is formed on the second surface 11 b of the semiconductor substrate 11. And forming a second electrode 18 electrically connected to the first amorphous semiconductor region 16 on the second surface 11 b of the semiconductor substrate 11.
  • the first electrode 19 and the second electrode 18 are photoelectric elements that are not provided on the first surface 11a side of the semiconductor substrate 11 that is the light incident surface.
  • the conversion element 1 can be manufactured. Light incident on the photoelectric conversion element 1 is not blocked by the first electrode 19 and the second electrode 18.
  • a photoelectric conversion element having a high short-circuit current J SC and improved efficiency in converting light energy into electric energy can be manufactured.
  • the method for manufacturing the photoelectric conversion element 1 according to the present embodiment may further include forming the dielectric layer 14 on the first surface 11 a of the semiconductor substrate 11.
  • the dielectric layer 14 functions as an antireflection film
  • the dielectric layer 14 can cause more light to enter the photoelectric conversion element 1.
  • a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
  • the dielectric layer 14 functions as a passivation film
  • the carrier generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 is the first dielectric layer 14 of the semiconductor substrate 11. It is possible to suppress recombination on the surface 11a.
  • a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
  • the method for manufacturing the photoelectric conversion element 1 of the present embodiment may further include forming the third amorphous semiconductor layer 12 having i-type on the first surface 11 a of the semiconductor substrate 11.
  • the third amorphous semiconductor layer 12 having i-type carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the first surface 11 a of the semiconductor substrate 11. Recombination can be suppressed.
  • the photoelectric conversion element with which the passivation characteristic and the efficiency which converts light energy into electrical energy were improved can be manufactured.
  • the manufacturing method of the photoelectric conversion element 1 according to the present embodiment further includes forming the fourth amorphous semiconductor layer 13 having the same conductivity type as the semiconductor substrate 11 on the first surface 11 a of the semiconductor substrate 11. You may prepare.
  • the fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 has the first surface 11 a of the semiconductor substrate 11 among the carriers generated in the semiconductor substrate 11 when light enters the photoelectric conversion element 1.
  • the carrier approaching can be pushed back into the semiconductor substrate 11.
  • the fourth amorphous semiconductor layer 13 can suppress recombination of this carrier on the first surface 11 a of the semiconductor substrate 11. According to the manufacturing method of the photoelectric conversion element 1 of this Embodiment, the photoelectric conversion element with which the passivation characteristic and the efficiency which converts light energy into electrical energy were improved can be manufactured.
  • the method for manufacturing the photoelectric conversion element 1 according to the present embodiment may further include forming a concavo-convex structure on the first surface 11 a of the semiconductor substrate 11.
  • a concavo-convex structure on the first surface 11 a of the semiconductor substrate 11, which is the light incident surface, more light can be incident into the photoelectric conversion element 1.
  • a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
  • the photoelectric conversion element 1 of the present embodiment has a configuration similar to that of the photoelectric conversion element 1 of the first embodiment.
  • the manufacturing method of the photoelectric conversion element 1 of this Embodiment is fundamentally equipped with the process similar to the manufacturing method of the photoelectric conversion element 1 of Embodiment 1, it differs in the following points.
  • the second impurity is doped in part of the first amorphous semiconductor layer 17 by the ion implantation method.
  • doping the second impurity into a part of the first amorphous semiconductor layer 17 means that the first amorphous semiconductor layer 17 is doped.
  • the formation of the dopant-containing film 26 containing the second impurity on the first amorphous semiconductor layer 17 means that the second amorphous semiconductor layer 17 is formed on the second amorphous semiconductor layer 17.
  • a doping paste containing impurities may be applied. Transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 may include heat-treating the doping paste.
  • the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the dielectric layer 14 are formed on the first surface 11 a of the semiconductor substrate 11.
  • the second amorphous semiconductor layer 15 and the first amorphous semiconductor layer 17 having the first conductivity type are formed on the second surface 11 b of the semiconductor substrate 11.
  • a dopant-containing film 26 containing a second impurity having the second conductivity type is formed on a part of the first amorphous semiconductor layer 17.
  • the dopant-containing film 26 include a doping paste containing a second impurity having n type such as phosphorus and a doping paste containing a second impurity having p type such as boron.
  • the doping paste including the second impurity having n-type may include a phosphorus compound, a silicon oxide precursor, a solvent, and a thickener.
  • the doping paste containing the second impurity having p-type may include a boron compound, a silicon oxide precursor, a solvent, and a thickener.
  • a doping paste containing an n-type second impurity such as phosphorus may be used as the dopant-containing film 26 as the dopant-containing film 26, a doping paste containing an n-type second impurity such as phosphorus may be used as the dopant-containing film 26, a doping paste containing an n-type second impurity such as phosphorus may be used as the dopant-containing film 26 .
  • the doping paste may be applied on a part of the first amorphous semiconductor layer 17 by inkjet, screen printing, or the like.
  • the dopant-containing film 26 is heat-treated so that the second impurity contained in the dopant-containing film 26 is transferred to a part of the first amorphous semiconductor layer 17.
  • the dopant-containing film 26 that is a doping paste is heat-treated at a temperature of 100 ° C. or more and 250 ° C. or less, and the second impurity contained in the dopant-containing film 26 that is a doping paste A part of the crystalline semiconductor layer 17 is doped.
  • the first amorphous semiconductor region 16 having the second conductivity type can be formed in the first amorphous semiconductor layer 17 having the first conductivity type.
  • the dopant-containing film 26 may be heat-treated using a heating furnace, or the dopant-containing film 26 may be heat-treated by irradiating the dopant-containing film 26 with laser light.
  • the first impurity in the first amorphous semiconductor layer 17 and the second impurity in the first amorphous semiconductor region 16 can be activated.
  • the first amorphous semiconductor layer 17 and the first impurity One amorphous semiconductor region 16 may be further annealed.
  • the photoelectric conversion element 1 of the present embodiment shown in FIGS. 1 and 2 can be manufactured.
  • the manufacturing method of the photoelectric conversion element 1 of the present embodiment has the same effect as the manufacturing method of the photoelectric conversion element 1 of the first embodiment, but differs in the following points.
  • doping the second impurity into a part of the first amorphous semiconductor layer 17 may cause the part of the first amorphous semiconductor layer 17 to be doped.
  • a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
  • the formation of the dopant-containing film 26 containing the second impurity on the first amorphous semiconductor layer 17 is the first amorphous semiconductor layer 17.
  • a doping paste containing the second impurity may be applied on a part of the substrate. Transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 may include heat-treating the doping paste. That is, in the method for manufacturing the photoelectric conversion element 1 according to the present embodiment, doping the second impurity into a part of the first amorphous semiconductor layer 17 is a part of the first amorphous semiconductor layer 17. Applying a doping paste containing a second impurity on the part and heat-treating the doping paste may be included.
  • the first amorphous semiconductor region 16 can be formed in the first amorphous semiconductor layer 17 with high pattern accuracy.
  • the dopant-containing film 26 can be formed on the first amorphous semiconductor layer 17 by inkjet, screen printing, or the like. According to the manufacturing method of the photoelectric conversion element 1 of this Embodiment, the photoelectric conversion element which has the improved characteristic and reliability can be manufactured at a cheap and simple process.
  • the photoelectric conversion element 1 of the present embodiment has a configuration similar to that of the photoelectric conversion element 1 of the first embodiment.
  • the manufacturing method of the photoelectric conversion element 1 of this Embodiment is fundamentally equipped with the process similar to the manufacturing method of the photoelectric conversion element 1 of Embodiment 1, it differs in the following points.
  • the second impurity is doped in part of the first amorphous semiconductor layer 17 by the ion implantation method.
  • doping the second impurity into a part of the first amorphous semiconductor layer 17 means that the first amorphous semiconductor layer 17 is doped.
  • transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 irradiates a part of the dopant-containing film 26 with the laser beam 27.
  • the second impurity may be doped into a part of the first amorphous semiconductor layer 17 by a laser doping method.
  • the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the dielectric layer 14 are formed on the first surface 11 a of the semiconductor substrate 11.
  • the second amorphous semiconductor layer 15 and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11.
  • a dopant-containing film 26 containing a second impurity having the second conductivity type is formed on the first amorphous semiconductor layer 17.
  • the dopant-containing film 26 may include phosphorus silicate glass (PSG), boron silicate glass (BSG), and polyboron film (PBF).
  • PSG phosphorus silicate glass
  • BSG boron silicate glass
  • PPF polyboron film
  • a part of the dopant-containing film 26 is irradiated with laser light 27 to transfer the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17.
  • a part of the dopant-containing film 26 is locally heated by irradiating a part of the dopant-containing film 26 with the laser light 27.
  • the first amorphous semiconductor layer 17 only the region corresponding to the portion irradiated with the laser light 27 is doped with the second impurity contained in the dopant-containing film 26.
  • the first amorphous semiconductor region 16 having the second conductivity type can be formed in the first amorphous semiconductor layer 17 having the first conductivity type.
  • a part of the dopant-containing film 26 and a part of the first amorphous semiconductor layer 17 are locally heated.
  • the second impurity in the first amorphous semiconductor region 16 can be activated.
  • the remaining dopant-containing film 26 is removed using a mixed solution of sulfuric acid and hydrogen peroxide solution, a mixed solution of hydrochloric acid and hydrogen peroxide solution, or hydrofluoric acid.
  • the first amorphous semiconductor layer 17 and The first amorphous semiconductor region 16 may be further annealed.
  • the first electrode 19 and the second electrode 18 are formed on the second surface 11 b of the semiconductor substrate 11.
  • the manufacturing method of the photoelectric conversion element 1 of the present embodiment has the same effect as the manufacturing method of the photoelectric conversion element 1 of the first embodiment, but differs in the following points.
  • shifting the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 is one of the dopant-containing films 26. Irradiation of the laser beam 27 to the part may be included. That is, the second impurity may be doped into a part of the first amorphous semiconductor layer 17 by a laser doping method.
  • the laser doping method can diffuse the dopant in a shorter time than the method of diffusing the dopant using a heating furnace. According to the manufacturing method of the photoelectric conversion element 1 of this Embodiment, the photoelectric conversion element which has the improved characteristic and reliability can be manufactured at a cheap and simple process.
  • the photoelectric conversion element 2 of Embodiment 4 is demonstrated.
  • the photoelectric conversion element 2 of the present embodiment is basically the same as the photoelectric conversion element 1 of the first embodiment, but differs in the following points.
  • the photoelectric conversion element 2 is provided in the second amorphous semiconductor layer 15 and further includes a second amorphous semiconductor region 46 having the second conductivity type.
  • the second amorphous semiconductor layer 15 and the second amorphous semiconductor region 46 are provided on the second surface 11 b of the semiconductor substrate 11.
  • the second amorphous semiconductor layer 15 and the second amorphous semiconductor region 46 constitute one layer extending continuously.
  • the second amorphous semiconductor region 46 includes a second impurity having the second conductivity type.
  • the second amorphous semiconductor region 46 is in contact with the first amorphous semiconductor region 16.
  • the second amorphous semiconductor region 46 may exist over the entire thickness of the second amorphous semiconductor layer 15.
  • the second amorphous semiconductor region 46 may or may not be in contact with the second surface 11b of the semiconductor substrate 11.
  • the second amorphous semiconductor region 46 may have substantially the same width as the first amorphous semiconductor region 16.
  • the second amorphous semiconductor region 46 has substantially the same width as the first amorphous semiconductor region 16 because the first amorphous semiconductor region 16 and the first amorphous semiconductor region 16
  • the difference between the width of the second amorphous semiconductor region 46 and the width of the first amorphous semiconductor region 16 in the direction in which the porous semiconductor layers 17 are alternately arranged is the first amorphous semiconductor layer 17 in this direction.
  • the width of the first amorphous semiconductor region 16 is such that the first direction of the region having the second impurity concentration of 80% or more of the average concentration of the second impurity in the first amorphous semiconductor region 16 is set. It is defined by the length in (for example, x direction).
  • the width of the second amorphous semiconductor region 46 is the first direction of the region having the second impurity concentration of 80% or more of the average concentration of the second impurity in the second amorphous semiconductor region 46. It is defined by the length in (for example, x direction).
  • the concentration of the second impurity in the second amorphous semiconductor region 46 is the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged, that is, the first May be constant in the direction (for example, the x direction).
  • the concentration of the second impurity in the second amorphous semiconductor region 46 is such that the first amorphous semiconductor region 16 and the first amorphous semiconductor layer 17 are alternately arranged.
  • the variation in the impurity concentration is within 30% of the average concentration of the second impurity in the second amorphous semiconductor region 46 in this direction.
  • the second amorphous semiconductor region 46 may have a second impurity concentration substantially the same as that of the first amorphous semiconductor region 16.
  • the second amorphous semiconductor region 46 has the second impurity concentration substantially the same as that of the first amorphous semiconductor region 16.
  • the difference between the average concentration of the second impurity and the average concentration of the second impurity in the first amorphous semiconductor region 16 is the average concentration of the second impurity in the first amorphous semiconductor region 16. It means within 30%.
  • a method for manufacturing the photoelectric conversion element 2 according to Embodiment 4 will be described with reference to FIGS.
  • the manufacturing method of the photoelectric conversion element 2 of the present embodiment is basically the same as the manufacturing method of the photoelectric conversion element 1 of the first embodiment, but differs in the following points.
  • the second amorphous semiconductor layer 15 is doped with the second impurity, and the second amorphous semiconductor layer 15 is filled with the second impurity.
  • An amorphous semiconductor region 46 may be further formed.
  • the second amorphous semiconductor region 46 includes a second impurity having the second conductivity type.
  • the second amorphous semiconductor region 46 is in contact with the first amorphous semiconductor region 16. Specifically, doping part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 with the second impurity may cause the first amorphous semiconductor layer 17 to be doped.
  • the second impurity may be ion-implanted into part of the first amorphous semiconductor layer 15 and part of the second amorphous semiconductor layer 15.
  • the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the dielectric layer 14 are formed on the first surface 11 a of the semiconductor substrate 11.
  • the second amorphous semiconductor layer 15 and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11.
  • the first amorphous semiconductor region 16 is formed in the first amorphous semiconductor layer 17 and the second amorphous semiconductor layer 15 has the second conductivity type.
  • the formation of the second amorphous semiconductor region 46 means that a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 have a second conductivity type. Doping with two impurities.
  • the first amorphous semiconductor region 16 is formed in the amorphous semiconductor layer 17, and the second amorphous semiconductor region 46 having the second conductivity type is formed in the second amorphous semiconductor layer 15. Is formed.
  • doping part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 with the second impurity may cause the first amorphous semiconductor layer 17 to be doped.
  • the first non-crystalline semiconductor layer 17 is irradiated.
  • a part of the crystalline semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 may be doped with the second impurity.
  • the second impurity is applied to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. Can be doped.
  • the second impurity When the second impurity is doped into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15, another part of the first amorphous semiconductor layer 17 is changed.
  • an opening corresponding to a part of the first amorphous semiconductor layer 17 is provided.
  • a mask 22 that covers other portions of one amorphous semiconductor layer 17 may be used.
  • the first amorphous semiconductor layer 17 includes a first impurity after the second amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 are doped with the second impurity.
  • the first amorphous semiconductor layer 17 and the first amorphous semiconductor layer 17 are activated.
  • the amorphous semiconductor region 16 and the second amorphous semiconductor region 46 may be annealed.
  • the first electrode 19 that is electrically connected to the first amorphous semiconductor layer 17 is formed on the second surface 11 b of the semiconductor substrate 11. Specifically, the first electrode 19 is formed on the first amorphous semiconductor layer 17.
  • a second electrode 18 that is electrically connected to the first amorphous semiconductor region 16 is formed on the second surface 11 b of the semiconductor substrate 11. Specifically, the second electrode 18 is formed on the first amorphous semiconductor region 16.
  • the photoelectric conversion element 2 and its manufacturing method of the present embodiment have the same effects as the photoelectric conversion element 1 of the first embodiment and its manufacturing method, but are different in the following points.
  • the photoelectric conversion element 2 may be provided in the second amorphous semiconductor layer 15 and further include a second amorphous semiconductor region 46 having the second conductivity type.
  • the second amorphous semiconductor region 46 may contain a second impurity having the second conductivity type.
  • the second amorphous semiconductor region 46 may be in contact with the first amorphous semiconductor region 16.
  • the semiconductor substrate 11 includes an amorphous semiconductor region having the second conductivity type, which includes the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46, and the semiconductor substrate 11. The distance can be reduced.
  • the second amorphous semiconductor region 46 and the second amorphous semiconductor region 46 have the second.
  • the carriers corresponding to the conductivity types of the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46 can be collected with higher efficiency. According to the photoelectric conversion element 2 of the present embodiment, the efficiency of converting light energy into electrical energy can be improved.
  • the second amorphous semiconductor layer 15 is doped with the second impurity, and the second amorphous semiconductor layer 15 is filled with the second impurity.
  • An amorphous semiconductor region 46 may be further formed.
  • the second amorphous semiconductor region 46 may contain a second impurity having the second conductivity type.
  • the second amorphous semiconductor region 46 may be in contact with the first amorphous semiconductor region 16.
  • the amorphous semiconductor region having the second conductivity type composed of the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46, and The distance from the semiconductor substrate 11 can be reduced.
  • the second amorphous semiconductor region 46 and the second amorphous semiconductor region 46 have the second.
  • the carriers corresponding to the conductivity types of the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46 can be collected with higher efficiency. According to the manufacturing method of the photoelectric conversion element 2 of the present embodiment, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
  • the second impurity is doped into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. Ion implantation of a second impurity into part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 may be included. In one step of irradiating the ion beam 21 of the second impurity, a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 are doped with the second impurity. obtain. According to the method for manufacturing the photoelectric conversion element 2 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
  • the photoelectric conversion element 2 of the present embodiment has the same configuration as the photoelectric conversion element 2 of the fourth embodiment.
  • the manufacturing method of the photoelectric conversion element 2 of the present embodiment basically includes the same steps as the manufacturing method of the photoelectric conversion element 2 of the fourth embodiment, but differs in the following points.
  • the second impurity is introduced into part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 by ion implantation. It was doped.
  • a part of the first amorphous semiconductor layer 17 and the first A part of the second amorphous semiconductor layer 15 is doped with the second impurity.
  • a dopant-containing film 26 containing a second impurity is formed on the first amorphous semiconductor layer 17. Then, the second impurity contained in the dopant-containing film 26 is transferred to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. More specifically, the formation of the dopant-containing film 26 containing the second impurity on the first amorphous semiconductor layer 17 means that the second amorphous semiconductor layer 17 is formed on the second amorphous semiconductor layer 17.
  • a doping paste containing impurities may be applied. Transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 means that the doping paste is heat-treated. May be included.
  • the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the dielectric layer 14 are formed on the first surface 11 a of the semiconductor substrate 11.
  • the second amorphous semiconductor layer 15 and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11.
  • a dopant-containing film 26 containing a second impurity having the second conductivity type is formed on part of the first amorphous semiconductor layer 17.
  • the dopant-containing film 26 may be a doping paste containing a second impurity having the second conductivity type.
  • the dopant-containing film 26 is heat-treated so that the second impurity contained in the dopant-containing film 26 is part of the first amorphous semiconductor layer 17 and the second amorphous semiconductor layer 15. To some of them.
  • a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 may be doped with the second impurity.
  • the photoelectric conversion element of the present embodiment except that the second impurity is transferred to a part of the second amorphous semiconductor layer 15 in addition to a part of the first amorphous semiconductor layer 17.
  • the manufacturing method 2 is the same as the manufacturing method of the photoelectric conversion element 1 of the second embodiment.
  • the manufacturing method of the photoelectric conversion element 2 of the present embodiment has the effect of the manufacturing method of the photoelectric conversion element 2 of the fourth embodiment and the effect of the manufacturing method of the photoelectric conversion element 1 of the second embodiment.
  • doping a second impurity into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 Forming a dopant-containing film 26 containing a second impurity on the first amorphous semiconductor layer 17, and applying the second impurity contained in the dopant-containing film 26 to one of the first amorphous semiconductor layer 17 And transition to a part of the second amorphous semiconductor layer 15.
  • a part of the crystalline semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 may be doped with the second impurity.
  • the formation of the dopant-containing film 26 containing the second impurity on the first amorphous semiconductor layer 17 is the first amorphous semiconductor layer 17.
  • a doping paste containing the second impurity may be applied on a part of the substrate. Transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 means that the doping paste is heat-treated. May be included.
  • a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 are doped with the second impurity. obtain.
  • a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
  • the photoelectric conversion element 2 of the present embodiment has the same configuration as the photoelectric conversion element 2 of the fourth embodiment.
  • the manufacturing method of the photoelectric conversion element 2 of the present embodiment basically includes the same steps as the manufacturing method of the photoelectric conversion element 2 of the fourth embodiment, but differs in the following points.
  • the second impurity is introduced into part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 by ion implantation. It was doped.
  • one of the first amorphous semiconductor layers 17 is formed by laser doping.
  • the second impurity is doped into the portion and part of the second amorphous semiconductor layer 15.
  • a dopant-containing film 26 containing a second impurity is formed on the first amorphous semiconductor layer 17. Then, by irradiating a part of the dopant-containing film 26 with the laser beam 27, a second impurity is introduced into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. It may be doped.
  • the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the dielectric layer 14 are formed on the first surface 11 a of the semiconductor substrate 11.
  • the second amorphous semiconductor layer 15 and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11.
  • a dopant-containing film 26 containing a second impurity having the second conductivity type is formed on the first amorphous semiconductor layer 17.
  • the dopant-containing film 26 may be a doping paste containing a second impurity having the second conductivity type.
  • a part of the dopant-containing film 26 is irradiated with a laser beam 27, and the second impurity contained in the dopant-containing film 26 is changed into a part of the first amorphous semiconductor layer 17 and the second impurity.
  • a second impurity is added to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. Can be doped.
  • the manufacturing method 2 is the same as the manufacturing method of the photoelectric conversion element 1 of the third embodiment.
  • the manufacturing method of the photoelectric conversion element 2 of the present embodiment has the effect of the manufacturing method of the photoelectric conversion element 2 of the fourth embodiment and the effect of the manufacturing method of the photoelectric conversion element 1 of the third embodiment.
  • the second impurity contained in the dopant-containing film 26 is part of the first amorphous semiconductor layer 17 and the second amorphous semiconductor layer 15.
  • the transition to the portion may include irradiating a part of the dopant-containing film 26 with the laser beam 27.
  • a second impurity is added to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. Can be doped. According to the method for manufacturing the photoelectric conversion element 2 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
  • Embodiment 7 With reference to FIG. 18, the photoelectric conversion element 3 of Embodiment 7 is demonstrated. Although the photoelectric conversion element 3 of this Embodiment is equipped with the structure similar to the photoelectric conversion element 1 of Embodiment 1, it differs in the following points.
  • the photoelectric conversion element 3 of the present embodiment does not include the second amorphous semiconductor layer 15.
  • the first amorphous semiconductor layer 17 is provided on the second surface 11 b of the semiconductor substrate 11 and is in direct contact with the second surface 11 b of the semiconductor substrate 11.
  • the first amorphous semiconductor region 16 may be in direct contact with the second surface 11 b of the semiconductor substrate 11.
  • the first amorphous semiconductor region 16 may exist over the entire thickness of the first amorphous semiconductor layer 17.
  • the first amorphous semiconductor region 16 may or may not be in contact with the second surface 11b of the semiconductor substrate 11.
  • the manufacturing method of the photoelectric conversion element 3 of the present embodiment is the same as the manufacturing method of the photoelectric conversion element 1 of Embodiments 1 to 3, except that the second amorphous semiconductor layer 15 is formed. It is the same. Specifically, in the method of manufacturing the photoelectric conversion element 3 according to the present embodiment, forming the first amorphous semiconductor layer 17 on the second surface 11 b of the semiconductor substrate 11 Forming the first amorphous semiconductor layer 17 in direct contact with the second surface 11b.
  • the photoelectric conversion element 3 and the manufacturing method thereof according to the present embodiment have the same effects as the photoelectric conversion element 1 and the manufacturing method thereof according to the first to third embodiments, but are different in the following points.
  • the first amorphous semiconductor layer 17 may be in direct contact with the second surface 11b of the semiconductor substrate 11. Since the first amorphous semiconductor layer 17 is in direct contact with the second surface 11b of the semiconductor substrate 11, the distance between the first amorphous semiconductor layer 17 and the semiconductor substrate 11, and the first amorphous semiconductor The distance between the first amorphous semiconductor region 16 provided in the layer 17 and the semiconductor substrate 11 can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the first conductivity type of the first amorphous semiconductor layer 17 are first One amorphous semiconductor layer 17 can be collected with higher efficiency.
  • carriers corresponding to the second conductivity type of the first amorphous semiconductor region 16 are the first.
  • a single amorphous semiconductor region 16 can be collected with higher efficiency. According to the photoelectric conversion element 3 of the present embodiment, the efficiency of converting light energy into electric energy can be improved.
  • the formation of the first amorphous semiconductor layer 17 on the second surface 11 b of the semiconductor substrate 11 means that the second surface 11 b of the semiconductor substrate 11 is formed. It may also include forming the first amorphous semiconductor layer 17 in direct contact. Since the first amorphous semiconductor layer 17 is in direct contact with the second surface 11b of the semiconductor substrate 11, the distance between the first amorphous semiconductor layer 17 and the semiconductor substrate 11, and the first amorphous semiconductor The distance between the first amorphous semiconductor region 16 provided in the layer 17 and the semiconductor substrate 11 can be reduced.
  • amorphous semiconductor layer 17 can be collected with higher efficiency.
  • carriers corresponding to the second conductivity type of the first amorphous semiconductor region 16 are the first.
  • a single amorphous semiconductor region 16 can be collected with higher efficiency. According to the manufacturing method of the photoelectric conversion element 3 of the present embodiment, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
  • the photoelectric conversion element 5 which concerns on Embodiment 8 is demonstrated.
  • the photoelectric conversion element 5 of the present embodiment includes a semiconductor substrate 11, a tunnel dielectric layer 20, a first amorphous semiconductor layer 17, a first amorphous semiconductor region 16, and a first electrode 19. And the second electrode 18 are mainly provided.
  • the semiconductor substrate 11 may be an n-type or p-type semiconductor substrate.
  • an n-type single crystal silicon substrate is used as the semiconductor substrate 11.
  • the semiconductor substrate 11 includes a first surface 11a, a second surface 11b opposite to the first surface 11a, a first side surface 11c connecting the first surface 11a and the second surface 11b, The first surface 11a and the second surface 11b are connected to each other, and the second side surface 11d is located opposite to the first side surface 11c.
  • the first surface 11a of the semiconductor substrate 11 may be a light incident surface.
  • the first surface 11a and the second surface 11b of the semiconductor substrate 11 have a first direction (for example, x direction) and a second direction (for example, y direction) that intersects the first direction (for example, x direction).
  • the thickness direction of the semiconductor substrate 11 is a third direction (for example, z direction) that intersects the first direction (for example, x direction) and the second direction (for example, y direction).
  • the tunnel dielectric layer 20 is provided on at least the second surface 11 b of the semiconductor substrate 11. Specifically, the tunnel dielectric layer 20 may contact the second surface 11 b of the semiconductor substrate 11.
  • the tunnel dielectric layer 20 is a dielectric layer having passivation characteristics such as a silicon oxide layer.
  • the tunnel dielectric layer 20 suppresses recombination of carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 on the second surface 11 b of the semiconductor substrate 11. Can do.
  • the tunnel dielectric layer 20 can improve the passivation characteristics of the photoelectric conversion element 5.
  • the tunnel dielectric layer 20 uses carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 as the first amorphous semiconductor layer 17 and the first amorphous semiconductor. Tunnel to region 16. Therefore, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 can be efficiently collected.
  • the tunnel dielectric layer 20 may have a thickness of 0.2 nm to 5.0 nm, preferably 0.5 nm to 3.0 nm.
  • the thickness of the tunnel dielectric layer 20 may be the length of the tunnel dielectric layer 20 in the third direction (eg, the z direction).
  • the tunnel dielectric layer 20 having a thickness of 0.2 nm or more, preferably 0.5 nm or more can further improve the passivation characteristics of the photoelectric conversion element 5.
  • the tunnel dielectric layer 20 having a thickness of 5.0 nm or less, preferably 3.0 nm or less, generates carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11.
  • the tunnel can be more efficiently tunneled to the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16. Carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 can be collected more efficiently.
  • the tunnel dielectric layer 20 may be further provided on the first surface 11 a of the semiconductor substrate 11. Therefore, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 can be suppressed from recombining on the first surface 11 a of the semiconductor substrate 11.
  • the tunnel dielectric layer 20 may be further provided on the first side surface 11 c and the second side surface 11 d of the semiconductor substrate 11. Therefore, it is suppressed that the carriers generated in the semiconductor substrate 11 by the light incident from the first surface 11a side of the semiconductor substrate 11 are recombined on the first side surface 11c and the second side surface 11d of the semiconductor substrate 11. Can be done.
  • the photoelectric conversion element 5 of the present embodiment may include a second amorphous semiconductor layer 15 having i-type on the tunnel dielectric layer 20.
  • a layer 15 may be provided.
  • the second amorphous semiconductor layer 15 may be in contact with the tunnel dielectric layer 20.
  • an i-type amorphous silicon film is used as the second amorphous semiconductor layer 15.
  • the second amorphous semiconductor layer 15 having i-type carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the second surface 11 b of the semiconductor substrate 11. Recombination can be suppressed.
  • the i-type second amorphous semiconductor layer 15 can improve the passivation characteristics of the photoelectric conversion element 5.
  • the photoelectric conversion element 5 of the present embodiment includes the first amorphous semiconductor layer 17 having the first conductivity type on the tunnel dielectric layer 20.
  • the first amorphous semiconductor layer 17 having the first conductivity type may be provided on the surface of the second amorphous semiconductor layer 15 opposite to the tunnel dielectric layer 20.
  • the first amorphous semiconductor layer 17 includes a first impurity having the first conductivity type.
  • the first amorphous semiconductor layer 17 may be a p-type or n-type amorphous semiconductor layer.
  • the first impurity may be a p-type impurity such as boron or an n-type impurity such as phosphorus.
  • the first impurity is a p-type impurity such as boron
  • the first amorphous semiconductor layer 17 is a p-type amorphous silicon film.
  • the photoelectric conversion element 5 of the present embodiment is provided in the first amorphous semiconductor layer 17 and includes a first amorphous semiconductor region 16 having a second conductivity type different from the first conductivity type. Prepare.
  • the photoelectric conversion element 5 of the present embodiment is provided on the tunnel dielectric layer 20 and includes a first amorphous semiconductor region 16 having a second conductivity type different from the first conductivity type.
  • the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 constitute one layer that extends continuously.
  • the surfaces of the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 on the side opposite to the semiconductor substrate 11 may constitute one surface extending continuously.
  • the first amorphous semiconductor region 16 includes a first impurity having a first conductivity type and a second impurity having a second conductivity type different from the first conductivity type.
  • the first amorphous semiconductor region 16 contains the second impurity having the second conductivity type more than the first impurity having the first conductivity type. Region 16 as a whole has the second conductivity type.
  • the first amorphous semiconductor region 16 may be an n-type or p-type amorphous semiconductor region.
  • the second impurity may be an n-type impurity such as phosphorus or a p-type impurity such as boron.
  • the second impurity is an n-type impurity such as phosphorus
  • the first amorphous semiconductor region 16 is an n-type amorphous silicon region.
  • the first amorphous semiconductor region 16 may be provided in a stripe shape extending in the second direction (for example, the y direction).
  • the concentration of the first impurity in the first amorphous semiconductor region 16 is the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged, that is, the first May be constant in the direction (for example, the x direction).
  • the concentration of the first impurity in the first amorphous semiconductor region 16 may be substantially the same as the concentration of the first impurity in the first amorphous semiconductor layer 17.
  • the concentration of the second impurity in the first amorphous semiconductor region 16 is the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged, that is, the first May be constant in the direction (for example, the x direction).
  • the photoelectric conversion element 5 of the present embodiment includes a first electrode 19 that is electrically connected to the first amorphous semiconductor layer 17.
  • the first electrode 19 may be provided on the second surface 11 b of the semiconductor substrate 11. More specifically, the first electrode 19 may be provided on the first amorphous semiconductor layer 17.
  • the first electrode 19 may be provided in a stripe shape extending in the second direction (for example, the y direction).
  • a metal electrode may be exemplified as the first electrode 19.
  • silver (Ag) is used as the first electrode 19.
  • the first electrode 19 may be a p-type electrode.
  • the photoelectric conversion element 5 of this embodiment includes a second electrode 18 that is electrically connected to the first amorphous semiconductor region 16.
  • the second electrode 18 may be provided on the second surface 11 b of the semiconductor substrate 11. More specifically, the second electrode 18 may be provided on the first amorphous semiconductor region 16.
  • the second electrode 18 may be provided in a stripe shape extending in the second direction (for example, the y direction).
  • a metal electrode may be exemplified as the second electrode 18.
  • silver (Ag) is used as the second electrode 18.
  • the second electrode 18 may be an n-type electrode.
  • the semiconductor substrate 11 and the first amorphous semiconductor layer 17 are heterojunctioned via the second amorphous semiconductor layer 15 and the tunnel dielectric layer 20, and the semiconductor The substrate 11 and the first amorphous semiconductor region 16 are heterojunctioned via the second amorphous semiconductor layer 15 and the tunnel dielectric layer 20. Therefore, the photoelectric conversion element 5 having improved passivation characteristics and a high open circuit voltage V OC can be obtained. In the photoelectric conversion element 5, the efficiency of converting light energy into electrical energy can be improved.
  • the first surface 11a of the semiconductor substrate 11 may include an uneven structure. Light enters the photoelectric conversion element 5 from the first surface 11a side.
  • the concavo-convex structure on the first surface 11a of the semiconductor substrate 11 that is the light incident surface reflection of incident light on the first surface 11a of the semiconductor substrate 11 can be suppressed, and more Light can enter the photoelectric conversion element 5.
  • the efficiency of converting light energy into electrical energy in the photoelectric conversion element 5 can be improved.
  • the photoelectric conversion element 5 of the present embodiment may include an i-type third amorphous semiconductor layer 12 on the first surface 11 a of the semiconductor substrate 11.
  • an i-type third amorphous semiconductor layer 12 on the first surface 11 a of the semiconductor substrate 11.
  • the photoelectric conversion element 5 of the present embodiment may include a fourth amorphous semiconductor layer 13 having the same conductivity type as the semiconductor substrate 11 on the first surface 11a of the semiconductor substrate 11.
  • a fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 may be provided on the third amorphous semiconductor layer 12 having i type.
  • the fourth amorphous semiconductor layer 13 can be an n-type or p-type amorphous semiconductor layer.
  • an n-type amorphous silicon film is used as the fourth amorphous semiconductor layer 13.
  • the fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 may function as a surface electric field layer.
  • the fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 generates an electric field in the vicinity of the first surface 11a of the semiconductor substrate 11, and an energy band is generated in the vicinity of the first surface 11a of the semiconductor substrate 11. Curve. Carriers approaching the first surface 11 a of the semiconductor substrate 11 are pushed back into the semiconductor substrate 11 by the electric field and the curvature of the energy band. In the first surface 11a of the semiconductor substrate 11, recombination of carriers can be suppressed.
  • a dielectric layer 14 may be provided on the first surface 11 a of the semiconductor substrate 11.
  • the dielectric layer 14 may be composed of a single layer or a plurality of layers. Examples of the material of the dielectric layer 14 include silicon nitride (SiN x ) and silicon oxide (SiO x ).
  • the dielectric layer 14 may function as an antireflection film.
  • the dielectric layer 14 may function as a passivation film.
  • a semiconductor substrate 11 having a first surface 11a and a second surface 11b opposite to the first surface 11a is prepared.
  • an uneven structure may be formed on first surface 11 a of semiconductor substrate 11.
  • the first surface 11a of the semiconductor substrate 11 which is an n-type single crystal silicon substrate is anisotropically etched using potassium hydroxide (KOH), whereby the first surface 11a of the semiconductor substrate 11 is uneven.
  • KOH potassium hydroxide
  • tunnel dielectric layer 20 is formed on second surface 11 b of semiconductor substrate 11.
  • the tunnel dielectric layer 20 may be further formed on the first surface 11 a of the semiconductor substrate 11.
  • the tunnel dielectric layer 20 may be further formed on the first side surface 11 c and the second side surface 11 d of the semiconductor substrate 11.
  • tunnel dielectric layer 20 is formed on the entire surface of semiconductor substrate 11.
  • the tunnel dielectric layer 20 may be formed on at least the second surface 11b of the semiconductor substrate 11 by immersing at least the second surface 11b of the semiconductor substrate 11 in ozone water or hydrogen peroxide solution.
  • the tunnel dielectric layer 20 may be formed on at least the second surface 11 b of the semiconductor substrate 11 by thermally oxidizing at least the second surface 11 b of the semiconductor substrate 11.
  • the tunnel dielectric layer 20 may be formed on at least the second surface 11 b of the semiconductor substrate 11 by depositing the tunnel dielectric layer 20 on at least the second surface 11 b of the semiconductor substrate 11.
  • i-type third amorphous semiconductor layer 12 may be formed on first surface 11 a of semiconductor substrate 11.
  • a fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 may be formed on the first surface 11 a of the semiconductor substrate 11.
  • a fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 may be formed on the i-type third amorphous semiconductor layer 12.
  • a method for forming the third amorphous semiconductor layer 12 and the fourth amorphous semiconductor layer 13 is not particularly limited, and may be, for example, a plasma chemical vapor deposition (CVD) method.
  • CVD plasma chemical vapor deposition
  • dielectric layer 14 may be formed on first surface 11a of semiconductor substrate 11. Specifically, the dielectric layer 14 may be formed on the fourth amorphous semiconductor layer 13 having the same conductivity type as the semiconductor substrate 11.
  • the formation method of the dielectric layer 14 is not particularly limited, but may be, for example, a plasma chemical vapor deposition (CVD) method.
  • second amorphous semiconductor layer 15 having i-type may be formed on tunnel dielectric layer 20.
  • first amorphous semiconductor layer 17 having the first conductivity type is formed on tunnel dielectric layer 20.
  • the first amorphous semiconductor layer 17 having the first conductivity type is formed on the second amorphous semiconductor layer 15 having the i type.
  • the first amorphous semiconductor layer 17 includes a first impurity having the first conductivity type.
  • a method for forming the second amorphous semiconductor layer 15 and the first amorphous semiconductor layer 17 is not particularly limited, and may be, for example, a plasma chemical vapor deposition (CVD) method.
  • CVD plasma chemical vapor deposition
  • the first amorphous semiconductor region 16 having the second conductivity type is formed in the first amorphous semiconductor layer 17.
  • the formation of the first amorphous semiconductor region 16 in the first amorphous semiconductor layer 17 means that a second portion different from the first conductivity type is formed in a part of the first amorphous semiconductor layer 17. Doping with a second impurity having a conductivity type.
  • the first amorphous semiconductor region 16 includes a first impurity having a first conductivity type and a second impurity having a second conductivity type different from the first conductivity type.
  • the first amorphous semiconductor region 16 contains the second impurity having the second conductivity type more than the first impurity having the first conductivity type. Region 16 as a whole has the second conductivity type.
  • the concentration of the first impurity in the first amorphous semiconductor region 16 is constant in the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged. Also good.
  • the concentration of the first impurity in the first amorphous semiconductor region 16 may be substantially the same as the concentration of the first impurity in the first amorphous semiconductor layer 17.
  • the first amorphous semiconductor region 16 may exist over the entire thickness of the first amorphous semiconductor layer 17.
  • Doping the second impurity in part of the first amorphous semiconductor layer 17 may include ion implantation of the second impurity in part of the first amorphous semiconductor layer 17. That is, the second impurity may be doped into part of the first amorphous semiconductor layer 17 by ion implantation. Specifically, by irradiating a part of the first amorphous semiconductor layer 17 with the ion beam 21 of the second impurity, the second impurity is applied to a part of the first amorphous semiconductor layer 17. It may be doped. Thus, the first amorphous semiconductor region 16 having the second conductivity type may be formed in the first amorphous semiconductor layer 17.
  • a mask 22 having an opening corresponding to a part of the first amorphous semiconductor layer 17 and covering the other part of the first amorphous semiconductor layer 17 may be used.
  • the first impurity contained in the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 are added to the first amorphous semiconductor layer 17.
  • the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 may be annealed.
  • a first electrode 19 that is electrically connected to the first amorphous semiconductor layer 17 is formed on the second surface 11 b of the semiconductor substrate 11. Specifically, the first electrode 19 is formed on the first amorphous semiconductor layer 17.
  • a second electrode 18 that is electrically connected to the first amorphous semiconductor region 16 is formed on the second surface 11 b of the semiconductor substrate 11. Specifically, the second electrode 18 is formed on the first amorphous semiconductor region 16. In this way, the photoelectric conversion element 5 of the present embodiment shown in FIGS. 19 and 20 can be manufactured.
  • the photoelectric conversion element 5 of this Embodiment includes a semiconductor substrate 11 having a first surface 11a and a second surface 11b opposite to the first surface 11a, and a tunnel provided on the second surface 11b.
  • a dielectric layer 20 is provided on the tunnel dielectric layer 20, and is provided on the first amorphous semiconductor layer 17 having the first conductivity type, the tunnel dielectric layer 20, and the first conductive layer.
  • the first amorphous semiconductor layer 17 includes a first impurity having the first conductivity type.
  • the first amorphous semiconductor region 16 includes a first impurity and a second impurity having a second conductivity type.
  • the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 constitute one layer that extends continuously.
  • the tunnel dielectric layer 20 suppresses recombination of carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 on the second surface 11 b of the semiconductor substrate 11. Can do.
  • the photoelectric conversion element 5 of the present embodiment has improved passivation characteristics.
  • the tunnel dielectric layer 20 uses carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 as the first amorphous semiconductor layer 17 and the first amorphous semiconductor. Tunnel to region 16. According to the photoelectric conversion element 5 of the present embodiment, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 can be efficiently collected.
  • the second of the semiconductor substrate 11 is formed. It has a structure that can be manufactured without exposing the surface 11b. A structure that can be manufactured without contamination of the second surface 11b of the semiconductor substrate 11 or roughening of the second surface 11b of the semiconductor substrate 11 due to etching of the amorphous semiconductor layer is described in this embodiment.
  • the photoelectric conversion element 5 is provided.
  • the photoelectric conversion element 5 of the present embodiment has improved characteristics and reliability.
  • the first amorphous semiconductor region 16 may exist over the entire thickness of the first amorphous semiconductor layer 17. The distance between the first amorphous semiconductor region 16 and the semiconductor substrate 11 can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the second conductivity type of the first amorphous semiconductor region 16 are the first. A single amorphous semiconductor region 16 can be collected with higher efficiency. According to the photoelectric conversion element 5 of the present embodiment, the efficiency of converting light energy into electric energy can be improved.
  • the concentration of the first impurity in the first amorphous semiconductor region 16 is such that the first amorphous semiconductor region 16 and the first amorphous semiconductor layer 17 are the same. It may be constant in the alternately arranged directions.
  • the photoelectric conversion element 5 of the present embodiment has improved characteristics and reliability.
  • an i-type second amorphous semiconductor layer 15 may be further provided between the first amorphous semiconductor layer 17 and the tunnel dielectric layer 20 and between the first amorphous semiconductor region 16 and the tunnel dielectric layer 20, An i-type second amorphous semiconductor layer 15 may be further provided.
  • the second amorphous semiconductor layer 15 having i-type carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the second surface 11 b of the semiconductor substrate 11. Recombination can be suppressed.
  • the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
  • the tunnel dielectric layer 20 may have a thickness of 0.2 nm to 5.0 nm.
  • the tunnel dielectric layer 20 having a thickness of 0.2 nm or more can further improve the passivation characteristics of the photoelectric conversion element 5.
  • the tunnel dielectric layer 20 having a thickness of 5.0 nm or less is configured to cause carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 to be generated in the first amorphous semiconductor layer. 17 and the first amorphous semiconductor region 16 can be more efficiently tunneled.
  • carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 can be collected more efficiently.
  • the photoelectric conversion element 5 is provided on the second surface 11b of the semiconductor substrate 11, and the first electrode 19 electrically connected to the first amorphous semiconductor layer 17 and the semiconductor A second electrode 18 that is provided on the second surface 11 b of the substrate 11 and electrically connected to the first amorphous semiconductor region 16 may be further provided.
  • the first electrode 19 and the second electrode 18 are not provided on the first surface 11a side of the semiconductor substrate 11 which is a light incident surface. Light incident on the photoelectric conversion element 5 is not blocked by the first electrode 19 and the second electrode 18. According to the photoelectric conversion element 5 of the present embodiment, a high short-circuit current J SC can be obtained, and the efficiency of converting light energy into electrical energy can be improved.
  • the photoelectric conversion element 5 of the present embodiment may further include a dielectric layer 14 on the first surface 11a of the semiconductor substrate 11.
  • the dielectric layer 14 functions as an antireflection film
  • the dielectric layer 14 can cause more light to enter the photoelectric conversion element 5.
  • the efficiency of converting light energy into electric energy can be improved.
  • the dielectric layer 14 functions as a passivation film
  • the carrier generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 is the first dielectric layer 14 of the semiconductor substrate 11. It is possible to suppress recombination on the surface 11a.
  • the efficiency of converting light energy into electric energy can be improved.
  • the photoelectric conversion element 5 may further include an i-type third amorphous semiconductor layer 12 on the first surface 11 a of the semiconductor substrate 11.
  • the third amorphous semiconductor layer 12 having i-type carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the first surface 11 a of the semiconductor substrate 11. Recombination can be suppressed.
  • the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
  • the photoelectric conversion element 5 of the present embodiment may further include a fourth amorphous semiconductor layer 13 having the same conductivity type as the semiconductor substrate 11 on the first surface 11 a of the semiconductor substrate 11.
  • the fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 has the first surface 11 a of the semiconductor substrate 11 among the carriers generated in the semiconductor substrate 11 when light enters the photoelectric conversion element 5.
  • the carrier approaching can be pushed back into the semiconductor substrate 11.
  • the fourth amorphous semiconductor layer 13 can suppress recombination of this carrier on the first surface 11 a of the semiconductor substrate 11. According to the photoelectric conversion element 5 of the present embodiment, the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
  • the first surface 11a of the semiconductor substrate 11 may include an uneven structure.
  • the efficiency of converting light energy into electric energy can be improved.
  • the tunnel dielectric is formed on the second surface 11b of the semiconductor substrate 11 having the first surface 11a and the second surface 11b opposite to the first surface 11a.
  • the first amorphous semiconductor layer 17 includes a first impurity having the first conductivity type.
  • the method for manufacturing the photoelectric conversion element 5 according to the present embodiment further includes forming the first amorphous semiconductor region 16 having the second conductivity type in the first amorphous semiconductor layer 17.
  • the formation of the first amorphous semiconductor region 16 in the first amorphous semiconductor layer 17 means that a second portion different from the first conductivity type is formed in a part of the first amorphous semiconductor layer 17. Doping with a second impurity having a conductivity type.
  • the tunnel dielectric layer 20 suppresses recombination of carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 on the second surface 11 b of the semiconductor substrate 11. Can do. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element having improved passivation characteristics can be manufactured.
  • the tunnel dielectric layer 20 uses carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 as the first amorphous semiconductor layer 17 and the first amorphous semiconductor. Tunnel to region 16. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric that can efficiently collect carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11. A conversion element can be manufactured.
  • the second surface 11b of the semiconductor substrate 11 is covered with the tunnel dielectric layer 20 before the first amorphous semiconductor layer 17 is formed. .
  • the photoelectric conversion element is exposed without exposing the second surface 11b of the semiconductor substrate 11. 5 can be manufactured.
  • the photoelectric conversion element 5 can be manufactured without the contaminants adhering to the second surface 11b of the semiconductor substrate 11 or the second surface 11b of the semiconductor substrate 11 being roughened by etching the amorphous semiconductor layer. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
  • the first amorphous semiconductor region 16 may exist over the entire thickness of the first amorphous semiconductor layer 17. The distance between the first amorphous semiconductor region 16 and the semiconductor substrate 11 can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the second conductivity type of the first amorphous semiconductor region 16 are the first. A single amorphous semiconductor region 16 can be collected with higher efficiency. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element with improved efficiency for converting light energy into electric energy can be manufactured.
  • the concentration of the first impurity in the first amorphous semiconductor region 16 is the same as that of the first amorphous semiconductor region 16 and the first amorphous semiconductor layer. It may be constant in a direction in which 17 and 17 are alternately arranged. Therefore, after the tunnel dielectric layer 20 and the first amorphous semiconductor layer 17 are formed on the second surface 11b of the semiconductor substrate 11, the photoelectric conversion is performed without exposing the second surface 11b of the semiconductor substrate 11.
  • the conversion element 5 can be manufactured. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
  • a second i-type is formed on the tunnel dielectric layer 20 before forming the first amorphous semiconductor layer 17 on the tunnel dielectric layer 20.
  • the amorphous semiconductor layer 15 may be further formed.
  • carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the second surface 11 b of the semiconductor substrate 11. Recombination can be suppressed.
  • a photoelectric conversion element with improved passivation characteristics and efficiency of converting light energy into electric energy can be manufactured.
  • doping a second impurity into a part of the first amorphous semiconductor layer 17 causes a part of the first amorphous semiconductor layer 17 to be doped. Ion implantation of the second impurity may be included. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
  • forming the tunnel dielectric layer 20 on the second surface 11b of the semiconductor substrate 11 means that the second surface 11b of the semiconductor substrate 11 is made of ozone water or excess water. It may include soaking in hydrogen oxide water.
  • the tunnel dielectric layer 20 is quickly formed by a simple process of immersing the second surface 11b of the semiconductor substrate 11 in ozone water or hydrogen peroxide water. Can be done.
  • the tunnel dielectric layer 20 can be formed by a simple process of thermally oxidizing the second surface 11b of the semiconductor substrate 11.
  • forming the tunnel dielectric layer 20 on the second surface 11b of the semiconductor substrate 11 means that the tunnel dielectric is formed on the second surface 11b of the semiconductor substrate 11.
  • Depositing layer 20 may also be included.
  • the tunnel dielectric layer 20 can be formed by a simple process of depositing the tunnel dielectric layer 20 on the second surface 11 b of the semiconductor substrate 11. .
  • the tunnel dielectric layer 20 may have a thickness of 0.2 nm or more and 5.0 nm or less.
  • the tunnel dielectric layer 20 having a thickness of 0.2 nm or more can further improve the passivation characteristics of the photoelectric conversion element 5.
  • the tunnel dielectric layer 20 having a thickness of 5.0 nm or less is configured to cause carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 to be generated in the first amorphous semiconductor layer. 17 and the first amorphous semiconductor region 16 can be more efficiently tunneled.
  • carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 can be collected more efficiently.
  • a photoelectric conversion element can be manufactured.
  • the first electrode 19 that is electrically connected to the first amorphous semiconductor layer 17 is formed on the second surface 11 b of the semiconductor substrate 11. And forming a second electrode 18 electrically connected to the first amorphous semiconductor region 16 on the second surface 11 b of the semiconductor substrate 11.
  • the first electrode 19 and the second electrode 18 are photoelectric elements that are not provided on the first surface 11a side of the semiconductor substrate 11 that is the light incident surface.
  • the conversion element 5 can be manufactured. Light incident on the photoelectric conversion element 5 is not blocked by the first electrode 19 and the second electrode 18. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, it is possible to manufacture a photoelectric conversion element having a high short-circuit current J SC and an improved efficiency for converting light energy into electric energy.
  • the method for manufacturing the photoelectric conversion element 5 of the present embodiment may further include forming the dielectric layer 14 on the first surface 11 a of the semiconductor substrate 11.
  • the dielectric layer 14 functions as an antireflection film, the dielectric layer 14 can cause more light to enter the photoelectric conversion element 5.
  • a photoelectric conversion element with improved efficiency for converting light energy into electric energy can be manufactured.
  • the dielectric layer 14 functions as a passivation film, the carrier generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 is the first dielectric layer 14 of the semiconductor substrate 11. It is possible to suppress recombination on the surface 11a.
  • a photoelectric conversion element with improved efficiency for converting light energy into electric energy can be manufactured.
  • the method for manufacturing the photoelectric conversion element 5 of the present embodiment may further include forming the third amorphous semiconductor layer 12 having i-type on the first surface 11 a of the semiconductor substrate 11.
  • the third amorphous semiconductor layer 12 having i-type carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the first surface 11 a of the semiconductor substrate 11. Recombination can be suppressed.
  • a photoelectric conversion element with improved passivation characteristics and efficiency of converting light energy into electric energy can be manufactured.
  • the method for manufacturing the photoelectric conversion element 5 according to the present embodiment further includes forming the fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 on the first surface 11 a of the semiconductor substrate 11. You may prepare.
  • the fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 has the first surface 11 a of the semiconductor substrate 11 among the carriers generated in the semiconductor substrate 11 when light enters the photoelectric conversion element 5.
  • the carrier approaching can be pushed back into the semiconductor substrate 11.
  • the fourth amorphous semiconductor layer 13 can suppress recombination of this carrier on the first surface 11 a of the semiconductor substrate 11. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element with improved passivation characteristics and efficiency of converting light energy into electric energy can be manufactured.
  • the method for manufacturing the photoelectric conversion element 5 according to the present embodiment may further include forming a concavo-convex structure on the first surface 11 a of the semiconductor substrate 11. By forming a concavo-convex structure on the first surface 11 a of the semiconductor substrate 11 that is a light incident surface, more light can be incident into the photoelectric conversion element 5. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element with improved efficiency for converting light energy into electric energy can be manufactured.
  • the photoelectric conversion element 5 of the present embodiment has a configuration similar to that of the photoelectric conversion element 5 of the eighth embodiment.
  • the manufacturing method of the photoelectric conversion element 5 of the present embodiment basically includes the same steps as the manufacturing method of the photoelectric conversion element 5 of the eighth embodiment, but differs in the following points.
  • the second impurity is doped in part of the first amorphous semiconductor layer 17 by the ion implantation method.
  • doping the second impurity into a part of the first amorphous semiconductor layer 17 means that the first amorphous semiconductor layer 17 is not doped.
  • the formation of the dopant-containing film 26 containing the second impurity on the first amorphous semiconductor layer 17 means that the second impurity is formed on a part of the first amorphous semiconductor layer 17. It is also possible to apply a doping paste containing Transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 may include heat-treating the doping paste.
  • the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the first surface 11 a of the semiconductor substrate 11 are formed.
  • a dielectric layer 14 is formed, and a tunnel dielectric layer 20, a second amorphous semiconductor layer 15, and a first non-conductive first layer are formed on the second surface 11b of the semiconductor substrate 11.
  • a crystalline semiconductor layer 17 is formed.
  • a dopant-containing film 26 containing a second impurity having the second conductivity type is formed on a part of the first amorphous semiconductor layer 17.
  • the dopant-containing film 26 include a doping paste containing a second impurity having n type such as phosphorus and a doping paste containing a second impurity having p type such as boron.
  • the doping paste including the second impurity having n-type may include a phosphorus compound, a silicon oxide precursor, a solvent, and a thickener.
  • the doping paste containing the second impurity having p-type may include a boron compound, a silicon oxide precursor, a solvent, and a thickener.
  • a doping paste containing an n-type second impurity such as phosphorus may be used as the dopant-containing film 26 as the dopant-containing film 26, a doping paste containing an n-type second impurity such as phosphorus may be used as the dopant-containing film 26, a doping paste containing an n-type second impurity such as phosphorus may be used as the dopant-containing film 26 .
  • the doping paste may be applied on a part of the first amorphous semiconductor layer 17 by inkjet, screen printing, or the like.
  • the dopant-containing film 26 is heat-treated, and the second impurity contained in the dopant-containing film 26 is transferred to a part of the first amorphous semiconductor layer 17.
  • the dopant-containing film 26 that is a doping paste is heat-treated at a temperature of 700 ° C. or lower, and the second impurity contained in the dopant-containing film 26 that is a doping paste is the first amorphous semiconductor.
  • a portion of layer 17 is doped.
  • the first amorphous semiconductor region 16 having the second conductivity type can be formed in the first amorphous semiconductor layer 17 having the first conductivity type.
  • the dopant-containing film 26 may be heat-treated using a heating furnace, or the dopant-containing film 26 may be heat-treated by irradiating the dopant-containing film 26 with laser light.
  • the first impurity in the first amorphous semiconductor layer 17 and the second impurity in the first amorphous semiconductor region 16 can be activated.
  • the first amorphous semiconductor layer 17 and the first impurity One amorphous semiconductor region 16 may be further annealed.
  • the remaining dopant-containing film 26 is removed using a mixed solution of sulfuric acid and hydrogen peroxide solution, a mixed solution of hydrochloric acid and hydrogen peroxide solution, or hydrofluoric acid.
  • the first electrode 19 and the second electrode 18 are formed on the second surface 11 b of the semiconductor substrate 11. In this way, the photoelectric conversion element 5 of the present embodiment shown in FIGS. 19 and 20 can be manufactured.
  • the manufacturing method of the photoelectric conversion element 5 of the present embodiment has the same effect as the manufacturing method of the photoelectric conversion element 5 of the eighth embodiment, but differs in the following points.
  • doping the second impurity into a part of the first amorphous semiconductor layer 17 may cause the part of the first amorphous semiconductor layer 17 to be doped.
  • a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
  • the formation of the dopant-containing film 26 containing the second impurity on the first amorphous semiconductor layer 17 is the first amorphous semiconductor layer 17.
  • a doping paste containing the second impurity may be applied on a part of the substrate. Transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 may include heat-treating the doping paste.
  • doping the second impurity into a part of the first amorphous semiconductor layer 17 is a part of the first amorphous semiconductor layer 17. Applying a doping paste containing a second impurity on the part and heat-treating the doping paste may be included.
  • the first amorphous semiconductor region 16 can be formed in the first amorphous semiconductor layer 17 with high pattern accuracy.
  • the dopant-containing film 26 can be formed on the first amorphous semiconductor layer 17 by inkjet, screen printing, or the like. According to the manufacturing method of the photoelectric conversion element 5 of this Embodiment, the photoelectric conversion element which has the improved characteristic and reliability can be manufactured by an inexpensive and simple process.
  • the photoelectric conversion element 5 of the present embodiment has a configuration similar to that of the photoelectric conversion element 5 of the eighth embodiment.
  • the manufacturing method of the photoelectric conversion element 5 of the present embodiment basically includes the same steps as the manufacturing method of the photoelectric conversion element 5 of the eighth embodiment, but differs in the following points.
  • the second impurity is doped in part of the first amorphous semiconductor layer 17 by the ion implantation method.
  • doping the second impurity into a part of the first amorphous semiconductor layer 17 means that the first amorphous semiconductor layer 17 is not doped.
  • transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 irradiates a part of the dopant-containing film 26 with the laser beam 27.
  • the second impurity may be doped into a part of the first amorphous semiconductor layer 17 by a laser doping method.
  • the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the first surface 11 a of the semiconductor substrate 11 are formed.
  • the dielectric layer 14 is formed, and the tunnel dielectric layer 20, the second amorphous semiconductor layer 15, and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11. It is formed.
  • a dopant-containing film 26 containing a second impurity having the second conductivity type is formed on the first amorphous semiconductor layer 17.
  • the dopant-containing film 26 may include phosphorus silicate glass (PSG), boron silicate glass (BSG), and polyboron film (PBF).
  • PSG phosphorus silicate glass
  • BSG boron silicate glass
  • PPF polyboron film
  • a part of the dopant-containing film 26 is irradiated with laser light 27 to transfer the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17.
  • a part of the dopant-containing film 26 is locally heated by irradiating a part of the dopant-containing film 26 with the laser light 27. Therefore, the second impurity contained in the dopant-containing film 26 is doped only in the region corresponding to the portion irradiated with the laser beam 27 in the first amorphous semiconductor layer 17.
  • the first amorphous semiconductor region 16 having the second conductivity type can be formed in the first amorphous semiconductor layer 17 having the first conductivity type.
  • the laser beam 27 By irradiating a part of the dopant-containing film 26 with the laser beam 27, a part of the dopant-containing film 26 and a part of the first amorphous semiconductor layer 17 are locally heated. Therefore, when the laser beam 27 is irradiated on a part of the dopant-containing film 26, the second impurity in the first amorphous semiconductor region 16 can be activated.
  • the remaining dopant-containing film 26 is removed using a mixed solution of sulfuric acid and hydrogen peroxide solution, a mixed solution of hydrochloric acid and hydrogen peroxide solution, or hydrofluoric acid.
  • the first amorphous semiconductor layer 17 and The first amorphous semiconductor region 16 may be further annealed.
  • the first electrode 19 and the second electrode 18 are formed on the second surface 11 b of the semiconductor substrate 11. In this way, the photoelectric conversion element 5 of the present embodiment shown in FIGS. 19 and 20 can be manufactured.
  • the manufacturing method of the photoelectric conversion element 5 of the present embodiment has the same effect as the manufacturing method of the photoelectric conversion element 5 of the eighth embodiment, but differs in the following points.
  • shifting the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 is one of the dopant-containing films 26. Irradiation of the laser beam 27 to the part may be included. That is, the second impurity may be doped into a part of the first amorphous semiconductor layer 17 by a laser doping method.
  • the laser doping method can diffuse the dopant in a shorter time than the method of diffusing the dopant using a heating furnace. According to the manufacturing method of the photoelectric conversion element 5 of this Embodiment, the photoelectric conversion element which has the improved characteristic and reliability can be manufactured by an inexpensive and simple process.
  • the photoelectric conversion element 6 of Embodiment 11 is demonstrated.
  • the photoelectric conversion element 6 of the present embodiment is basically the same as the photoelectric conversion element 5 of the eighth embodiment, but differs in the following points.
  • the photoelectric conversion element 6 is provided in the second amorphous semiconductor layer 15 and further includes a second amorphous semiconductor region 46 having the second conductivity type.
  • the second amorphous semiconductor layer 15 and the second amorphous semiconductor region 46 are provided on the tunnel dielectric layer 20.
  • the second amorphous semiconductor layer 15 and the second amorphous semiconductor region 46 constitute one layer extending continuously.
  • the second amorphous semiconductor region 46 includes a second impurity having the second conductivity type.
  • the second amorphous semiconductor region 46 is in contact with the first amorphous semiconductor region 16.
  • the second amorphous semiconductor region 46 may exist over the entire thickness of the second amorphous semiconductor layer 15.
  • the second amorphous semiconductor region 46 may be in contact with the tunnel dielectric layer 20 or may not be in contact therewith.
  • the second amorphous semiconductor region 46 may have substantially the same width as the first amorphous semiconductor region 16.
  • the concentration of the second impurity in the second amorphous semiconductor region 46 is the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged, that is, the first May be constant in the direction (for example, the x direction).
  • the second amorphous semiconductor region 46 may have the second impurity concentration substantially the same as that of the first amorphous semiconductor region 16.
  • a method for manufacturing the photoelectric conversion element 6 according to the eleventh embodiment will be described with reference to FIGS.
  • the manufacturing method of the photoelectric conversion element 6 of the present embodiment is basically the same as the manufacturing method of the photoelectric conversion element 5 of the eighth embodiment, but differs in the following points.
  • the second amorphous semiconductor layer 15 is doped with the second impurity, and the second amorphous semiconductor layer 15 is filled with the second impurity.
  • An amorphous semiconductor region 46 may be further formed.
  • the second amorphous semiconductor region 46 includes a second impurity having the second conductivity type.
  • the second amorphous semiconductor region 46 is in contact with the first amorphous semiconductor region 16. Specifically, doping part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 with the second impurity may cause the first amorphous semiconductor layer 17 to be doped.
  • the second impurity may be ion-implanted into part of the first amorphous semiconductor layer 15 and part of the second amorphous semiconductor layer 15.
  • the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the first surface 11 a of the semiconductor substrate 11 are formed.
  • the dielectric layer 14 is formed, and the tunnel dielectric layer 20, the second amorphous semiconductor layer 15, and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11. It is formed.
  • first amorphous semiconductor region 16 is formed in first amorphous semiconductor layer 17 and second conductive type is formed in second amorphous semiconductor layer 15.
  • the formation of the second amorphous semiconductor region 46 means that a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 have a second conductivity type. Doping with two impurities.
  • the first amorphous semiconductor region 16 is formed in the amorphous semiconductor layer 17, and the second amorphous semiconductor region 46 having the second conductivity type is formed in the second amorphous semiconductor layer 15. Is formed.
  • a tunnel dielectric layer 20 is formed on the second surface 11 b of the semiconductor substrate 11.
  • the second impurity having the second conductivity type is doped into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15, the second impurity is added to the semiconductor substrate 11.
  • the tunnel dielectric layer 20 can reliably prevent the impurities from being doped. Therefore, the heterojunction structure between the semiconductor substrate 11 and the first amorphous semiconductor layer 17 via the second amorphous semiconductor layer 15 and the tunnel dielectric layer 20 and the tunnel dielectric layer 20 are interposed.
  • the heterojunction structure between the semiconductor substrate 11 and the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46 can be reliably maintained.
  • doping part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 with the second impurity may cause the first amorphous semiconductor layer 17 to be doped.
  • the first non-crystalline semiconductor layer 17 is irradiated.
  • a part of the crystalline semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 may be doped with the second impurity.
  • the second impurity is applied to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. Can be doped.
  • the second impurity When the second impurity is doped into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15, another part of the first amorphous semiconductor layer 17 is changed.
  • an opening corresponding to a part of the first amorphous semiconductor layer 17 is provided.
  • a mask 22 that covers other portions of one amorphous semiconductor layer 17 may be used.
  • the first amorphous semiconductor layer 17 includes a first impurity after the second amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 are doped with the second impurity.
  • the first amorphous semiconductor layer 17 and the first amorphous semiconductor layer 17 are activated.
  • the amorphous semiconductor region 16 and the second amorphous semiconductor region 46 may be annealed.
  • the first electrode 19 that is electrically connected to the first amorphous semiconductor layer 17 is formed on the second surface 11 b of the semiconductor substrate 11. Specifically, the first electrode 19 is formed on the first amorphous semiconductor layer 17.
  • a second electrode 18 that is electrically connected to the first amorphous semiconductor region 16 is formed on the second surface 11 b of the semiconductor substrate 11. Specifically, the second electrode 18 is formed on the first amorphous semiconductor region 16.
  • the photoelectric conversion element 6 and its manufacturing method of the present embodiment have the same effects as the photoelectric conversion element 5 of the eighth embodiment and its manufacturing method, but are different in the following points.
  • the photoelectric conversion element 6 of the present embodiment may be further provided with a second amorphous semiconductor region 46 having a second conductivity type, as well as being provided in the second amorphous semiconductor layer 15.
  • the second amorphous semiconductor region 46 may contain a second impurity having the second conductivity type.
  • the second amorphous semiconductor region 46 may be in contact with the first amorphous semiconductor region 16.
  • the semiconductor substrate 11 includes an amorphous semiconductor region having the second conductivity type, which includes the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46, and the semiconductor substrate 11. The distance can be reduced.
  • the second amorphous semiconductor region 46 and the second amorphous semiconductor region 46 have the second.
  • the carriers corresponding to the conductivity types of the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46 can be collected with higher efficiency. According to the photoelectric conversion element 6 of the present embodiment, the efficiency of converting light energy into electrical energy can be improved.
  • the tunnel dielectric layer 20 is formed on the second surface 11b of the semiconductor substrate 11, the second amorphous semiconductor layer 15 is formed on the tunnel dielectric layer 20, and the second A second amorphous semiconductor region 46 may be provided in the amorphous semiconductor layer 15.
  • the second amorphous semiconductor region 46 is formed by doping a part of the second amorphous semiconductor layer 15 with the second impurity having the second conductivity type, the second amorphous semiconductor region 46 is formed on the semiconductor substrate 11.
  • the tunnel dielectric layer 20 can be surely prevented from being doped with impurities.
  • the photoelectric conversion element 6 according to the present embodiment has a structure that can reliably prevent the second impurity in the second amorphous semiconductor region 46 from being doped into the semiconductor substrate 11.
  • the photoelectric conversion element 6 of the present embodiment has a heterojunction structure between the semiconductor substrate 11 and the first amorphous semiconductor layer 17 via the second amorphous semiconductor layer 15 and the tunnel dielectric layer 20.
  • the semiconductor substrate 11 and the heterojunction structure between the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46 via the tunnel dielectric layer 20 can be reliably maintained. Yes.
  • the photoelectric conversion element 6 of the present embodiment has improved characteristics and reliability.
  • the second amorphous semiconductor layer 15 is doped with the second impurity, and the second amorphous semiconductor layer 15 is filled with the second impurity.
  • An amorphous semiconductor region 46 may be further formed.
  • the second amorphous semiconductor region 46 may contain a second impurity having the second conductivity type.
  • the second amorphous semiconductor region 46 may be in contact with the first amorphous semiconductor region 16.
  • the amorphous semiconductor region having the second conductivity type composed of the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46, and The distance from the semiconductor substrate 11 can be reduced.
  • the second amorphous semiconductor region 46 and the second amorphous semiconductor region 46 have the second.
  • the carriers corresponding to the conductivity types of the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46 can be collected with higher efficiency.
  • the photoelectric conversion element with which the efficiency which converts light energy into electrical energy was improved can be manufactured.
  • the tunnel dielectric layer 20 is formed on the second surface 11b of the semiconductor substrate 11, and the second amorphous semiconductor is formed on the tunnel dielectric layer 20.
  • the layer 15 is formed, and a part of the second amorphous semiconductor layer 15 is doped with the second impurity, so that the second amorphous semiconductor region 46 is formed in the second amorphous semiconductor layer 15. Forming.
  • the second surface 11b of the semiconductor substrate 11 is covered with the tunnel dielectric layer 20 before the second amorphous semiconductor layer 15 is formed.
  • the second amorphous semiconductor region 46 is formed by doping a part of the second amorphous semiconductor layer 15 with the second impurity having the second conductivity type, the second amorphous semiconductor region 46 is formed on the semiconductor substrate 11.
  • the tunnel dielectric layer 20 can be surely prevented from being doped with impurities.
  • the semiconductor substrate 11 can be reliably prevented from being doped with the second impurity in the second amorphous semiconductor region 46.
  • the gap between the semiconductor substrate 11 and the first amorphous semiconductor layer 17 via the second amorphous semiconductor layer 15 and the tunnel dielectric layer 20 is determined. And the heterojunction structure between the semiconductor substrate 11 and the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46 via the tunnel dielectric layer 20 are reliably maintained. obtain. According to the method for manufacturing the photoelectric conversion element 6 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
  • the second impurity is doped into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. Ion implantation of a second impurity into part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 may be included. In one step of irradiating the ion beam 21 of the second impurity, a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 are doped with the second impurity. obtain. According to the method for manufacturing the photoelectric conversion element 6 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
  • the photoelectric conversion element 6 of the present embodiment has a configuration similar to that of the photoelectric conversion element 6 of the eleventh embodiment.
  • the manufacturing method of the photoelectric conversion element 6 of the present embodiment basically includes the same steps as the manufacturing method of the photoelectric conversion element 6 of the eleventh embodiment, but differs in the following points.
  • the second impurity is introduced into part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 by ion implantation. It was doped.
  • a part of the first amorphous semiconductor layer 17 and the first of the first amorphous semiconductor layer 17 are formed by the same method as that of the photoelectric conversion element 5 of the ninth embodiment.
  • a part of the second amorphous semiconductor layer 15 is doped with the second impurity.
  • a dopant-containing film 26 containing a second impurity is formed on the first amorphous semiconductor layer 17. Then, the second impurity contained in the dopant-containing film 26 is transferred to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. More specifically, the formation of the dopant-containing film 26 containing the second impurity on the first amorphous semiconductor layer 17 means that the second amorphous semiconductor layer 17 is formed on the second amorphous semiconductor layer 17.
  • a doping paste containing impurities may be applied. Transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 means that the doping paste is heat-treated. May be included.
  • the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the first surface 11 a of the semiconductor substrate 11 are formed.
  • the dielectric layer 14 is formed, and the tunnel dielectric layer 20, the second amorphous semiconductor layer 15, and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11. It is formed.
  • a dopant-containing film 26 containing a second impurity having the second conductivity type is formed on part of the first amorphous semiconductor layer 17.
  • the dopant-containing film 26 may be a doping paste containing a second impurity having the second conductivity type.
  • the dopant-containing film 26 is heat-treated so that the second impurity contained in the dopant-containing film 26 is part of the first amorphous semiconductor layer 17 and the second amorphous semiconductor layer 15. To some of them.
  • a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 may be doped with the second impurity.
  • the photoelectric conversion element of the present embodiment except that the second impurity is transferred to a part of the second amorphous semiconductor layer 15 in addition to a part of the first amorphous semiconductor layer 17.
  • the manufacturing method 6 is the same as the manufacturing method of the photoelectric conversion element 5 of the ninth embodiment.
  • the manufacturing method of the photoelectric conversion element 6 of the present embodiment has the effect of the manufacturing method of the photoelectric conversion element 6 of the eleventh embodiment and the effect of the manufacturing method of the photoelectric conversion element 5 of the ninth embodiment.
  • doping a second impurity into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 Forming a dopant-containing film 26 containing a second impurity on the first amorphous semiconductor layer 17, and applying the second impurity contained in the dopant-containing film 26 to one of the first amorphous semiconductor layer 17 And transition to a part of the second amorphous semiconductor layer 15.
  • a part of the crystalline semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 may be doped with the second impurity. According to the method for manufacturing the photoelectric conversion element 6 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
  • forming the dopant-containing film 26 containing the second impurity on the first amorphous semiconductor layer 17 is the first amorphous semiconductor layer 17.
  • a doping paste containing the second impurity may be applied on a part of the substrate. Transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 means that the doping paste is heat-treated. May be included.
  • a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 are doped with the second impurity. obtain.
  • a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
  • the photoelectric conversion element 6 of the present embodiment has a configuration similar to that of the photoelectric conversion element 6 of the eleventh embodiment.
  • the manufacturing method of the photoelectric conversion element 6 of the present embodiment basically includes the same steps as the manufacturing method of the photoelectric conversion element 6 of the eleventh embodiment, but differs in the following points.
  • the second impurity is introduced into part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 by ion implantation. It was doped.
  • the first amorphous semiconductor layer 17 is formed by laser doping.
  • the second impurity is doped into the portion and part of the second amorphous semiconductor layer 15.
  • a dopant-containing film 26 containing a second impurity is formed on the first amorphous semiconductor layer 17. Then, by irradiating a part of the dopant-containing film 26 with the laser beam 27, a second impurity is introduced into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. It may be doped.
  • the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the first surface 11 a of the semiconductor substrate 11 are formed.
  • the dielectric layer 14 is formed, and the tunnel dielectric layer 20, the second amorphous semiconductor layer 15, and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11. It is formed.
  • a dopant-containing film 26 containing a second impurity having the second conductivity type is formed on the first amorphous semiconductor layer 17.
  • the dopant-containing film 26 may be a doping paste containing a second impurity having the second conductivity type.
  • a part of the dopant-containing film 26 is irradiated with a laser beam 27 so that the second impurity contained in the dopant-containing film 26 is part of the first amorphous semiconductor layer 17 and the second impurity.
  • a second impurity is added to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. Can be doped.
  • the manufacturing method 6 is the same as the manufacturing method of the photoelectric conversion element 5 of the tenth embodiment.
  • the manufacturing method of the photoelectric conversion element 6 of the present embodiment has the effect of the manufacturing method of the photoelectric conversion element 6 of the eleventh embodiment and the effect of the manufacturing method of the photoelectric conversion element 5 of the tenth embodiment.
  • the second impurity contained in the dopant-containing film 26 is part of the first amorphous semiconductor layer 17 and the second amorphous semiconductor layer 15.
  • the transition to the portion may include irradiating a part of the dopant-containing film 26 with the laser beam 27.
  • a second impurity is added to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. Can be doped. According to the method for manufacturing the photoelectric conversion element 6 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
  • Embodiment 14 With reference to FIG. 35, the photoelectric conversion element 7 of Embodiment 14 will be described. Although the photoelectric conversion element 7 of this Embodiment is equipped with the structure similar to the photoelectric conversion element 5 of Embodiment 8, it differs in the following points.
  • the photoelectric conversion element 7 of the present embodiment does not include the second amorphous semiconductor layer 15.
  • the first amorphous semiconductor layer 17 is provided on the tunnel dielectric layer 20 and is in direct contact with the tunnel dielectric layer 20.
  • the first amorphous semiconductor region 16 may be in direct contact with the tunnel dielectric layer 20.
  • the first amorphous semiconductor region 16 may exist over the entire thickness of the first amorphous semiconductor layer 17.
  • the first amorphous semiconductor region 16 may or may not be in contact with the tunnel dielectric layer 20.
  • the manufacturing method of the photoelectric conversion element 7 of the present embodiment is the same as the manufacturing method of the photoelectric conversion element 5 of the eighth to tenth embodiments except that the second amorphous semiconductor layer 15 is formed. It is the same. Specifically, in the method for manufacturing the photoelectric conversion element 7 according to the present embodiment, the formation of the first amorphous semiconductor layer 17 on the second surface 11b of the semiconductor substrate 11 includes the tunnel dielectric layer 20. Forming the first amorphous semiconductor layer 17 in direct contact with the first amorphous semiconductor layer 17 may be included.
  • the photoelectric conversion element 7 and the manufacturing method thereof according to the present embodiment have the same effects as the photoelectric conversion element 5 and the manufacturing method thereof according to the eighth to tenth embodiments, but are different in the following points.
  • the first amorphous semiconductor layer 17 may be in direct contact with the tunnel dielectric layer 20. Since the first amorphous semiconductor layer 17 is in direct contact with the tunnel dielectric layer 20, the distance between the first amorphous semiconductor layer 17 and the semiconductor substrate 11 and the first amorphous semiconductor layer 17 are within the range. The distance between the provided first amorphous semiconductor region 16 and the semiconductor substrate 11 can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the first conductivity type of the first amorphous semiconductor layer 17 are first One amorphous semiconductor layer 17 can be collected with higher efficiency.
  • carriers corresponding to the second conductivity type of the first amorphous semiconductor region 16 are the first.
  • a single amorphous semiconductor region 16 can be collected with higher efficiency. According to the photoelectric conversion element 7 of the present embodiment, the efficiency of converting light energy into electrical energy can be improved.
  • the photoelectric conversion element 7 includes a tunnel dielectric layer 20 on the second surface 11 b of the semiconductor substrate 11 and a first amorphous semiconductor layer 17 that is in direct contact with the tunnel dielectric layer 20. ing.
  • the tunnel dielectric layer 20 exists between the second surface 11 b of the semiconductor substrate 11 and the first amorphous semiconductor layer 17.
  • the tunnel dielectric layer 20 ensures that the semiconductor substrate 11 is doped with the first impurity when the first amorphous semiconductor layer 17 containing the first impurity having the first conductivity type is formed. Can be prevented.
  • the semiconductor substrate 11 is doped with the first impurity in the first amorphous semiconductor layer 17 and the second impurity in the first amorphous semiconductor region 16. It has a structure that can be surely prevented.
  • the photoelectric conversion element 7 of the present embodiment includes a heterojunction structure between the semiconductor substrate 11 and the first amorphous semiconductor layer 17 via the tunnel dielectric layer 20 and a semiconductor via the tunnel dielectric layer 20. A structure in which the heterojunction structure between the substrate 11 and the first amorphous semiconductor region 16 can be reliably maintained is provided.
  • the photoelectric conversion element 7 of the present embodiment has improved characteristics and reliability.
  • the formation of the first amorphous semiconductor layer 17 on the tunnel dielectric layer 20 means that the first amorphous semiconductor directly in contact with the tunnel dielectric layer 20 is used. It may include forming the semiconductor layer 17. Since the first amorphous semiconductor layer 17 is in direct contact with the tunnel dielectric layer 20, the distance between the first amorphous semiconductor layer 17 and the semiconductor substrate 11 and the first amorphous semiconductor layer 17 are within the range. The distance between the provided first amorphous semiconductor region 16 and the semiconductor substrate 11 can be reduced.
  • the photoelectric conversion element 7 of this Embodiment the photoelectric conversion element in which the efficiency which converts light energy into electrical energy was improved can be manufactured.
  • the tunnel dielectric layer 20 is formed on the second surface 11b of the semiconductor substrate 11, and the first amorphous material that is in direct contact with the tunnel dielectric layer 20 is used. Forming a semiconductor layer 17.
  • the second surface 11b of the semiconductor substrate 11 is covered with the tunnel dielectric layer 20 before the first amorphous semiconductor layer 17 is formed.
  • the first amorphous semiconductor layer 17 containing the first impurity having the first conductivity type is formed on the semiconductor substrate 11 when the first amorphous semiconductor layer 17 is formed.
  • the tunnel dielectric layer 20 can reliably prevent the impurities from being doped.
  • the first amorphous semiconductor region 16 is formed by doping a part of the first amorphous semiconductor layer 17 with the second impurity having the second conductivity type, the second amorphous semiconductor layer 17 is formed on the semiconductor substrate 11.
  • the tunnel dielectric layer 20 can be surely prevented from being doped with impurities.
  • the first impurity in the first amorphous semiconductor layer 17 and the second impurity in the first amorphous semiconductor region 16 are the semiconductor. It can be reliably prevented that the substrate 11 is doped.
  • the heterojunction structure between the semiconductor substrate 11 and the first amorphous semiconductor layer 17 via the tunnel dielectric layer 20, and the tunnel dielectric layer can be reliably maintained.
  • a photoelectric conversion element having improved characteristics and reliability can be manufactured.
  • the photoelectric conversion element according to the embodiment disclosed herein is provided on a semiconductor substrate having a first surface and a second surface opposite to the first surface, and on the second surface.
  • the first amorphous semiconductor layer includes a first impurity having a first conductivity type.
  • the first amorphous semiconductor region includes a first impurity and a second impurity having a second conductivity type.
  • the first amorphous semiconductor layer and the first amorphous semiconductor region constitute one layer that extends continuously.
  • a structure that can be manufactured without exposing the second surface of the semiconductor substrate after the first amorphous semiconductor layer is formed on the second surface of the semiconductor substrate is described in the embodiment disclosed herein.
  • the photoelectric conversion element is provided.
  • Embodiments disclosed herein include a structure that can be manufactured without a contaminant adhering to the second surface of a semiconductor substrate or the second surface of a semiconductor substrate being roughened by etching an amorphous semiconductor layer.
  • the photoelectric conversion element is provided.
  • the photoelectric conversion element of the embodiment disclosed herein has improved characteristics and reliability.
  • the first amorphous semiconductor region may exist over the entire thickness of the first amorphous semiconductor layer.
  • the distance between the first amorphous semiconductor region and the semiconductor substrate can be reduced.
  • the carrier corresponding to the second conductivity type of the first amorphous semiconductor region is the first amorphous.
  • Higher efficiency can be collected by the quality semiconductor region. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved.
  • the concentration of the first impurity in the first amorphous semiconductor region is the same as that of the first amorphous semiconductor region and the first amorphous semiconductor. It may be constant in the direction in which the layers are arranged alternately.
  • a structure that can be manufactured without exposing the second surface of the semiconductor substrate after the first amorphous semiconductor layer is formed on the second surface of the semiconductor substrate is described in the embodiment disclosed herein.
  • the photoelectric conversion element is provided.
  • the photoelectric conversion element of the embodiment disclosed herein has improved characteristics and reliability.
  • the first amorphous semiconductor layer may be in direct contact with the second surface of the semiconductor substrate. Since the first amorphous semiconductor layer is in direct contact with the second surface of the semiconductor substrate, the distance between the first amorphous semiconductor layer and the semiconductor substrate and the first amorphous semiconductor layer are provided in the first amorphous semiconductor layer. The distance between the first amorphous semiconductor region and the semiconductor substrate can be reduced. Of the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate, the carrier corresponding to the first conductivity type of the first amorphous semiconductor layer is the first amorphous. It can be collected with higher efficiency by the quality semiconductor layer.
  • the carrier corresponding to the second conductivity type of the first amorphous semiconductor region is the first amorphous. Higher efficiency can be collected by the quality semiconductor region. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved.
  • the photoelectric conversion element between the first amorphous semiconductor layer and the second surface of the semiconductor substrate and between the first amorphous semiconductor region and the semiconductor substrate.
  • a second amorphous semiconductor layer having i-type may be further provided between the two surfaces.
  • the second amorphous semiconductor layer having i-type suppresses recombination of carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate on the second surface of the semiconductor substrate. can do.
  • the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
  • the photoelectric conversion element according to the embodiment disclosed herein further includes a second amorphous semiconductor region having a second conductivity type, as well as being provided in the second amorphous semiconductor layer. Also good.
  • the second amorphous semiconductor region may include a second impurity.
  • the second amorphous semiconductor region may be in contact with the first amorphous semiconductor region.
  • an amorphous semiconductor region having the second conductivity type including the first amorphous semiconductor region and the second amorphous semiconductor region, and the semiconductor substrate The distance can be reduced.
  • Carriers to be collected can be collected with higher efficiency by the first amorphous semiconductor region and the second amorphous semiconductor region. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved.
  • the photoelectric conversion element according to the embodiment disclosed herein is provided on a semiconductor substrate having a first surface and a second surface opposite to the first surface, and the second surface.
  • a tunnel dielectric layer provided on the tunnel dielectric layer, provided on the tunnel dielectric layer, and different from the first conductivity type, provided on the tunnel dielectric layer.
  • a first amorphous semiconductor region having a second conductivity type is provided on the semiconductor substrate having a first surface and a second surface opposite to the first surface, and the second surface.
  • a tunnel dielectric layer provided on the tunnel dielectric layer, provided on the tunnel dielectric layer, and different from the first conductivity type, provided on the tunnel dielectric layer.
  • a first amorphous semiconductor region having a second conductivity type The first amorphous semiconductor layer includes a first impurity having a first conductivity type.
  • the first amorphous semiconductor region includes a first impurity and a second impurity having a second conductivity type.
  • the tunnel dielectric layer can suppress recombination of carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate on the second surface of the semiconductor substrate.
  • the photoelectric conversion elements of the embodiments disclosed herein have improved passivation characteristics.
  • the tunnel dielectric layer tunnels carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate to the first amorphous semiconductor layer and the first amorphous semiconductor region. According to the photoelectric conversion element of the embodiment disclosed herein, carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate can be efficiently collected.
  • the second surface of the semiconductor substrate is formed. It has a structure that can be manufactured without exposure.
  • Embodiments disclosed herein include a structure that can be manufactured without a contaminant adhering to the second surface of a semiconductor substrate or the second surface of a semiconductor substrate being roughened by etching an amorphous semiconductor layer.
  • the photoelectric conversion element is provided.
  • the photoelectric conversion element of the embodiment disclosed herein has improved characteristics and reliability.
  • the first amorphous semiconductor region may exist over the entire thickness of the first amorphous semiconductor layer.
  • the distance between the first amorphous semiconductor region and the semiconductor substrate can be reduced.
  • the carrier corresponding to the second conductivity type of the first amorphous semiconductor region is the first amorphous. Higher efficiency can be collected by the quality semiconductor region. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved.
  • the concentration of the first impurity in the first amorphous semiconductor region is the same as that of the first amorphous semiconductor region and the first amorphous semiconductor. It may be constant in the direction in which the layers are arranged alternately. Therefore, after the tunnel dielectric layer and the first amorphous semiconductor layer are formed on the second surface of the semiconductor substrate, a structure that can be manufactured without exposing the second surface of the semiconductor substrate is here.
  • the photoelectric conversion element of the disclosed embodiment is provided.
  • the photoelectric conversion element of the embodiment disclosed herein has improved characteristics and reliability.
  • the first amorphous semiconductor layer may be in direct contact with the tunnel dielectric layer. Since the first amorphous semiconductor layer is in direct contact with the tunnel dielectric layer, the distance between the first amorphous semiconductor layer and the semiconductor substrate and the first amorphous semiconductor layer provided in the first amorphous semiconductor layer The distance between the amorphous semiconductor region and the semiconductor substrate can be reduced. Of the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate, the carrier corresponding to the first conductivity type of the first amorphous semiconductor layer is the first amorphous. It can be collected with higher efficiency by the quality semiconductor layer.
  • the carrier corresponding to the second conductivity type of the first amorphous semiconductor region is the first amorphous. Higher efficiency can be collected by the quality semiconductor region. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved.
  • the photoelectric conversion element according to the embodiment disclosed herein includes a tunnel dielectric layer on the second surface of the semiconductor substrate, and a first amorphous semiconductor layer in direct contact with the tunnel dielectric layer. .
  • a tunnel dielectric layer exists between the second surface of the semiconductor substrate and the first amorphous semiconductor layer.
  • the tunnel dielectric layer reliably prevents the semiconductor substrate from being doped with the first impurity when the first amorphous semiconductor layer containing the first impurity having the first conductivity type is formed.
  • the semiconductor substrate is doped with the second impurity when the first amorphous semiconductor region is formed by doping a part of the first amorphous semiconductor layer with the second impurity having the second conductivity type.
  • the tunnel dielectric layer can be reliably prevented.
  • the first impurity in the first amorphous semiconductor layer and the second impurity in the first amorphous semiconductor region are semiconductors. It has a structure that can reliably prevent the substrate from being doped.
  • the photoelectric conversion element of the embodiment disclosed herein includes a heterojunction structure between a semiconductor substrate and a first amorphous semiconductor layer via a tunnel dielectric layer, and a semiconductor substrate via a tunnel dielectric layer And a heterojunction structure between the first amorphous semiconductor region and the first amorphous semiconductor region.
  • the photoelectric conversion element of the embodiment disclosed herein has improved characteristics and reliability.
  • the photoelectric conversion element according to the embodiment disclosed herein includes a gap between the first amorphous semiconductor layer and the tunnel dielectric layer and a gap between the first amorphous semiconductor region and the tunnel dielectric layer. Further, an i-type second amorphous semiconductor layer may be further provided. The second amorphous semiconductor layer having i-type suppresses recombination of carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate on the second surface of the semiconductor substrate. can do. According to the photoelectric conversion element of the embodiment disclosed herein, the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
  • the photoelectric conversion element according to the embodiment disclosed herein further includes a second amorphous semiconductor region having a second conductivity type, as well as being provided in the second amorphous semiconductor layer. Also good.
  • the second amorphous semiconductor region may include a second impurity.
  • the second amorphous semiconductor region may be in contact with the first amorphous semiconductor region.
  • an amorphous semiconductor region having the second conductivity type including the first amorphous semiconductor region and the second amorphous semiconductor region, and the semiconductor substrate The distance can be reduced.
  • the second conductivity type of the first amorphous semiconductor region and the second amorphous semiconductor region among the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate Carriers to be collected can be collected with higher efficiency by the first amorphous semiconductor region and the second amorphous semiconductor region. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved.
  • the photoelectric conversion element of the embodiment disclosed herein includes a tunnel dielectric layer on the second surface of the semiconductor substrate, a second amorphous semiconductor layer on the tunnel dielectric layer, and a second amorphous layer.
  • a second amorphous semiconductor region may be provided in the crystalline semiconductor layer.
  • the semiconductor substrate is doped with the second impurity.
  • the tunnel dielectric layer can be reliably prevented.
  • the photoelectric conversion element of the embodiment disclosed here has a structure that can reliably prevent the second impurity in the second amorphous semiconductor region from being doped into the semiconductor substrate.
  • the photoelectric conversion element of the embodiment disclosed herein includes a heterojunction structure between the semiconductor substrate and the first amorphous semiconductor layer via the second amorphous semiconductor layer and the tunnel dielectric layer, A structure in which the heterojunction structure between the semiconductor substrate and the first amorphous semiconductor region and the second amorphous semiconductor region via the tunnel dielectric layer can be reliably maintained is provided.
  • the photoelectric conversion element of the embodiment disclosed herein has improved characteristics and reliability.
  • the tunnel dielectric layer may have a thickness of 0.2 nm to 5.0 nm.
  • the tunnel dielectric layer having a thickness of 0.2 nm or more can further improve the passivation characteristics of the photoelectric conversion element.
  • the tunnel dielectric layer having a thickness of 5.0 nm or less allows carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate to be converted into the first amorphous semiconductor layer and the first amorphous semiconductor layer. Tunneling to the amorphous semiconductor region can be performed more efficiently.
  • carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate can be collected more efficiently.
  • the photoelectric conversion element of the embodiment disclosed herein is provided on the second surface of the semiconductor substrate, and has a first electrode electrically connected to the first amorphous semiconductor layer
  • the semiconductor device may further include a second electrode provided on the second surface of the semiconductor substrate and electrically connected to the first amorphous semiconductor region.
  • the first electrode and the second electrode are not provided on the first surface side of the semiconductor substrate which is a light incident surface. Light incident on the photoelectric conversion element is not blocked by the first electrode and the second electrode. According to the photoelectric conversion element of the embodiment disclosed herein, a high short-circuit current J SC can be obtained, and the efficiency of converting light energy into electrical energy can be improved.
  • the photoelectric conversion element of the embodiment disclosed herein may further include a dielectric layer on the first surface of the semiconductor substrate.
  • the dielectric layer functions as an antireflection film, the dielectric layer can allow more light to enter the photoelectric conversion element. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved.
  • the dielectric layer functions as a passivation film, the dielectric layer is such that carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate are recombined on the first surface of the semiconductor substrate. Can be suppressed. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved.
  • the photoelectric conversion element of the embodiment disclosed herein may further include an i-type third amorphous semiconductor layer on the first surface of the semiconductor substrate.
  • the third amorphous semiconductor layer having i-type suppresses recombination of carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate on the first surface of the semiconductor substrate. can do.
  • the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
  • the photoelectric conversion element of the embodiment disclosed herein may further include a fourth amorphous semiconductor layer having the same conductivity type as the semiconductor substrate, on the first surface of the semiconductor substrate.
  • the fourth amorphous semiconductor layer having the same conductivity type as that of the semiconductor substrate has a carrier that is close to the first surface of the semiconductor substrate among carriers generated in the semiconductor substrate when light is incident on the photoelectric conversion element. It can be pushed back into the substrate.
  • the fourth amorphous semiconductor layer can suppress recombination of the carriers on the first surface of the semiconductor substrate. According to the photoelectric conversion element of the embodiment disclosed herein, the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
  • the first surface of the semiconductor substrate may include an uneven structure.
  • the concavo-convex structure on the first surface of the semiconductor substrate which is the light incident surface, more light can be incident into the photoelectric conversion element.
  • the efficiency of converting light energy into electric energy can be improved.
  • a method for manufacturing a photoelectric conversion element according to an embodiment disclosed herein includes a first surface and a second surface of a semiconductor substrate having a second surface opposite to the first surface. Forming a first amorphous semiconductor layer having a first conductivity type. The first amorphous semiconductor layer includes a first impurity having a first conductivity type. The manufacturing method of the photoelectric conversion element according to the embodiment disclosed herein further includes forming a first amorphous semiconductor region having the second conductivity type in the first amorphous semiconductor layer. The formation of the first amorphous semiconductor region in the first amorphous semiconductor layer means that a part of the first amorphous semiconductor layer has a second conductivity type different from the first conductivity type. Doping with a second impurity.
  • the photoelectric conversion element can be manufactured without exposing the second surface of the semiconductor substrate.
  • the photoelectric conversion element can be manufactured without a contaminant adhering to the second surface of the semiconductor substrate and without causing the second surface of the semiconductor substrate to be roughened by etching the amorphous semiconductor layer. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
  • the second surface of the semiconductor substrate having the first surface and the second surface opposite to the first surface is provided.
  • the first amorphous semiconductor layer includes a first impurity having a first conductivity type.
  • the manufacturing method of the photoelectric conversion element according to the embodiment disclosed herein further includes forming a first amorphous semiconductor region having the second conductivity type in the first amorphous semiconductor layer.
  • the formation of the first amorphous semiconductor region in the first amorphous semiconductor layer means that a part of the first amorphous semiconductor layer has a second conductivity type different from the first conductivity type. Doping with a second impurity.
  • the tunnel dielectric layer can suppress recombination of carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate on the second surface of the semiconductor substrate. According to the photoelectric conversion element manufacturing method of the embodiment disclosed herein, a photoelectric conversion element having improved passivation characteristics can be manufactured.
  • the tunnel dielectric layer tunnels carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate to the first amorphous semiconductor layer and the first amorphous semiconductor region.
  • photoelectrics that can efficiently collect carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate.
  • a conversion element can be manufactured.
  • the second surface of the semiconductor substrate is covered with the tunnel dielectric layer before the first amorphous semiconductor layer is formed. Therefore, after the tunnel dielectric layer and the first amorphous semiconductor layer are formed on the second surface of the semiconductor substrate, the photoelectric conversion element can be manufactured without exposing the second surface of the semiconductor substrate. .
  • the photoelectric conversion element can be manufactured without a contaminant adhering to the second surface of the semiconductor substrate and without causing the second surface of the semiconductor substrate to be roughened by etching the amorphous semiconductor layer. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
  • the first amorphous semiconductor region may exist over the entire thickness of the first amorphous semiconductor layer.
  • the distance between the first amorphous semiconductor region and the semiconductor substrate can be reduced.
  • the carrier corresponding to the second conductivity type of the first amorphous semiconductor region is the first amorphous. Higher efficiency can be collected by the quality semiconductor region.
  • a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
  • the concentration of the first impurity in the first amorphous semiconductor region is different from that in the first amorphous semiconductor region. It may be constant in the direction in which the crystalline semiconductor layers are alternately arranged. Therefore, after the first amorphous semiconductor layer is formed on the second surface of the semiconductor substrate, the photoelectric conversion element can be manufactured without exposing the second surface of the semiconductor substrate. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
  • the concentration of the first impurity in the first amorphous semiconductor region is different from that in the first amorphous semiconductor region. It may be constant in the direction in which the crystalline semiconductor layers are alternately arranged. Therefore, after the tunnel dielectric layer and the first amorphous semiconductor layer are formed on the second surface of the semiconductor substrate, the photoelectric conversion element can be manufactured without exposing the second surface of the semiconductor substrate. . According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
  • forming the first amorphous semiconductor layer on the second surface of the semiconductor substrate is the second surface of the semiconductor substrate. Forming a first amorphous semiconductor layer in direct contact with the first amorphous semiconductor layer. Since the first amorphous semiconductor layer is in direct contact with the second surface of the semiconductor substrate, the distance between the first amorphous semiconductor layer and the semiconductor substrate and the first amorphous semiconductor layer are provided in the first amorphous semiconductor layer. The distance between the first amorphous semiconductor region and the semiconductor substrate can be reduced.
  • the carrier corresponding to the first conductivity type of the first amorphous semiconductor layer is the first amorphous. It can be collected with higher efficiency by the quality semiconductor layer.
  • the carrier corresponding to the second conductivity type of the first amorphous semiconductor region is the first amorphous. Higher efficiency can be collected by the quality semiconductor region. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
  • forming the first amorphous semiconductor layer on the tunnel dielectric layer includes the step of directly contacting the tunnel dielectric layer. It may also include forming an amorphous semiconductor layer. Since the first amorphous semiconductor layer is in direct contact with the tunnel dielectric layer, the distance between the first amorphous semiconductor layer and the semiconductor substrate and the first amorphous semiconductor layer provided in the first amorphous semiconductor layer The distance between the amorphous semiconductor region and the semiconductor substrate can be reduced. Of the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate, the carrier corresponding to the first conductivity type of the first amorphous semiconductor layer is the first amorphous.
  • the quality semiconductor layer It can be collected with higher efficiency by the quality semiconductor layer.
  • the carrier corresponding to the second conductivity type of the first amorphous semiconductor region is the first amorphous. Higher efficiency can be collected by the quality semiconductor region. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
  • a tunnel dielectric layer is formed on a second surface of a semiconductor substrate, and a first amorphous semiconductor that is in direct contact with the tunnel dielectric layer Forming a layer.
  • the second surface of the semiconductor substrate is covered with the tunnel dielectric layer before the first amorphous semiconductor layer is formed.
  • the first amorphous semiconductor layer containing the first impurity having the first conductivity type is formed on the semiconductor substrate when the first amorphous semiconductor layer is formed.
  • the tunnel dielectric layer can be reliably prevented from being doped with one impurity.
  • the semiconductor substrate is doped with the second impurity when the first amorphous semiconductor region is formed by doping a part of the first amorphous semiconductor layer with the second impurity having the second conductivity type.
  • the tunnel dielectric layer can be reliably prevented.
  • the first impurity in the first amorphous semiconductor layer and the second impurity in the first amorphous semiconductor region are It can be reliably prevented that the semiconductor substrate is doped.
  • the heterojunction structure between the semiconductor substrate and the first amorphous semiconductor layer via the tunnel dielectric layer, and the tunnel dielectric layer can be reliably maintained.
  • a photoelectric conversion element having improved characteristics and reliability can be manufactured.
  • the second surface of the semiconductor substrate is formed before forming the first amorphous semiconductor layer on the second surface of the semiconductor substrate.
  • a second amorphous semiconductor layer having i-type may be further formed thereon.
  • the second amorphous semiconductor layer having i-type suppresses recombination of carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate on the second surface of the semiconductor substrate. can do.
  • a photoelectric conversion element with improved passivation characteristics and efficiency of converting light energy into electric energy can be manufactured.
  • the i-type is formed on the tunnel dielectric layer. It may further include forming a second amorphous semiconductor layer.
  • the second amorphous semiconductor layer having i-type suppresses recombination of carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate on the second surface of the semiconductor substrate. can do.
  • a photoelectric conversion element with improved passivation characteristics and efficiency of converting light energy into electric energy can be manufactured.
  • doping the second impurity into a part of the first amorphous semiconductor layer may be the first amorphous semiconductor layer.
  • a second impurity may be ion-implanted into a part of the first impurity.
  • doping the second impurity into a part of the first amorphous semiconductor layer may be the first amorphous semiconductor layer.
  • Forming a dopant-containing film containing a second impurity thereon and transferring the second impurity contained in the dopant-containing film to a part of the first amorphous semiconductor layer may be included.
  • a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
  • forming the dopant-containing film containing the second impurity on the first amorphous semiconductor layer is the first amorphous
  • the doping paste containing the second impurity may be applied on a part of the crystalline semiconductor layer. Transferring the second impurity contained in the dopant-containing film to a part of the first amorphous semiconductor layer may include heat-treating the doping paste.
  • doping a second impurity into a part of the first amorphous semiconductor layer Applying a doping paste containing a second impurity on a part and heat-treating the doping paste may be included.
  • the first amorphous semiconductor region can be formed in the first amorphous semiconductor layer with high pattern accuracy.
  • the dopant-containing film can be formed on the first amorphous semiconductor layer by inkjet, screen printing, or the like. Therefore, according to the photoelectric conversion element manufacturing method of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured at a low cost and with a simple process.
  • transferring the second impurity contained in the dopant-containing film to a part of the first amorphous semiconductor layer includes dopant-containing. Irradiation of a part of the film with laser light may be included. That is, the second impurity may be doped into part of the first amorphous semiconductor layer by a laser doping method.
  • the laser doping method can diffuse the dopant in a shorter time than the method of diffusing the dopant using a heating furnace. Therefore, according to the photoelectric conversion element manufacturing method of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured at a low cost and with a simple process.
  • a second impurity is doped into a part of the second amorphous semiconductor layer, so that the inside of the second amorphous semiconductor layer
  • the method may further comprise forming a second amorphous semiconductor region.
  • the second amorphous semiconductor region may include a second impurity.
  • the second amorphous semiconductor region may be in contact with the first amorphous semiconductor region.
  • the amorphous semiconductor region having the second conductivity type which includes the first amorphous semiconductor region and the second amorphous semiconductor region. The distance between the semiconductor substrate and the semiconductor substrate can be reduced.
  • Carriers to be collected can be collected with higher efficiency by the first amorphous semiconductor region and the second amorphous semiconductor region. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
  • a second impurity is doped into a part of the second amorphous semiconductor layer, and the inside of the second amorphous semiconductor layer
  • the method may further comprise forming a second amorphous semiconductor region.
  • the second amorphous semiconductor region may include a second impurity.
  • the second amorphous semiconductor region may be in contact with the first amorphous semiconductor region.
  • the amorphous semiconductor region having the second conductivity type which includes the first amorphous semiconductor region and the second amorphous semiconductor region. The distance between the semiconductor substrate and the semiconductor substrate can be reduced.
  • Carriers to be collected can be collected with higher efficiency by the first amorphous semiconductor region and the second amorphous semiconductor region. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
  • a tunnel dielectric layer is formed on a second surface of a semiconductor substrate, and a second amorphous semiconductor layer is formed on the tunnel dielectric layer.
  • Forming a second amorphous semiconductor region in the second amorphous semiconductor layer by doping a part of the second amorphous semiconductor layer with a second impurity. May be provided.
  • the second surface of the semiconductor substrate is covered with the tunnel dielectric layer before the second amorphous semiconductor layer is formed.
  • the semiconductor substrate is doped with the second impurity.
  • the tunnel dielectric layer can be reliably prevented.
  • the semiconductor substrate can be reliably prevented from being doped with the second impurity in the second amorphous semiconductor region.
  • the second amorphous semiconductor layer and the tunnel dielectric layer between the semiconductor substrate and the first amorphous semiconductor layer are interposed.
  • the heterojunction structure and the heterojunction structure between the semiconductor substrate and the first amorphous semiconductor region and the second amorphous semiconductor region via the tunnel dielectric layer can be reliably maintained. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
  • a part of the first amorphous semiconductor layer and a part of the second amorphous semiconductor layer are doped with the second impurity.
  • Doing may include implanting a second impurity into part of the first amorphous semiconductor layer and part of the second amorphous semiconductor layer.
  • a part of the first amorphous semiconductor layer and a part of the second amorphous semiconductor layer may be doped with the second impurity.
  • a second impurity is doped into a part of the first amorphous semiconductor layer and a part of the second amorphous semiconductor layer.
  • the first amorphous semiconductor is formed in one step of transferring the second impurity contained in the dopant-containing film to a part of the first amorphous semiconductor layer and a part of the second amorphous semiconductor layer.
  • a part of the layer and a part of the second amorphous semiconductor layer may be doped with the second impurity. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
  • forming the dopant-containing film containing the second impurity on the first amorphous semiconductor layer is the first amorphous
  • the doping paste containing the second impurity may be applied on a part of the crystalline semiconductor layer. Transferring the second impurity contained in the dopant-containing film to part of the first amorphous semiconductor layer and part of the second amorphous semiconductor layer may include heat-treating the doping paste. .
  • the second impurity can be doped into a part of the first amorphous semiconductor layer and a part of the second amorphous semiconductor layer.
  • the second impurity contained in the dopant-containing film may be a part of the first amorphous semiconductor layer and the second amorphous semiconductor. Transferring to a part of the layer may include irradiating a part of the dopant-containing film with laser light. In one step of irradiating a part of the dopant-containing film with laser light, a part of the first amorphous semiconductor layer and a part of the second amorphous semiconductor layer can be doped with the second impurity. . According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
  • forming the tunnel dielectric layer on the second surface of the semiconductor substrate may include forming the second surface of the semiconductor substrate with ozone water or It may include soaking in hydrogen peroxide solution.
  • the tunnel dielectric layer is quickly formed by a simple process of immersing the second surface of the semiconductor substrate in ozone water or hydrogen peroxide water. can do.
  • the tunnel dielectric layer in the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, forming the tunnel dielectric layer on the second surface of the semiconductor substrate thermally oxidizes the second surface of the semiconductor substrate. You may include that.
  • the tunnel dielectric layer can be formed by a simple process of thermally oxidizing the second surface of the semiconductor substrate.
  • forming the tunnel dielectric layer on the second surface of the semiconductor substrate includes forming a tunnel dielectric on the second surface of the semiconductor substrate. It may include depositing a body layer. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, the tunnel dielectric layer can be formed by a simple process of depositing the tunnel dielectric layer on the second surface of the semiconductor substrate.
  • the tunnel dielectric layer may have a thickness of 0.2 nm to 5.0 nm.
  • the tunnel dielectric layer having a thickness of 0.2 nm or more can further improve the passivation characteristics of the photoelectric conversion element.
  • the tunnel dielectric layer having a thickness of 5.0 nm or less allows carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate to be converted into the first amorphous semiconductor layer and the first amorphous semiconductor layer. Tunneling to the amorphous semiconductor region can be performed more efficiently.
  • carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate can be collected more efficiently.
  • a photoelectric conversion element can be manufactured.
  • the first electrode electrically connected to the first amorphous semiconductor layer is provided on the second surface of the semiconductor substrate. It may further include forming and forming a second electrode electrically connected to the first amorphous semiconductor region on the second surface of the semiconductor substrate.
  • the first electrode and the second electrode are not provided on the first surface side of the semiconductor substrate which is the light incident surface. An element can be manufactured. Light incident on the photoelectric conversion element is not blocked by the first electrode and the second electrode.
  • a photoelectric conversion element having a high short-circuit current JSC and improved efficiency in converting light energy into electric energy can be manufactured.
  • the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein may further include forming a dielectric layer on the first surface of the semiconductor substrate.
  • the dielectric layer functions as an antireflection film, the dielectric layer can allow more light to enter the photoelectric conversion element.
  • a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
  • the dielectric layer functions as a passivation film, the dielectric layer is such that carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate are recombined on the first surface of the semiconductor substrate. Can be suppressed.
  • a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
  • the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein further includes forming a third amorphous semiconductor layer having i-type on the first surface of the semiconductor substrate. Also good.
  • the third amorphous semiconductor layer having i-type suppresses recombination of carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate on the first surface of the semiconductor substrate. can do.
  • a photoelectric conversion element with improved passivation characteristics and efficiency of converting light energy into electric energy can be manufactured.
  • a fourth amorphous semiconductor layer having the same conductivity type as the semiconductor substrate is formed on the first surface of the semiconductor substrate. May be further provided.
  • the fourth amorphous semiconductor layer having the same conductivity type as that of the semiconductor substrate has a carrier that is close to the first surface of the semiconductor substrate among carriers generated in the semiconductor substrate when light is incident on the photoelectric conversion element. It can be pushed back into the substrate.
  • the fourth amorphous semiconductor layer can suppress recombination of the carriers on the first surface of the semiconductor substrate. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved passivation characteristics and efficiency of converting light energy into electric energy can be manufactured.
  • the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein may further include forming a concavo-convex structure on the first surface of the semiconductor substrate. By forming a concavo-convex structure on the first surface of the semiconductor substrate, which is the light incident surface, more light can be incident on the photoelectric conversion element. According to the photoelectric conversion element manufacturing method of the photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.

Abstract

A photoelectric transducer (1) comprises: a first non-crystalline semiconductor layer (17) that is of a first conductivity type, and is provided upon a second surface (11b) of a semiconductor substrate (11); and a first non-crystalline semiconductor region (16) that is of a second conductivity type different from the first conductivity type, and is provided upon the second surface (11b). The first non-crystalline semiconductor layer (17) includes a first impurity that is of the first conductivity type. The first non-crystalline semiconductor region (16) includes the first impurity and a second impurity that is of the second conductivity type. The first non-crystalline semiconductor layer (17) and the first non-crystalline semiconductor region (16) constitute a single continuous and extending layer. As a result, the photoelectric transducer (1) has improved characteristics and reliability.

Description

光電変換素子及びその製造方法Photoelectric conversion element and manufacturing method thereof
 本出願は、2015年9月18日に出願された特願2015-185468号及び特願2015-185470号に対して、優先権の利益を主張するものであり、それを参照することにより、その内容のすべてを本書に含める。 This application claims the benefit of priority to Japanese Patent Application Nos. 2015-185468 and 2015-185470 filed on Sep. 18, 2015. Include all of the content in this document.
 本発明の一態様は、光電変換素子及びその製造方法に関する。 One embodiment of the present invention relates to a photoelectric conversion element and a method for manufacturing the photoelectric conversion element.
 太陽光などの光エネルギーを電気エネルギーに変換する光電変換素子が知られている(たとえば特許文献1参照)。特許文献1には、基板上に形成されたp型非晶質半導体層とn型非晶質半導体層とをエッチングによりパターニングする工程を備える光電変換素子の製造方法が記載されている。 A photoelectric conversion element that converts light energy such as sunlight into electrical energy is known (for example, see Patent Document 1). Patent Document 1 describes a method for manufacturing a photoelectric conversion element including a step of patterning a p-type amorphous semiconductor layer and an n-type amorphous semiconductor layer formed on a substrate by etching.
特開2012-28718号公報JP 2012-28718 A
 しかし、基板上に形成されたn型非晶質半導体層をエッチングすることにより、基板の表面の一部が露出する。露出した基板の表面に汚染物質が付着することがある。また、このn型非晶質半導体層のエッチングにより基板の表面が荒れることがある。そのため、光電変換素子の特性及び信頼性が低下するという問題があった。 However, a part of the surface of the substrate is exposed by etching the n-type amorphous semiconductor layer formed on the substrate. Contaminants may adhere to the exposed substrate surface. In addition, the surface of the substrate may be roughened by the etching of the n-type amorphous semiconductor layer. Therefore, there has been a problem that the characteristics and reliability of the photoelectric conversion element deteriorate.
 本発明の一態様は、上記の課題を鑑みてなされたものであり、その目的は、向上された特性及び信頼性を有する光電変換素子及びその製造方法を提供することである。 One embodiment of the present invention has been made in view of the above problems, and an object thereof is to provide a photoelectric conversion element having improved characteristics and reliability and a method for manufacturing the photoelectric conversion element.
 本発明の第1の態様の光電変換素子は、第1の表面と第1の表面と反対側の第2の表面とを有する半導体基板と、第2の表面上に設けられるとともに、第1の導電型を有する第1の非晶質半導体層と、第2の表面上に設けられるとともに、第1の導電型と異なる第2の導電型を有する第1の非晶質半導体領域とを備える。第1の非晶質半導体層は第1の導電型を有する第1の不純物を含む。第1の非晶質半導体領域は第1の不純物と第2の導電型を有する第2の不純物とを含む。第1の非晶質半導体層及び第1の非晶質半導体領域は、連続して延在する1つの層を構成する。 The photoelectric conversion element according to the first aspect of the present invention is provided on a semiconductor substrate having a first surface and a second surface opposite to the first surface, and on the second surface. A first amorphous semiconductor layer having a conductivity type; and a first amorphous semiconductor region provided on the second surface and having a second conductivity type different from the first conductivity type. The first amorphous semiconductor layer includes a first impurity having a first conductivity type. The first amorphous semiconductor region includes a first impurity and a second impurity having a second conductivity type. The first amorphous semiconductor layer and the first amorphous semiconductor region constitute one layer that extends continuously.
 本発明の第2の態様の光電変換素子は、第1の表面と第1の表面と反対側の第2の表面とを有する半導体基板と、第2の表面上に設けられたトンネル誘電体層と、トンネル誘電体層上に設けられるとともに、第1の導電型を有する第1の非晶質半導体層と、トンネル誘電体層上に設けられるとともに、第1の導電型と異なる第2の導電型を有する第1の非晶質半導体領域とを備える。第1の非晶質半導体層は第1の導電型を有する第1の不純物を含む。第1の非晶質半導体領域は第1の不純物と第2の導電型を有する第2の不純物とを含む。第1の非晶質半導体層及び第1の非晶質半導体領域は、連続して延在する1つの層を構成する。 A photoelectric conversion element according to a second aspect of the present invention includes a semiconductor substrate having a first surface and a second surface opposite to the first surface, and a tunnel dielectric layer provided on the second surface A first amorphous semiconductor layer having a first conductivity type, and a second conductivity different from the first conductivity type, provided on the tunnel dielectric layer. And a first amorphous semiconductor region having a mold. The first amorphous semiconductor layer includes a first impurity having a first conductivity type. The first amorphous semiconductor region includes a first impurity and a second impurity having a second conductivity type. The first amorphous semiconductor layer and the first amorphous semiconductor region constitute one layer that extends continuously.
 本発明の第3の態様の光電変換素子の製造方法は、第1の表面と第1の表面と反対側の第2の表面とを有する半導体基板の第2の表面上に、第1の導電型を有する第1の非晶質半導体層を形成することを備える。第1の非晶質半導体層は第1の導電型を有する第1の不純物を含む。本発明の第3の態様の光電変換素子の製造方法は、第1の非晶質半導体層内に第2の導電型を有する第1の非晶質半導体領域を形成することをさらに備える。第1の非晶質半導体層内に第1の非晶質半導体領域を形成することは、第1の非晶質半導体層の一部に、第1の導電型と異なる第2の導電型を有する第2の不純物をドーピングすることを含む。 In the method for manufacturing a photoelectric conversion element according to the third aspect of the present invention, a first conductive material is formed on a second surface of a semiconductor substrate having a first surface and a second surface opposite to the first surface. Forming a first amorphous semiconductor layer having a mold. The first amorphous semiconductor layer includes a first impurity having a first conductivity type. The method for manufacturing a photoelectric conversion element according to the third aspect of the present invention further includes forming a first amorphous semiconductor region having the second conductivity type in the first amorphous semiconductor layer. The formation of the first amorphous semiconductor region in the first amorphous semiconductor layer means that a part of the first amorphous semiconductor layer has a second conductivity type different from the first conductivity type. Doping with a second impurity.
 本発明の第4の態様の光電変換素子の製造方法は、第1の表面と第1の表面と反対側の第2の表面とを有する半導体基板の第2の表面上にトンネル誘電体層を形成することと、トンネル誘電体層上に、第1の導電型を有する第1の非晶質半導体層を形成することとを備える。第1の非晶質半導体層は第1の導電型を有する第1の不純物を含む。本発明の第4の態様の光電変換素子の製造方法は、第1の非晶質半導体層内に第2の導電型を有する第1の非晶質半導体領域を形成することをさらに備える。第1の非晶質半導体層内に第1の非晶質半導体領域を形成することは、第1の非晶質半導体層の一部に、第1の導電型と異なる第2の導電型を有する第2の不純物をドーピングすることを含む。 According to a fourth aspect of the present invention, there is provided a method for manufacturing a photoelectric conversion element comprising: forming a tunnel dielectric layer on a second surface of a semiconductor substrate having a first surface and a second surface opposite to the first surface. Forming a first amorphous semiconductor layer having a first conductivity type on the tunnel dielectric layer. The first amorphous semiconductor layer includes a first impurity having a first conductivity type. The method for manufacturing a photoelectric conversion element according to the fourth aspect of the present invention further includes forming a first amorphous semiconductor region having the second conductivity type in the first amorphous semiconductor layer. The formation of the first amorphous semiconductor region in the first amorphous semiconductor layer means that a part of the first amorphous semiconductor layer has a second conductivity type different from the first conductivity type. Doping with a second impurity.
 本発明の第1及び第2の態様の光電変換素子によれば、向上された特性及び信頼性を有する光電変換素子を提供することができる。 According to the photoelectric conversion element of the first and second aspects of the present invention, a photoelectric conversion element having improved characteristics and reliability can be provided.
 本発明の第3及び第4の態様の光電変換素子の製造方法によれば、向上された特性及び信頼性を有する光電変換素子の製造方法を提供することができる。 According to the method for manufacturing a photoelectric conversion element of the third and fourth aspects of the present invention, it is possible to provide a method for manufacturing a photoelectric conversion element having improved characteristics and reliability.
実施の形態1から実施の形態7に係る光電変換素子の概略平面図である。7 is a schematic plan view of a photoelectric conversion element according to Embodiments 1 to 7. FIG. 実施の形態1から実施の形態3に係る光電変換素子の、図1に示す断面線II-IIにおける概略断面図である。FIG. 2 is a schematic cross-sectional view of the photoelectric conversion element according to Embodiments 1 to 3 along a cross-sectional line II-II shown in FIG. 実施の形態1から実施の形態6及び実施の形態8から実施の形態13に係る光電変換素子の製造方法における一工程を示す概略断面図である。It is a schematic sectional drawing which shows 1 process in the manufacturing method of the photoelectric conversion element which concerns on Embodiment 1 to Embodiment 6 and Embodiment 8 to Embodiment 13. FIG. 実施の形態1から実施の形態6及び実施の形態8から実施の形態13に係る光電変換素子の製造方法における、図3に示す工程の次工程を示す概略断面図である。FIG. 7 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 3 in the method for manufacturing the photoelectric conversion element according to Embodiment 1 to Embodiment 6 and Embodiment 8 to Embodiment 13. 実施の形態1から実施の形態6に係る光電変換素子の製造方法における、図4に示す工程の次工程を示す概略断面図である。FIG. 5 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 4 in the method for manufacturing the photoelectric conversion element according to Embodiment 1 to Embodiment 6. 実施の形態1から実施の形態6に係る光電変換素子の製造方法における、図5に示す工程の次工程を示す概略断面図である。FIG. 6 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 5 in the method for manufacturing the photoelectric conversion element according to Embodiment 1 to Embodiment 6. 実施の形態1から実施の形態6に係る光電変換素子の製造方法における、図6に示す工程の次工程を示す概略断面図である。It is a schematic sectional drawing which shows the next process of the process shown in FIG. 6 in the manufacturing method of the photoelectric conversion element which concerns on Embodiment 1 to Embodiment 6. FIG. 実施の形態1から実施の形態6に係る光電変換素子の製造方法における、図7に示す工程の次工程を示す概略断面図である。FIG. 8 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 7 in the method for manufacturing the photoelectric conversion element according to Embodiment 1 to Embodiment 6. 実施の形態1に係る光電変換素子の製造方法における、図8に示す工程の次工程を示す概略断面図である。FIG. 9 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 8 in the method for manufacturing the photoelectric conversion element according to Embodiment 1. 実施の形態2及び実施の形態5に係る光電変換素子の製造方法における、図8に示す工程の次工程を示す概略断面図である。FIG. 9 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 8 in the method for manufacturing the photoelectric conversion element according to Embodiment 2 and Embodiment 5. 実施の形態2に係る光電変換素子の製造方法における、図10に示す工程の次工程を示す概略断面図である。FIG. 11 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 10 in the method for manufacturing a photoelectric conversion element according to Embodiment 2. 実施の形態3及び実施の形態6に係る光電変換素子の製造方法における、図8に示す工程の次工程を示す概略断面図である。FIG. 9 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 8 in the method for manufacturing the photoelectric conversion element according to Embodiment 3 and Embodiment 6. 実施の形態3に係る光電変換素子の製造方法における、図12に示す工程の次工程を示す概略断面図である。FIG. 13 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 12 in the method for manufacturing the photoelectric conversion element according to Embodiment 3. 実施の形態4から実施の形態6に係る光電変換素子の、図1に示す断面線XIV-XIVにおける概略断面図である。FIG. 7 is a schematic cross-sectional view of the photoelectric conversion element according to any of Embodiments 4 to 6 along a cross-sectional line XIV-XIV shown in FIG. 実施の形態4に係る光電変換素子の製造方法における、図8に示す工程の次の工程を示す概略断面図である。FIG. 9 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 8 in the method for manufacturing a photoelectric conversion element according to Embodiment 4. 実施の形態5に係る光電変換素子の製造方法における、図10に示す工程の次工程を示す概略断面図である。FIG. 11 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 10 in the method for manufacturing the photoelectric conversion element according to Embodiment 5. 実施の形態6に係る光電変換素子の製造方法における、図12に示す工程の次工程を示す概略断面図である。FIG. 13 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 12 in the method for manufacturing the photoelectric conversion element according to Embodiment 6. 実施の形態7に係る光電変換素子の、図1に示す断面線XVIII-XVIIIにおける概略断面図である。FIG. 8 is a schematic cross-sectional view of the photoelectric conversion element according to Embodiment 7 taken along a cross-sectional line XVIII-XVIII shown in FIG. 実施の形態8から実施の形態14に係る光電変換素子の概略平面図である。It is a schematic plan view of the photoelectric conversion element according to Embodiments 8 to 14. 実施の形態8から実施の形態10に係る光電変換素子の、図19に示す断面線XX-XXにおける概略断面図である。FIG. 20 is a schematic cross-sectional view of the photoelectric conversion element according to any of Embodiments 8 to 10 along a cross-sectional line XX-XX shown in FIG. 実施の形態8から実施の形態13に係る光電変換素子の製造方法における、図4に示す工程の次工程を示す概略断面図である。It is a schematic sectional drawing which shows the next process of the process shown in FIG. 4 in the manufacturing method of the photoelectric conversion element which concerns on Embodiment 8 to Embodiment 13. FIG. 実施の形態8から実施の形態13に係る光電変換素子の製造方法における、図21に示す工程の次工程を示す概略断面図である。FIG. 22 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 21 in the method for manufacturing the photoelectric conversion element according to the eighth to thirteenth embodiments. 実施の形態8から実施の形態13に係る光電変換素子の製造方法における、図22に示す工程の次工程を示す概略断面図である。FIG. 23 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 22 in the method for manufacturing the photoelectric conversion element according to the eighth to thirteenth embodiments. 実施の形態8から実施の形態13に係る光電変換素子の製造方法における、図23に示す工程の次工程を示す概略断面図である。FIG. 24 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 23 in the method for manufacturing the photoelectric conversion element according to the eighth to thirteenth embodiments. 実施の形態8から実施の形態13に係る光電変換素子の製造方法における、図24に示す工程の次工程を示す概略断面図である。It is a schematic sectional drawing which shows the next process of the process shown in FIG. 24 in the manufacturing method of the photoelectric conversion element which concerns on Embodiment 8 to Embodiment 13. FIG. 実施の形態8に係る光電変換素子の製造方法における、図25に示す工程の次工程を示す概略断面図である。FIG. 26 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 25 in the method for manufacturing a photoelectric conversion element according to Embodiment 8. 実施の形態9及び実施の形態12に係る光電変換素子の製造方法における、図25に示す工程の次工程を示す概略断面図である。It is a schematic sectional drawing which shows the next process of the process shown in FIG. 25 in the manufacturing method of the photoelectric conversion element which concerns on Embodiment 9 and Embodiment 12. FIG. 実施の形態9に係る光電変換素子の製造方法における、図27に示す工程の次工程を示す概略断面図である。FIG. 28 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 27 in the method for manufacturing the photoelectric conversion element according to Embodiment 9. 実施の形態10及び実施の形態13に係る光電変換素子の製造方法における、図25に示す工程の次工程を示す概略断面図である。It is a schematic sectional drawing which shows the next process of the process shown in FIG. 25 in the manufacturing method of the photoelectric conversion element which concerns on Embodiment 10 and Embodiment 13. FIG. 実施の形態10に係る光電変換素子の製造方法における、図29に示す工程の次工程を示す概略断面図である。FIG. 30 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 29 in the method for manufacturing the photoelectric conversion element according to Embodiment 10. 実施の形態11から実施の形態13に係る光電変換素子の、図19に示す断面線XXXI-XXXIにおける概略断面図である。FIG. 20 is a schematic cross sectional view of the photoelectric conversion element according to any of the eleventh to thirteenth embodiments, taken along a sectional line XXXI-XXXI shown in FIG. 実施の形態11に係る光電変換素子の製造方法における、図25に示す工程の次の工程を示す概略断面図である。FIG. 26 is a schematic sectional view showing a step subsequent to the step shown in FIG. 25 in the method for manufacturing the photoelectric conversion element according to the eleventh embodiment. 実施の形態12に係る光電変換素子の製造方法における、図27に示す工程の次工程を示す概略断面図である。FIG. 28 is a schematic sectional view showing a step subsequent to the step shown in FIG. 27 in the method for manufacturing a photoelectric conversion element according to the twelfth embodiment. 実施の形態13に係る光電変換素子の製造方法における、図29に示す工程の次工程を示す概略断面図である。FIG. 30 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 29 in the method for manufacturing the photoelectric conversion element according to Embodiment 13. 実施の形態14に係る光電変換素子の、図19に示す断面線XXXV-XXXVにおける概略断面図である。FIG. 20 is a schematic cross sectional view of the photoelectric conversion element according to Embodiment 14 taken along a cross sectional line XXXV-XXXV shown in FIG.
 以下、本発明の実施の形態について説明する。なお、同一の構成には同一の参照番号を付し、その説明は繰り返さない。 Hereinafter, embodiments of the present invention will be described. The same components are denoted by the same reference numerals, and description thereof will not be repeated.
 (実施の形態1)
 図1及び図2を参照して、実施の形態1に係る光電変換素子1を説明する。本実施の形態の光電変換素子1は、半導体基板11と、第1の非晶質半導体層17と、第1の非晶質半導体領域16と、第1の電極19と、第2の電極18とを主に備える。
(Embodiment 1)
With reference to FIG.1 and FIG.2, the photoelectric conversion element 1 which concerns on Embodiment 1 is demonstrated. The photoelectric conversion element 1 of the present embodiment includes a semiconductor substrate 11, a first amorphous semiconductor layer 17, a first amorphous semiconductor region 16, a first electrode 19, and a second electrode 18. And mainly.
 半導体基板11は、n型またはp型の半導体基板であってもよい。本実施の形態では、半導体基板11として、n型単結晶シリコン基板が用いられている。半導体基板11は、第1の表面11aと、第1の表面11aと反対側の第2の表面11bとを有している。半導体基板11の第1の表面11aは、光の入射面であってもよい。半導体基板11の第1の表面11a及び第2の表面11bは、第1の方向(例えば、x方向)と、第1の方向(例えば、x方向)と交差する第2の方向(例えば、y方向)とに延在する。半導体基板11の厚さ方向は、第1の方向(例えば、x方向)及び第2の方向(例えば、y方向)と交差する第3の方向(例えば、z方向)である。 The semiconductor substrate 11 may be an n-type or p-type semiconductor substrate. In the present embodiment, an n-type single crystal silicon substrate is used as the semiconductor substrate 11. The semiconductor substrate 11 has a first surface 11a and a second surface 11b opposite to the first surface 11a. The first surface 11a of the semiconductor substrate 11 may be a light incident surface. The first surface 11a and the second surface 11b of the semiconductor substrate 11 have a first direction (for example, x direction) and a second direction (for example, y direction) that intersects the first direction (for example, x direction). Direction). The thickness direction of the semiconductor substrate 11 is a third direction (for example, z direction) that intersects the first direction (for example, x direction) and the second direction (for example, y direction).
 本実施の形態の光電変換素子1は、半導体基板11の第2の表面11b上に、i型を有する第2の非晶質半導体層15を備えてもよい。第1の非晶質半導体層17と半導体基板11の第2の表面11bとの間及び第1の非晶質半導体領域16と半導体基板11の第2の表面11bとの間に、i型を有する第2の非晶質半導体層15が設けられてもよい。特定的には、第2の非晶質半導体層15は、半導体基板11の第2の表面11bと接してもよい。本実施の形態では、第2の非晶質半導体層15として、i型の非晶質シリコン膜が用いられている。i型を有する第2の非晶質半導体層15は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第2の表面11bにおいて再結合することを抑制することができる。i型を有する第2の非晶質半導体層15は、光電変換素子1のパッシベーション特性を向上させることができる。 The photoelectric conversion element 1 according to the present embodiment may include a second amorphous semiconductor layer 15 having i-type on the second surface 11 b of the semiconductor substrate 11. An i-type is formed between the first amorphous semiconductor layer 17 and the second surface 11b of the semiconductor substrate 11 and between the first amorphous semiconductor region 16 and the second surface 11b of the semiconductor substrate 11. A second amorphous semiconductor layer 15 may be provided. Specifically, the second amorphous semiconductor layer 15 may be in contact with the second surface 11 b of the semiconductor substrate 11. In the present embodiment, an i-type amorphous silicon film is used as the second amorphous semiconductor layer 15. In the second amorphous semiconductor layer 15 having i-type, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the second surface 11 b of the semiconductor substrate 11. Recombination can be suppressed. The i-type second amorphous semiconductor layer 15 can improve the passivation characteristics of the photoelectric conversion element 1.
 本明細書において、「非晶質半導体」は、半導体を構成する原子の未結合手(ダングリングボンド)が水素で終端されていない非晶質半導体だけでなく、水素化非晶質シリコンなどの半導体を構成する原子の未結合手が水素で終端された非晶質半導体も含む。本明細書において、「i型半導体」は、完全な真性の半導体だけでなく、十分に低濃度(n型不純物濃度が1×1015個/cm3未満、かつp型不純物濃度が1×1015個/cm3未満)のn型またはp型の不純物が混入された半導体も含む。 In this specification, “amorphous semiconductor” means not only an amorphous semiconductor in which dangling bonds of atoms constituting the semiconductor are not terminated with hydrogen, but also hydrogenated amorphous silicon and the like. Also included is an amorphous semiconductor in which dangling bonds of atoms constituting the semiconductor are terminated with hydrogen. In this specification, “i-type semiconductor” is not only a completely intrinsic semiconductor but also a sufficiently low concentration (the n-type impurity concentration is less than 1 × 10 15 / cm 3 and the p-type impurity concentration is 1 × 10 Also included is a semiconductor mixed with n-type or p-type impurities of less than 15 / cm 3 .
 本実施の形態の光電変換素子1は、半導体基板11の第2の表面11b上に、第1の導電型を有する第1の非晶質半導体層17を備える。特定的には、半導体基板11と反対側の第2の非晶質半導体層15の表面上に、第1の導電型を有する第1の非晶質半導体層17が設けられてもよい。第1の非晶質半導体層17は、第1の導電型を有する第1の不純物を含む。第1の非晶質半導体層17は、p型またはn型の非晶質半導体層であり得る。第1の不純物は、ボロンのようなp型の不純物であってもよいし、燐のようなn型の不純物であってもよい。本実施の形態では、第1の不純物はボロンのようなp型の不純物であり、第1の非晶質半導体層17はp型の非晶質シリコン膜である。 The photoelectric conversion element 1 of the present embodiment includes the first amorphous semiconductor layer 17 having the first conductivity type on the second surface 11b of the semiconductor substrate 11. Specifically, the first amorphous semiconductor layer 17 having the first conductivity type may be provided on the surface of the second amorphous semiconductor layer 15 opposite to the semiconductor substrate 11. The first amorphous semiconductor layer 17 includes a first impurity having the first conductivity type. The first amorphous semiconductor layer 17 may be a p-type or n-type amorphous semiconductor layer. The first impurity may be a p-type impurity such as boron or an n-type impurity such as phosphorus. In the present embodiment, the first impurity is a p-type impurity such as boron, and the first amorphous semiconductor layer 17 is a p-type amorphous silicon film.
 本実施の形態の光電変換素子1は、第1の非晶質半導体層17内に設けられるとともに、第1の導電型と異なる第2の導電型を有する第1の非晶質半導体領域16を備える。本実施の形態の光電変換素子1は、半導体基板11の第2の表面11b上に設けられるとともに、第1の導電型と異なる第2の導電型を有する第1の非晶質半導体領域16を備える。第1の非晶質半導体層17及び第1の非晶質半導体領域16は、連続して延在する1つの層を構成する。半導体基板11とは反対側の、第1の非晶質半導体層17及び第1の非晶質半導体領域16の表面は、連続して延在する1つの表面を構成してもよい。 The photoelectric conversion element 1 according to the present embodiment is provided in the first amorphous semiconductor layer 17 and includes a first amorphous semiconductor region 16 having a second conductivity type different from the first conductivity type. Prepare. The photoelectric conversion element 1 of the present embodiment is provided on the second surface 11b of the semiconductor substrate 11 and includes a first amorphous semiconductor region 16 having a second conductivity type different from the first conductivity type. Prepare. The first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 constitute one layer that extends continuously. The surfaces of the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 on the side opposite to the semiconductor substrate 11 may constitute one surface extending continuously.
 第1の非晶質半導体領域16は、第1の導電型を有する第1の不純物と、第1の導電型と異なる第2の導電型を有する第2の不純物とを含む。第1の非晶質半導体領域16は、第1の導電型を有する第1の不純物よりも第2の導電型を有する第2の不純物を多く含む等の理由により、第1の非晶質半導体領域16は全体として第2の導電型を有する。第1の非晶質半導体領域16は、n型またはp型の非晶質半導体領域であり得る。第2の不純物は、燐のようなn型の不純物であってもよいし、ボロンのようなp型の不純物であってもよい。本実施の形態では、第2の不純物は燐のようなn型の不純物であり、第1の非晶質半導体領域16はn型の非晶質シリコン領域である。第1の非晶質半導体領域16は、第2の方向(例えば、y方向)に延在するストライプ状に設けられてもよい。 The first amorphous semiconductor region 16 includes a first impurity having a first conductivity type and a second impurity having a second conductivity type different from the first conductivity type. The first amorphous semiconductor region 16 contains the second impurity having the second conductivity type more than the first impurity having the first conductivity type. Region 16 as a whole has the second conductivity type. The first amorphous semiconductor region 16 may be an n-type or p-type amorphous semiconductor region. The second impurity may be an n-type impurity such as phosphorus or a p-type impurity such as boron. In the present embodiment, the second impurity is an n-type impurity such as phosphorus, and the first amorphous semiconductor region 16 is an n-type amorphous silicon region. The first amorphous semiconductor region 16 may be provided in a stripe shape extending in the second direction (for example, the y direction).
 第1の非晶質半導体領域16における第1の不純物の濃度は、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向、すなわち、第1の方向(例えば、x方向)において一定であってもよい。本明細書において、第1の非晶質半導体領域16における第1の不純物の濃度が、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向において一定であるとは、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向における、第1の非晶質半導体領域16内の第1の不純物の濃度のばらつきが、この方向における第1の非晶質半導体領域16内の第1の不純物の平均濃度の30%以内であることをいう。 The concentration of the first impurity in the first amorphous semiconductor region 16 is the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged, that is, the first May be constant in the direction (for example, the x direction). In this specification, the concentration of the first impurity in the first amorphous semiconductor region 16 is such that the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged. Is constant in the first amorphous semiconductor region 16 in the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged. It means that the variation in the concentration of the impurity is within 30% of the average concentration of the first impurity in the first amorphous semiconductor region 16 in this direction.
 第1の非晶質半導体領域16における第1の不純物の濃度は、第1の非晶質半導体層17における第1の不純物の濃度と実質的に同じであってもよい。本明細書において、第1の非晶質半導体領域16における第1の不純物の濃度が、第1の非晶質半導体層17における第1の不純物の濃度と実質的に同じであることは、第1の非晶質半導体領域16における第1の不純物の平均濃度と第1の非晶質半導体層17における第1の不純物の平均濃度との差が、第1の非晶質半導体層17における第1の不純物の平均濃度の20%以内であるこという。 The concentration of the first impurity in the first amorphous semiconductor region 16 may be substantially the same as the concentration of the first impurity in the first amorphous semiconductor layer 17. In the present specification, the concentration of the first impurity in the first amorphous semiconductor region 16 is substantially the same as the concentration of the first impurity in the first amorphous semiconductor layer 17. The difference between the average concentration of the first impurity in one amorphous semiconductor region 16 and the average concentration of the first impurity in the first amorphous semiconductor layer 17 is the first concentration in the first amorphous semiconductor layer 17. It is within 20% of the average concentration of one impurity.
 第1の非晶質半導体領域16における第2の不純物の濃度は、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向、すなわち、第1の方向(例えば、x方向)において一定であってもよい。本明細書において、第1の非晶質半導体領域16における第2の不純物の濃度が、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向において一定であるとは、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向における、第1の非晶質半導体領域16内の第2の不純物の濃度のばらつきが、この方向における第1の非晶質半導体領域16内の第2の不純物の平均濃度の30%以内であることをいう。 The concentration of the second impurity in the first amorphous semiconductor region 16 is the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged, that is, the first May be constant in the direction (for example, the x direction). In this specification, the concentration of the second impurity in the first amorphous semiconductor region 16 is such that the first amorphous semiconductor region 16 and the first amorphous semiconductor layer 17 are alternately arranged. Is constant in the second amorphous silicon region 16 in the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged. The variation in the impurity concentration is within 30% of the average concentration of the second impurity in the first amorphous semiconductor region 16 in this direction.
 本実施の形態の光電変換素子1は、第1の非晶質半導体層17と電気的に接続される第1の電極19を備える。第1の電極19は、半導体基板11の第2の表面11b上に設けられてもよい。より特定的には、第1の電極19は、第1の非晶質半導体層17上に設けられてもよい。第1の電極19は、第2の方向(例えば、y方向)に延在するストライプ状に設けられてもよい。第1の電極19として、金属電極が例示され得る。本実施の形態では、第1の電極19として、銀(Ag)が用いられている。本実施の形態では、第1の電極19は、p型電極であってもよい。 The photoelectric conversion element 1 of the present embodiment includes a first electrode 19 that is electrically connected to the first amorphous semiconductor layer 17. The first electrode 19 may be provided on the second surface 11 b of the semiconductor substrate 11. More specifically, the first electrode 19 may be provided on the first amorphous semiconductor layer 17. The first electrode 19 may be provided in a stripe shape extending in the second direction (for example, the y direction). A metal electrode may be exemplified as the first electrode 19. In the present embodiment, silver (Ag) is used as the first electrode 19. In the present embodiment, the first electrode 19 may be a p-type electrode.
 本実施の形態の光電変換素子1は、第1の非晶質半導体領域16と電気的に接続される第2の電極18を備える。第2の電極18は、半導体基板11の第2の表面11b上に設けられてもよい。より特定的には、第2の電極18は、第1の非晶質半導体領域16上に設けられてもよい。第2の電極18は、第2の方向(例えば、y方向)に延在するストライプ状に設けられてもよい。第2の電極18として、金属電極が例示され得る。本実施の形態では、第2の電極18として、銀(Ag)が用いられている。本実施の形態では、第2の電極18は、n型電極であってもよい。 The photoelectric conversion element 1 of this embodiment includes a second electrode 18 that is electrically connected to the first amorphous semiconductor region 16. The second electrode 18 may be provided on the second surface 11 b of the semiconductor substrate 11. More specifically, the second electrode 18 may be provided on the first amorphous semiconductor region 16. The second electrode 18 may be provided in a stripe shape extending in the second direction (for example, the y direction). A metal electrode may be exemplified as the second electrode 18. In the present embodiment, silver (Ag) is used as the second electrode 18. In the present embodiment, the second electrode 18 may be an n-type electrode.
 本実施の形態の光電変換素子1では、半導体基板11と第1の非晶質半導体層17とが第2の非晶質半導体層15を介してヘテロ接合するとともに、半導体基板11と第1の非晶質半導体領域16とが第2の非晶質半導体層15を介してヘテロ接合する。そのため、光電変換素子1は、向上されたパッシベーション特性と高い開放電圧VOCとを有する。本実施の形態の光電変換素子1によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 In the photoelectric conversion element 1 of the present embodiment, the semiconductor substrate 11 and the first amorphous semiconductor layer 17 are heterojunction through the second amorphous semiconductor layer 15, and the semiconductor substrate 11 and the first amorphous semiconductor layer 17 are connected. The amorphous semiconductor region 16 is heterojunction with the second amorphous semiconductor layer 15. Therefore, the photoelectric conversion element 1 has improved passivation characteristics and a high open circuit voltage V OC . According to the photoelectric conversion element 1 of the present embodiment, the efficiency of converting light energy into electrical energy can be improved.
 本実施の形態の光電変換素子1では、半導体基板11の第1の表面11aは、凹凸構造を含んでもよい。第1の表面11a側から光電変換素子1に光は入射する。光の入射面である半導体基板11の第1の表面11a上に凹凸構造を設けることによって、半導体基板11の第1の表面11aにおいて入射光が反射されることが抑制され得て、より多くの光が光電変換素子1内に入射され得る。光電変換素子1において光エネルギーを電気エネルギーに変換する効率が向上され得る。 In the photoelectric conversion element 1 of the present embodiment, the first surface 11a of the semiconductor substrate 11 may include an uneven structure. Light enters the photoelectric conversion element 1 from the first surface 11a side. By providing the concavo-convex structure on the first surface 11a of the semiconductor substrate 11 that is the light incident surface, reflection of incident light on the first surface 11a of the semiconductor substrate 11 can be suppressed, and more Light can enter the photoelectric conversion element 1. The efficiency of converting light energy into electric energy in the photoelectric conversion element 1 can be improved.
 本実施の形態の光電変換素子1は、半導体基板11の第1の表面11a上に、i型を有する第3の非晶質半導体層12を備えてもよい。半導体基板11の第1の表面11a上にi型を有する第3の非晶質半導体層12を設けることにより、半導体基板11の第1の表面11aにおけるパッシベーション特性が向上され得る。 The photoelectric conversion element 1 of the present embodiment may include an i-type third amorphous semiconductor layer 12 on the first surface 11 a of the semiconductor substrate 11. By providing the i-type third amorphous semiconductor layer 12 on the first surface 11 a of the semiconductor substrate 11, the passivation characteristics on the first surface 11 a of the semiconductor substrate 11 can be improved.
 本実施の形態の光電変換素子1は、半導体基板11の第1の表面11a上に、半導体基板11と同じ導電型を有する第4の非晶質半導体層13を備えてもよい。特定的には、i型を有する第3の非晶質半導体層12上に、半導体基板11と同じ導電型を有する第4の非晶質半導体層13が設けられてもよい。第4の非晶質半導体層13は、n型またはp型の非晶質半導体層であり得る。本実施の形態では、第4の非晶質半導体層13として、n型の非晶質シリコン膜が用いられている。 The photoelectric conversion element 1 of the present embodiment may include a fourth amorphous semiconductor layer 13 having the same conductivity type as the semiconductor substrate 11 on the first surface 11 a of the semiconductor substrate 11. Specifically, a fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 may be provided on the third amorphous semiconductor layer 12 having i type. The fourth amorphous semiconductor layer 13 can be an n-type or p-type amorphous semiconductor layer. In the present embodiment, an n-type amorphous silicon film is used as the fourth amorphous semiconductor layer 13.
 半導体基板11と同じ導電型を有する第4の非晶質半導体層13は、表面電界層として機能してもよい。光電変換素子1に光が入射することによって、半導体基板11内にキャリアが発生する。半導体基板11と同じ導電型を有する第4の非晶質半導体層13は半導体基板11の第1の表面11a近傍に電界を生じさせて、半導体基板11の第1の表面11a近傍においてエネルギーバンドを湾曲させる。この電界とエネルギーバンドの湾曲とによって、半導体基板11の第1の表面11aに近づくキャリアは半導体基板11の内部に押し戻される。そのため、半導体基板11の第1の表面11aにおいて、キャリアが再結合することが抑制され得る。 The fourth amorphous semiconductor layer 13 having the same conductivity type as the semiconductor substrate 11 may function as a surface electric field layer. When light enters the photoelectric conversion element 1, carriers are generated in the semiconductor substrate 11. The fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 generates an electric field in the vicinity of the first surface 11a of the semiconductor substrate 11, and an energy band is generated in the vicinity of the first surface 11a of the semiconductor substrate 11. Curve. Carriers approaching the first surface 11 a of the semiconductor substrate 11 are pushed back into the semiconductor substrate 11 by the electric field and the curvature of the energy band. Therefore, recombination of carriers on the first surface 11a of the semiconductor substrate 11 can be suppressed.
 半導体基板11の第1の表面11aの上に、誘電体層14が設けられてもよい。誘電体層14は、単層で構成されてもよいし、複数層で構成されてもよい。誘電体層14の材料として、窒化シリコン(SiNx)、酸化シリコン(SiOx)が例示され得る。誘電体層14は、反射防止膜として機能してもよい。誘電体層14は、パッシベーション膜として機能してもよい。 A dielectric layer 14 may be provided on the first surface 11 a of the semiconductor substrate 11. The dielectric layer 14 may be composed of a single layer or a plurality of layers. Examples of the material of the dielectric layer 14 include silicon nitride (SiN x ) and silicon oxide (SiO x ). The dielectric layer 14 may function as an antireflection film. The dielectric layer 14 may function as a passivation film.
 図3から図9を参照して、本実施の形態の光電変換素子1の製造方法の一例について以下説明する。 An example of a method for manufacturing the photoelectric conversion element 1 of the present embodiment will be described below with reference to FIGS.
 図3を参照して、第1の表面11aと第1の表面11aと反対側の第2の表面11bとを有する半導体基板11が用意される。図4を参照して、半導体基板11の第1の表面11aに凹凸構造が形成されてもよい。例えば、n型単結晶シリコン基板である半導体基板11の第1の表面11aを水酸化カリウム(KOH)を用いて異方性的にエッチングすることによって、半導体基板11の第1の表面11aに凹凸構造が形成されてもよい。 Referring to FIG. 3, a semiconductor substrate 11 having a first surface 11a and a second surface 11b opposite to the first surface 11a is prepared. With reference to FIG. 4, an uneven structure may be formed on first surface 11 a of semiconductor substrate 11. For example, the first surface 11a of the semiconductor substrate 11 which is an n-type single crystal silicon substrate is anisotropically etched using potassium hydroxide (KOH), whereby the first surface 11a of the semiconductor substrate 11 is uneven. A structure may be formed.
 図5を参照して、半導体基板11の第1の表面11a上に、i型を有する第3の非晶質半導体層12が形成されてもよい。半導体基板11の第1の表面11a上に、半導体基板11と同じ導電型を有する第4の非晶質半導体層13が形成されてもよい。特定的には、i型を有する第3の非晶質半導体層12上に、半導体基板11と同じ導電型を有する第4の非晶質半導体層13が形成されてもよい。第3の非晶質半導体層12及び第4の非晶質半導体層13の形成方法は、特に限定されないが、たとえばプラズマ化学的気相堆積(CVD)法であり得る。 Referring to FIG. 5, i-type third amorphous semiconductor layer 12 may be formed on first surface 11 a of semiconductor substrate 11. A fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 may be formed on the first surface 11 a of the semiconductor substrate 11. Specifically, a fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 may be formed on the i-type third amorphous semiconductor layer 12. A method for forming the third amorphous semiconductor layer 12 and the fourth amorphous semiconductor layer 13 is not particularly limited, and may be, for example, a plasma chemical vapor deposition (CVD) method.
 図6を参照して、半導体基板11の第1の表面11a上に誘電体層14が形成されてもよい。特定的には、半導体基板11と同じ導電型を有する第4の非晶質半導体層13上に誘電体層14が形成されてもよい。誘電体層14の形成方法は、特に限定されないが、たとえばプラズマ化学的気相堆積(CVD)法であり得る。 Referring to FIG. 6, dielectric layer 14 may be formed on first surface 11 a of semiconductor substrate 11. Specifically, the dielectric layer 14 may be formed on the fourth amorphous semiconductor layer 13 having the same conductivity type as the semiconductor substrate 11. The formation method of the dielectric layer 14 is not particularly limited, but may be, for example, a plasma chemical vapor deposition (CVD) method.
 図7を参照して、半導体基板11の第2の表面11b上に、i型を有する第2の非晶質半導体層15が形成されてもよい。図8を参照して、半導体基板11の第2の表面11b上に、第1の導電型を有する第1の非晶質半導体層17が形成される。特定的には、i型を有する第2の非晶質半導体層15上に、第1の導電型を有する第1の非晶質半導体層17が形成される。第1の非晶質半導体層17は、第1の導電型を有する第1の不純物を含む。第2の非晶質半導体層15及び第1の非晶質半導体層17の形成方法は、特に限定されないが、たとえばプラズマ化学的気相堆積(CVD)法であり得る。 Referring to FIG. 7, an i-type second amorphous semiconductor layer 15 may be formed on the second surface 11 b of the semiconductor substrate 11. Referring to FIG. 8, first amorphous semiconductor layer 17 having the first conductivity type is formed on second surface 11 b of semiconductor substrate 11. Specifically, the first amorphous semiconductor layer 17 having the first conductivity type is formed on the second amorphous semiconductor layer 15 having the i type. The first amorphous semiconductor layer 17 includes a first impurity having the first conductivity type. A method for forming the second amorphous semiconductor layer 15 and the first amorphous semiconductor layer 17 is not particularly limited, and may be, for example, a plasma chemical vapor deposition (CVD) method.
 図9を参照して、第1の非晶質半導体層17内に第2の導電型を有する第1の非晶質半導体領域16が形成される。第1の非晶質半導体層17内に第1の非晶質半導体領域16を形成することは、第1の非晶質半導体層17の一部に、第1の導電型と異なる第2の導電型を有する第2の不純物をドーピングすることを含む。第1の非晶質半導体領域16は、第1の導電型を有する第1の不純物と、第1の導電型と異なる第2の導電型を有する第2の不純物とを含む。第1の非晶質半導体領域16は、第1の導電型を有する第1の不純物よりも第2の導電型を有する第2の不純物を多く含む等の理由により、第1の非晶質半導体領域16は全体として第2の導電型を有する。 Referring to FIG. 9, the first amorphous semiconductor region 16 having the second conductivity type is formed in the first amorphous semiconductor layer 17. The formation of the first amorphous semiconductor region 16 in the first amorphous semiconductor layer 17 means that a second portion different from the first conductivity type is formed in a part of the first amorphous semiconductor layer 17. Doping with a second impurity having a conductivity type. The first amorphous semiconductor region 16 includes a first impurity having a first conductivity type and a second impurity having a second conductivity type different from the first conductivity type. The first amorphous semiconductor region 16 contains the second impurity having the second conductivity type more than the first impurity having the first conductivity type. Region 16 as a whole has the second conductivity type.
 第1の非晶質半導体領域16における第1の不純物の濃度は、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向において一定であってもよい。第1の非晶質半導体領域16における第1の不純物の濃度は、第1の非晶質半導体層17における第1の不純物の濃度と実質的に同じであってもよい。第1の非晶質半導体領域16は、第1の非晶質半導体層17の全厚さにわたって存在してもよい。 The concentration of the first impurity in the first amorphous semiconductor region 16 is constant in the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged. Also good. The concentration of the first impurity in the first amorphous semiconductor region 16 may be substantially the same as the concentration of the first impurity in the first amorphous semiconductor layer 17. The first amorphous semiconductor region 16 may exist over the entire thickness of the first amorphous semiconductor layer 17.
 第1の非晶質半導体層17の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17の一部に第2の不純物をイオン注入することを含んでもよい。すなわち、イオン注入法によって、第1の非晶質半導体層17の一部に第2の不純物がドーピングされてもよい。具体的には、第2の不純物のイオンビーム21を第1の非晶質半導体層17の一部に照射することによって、第1の非晶質半導体層17の一部に第2の不純物がドーピングされてもよい。こうして第1の非晶質半導体層17内に第2の導電型を有する第1の非晶質半導体領域16が形成されてもよい。 Doping the second impurity in part of the first amorphous semiconductor layer 17 may include ion implantation of the second impurity in part of the first amorphous semiconductor layer 17. That is, the second impurity may be doped into part of the first amorphous semiconductor layer 17 by ion implantation. Specifically, by irradiating a part of the first amorphous semiconductor layer 17 with the ion beam 21 of the second impurity, the second impurity is applied to a part of the first amorphous semiconductor layer 17. It may be doped. Thus, the first amorphous semiconductor region 16 having the second conductivity type may be formed in the first amorphous semiconductor layer 17.
 第1の非晶質半導体層17の一部に第2の不純物がドーピングされる際に、第1の非晶質半導体層17の他の部分に第2の不純物がドープされること防ぐために、第1の非晶質半導体層17の一部に対応する開口部を有するとともに第1の非晶質半導体層17の他の部分を覆うマスク22が用いられてもよい。 In order to prevent the second impurity from being doped in the other part of the first amorphous semiconductor layer 17 when the second impurity is doped in a part of the first amorphous semiconductor layer 17, A mask 22 having an opening corresponding to a part of the first amorphous semiconductor layer 17 and covering the other part of the first amorphous semiconductor layer 17 may be used.
 第1の非晶質半導体層17の一部に第2の不純物がドーピングされた後に、第1の非晶質半導体層17に含まれる第1の不純物及び第1の非晶質半導体領域16に含まれる第2の不純物を活性化するために、第1の非晶質半導体層17及び第1の非晶質半導体領域16がアニールされてもよい。それから、半導体基板11の第2の表面11b上に、第1の非晶質半導体層17と電気的に接続される第1の電極19が形成される。特定的には、第1の非晶質半導体層17上に第1の電極19が形成される。半導体基板11の第2の表面11b上に、第1の非晶質半導体領域16と電気的に接続される第2の電極18が形成される。特定的には、第1の非晶質半導体領域16上に第2の電極18が形成される。こうして、図1及び図2に示される本実施の形態の光電変換素子1が製造され得る。 After a part of the first amorphous semiconductor layer 17 is doped with the second impurity, the first impurity contained in the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 are added to the first amorphous semiconductor layer 17. In order to activate the second impurity contained, the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 may be annealed. Then, a first electrode 19 that is electrically connected to the first amorphous semiconductor layer 17 is formed on the second surface 11 b of the semiconductor substrate 11. Specifically, the first electrode 19 is formed on the first amorphous semiconductor layer 17. A second electrode 18 that is electrically connected to the first amorphous semiconductor region 16 is formed on the second surface 11 b of the semiconductor substrate 11. Specifically, the second electrode 18 is formed on the first amorphous semiconductor region 16. Thus, the photoelectric conversion element 1 of the present embodiment shown in FIGS. 1 and 2 can be manufactured.
 本実施の形態の光電変換素子1及びその製造方法の効果を説明する。
 本実施の形態の光電変換素子1は、第1の表面11aと第1の表面11aと反対側の第2の表面11bとを有する半導体基板11と、第2の表面11b上に設けられるとともに、第1の導電型を有する第1の非晶質半導体層17と、第2の表面11b上に設けられるとともに、第1の導電型と異なる第2の導電型を有する第1の非晶質半導体領域16とを備える。第1の非晶質半導体層17は第1の導電型を有する第1の不純物を含む。第1の非晶質半導体領域16は第1の不純物と第2の導電型を有する第2の不純物とを含む。第1の非晶質半導体層17及び第1の非晶質半導体領域16は、連続して延在する1つの層を構成する。
The effect of the photoelectric conversion element 1 of this Embodiment and its manufacturing method is demonstrated.
The photoelectric conversion element 1 of the present embodiment is provided on a semiconductor substrate 11 having a first surface 11a and a second surface 11b opposite to the first surface 11a, and the second surface 11b, A first amorphous semiconductor layer 17 having a first conductivity type and a first amorphous semiconductor having a second conductivity type different from the first conductivity type, provided on the second surface 11b Region 16. The first amorphous semiconductor layer 17 includes a first impurity having the first conductivity type. The first amorphous semiconductor region 16 includes a first impurity and a second impurity having a second conductivity type. The first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 constitute one layer that extends continuously.
 半導体基板11の第2の表面11b上に第1の非晶質半導体層17が形成された後、半導体基板11の第2の表面11bを露出させることなく製造し得る構造を、本実施の形態の光電変換素子1は備えている。半導体基板11の第2の表面11bに汚染物質が付着したり、非晶質半導体層のエッチングにより半導体基板11の第2の表面11bが荒れたりすることなく製造し得る構造を、本実施の形態の光電変換素子1は備えている。本実施の形態の光電変換素子1は、向上された特性及び信頼性を有する。 A structure that can be manufactured without exposing the second surface 11b of the semiconductor substrate 11 after the first amorphous semiconductor layer 17 is formed on the second surface 11b of the semiconductor substrate 11 is described in this embodiment. The photoelectric conversion element 1 is provided. A structure that can be manufactured without contamination of the second surface 11b of the semiconductor substrate 11 or roughening of the second surface 11b of the semiconductor substrate 11 due to etching of the amorphous semiconductor layer is described in this embodiment. The photoelectric conversion element 1 is provided. The photoelectric conversion element 1 of the present embodiment has improved characteristics and reliability.
 本実施の形態の光電変換素子1では、第1の非晶質半導体領域16は、第1の非晶質半導体層17の全厚さにわたって存在してもよい。第1の非晶質半導体領域16と半導体基板11との距離が減少し得る。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアのうち、第1の非晶質半導体領域16が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域16によってより高い効率で収集され得る。本実施の形態の光電変換素子1によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 In the photoelectric conversion element 1 of the present embodiment, the first amorphous semiconductor region 16 may exist over the entire thickness of the first amorphous semiconductor layer 17. The distance between the first amorphous semiconductor region 16 and the semiconductor substrate 11 can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the second conductivity type of the first amorphous semiconductor region 16 are the first. A single amorphous semiconductor region 16 can be collected with higher efficiency. According to the photoelectric conversion element 1 of the present embodiment, the efficiency of converting light energy into electrical energy can be improved.
 本実施の形態の光電変換素子1では、第1の非晶質半導体領域16における第1の不純物の濃度は、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向において一定であってもよい。半導体基板11の第2の表面11b上に第1の非晶質半導体層17が形成された後、半導体基板11の第2の表面11bを露出させることなく製造し得る構造を、光電変換素子1は備えている。本実施の形態の光電変換素子1は、向上された特性及び信頼性を有する。 In the photoelectric conversion element 1 of the present embodiment, the concentration of the first impurity in the first amorphous semiconductor region 16 is such that the first amorphous semiconductor region 16 and the first amorphous semiconductor layer 17 are the same. It may be constant in the alternately arranged directions. After the first amorphous semiconductor layer 17 is formed on the second surface 11b of the semiconductor substrate 11, a structure that can be manufactured without exposing the second surface 11b of the semiconductor substrate 11 is formed in the photoelectric conversion element 1. Has. The photoelectric conversion element 1 of the present embodiment has improved characteristics and reliability.
 本実施の形態の光電変換素子1は、第1の非晶質半導体層17と半導体基板11の第2の表面11bとの間及び第1の非晶質半導体領域16と半導体基板11の第2の表面11bとの間に、i型を有する第2の非晶質半導体層15をさらに備えてもよい。i型を有する第2の非晶質半導体層15は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第2の表面11bにおいて再結合することを抑制することができる。本実施の形態の光電変換素子1によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上され得る。 In the photoelectric conversion element 1 of the present embodiment, the first amorphous semiconductor layer 17 and the second surface 11 b of the semiconductor substrate 11 and the first amorphous semiconductor region 16 and the second of the semiconductor substrate 11 are used. An i-type second amorphous semiconductor layer 15 may be further provided between the first surface 11b and the first surface 11b. In the second amorphous semiconductor layer 15 having i-type, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the second surface 11 b of the semiconductor substrate 11. Recombination can be suppressed. According to the photoelectric conversion element 1 of the present embodiment, the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
 本実施の形態の光電変換素子1は、半導体基板11の第2の表面11b上に設けられるとともに、第1の非晶質半導体層17と電気的に接続される第1の電極19と、半導体基板11の第2の表面11b上に設けられるとともに、第1の非晶質半導体領域16と電気的に接続される第2の電極18とをさらに備えてもよい。本実施の形態の光電変換素子1では、第1の電極19及び第2の電極18は、光の入射面である半導体基板11の第1の表面11a側に設けられていない。光電変換素子1に入射する光は、第1の電極19及び第2の電極18によって遮られない。本実施の形態の光電変換素子1によれば、高い短絡電流JSCが得られ、光エネルギーを電気エネルギーに変換する効率が向上され得る。 The photoelectric conversion element 1 according to the present embodiment is provided on the second surface 11b of the semiconductor substrate 11, and the first electrode 19 electrically connected to the first amorphous semiconductor layer 17 and the semiconductor A second electrode 18 that is provided on the second surface 11 b of the substrate 11 and electrically connected to the first amorphous semiconductor region 16 may be further provided. In the photoelectric conversion element 1 of the present embodiment, the first electrode 19 and the second electrode 18 are not provided on the first surface 11a side of the semiconductor substrate 11 which is a light incident surface. Light incident on the photoelectric conversion element 1 is not blocked by the first electrode 19 and the second electrode 18. According to the photoelectric conversion element 1 of the present embodiment, a high short-circuit current J SC can be obtained, and the efficiency of converting light energy into electric energy can be improved.
 本実施の形態の光電変換素子1は、半導体基板11の第1の表面11a上に誘電体層14をさらに備えてもよい。誘電体層14が反射防止膜として機能するとき、誘電体層14は、より多くの光を光電変換素子1内に入射させることができる。本実施の形態の光電変換素子1によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。誘電体層14がパッシベーション膜として機能するとき、誘電体層14は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第1の表面11aにおいて再結合することを抑制することができる。本実施の形態の光電変換素子1によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 The photoelectric conversion element 1 of the present embodiment may further include a dielectric layer 14 on the first surface 11a of the semiconductor substrate 11. When the dielectric layer 14 functions as an antireflection film, the dielectric layer 14 can cause more light to enter the photoelectric conversion element 1. According to the photoelectric conversion element 1 of the present embodiment, the efficiency of converting light energy into electrical energy can be improved. When the dielectric layer 14 functions as a passivation film, the carrier generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 is the first dielectric layer 14 of the semiconductor substrate 11. It is possible to suppress recombination on the surface 11a. According to the photoelectric conversion element 1 of the present embodiment, the efficiency of converting light energy into electrical energy can be improved.
 本実施の形態の光電変換素子1は、半導体基板11の第1の表面11a上に、i型を有する第3の非晶質半導体層12をさらに備えてもよい。i型を有する第3の非晶質半導体層12は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第1の表面11aにおいて再結合することを抑制することができる。本実施の形態の光電変換素子1によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上され得る。 The photoelectric conversion element 1 of the present embodiment may further include a third amorphous semiconductor layer 12 having i-type on the first surface 11 a of the semiconductor substrate 11. In the third amorphous semiconductor layer 12 having i-type, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the first surface 11 a of the semiconductor substrate 11. Recombination can be suppressed. According to the photoelectric conversion element 1 of the present embodiment, the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
 本実施の形態の光電変換素子1は、半導体基板11の第1の表面11a上に、半導体基板11と同じ導電型を有する第4の非晶質半導体層13をさらに備えてもよい。半導体基板11と同じ導電型を有する第4の非晶質半導体層13は、光電変換素子1に光が入射することによって半導体基板11内に発生したキャリアのうち半導体基板11の第1の表面11aに近づくキャリアを、半導体基板11の内部に押し戻すことができる。第4の非晶質半導体層13は、このキャリアが半導体基板11の第1の表面11aにおいて再結合することを抑制することができる。本実施の形態の光電変換素子1によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上され得る。 The photoelectric conversion element 1 of the present embodiment may further include a fourth amorphous semiconductor layer 13 having the same conductivity type as the semiconductor substrate 11 on the first surface 11 a of the semiconductor substrate 11. The fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 has the first surface 11 a of the semiconductor substrate 11 among the carriers generated in the semiconductor substrate 11 when light enters the photoelectric conversion element 1. The carrier approaching can be pushed back into the semiconductor substrate 11. The fourth amorphous semiconductor layer 13 can suppress recombination of this carrier on the first surface 11 a of the semiconductor substrate 11. According to the photoelectric conversion element 1 of the present embodiment, the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
 本実施の形態の光電変換素子1では、半導体基板11の第1の表面11aは、凹凸構造を含んでもよい。光の入射面である半導体基板11の第1の表面11a上に凹凸構造を設けることによって、より多くの光が光電変換素子1内に入射され得る。本実施の形態の光電変換素子1によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 In the photoelectric conversion element 1 of the present embodiment, the first surface 11a of the semiconductor substrate 11 may include an uneven structure. By providing the concavo-convex structure on the first surface 11 a of the semiconductor substrate 11 that is the light incident surface, more light can be incident into the photoelectric conversion element 1. According to the photoelectric conversion element 1 of the present embodiment, the efficiency of converting light energy into electrical energy can be improved.
 本実施の形態の光電変換素子1の製造方法は、第1の表面11aと第1の表面11aと反対側の第2の表面11bとを有する半導体基板11の第2の表面11b上に、第1の導電型を有する第1の非晶質半導体層17を形成することを備える。第1の非晶質半導体層17は第1の導電型を有する第1の不純物を含む。本実施の形態の光電変換素子1の製造方法は、第1の非晶質半導体層17内に第2の導電型を有する第1の非晶質半導体領域16を形成することをさらに備える。第1の非晶質半導体層17内に第1の非晶質半導体領域16を形成することは、第1の非晶質半導体層17の一部に、第1の導電型と異なる第2の導電型を有する第2の不純物をドーピングすることを含む。 The manufacturing method of the photoelectric conversion element 1 according to the present embodiment includes the first surface 11a and the second surface 11b of the semiconductor substrate 11 having the second surface 11b opposite to the first surface 11a. Forming a first amorphous semiconductor layer 17 having one conductivity type. The first amorphous semiconductor layer 17 includes a first impurity having the first conductivity type. The method for manufacturing the photoelectric conversion element 1 according to the present embodiment further includes forming the first amorphous semiconductor region 16 having the second conductivity type in the first amorphous semiconductor layer 17. The formation of the first amorphous semiconductor region 16 in the first amorphous semiconductor layer 17 means that a second portion different from the first conductivity type is formed in a part of the first amorphous semiconductor layer 17. Doping with a second impurity having a conductivity type.
 半導体基板11の第2の表面11b上に第1の非晶質半導体層17が形成された後、半導体基板11の第2の表面11bを露出させることなく、光電変換素子1が製造され得る。半導体基板11の第2の表面11bに汚染物質が付着したり、非晶質半導体層のエッチングにより半導体基板11の第2の表面11bが荒れたりすることなく、光電変換素子1が製造され得る。本実施の形態の光電変換素子1の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が製造され得る。 After the first amorphous semiconductor layer 17 is formed on the second surface 11b of the semiconductor substrate 11, the photoelectric conversion element 1 can be manufactured without exposing the second surface 11b of the semiconductor substrate 11. The photoelectric conversion element 1 can be manufactured without the contaminants adhering to the second surface 11b of the semiconductor substrate 11 or the second surface 11b of the semiconductor substrate 11 being roughened by etching of the amorphous semiconductor layer. According to the method for manufacturing the photoelectric conversion element 1 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
 本実施の形態の光電変換素子1の製造方法では、第1の非晶質半導体領域16は、第1の非晶質半導体層17の全厚さにわたって存在してもよい。第1の非晶質半導体領域16と半導体基板11との距離が減少し得る。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアのうち、第1の非晶質半導体領域16が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域16によってより高い効率で収集され得る。本実施の形態の光電変換素子1の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 In the method for manufacturing the photoelectric conversion element 1 of the present embodiment, the first amorphous semiconductor region 16 may exist over the entire thickness of the first amorphous semiconductor layer 17. The distance between the first amorphous semiconductor region 16 and the semiconductor substrate 11 can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the second conductivity type of the first amorphous semiconductor region 16 are the first. A single amorphous semiconductor region 16 can be collected with higher efficiency. According to the manufacturing method of the photoelectric conversion element 1 of the present embodiment, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
 本実施の形態の光電変換素子1の製造方法では、第1の非晶質半導体領域16における第1の不純物の濃度は、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向において一定であってもよい。半導体基板11の第2の表面11b上に第1の非晶質半導体層17が形成された後、半導体基板11の第2の表面11bを露出させることなく、光電変換素子1が製造され得る。本実施の形態の光電変換素子1の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が製造され得る。 In the method for manufacturing the photoelectric conversion element 1 of the present embodiment, the concentration of the first impurity in the first amorphous semiconductor region 16 is the same as that of the first amorphous semiconductor region 16 and the first amorphous semiconductor layer. It may be constant in a direction in which 17 and 17 are alternately arranged. After the first amorphous semiconductor layer 17 is formed on the second surface 11b of the semiconductor substrate 11, the photoelectric conversion element 1 can be manufactured without exposing the second surface 11b of the semiconductor substrate 11. According to the method for manufacturing the photoelectric conversion element 1 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
 本実施の形態の光電変換素子1の製造方法は、半導体基板11の第2の表面11b上に第1の非晶質半導体層17を形成する前に、半導体基板11の第2の表面11b上に、i型を有する第2の非晶質半導体層15を形成することをさらに備えてもよい。i型を有する第2の非晶質半導体層15は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第2の表面11bにおいて再結合することを抑制することができる。本実施の形態の光電変換素子1の製造方法によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上された光電変換素子が製造され得る。 In the method for manufacturing the photoelectric conversion element 1 according to the present embodiment, the first amorphous semiconductor layer 17 is formed on the second surface 11 b of the semiconductor substrate 11 before the first amorphous semiconductor layer 17 is formed on the second surface 11 b of the semiconductor substrate 11. In addition, an i-type second amorphous semiconductor layer 15 may be further formed. In the second amorphous semiconductor layer 15 having i-type, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the second surface 11 b of the semiconductor substrate 11. Recombination can be suppressed. According to the manufacturing method of the photoelectric conversion element 1 of this Embodiment, the photoelectric conversion element with which the passivation characteristic and the efficiency which converts light energy into electrical energy were improved can be manufactured.
 本実施の形態の光電変換素子1の製造方法では、第1の非晶質半導体層17の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17の一部に第2の不純物をイオン注入することを含んでもよい。本実施の形態の光電変換素子1の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 In the method for manufacturing the photoelectric conversion element 1 of the present embodiment, doping a second impurity into a part of the first amorphous semiconductor layer 17 causes a part of the first amorphous semiconductor layer 17 to be doped. Ion implantation of the second impurity may be included. According to the method for manufacturing the photoelectric conversion element 1 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 本実施の形態の光電変換素子1の製造方法は、半導体基板11の第2の表面11b上に、第1の非晶質半導体層17と電気的に接続される第1の電極19を形成することと、半導体基板11の第2の表面11b上に、第1の非晶質半導体領域16と電気的に接続される第2の電極18を形成することとをさらに備えてもよい。本実施の形態の光電変換素子1の製造方法によれば、第1の電極19及び第2の電極18が光の入射面である半導体基板11の第1の表面11a側に設けられていない光電変換素子1が製造され得る。光電変換素子1に入射する光は第1の電極19及び第2の電極18によって遮られない。本実施の形態の光電変換素子1の製造方法によれば、高い短絡電流JSCを有するとともに、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 In the method for manufacturing the photoelectric conversion element 1 according to the present embodiment, the first electrode 19 that is electrically connected to the first amorphous semiconductor layer 17 is formed on the second surface 11 b of the semiconductor substrate 11. And forming a second electrode 18 electrically connected to the first amorphous semiconductor region 16 on the second surface 11 b of the semiconductor substrate 11. According to the method of manufacturing the photoelectric conversion element 1 of the present embodiment, the first electrode 19 and the second electrode 18 are photoelectric elements that are not provided on the first surface 11a side of the semiconductor substrate 11 that is the light incident surface. The conversion element 1 can be manufactured. Light incident on the photoelectric conversion element 1 is not blocked by the first electrode 19 and the second electrode 18. According to the method for manufacturing the photoelectric conversion element 1 of the present embodiment, a photoelectric conversion element having a high short-circuit current J SC and improved efficiency in converting light energy into electric energy can be manufactured.
 本実施の形態の光電変換素子1の製造方法は、半導体基板11の第1の表面11a上に誘電体層14を形成することをさらに備えてもよい。誘電体層14が反射防止膜として機能するとき、誘電体層14は、より多くの光を光電変換素子1内に入射させることができる。本実施の形態の光電変換素子1の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。誘電体層14がパッシベーション膜として機能するとき、誘電体層14は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第1の表面11aにおいて再結合することを抑制することができる。本実施の形態の光電変換素子1の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 The method for manufacturing the photoelectric conversion element 1 according to the present embodiment may further include forming the dielectric layer 14 on the first surface 11 a of the semiconductor substrate 11. When the dielectric layer 14 functions as an antireflection film, the dielectric layer 14 can cause more light to enter the photoelectric conversion element 1. According to the manufacturing method of the photoelectric conversion element 1 of the present embodiment, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured. When the dielectric layer 14 functions as a passivation film, the carrier generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 is the first dielectric layer 14 of the semiconductor substrate 11. It is possible to suppress recombination on the surface 11a. According to the manufacturing method of the photoelectric conversion element 1 of the present embodiment, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
 本実施の形態の光電変換素子1の製造方法は、半導体基板11の第1の表面11a上に、i型を有する第3の非晶質半導体層12を形成することをさらに備えてもよい。i型を有する第3の非晶質半導体層12は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第1の表面11aにおいて再結合することを抑制することができる。本実施の形態の光電変換素子1の製造方法によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上された光電変換素子が製造され得る。 The method for manufacturing the photoelectric conversion element 1 of the present embodiment may further include forming the third amorphous semiconductor layer 12 having i-type on the first surface 11 a of the semiconductor substrate 11. In the third amorphous semiconductor layer 12 having i-type, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the first surface 11 a of the semiconductor substrate 11. Recombination can be suppressed. According to the manufacturing method of the photoelectric conversion element 1 of this Embodiment, the photoelectric conversion element with which the passivation characteristic and the efficiency which converts light energy into electrical energy were improved can be manufactured.
 本実施の形態の光電変換素子1の製造方法は、半導体基板11の第1の表面11a上に、半導体基板11と同じ導電型を有する第4の非晶質半導体層13を形成することをさらに備えてもよい。半導体基板11と同じ導電型を有する第4の非晶質半導体層13は、光電変換素子1に光が入射することによって半導体基板11内に発生したキャリアのうち半導体基板11の第1の表面11aに近づくキャリアを、半導体基板11の内部に押し戻すことができる。第4の非晶質半導体層13は、このキャリアが半導体基板11の第1の表面11aにおいて再結合することを抑制することができる。本実施の形態の光電変換素子1の製造方法によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上された光電変換素子が製造され得る。 The manufacturing method of the photoelectric conversion element 1 according to the present embodiment further includes forming the fourth amorphous semiconductor layer 13 having the same conductivity type as the semiconductor substrate 11 on the first surface 11 a of the semiconductor substrate 11. You may prepare. The fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 has the first surface 11 a of the semiconductor substrate 11 among the carriers generated in the semiconductor substrate 11 when light enters the photoelectric conversion element 1. The carrier approaching can be pushed back into the semiconductor substrate 11. The fourth amorphous semiconductor layer 13 can suppress recombination of this carrier on the first surface 11 a of the semiconductor substrate 11. According to the manufacturing method of the photoelectric conversion element 1 of this Embodiment, the photoelectric conversion element with which the passivation characteristic and the efficiency which converts light energy into electrical energy were improved can be manufactured.
 本実施の形態の光電変換素子1の製造方法は、半導体基板11の第1の表面11aに、凹凸構造を形成することをさらに備えてもよい。光の入射面である半導体基板11の第1の表面11aに凹凸構造を形成することによって、より多くの光が光電変換素子1内に入射され得る。本実施の形態の光電変換素子1の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 The method for manufacturing the photoelectric conversion element 1 according to the present embodiment may further include forming a concavo-convex structure on the first surface 11 a of the semiconductor substrate 11. By forming a concavo-convex structure on the first surface 11 a of the semiconductor substrate 11, which is the light incident surface, more light can be incident into the photoelectric conversion element 1. According to the manufacturing method of the photoelectric conversion element 1 of the present embodiment, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
 (実施の形態2)
 図1から図8、図10及び図11を参照して、実施の形態2の光電変換素子1及びその製造方法について説明する。本実施の形態の光電変換素子1は、実施の形態1の光電変換素子1と同様の構成を備える。本実施の形態の光電変換素子1の製造方法は、基本的には、実施の形態1の光電変換素子1の製造方法と同様の工程を備えるが、以下の点で異なる。
(Embodiment 2)
With reference to FIG. 1 to FIG. 8, FIG. 10, and FIG. The photoelectric conversion element 1 of the present embodiment has a configuration similar to that of the photoelectric conversion element 1 of the first embodiment. Although the manufacturing method of the photoelectric conversion element 1 of this Embodiment is fundamentally equipped with the process similar to the manufacturing method of the photoelectric conversion element 1 of Embodiment 1, it differs in the following points.
 実施の形態1の光電変換素子1の製造方法では、イオン注入法によって、第1の非晶質半導体層17の一部に第2の不純物がドーピングされていた。これに対し、本実施の形態の光電変換素子1の製造方法では、第1の非晶質半導体層17の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26を形成することと、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させることとを含んでもよい。より特定的には、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26を形成することは、第1の非晶質半導体層17の一部上に第2の不純物を含むドーピングペーストを施すことであってもよい。ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させることは、ドーピングペーストを熱処理することを含んでもよい。 In the method for manufacturing the photoelectric conversion element 1 according to the first embodiment, the second impurity is doped in part of the first amorphous semiconductor layer 17 by the ion implantation method. On the other hand, in the method for manufacturing the photoelectric conversion element 1 of the present embodiment, doping the second impurity into a part of the first amorphous semiconductor layer 17 means that the first amorphous semiconductor layer 17 is doped. Forming the dopant-containing film 26 containing the second impurity thereon, and transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17. Good. More specifically, the formation of the dopant-containing film 26 containing the second impurity on the first amorphous semiconductor layer 17 means that the second amorphous semiconductor layer 17 is formed on the second amorphous semiconductor layer 17. A doping paste containing impurities may be applied. Transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 may include heat-treating the doping paste.
 図3から図8、図10及び図11を参照して、本実施の形態の光電変換素子1の製造方法の一例について以下説明する。 An example of a method for manufacturing the photoelectric conversion element 1 according to the present embodiment will be described below with reference to FIGS.
 図3から図8に示す工程によって、半導体基板11の第1の表面11a上に、第3の非晶質半導体層12と、第4の非晶質半導体層13と、誘電体層14とが形成され、半導体基板11の第2の表面11b上に、第2の非晶質半導体層15と、第1の導電型を有する第1の非晶質半導体層17とが形成される。 3 to 8, the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the dielectric layer 14 are formed on the first surface 11 a of the semiconductor substrate 11. The second amorphous semiconductor layer 15 and the first amorphous semiconductor layer 17 having the first conductivity type are formed on the second surface 11 b of the semiconductor substrate 11.
 図10を参照して、第1の非晶質半導体層17の一部上に、第2の導電型を有する第2の不純物を含むドーパント含有膜26が形成される。ドーパント含有膜26として、燐などのn型を有する第2の不純物を含むドーピングペーストと、ボロンなどのp型を有する第2の不純物を含むドーピングペーストとが例示され得る。n型を有する第2の不純物を含むドーピングペーストは、燐化合物と、酸化シリコン前駆体と、溶材と、増粘剤とを含んでもよい。p型を有する第2の不純物を含むドーピングペーストは、ボロン化合物と、酸化シリコン前駆体と、溶材と、増粘剤とを含んでもよい。本実施の形態では、ドーパント含有膜26として、燐などのn型を有する第2の不純物を含むドーピングペーストが用いられてもよい。ドーピングペーストは、インクジェット、スクリーン印刷などによって、第1の非晶質半導体層17の一部上に施されてもよい。 Referring to FIG. 10, a dopant-containing film 26 containing a second impurity having the second conductivity type is formed on a part of the first amorphous semiconductor layer 17. Examples of the dopant-containing film 26 include a doping paste containing a second impurity having n type such as phosphorus and a doping paste containing a second impurity having p type such as boron. The doping paste including the second impurity having n-type may include a phosphorus compound, a silicon oxide precursor, a solvent, and a thickener. The doping paste containing the second impurity having p-type may include a boron compound, a silicon oxide precursor, a solvent, and a thickener. In the present embodiment, as the dopant-containing film 26, a doping paste containing an n-type second impurity such as phosphorus may be used. The doping paste may be applied on a part of the first amorphous semiconductor layer 17 by inkjet, screen printing, or the like.
 図11を参照して、ドーパント含有膜26を熱処理して、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させる。本実施の形態では、例えば100℃以上250℃以下の温度で、ドーピングペーストであるドーパント含有膜26が熱処理されて、ドーピングペーストであるドーパント含有膜26に含まれる第2の不純物が第1の非晶質半導体層17の一部にドープされる。こうして、第1の導電型を有する第1の非晶質半導体層17内に第2の導電型を有する第1の非晶質半導体領域16が形成され得る。加熱炉を用いてドーパント含有膜26が熱処理されてもよいし、ドーパント含有膜26にレーザ光を照射してドーパント含有膜26が熱処理されてもよい。 Referring to FIG. 11, the dopant-containing film 26 is heat-treated so that the second impurity contained in the dopant-containing film 26 is transferred to a part of the first amorphous semiconductor layer 17. In the present embodiment, for example, the dopant-containing film 26 that is a doping paste is heat-treated at a temperature of 100 ° C. or more and 250 ° C. or less, and the second impurity contained in the dopant-containing film 26 that is a doping paste A part of the crystalline semiconductor layer 17 is doped. Thus, the first amorphous semiconductor region 16 having the second conductivity type can be formed in the first amorphous semiconductor layer 17 having the first conductivity type. The dopant-containing film 26 may be heat-treated using a heating furnace, or the dopant-containing film 26 may be heat-treated by irradiating the dopant-containing film 26 with laser light.
 ドーパント含有膜26を熱処理する際、第1の非晶質半導体層17内の第1不純物と第1の非晶質半導体領域16内の第2の不純物とが活性化され得る。第1の非晶質半導体層17内の第1不純物と第1の非晶質半導体領域16内の第2の不純物とをさらに活性化するために、第1の非晶質半導体層17と第1の非晶質半導体領域16とがさらにアニールされてもよい。 When the dopant-containing film 26 is heat-treated, the first impurity in the first amorphous semiconductor layer 17 and the second impurity in the first amorphous semiconductor region 16 can be activated. In order to further activate the first impurity in the first amorphous semiconductor layer 17 and the second impurity in the first amorphous semiconductor region 16, the first amorphous semiconductor layer 17 and the first impurity One amorphous semiconductor region 16 may be further annealed.
 それから、残ったドーパント含有膜26は、硫酸と過酸化水素水の混合液、塩酸と過酸化水素水の混合液、または、フッ化水素酸などを用いて除去される。続いて、半導体基板11の第2の表面11b上に、第1の電極19及び第2の電極18が形成される。こうして、図1及び図2に示される本実施の形態の光電変換素子1が製造され得る。 Then, the remaining dopant-containing film 26 is removed using a mixed solution of sulfuric acid and hydrogen peroxide solution, a mixed solution of hydrochloric acid and hydrogen peroxide solution, or hydrofluoric acid. Subsequently, the first electrode 19 and the second electrode 18 are formed on the second surface 11 b of the semiconductor substrate 11. Thus, the photoelectric conversion element 1 of the present embodiment shown in FIGS. 1 and 2 can be manufactured.
 本実施の形態の光電変換素子1の製造方法は、実施の形態1の光電変換素子1の製造方法と同様の効果を有するが、以下の点で異なる。 The manufacturing method of the photoelectric conversion element 1 of the present embodiment has the same effect as the manufacturing method of the photoelectric conversion element 1 of the first embodiment, but differs in the following points.
 本実施の形態の光電変換素子1の製造方法では、第1の非晶質半導体層17の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17の一部上に第2の不純物を含むドーパント含有膜26を形成することと、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させることとを含んでもよい。本実施の形態の光電変換素子1の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 In the method for manufacturing the photoelectric conversion element 1 according to the present embodiment, doping the second impurity into a part of the first amorphous semiconductor layer 17 may cause the part of the first amorphous semiconductor layer 17 to be doped. Forming a dopant-containing film 26 containing a second impurity at the same time, and transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17. . According to the method for manufacturing the photoelectric conversion element 1 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 本実施の形態の光電変換素子1の製造方法では、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26を形成することは、第1の非晶質半導体層17の一部上に第2の不純物を含むドーピングペーストを施すことであってもよい。ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させることは、ドーピングペーストを熱処理することを含んでもよい。すなわち、本実施の形態の光電変換素子1の製造方法では、第1の非晶質半導体層17の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17の一部上に第2の不純物を含むドーピングペーストを施すことと、ドーピングペーストを熱処理することとを含んでもよい。 In the method for manufacturing the photoelectric conversion element 1 of the present embodiment, the formation of the dopant-containing film 26 containing the second impurity on the first amorphous semiconductor layer 17 is the first amorphous semiconductor layer 17. A doping paste containing the second impurity may be applied on a part of the substrate. Transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 may include heat-treating the doping paste. That is, in the method for manufacturing the photoelectric conversion element 1 according to the present embodiment, doping the second impurity into a part of the first amorphous semiconductor layer 17 is a part of the first amorphous semiconductor layer 17. Applying a doping paste containing a second impurity on the part and heat-treating the doping paste may be included.
 ドーパント含有膜26としてドーピングペーストを用いることによって、高いパターン精度で、第1の非晶質半導体層17内に第1の非晶質半導体領域16が形成され得る。ドーパント含有膜26としてドーピングペーストを用いることによって、インクジェット、スクリーン印刷などによって第1の非晶質半導体層17上にドーパント含有膜26が形成され得る。本実施の形態の光電変換素子1の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が安価かつ簡単な工程で製造され得る。 By using a doping paste as the dopant-containing film 26, the first amorphous semiconductor region 16 can be formed in the first amorphous semiconductor layer 17 with high pattern accuracy. By using a doping paste as the dopant-containing film 26, the dopant-containing film 26 can be formed on the first amorphous semiconductor layer 17 by inkjet, screen printing, or the like. According to the manufacturing method of the photoelectric conversion element 1 of this Embodiment, the photoelectric conversion element which has the improved characteristic and reliability can be manufactured at a cheap and simple process.
 (実施の形態3)
 図1から図8、図12及び図13を参照して、実施の形態3の光電変換素子1及びその製造方法について説明する。本実施の形態の光電変換素子1は、実施の形態1の光電変換素子1と同様の構成を備える。本実施の形態の光電変換素子1の製造方法は、基本的には、実施の形態1の光電変換素子1の製造方法と同様の工程を備えるが、以下の点で異なる。
(Embodiment 3)
With reference to FIG. 1 to FIG. 8, FIG. 12, and FIG. The photoelectric conversion element 1 of the present embodiment has a configuration similar to that of the photoelectric conversion element 1 of the first embodiment. Although the manufacturing method of the photoelectric conversion element 1 of this Embodiment is fundamentally equipped with the process similar to the manufacturing method of the photoelectric conversion element 1 of Embodiment 1, it differs in the following points.
 実施の形態1の光電変換素子1の製造方法では、イオン注入法によって、第1の非晶質半導体層17の一部に第2の不純物がドーピングされていた。これに対し、本実施の形態の光電変換素子1の製造方法では、第1の非晶質半導体層17の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26を形成することと、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させることとを含んでもよい。より特定的には、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させることは、ドーパント含有膜26の一部にレーザ光27を照射することを含んでもよい。すなわち、レーザドーピング法によって、第1の非晶質半導体層17の一部に第2の不純物がドーピングされてもよい。 In the method for manufacturing the photoelectric conversion element 1 according to the first embodiment, the second impurity is doped in part of the first amorphous semiconductor layer 17 by the ion implantation method. On the other hand, in the method for manufacturing the photoelectric conversion element 1 of the present embodiment, doping the second impurity into a part of the first amorphous semiconductor layer 17 means that the first amorphous semiconductor layer 17 is doped. Forming the dopant-containing film 26 containing the second impurity thereon, and transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17. Good. More specifically, transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 irradiates a part of the dopant-containing film 26 with the laser beam 27. You may include that. That is, the second impurity may be doped into a part of the first amorphous semiconductor layer 17 by a laser doping method.
 図3から図8、図12及び図13を参照して、本実施の形態の光電変換素子1の製造方法の一例について以下説明する。 An example of a method for manufacturing the photoelectric conversion element 1 of the present embodiment will be described below with reference to FIGS.
 図3から図8に示す工程によって、半導体基板11の第1の表面11a上に、第3の非晶質半導体層12と、第4の非晶質半導体層13と、誘電体層14とが形成され、半導体基板11の第2の表面11b上に、第2の非晶質半導体層15と、第1の非晶質半導体層17とが形成される。 3 to 8, the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the dielectric layer 14 are formed on the first surface 11 a of the semiconductor substrate 11. The second amorphous semiconductor layer 15 and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11.
 図12を参照して、第1の非晶質半導体層17上に、第2の導電型を有する第2の不純物を含むドーパント含有膜26が形成される。ドーパント含有膜26として、リンシリケートガラス(PSG)、ボロンシリケートガラス(BSG)、ポリボロンフィルム(PBF)などが例示され得る。本実施の形態では、ドーパント含有膜26として、リンシリケートガラス(PSG)が用いられている。 Referring to FIG. 12, a dopant-containing film 26 containing a second impurity having the second conductivity type is formed on the first amorphous semiconductor layer 17. Examples of the dopant-containing film 26 may include phosphorus silicate glass (PSG), boron silicate glass (BSG), and polyboron film (PBF). In the present embodiment, phosphorus silicate glass (PSG) is used as the dopant-containing film 26.
 図13を参照して、ドーパント含有膜26の一部にレーザ光27を照射して、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させる。本実施の形態では、ドーパント含有膜26の一部にレーザ光27を照射することにより、ドーパント含有膜26の一部が局所的に加熱される。第1の非晶質半導体層17のうち、レーザ光27が照射された部分に対応する領域のみに、ドーパント含有膜26に含まれる第2の不純物がドープされる。こうして、第1の導電型を有する第1の非晶質半導体層17内に第2の導電型を有する第1の非晶質半導体領域16が形成され得る。 Referring to FIG. 13, a part of the dopant-containing film 26 is irradiated with laser light 27 to transfer the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17. . In the present embodiment, a part of the dopant-containing film 26 is locally heated by irradiating a part of the dopant-containing film 26 with the laser light 27. Of the first amorphous semiconductor layer 17, only the region corresponding to the portion irradiated with the laser light 27 is doped with the second impurity contained in the dopant-containing film 26. Thus, the first amorphous semiconductor region 16 having the second conductivity type can be formed in the first amorphous semiconductor layer 17 having the first conductivity type.
 ドーパント含有膜26の一部にレーザ光27を照射することにより、ドーパント含有膜26の一部と第1の非晶質半導体層17の一部とが局所的に加熱される。ドーパント含有膜26の一部にレーザ光27を照射する際、第1の非晶質半導体領域16内の第2の不純物が活性化され得る。 By irradiating a part of the dopant-containing film 26 with the laser beam 27, a part of the dopant-containing film 26 and a part of the first amorphous semiconductor layer 17 are locally heated. When a part of the dopant-containing film 26 is irradiated with the laser beam 27, the second impurity in the first amorphous semiconductor region 16 can be activated.
 それから、残ったドーパント含有膜26は、硫酸と過酸化水素水の混合液、塩酸と過酸化水素水の混合液、または、フッ化水素酸などを用いて除去される。第1の非晶質半導体層17内の第1の不純物と第1の非晶質半導体領域16内の第2の不純物とをさらに活性化するために、第1の非晶質半導体層17と第1の非晶質半導体領域16とがさらにアニールされてもよい。続いて、半導体基板11の第2の表面11b上に、第1の電極19及び第2の電極18が形成される。こうして、図1及び図2に示される本実施の形態の光電変換素子1が製造され得る。 Then, the remaining dopant-containing film 26 is removed using a mixed solution of sulfuric acid and hydrogen peroxide solution, a mixed solution of hydrochloric acid and hydrogen peroxide solution, or hydrofluoric acid. In order to further activate the first impurity in the first amorphous semiconductor layer 17 and the second impurity in the first amorphous semiconductor region 16, the first amorphous semiconductor layer 17 and The first amorphous semiconductor region 16 may be further annealed. Subsequently, the first electrode 19 and the second electrode 18 are formed on the second surface 11 b of the semiconductor substrate 11. Thus, the photoelectric conversion element 1 of the present embodiment shown in FIGS. 1 and 2 can be manufactured.
 本実施の形態の光電変換素子1の製造方法は、実施の形態1の光電変換素子1の製造方法と同様の効果を有するが、以下の点で異なる。 The manufacturing method of the photoelectric conversion element 1 of the present embodiment has the same effect as the manufacturing method of the photoelectric conversion element 1 of the first embodiment, but differs in the following points.
 本実施の形態の光電変換素子1の製造方法では、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させることは、ドーパント含有膜26の一部にレーザ光27を照射することを含んでもよい。すなわち、レーザドーピング法によって、第1の非晶質半導体層17の一部に第2の不純物がドーピングされてもよい。レーザドーピング方法は、加熱炉を使用してドーパントを拡散する方法よりも、短時間でドーパントを拡散させることができる。本実施の形態の光電変換素子1の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が安価かつ簡単な工程で製造され得る。 In the method for manufacturing the photoelectric conversion element 1 according to the present embodiment, shifting the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 is one of the dopant-containing films 26. Irradiation of the laser beam 27 to the part may be included. That is, the second impurity may be doped into a part of the first amorphous semiconductor layer 17 by a laser doping method. The laser doping method can diffuse the dopant in a shorter time than the method of diffusing the dopant using a heating furnace. According to the manufacturing method of the photoelectric conversion element 1 of this Embodiment, the photoelectric conversion element which has the improved characteristic and reliability can be manufactured at a cheap and simple process.
 (実施の形態4)
 図1及び図14を参照して、実施の形態4の光電変換素子2について説明する。本実施の形態の光電変換素子2は、基本的には、実施の形態1の光電変換素子1と同様であるが、以下の点で異なる。
(Embodiment 4)
With reference to FIG.1 and FIG.14, the photoelectric conversion element 2 of Embodiment 4 is demonstrated. The photoelectric conversion element 2 of the present embodiment is basically the same as the photoelectric conversion element 1 of the first embodiment, but differs in the following points.
 本実施の形態の光電変換素子2は、第2の非晶質半導体層15内に設けられるとともに、第2の導電型を有する第2の非晶質半導体領域46をさらに備える。第2の非晶質半導体層15及び第2の非晶質半導体領域46は、半導体基板11の第2の表面11b上に設けられる。第2の非晶質半導体層15及び第2の非晶質半導体領域46は、連続して延在する1つの層を構成する。第2の非晶質半導体領域46は、第2の導電型を有する第2の不純物を含む。第2の非晶質半導体領域46は、第1の非晶質半導体領域16に接する。第2の非晶質半導体領域46は、第2の非晶質半導体層15の全厚さにわたって存在してもよい。第2の非晶質半導体領域46は、半導体基板11の第2の表面11bと接してもよいし、接しなくてもよい。 The photoelectric conversion element 2 according to the present embodiment is provided in the second amorphous semiconductor layer 15 and further includes a second amorphous semiconductor region 46 having the second conductivity type. The second amorphous semiconductor layer 15 and the second amorphous semiconductor region 46 are provided on the second surface 11 b of the semiconductor substrate 11. The second amorphous semiconductor layer 15 and the second amorphous semiconductor region 46 constitute one layer extending continuously. The second amorphous semiconductor region 46 includes a second impurity having the second conductivity type. The second amorphous semiconductor region 46 is in contact with the first amorphous semiconductor region 16. The second amorphous semiconductor region 46 may exist over the entire thickness of the second amorphous semiconductor layer 15. The second amorphous semiconductor region 46 may or may not be in contact with the second surface 11b of the semiconductor substrate 11.
 第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向、すなわち、第1の方向(例えば、x方向)において、第2の非晶質半導体領域46は、第1の非晶質半導体領域16と実質的に同じ幅を有してもよい。本明細書において、第2の非晶質半導体領域46が第1の非晶質半導体領域16と実質的に同じ幅を有することは、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向における第2の非晶質半導体領域46の幅と第1の非晶質半導体領域16の幅との差が、この方向における第1の非晶質半導体領域16の幅の20%以内であることを意味する。第1の非晶質半導体領域16の幅は、第1の非晶質半導体領域16内の第2の不純物の平均濃度の80%以上の第2の不純物の濃度を有する領域の第1の方向(例えば、x方向)における長さで定義される。第2の非晶質半導体領域46の幅は、第2の非晶質半導体領域46内の第2の不純物の平均濃度の80%以上の第2の不純物の濃度を有する領域の第1の方向(例えば、x方向)における長さで定義される。 In the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged, that is, in the first direction (for example, the x direction), the second amorphous semiconductor region 46 may have substantially the same width as the first amorphous semiconductor region 16. In the present specification, the second amorphous semiconductor region 46 has substantially the same width as the first amorphous semiconductor region 16 because the first amorphous semiconductor region 16 and the first amorphous semiconductor region 16 The difference between the width of the second amorphous semiconductor region 46 and the width of the first amorphous semiconductor region 16 in the direction in which the porous semiconductor layers 17 are alternately arranged is the first amorphous semiconductor layer 17 in this direction. It means that it is within 20% of the width of the semiconductor region 16. The width of the first amorphous semiconductor region 16 is such that the first direction of the region having the second impurity concentration of 80% or more of the average concentration of the second impurity in the first amorphous semiconductor region 16 is set. It is defined by the length in (for example, x direction). The width of the second amorphous semiconductor region 46 is the first direction of the region having the second impurity concentration of 80% or more of the average concentration of the second impurity in the second amorphous semiconductor region 46. It is defined by the length in (for example, x direction).
 第2の非晶質半導体領域46における第2の不純物の濃度は、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向、すなわち、第1の方向(例えば、x方向)において一定であってもよい。本明細書において、第2の非晶質半導体領域46における第2の不純物の濃度が、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向において一定であるとは、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向における、第2の非晶質半導体領域46内の第2の不純物の濃度のばらつきが、この方向における第2の非晶質半導体領域46内の第2の不純物の平均濃度の30%以内であることをいう。 The concentration of the second impurity in the second amorphous semiconductor region 46 is the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged, that is, the first May be constant in the direction (for example, the x direction). In this specification, the concentration of the second impurity in the second amorphous semiconductor region 46 is such that the first amorphous semiconductor region 16 and the first amorphous semiconductor layer 17 are alternately arranged. Is constant in the second amorphous semiconductor region 46 in the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged. The variation in the impurity concentration is within 30% of the average concentration of the second impurity in the second amorphous semiconductor region 46 in this direction.
 第2の非晶質半導体領域46は、第1の非晶質半導体領域16と実質的に同じ第2の不純物の濃度を有してもよい。本明細書において、第2の非晶質半導体領域46が第1の非晶質半導体領域16と実質的に同じ第2の不純物の濃度を有することは、第2の非晶質半導体領域46内の第2の不純物の平均濃度と第1の非晶質半導体領域16内の第2の不純物の平均濃度との差が、第1の非晶質半導体領域16における第2の不純物の平均濃度の30%以内であることを意味する。 The second amorphous semiconductor region 46 may have a second impurity concentration substantially the same as that of the first amorphous semiconductor region 16. In the present specification, the second amorphous semiconductor region 46 has the second impurity concentration substantially the same as that of the first amorphous semiconductor region 16. The difference between the average concentration of the second impurity and the average concentration of the second impurity in the first amorphous semiconductor region 16 is the average concentration of the second impurity in the first amorphous semiconductor region 16. It means within 30%.
 図3から図8及び図15を参照して、実施の形態4の光電変換素子2の製造方法について説明する。本実施の形態の光電変換素子2の製造方法は、基本的には、実施の形態1の光電変換素子1の製造方法と同様であるが、以下の点で異なる。 A method for manufacturing the photoelectric conversion element 2 according to Embodiment 4 will be described with reference to FIGS. The manufacturing method of the photoelectric conversion element 2 of the present embodiment is basically the same as the manufacturing method of the photoelectric conversion element 1 of the first embodiment, but differs in the following points.
 本実施の形態の光電変換素子2の製造方法は、第2の非晶質半導体層15の一部に第2の不純物をドーピングして、第2の非晶質半導体層15内に第2の非晶質半導体領域46を形成することをさらに備えてもよい。第2の非晶質半導体領域46は、第2の導電型を有する第2の不純物を含む。第2の非晶質半導体領域46は、第1の非晶質半導体領域16に接する。特定的には、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物をイオン注入することを含んでもよい。 In the method for manufacturing the photoelectric conversion element 2 according to the present embodiment, the second amorphous semiconductor layer 15 is doped with the second impurity, and the second amorphous semiconductor layer 15 is filled with the second impurity. An amorphous semiconductor region 46 may be further formed. The second amorphous semiconductor region 46 includes a second impurity having the second conductivity type. The second amorphous semiconductor region 46 is in contact with the first amorphous semiconductor region 16. Specifically, doping part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 with the second impurity may cause the first amorphous semiconductor layer 17 to be doped. The second impurity may be ion-implanted into part of the first amorphous semiconductor layer 15 and part of the second amorphous semiconductor layer 15.
 図3から図8に示す工程によって、半導体基板11の第1の表面11a上に、第3の非晶質半導体層12と、第4の非晶質半導体層13と、誘電体層14とが形成され、半導体基板11の第2の表面11b上に、第2の非晶質半導体層15と、第1の非晶質半導体層17とが形成される。 3 to 8, the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the dielectric layer 14 are formed on the first surface 11 a of the semiconductor substrate 11. The second amorphous semiconductor layer 15 and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11.
 図15を参照して、第1の非晶質半導体層17内に第1の非晶質半導体領域16を形成すること及び第2の非晶質半導体層15内に第2の導電型を有する第2の非晶質半導体領域46を形成することは、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に、第2の導電型を有する第2の不純物をドーピングすることを含む。言い換えると、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に、第2の導電型を有する第2の不純物をドーピングすることにより、第1の非晶質半導体層17内に第1の非晶質半導体領域16が形成されるとともに、第2の非晶質半導体層15内に第2の導電型を有する第2の非晶質半導体領域46が形成される。 Referring to FIG. 15, the first amorphous semiconductor region 16 is formed in the first amorphous semiconductor layer 17 and the second amorphous semiconductor layer 15 has the second conductivity type. The formation of the second amorphous semiconductor region 46 means that a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 have a second conductivity type. Doping with two impurities. In other words, by doping a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 with the second impurity having the second conductivity type, The first amorphous semiconductor region 16 is formed in the amorphous semiconductor layer 17, and the second amorphous semiconductor region 46 having the second conductivity type is formed in the second amorphous semiconductor layer 15. Is formed.
 特定的には、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17の一部及び及び第2の非晶質半導体層15の一部に第2の不純物をイオン注入することを含んでもよい。すなわち、イオン注入法によって、第1の非晶質半導体層17の一部及び及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされてもよい。具体的には、第1の非晶質半導体層17の一部及び及び第2の非晶質半導体層15の一部に第2の不純物のイオンビーム21を照射することによって、第1の非晶質半導体層17の一部及び及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされてもよい。こうして、第2の不純物のイオンビーム21を照射するという一つの工程で、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされ得る。 Specifically, doping part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 with the second impurity may cause the first amorphous semiconductor layer 17 to be doped. And second ion implantation of a second impurity into a part of the second amorphous semiconductor layer 15. That is, the second impurity may be doped into part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 by ion implantation. Specifically, by irradiating a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 with the ion beam 21 of the second impurity, the first non-crystalline semiconductor layer 17 is irradiated. A part of the crystalline semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 may be doped with the second impurity. Thus, in one step of irradiating the ion beam 21 of the second impurity, the second impurity is applied to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. Can be doped.
 第1の非晶質半導体層17の一部及び及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされる際に、第1の非晶質半導体層17の他の部分及び及び第2の非晶質半導体層15の他の部分に第2の不純物がドープされること防ぐために、第1の非晶質半導体層17の一部に対応する開口部を有するとともに第1の非晶質半導体層17の他の部分を覆うマスク22が用いられてもよい。 When the second impurity is doped into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15, another part of the first amorphous semiconductor layer 17 is changed. In order to prevent the second impurity and other portions of the second amorphous semiconductor layer 15 from being doped with the second impurity, an opening corresponding to a part of the first amorphous semiconductor layer 17 is provided. A mask 22 that covers other portions of one amorphous semiconductor layer 17 may be used.
 第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされた後に、第1の非晶質半導体層17に含まれる第1の不純物と、第1の非晶質半導体領域16及び第2の非晶質半導体領域46に含まれる第2の不純物とを活性化するために、第1の非晶質半導体層17と第1の非晶質半導体領域16と第2の非晶質半導体領域46とがアニールされてもよい。 The first amorphous semiconductor layer 17 includes a first impurity after the second amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 are doped with the second impurity. In order to activate the first impurity and the second impurity contained in the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46, the first amorphous semiconductor layer 17 and the first amorphous semiconductor layer 17 are activated. The amorphous semiconductor region 16 and the second amorphous semiconductor region 46 may be annealed.
 それから、半導体基板11の第2の表面11b上に、第1の非晶質半導体層17と電気的に接続される第1の電極19が形成される。特定的には、第1の非晶質半導体層17上に第1の電極19が形成される。半導体基板11の第2の表面11b上に、第1の非晶質半導体領域16と電気的に接続される第2の電極18が形成される。特定的には、第1の非晶質半導体領域16上に第2の電極18が形成される。こうして、図1及び図14に示される本実施の形態の光電変換素子2が製造され得る。 Then, the first electrode 19 that is electrically connected to the first amorphous semiconductor layer 17 is formed on the second surface 11 b of the semiconductor substrate 11. Specifically, the first electrode 19 is formed on the first amorphous semiconductor layer 17. A second electrode 18 that is electrically connected to the first amorphous semiconductor region 16 is formed on the second surface 11 b of the semiconductor substrate 11. Specifically, the second electrode 18 is formed on the first amorphous semiconductor region 16. Thus, the photoelectric conversion element 2 of the present embodiment shown in FIGS. 1 and 14 can be manufactured.
 本実施の形態の光電変換素子2及びその製造方法は、実施の形態1の光電変換素子1及びその製造方法と同様の効果を有するが、以下の点で異なる。 The photoelectric conversion element 2 and its manufacturing method of the present embodiment have the same effects as the photoelectric conversion element 1 of the first embodiment and its manufacturing method, but are different in the following points.
 本実施の形態の光電変換素子2は、第2の非晶質半導体層15内に設けられるとともに、第2の導電型を有する第2の非晶質半導体領域46をさらに備えてもよい。第2の非晶質半導体領域46は、第2の導電型を有する第2の不純物を含んでもよい。第2の非晶質半導体領域46は、第1の非晶質半導体領域16に接してもよい。本実施の形態の光電変換素子2では、第1の非晶質半導体領域16及び第2の非晶質半導体領域46からなる第2の導電型を有する非晶質半導体領域と半導体基板11との距離が減少し得る。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアのうち、第1の非晶質半導体領域16及び第2の非晶質半導体領域46が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域16及び第2の非晶質半導体領域46によってより高い効率で収集され得る。本実施の形態の光電変換素子2によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 The photoelectric conversion element 2 according to the present embodiment may be provided in the second amorphous semiconductor layer 15 and further include a second amorphous semiconductor region 46 having the second conductivity type. The second amorphous semiconductor region 46 may contain a second impurity having the second conductivity type. The second amorphous semiconductor region 46 may be in contact with the first amorphous semiconductor region 16. In the photoelectric conversion element 2 according to the present embodiment, the semiconductor substrate 11 includes an amorphous semiconductor region having the second conductivity type, which includes the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46, and the semiconductor substrate 11. The distance can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, the second amorphous semiconductor region 46 and the second amorphous semiconductor region 46 have the second. The carriers corresponding to the conductivity types of the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46 can be collected with higher efficiency. According to the photoelectric conversion element 2 of the present embodiment, the efficiency of converting light energy into electrical energy can be improved.
 本実施の形態の光電変換素子2の製造方法は、第2の非晶質半導体層15の一部に第2の不純物をドーピングして、第2の非晶質半導体層15内に第2の非晶質半導体領域46を形成することをさらに備えてもよい。第2の非晶質半導体領域46は、第2の導電型を有する第2の不純物を含んでもよい。第2の非晶質半導体領域46は、第1の非晶質半導体領域16に接してもよい。本実施の形態の光電変換素子2の製造方法によれば、第1の非晶質半導体領域16及び第2の非晶質半導体領域46からなる第2の導電型を有する非晶質半導体領域と半導体基板11との距離が減少し得る。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアのうち、第1の非晶質半導体領域16及び第2の非晶質半導体領域46が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域16及び第2の非晶質半導体領域46によってより高い効率で収集され得る。本実施の形態の光電変換素子2の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 In the method for manufacturing the photoelectric conversion element 2 according to the present embodiment, the second amorphous semiconductor layer 15 is doped with the second impurity, and the second amorphous semiconductor layer 15 is filled with the second impurity. An amorphous semiconductor region 46 may be further formed. The second amorphous semiconductor region 46 may contain a second impurity having the second conductivity type. The second amorphous semiconductor region 46 may be in contact with the first amorphous semiconductor region 16. According to the method for manufacturing the photoelectric conversion element 2 of the present embodiment, the amorphous semiconductor region having the second conductivity type composed of the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46, and The distance from the semiconductor substrate 11 can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, the second amorphous semiconductor region 46 and the second amorphous semiconductor region 46 have the second. The carriers corresponding to the conductivity types of the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46 can be collected with higher efficiency. According to the manufacturing method of the photoelectric conversion element 2 of the present embodiment, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
 本実施の形態の光電変換素子2の製造方法では、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物をイオン注入することを含んでもよい。第2の不純物のイオンビーム21を照射するという一つの工程で、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされ得る。本実施の形態の光電変換素子2の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 In the method for manufacturing the photoelectric conversion element 2 according to the present embodiment, the second impurity is doped into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. Ion implantation of a second impurity into part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 may be included. In one step of irradiating the ion beam 21 of the second impurity, a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 are doped with the second impurity. obtain. According to the method for manufacturing the photoelectric conversion element 2 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 (実施の形態5)
 図3から図8、図10、図14及び図16を参照して、実施の形態5の光電変換素子2及びその製造方法について説明する。本実施の形態の光電変換素子2は、実施の形態4の光電変換素子2と同様の構成を備える。本実施の形態の光電変換素子2の製造方法は、基本的には、実施の形態4の光電変換素子2の製造方法と同様の工程を備えるが、以下の点で異なる。
(Embodiment 5)
With reference to FIG. 3 to FIG. 8, FIG. 10, FIG. 14, and FIG. The photoelectric conversion element 2 of the present embodiment has the same configuration as the photoelectric conversion element 2 of the fourth embodiment. The manufacturing method of the photoelectric conversion element 2 of the present embodiment basically includes the same steps as the manufacturing method of the photoelectric conversion element 2 of the fourth embodiment, but differs in the following points.
 実施の形態4の光電変換素子2の製造方法では、イオン注入法によって、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされていた。これに対し、本実施の形態の光電変換素子2の製造方法では、実施の形態2の光電変換素子1の製造方法と同様の方法により、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされる。 In the method for manufacturing the photoelectric conversion element 2 of Embodiment 4, the second impurity is introduced into part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 by ion implantation. It was doped. On the other hand, in the manufacturing method of the photoelectric conversion element 2 according to the present embodiment, a part of the first amorphous semiconductor layer 17 and the first A part of the second amorphous semiconductor layer 15 is doped with the second impurity.
 具体的には、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26が形成される。それから、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に移行させる。より特定的には、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26を形成することは、第1の非晶質半導体層17の一部上に第2の不純物を含むドーピングペーストを施すことであってもよい。ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に移行させることは、ドーピングペーストを熱処理することを含んでもよい。 Specifically, a dopant-containing film 26 containing a second impurity is formed on the first amorphous semiconductor layer 17. Then, the second impurity contained in the dopant-containing film 26 is transferred to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. More specifically, the formation of the dopant-containing film 26 containing the second impurity on the first amorphous semiconductor layer 17 means that the second amorphous semiconductor layer 17 is formed on the second amorphous semiconductor layer 17. A doping paste containing impurities may be applied. Transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 means that the doping paste is heat-treated. May be included.
 図3から図8、図10及び図16を参照して、本実施の形態の光電変換素子2の製造方法の一例について以下説明する。 An example of a method for manufacturing the photoelectric conversion element 2 of the present embodiment will be described below with reference to FIGS. 3 to 8, FIG. 10, and FIG.
 図3から図8に示す工程によって、半導体基板11の第1の表面11a上に、第3の非晶質半導体層12と、第4の非晶質半導体層13と、誘電体層14とが形成され、半導体基板11の第2の表面11b上に、第2の非晶質半導体層15と、第1の非晶質半導体層17とが形成される。図10を参照して、第1の非晶質半導体層17の一部上に、第2の導電型を有する第2の不純物を含むドーパント含有膜26が形成される。ドーパント含有膜26は、第2の導電型を有する第2の不純物を含むドーピングペーストであってもよい。 3 to 8, the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the dielectric layer 14 are formed on the first surface 11 a of the semiconductor substrate 11. The second amorphous semiconductor layer 15 and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11. Referring to FIG. 10, a dopant-containing film 26 containing a second impurity having the second conductivity type is formed on part of the first amorphous semiconductor layer 17. The dopant-containing film 26 may be a doping paste containing a second impurity having the second conductivity type.
 図16を参照して、ドーパント含有膜26を熱処理して、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に移行させる。ドーパント含有膜26を熱処理するという一つの工程で、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされ得る。第2の不純物を、第1の非晶質半導体層17の一部に加えて第2の非晶質半導体層15の一部にも移行させる点を除いて、本実施の形態の光電変換素子2の製造方法は、実施の形態2の光電変換素子1の製造方法と同様である。 Referring to FIG. 16, the dopant-containing film 26 is heat-treated so that the second impurity contained in the dopant-containing film 26 is part of the first amorphous semiconductor layer 17 and the second amorphous semiconductor layer 15. To some of them. In one step of heat-treating the dopant-containing film 26, a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 may be doped with the second impurity. The photoelectric conversion element of the present embodiment except that the second impurity is transferred to a part of the second amorphous semiconductor layer 15 in addition to a part of the first amorphous semiconductor layer 17. The manufacturing method 2 is the same as the manufacturing method of the photoelectric conversion element 1 of the second embodiment.
 本実施の形態の光電変換素子2の製造方法は、実施の形態4の光電変換素子2の製造方法の効果と、実施の形態2の光電変換素子1の製造方法の効果とを有する。 The manufacturing method of the photoelectric conversion element 2 of the present embodiment has the effect of the manufacturing method of the photoelectric conversion element 2 of the fourth embodiment and the effect of the manufacturing method of the photoelectric conversion element 1 of the second embodiment.
 本実施の形態の光電変換素子2の製造方法において、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26を形成することと、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に移行させることとを含んでもよい。ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に移行させるという一つの工程で、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされ得る。 In the method of manufacturing the photoelectric conversion element 2 of the present embodiment, doping a second impurity into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 Forming a dopant-containing film 26 containing a second impurity on the first amorphous semiconductor layer 17, and applying the second impurity contained in the dopant-containing film 26 to one of the first amorphous semiconductor layer 17 And transition to a part of the second amorphous semiconductor layer 15. In one step of transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15, A part of the crystalline semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 may be doped with the second impurity.
 本実施の形態の光電変換素子2の製造方法において、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26を形成することは、第1の非晶質半導体層17の一部上に第2の不純物を含むドーピングペーストを施すことであってもよい。ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に移行させることは、ドーピングペーストを熱処理することを含んでもよい。ドーパント含有膜26(ドーピングペースト)を熱処理するという一つの工程で、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされ得る。本実施の形態の光電変換素子2の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 In the method for manufacturing the photoelectric conversion element 2 of the present embodiment, the formation of the dopant-containing film 26 containing the second impurity on the first amorphous semiconductor layer 17 is the first amorphous semiconductor layer 17. A doping paste containing the second impurity may be applied on a part of the substrate. Transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 means that the doping paste is heat-treated. May be included. In one step of heat-treating the dopant-containing film 26 (doping paste), a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 are doped with the second impurity. obtain. According to the method for manufacturing the photoelectric conversion element 2 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 (実施の形態6)
 図3から図8、図12、図14及び図17を参照して、実施の形態6の光電変換素子2及びその製造方法について説明する。本実施の形態の光電変換素子2は、実施の形態4の光電変換素子2と同様の構成を備える。本実施の形態の光電変換素子2の製造方法は、基本的には、実施の形態4の光電変換素子2の製造方法と同様の工程を備えるが、以下の点で異なる。
(Embodiment 6)
With reference to FIG. 3 to FIG. 8, FIG. 12, FIG. 14, and FIG. The photoelectric conversion element 2 of the present embodiment has the same configuration as the photoelectric conversion element 2 of the fourth embodiment. The manufacturing method of the photoelectric conversion element 2 of the present embodiment basically includes the same steps as the manufacturing method of the photoelectric conversion element 2 of the fourth embodiment, but differs in the following points.
 実施の形態4の光電変換素子2の製造方法では、イオン注入法によって、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされていた。これに対し、本実施の形態の光電変換素子2の製造方法では、実施の形態3の光電変換素子1の製造方法と同様に、レーザドーピング法により、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされる。 In the method for manufacturing the photoelectric conversion element 2 of Embodiment 4, the second impurity is introduced into part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 by ion implantation. It was doped. On the other hand, in the method for manufacturing the photoelectric conversion element 2 according to the present embodiment, as in the method for manufacturing the photoelectric conversion element 1 according to Embodiment 3, one of the first amorphous semiconductor layers 17 is formed by laser doping. The second impurity is doped into the portion and part of the second amorphous semiconductor layer 15.
 具体的には、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26が形成される。それから、ドーパント含有膜26の一部にレーザ光27を照射することによって、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされてもよい。 Specifically, a dopant-containing film 26 containing a second impurity is formed on the first amorphous semiconductor layer 17. Then, by irradiating a part of the dopant-containing film 26 with the laser beam 27, a second impurity is introduced into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. It may be doped.
 図3から図8、図12及び図17を参照して、本実施の形態の光電変換素子2の製造方法の一例について以下説明する。 An example of a method for manufacturing the photoelectric conversion element 2 of the present embodiment will be described below with reference to FIGS. 3 to 8, 12, and 17.
 図3から図8に示す工程によって、半導体基板11の第1の表面11a上に、第3の非晶質半導体層12と、第4の非晶質半導体層13と、誘電体層14とが形成され、半導体基板11の第2の表面11b上に、第2の非晶質半導体層15と、第1の非晶質半導体層17とが形成される。 3 to 8, the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the dielectric layer 14 are formed on the first surface 11 a of the semiconductor substrate 11. The second amorphous semiconductor layer 15 and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11.
 図12を参照して、第1の非晶質半導体層17上に、第2の導電型を有する第2の不純物を含むドーパント含有膜26が形成される。ドーパント含有膜26は、第2の導電型を有する第2の不純物を含むドーピングペーストであってもよい。図17を参照して、ドーパント含有膜26の一部にレーザ光27を照射して、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に移行させる。ドーパント含有膜26の一部にレーザ光27を照射するという一つの工程で、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされ得る。第2の不純物を、第1の非晶質半導体層17の一部に加えて第2の非晶質半導体層15の一部にも移行させる点を除いて、本実施の形態の光電変換素子2の製造方法は、実施の形態3の光電変換素子1の製造方法と同様である。 Referring to FIG. 12, a dopant-containing film 26 containing a second impurity having the second conductivity type is formed on the first amorphous semiconductor layer 17. The dopant-containing film 26 may be a doping paste containing a second impurity having the second conductivity type. Referring to FIG. 17, a part of the dopant-containing film 26 is irradiated with a laser beam 27, and the second impurity contained in the dopant-containing film 26 is changed into a part of the first amorphous semiconductor layer 17 and the second impurity. To a part of the amorphous semiconductor layer 15. In one step of irradiating a part of the dopant-containing film 26 with the laser beam 27, a second impurity is added to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. Can be doped. The photoelectric conversion element of the present embodiment except that the second impurity is transferred to a part of the second amorphous semiconductor layer 15 in addition to a part of the first amorphous semiconductor layer 17. The manufacturing method 2 is the same as the manufacturing method of the photoelectric conversion element 1 of the third embodiment.
 本実施の形態の光電変換素子2の製造方法は、実施の形態4の光電変換素子2の製造方法の効果と、実施の形態3の光電変換素子1の製造方法の効果とを有する。本実施の形態の光電変換素子2の製造方法において、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に移行させることは、ドーパント含有膜26の一部にレーザ光27を照射することを含んでもよい。ドーパント含有膜26の一部にレーザ光27を照射するという一つの工程で、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされ得る。本実施の形態の光電変換素子2の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 The manufacturing method of the photoelectric conversion element 2 of the present embodiment has the effect of the manufacturing method of the photoelectric conversion element 2 of the fourth embodiment and the effect of the manufacturing method of the photoelectric conversion element 1 of the third embodiment. In the method for manufacturing the photoelectric conversion element 2 according to the present embodiment, the second impurity contained in the dopant-containing film 26 is part of the first amorphous semiconductor layer 17 and the second amorphous semiconductor layer 15. The transition to the portion may include irradiating a part of the dopant-containing film 26 with the laser beam 27. In one step of irradiating a part of the dopant-containing film 26 with the laser beam 27, a second impurity is added to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. Can be doped. According to the method for manufacturing the photoelectric conversion element 2 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 (実施の形態7)
 図18を参照して、実施の形態7の光電変換素子3について説明する。本実施の形態の光電変換素子3は、実施の形態1の光電変換素子1と同様の構成を備えるが、以下の点で異なる。
(Embodiment 7)
With reference to FIG. 18, the photoelectric conversion element 3 of Embodiment 7 is demonstrated. Although the photoelectric conversion element 3 of this Embodiment is equipped with the structure similar to the photoelectric conversion element 1 of Embodiment 1, it differs in the following points.
 本実施の形態の光電変換素子3は、第2の非晶質半導体層15を備えていない。第1の非晶質半導体層17は、半導体基板11の第2の表面11b上に設けられ、半導体基板11の第2の表面11bに直接接している。第1の非晶質半導体領域16は半導体基板11の第2の表面11bに直接接してもよい。第1の非晶質半導体領域16は、第1の非晶質半導体層17の全厚さにわたって存在してもよい。第1の非晶質半導体領域16は、半導体基板11の第2の表面11bに接してもよいし、接しなくてもよい。 The photoelectric conversion element 3 of the present embodiment does not include the second amorphous semiconductor layer 15. The first amorphous semiconductor layer 17 is provided on the second surface 11 b of the semiconductor substrate 11 and is in direct contact with the second surface 11 b of the semiconductor substrate 11. The first amorphous semiconductor region 16 may be in direct contact with the second surface 11 b of the semiconductor substrate 11. The first amorphous semiconductor region 16 may exist over the entire thickness of the first amorphous semiconductor layer 17. The first amorphous semiconductor region 16 may or may not be in contact with the second surface 11b of the semiconductor substrate 11.
 本実施の形態の光電変換素子3の製造方法は、第2の非晶質半導体層15が形成されることを除いて、実施の形態1から実施の形態3の光電変換素子1の製造方法と同様である。具体的には、本実施の形態の光電変換素子3の製造方法では、半導体基板11の第2の表面11b上に第1の非晶質半導体層17を形成することは、半導体基板11の第2の表面11bに直接接する第1の非晶質半導体層17を形成することを含んでもよい。 The manufacturing method of the photoelectric conversion element 3 of the present embodiment is the same as the manufacturing method of the photoelectric conversion element 1 of Embodiments 1 to 3, except that the second amorphous semiconductor layer 15 is formed. It is the same. Specifically, in the method of manufacturing the photoelectric conversion element 3 according to the present embodiment, forming the first amorphous semiconductor layer 17 on the second surface 11 b of the semiconductor substrate 11 Forming the first amorphous semiconductor layer 17 in direct contact with the second surface 11b.
 本実施の形態の光電変換素子3及びその製造方法は、実施の形態1から実施の形態3の光電変換素子1及びその製造方法と同様の効果を有するが、以下の点で異なる。 The photoelectric conversion element 3 and the manufacturing method thereof according to the present embodiment have the same effects as the photoelectric conversion element 1 and the manufacturing method thereof according to the first to third embodiments, but are different in the following points.
 本実施の形態の光電変換素子3では、第1の非晶質半導体層17は、半導体基板11の第2の表面11bに直接接してもよい。第1の非晶質半導体層17は半導体基板11の第2の表面11bに直接接しているので、第1の非晶質半導体層17と半導体基板11との距離及び第1の非晶質半導体層17内に設けられる第1の非晶質半導体領域16と半導体基板11との距離が減少し得る。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアのうち、第1の非晶質半導体層17が有する第1の導電型に対応するキャリアが、第1の非晶質半導体層17によってより高い効率で収集され得る。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアのうち、第1の非晶質半導体領域16が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域16によってより高い効率で収集され得る。本実施の形態の光電変換素子3によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 In the photoelectric conversion element 3 of the present embodiment, the first amorphous semiconductor layer 17 may be in direct contact with the second surface 11b of the semiconductor substrate 11. Since the first amorphous semiconductor layer 17 is in direct contact with the second surface 11b of the semiconductor substrate 11, the distance between the first amorphous semiconductor layer 17 and the semiconductor substrate 11, and the first amorphous semiconductor The distance between the first amorphous semiconductor region 16 provided in the layer 17 and the semiconductor substrate 11 can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the first conductivity type of the first amorphous semiconductor layer 17 are first One amorphous semiconductor layer 17 can be collected with higher efficiency. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the second conductivity type of the first amorphous semiconductor region 16 are the first. A single amorphous semiconductor region 16 can be collected with higher efficiency. According to the photoelectric conversion element 3 of the present embodiment, the efficiency of converting light energy into electric energy can be improved.
 本実施の形態の光電変換素子3の製造方法では、半導体基板11の第2の表面11b上に第1の非晶質半導体層17を形成することは、半導体基板11の第2の表面11bに直接接する第1の非晶質半導体層17を形成することを含んでもよい。第1の非晶質半導体層17は半導体基板11の第2の表面11bに直接接しているので、第1の非晶質半導体層17と半導体基板11との距離及び第1の非晶質半導体層17内に設けられる第1の非晶質半導体領域16と半導体基板11との距離が減少し得る。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアのうち、第1の非晶質半導体層17が有する第1の導電型に対応するキャリアが、第1の非晶質半導体層17によってより高い効率で収集され得る。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアのうち、第1の非晶質半導体領域16が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域16によってより高い効率で収集され得る。本実施の形態の光電変換素子3の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 In the method for manufacturing the photoelectric conversion element 3 according to the present embodiment, the formation of the first amorphous semiconductor layer 17 on the second surface 11 b of the semiconductor substrate 11 means that the second surface 11 b of the semiconductor substrate 11 is formed. It may also include forming the first amorphous semiconductor layer 17 in direct contact. Since the first amorphous semiconductor layer 17 is in direct contact with the second surface 11b of the semiconductor substrate 11, the distance between the first amorphous semiconductor layer 17 and the semiconductor substrate 11, and the first amorphous semiconductor The distance between the first amorphous semiconductor region 16 provided in the layer 17 and the semiconductor substrate 11 can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the first conductivity type of the first amorphous semiconductor layer 17 are first One amorphous semiconductor layer 17 can be collected with higher efficiency. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the second conductivity type of the first amorphous semiconductor region 16 are the first. A single amorphous semiconductor region 16 can be collected with higher efficiency. According to the manufacturing method of the photoelectric conversion element 3 of the present embodiment, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
 (実施の形態8)
 図19及び図20を参照して、実施の形態8に係る光電変換素子5を説明する。本実施の形態の光電変換素子5は、半導体基板11と、トンネル誘電体層20と、第1の非晶質半導体層17と、第1の非晶質半導体領域16と、第1の電極19と、第2の電極18とを主に備える。
(Embodiment 8)
With reference to FIG.19 and FIG.20, the photoelectric conversion element 5 which concerns on Embodiment 8 is demonstrated. The photoelectric conversion element 5 of the present embodiment includes a semiconductor substrate 11, a tunnel dielectric layer 20, a first amorphous semiconductor layer 17, a first amorphous semiconductor region 16, and a first electrode 19. And the second electrode 18 are mainly provided.
 半導体基板11は、n型またはp型の半導体基板であってもよい。本実施の形態では、半導体基板11として、n型単結晶シリコン基板が用いられている。半導体基板11は、第1の表面11aと、第1の表面11aと反対側の第2の表面11bと、第1の表面11aと第2の表面11bとを接続する第1の側面11cと、第1の表面11aと第2の表面11bとを接続するとともに第1の側面11cと反対側に位置する第2の側面11dとを有している。半導体基板11の第1の表面11aは、光の入射面であってもよい。半導体基板11の第1の表面11a及び第2の表面11bは、第1の方向(例えば、x方向)と、第1の方向(例えば、x方向)と交差する第2の方向(例えば、y方向)とに延在する。半導体基板11の厚さ方向は、第1の方向(例えば、x方向)及び第2の方向(例えば、y方向)と交差する第3の方向(例えば、z方向)である。 The semiconductor substrate 11 may be an n-type or p-type semiconductor substrate. In the present embodiment, an n-type single crystal silicon substrate is used as the semiconductor substrate 11. The semiconductor substrate 11 includes a first surface 11a, a second surface 11b opposite to the first surface 11a, a first side surface 11c connecting the first surface 11a and the second surface 11b, The first surface 11a and the second surface 11b are connected to each other, and the second side surface 11d is located opposite to the first side surface 11c. The first surface 11a of the semiconductor substrate 11 may be a light incident surface. The first surface 11a and the second surface 11b of the semiconductor substrate 11 have a first direction (for example, x direction) and a second direction (for example, y direction) that intersects the first direction (for example, x direction). Direction). The thickness direction of the semiconductor substrate 11 is a third direction (for example, z direction) that intersects the first direction (for example, x direction) and the second direction (for example, y direction).
 トンネル誘電体層20は、半導体基板11の少なくとも第2の表面11b上に設けられる。特定的には、トンネル誘電体層20は、半導体基板11の第2の表面11bに接してもよい。トンネル誘電体層20は、酸化シリコン層のようなパッシベーション特性を有する誘電体層である。トンネル誘電体層20は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第2の表面11bにおいて再結合することを抑制することができる。トンネル誘電体層20は、光電変換素子5のパッシベーション特性を向上させることができる。トンネル誘電体層20は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアを、第1の非晶質半導体層17及び第1の非晶質半導体領域16にトンネルさせる。そのため、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが効率的に収集され得る。 The tunnel dielectric layer 20 is provided on at least the second surface 11 b of the semiconductor substrate 11. Specifically, the tunnel dielectric layer 20 may contact the second surface 11 b of the semiconductor substrate 11. The tunnel dielectric layer 20 is a dielectric layer having passivation characteristics such as a silicon oxide layer. The tunnel dielectric layer 20 suppresses recombination of carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 on the second surface 11 b of the semiconductor substrate 11. Can do. The tunnel dielectric layer 20 can improve the passivation characteristics of the photoelectric conversion element 5. The tunnel dielectric layer 20 uses carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 as the first amorphous semiconductor layer 17 and the first amorphous semiconductor. Tunnel to region 16. Therefore, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 can be efficiently collected.
 トンネル誘電体層20は、0.2nm以上5.0nm以下、好ましくは0.5nm以上3.0nm以下の厚さを有してもよい。トンネル誘電体層20の厚さは、第3の方向(例えば、z方向)におけるトンネル誘電体層20の長さであってもよい。0.2nm以上、好ましくは0.5nm以上の厚さを有するトンネル誘電体層20は、光電変換素子5のパッシベーション特性をさらに向上させることができる。5.0nm以下、好ましくは3.0nm以下の厚さを有するトンネル誘電体層20は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアを、第1の非晶質半導体層17及び第1の非晶質半導体領域16にさらに効率的にトンネルさせることができる。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアがさらに効率的に収集され得る。 The tunnel dielectric layer 20 may have a thickness of 0.2 nm to 5.0 nm, preferably 0.5 nm to 3.0 nm. The thickness of the tunnel dielectric layer 20 may be the length of the tunnel dielectric layer 20 in the third direction (eg, the z direction). The tunnel dielectric layer 20 having a thickness of 0.2 nm or more, preferably 0.5 nm or more can further improve the passivation characteristics of the photoelectric conversion element 5. The tunnel dielectric layer 20 having a thickness of 5.0 nm or less, preferably 3.0 nm or less, generates carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11. The tunnel can be more efficiently tunneled to the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16. Carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 can be collected more efficiently.
 トンネル誘電体層20は、半導体基板11の第1の表面11a上にさらに設けられてもよい。そのため、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが、半導体基板11の第1の表面11aにおいて再結合することが抑制され得る。トンネル誘電体層20は、半導体基板11の第1の側面11c及び第2の側面11d上にさらに設けられてもよい。そのため、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが、半導体基板11の第1の側面11c及び第2の側面11dにおいて再結合することが抑制され得る。 The tunnel dielectric layer 20 may be further provided on the first surface 11 a of the semiconductor substrate 11. Therefore, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 can be suppressed from recombining on the first surface 11 a of the semiconductor substrate 11. The tunnel dielectric layer 20 may be further provided on the first side surface 11 c and the second side surface 11 d of the semiconductor substrate 11. Therefore, it is suppressed that the carriers generated in the semiconductor substrate 11 by the light incident from the first surface 11a side of the semiconductor substrate 11 are recombined on the first side surface 11c and the second side surface 11d of the semiconductor substrate 11. Can be done.
 本実施の形態の光電変換素子5は、トンネル誘電体層20上に、i型を有する第2の非晶質半導体層15を備えてもよい。第1の非晶質半導体層17とトンネル誘電体層20との間及び第1の非晶質半導体領域16とトンネル誘電体層20との間に、i型を有する第2の非晶質半導体層15が設けられてもよい。特定的には、第2の非晶質半導体層15は、トンネル誘電体層20と接してもよい。本実施の形態では、第2の非晶質半導体層15として、i型の非晶質シリコン膜が用いられている。i型を有する第2の非晶質半導体層15は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第2の表面11bにおいて再結合することを抑制することができる。i型を有する第2の非晶質半導体層15は、光電変換素子5のパッシベーション特性を向上させることができる。 The photoelectric conversion element 5 of the present embodiment may include a second amorphous semiconductor layer 15 having i-type on the tunnel dielectric layer 20. A second amorphous semiconductor having i-type between the first amorphous semiconductor layer 17 and the tunnel dielectric layer 20 and between the first amorphous semiconductor region 16 and the tunnel dielectric layer 20. A layer 15 may be provided. Specifically, the second amorphous semiconductor layer 15 may be in contact with the tunnel dielectric layer 20. In the present embodiment, an i-type amorphous silicon film is used as the second amorphous semiconductor layer 15. In the second amorphous semiconductor layer 15 having i-type, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the second surface 11 b of the semiconductor substrate 11. Recombination can be suppressed. The i-type second amorphous semiconductor layer 15 can improve the passivation characteristics of the photoelectric conversion element 5.
 本実施の形態の光電変換素子5は、トンネル誘電体層20上に、第1の導電型を有する第1の非晶質半導体層17を備える。特定的には、トンネル誘電体層20と反対側の第2の非晶質半導体層15の表面上に、第1の導電型を有する第1の非晶質半導体層17が設けられてもよい。第1の非晶質半導体層17は、第1の導電型を有する第1の不純物を含む。第1の非晶質半導体層17は、p型またはn型の非晶質半導体層であり得る。第1の不純物は、ボロンのようなp型の不純物であってもよいし、燐のようなn型の不純物であってもよい。本実施の形態では、第1の不純物はボロンのようなp型の不純物であり、第1の非晶質半導体層17はp型の非晶質シリコン膜である。 The photoelectric conversion element 5 of the present embodiment includes the first amorphous semiconductor layer 17 having the first conductivity type on the tunnel dielectric layer 20. Specifically, the first amorphous semiconductor layer 17 having the first conductivity type may be provided on the surface of the second amorphous semiconductor layer 15 opposite to the tunnel dielectric layer 20. . The first amorphous semiconductor layer 17 includes a first impurity having the first conductivity type. The first amorphous semiconductor layer 17 may be a p-type or n-type amorphous semiconductor layer. The first impurity may be a p-type impurity such as boron or an n-type impurity such as phosphorus. In the present embodiment, the first impurity is a p-type impurity such as boron, and the first amorphous semiconductor layer 17 is a p-type amorphous silicon film.
 本実施の形態の光電変換素子5は、第1の非晶質半導体層17内に設けられるとともに、第1の導電型と異なる第2の導電型を有する第1の非晶質半導体領域16を備える。本実施の形態の光電変換素子5は、トンネル誘電体層20上に設けられるとともに、第1の導電型と異なる第2の導電型を有する第1の非晶質半導体領域16を備える。第1の非晶質半導体層17及び第1の非晶質半導体領域16は、連続して延在する1つの層を構成する。半導体基板11とは反対側の、第1の非晶質半導体層17及び第1の非晶質半導体領域16の表面は、連続して延在する1つの表面を構成してもよい。 The photoelectric conversion element 5 of the present embodiment is provided in the first amorphous semiconductor layer 17 and includes a first amorphous semiconductor region 16 having a second conductivity type different from the first conductivity type. Prepare. The photoelectric conversion element 5 of the present embodiment is provided on the tunnel dielectric layer 20 and includes a first amorphous semiconductor region 16 having a second conductivity type different from the first conductivity type. The first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 constitute one layer that extends continuously. The surfaces of the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 on the side opposite to the semiconductor substrate 11 may constitute one surface extending continuously.
 第1の非晶質半導体領域16は、第1の導電型を有する第1の不純物と、第1の導電型と異なる第2の導電型を有する第2の不純物とを含む。第1の非晶質半導体領域16は、第1の導電型を有する第1の不純物よりも第2の導電型を有する第2の不純物を多く含む等の理由により、第1の非晶質半導体領域16は全体として第2の導電型を有する。第1の非晶質半導体領域16は、n型またはp型の非晶質半導体領域であり得る。第2の不純物は、燐のようなn型の不純物であってもよいし、ボロンのようなp型の不純物であってもよい。本実施の形態では、第2の不純物は燐のようなn型の不純物であり、第1の非晶質半導体領域16はn型の非晶質シリコン領域である。第1の非晶質半導体領域16は、第2の方向(例えば、y方向)に延在するストライプ状に設けられてもよい。 The first amorphous semiconductor region 16 includes a first impurity having a first conductivity type and a second impurity having a second conductivity type different from the first conductivity type. The first amorphous semiconductor region 16 contains the second impurity having the second conductivity type more than the first impurity having the first conductivity type. Region 16 as a whole has the second conductivity type. The first amorphous semiconductor region 16 may be an n-type or p-type amorphous semiconductor region. The second impurity may be an n-type impurity such as phosphorus or a p-type impurity such as boron. In the present embodiment, the second impurity is an n-type impurity such as phosphorus, and the first amorphous semiconductor region 16 is an n-type amorphous silicon region. The first amorphous semiconductor region 16 may be provided in a stripe shape extending in the second direction (for example, the y direction).
 第1の非晶質半導体領域16における第1の不純物の濃度は、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向、すなわち、第1の方向(例えば、x方向)において一定であってもよい。第1の非晶質半導体領域16における第1の不純物の濃度は、第1の非晶質半導体層17における第1の不純物の濃度と実質的に同じであってもよい。第1の非晶質半導体領域16における第2の不純物の濃度は、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向、すなわち、第1の方向(例えば、x方向)において一定であってもよい。 The concentration of the first impurity in the first amorphous semiconductor region 16 is the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged, that is, the first May be constant in the direction (for example, the x direction). The concentration of the first impurity in the first amorphous semiconductor region 16 may be substantially the same as the concentration of the first impurity in the first amorphous semiconductor layer 17. The concentration of the second impurity in the first amorphous semiconductor region 16 is the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged, that is, the first May be constant in the direction (for example, the x direction).
 本実施の形態の光電変換素子5は、第1の非晶質半導体層17と電気的に接続される第1の電極19を備える。第1の電極19は、半導体基板11の第2の表面11b上に設けられてもよい。より特定的には、第1の電極19は、第1の非晶質半導体層17上に設けられてもよい。第1の電極19は、第2の方向(例えば、y方向)に延在するストライプ状に設けられてもよい。第1の電極19として、金属電極が例示され得る。本実施の形態では、第1の電極19として、銀(Ag)が用いられている。本実施の形態では、第1の電極19は、p型電極であってもよい。 The photoelectric conversion element 5 of the present embodiment includes a first electrode 19 that is electrically connected to the first amorphous semiconductor layer 17. The first electrode 19 may be provided on the second surface 11 b of the semiconductor substrate 11. More specifically, the first electrode 19 may be provided on the first amorphous semiconductor layer 17. The first electrode 19 may be provided in a stripe shape extending in the second direction (for example, the y direction). A metal electrode may be exemplified as the first electrode 19. In the present embodiment, silver (Ag) is used as the first electrode 19. In the present embodiment, the first electrode 19 may be a p-type electrode.
 本実施の形態の光電変換素子5は、第1の非晶質半導体領域16と電気的に接続される第2の電極18を備える。第2の電極18は、半導体基板11の第2の表面11b上に設けられてもよい。より特定的には、第2の電極18は、第1の非晶質半導体領域16上に設けられてもよい。第2の電極18は、第2の方向(例えば、y方向)に延在するストライプ状に設けられてもよい。第2の電極18として、金属電極が例示され得る。本実施の形態では、第2の電極18として、銀(Ag)が用いられている。本実施の形態では、第2の電極18は、n型電極であってもよい。 The photoelectric conversion element 5 of this embodiment includes a second electrode 18 that is electrically connected to the first amorphous semiconductor region 16. The second electrode 18 may be provided on the second surface 11 b of the semiconductor substrate 11. More specifically, the second electrode 18 may be provided on the first amorphous semiconductor region 16. The second electrode 18 may be provided in a stripe shape extending in the second direction (for example, the y direction). A metal electrode may be exemplified as the second electrode 18. In the present embodiment, silver (Ag) is used as the second electrode 18. In the present embodiment, the second electrode 18 may be an n-type electrode.
 本実施の形態の光電変換素子5では、半導体基板11と第1の非晶質半導体層17とが第2の非晶質半導体層15及びトンネル誘電体層20を介してヘテロ接合するとともに、半導体基板11と第1の非晶質半導体領域16とが第2の非晶質半導体層15及びトンネル誘電体層20を介してヘテロ接合する。そのため、向上されたパッシベーション特性と高い開放電圧VOCとを有する光電変換素子5が得られる。光電変換素子5において、光エネルギーを電気エネルギーに変換する効率が向上され得る。 In the photoelectric conversion element 5 of the present embodiment, the semiconductor substrate 11 and the first amorphous semiconductor layer 17 are heterojunctioned via the second amorphous semiconductor layer 15 and the tunnel dielectric layer 20, and the semiconductor The substrate 11 and the first amorphous semiconductor region 16 are heterojunctioned via the second amorphous semiconductor layer 15 and the tunnel dielectric layer 20. Therefore, the photoelectric conversion element 5 having improved passivation characteristics and a high open circuit voltage V OC can be obtained. In the photoelectric conversion element 5, the efficiency of converting light energy into electrical energy can be improved.
 本実施の形態の光電変換素子5では、半導体基板11の第1の表面11aは、凹凸構造を含んでもよい。第1の表面11a側から光電変換素子5に光は入射する。光の入射面である半導体基板11の第1の表面11a上に凹凸構造を設けることによって、半導体基板11の第1の表面11aにおいて入射光が反射されることが抑制され得て、より多くの光が光電変換素子5内に入射され得る。光電変換素子5において光エネルギーを電気エネルギーに変換する効率が向上され得る。 In the photoelectric conversion element 5 of the present embodiment, the first surface 11a of the semiconductor substrate 11 may include an uneven structure. Light enters the photoelectric conversion element 5 from the first surface 11a side. By providing the concavo-convex structure on the first surface 11a of the semiconductor substrate 11 that is the light incident surface, reflection of incident light on the first surface 11a of the semiconductor substrate 11 can be suppressed, and more Light can enter the photoelectric conversion element 5. The efficiency of converting light energy into electrical energy in the photoelectric conversion element 5 can be improved.
 本実施の形態の光電変換素子5は、半導体基板11の第1の表面11a上に、i型を有する第3の非晶質半導体層12を備えてもよい。半導体基板11の第1の表面11a上にi型を有する第3の非晶質半導体層12を設けることにより、半導体基板11の第1の表面11aにおけるパッシベーション特性が向上され得る。 The photoelectric conversion element 5 of the present embodiment may include an i-type third amorphous semiconductor layer 12 on the first surface 11 a of the semiconductor substrate 11. By providing the i-type third amorphous semiconductor layer 12 on the first surface 11 a of the semiconductor substrate 11, the passivation characteristics on the first surface 11 a of the semiconductor substrate 11 can be improved.
 本実施の形態の光電変換素子5は、半導体基板11の第1の表面11a上に、半導体基板11と同じ導電型を有する第4の非晶質半導体層13を備えてもよい。特定的には、i型を有する第3の非晶質半導体層12上に、半導体基板11と同じ導電型を有する第4の非晶質半導体層13が設けられてもよい。第4の非晶質半導体層13は、n型またはp型の非晶質半導体層であり得る。本実施の形態では、第4の非晶質半導体層13として、n型の非晶質シリコン膜が用いられている。半導体基板11と同じ導電型を有する第4の非晶質半導体層13は、表面電界層として機能してもよい。光電変換素子5に光が入射することによって、半導体基板11内にキャリアが発生する。半導体基板11と同じ導電型を有する第4の非晶質半導体層13は半導体基板11の第1の表面11a近傍に電界を生じさせて、半導体基板11の第1の表面11a近傍においてエネルギーバンドを湾曲させる。この電界とエネルギーバンドの湾曲とによって、半導体基板11の第1の表面11aに近づくキャリアは半導体基板11の内部に押し戻される。半導体基板11の第1の表面11aにおいて、キャリアが再結合することが抑制され得る。 The photoelectric conversion element 5 of the present embodiment may include a fourth amorphous semiconductor layer 13 having the same conductivity type as the semiconductor substrate 11 on the first surface 11a of the semiconductor substrate 11. Specifically, a fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 may be provided on the third amorphous semiconductor layer 12 having i type. The fourth amorphous semiconductor layer 13 can be an n-type or p-type amorphous semiconductor layer. In the present embodiment, an n-type amorphous silicon film is used as the fourth amorphous semiconductor layer 13. The fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 may function as a surface electric field layer. When light enters the photoelectric conversion element 5, carriers are generated in the semiconductor substrate 11. The fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 generates an electric field in the vicinity of the first surface 11a of the semiconductor substrate 11, and an energy band is generated in the vicinity of the first surface 11a of the semiconductor substrate 11. Curve. Carriers approaching the first surface 11 a of the semiconductor substrate 11 are pushed back into the semiconductor substrate 11 by the electric field and the curvature of the energy band. In the first surface 11a of the semiconductor substrate 11, recombination of carriers can be suppressed.
 半導体基板11の第1の表面11aの上に、誘電体層14が設けられてもよい。誘電体層14は、単層で構成されてもよいし、複数層で構成されてもよい。誘電体層14の材料として、窒化シリコン(SiNx)、酸化シリコン(SiOx)が例示され得る。誘電体層14は、反射防止膜として機能してもよい。誘電体層14は、パッシベーション膜として機能してもよい。 A dielectric layer 14 may be provided on the first surface 11 a of the semiconductor substrate 11. The dielectric layer 14 may be composed of a single layer or a plurality of layers. Examples of the material of the dielectric layer 14 include silicon nitride (SiN x ) and silicon oxide (SiO x ). The dielectric layer 14 may function as an antireflection film. The dielectric layer 14 may function as a passivation film.
 図3、図4及び図21から図26を参照して、本実施の形態の光電変換素子5の製造方法の一例について以下説明する。 An example of a method for manufacturing the photoelectric conversion element 5 of the present embodiment will be described below with reference to FIGS. 3, 4, and 21 to 26.
 図3を参照して、第1の表面11aと第1の表面11aと反対側の第2の表面11bとを有する半導体基板11が用意される。図4を参照して、半導体基板11の第1の表面11aに凹凸構造が形成されてもよい。例えば、n型単結晶シリコン基板である半導体基板11の第1の表面11aを水酸化カリウム(KOH)を用いて異方性的にエッチングすることによって、半導体基板11の第1の表面11aに凹凸構造が形成されてもよい。 Referring to FIG. 3, a semiconductor substrate 11 having a first surface 11a and a second surface 11b opposite to the first surface 11a is prepared. With reference to FIG. 4, an uneven structure may be formed on first surface 11 a of semiconductor substrate 11. For example, the first surface 11a of the semiconductor substrate 11 which is an n-type single crystal silicon substrate is anisotropically etched using potassium hydroxide (KOH), whereby the first surface 11a of the semiconductor substrate 11 is uneven. A structure may be formed.
 図21を参照して、半導体基板11の第2の表面11b上にトンネル誘電体層20が形成される。トンネル誘電体層20は、半導体基板11の第1の表面11a上にさらに形成されてもよい。トンネル誘電体層20は、半導体基板11の第1の側面11c及び第2の側面11d上にさらに形成されてもよい。本実施の形態では、半導体基板11の全表面にトンネル誘電体層20が形成されている。 Referring to FIG. 21, tunnel dielectric layer 20 is formed on second surface 11 b of semiconductor substrate 11. The tunnel dielectric layer 20 may be further formed on the first surface 11 a of the semiconductor substrate 11. The tunnel dielectric layer 20 may be further formed on the first side surface 11 c and the second side surface 11 d of the semiconductor substrate 11. In the present embodiment, tunnel dielectric layer 20 is formed on the entire surface of semiconductor substrate 11.
 半導体基板11の少なくとも第2の表面11bをオゾン水または過酸化水素水に浸漬することによって、半導体基板11の少なくとも第2の表面11b上にトンネル誘電体層20が形成されてもよい。半導体基板11の少なくとも第2の表面11bを熱酸化することによって、半導体基板11の少なくとも第2の表面11b上にトンネル誘電体層20が形成されてもよい。半導体基板11の少なくとも第2の表面11b上にトンネル誘電体層20を堆積することによって、半導体基板11の少なくとも第2の表面11b上にトンネル誘電体層20が形成されてもよい。 The tunnel dielectric layer 20 may be formed on at least the second surface 11b of the semiconductor substrate 11 by immersing at least the second surface 11b of the semiconductor substrate 11 in ozone water or hydrogen peroxide solution. The tunnel dielectric layer 20 may be formed on at least the second surface 11 b of the semiconductor substrate 11 by thermally oxidizing at least the second surface 11 b of the semiconductor substrate 11. The tunnel dielectric layer 20 may be formed on at least the second surface 11 b of the semiconductor substrate 11 by depositing the tunnel dielectric layer 20 on at least the second surface 11 b of the semiconductor substrate 11.
 図22を参照して、半導体基板11の第1の表面11a上に、i型を有する第3の非晶質半導体層12が形成されてもよい。半導体基板11の第1の表面11a上に、半導体基板11と同じ導電型を有する第4の非晶質半導体層13が形成されてもよい。特定的には、i型を有する第3の非晶質半導体層12上に、半導体基板11と同じ導電型を有する第4の非晶質半導体層13が形成されてもよい。第3の非晶質半導体層12及び第4の非晶質半導体層13の形成方法は、特に限定されないが、たとえばプラズマ化学的気相堆積(CVD)法であり得る。 Referring to FIG. 22, i-type third amorphous semiconductor layer 12 may be formed on first surface 11 a of semiconductor substrate 11. A fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 may be formed on the first surface 11 a of the semiconductor substrate 11. Specifically, a fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 may be formed on the i-type third amorphous semiconductor layer 12. A method for forming the third amorphous semiconductor layer 12 and the fourth amorphous semiconductor layer 13 is not particularly limited, and may be, for example, a plasma chemical vapor deposition (CVD) method.
 図23を参照して、半導体基板11の第1の表面11a上に誘電体層14が形成されてもよい。特定的には、半導体基板11と同じ導電型を有する第4の非晶質半導体層13上に誘電体層14が形成されてもよい。誘電体層14の形成方法は、特に限定されないが、たとえばプラズマ化学的気相堆積(CVD)法であり得る。 Referring to FIG. 23, dielectric layer 14 may be formed on first surface 11a of semiconductor substrate 11. Specifically, the dielectric layer 14 may be formed on the fourth amorphous semiconductor layer 13 having the same conductivity type as the semiconductor substrate 11. The formation method of the dielectric layer 14 is not particularly limited, but may be, for example, a plasma chemical vapor deposition (CVD) method.
 図24を参照して、トンネル誘電体層20上に、i型を有する第2の非晶質半導体層15が形成されてもよい。図25を参照して、トンネル誘電体層20上に、第1の導電型を有する第1の非晶質半導体層17が形成される。特定的には、i型を有する第2の非晶質半導体層15上に、第1の導電型を有する第1の非晶質半導体層17が形成される。第1の非晶質半導体層17は第1の導電型を有する第1の不純物を含む。第2の非晶質半導体層15及び第1の非晶質半導体層17の形成方法は、特に限定されないが、たとえばプラズマ化学的気相堆積(CVD)法であり得る。 Referring to FIG. 24, second amorphous semiconductor layer 15 having i-type may be formed on tunnel dielectric layer 20. Referring to FIG. 25, first amorphous semiconductor layer 17 having the first conductivity type is formed on tunnel dielectric layer 20. Specifically, the first amorphous semiconductor layer 17 having the first conductivity type is formed on the second amorphous semiconductor layer 15 having the i type. The first amorphous semiconductor layer 17 includes a first impurity having the first conductivity type. A method for forming the second amorphous semiconductor layer 15 and the first amorphous semiconductor layer 17 is not particularly limited, and may be, for example, a plasma chemical vapor deposition (CVD) method.
 図26を参照して、第1の非晶質半導体層17内に第2の導電型を有する第1の非晶質半導体領域16が形成される。第1の非晶質半導体層17内に第1の非晶質半導体領域16を形成することは、第1の非晶質半導体層17の一部に、第1の導電型と異なる第2の導電型を有する第2の不純物をドーピングすることを含む。第1の非晶質半導体領域16は、第1の導電型を有する第1の不純物と、第1の導電型と異なる第2の導電型を有する第2の不純物とを含む。第1の非晶質半導体領域16は、第1の導電型を有する第1の不純物よりも第2の導電型を有する第2の不純物を多く含む等の理由により、第1の非晶質半導体領域16は全体として第2の導電型を有する。 Referring to FIG. 26, the first amorphous semiconductor region 16 having the second conductivity type is formed in the first amorphous semiconductor layer 17. The formation of the first amorphous semiconductor region 16 in the first amorphous semiconductor layer 17 means that a second portion different from the first conductivity type is formed in a part of the first amorphous semiconductor layer 17. Doping with a second impurity having a conductivity type. The first amorphous semiconductor region 16 includes a first impurity having a first conductivity type and a second impurity having a second conductivity type different from the first conductivity type. The first amorphous semiconductor region 16 contains the second impurity having the second conductivity type more than the first impurity having the first conductivity type. Region 16 as a whole has the second conductivity type.
 第1の非晶質半導体領域16における第1の不純物の濃度は、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向において一定であってもよい。第1の非晶質半導体領域16における第1の不純物の濃度は、第1の非晶質半導体層17における第1の不純物の濃度と実質的に同じであってもよい。第1の非晶質半導体領域16は、第1の非晶質半導体層17の全厚さにわたって存在してもよい。 The concentration of the first impurity in the first amorphous semiconductor region 16 is constant in the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged. Also good. The concentration of the first impurity in the first amorphous semiconductor region 16 may be substantially the same as the concentration of the first impurity in the first amorphous semiconductor layer 17. The first amorphous semiconductor region 16 may exist over the entire thickness of the first amorphous semiconductor layer 17.
 第1の非晶質半導体層17の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17の一部に第2の不純物をイオン注入することを含んでもよい。すなわち、イオン注入法によって、第1の非晶質半導体層17の一部に第2の不純物がドーピングされてもよい。具体的には、第2の不純物のイオンビーム21を第1の非晶質半導体層17の一部に照射することによって、第1の非晶質半導体層17の一部に第2の不純物がドーピングされてもよい。こうして第1の非晶質半導体層17内に第2の導電型を有する第1の非晶質半導体領域16が形成されてもよい。 Doping the second impurity in part of the first amorphous semiconductor layer 17 may include ion implantation of the second impurity in part of the first amorphous semiconductor layer 17. That is, the second impurity may be doped into part of the first amorphous semiconductor layer 17 by ion implantation. Specifically, by irradiating a part of the first amorphous semiconductor layer 17 with the ion beam 21 of the second impurity, the second impurity is applied to a part of the first amorphous semiconductor layer 17. It may be doped. Thus, the first amorphous semiconductor region 16 having the second conductivity type may be formed in the first amorphous semiconductor layer 17.
 第1の非晶質半導体層17の一部に第2の不純物がドーピングされる際に、第1の非晶質半導体層17の他の部分に第2の不純物がドープされること防ぐために、第1の非晶質半導体層17の一部に対応する開口部を有するとともに第1の非晶質半導体層17の他の部分を覆うマスク22が用いられてもよい。 In order to prevent the second impurity from being doped in the other part of the first amorphous semiconductor layer 17 when the second impurity is doped in a part of the first amorphous semiconductor layer 17, A mask 22 having an opening corresponding to a part of the first amorphous semiconductor layer 17 and covering the other part of the first amorphous semiconductor layer 17 may be used.
 第1の非晶質半導体層17の一部に第2の不純物がドーピングされた後に、第1の非晶質半導体層17に含まれる第1の不純物及び第1の非晶質半導体領域16に含まれる第2の不純物を活性化するために、第1の非晶質半導体層17及び第1の非晶質半導体領域16がアニールされてもよい。それから、半導体基板11の第2の表面11b上に、第1の非晶質半導体層17と電気的に接続される第1の電極19が形成される。特定的には、第1の非晶質半導体層17上に第1の電極19が形成される。半導体基板11の第2の表面11b上に、第1の非晶質半導体領域16と電気的に接続される第2の電極18が形成される。特定的には、第1の非晶質半導体領域16上に第2の電極18が形成される。こうして、図19及び図20に示される本実施の形態の光電変換素子5が製造され得る。 After a part of the first amorphous semiconductor layer 17 is doped with the second impurity, the first impurity contained in the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 are added to the first amorphous semiconductor layer 17. In order to activate the second impurity contained, the first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 may be annealed. Then, a first electrode 19 that is electrically connected to the first amorphous semiconductor layer 17 is formed on the second surface 11 b of the semiconductor substrate 11. Specifically, the first electrode 19 is formed on the first amorphous semiconductor layer 17. A second electrode 18 that is electrically connected to the first amorphous semiconductor region 16 is formed on the second surface 11 b of the semiconductor substrate 11. Specifically, the second electrode 18 is formed on the first amorphous semiconductor region 16. In this way, the photoelectric conversion element 5 of the present embodiment shown in FIGS. 19 and 20 can be manufactured.
 本実施の形態の光電変換素子5及びその製造方法の効果を説明する。
 本実施の形態の光電変換素子5は、第1の表面11aと第1の表面11aと反対側の第2の表面11bとを有する半導体基板11と、第2の表面11b上に設けられたトンネル誘電体層20と、トンネル誘電体層20上に設けられるとともに、第1の導電型を有する第1の非晶質半導体層17と、トンネル誘電体層20上に設けられるとともに、第1の導電型と異なる第2の導電型を有する第1の非晶質半導体領域16とを備える。第1の非晶質半導体層17は第1の導電型を有する第1の不純物を含む。第1の非晶質半導体領域16は第1の不純物と第2の導電型を有する第2の不純物とを含む。第1の非晶質半導体層17及び第1の非晶質半導体領域16は、連続して延在する1つの層を構成する。
The effect of the photoelectric conversion element 5 of this Embodiment and its manufacturing method is demonstrated.
The photoelectric conversion element 5 of this embodiment includes a semiconductor substrate 11 having a first surface 11a and a second surface 11b opposite to the first surface 11a, and a tunnel provided on the second surface 11b. A dielectric layer 20 is provided on the tunnel dielectric layer 20, and is provided on the first amorphous semiconductor layer 17 having the first conductivity type, the tunnel dielectric layer 20, and the first conductive layer. And a first amorphous semiconductor region 16 having a second conductivity type different from the type. The first amorphous semiconductor layer 17 includes a first impurity having the first conductivity type. The first amorphous semiconductor region 16 includes a first impurity and a second impurity having a second conductivity type. The first amorphous semiconductor layer 17 and the first amorphous semiconductor region 16 constitute one layer that extends continuously.
 トンネル誘電体層20は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第2の表面11bにおいて再結合することを抑制することができる。本実施の形態の光電変換素子5は、向上されたパッシベーション特性を有する。 The tunnel dielectric layer 20 suppresses recombination of carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 on the second surface 11 b of the semiconductor substrate 11. Can do. The photoelectric conversion element 5 of the present embodiment has improved passivation characteristics.
 トンネル誘電体層20は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアを、第1の非晶質半導体層17及び第1の非晶質半導体領域16にトンネルさせる。本実施の形態の光電変換素子5によれば、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが効率的に収集され得る。 The tunnel dielectric layer 20 uses carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 as the first amorphous semiconductor layer 17 and the first amorphous semiconductor. Tunnel to region 16. According to the photoelectric conversion element 5 of the present embodiment, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 can be efficiently collected.
 本実施の形態の光電変換素子5は、半導体基板11の第2の表面11b上にトンネル誘電体層20及び第1の非晶質半導体層17が形成された後、半導体基板11の第2の表面11bを露出させることなく製造し得る構造を備えている。半導体基板11の第2の表面11bに汚染物質が付着したり、非晶質半導体層のエッチングにより半導体基板11の第2の表面11bが荒れたりすることなく製造し得る構造を、本実施の形態の光電変換素子5は備えている。本実施の形態の光電変換素子5は、向上された特性及び信頼性を有する。 In the photoelectric conversion element 5 of the present embodiment, after the tunnel dielectric layer 20 and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11, the second of the semiconductor substrate 11 is formed. It has a structure that can be manufactured without exposing the surface 11b. A structure that can be manufactured without contamination of the second surface 11b of the semiconductor substrate 11 or roughening of the second surface 11b of the semiconductor substrate 11 due to etching of the amorphous semiconductor layer is described in this embodiment. The photoelectric conversion element 5 is provided. The photoelectric conversion element 5 of the present embodiment has improved characteristics and reliability.
 本実施の形態の光電変換素子5では、第1の非晶質半導体領域16は、第1の非晶質半導体層17の全厚さにわたって存在してもよい。第1の非晶質半導体領域16と半導体基板11との距離が減少し得る。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアのうち、第1の非晶質半導体領域16が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域16によってより高い効率で収集され得る。本実施の形態の光電変換素子5によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 In the photoelectric conversion element 5 of the present embodiment, the first amorphous semiconductor region 16 may exist over the entire thickness of the first amorphous semiconductor layer 17. The distance between the first amorphous semiconductor region 16 and the semiconductor substrate 11 can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the second conductivity type of the first amorphous semiconductor region 16 are the first. A single amorphous semiconductor region 16 can be collected with higher efficiency. According to the photoelectric conversion element 5 of the present embodiment, the efficiency of converting light energy into electric energy can be improved.
 本実施の形態の光電変換素子5では、第1の非晶質半導体領域16における第1の不純物の濃度は、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向において一定であってもよい。半導体基板11の第2の表面11b上にトンネル誘電体層20及び第1の非晶質半導体層17が形成された後、半導体基板11の第2の表面11bを露出させることなく製造し得る構造を、光電変換素子5は備えている。本実施の形態の光電変換素子5は、向上された特性及び信頼性を有する。 In the photoelectric conversion element 5 of the present embodiment, the concentration of the first impurity in the first amorphous semiconductor region 16 is such that the first amorphous semiconductor region 16 and the first amorphous semiconductor layer 17 are the same. It may be constant in the alternately arranged directions. A structure that can be manufactured without exposing the second surface 11b of the semiconductor substrate 11 after the tunnel dielectric layer 20 and the first amorphous semiconductor layer 17 are formed on the second surface 11b of the semiconductor substrate 11. Is provided with the photoelectric conversion element 5. The photoelectric conversion element 5 of the present embodiment has improved characteristics and reliability.
 本実施の形態の光電変換素子5は、第1の非晶質半導体層17とトンネル誘電体層20との間及び第1の非晶質半導体領域16とトンネル誘電体層20との間に、i型を有する第2の非晶質半導体層15をさらに備えてもよい。i型を有する第2の非晶質半導体層15は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第2の表面11bにおいて再結合することを抑制することができる。本実施の形態の光電変換素子5によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上され得る。 In the photoelectric conversion element 5 of the present embodiment, between the first amorphous semiconductor layer 17 and the tunnel dielectric layer 20 and between the first amorphous semiconductor region 16 and the tunnel dielectric layer 20, An i-type second amorphous semiconductor layer 15 may be further provided. In the second amorphous semiconductor layer 15 having i-type, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the second surface 11 b of the semiconductor substrate 11. Recombination can be suppressed. According to the photoelectric conversion element 5 of the present embodiment, the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
 本実施の形態の光電変換素子5において、トンネル誘電体層20は0.2nm以上5.0nm以下の厚さを有してもよい。0.2nm以上の厚さを有するトンネル誘電体層20は、光電変換素子5のパッシベーション特性をさらに向上させることができる。5.0nm以下の厚さを有するトンネル誘電体層20は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアを、第1の非晶質半導体層17及び第1の非晶質半導体領域16にさらに効率的にトンネルさせることができる。本実施の形態の光電変換素子5によれば、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアがさらに効率的に収集され得る。 In the photoelectric conversion element 5 of the present embodiment, the tunnel dielectric layer 20 may have a thickness of 0.2 nm to 5.0 nm. The tunnel dielectric layer 20 having a thickness of 0.2 nm or more can further improve the passivation characteristics of the photoelectric conversion element 5. The tunnel dielectric layer 20 having a thickness of 5.0 nm or less is configured to cause carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 to be generated in the first amorphous semiconductor layer. 17 and the first amorphous semiconductor region 16 can be more efficiently tunneled. According to the photoelectric conversion element 5 of the present embodiment, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 can be collected more efficiently.
 本実施の形態の光電変換素子5は、半導体基板11の第2の表面11b上に設けられるとともに、第1の非晶質半導体層17と電気的に接続される第1の電極19と、半導体基板11の第2の表面11b上に設けられるとともに、第1の非晶質半導体領域16と電気的に接続される第2の電極18とをさらに備えてもよい。本実施の形態の光電変換素子5では、第1の電極19及び第2の電極18は、光の入射面である半導体基板11の第1の表面11a側に設けられていない。光電変換素子5に入射する光は、第1の電極19及び第2の電極18によって遮られない。本実施の形態の光電変換素子5によれば、高い短絡電流JSCが得られ、光エネルギーを電気エネルギーに変換する効率が向上され得る。 The photoelectric conversion element 5 according to the present embodiment is provided on the second surface 11b of the semiconductor substrate 11, and the first electrode 19 electrically connected to the first amorphous semiconductor layer 17 and the semiconductor A second electrode 18 that is provided on the second surface 11 b of the substrate 11 and electrically connected to the first amorphous semiconductor region 16 may be further provided. In the photoelectric conversion element 5 of the present embodiment, the first electrode 19 and the second electrode 18 are not provided on the first surface 11a side of the semiconductor substrate 11 which is a light incident surface. Light incident on the photoelectric conversion element 5 is not blocked by the first electrode 19 and the second electrode 18. According to the photoelectric conversion element 5 of the present embodiment, a high short-circuit current J SC can be obtained, and the efficiency of converting light energy into electrical energy can be improved.
 本実施の形態の光電変換素子5は、半導体基板11の第1の表面11a上に誘電体層14をさらに備えてもよい。誘電体層14が反射防止膜として機能するとき、誘電体層14は、より多くの光を光電変換素子5内に入射させることができる。本実施の形態の光電変換素子5によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。誘電体層14がパッシベーション膜として機能するとき、誘電体層14は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第1の表面11aにおいて再結合することを抑制することができる。本実施の形態の光電変換素子5によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 The photoelectric conversion element 5 of the present embodiment may further include a dielectric layer 14 on the first surface 11a of the semiconductor substrate 11. When the dielectric layer 14 functions as an antireflection film, the dielectric layer 14 can cause more light to enter the photoelectric conversion element 5. According to the photoelectric conversion element 5 of the present embodiment, the efficiency of converting light energy into electric energy can be improved. When the dielectric layer 14 functions as a passivation film, the carrier generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 is the first dielectric layer 14 of the semiconductor substrate 11. It is possible to suppress recombination on the surface 11a. According to the photoelectric conversion element 5 of the present embodiment, the efficiency of converting light energy into electric energy can be improved.
 本実施の形態の光電変換素子5は、半導体基板11の第1の表面11a上に、i型を有する第3の非晶質半導体層12をさらに備えてもよい。i型を有する第3の非晶質半導体層12は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第1の表面11aにおいて再結合することを抑制することができる。本実施の形態の光電変換素子5によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上され得る。 The photoelectric conversion element 5 according to the present embodiment may further include an i-type third amorphous semiconductor layer 12 on the first surface 11 a of the semiconductor substrate 11. In the third amorphous semiconductor layer 12 having i-type, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the first surface 11 a of the semiconductor substrate 11. Recombination can be suppressed. According to the photoelectric conversion element 5 of the present embodiment, the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
 本実施の形態の光電変換素子5は、半導体基板11の第1の表面11a上に、半導体基板11と同じ導電型を有する第4の非晶質半導体層13をさらに備えてもよい。半導体基板11と同じ導電型を有する第4の非晶質半導体層13は、光電変換素子5に光が入射することによって半導体基板11内に発生したキャリアのうち半導体基板11の第1の表面11aに近づくキャリアを、半導体基板11の内部に押し戻すことができる。第4の非晶質半導体層13は、このキャリアが半導体基板11の第1の表面11aにおいて再結合することを抑制することができる。本実施の形態の光電変換素子5によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上され得る。 The photoelectric conversion element 5 of the present embodiment may further include a fourth amorphous semiconductor layer 13 having the same conductivity type as the semiconductor substrate 11 on the first surface 11 a of the semiconductor substrate 11. The fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 has the first surface 11 a of the semiconductor substrate 11 among the carriers generated in the semiconductor substrate 11 when light enters the photoelectric conversion element 5. The carrier approaching can be pushed back into the semiconductor substrate 11. The fourth amorphous semiconductor layer 13 can suppress recombination of this carrier on the first surface 11 a of the semiconductor substrate 11. According to the photoelectric conversion element 5 of the present embodiment, the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
 本実施の形態の光電変換素子5では、半導体基板11の第1の表面11aは、凹凸構造を含んでもよい。光の入射面である半導体基板11の第1の表面11a上に凹凸構造を設けることによって、より多くの光が光電変換素子5内に入射され得る。本実施の形態の光電変換素子5によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 In the photoelectric conversion element 5 of the present embodiment, the first surface 11a of the semiconductor substrate 11 may include an uneven structure. By providing a concavo-convex structure on the first surface 11 a of the semiconductor substrate 11, which is the light incident surface, more light can be incident into the photoelectric conversion element 5. According to the photoelectric conversion element 5 of the present embodiment, the efficiency of converting light energy into electric energy can be improved.
 本実施の形態の光電変換素子5の製造方法は、第1の表面11aと第1の表面11aと反対側の第2の表面11bとを有する半導体基板11の第2の表面11b上にトンネル誘電体層20を形成することと、トンネル誘電体層20上に、第1の導電型を有する第1の非晶質半導体層17を形成することとを備える。第1の非晶質半導体層17は第1の導電型を有する第1の不純物を含む。本実施の形態の光電変換素子5の製造方法は、第1の非晶質半導体層17内に第2の導電型を有する第1の非晶質半導体領域16を形成することをさらに備える。第1の非晶質半導体層17内に第1の非晶質半導体領域16を形成することは、第1の非晶質半導体層17の一部に、第1の導電型と異なる第2の導電型を有する第2の不純物をドーピングすることを含む。 In the method of manufacturing the photoelectric conversion element 5 according to the present embodiment, the tunnel dielectric is formed on the second surface 11b of the semiconductor substrate 11 having the first surface 11a and the second surface 11b opposite to the first surface 11a. Forming a body layer 20 and forming a first amorphous semiconductor layer 17 having a first conductivity type on the tunnel dielectric layer 20. The first amorphous semiconductor layer 17 includes a first impurity having the first conductivity type. The method for manufacturing the photoelectric conversion element 5 according to the present embodiment further includes forming the first amorphous semiconductor region 16 having the second conductivity type in the first amorphous semiconductor layer 17. The formation of the first amorphous semiconductor region 16 in the first amorphous semiconductor layer 17 means that a second portion different from the first conductivity type is formed in a part of the first amorphous semiconductor layer 17. Doping with a second impurity having a conductivity type.
 トンネル誘電体層20は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第2の表面11bにおいて再結合することを抑制することができる。本実施の形態の光電変換素子5の製造方法によれば、向上されたパッシベーション特性を有する光電変換素子が製造され得る。 The tunnel dielectric layer 20 suppresses recombination of carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 on the second surface 11 b of the semiconductor substrate 11. Can do. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element having improved passivation characteristics can be manufactured.
 トンネル誘電体層20は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアを、第1の非晶質半導体層17及び第1の非晶質半導体領域16にトンネルさせる。本実施の形態の光電変換素子5の製造方法によれば、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアを効率的に収集することができる光電変換素子が製造され得る。 The tunnel dielectric layer 20 uses carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 as the first amorphous semiconductor layer 17 and the first amorphous semiconductor. Tunnel to region 16. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric that can efficiently collect carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11. A conversion element can be manufactured.
 本実施の形態の光電変換素子5の製造方法では、第1の非晶質半導体層17が形成される前に、半導体基板11の第2の表面11bはトンネル誘電体層20によって覆われている。半導体基板11の第2の表面11b上にトンネル誘電体層20及び第1の非晶質半導体層17が形成された後、半導体基板11の第2の表面11bを露出させることなく、光電変換素子5が製造され得る。半導体基板11の第2の表面11bに汚染物質が付着したり、非晶質半導体層のエッチングにより半導体基板11の第2の表面11bが荒れたりすることなく、光電変換素子5が製造され得る。本実施の形態の光電変換素子5の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が製造され得る。 In the method for manufacturing the photoelectric conversion element 5 of the present embodiment, the second surface 11b of the semiconductor substrate 11 is covered with the tunnel dielectric layer 20 before the first amorphous semiconductor layer 17 is formed. . After the tunnel dielectric layer 20 and the first amorphous semiconductor layer 17 are formed on the second surface 11b of the semiconductor substrate 11, the photoelectric conversion element is exposed without exposing the second surface 11b of the semiconductor substrate 11. 5 can be manufactured. The photoelectric conversion element 5 can be manufactured without the contaminants adhering to the second surface 11b of the semiconductor substrate 11 or the second surface 11b of the semiconductor substrate 11 being roughened by etching the amorphous semiconductor layer. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
 本実施の形態の光電変換素子5の製造方法では、第1の非晶質半導体領域16は、第1の非晶質半導体層17の全厚さにわたって存在してもよい。第1の非晶質半導体領域16と半導体基板11との距離が減少し得る。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアのうち、第1の非晶質半導体領域16が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域16によってより高い効率で収集され得る。本実施の形態の光電変換素子5の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 In the method for manufacturing the photoelectric conversion element 5 of the present embodiment, the first amorphous semiconductor region 16 may exist over the entire thickness of the first amorphous semiconductor layer 17. The distance between the first amorphous semiconductor region 16 and the semiconductor substrate 11 can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the second conductivity type of the first amorphous semiconductor region 16 are the first. A single amorphous semiconductor region 16 can be collected with higher efficiency. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element with improved efficiency for converting light energy into electric energy can be manufactured.
 本実施の形態の光電変換素子5の製造方法では、第1の非晶質半導体領域16における第1の不純物の濃度は、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向において一定であってもよい。そのため、半導体基板11の第2の表面11b上にトンネル誘電体層20及び第1の非晶質半導体層17が形成された後、半導体基板11の第2の表面11bを露出させることなく、光電変換素子5が製造され得る。本実施の形態の光電変換素子5の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が製造され得る。 In the method for manufacturing the photoelectric conversion element 5 of the present embodiment, the concentration of the first impurity in the first amorphous semiconductor region 16 is the same as that of the first amorphous semiconductor region 16 and the first amorphous semiconductor layer. It may be constant in a direction in which 17 and 17 are alternately arranged. Therefore, after the tunnel dielectric layer 20 and the first amorphous semiconductor layer 17 are formed on the second surface 11b of the semiconductor substrate 11, the photoelectric conversion is performed without exposing the second surface 11b of the semiconductor substrate 11. The conversion element 5 can be manufactured. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
 本実施の形態の光電変換素子5の製造方法は、トンネル誘電体層20上に第1の非晶質半導体層17を形成する前に、トンネル誘電体層20上に、i型を有する第2の非晶質半導体層15を形成することをさらに備えてもよい。i型を有する第2の非晶質半導体層15は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第2の表面11bにおいて再結合することを抑制することができる。本実施の形態の光電変換素子5の製造方法によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上された光電変換素子が製造され得る。 In the method of manufacturing the photoelectric conversion element 5 according to the present embodiment, before forming the first amorphous semiconductor layer 17 on the tunnel dielectric layer 20, a second i-type is formed on the tunnel dielectric layer 20. The amorphous semiconductor layer 15 may be further formed. In the second amorphous semiconductor layer 15 having i-type, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the second surface 11 b of the semiconductor substrate 11. Recombination can be suppressed. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element with improved passivation characteristics and efficiency of converting light energy into electric energy can be manufactured.
 本実施の形態の光電変換素子5の製造方法では、第1の非晶質半導体層17の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17の一部に第2の不純物をイオン注入することを含んでもよい。本実施の形態の光電変換素子5の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 In the method for manufacturing the photoelectric conversion element 5 according to the present embodiment, doping a second impurity into a part of the first amorphous semiconductor layer 17 causes a part of the first amorphous semiconductor layer 17 to be doped. Ion implantation of the second impurity may be included. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 本実施の形態の光電変換素子5の製造方法において、半導体基板11の第2の表面11b上にトンネル誘電体層20を形成することは、半導体基板11の第2の表面11bをオゾン水または過酸化水素水に浸漬することを含んでもよい。本実施の形態の光電変換素子5の製造方法によれば、半導体基板11の第2の表面11bをオゾン水または過酸化水素水に浸漬するという簡単な工程によって、トンネル誘電体層20が早く形成され得る。 In the method for manufacturing the photoelectric conversion element 5 according to the present embodiment, forming the tunnel dielectric layer 20 on the second surface 11b of the semiconductor substrate 11 means that the second surface 11b of the semiconductor substrate 11 is made of ozone water or excess water. It may include soaking in hydrogen oxide water. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, the tunnel dielectric layer 20 is quickly formed by a simple process of immersing the second surface 11b of the semiconductor substrate 11 in ozone water or hydrogen peroxide water. Can be done.
 本実施の形態の光電変換素子5の製造方法において、半導体基板11の第2の表面11b上にトンネル誘電体層20を形成することは、半導体基板11の第2の表面11bを熱酸化することを含んでもよい。本実施の形態の光電変換素子5の製造方法によれば、半導体基板11の第2の表面11bを熱酸化するという簡単な工程によって、トンネル誘電体層20が形成され得る。 In the method for manufacturing the photoelectric conversion element 5 according to the present embodiment, forming the tunnel dielectric layer 20 on the second surface 11b of the semiconductor substrate 11 thermally oxidizes the second surface 11b of the semiconductor substrate 11. May be included. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, the tunnel dielectric layer 20 can be formed by a simple process of thermally oxidizing the second surface 11b of the semiconductor substrate 11.
 本実施の形態の光電変換素子5の製造方法において、半導体基板11の第2の表面11b上にトンネル誘電体層20を形成することは、半導体基板11の第2の表面11b上にトンネル誘電体層20を堆積することを含んでもよい。本実施の形態の光電変換素子5の製造方法によれば、半導体基板11の第2の表面11b上にトンネル誘電体層20を堆積するという簡単な工程によって、トンネル誘電体層20が形成され得る。 In the method for manufacturing the photoelectric conversion element 5 according to the present embodiment, forming the tunnel dielectric layer 20 on the second surface 11b of the semiconductor substrate 11 means that the tunnel dielectric is formed on the second surface 11b of the semiconductor substrate 11. Depositing layer 20 may also be included. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, the tunnel dielectric layer 20 can be formed by a simple process of depositing the tunnel dielectric layer 20 on the second surface 11 b of the semiconductor substrate 11. .
 本実施の形態の光電変換素子5の製造方法において、トンネル誘電体層20は0.2nm以上5.0nm以下の厚さを有してもよい。0.2nm以上の厚さを有するトンネル誘電体層20は、光電変換素子5のパッシベーション特性をさらに向上させることができる。5.0nm以下の厚さを有するトンネル誘電体層20は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアを、第1の非晶質半導体層17及び第1の非晶質半導体領域16にさらに効率的にトンネルさせることができる。本実施の形態の光電変換素子5の製造方法によれば、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアをさらに効率的に収集することができる光電変換素子が製造され得る。 In the method for manufacturing the photoelectric conversion element 5 of the present embodiment, the tunnel dielectric layer 20 may have a thickness of 0.2 nm or more and 5.0 nm or less. The tunnel dielectric layer 20 having a thickness of 0.2 nm or more can further improve the passivation characteristics of the photoelectric conversion element 5. The tunnel dielectric layer 20 having a thickness of 5.0 nm or less is configured to cause carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 to be generated in the first amorphous semiconductor layer. 17 and the first amorphous semiconductor region 16 can be more efficiently tunneled. According to the method of manufacturing the photoelectric conversion element 5 of the present embodiment, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11 can be collected more efficiently. A photoelectric conversion element can be manufactured.
 本実施の形態の光電変換素子5の製造方法は、半導体基板11の第2の表面11b上に、第1の非晶質半導体層17と電気的に接続される第1の電極19を形成することと、半導体基板11の第2の表面11b上に、第1の非晶質半導体領域16と電気的に接続される第2の電極18を形成することとをさらに備えてもよい。本実施の形態の光電変換素子5の製造方法によれば、第1の電極19及び第2の電極18が光の入射面である半導体基板11の第1の表面11a側に設けられていない光電変換素子5が製造され得る。光電変換素子5に入射する光は第1の電極19及び第2の電極18によって遮られない。本実施の形態の光電変換素子5の製造方法によれば、高い短絡電流JSCを有するとともに、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 In the method for manufacturing the photoelectric conversion element 5 according to the present embodiment, the first electrode 19 that is electrically connected to the first amorphous semiconductor layer 17 is formed on the second surface 11 b of the semiconductor substrate 11. And forming a second electrode 18 electrically connected to the first amorphous semiconductor region 16 on the second surface 11 b of the semiconductor substrate 11. According to the method of manufacturing the photoelectric conversion element 5 of the present embodiment, the first electrode 19 and the second electrode 18 are photoelectric elements that are not provided on the first surface 11a side of the semiconductor substrate 11 that is the light incident surface. The conversion element 5 can be manufactured. Light incident on the photoelectric conversion element 5 is not blocked by the first electrode 19 and the second electrode 18. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, it is possible to manufacture a photoelectric conversion element having a high short-circuit current J SC and an improved efficiency for converting light energy into electric energy.
 本実施の形態の光電変換素子5の製造方法は、半導体基板11の第1の表面11a上に誘電体層14を形成することをさらに備えてもよい。誘電体層14が反射防止膜として機能するとき、誘電体層14は、より多くの光を光電変換素子5内に入射させることができる。本実施の形態の光電変換素子5の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。誘電体層14がパッシベーション膜として機能するとき、誘電体層14は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第1の表面11aにおいて再結合することを抑制することができる。本実施の形態の光電変換素子5の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 The method for manufacturing the photoelectric conversion element 5 of the present embodiment may further include forming the dielectric layer 14 on the first surface 11 a of the semiconductor substrate 11. When the dielectric layer 14 functions as an antireflection film, the dielectric layer 14 can cause more light to enter the photoelectric conversion element 5. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element with improved efficiency for converting light energy into electric energy can be manufactured. When the dielectric layer 14 functions as a passivation film, the carrier generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 is the first dielectric layer 14 of the semiconductor substrate 11. It is possible to suppress recombination on the surface 11a. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element with improved efficiency for converting light energy into electric energy can be manufactured.
 本実施の形態の光電変換素子5の製造方法は、半導体基板11の第1の表面11a上に、i型を有する第3の非晶質半導体層12を形成することをさらに備えてもよい。i型を有する第3の非晶質半導体層12は、半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアが半導体基板11の第1の表面11aにおいて再結合することを抑制することができる。本実施の形態の光電変換素子5の製造方法によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上された光電変換素子が製造され得る。 The method for manufacturing the photoelectric conversion element 5 of the present embodiment may further include forming the third amorphous semiconductor layer 12 having i-type on the first surface 11 a of the semiconductor substrate 11. In the third amorphous semiconductor layer 12 having i-type, carriers generated in the semiconductor substrate 11 by light incident from the first surface 11 a side of the semiconductor substrate 11 are formed on the first surface 11 a of the semiconductor substrate 11. Recombination can be suppressed. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element with improved passivation characteristics and efficiency of converting light energy into electric energy can be manufactured.
 本実施の形態の光電変換素子5の製造方法は、半導体基板11の第1の表面11a上に、半導体基板11と同じ導電型を有する第4の非晶質半導体層13を形成することをさらに備えてもよい。半導体基板11と同じ導電型を有する第4の非晶質半導体層13は、光電変換素子5に光が入射することによって半導体基板11内に発生したキャリアのうち半導体基板11の第1の表面11aに近づくキャリアを、半導体基板11の内部に押し戻すことができる。第4の非晶質半導体層13は、このキャリアが半導体基板11の第1の表面11aにおいて再結合することを抑制することができる。本実施の形態の光電変換素子5の製造方法によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上された光電変換素子が製造され得る。 The method for manufacturing the photoelectric conversion element 5 according to the present embodiment further includes forming the fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 on the first surface 11 a of the semiconductor substrate 11. You may prepare. The fourth amorphous semiconductor layer 13 having the same conductivity type as that of the semiconductor substrate 11 has the first surface 11 a of the semiconductor substrate 11 among the carriers generated in the semiconductor substrate 11 when light enters the photoelectric conversion element 5. The carrier approaching can be pushed back into the semiconductor substrate 11. The fourth amorphous semiconductor layer 13 can suppress recombination of this carrier on the first surface 11 a of the semiconductor substrate 11. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element with improved passivation characteristics and efficiency of converting light energy into electric energy can be manufactured.
 本実施の形態の光電変換素子5の製造方法は、半導体基板11の第1の表面11aに、凹凸構造を形成することをさらに備えてもよい。光の入射面である半導体基板11の第1の表面11aに凹凸構造を形成することによって、より多くの光が光電変換素子5内に入射され得る。本実施の形態の光電変換素子5の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 The method for manufacturing the photoelectric conversion element 5 according to the present embodiment may further include forming a concavo-convex structure on the first surface 11 a of the semiconductor substrate 11. By forming a concavo-convex structure on the first surface 11 a of the semiconductor substrate 11 that is a light incident surface, more light can be incident into the photoelectric conversion element 5. According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element with improved efficiency for converting light energy into electric energy can be manufactured.
 (実施の形態9)
 図3、図4、図19から図25、図27及び図28を参照して、実施の形態9の光電変換素子5及びその製造方法について説明する。本実施の形態の光電変換素子5は、実施の形態8の光電変換素子5と同様の構成を備える。本実施の形態の光電変換素子5の製造方法は、基本的には、実施の形態8の光電変換素子5の製造方法と同様の工程を備えるが、以下の点で異なる。
(Embodiment 9)
With reference to FIG. 3, FIG. 4, FIG. 19 to FIG. 25, FIG. 27 and FIG. The photoelectric conversion element 5 of the present embodiment has a configuration similar to that of the photoelectric conversion element 5 of the eighth embodiment. The manufacturing method of the photoelectric conversion element 5 of the present embodiment basically includes the same steps as the manufacturing method of the photoelectric conversion element 5 of the eighth embodiment, but differs in the following points.
 実施の形態8の光電変換素子5の製造方法では、イオン注入法によって、第1の非晶質半導体層17の一部に第2の不純物がドーピングされていた。これに対し、本実施の形態の光電変換素子5の製造方法では、第1の非晶質半導体層17の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26を形成することと、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させることとを含んでもよい。 In the method for manufacturing the photoelectric conversion element 5 according to the eighth embodiment, the second impurity is doped in part of the first amorphous semiconductor layer 17 by the ion implantation method. On the other hand, in the method for manufacturing the photoelectric conversion element 5 of the present embodiment, doping the second impurity into a part of the first amorphous semiconductor layer 17 means that the first amorphous semiconductor layer 17 is not doped. Forming the dopant-containing film 26 containing the second impurity thereon, and transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17. Good.
 特定的には、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26を形成することは、第1の非晶質半導体層17の一部上に第2の不純物を含むドーピングペーストを施すことであってもよい。ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させることは、ドーピングペーストを熱処理することを含んでもよい。 Specifically, the formation of the dopant-containing film 26 containing the second impurity on the first amorphous semiconductor layer 17 means that the second impurity is formed on a part of the first amorphous semiconductor layer 17. It is also possible to apply a doping paste containing Transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 may include heat-treating the doping paste.
 図3、図4、図21から図25、図27及び図28を参照して、本実施の形態の光電変換素子5の製造方法の一例について以下説明する。 An example of a method for manufacturing the photoelectric conversion element 5 of the present embodiment will be described below with reference to FIGS. 3, 4, 21 to 25, 27, and 28.
 図3、図4及び図21から図25に示す工程によって、半導体基板11の第1の表面11a上に、第3の非晶質半導体層12と、第4の非晶質半導体層13と、誘電体層14とが形成され、半導体基板11の第2の表面11b上に、トンネル誘電体層20と、第2の非晶質半導体層15と、第1の導電型を有する第1の非晶質半導体層17とが形成される。 3, 4, and 21 to 25, the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the first surface 11 a of the semiconductor substrate 11 are formed. A dielectric layer 14 is formed, and a tunnel dielectric layer 20, a second amorphous semiconductor layer 15, and a first non-conductive first layer are formed on the second surface 11b of the semiconductor substrate 11. A crystalline semiconductor layer 17 is formed.
 図27を参照して、第1の非晶質半導体層17の一部上に、第2の導電型を有する第2の不純物を含むドーパント含有膜26が形成される。ドーパント含有膜26として、燐などのn型を有する第2の不純物を含むドーピングペーストと、ボロンなどのp型を有する第2の不純物を含むドーピングペーストとが例示され得る。n型を有する第2の不純物を含むドーピングペーストは、燐化合物と、酸化シリコン前駆体と、溶材と、増粘剤とを含んでもよい。p型を有する第2の不純物を含むドーピングペーストは、ボロン化合物と、酸化シリコン前駆体と、溶材と、増粘剤とを含んでもよい。本実施の形態では、ドーパント含有膜26として、燐などのn型を有する第2の不純物を含むドーピングペーストが用いられてもよい。ドーピングペーストは、インクジェット、スクリーン印刷などによって、第1の非晶質半導体層17の一部上に施されてもよい。 Referring to FIG. 27, a dopant-containing film 26 containing a second impurity having the second conductivity type is formed on a part of the first amorphous semiconductor layer 17. Examples of the dopant-containing film 26 include a doping paste containing a second impurity having n type such as phosphorus and a doping paste containing a second impurity having p type such as boron. The doping paste including the second impurity having n-type may include a phosphorus compound, a silicon oxide precursor, a solvent, and a thickener. The doping paste containing the second impurity having p-type may include a boron compound, a silicon oxide precursor, a solvent, and a thickener. In the present embodiment, as the dopant-containing film 26, a doping paste containing an n-type second impurity such as phosphorus may be used. The doping paste may be applied on a part of the first amorphous semiconductor layer 17 by inkjet, screen printing, or the like.
 図28を参照して、ドーパント含有膜26を熱処理して、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させる。本実施の形態では、例えば700℃以下の温度で、ドーピングペーストであるドーパント含有膜26が熱処理されて、ドーピングペーストであるドーパント含有膜26に含まれる第2の不純物が第1の非晶質半導体層17の一部にドープされる。こうして、第1の導電型を有する第1の非晶質半導体層17内に第2の導電型を有する第1の非晶質半導体領域16が形成され得る。加熱炉を用いてドーパント含有膜26が熱処理されてもよいし、ドーパント含有膜26にレーザ光を照射してドーパント含有膜26が熱処理されてもよい。 Referring to FIG. 28, the dopant-containing film 26 is heat-treated, and the second impurity contained in the dopant-containing film 26 is transferred to a part of the first amorphous semiconductor layer 17. In the present embodiment, for example, the dopant-containing film 26 that is a doping paste is heat-treated at a temperature of 700 ° C. or lower, and the second impurity contained in the dopant-containing film 26 that is a doping paste is the first amorphous semiconductor. A portion of layer 17 is doped. Thus, the first amorphous semiconductor region 16 having the second conductivity type can be formed in the first amorphous semiconductor layer 17 having the first conductivity type. The dopant-containing film 26 may be heat-treated using a heating furnace, or the dopant-containing film 26 may be heat-treated by irradiating the dopant-containing film 26 with laser light.
 ドーパント含有膜26を熱処理する際、第1の非晶質半導体層17内の第1不純物と第1の非晶質半導体領域16内の第2の不純物とが活性化され得る。第1の非晶質半導体層17内の第1不純物と第1の非晶質半導体領域16内の第2の不純物とをさらに活性化するために、第1の非晶質半導体層17と第1の非晶質半導体領域16とがさらにアニールされてもよい。 When the dopant-containing film 26 is heat-treated, the first impurity in the first amorphous semiconductor layer 17 and the second impurity in the first amorphous semiconductor region 16 can be activated. In order to further activate the first impurity in the first amorphous semiconductor layer 17 and the second impurity in the first amorphous semiconductor region 16, the first amorphous semiconductor layer 17 and the first impurity One amorphous semiconductor region 16 may be further annealed.
 それから、残ったドーパント含有膜26は、硫酸と過酸化水素水の混合液、塩酸と過酸化水素水の混合液、または、フッ化水素酸などを用いて除去される。続いて、半導体基板11の第2の表面11b上に、第1の電極19及び第2の電極18が形成される。こうして、図19及び図20に示される本実施の形態の光電変換素子5が製造され得る。 Then, the remaining dopant-containing film 26 is removed using a mixed solution of sulfuric acid and hydrogen peroxide solution, a mixed solution of hydrochloric acid and hydrogen peroxide solution, or hydrofluoric acid. Subsequently, the first electrode 19 and the second electrode 18 are formed on the second surface 11 b of the semiconductor substrate 11. In this way, the photoelectric conversion element 5 of the present embodiment shown in FIGS. 19 and 20 can be manufactured.
 本実施の形態の光電変換素子5の製造方法は、実施の形態8の光電変換素子5の製造方法と同様の効果を有するが、以下の点で異なる。 The manufacturing method of the photoelectric conversion element 5 of the present embodiment has the same effect as the manufacturing method of the photoelectric conversion element 5 of the eighth embodiment, but differs in the following points.
 本実施の形態の光電変換素子5の製造方法では、第1の非晶質半導体層17の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17の一部上に第2の不純物を含むドーパント含有膜26を形成することと、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させることとを含んでもよい。本実施の形態の光電変換素子5の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 In the method for manufacturing the photoelectric conversion element 5 according to the present embodiment, doping the second impurity into a part of the first amorphous semiconductor layer 17 may cause the part of the first amorphous semiconductor layer 17 to be doped. Forming a dopant-containing film 26 containing a second impurity at the same time, and transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17. . According to the method for manufacturing the photoelectric conversion element 5 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 本実施の形態の光電変換素子5の製造方法では、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26を形成することは、第1の非晶質半導体層17の一部上に第2の不純物を含むドーピングペーストを施すことであってもよい。ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させることは、ドーピングペーストを熱処理することを含んでもよい。すなわち、本実施の形態の光電変換素子5の製造方法では、第1の非晶質半導体層17の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17の一部上に第2の不純物を含むドーピングペーストを施すことと、ドーピングペーストを熱処理することとを含んでもよい。 In the method for manufacturing the photoelectric conversion element 5 of the present embodiment, the formation of the dopant-containing film 26 containing the second impurity on the first amorphous semiconductor layer 17 is the first amorphous semiconductor layer 17. A doping paste containing the second impurity may be applied on a part of the substrate. Transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 may include heat-treating the doping paste. In other words, in the method for manufacturing the photoelectric conversion element 5 of the present embodiment, doping the second impurity into a part of the first amorphous semiconductor layer 17 is a part of the first amorphous semiconductor layer 17. Applying a doping paste containing a second impurity on the part and heat-treating the doping paste may be included.
 ドーパント含有膜26としてドーピングペーストを用いることによって、高いパターン精度で、第1の非晶質半導体層17内に第1の非晶質半導体領域16が形成され得る。ドーパント含有膜26としてドーピングペーストを用いることによって、インクジェット、スクリーン印刷などによって第1の非晶質半導体層17上にドーパント含有膜26が形成され得る。本実施の形態の光電変換素子5の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が安価かつ簡単な工程で製造され得る。 By using a doping paste as the dopant-containing film 26, the first amorphous semiconductor region 16 can be formed in the first amorphous semiconductor layer 17 with high pattern accuracy. By using a doping paste as the dopant-containing film 26, the dopant-containing film 26 can be formed on the first amorphous semiconductor layer 17 by inkjet, screen printing, or the like. According to the manufacturing method of the photoelectric conversion element 5 of this Embodiment, the photoelectric conversion element which has the improved characteristic and reliability can be manufactured by an inexpensive and simple process.
 (実施の形態10)
 図3、図4、図19から図25、図29及び図30を参照して、実施の形態10の光電変換素子5及びその製造方法について説明する。本実施の形態の光電変換素子5は、実施の形態8の光電変換素子5と同様の構成を備える。本実施の形態の光電変換素子5の製造方法は、基本的には、実施の形態8の光電変換素子5の製造方法と同様の工程を備えるが、以下の点で異なる。
(Embodiment 10)
With reference to FIG. 3, FIG. 4, FIG. 19 to FIG. 25, FIG. 29 and FIG. 30, the photoelectric conversion element 5 of Embodiment 10 and the manufacturing method thereof will be described. The photoelectric conversion element 5 of the present embodiment has a configuration similar to that of the photoelectric conversion element 5 of the eighth embodiment. The manufacturing method of the photoelectric conversion element 5 of the present embodiment basically includes the same steps as the manufacturing method of the photoelectric conversion element 5 of the eighth embodiment, but differs in the following points.
 実施の形態8の光電変換素子5の製造方法では、イオン注入法によって、第1の非晶質半導体層17の一部に第2の不純物がドーピングされていた。これに対し、本実施の形態の光電変換素子5の製造方法では、第1の非晶質半導体層17の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26を形成することと、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させることとを含んでもよい。より特定的には、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させることは、ドーパント含有膜26の一部にレーザ光27を照射することを含んでもよい。すなわち、レーザドーピング法によって、第1の非晶質半導体層17の一部に第2の不純物がドーピングされてもよい。 In the method for manufacturing the photoelectric conversion element 5 according to the eighth embodiment, the second impurity is doped in part of the first amorphous semiconductor layer 17 by the ion implantation method. On the other hand, in the method for manufacturing the photoelectric conversion element 5 of the present embodiment, doping the second impurity into a part of the first amorphous semiconductor layer 17 means that the first amorphous semiconductor layer 17 is not doped. Forming the dopant-containing film 26 containing the second impurity thereon, and transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17. Good. More specifically, transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 irradiates a part of the dopant-containing film 26 with the laser beam 27. You may include that. That is, the second impurity may be doped into a part of the first amorphous semiconductor layer 17 by a laser doping method.
 図3、図4、図21から図25、図29及び図30を参照して、本実施の形態の光電変換素子5の製造方法の一例について以下説明する。 An example of a method for manufacturing the photoelectric conversion element 5 of the present embodiment will be described below with reference to FIGS. 3, 4, 21 to 25, 29, and 30.
 図3、図4及び図21から図25に示す工程によって、半導体基板11の第1の表面11a上に、第3の非晶質半導体層12と、第4の非晶質半導体層13と、誘電体層14とが形成され、半導体基板11の第2の表面11b上に、トンネル誘電体層20と、第2の非晶質半導体層15と、第1の非晶質半導体層17とが形成される。 3, 4, and 21 to 25, the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the first surface 11 a of the semiconductor substrate 11 are formed. The dielectric layer 14 is formed, and the tunnel dielectric layer 20, the second amorphous semiconductor layer 15, and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11. It is formed.
 図29を参照して、第1の非晶質半導体層17上に、第2の導電型を有する第2の不純物を含むドーパント含有膜26が形成される。ドーパント含有膜26として、リンシリケートガラス(PSG)、ボロンシリケートガラス(BSG)、ポリボロンフィルム(PBF)などが例示され得る。本実施の形態では、ドーパント含有膜26として、リンシリケートガラス(PSG)が用いられている。 Referring to FIG. 29, a dopant-containing film 26 containing a second impurity having the second conductivity type is formed on the first amorphous semiconductor layer 17. Examples of the dopant-containing film 26 may include phosphorus silicate glass (PSG), boron silicate glass (BSG), and polyboron film (PBF). In the present embodiment, phosphorus silicate glass (PSG) is used as the dopant-containing film 26.
 図30を参照して、ドーパント含有膜26の一部にレーザ光27を照射して、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させる。本実施の形態では、ドーパント含有膜26の一部にレーザ光27を照射することにより、ドーパント含有膜26の一部が局所的に加熱される。そのため、第1の非晶質半導体層17のうち、レーザ光27が照射された部分に対応する領域のみに、ドーパント含有膜26に含まれる第2の不純物がドープされる。こうして、第1の導電型を有する第1の非晶質半導体層17内に第2の導電型を有する第1の非晶質半導体領域16が形成され得る。 Referring to FIG. 30, a part of the dopant-containing film 26 is irradiated with laser light 27 to transfer the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17. . In the present embodiment, a part of the dopant-containing film 26 is locally heated by irradiating a part of the dopant-containing film 26 with the laser light 27. Therefore, the second impurity contained in the dopant-containing film 26 is doped only in the region corresponding to the portion irradiated with the laser beam 27 in the first amorphous semiconductor layer 17. Thus, the first amorphous semiconductor region 16 having the second conductivity type can be formed in the first amorphous semiconductor layer 17 having the first conductivity type.
 ドーパント含有膜26の一部にレーザ光27を照射することにより、ドーパント含有膜26の一部と第1の非晶質半導体層17の一部とが局所的に加熱される。そのため、ドーパント含有膜26の一部にレーザ光27を照射する際、第1の非晶質半導体領域16内の第2の不純物が活性化され得る。 By irradiating a part of the dopant-containing film 26 with the laser beam 27, a part of the dopant-containing film 26 and a part of the first amorphous semiconductor layer 17 are locally heated. Therefore, when the laser beam 27 is irradiated on a part of the dopant-containing film 26, the second impurity in the first amorphous semiconductor region 16 can be activated.
 それから、残ったドーパント含有膜26は、硫酸と過酸化水素水の混合液、塩酸と過酸化水素水の混合液、または、フッ化水素酸などを用いて除去される。第1の非晶質半導体層17内の第1の不純物と第1の非晶質半導体領域16内の第2の不純物とをさらに活性化するために、第1の非晶質半導体層17と第1の非晶質半導体領域16とがさらにアニールされてもよい。続いて、半導体基板11の第2の表面11b上に、第1の電極19及び第2の電極18が形成される。こうして、図19及び図20に示される本実施の形態の光電変換素子5が製造され得る。 Then, the remaining dopant-containing film 26 is removed using a mixed solution of sulfuric acid and hydrogen peroxide solution, a mixed solution of hydrochloric acid and hydrogen peroxide solution, or hydrofluoric acid. In order to further activate the first impurity in the first amorphous semiconductor layer 17 and the second impurity in the first amorphous semiconductor region 16, the first amorphous semiconductor layer 17 and The first amorphous semiconductor region 16 may be further annealed. Subsequently, the first electrode 19 and the second electrode 18 are formed on the second surface 11 b of the semiconductor substrate 11. In this way, the photoelectric conversion element 5 of the present embodiment shown in FIGS. 19 and 20 can be manufactured.
 本実施の形態の光電変換素子5の製造方法は、実施の形態8の光電変換素子5の製造方法と同様の効果を有するが、以下の点で異なる。 The manufacturing method of the photoelectric conversion element 5 of the present embodiment has the same effect as the manufacturing method of the photoelectric conversion element 5 of the eighth embodiment, but differs in the following points.
 本実施の形態の光電変換素子5の製造方法では、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部に移行させることは、ドーパント含有膜26の一部にレーザ光27を照射することを含んでもよい。すなわち、レーザドーピング法によって、第1の非晶質半導体層17の一部に第2の不純物がドーピングされてもよい。レーザドーピング方法は、加熱炉を使用してドーパントを拡散する方法よりも、短時間でドーパントを拡散させることができる。本実施の形態の光電変換素子5の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が安価かつ簡単な工程で製造され得る。 In the method for manufacturing the photoelectric conversion element 5 according to the present embodiment, shifting the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 is one of the dopant-containing films 26. Irradiation of the laser beam 27 to the part may be included. That is, the second impurity may be doped into a part of the first amorphous semiconductor layer 17 by a laser doping method. The laser doping method can diffuse the dopant in a shorter time than the method of diffusing the dopant using a heating furnace. According to the manufacturing method of the photoelectric conversion element 5 of this Embodiment, the photoelectric conversion element which has the improved characteristic and reliability can be manufactured by an inexpensive and simple process.
 (実施の形態11)
 図19及び図31を参照して、実施の形態11の光電変換素子6について説明する。本実施の形態の光電変換素子6は、基本的には、実施の形態8の光電変換素子5と同様であるが、以下の点で異なる。
(Embodiment 11)
With reference to FIG.19 and FIG.31, the photoelectric conversion element 6 of Embodiment 11 is demonstrated. The photoelectric conversion element 6 of the present embodiment is basically the same as the photoelectric conversion element 5 of the eighth embodiment, but differs in the following points.
 本実施の形態の光電変換素子6は、第2の非晶質半導体層15内に設けられるとともに、第2の導電型を有する第2の非晶質半導体領域46をさらに備える。第2の非晶質半導体層15及び第2の非晶質半導体領域46は、トンネル誘電体層20上に設けられる。第2の非晶質半導体層15及び第2の非晶質半導体領域46は、連続して延在する1つの層を構成する。第2の非晶質半導体領域46は、第2の導電型を有する第2の不純物を含む。第2の非晶質半導体領域46は、第1の非晶質半導体領域16に接する。第2の非晶質半導体領域46は、第2の非晶質半導体層15の全厚さにわたって存在してもよい。第2の非晶質半導体領域46は、トンネル誘電体層20と接してもよいし、接しなくてもよい。 The photoelectric conversion element 6 according to the present embodiment is provided in the second amorphous semiconductor layer 15 and further includes a second amorphous semiconductor region 46 having the second conductivity type. The second amorphous semiconductor layer 15 and the second amorphous semiconductor region 46 are provided on the tunnel dielectric layer 20. The second amorphous semiconductor layer 15 and the second amorphous semiconductor region 46 constitute one layer extending continuously. The second amorphous semiconductor region 46 includes a second impurity having the second conductivity type. The second amorphous semiconductor region 46 is in contact with the first amorphous semiconductor region 16. The second amorphous semiconductor region 46 may exist over the entire thickness of the second amorphous semiconductor layer 15. The second amorphous semiconductor region 46 may be in contact with the tunnel dielectric layer 20 or may not be in contact therewith.
 第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向、すなわち、第1の方向(例えば、x方向)において、第2の非晶質半導体領域46は、第1の非晶質半導体領域16と実質的に同じ幅を有してもよい。第2の非晶質半導体領域46における第2の不純物の濃度は、第1の非晶質半導体領域16と第1の非晶質半導体層17とが交互に配列される方向、すなわち、第1の方向(例えば、x方向)において一定であってもよい。第2の非晶質半導体領域46は、第1の非晶質半導体領域16と実質的に同じ第2の不純物の濃度を有してもよい。 In the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged, that is, in the first direction (for example, the x direction), the second amorphous semiconductor region 46 may have substantially the same width as the first amorphous semiconductor region 16. The concentration of the second impurity in the second amorphous semiconductor region 46 is the direction in which the first amorphous semiconductor regions 16 and the first amorphous semiconductor layers 17 are alternately arranged, that is, the first May be constant in the direction (for example, the x direction). The second amorphous semiconductor region 46 may have the second impurity concentration substantially the same as that of the first amorphous semiconductor region 16.
 図3、図4、図21から図25及び図32を参照して、実施の形態11の光電変換素子6の製造方法について説明する。本実施の形態の光電変換素子6の製造方法は、基本的には、実施の形態8の光電変換素子5の製造方法と同様であるが、以下の点で異なる。 A method for manufacturing the photoelectric conversion element 6 according to the eleventh embodiment will be described with reference to FIGS. The manufacturing method of the photoelectric conversion element 6 of the present embodiment is basically the same as the manufacturing method of the photoelectric conversion element 5 of the eighth embodiment, but differs in the following points.
 本実施の形態の光電変換素子6の製造方法は、第2の非晶質半導体層15の一部に第2の不純物をドーピングして、第2の非晶質半導体層15内に第2の非晶質半導体領域46を形成することをさらに備えてもよい。第2の非晶質半導体領域46は、第2の導電型を有する第2の不純物を含む。第2の非晶質半導体領域46は、第1の非晶質半導体領域16に接する。特定的には、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物をイオン注入することを含んでもよい。 In the method for manufacturing the photoelectric conversion element 6 according to the present embodiment, the second amorphous semiconductor layer 15 is doped with the second impurity, and the second amorphous semiconductor layer 15 is filled with the second impurity. An amorphous semiconductor region 46 may be further formed. The second amorphous semiconductor region 46 includes a second impurity having the second conductivity type. The second amorphous semiconductor region 46 is in contact with the first amorphous semiconductor region 16. Specifically, doping part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 with the second impurity may cause the first amorphous semiconductor layer 17 to be doped. The second impurity may be ion-implanted into part of the first amorphous semiconductor layer 15 and part of the second amorphous semiconductor layer 15.
 図3、図4及び図21から図25に示す工程によって、半導体基板11の第1の表面11a上に、第3の非晶質半導体層12と、第4の非晶質半導体層13と、誘電体層14とが形成され、半導体基板11の第2の表面11b上に、トンネル誘電体層20と、第2の非晶質半導体層15と、第1の非晶質半導体層17とが形成される。 3, 4, and 21 to 25, the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the first surface 11 a of the semiconductor substrate 11 are formed. The dielectric layer 14 is formed, and the tunnel dielectric layer 20, the second amorphous semiconductor layer 15, and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11. It is formed.
 図32を参照して、第1の非晶質半導体層17内に第1の非晶質半導体領域16を形成すること及び第2の非晶質半導体層15内に第2の導電型を有する第2の非晶質半導体領域46を形成することは、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に、第2の導電型を有する第2の不純物をドーピングすることを含む。言い換えると、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に、第2の導電型を有する第2の不純物をドーピングすることにより、第1の非晶質半導体層17内に第1の非晶質半導体領域16が形成されるとともに、第2の非晶質半導体層15内に第2の導電型を有する第2の非晶質半導体領域46が形成される。 Referring to FIG. 32, first amorphous semiconductor region 16 is formed in first amorphous semiconductor layer 17 and second conductive type is formed in second amorphous semiconductor layer 15. The formation of the second amorphous semiconductor region 46 means that a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 have a second conductivity type. Doping with two impurities. In other words, by doping a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 with the second impurity having the second conductivity type, The first amorphous semiconductor region 16 is formed in the amorphous semiconductor layer 17, and the second amorphous semiconductor region 46 having the second conductivity type is formed in the second amorphous semiconductor layer 15. Is formed.
 半導体基板11の第2の表面11b上にトンネル誘電体層20が形成されている。第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の導電型を有する第2の不純物がドーピングされる際に、半導体基板11に第2の不純物がドーピングされることを、トンネル誘電体層20は確実に防ぐことができる。そのため、第2の非晶質半導体層15及びトンネル誘電体層20を介した半導体基板11と第1の非晶質半導体層17との間のヘテロ接合構造と、トンネル誘電体層20を介した半導体基板11と第1の非晶質半導体領域16及び第2の非晶質半導体領域46との間のヘテロ接合構造とが確実に保たれ得る。 A tunnel dielectric layer 20 is formed on the second surface 11 b of the semiconductor substrate 11. When the second impurity having the second conductivity type is doped into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15, the second impurity is added to the semiconductor substrate 11. The tunnel dielectric layer 20 can reliably prevent the impurities from being doped. Therefore, the heterojunction structure between the semiconductor substrate 11 and the first amorphous semiconductor layer 17 via the second amorphous semiconductor layer 15 and the tunnel dielectric layer 20 and the tunnel dielectric layer 20 are interposed. The heterojunction structure between the semiconductor substrate 11 and the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46 can be reliably maintained.
 特定的には、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17の一部及び及び第2の非晶質半導体層15の一部に第2の不純物をイオン注入することを含んでもよい。すなわち、イオン注入法によって、第1の非晶質半導体層17の一部及び及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされてもよい。具体的には、第1の非晶質半導体層17の一部及び及び第2の非晶質半導体層15の一部に第2の不純物のイオンビーム21を照射することによって、第1の非晶質半導体層17の一部及び及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされてもよい。こうして、第2の不純物のイオンビーム21を照射するという一つの工程で、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされ得る。 Specifically, doping part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 with the second impurity may cause the first amorphous semiconductor layer 17 to be doped. And second ion implantation of a second impurity into a part of the second amorphous semiconductor layer 15. That is, the second impurity may be doped into part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 by ion implantation. Specifically, by irradiating a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 with the ion beam 21 of the second impurity, the first non-crystalline semiconductor layer 17 is irradiated. A part of the crystalline semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 may be doped with the second impurity. Thus, in one step of irradiating the ion beam 21 of the second impurity, the second impurity is applied to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. Can be doped.
 第1の非晶質半導体層17の一部及び及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされる際に、第1の非晶質半導体層17の他の部分及び及び第2の非晶質半導体層15の他の部分に第2の不純物がドープされること防ぐために、第1の非晶質半導体層17の一部に対応する開口部を有するとともに第1の非晶質半導体層17の他の部分を覆うマスク22が用いられてもよい。 When the second impurity is doped into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15, another part of the first amorphous semiconductor layer 17 is changed. In order to prevent the second impurity and other portions of the second amorphous semiconductor layer 15 from being doped with the second impurity, an opening corresponding to a part of the first amorphous semiconductor layer 17 is provided. A mask 22 that covers other portions of one amorphous semiconductor layer 17 may be used.
 第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされた後に、第1の非晶質半導体層17に含まれる第1の不純物と、第1の非晶質半導体領域16及び第2の非晶質半導体領域46に含まれる第2の不純物とを活性化するために、第1の非晶質半導体層17と第1の非晶質半導体領域16と第2の非晶質半導体領域46とがアニールされてもよい。 The first amorphous semiconductor layer 17 includes a first impurity after the second amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 are doped with the second impurity. In order to activate the first impurity and the second impurity contained in the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46, the first amorphous semiconductor layer 17 and the first amorphous semiconductor layer 17 are activated. The amorphous semiconductor region 16 and the second amorphous semiconductor region 46 may be annealed.
 それから、半導体基板11の第2の表面11b上に、第1の非晶質半導体層17と電気的に接続される第1の電極19が形成される。特定的には、第1の非晶質半導体層17上に第1の電極19が形成される。半導体基板11の第2の表面11b上に、第1の非晶質半導体領域16と電気的に接続される第2の電極18が形成される。特定的には、第1の非晶質半導体領域16上に第2の電極18が形成される。こうして、図19及び図31に示される本実施の形態の光電変換素子6が製造され得る。 Then, the first electrode 19 that is electrically connected to the first amorphous semiconductor layer 17 is formed on the second surface 11 b of the semiconductor substrate 11. Specifically, the first electrode 19 is formed on the first amorphous semiconductor layer 17. A second electrode 18 that is electrically connected to the first amorphous semiconductor region 16 is formed on the second surface 11 b of the semiconductor substrate 11. Specifically, the second electrode 18 is formed on the first amorphous semiconductor region 16. Thus, the photoelectric conversion element 6 of the present embodiment shown in FIGS. 19 and 31 can be manufactured.
 本実施の形態の光電変換素子6及びその製造方法は、実施の形態8の光電変換素子5及びその製造方法と同様の効果を有するが、以下の点で異なる。 The photoelectric conversion element 6 and its manufacturing method of the present embodiment have the same effects as the photoelectric conversion element 5 of the eighth embodiment and its manufacturing method, but are different in the following points.
 本実施の形態の光電変換素子6は、第2の非晶質半導体層15内に設けられるとともに、第2の導電型を有する第2の非晶質半導体領域46をさらに備えてもよい。第2の非晶質半導体領域46は、第2の導電型を有する第2の不純物を含んでもよい。第2の非晶質半導体領域46は、第1の非晶質半導体領域16に接してもよい。本実施の形態の光電変換素子6では、第1の非晶質半導体領域16及び第2の非晶質半導体領域46からなる第2の導電型を有する非晶質半導体領域と半導体基板11との距離が減少し得る。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアのうち、第1の非晶質半導体領域16及び第2の非晶質半導体領域46が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域16及び第2の非晶質半導体領域46によってより高い効率で収集され得る。本実施の形態の光電変換素子6によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 The photoelectric conversion element 6 of the present embodiment may be further provided with a second amorphous semiconductor region 46 having a second conductivity type, as well as being provided in the second amorphous semiconductor layer 15. The second amorphous semiconductor region 46 may contain a second impurity having the second conductivity type. The second amorphous semiconductor region 46 may be in contact with the first amorphous semiconductor region 16. In the photoelectric conversion element 6 according to the present embodiment, the semiconductor substrate 11 includes an amorphous semiconductor region having the second conductivity type, which includes the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46, and the semiconductor substrate 11. The distance can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, the second amorphous semiconductor region 46 and the second amorphous semiconductor region 46 have the second. The carriers corresponding to the conductivity types of the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46 can be collected with higher efficiency. According to the photoelectric conversion element 6 of the present embodiment, the efficiency of converting light energy into electrical energy can be improved.
 本実施の形態の光電変換素子6は、半導体基板11の第2の表面11b上にトンネル誘電体層20を、トンネル誘電体層20上に第2の非晶質半導体層15を、第2の非晶質半導体層15内に第2の非晶質半導体領域46を備えてもよい。第2の非晶質半導体層15の一部に第2の導電型を有する第2の不純物をドーピングして第2の非晶質半導体領域46が形成される際に半導体基板11に第2の不純物がドーピングされることを、トンネル誘電体層20は確実に防ぐことができる。本実施の形態の光電変換素子6は、第2の非晶質半導体領域46中の第2の不純物が半導体基板11にドーピングされることが確実に防がれ得る構造を備えている。本実施の形態の光電変換素子6は、第2の非晶質半導体層15及びトンネル誘電体層20を介した半導体基板11と第1の非晶質半導体層17との間のヘテロ接合構造と、トンネル誘電体層20を介した半導体基板11と第1の非晶質半導体領域16及び第2の非晶質半導体領域46との間のヘテロ接合構造とが確実に保たれ得る構造を備えている。本実施の形態の光電変換素子6は、向上された特性及び信頼性を有する。 In the photoelectric conversion element 6 of the present embodiment, the tunnel dielectric layer 20 is formed on the second surface 11b of the semiconductor substrate 11, the second amorphous semiconductor layer 15 is formed on the tunnel dielectric layer 20, and the second A second amorphous semiconductor region 46 may be provided in the amorphous semiconductor layer 15. When the second amorphous semiconductor region 46 is formed by doping a part of the second amorphous semiconductor layer 15 with the second impurity having the second conductivity type, the second amorphous semiconductor region 46 is formed on the semiconductor substrate 11. The tunnel dielectric layer 20 can be surely prevented from being doped with impurities. The photoelectric conversion element 6 according to the present embodiment has a structure that can reliably prevent the second impurity in the second amorphous semiconductor region 46 from being doped into the semiconductor substrate 11. The photoelectric conversion element 6 of the present embodiment has a heterojunction structure between the semiconductor substrate 11 and the first amorphous semiconductor layer 17 via the second amorphous semiconductor layer 15 and the tunnel dielectric layer 20. The semiconductor substrate 11 and the heterojunction structure between the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46 via the tunnel dielectric layer 20 can be reliably maintained. Yes. The photoelectric conversion element 6 of the present embodiment has improved characteristics and reliability.
 本実施の形態の光電変換素子6の製造方法は、第2の非晶質半導体層15の一部に第2の不純物をドーピングして、第2の非晶質半導体層15内に第2の非晶質半導体領域46を形成することをさらに備えてもよい。第2の非晶質半導体領域46は、第2の導電型を有する第2の不純物を含んでもよい。第2の非晶質半導体領域46は、第1の非晶質半導体領域16に接してもよい。 In the method for manufacturing the photoelectric conversion element 6 according to the present embodiment, the second amorphous semiconductor layer 15 is doped with the second impurity, and the second amorphous semiconductor layer 15 is filled with the second impurity. An amorphous semiconductor region 46 may be further formed. The second amorphous semiconductor region 46 may contain a second impurity having the second conductivity type. The second amorphous semiconductor region 46 may be in contact with the first amorphous semiconductor region 16.
 本実施の形態の光電変換素子6の製造方法によれば、第1の非晶質半導体領域16及び第2の非晶質半導体領域46からなる第2の導電型を有する非晶質半導体領域と半導体基板11との距離が減少し得る。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアのうち、第1の非晶質半導体領域16及び第2の非晶質半導体領域46が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域16及び第2の非晶質半導体領域46によってより高い効率で収集され得る。本実施の形態の光電変換素子6の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 According to the method for manufacturing the photoelectric conversion element 6 of the present embodiment, the amorphous semiconductor region having the second conductivity type composed of the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46, and The distance from the semiconductor substrate 11 can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, the second amorphous semiconductor region 46 and the second amorphous semiconductor region 46 have the second. The carriers corresponding to the conductivity types of the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46 can be collected with higher efficiency. According to the manufacturing method of the photoelectric conversion element 6 of this Embodiment, the photoelectric conversion element with which the efficiency which converts light energy into electrical energy was improved can be manufactured.
 本実施の形態の光電変換素子6の製造方法は、半導体基板11の第2の表面11b上にトンネル誘電体層20を形成することと、トンネル誘電体層20上に第2の非晶質半導体層15を形成することと、第2の非晶質半導体層15の一部に第2の不純物をドーピングして、第2の非晶質半導体層15内に第2の非晶質半導体領域46を形成することとを備えてもよい。 In the method of manufacturing the photoelectric conversion element 6 according to the present embodiment, the tunnel dielectric layer 20 is formed on the second surface 11b of the semiconductor substrate 11, and the second amorphous semiconductor is formed on the tunnel dielectric layer 20. The layer 15 is formed, and a part of the second amorphous semiconductor layer 15 is doped with the second impurity, so that the second amorphous semiconductor region 46 is formed in the second amorphous semiconductor layer 15. Forming.
 本実施の形態の光電変換素子6の製造方法では、第2の非晶質半導体層15が形成される前に、半導体基板11の第2の表面11bはトンネル誘電体層20によって覆われている。第2の非晶質半導体層15の一部に第2の導電型を有する第2の不純物をドーピングして第2の非晶質半導体領域46が形成される際に半導体基板11に第2の不純物がドーピングされることを、トンネル誘電体層20は確実に防ぐことができる。本実施の形態の光電変換素子6の製造方法によれば、第2の非晶質半導体領域46中の第2の不純物が半導体基板11にドーピングされることが確実に防がれ得る。本実施の形態の光電変換素子6の製造方法によれば、第2の非晶質半導体層15及びトンネル誘電体層20を介した半導体基板11と第1の非晶質半導体層17との間のヘテロ接合構造と、トンネル誘電体層20を介した半導体基板11と第1の非晶質半導体領域16及び第2の非晶質半導体領域46との間のヘテロ接合構造とが確実に保たれ得る。本実施の形態の光電変換素子6の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が製造され得る。 In the method of manufacturing the photoelectric conversion element 6 according to the present embodiment, the second surface 11b of the semiconductor substrate 11 is covered with the tunnel dielectric layer 20 before the second amorphous semiconductor layer 15 is formed. . When the second amorphous semiconductor region 46 is formed by doping a part of the second amorphous semiconductor layer 15 with the second impurity having the second conductivity type, the second amorphous semiconductor region 46 is formed on the semiconductor substrate 11. The tunnel dielectric layer 20 can be surely prevented from being doped with impurities. According to the method for manufacturing the photoelectric conversion element 6 of the present embodiment, the semiconductor substrate 11 can be reliably prevented from being doped with the second impurity in the second amorphous semiconductor region 46. According to the method for manufacturing the photoelectric conversion element 6 of the present embodiment, the gap between the semiconductor substrate 11 and the first amorphous semiconductor layer 17 via the second amorphous semiconductor layer 15 and the tunnel dielectric layer 20 is determined. And the heterojunction structure between the semiconductor substrate 11 and the first amorphous semiconductor region 16 and the second amorphous semiconductor region 46 via the tunnel dielectric layer 20 are reliably maintained. obtain. According to the method for manufacturing the photoelectric conversion element 6 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
 本実施の形態の光電変換素子6の製造方法では、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物をイオン注入することを含んでもよい。第2の不純物のイオンビーム21を照射するという一つの工程で、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされ得る。本実施の形態の光電変換素子6の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 In the method for manufacturing the photoelectric conversion element 6 according to the present embodiment, the second impurity is doped into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. Ion implantation of a second impurity into part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 may be included. In one step of irradiating the ion beam 21 of the second impurity, a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 are doped with the second impurity. obtain. According to the method for manufacturing the photoelectric conversion element 6 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 (実施の形態12)
 図3、図4、図21から図25、図27、図31及び図33を参照して、実施の形態12の光電変換素子6及びその製造方法について説明する。本実施の形態の光電変換素子6は、実施の形態11の光電変換素子6と同様の構成を備える。本実施の形態の光電変換素子6の製造方法は、基本的には、実施の形態11の光電変換素子6の製造方法と同様の工程を備えるが、以下の点で異なる。
(Embodiment 12)
With reference to FIG. 3, FIG. 4, FIG. 21 to FIG. 25, FIG. 27, FIG. 31 and FIG. The photoelectric conversion element 6 of the present embodiment has a configuration similar to that of the photoelectric conversion element 6 of the eleventh embodiment. The manufacturing method of the photoelectric conversion element 6 of the present embodiment basically includes the same steps as the manufacturing method of the photoelectric conversion element 6 of the eleventh embodiment, but differs in the following points.
 実施の形態11の光電変換素子6の製造方法では、イオン注入法によって、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされていた。これに対し、本実施の形態の光電変換素子6の製造方法では、実施の形態9の光電変換素子5の製造方法と同様の方法により、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされる。 In the method for manufacturing the photoelectric conversion element 6 according to Embodiment 11, the second impurity is introduced into part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 by ion implantation. It was doped. On the other hand, in the manufacturing method of the photoelectric conversion element 6 of the present embodiment, a part of the first amorphous semiconductor layer 17 and the first of the first amorphous semiconductor layer 17 are formed by the same method as that of the photoelectric conversion element 5 of the ninth embodiment. A part of the second amorphous semiconductor layer 15 is doped with the second impurity.
 具体的には、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26が形成される。それから、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に移行させる。より特定的には、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26を形成することは、第1の非晶質半導体層17の一部上に第2の不純物を含むドーピングペーストを施すことであってもよい。ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に移行させることは、ドーピングペーストを熱処理することを含んでもよい。 Specifically, a dopant-containing film 26 containing a second impurity is formed on the first amorphous semiconductor layer 17. Then, the second impurity contained in the dopant-containing film 26 is transferred to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. More specifically, the formation of the dopant-containing film 26 containing the second impurity on the first amorphous semiconductor layer 17 means that the second amorphous semiconductor layer 17 is formed on the second amorphous semiconductor layer 17. A doping paste containing impurities may be applied. Transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 means that the doping paste is heat-treated. May be included.
 図3、図4、図21から図25、図27及び図33を参照して、本実施の形態の光電変換素子6の製造方法の一例について以下説明する。 An example of a method for manufacturing the photoelectric conversion element 6 according to the present embodiment will be described below with reference to FIGS. 3, 4, 21 to 25, 27 and 33.
 図3、図4及び図21から図25に示す工程によって、半導体基板11の第1の表面11a上に、第3の非晶質半導体層12と、第4の非晶質半導体層13と、誘電体層14とが形成され、半導体基板11の第2の表面11b上に、トンネル誘電体層20と、第2の非晶質半導体層15と、第1の非晶質半導体層17とが形成される。図27を参照して、第1の非晶質半導体層17の一部上に、第2の導電型を有する第2の不純物を含むドーパント含有膜26が形成される。ドーパント含有膜26は、第2の導電型を有する第2の不純物を含むドーピングペーストであってもよい。 3, 4, and 21 to 25, the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the first surface 11 a of the semiconductor substrate 11 are formed. The dielectric layer 14 is formed, and the tunnel dielectric layer 20, the second amorphous semiconductor layer 15, and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11. It is formed. Referring to FIG. 27, a dopant-containing film 26 containing a second impurity having the second conductivity type is formed on part of the first amorphous semiconductor layer 17. The dopant-containing film 26 may be a doping paste containing a second impurity having the second conductivity type.
 図33を参照して、ドーパント含有膜26を熱処理して、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に移行させる。ドーパント含有膜26を熱処理するという一つの工程で、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされ得る。第2の不純物を、第1の非晶質半導体層17の一部に加えて第2の非晶質半導体層15の一部にも移行させる点を除いて、本実施の形態の光電変換素子6の製造方法は、実施の形態9の光電変換素子5の製造方法と同様である。 Referring to FIG. 33, the dopant-containing film 26 is heat-treated so that the second impurity contained in the dopant-containing film 26 is part of the first amorphous semiconductor layer 17 and the second amorphous semiconductor layer 15. To some of them. In one step of heat-treating the dopant-containing film 26, a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 may be doped with the second impurity. The photoelectric conversion element of the present embodiment except that the second impurity is transferred to a part of the second amorphous semiconductor layer 15 in addition to a part of the first amorphous semiconductor layer 17. The manufacturing method 6 is the same as the manufacturing method of the photoelectric conversion element 5 of the ninth embodiment.
 本実施の形態の光電変換素子6の製造方法は、実施の形態11の光電変換素子6の製造方法の効果と、実施の形態9の光電変換素子5の製造方法の効果とを有する。 The manufacturing method of the photoelectric conversion element 6 of the present embodiment has the effect of the manufacturing method of the photoelectric conversion element 6 of the eleventh embodiment and the effect of the manufacturing method of the photoelectric conversion element 5 of the ninth embodiment.
 本実施の形態の光電変換素子6の製造方法において、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26を形成することと、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に移行させることとを含んでもよい。ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に移行させるという一つの工程で、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされ得る。本実施の形態の光電変換素子6の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 In the method of manufacturing the photoelectric conversion element 6 according to the present embodiment, doping a second impurity into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 Forming a dopant-containing film 26 containing a second impurity on the first amorphous semiconductor layer 17, and applying the second impurity contained in the dopant-containing film 26 to one of the first amorphous semiconductor layer 17 And transition to a part of the second amorphous semiconductor layer 15. In one step of transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15, A part of the crystalline semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 may be doped with the second impurity. According to the method for manufacturing the photoelectric conversion element 6 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 本実施の形態の光電変換素子6の製造方法において、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26を形成することは、第1の非晶質半導体層17の一部上に第2の不純物を含むドーピングペーストを施すことであってもよい。ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に移行させることは、ドーピングペーストを熱処理することを含んでもよい。ドーパント含有膜26(ドーピングペースト)を熱処理するという一つの工程で、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされ得る。本実施の形態の光電変換素子6の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 In the method for manufacturing the photoelectric conversion element 6 according to the present embodiment, forming the dopant-containing film 26 containing the second impurity on the first amorphous semiconductor layer 17 is the first amorphous semiconductor layer 17. A doping paste containing the second impurity may be applied on a part of the substrate. Transferring the second impurity contained in the dopant-containing film 26 to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 means that the doping paste is heat-treated. May be included. In one step of heat-treating the dopant-containing film 26 (doping paste), a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15 are doped with the second impurity. obtain. According to the method for manufacturing the photoelectric conversion element 6 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 (実施の形態13)
 図3、図4、図21から図25、図29、図31及び図34を参照して、実施の形態13の光電変換素子6及びその製造方法について説明する。本実施の形態の光電変換素子6は、実施の形態11の光電変換素子6と同様の構成を備える。本実施の形態の光電変換素子6の製造方法は、基本的には、実施の形態11の光電変換素子6の製造方法と同様の工程を備えるが、以下の点で異なる。
(Embodiment 13)
With reference to FIG. 3, FIG. 4, FIG. 21 to FIG. 25, FIG. 29, FIG. 31 and FIG. The photoelectric conversion element 6 of the present embodiment has a configuration similar to that of the photoelectric conversion element 6 of the eleventh embodiment. The manufacturing method of the photoelectric conversion element 6 of the present embodiment basically includes the same steps as the manufacturing method of the photoelectric conversion element 6 of the eleventh embodiment, but differs in the following points.
 実施の形態11の光電変換素子6の製造方法では、イオン注入法によって、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされていた。これに対し、本実施の形態の光電変換素子6の製造方法では、実施の形態10の光電変換素子5の製造方法と同様に、レーザドーピング法により、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされる。 In the method for manufacturing the photoelectric conversion element 6 according to Embodiment 11, the second impurity is introduced into part of the first amorphous semiconductor layer 17 and part of the second amorphous semiconductor layer 15 by ion implantation. It was doped. On the other hand, in the manufacturing method of the photoelectric conversion element 6 according to the present embodiment, as in the manufacturing method of the photoelectric conversion element 5 according to the tenth embodiment, the first amorphous semiconductor layer 17 is formed by laser doping. The second impurity is doped into the portion and part of the second amorphous semiconductor layer 15.
 具体的には、第1の非晶質半導体層17上に第2の不純物を含むドーパント含有膜26が形成される。それから、ドーパント含有膜26の一部にレーザ光27を照射することによって、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされてもよい。 Specifically, a dopant-containing film 26 containing a second impurity is formed on the first amorphous semiconductor layer 17. Then, by irradiating a part of the dopant-containing film 26 with the laser beam 27, a second impurity is introduced into a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. It may be doped.
 図3、図4、図21から図25、図29及び図34を参照して、本実施の形態の光電変換素子6の製造方法の一例について以下説明する。 An example of a method for manufacturing the photoelectric conversion element 6 of the present embodiment will be described below with reference to FIGS. 3, 4, 21 to 25, 29, and 34.
 図3、図4及び図21から図25に示す工程によって、半導体基板11の第1の表面11a上に、第3の非晶質半導体層12と、第4の非晶質半導体層13と、誘電体層14とが形成され、半導体基板11の第2の表面11b上に、トンネル誘電体層20と、第2の非晶質半導体層15と、第1の非晶質半導体層17とが形成される。 3, 4, and 21 to 25, the third amorphous semiconductor layer 12, the fourth amorphous semiconductor layer 13, and the first surface 11 a of the semiconductor substrate 11 are formed. The dielectric layer 14 is formed, and the tunnel dielectric layer 20, the second amorphous semiconductor layer 15, and the first amorphous semiconductor layer 17 are formed on the second surface 11 b of the semiconductor substrate 11. It is formed.
 図29を参照して、第1の非晶質半導体層17上に、第2の導電型を有する第2の不純物を含むドーパント含有膜26が形成される。ドーパント含有膜26は、第2の導電型を有する第2の不純物を含むドーピングペーストであってもよい。図34を参照して、ドーパント含有膜26の一部にレーザ光27を照射して、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に移行させる。ドーパント含有膜26の一部にレーザ光27を照射するという一つの工程で、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされ得る。第2の不純物を、第1の非晶質半導体層17の一部に加えて第2の非晶質半導体層15の一部にも移行させる点を除いて、本実施の形態の光電変換素子6の製造方法は、実施の形態10の光電変換素子5の製造方法と同様である。 Referring to FIG. 29, a dopant-containing film 26 containing a second impurity having the second conductivity type is formed on the first amorphous semiconductor layer 17. The dopant-containing film 26 may be a doping paste containing a second impurity having the second conductivity type. Referring to FIG. 34, a part of the dopant-containing film 26 is irradiated with a laser beam 27 so that the second impurity contained in the dopant-containing film 26 is part of the first amorphous semiconductor layer 17 and the second impurity. To a part of the amorphous semiconductor layer 15. In one step of irradiating a part of the dopant-containing film 26 with the laser beam 27, a second impurity is added to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. Can be doped. The photoelectric conversion element of the present embodiment except that the second impurity is transferred to a part of the second amorphous semiconductor layer 15 in addition to a part of the first amorphous semiconductor layer 17. The manufacturing method 6 is the same as the manufacturing method of the photoelectric conversion element 5 of the tenth embodiment.
 本実施の形態の光電変換素子6の製造方法は、実施の形態11の光電変換素子6の製造方法の効果と、実施の形態10の光電変換素子5の製造方法の効果とを有する。本実施の形態の光電変換素子6の製造方法において、ドーパント含有膜26に含まれる第2の不純物を第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に移行させることは、ドーパント含有膜26の一部にレーザ光27を照射することを含んでもよい。ドーパント含有膜26の一部にレーザ光27を照射するという一つの工程で、第1の非晶質半導体層17の一部及び第2の非晶質半導体層15の一部に第2の不純物がドーピングされ得る。本実施の形態の光電変換素子6の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 The manufacturing method of the photoelectric conversion element 6 of the present embodiment has the effect of the manufacturing method of the photoelectric conversion element 6 of the eleventh embodiment and the effect of the manufacturing method of the photoelectric conversion element 5 of the tenth embodiment. In the method for manufacturing the photoelectric conversion element 6 according to the present embodiment, the second impurity contained in the dopant-containing film 26 is part of the first amorphous semiconductor layer 17 and the second amorphous semiconductor layer 15. The transition to the portion may include irradiating a part of the dopant-containing film 26 with the laser beam 27. In one step of irradiating a part of the dopant-containing film 26 with the laser beam 27, a second impurity is added to a part of the first amorphous semiconductor layer 17 and a part of the second amorphous semiconductor layer 15. Can be doped. According to the method for manufacturing the photoelectric conversion element 6 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 (実施の形態14)
 図35を参照して、実施の形態14の光電変換素子7について説明する。本実施の形態の光電変換素子7は、実施の形態8の光電変換素子5と同様の構成を備えるが、以下の点で異なる。
(Embodiment 14)
With reference to FIG. 35, the photoelectric conversion element 7 of Embodiment 14 will be described. Although the photoelectric conversion element 7 of this Embodiment is equipped with the structure similar to the photoelectric conversion element 5 of Embodiment 8, it differs in the following points.
 本実施の形態の光電変換素子7は、第2の非晶質半導体層15を備えていない。第1の非晶質半導体層17は、トンネル誘電体層20上に設けられ、トンネル誘電体層20に直接接している。第1の非晶質半導体領域16はトンネル誘電体層20に直接接してもよい。第1の非晶質半導体領域16は、第1の非晶質半導体層17の全厚さにわたって存在してもよい。第1の非晶質半導体領域16は、トンネル誘電体層20に接してもよいし、接しなくてもよい。 The photoelectric conversion element 7 of the present embodiment does not include the second amorphous semiconductor layer 15. The first amorphous semiconductor layer 17 is provided on the tunnel dielectric layer 20 and is in direct contact with the tunnel dielectric layer 20. The first amorphous semiconductor region 16 may be in direct contact with the tunnel dielectric layer 20. The first amorphous semiconductor region 16 may exist over the entire thickness of the first amorphous semiconductor layer 17. The first amorphous semiconductor region 16 may or may not be in contact with the tunnel dielectric layer 20.
 本実施の形態の光電変換素子7の製造方法は、第2の非晶質半導体層15が形成されることを除いて、実施の形態8から実施の形態10の光電変換素子5の製造方法と同様である。具体的には、本実施の形態の光電変換素子7の製造方法では、半導体基板11の第2の表面11b上に第1の非晶質半導体層17を形成することは、トンネル誘電体層20に直接接する第1の非晶質半導体層17を形成することを含んでもよい。 The manufacturing method of the photoelectric conversion element 7 of the present embodiment is the same as the manufacturing method of the photoelectric conversion element 5 of the eighth to tenth embodiments except that the second amorphous semiconductor layer 15 is formed. It is the same. Specifically, in the method for manufacturing the photoelectric conversion element 7 according to the present embodiment, the formation of the first amorphous semiconductor layer 17 on the second surface 11b of the semiconductor substrate 11 includes the tunnel dielectric layer 20. Forming the first amorphous semiconductor layer 17 in direct contact with the first amorphous semiconductor layer 17 may be included.
 本実施の形態の光電変換素子7及びその製造方法は、実施の形態8から実施の形態10の光電変換素子5及びその製造方法と同様の効果を有するが、以下の点で異なる。 The photoelectric conversion element 7 and the manufacturing method thereof according to the present embodiment have the same effects as the photoelectric conversion element 5 and the manufacturing method thereof according to the eighth to tenth embodiments, but are different in the following points.
 本実施の形態の光電変換素子7では、第1の非晶質半導体層17は、トンネル誘電体層20に直接接してもよい。第1の非晶質半導体層17はトンネル誘電体層20に直接接しているので、第1の非晶質半導体層17と半導体基板11との距離及び第1の非晶質半導体層17内に設けられる第1の非晶質半導体領域16と半導体基板11との距離が減少し得る。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアのうち、第1の非晶質半導体層17が有する第1の導電型に対応するキャリアが、第1の非晶質半導体層17によってより高い効率で収集され得る。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアのうち、第1の非晶質半導体領域16が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域16によってより高い効率で収集され得る。本実施の形態の光電変換素子7によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 In the photoelectric conversion element 7 of the present embodiment, the first amorphous semiconductor layer 17 may be in direct contact with the tunnel dielectric layer 20. Since the first amorphous semiconductor layer 17 is in direct contact with the tunnel dielectric layer 20, the distance between the first amorphous semiconductor layer 17 and the semiconductor substrate 11 and the first amorphous semiconductor layer 17 are within the range. The distance between the provided first amorphous semiconductor region 16 and the semiconductor substrate 11 can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the first conductivity type of the first amorphous semiconductor layer 17 are first One amorphous semiconductor layer 17 can be collected with higher efficiency. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the second conductivity type of the first amorphous semiconductor region 16 are the first. A single amorphous semiconductor region 16 can be collected with higher efficiency. According to the photoelectric conversion element 7 of the present embodiment, the efficiency of converting light energy into electrical energy can be improved.
 本実施の形態の光電変換素子7は、半導体基板11の第2の表面11b上にトンネル誘電体層20を備えるとともに、トンネル誘電体層20に直接接する第1の非晶質半導体層17を備えている。本実施の形態の光電変換素子7では、半導体基板11の第2の表面11bと第1の非晶質半導体層17との間にトンネル誘電体層20が存在する。第1の導電型を有する第1の不純物を含む第1の非晶質半導体層17が形成される際に半導体基板11に第1の不純物がドーピングされることを、トンネル誘電体層20は確実に防ぐことができる。第1の非晶質半導体層17の一部に第2の導電型を有する第2の不純物をドーピングして第1の非晶質半導体領域16が形成される際に半導体基板11に第2の不純物がドーピングされることを、トンネル誘電体層20は確実に防ぐことができる。本実施の形態の光電変換素子7は、第1の非晶質半導体層17中の第1の不純物と第1の非晶質半導体領域16中の第2の不純物とが半導体基板11にドーピングされることが確実に防がれ得る構造を備えている。本実施の形態の光電変換素子7は、トンネル誘電体層20を介した半導体基板11と第1の非晶質半導体層17との間のヘテロ接合構造と、トンネル誘電体層20を介した半導体基板11と第1の非晶質半導体領域16との間のヘテロ接合構造とが確実に保たれ得る構造を備えている。本実施の形態の光電変換素子7は、向上された特性及び信頼性を有する。 The photoelectric conversion element 7 according to the present embodiment includes a tunnel dielectric layer 20 on the second surface 11 b of the semiconductor substrate 11 and a first amorphous semiconductor layer 17 that is in direct contact with the tunnel dielectric layer 20. ing. In the photoelectric conversion element 7 of the present embodiment, the tunnel dielectric layer 20 exists between the second surface 11 b of the semiconductor substrate 11 and the first amorphous semiconductor layer 17. The tunnel dielectric layer 20 ensures that the semiconductor substrate 11 is doped with the first impurity when the first amorphous semiconductor layer 17 containing the first impurity having the first conductivity type is formed. Can be prevented. When the first amorphous semiconductor region 16 is formed by doping a part of the first amorphous semiconductor layer 17 with the second impurity having the second conductivity type, the second amorphous semiconductor layer 17 is formed on the semiconductor substrate 11. The tunnel dielectric layer 20 can be surely prevented from being doped with impurities. In the photoelectric conversion element 7 of the present embodiment, the semiconductor substrate 11 is doped with the first impurity in the first amorphous semiconductor layer 17 and the second impurity in the first amorphous semiconductor region 16. It has a structure that can be surely prevented. The photoelectric conversion element 7 of the present embodiment includes a heterojunction structure between the semiconductor substrate 11 and the first amorphous semiconductor layer 17 via the tunnel dielectric layer 20 and a semiconductor via the tunnel dielectric layer 20. A structure in which the heterojunction structure between the substrate 11 and the first amorphous semiconductor region 16 can be reliably maintained is provided. The photoelectric conversion element 7 of the present embodiment has improved characteristics and reliability.
 本実施の形態の光電変換素子7の製造方法では、トンネル誘電体層20上に第1の非晶質半導体層17を形成することは、トンネル誘電体層20に直接接する第1の非晶質半導体層17を形成することを含んでもよい。第1の非晶質半導体層17はトンネル誘電体層20に直接接しているので、第1の非晶質半導体層17と半導体基板11との距離及び第1の非晶質半導体層17内に設けられる第1の非晶質半導体領域16と半導体基板11との距離が減少し得る。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアのうち、第1の非晶質半導体層17が有する第1の導電型に対応するキャリアが、第1の非晶質半導体層17によってより高い効率で収集され得る。半導体基板11の第1の表面11a側から入射する光によって半導体基板11内に生成されたキャリアのうち、第1の非晶質半導体領域16が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域16によってより高い効率で収集され得る。本実施の形態の光電変換素子7の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 In the method of manufacturing the photoelectric conversion element 7 of the present embodiment, the formation of the first amorphous semiconductor layer 17 on the tunnel dielectric layer 20 means that the first amorphous semiconductor directly in contact with the tunnel dielectric layer 20 is used. It may include forming the semiconductor layer 17. Since the first amorphous semiconductor layer 17 is in direct contact with the tunnel dielectric layer 20, the distance between the first amorphous semiconductor layer 17 and the semiconductor substrate 11 and the first amorphous semiconductor layer 17 are within the range. The distance between the provided first amorphous semiconductor region 16 and the semiconductor substrate 11 can be reduced. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the first conductivity type of the first amorphous semiconductor layer 17 are first One amorphous semiconductor layer 17 can be collected with higher efficiency. Of the carriers generated in the semiconductor substrate 11 by light incident from the first surface 11a side of the semiconductor substrate 11, carriers corresponding to the second conductivity type of the first amorphous semiconductor region 16 are the first. A single amorphous semiconductor region 16 can be collected with higher efficiency. According to the manufacturing method of the photoelectric conversion element 7 of this Embodiment, the photoelectric conversion element in which the efficiency which converts light energy into electrical energy was improved can be manufactured.
 本実施の形態の光電変換素子7の製造方法は、半導体基板11の第2の表面11b上にトンネル誘電体層20を形成することと、トンネル誘電体層20に直接接する第1の非晶質半導体層17を形成することとを備えている。本実施の形態の光電変換素子7の製造方法では、第1の非晶質半導体層17が形成される前に、半導体基板11の第2の表面11bはトンネル誘電体層20によって覆われている。本実施の形態の光電変換素子7の製造方法によれば、第1の導電型を有する第1の不純物を含む第1の非晶質半導体層17が形成される際に半導体基板11に第1の不純物がドーピングされることを、トンネル誘電体層20は確実に防ぐことができる。第1の非晶質半導体層17の一部に第2の導電型を有する第2の不純物をドーピングして第1の非晶質半導体領域16が形成される際に半導体基板11に第2の不純物がドーピングされることを、トンネル誘電体層20は確実に防ぐことができる。本実施の形態の光電変換素子7の製造方法によれば、第1の非晶質半導体層17中の第1の不純物と第1の非晶質半導体領域16中の第2の不純物とが半導体基板11にドーピングされることが確実に防がれ得る。本実施の形態の光電変換素子7の製造方法によれば、トンネル誘電体層20を介した半導体基板11と第1の非晶質半導体層17との間のヘテロ接合構造と、トンネル誘電体層20を介した半導体基板11と第1の非晶質半導体領域16との間のヘテロ接合構造とが確実に保たれ得る。本実施の形態の光電変換素子7の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が製造され得る。 In the method of manufacturing the photoelectric conversion element 7 according to the present embodiment, the tunnel dielectric layer 20 is formed on the second surface 11b of the semiconductor substrate 11, and the first amorphous material that is in direct contact with the tunnel dielectric layer 20 is used. Forming a semiconductor layer 17. In the method for manufacturing the photoelectric conversion element 7 of the present embodiment, the second surface 11b of the semiconductor substrate 11 is covered with the tunnel dielectric layer 20 before the first amorphous semiconductor layer 17 is formed. . According to the method for manufacturing the photoelectric conversion element 7 of the present embodiment, the first amorphous semiconductor layer 17 containing the first impurity having the first conductivity type is formed on the semiconductor substrate 11 when the first amorphous semiconductor layer 17 is formed. The tunnel dielectric layer 20 can reliably prevent the impurities from being doped. When the first amorphous semiconductor region 16 is formed by doping a part of the first amorphous semiconductor layer 17 with the second impurity having the second conductivity type, the second amorphous semiconductor layer 17 is formed on the semiconductor substrate 11. The tunnel dielectric layer 20 can be surely prevented from being doped with impurities. According to the method for manufacturing the photoelectric conversion element 7 of the present embodiment, the first impurity in the first amorphous semiconductor layer 17 and the second impurity in the first amorphous semiconductor region 16 are the semiconductor. It can be reliably prevented that the substrate 11 is doped. According to the method of manufacturing the photoelectric conversion element 7 of the present embodiment, the heterojunction structure between the semiconductor substrate 11 and the first amorphous semiconductor layer 17 via the tunnel dielectric layer 20, and the tunnel dielectric layer The heterojunction structure between the semiconductor substrate 11 and the first amorphous semiconductor region 16 via 20 can be reliably maintained. According to the method for manufacturing the photoelectric conversion element 7 of the present embodiment, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
 [付記]
 (1)ここで開示された実施の形態の光電変換素子は、第1の表面と第1の表面と反対側の第2の表面とを有する半導体基板と、第2の表面上に設けられるとともに、第1の導電型を有する第1の非晶質半導体層と、第2の表面上に設けられるとともに、第1の導電型と異なる第2の導電型を有する第1の非晶質半導体領域とを備える。第1の非晶質半導体層は第1の導電型を有する第1の不純物を含む。第1の非晶質半導体領域は第1の不純物と第2の導電型を有する第2の不純物とを含む。第1の非晶質半導体層及び第1の非晶質半導体領域は、連続して延在する1つの層を構成する。
[Appendix]
(1) The photoelectric conversion element according to the embodiment disclosed herein is provided on a semiconductor substrate having a first surface and a second surface opposite to the first surface, and on the second surface. A first amorphous semiconductor layer having a first conductivity type, and a first amorphous semiconductor region provided on the second surface and having a second conductivity type different from the first conductivity type With. The first amorphous semiconductor layer includes a first impurity having a first conductivity type. The first amorphous semiconductor region includes a first impurity and a second impurity having a second conductivity type. The first amorphous semiconductor layer and the first amorphous semiconductor region constitute one layer that extends continuously.
 半導体基板の第2の表面上に第1の非晶質半導体層が形成された後、半導体基板の第2の表面を露出させることなく製造し得る構造を、ここで開示された実施の形態の光電変換素子は備えている。半導体基板の第2の表面に汚染物質が付着したり、非晶質半導体層のエッチングにより半導体基板の第2の表面が荒れたりすることなく製造し得る構造を、ここで開示された実施の形態の光電変換素子は備えている。ここで開示された実施の形態の光電変換素子は、向上された特性及び信頼性を有する。 A structure that can be manufactured without exposing the second surface of the semiconductor substrate after the first amorphous semiconductor layer is formed on the second surface of the semiconductor substrate is described in the embodiment disclosed herein. The photoelectric conversion element is provided. Embodiments disclosed herein include a structure that can be manufactured without a contaminant adhering to the second surface of a semiconductor substrate or the second surface of a semiconductor substrate being roughened by etching an amorphous semiconductor layer. The photoelectric conversion element is provided. The photoelectric conversion element of the embodiment disclosed herein has improved characteristics and reliability.
 (2)ここで開示された実施の形態の光電変換素子において、第1の非晶質半導体領域は、第1の非晶質半導体層の全厚さにわたって存在してもよい。第1の非晶質半導体領域と半導体基板との距離が減少し得る。半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアのうち、第1の非晶質半導体領域が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域によってより高い効率で収集され得る。ここで開示された実施の形態の光電変換素子によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 (2) In the photoelectric conversion element of the embodiment disclosed herein, the first amorphous semiconductor region may exist over the entire thickness of the first amorphous semiconductor layer. The distance between the first amorphous semiconductor region and the semiconductor substrate can be reduced. Of the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate, the carrier corresponding to the second conductivity type of the first amorphous semiconductor region is the first amorphous. Higher efficiency can be collected by the quality semiconductor region. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved.
 (3)ここで開示された実施の形態の光電変換素子において、第1の非晶質半導体領域における第1の不純物の濃度は、第1の非晶質半導体領域と第1の非晶質半導体層とが交互に配列される方向において一定であってもよい。半導体基板の第2の表面上に第1の非晶質半導体層が形成された後、半導体基板の第2の表面を露出させることなく製造し得る構造を、ここで開示された実施の形態の光電変換素子は備えている。ここで開示された実施の形態の光電変換素子は、向上された特性及び信頼性を有する。 (3) In the photoelectric conversion element of the embodiment disclosed herein, the concentration of the first impurity in the first amorphous semiconductor region is the same as that of the first amorphous semiconductor region and the first amorphous semiconductor. It may be constant in the direction in which the layers are arranged alternately. A structure that can be manufactured without exposing the second surface of the semiconductor substrate after the first amorphous semiconductor layer is formed on the second surface of the semiconductor substrate is described in the embodiment disclosed herein. The photoelectric conversion element is provided. The photoelectric conversion element of the embodiment disclosed herein has improved characteristics and reliability.
 (4)ここで開示された実施の形態の光電変換素子において、第1の非晶質半導体層は、半導体基板の第2の表面に直接接してもよい。第1の非晶質半導体層は半導体基板の第2の表面に直接接しているので、第1の非晶質半導体層と半導体基板との距離及び第1の非晶質半導体層内に設けられる第1の非晶質半導体領域と半導体基板との距離が減少し得る。半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアのうち、第1の非晶質半導体層が有する第1の導電型に対応するキャリアが、第1の非晶質半導体層によってより高い効率で収集され得る。半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアのうち、第1の非晶質半導体領域が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域によってより高い効率で収集され得る。ここで開示された実施の形態の光電変換素子によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 (4) In the photoelectric conversion element of the embodiment disclosed herein, the first amorphous semiconductor layer may be in direct contact with the second surface of the semiconductor substrate. Since the first amorphous semiconductor layer is in direct contact with the second surface of the semiconductor substrate, the distance between the first amorphous semiconductor layer and the semiconductor substrate and the first amorphous semiconductor layer are provided in the first amorphous semiconductor layer. The distance between the first amorphous semiconductor region and the semiconductor substrate can be reduced. Of the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate, the carrier corresponding to the first conductivity type of the first amorphous semiconductor layer is the first amorphous. It can be collected with higher efficiency by the quality semiconductor layer. Of the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate, the carrier corresponding to the second conductivity type of the first amorphous semiconductor region is the first amorphous. Higher efficiency can be collected by the quality semiconductor region. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved.
 (5)ここで開示された実施の形態の光電変換素子は、第1の非晶質半導体層と半導体基板の第2の表面との間及び第1の非晶質半導体領域と半導体基板の第2の表面との間に、i型を有する第2の非晶質半導体層をさらに備えてもよい。i型を有する第2の非晶質半導体層は、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアが半導体基板の第2の表面において再結合することを抑制することができる。ここで開示された実施の形態の光電変換素子によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上され得る。 (5) In the photoelectric conversion element of the embodiment disclosed herein, the photoelectric conversion element between the first amorphous semiconductor layer and the second surface of the semiconductor substrate and between the first amorphous semiconductor region and the semiconductor substrate. A second amorphous semiconductor layer having i-type may be further provided between the two surfaces. The second amorphous semiconductor layer having i-type suppresses recombination of carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate on the second surface of the semiconductor substrate. can do. According to the photoelectric conversion element of the embodiment disclosed herein, the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
 (6)ここで開示された実施の形態の光電変換素子は、第2の非晶質半導体層内に設けられるとともに、第2の導電型を有する第2の非晶質半導体領域をさらに備えてもよい。第2の非晶質半導体領域は第2の不純物を含んでもよい。第2の非晶質半導体領域は第1の非晶質半導体領域に接してもよい。ここで開示された実施の形態の光電変換素子では、第1の非晶質半導体領域及び第2の非晶質半導体領域からなる第2の導電型を有する非晶質半導体領域と半導体基板との距離が減少し得る。半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアのうち、第1の非晶質半導体領域及び第2の非晶質半導体領域が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域及び第2の非晶質半導体領域によってより高い効率で収集され得る。ここで開示された実施の形態の光電変換素子によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 (6) The photoelectric conversion element according to the embodiment disclosed herein further includes a second amorphous semiconductor region having a second conductivity type, as well as being provided in the second amorphous semiconductor layer. Also good. The second amorphous semiconductor region may include a second impurity. The second amorphous semiconductor region may be in contact with the first amorphous semiconductor region. In the photoelectric conversion element according to the embodiment disclosed herein, an amorphous semiconductor region having the second conductivity type including the first amorphous semiconductor region and the second amorphous semiconductor region, and the semiconductor substrate The distance can be reduced. Corresponding to the second conductivity type of the first amorphous semiconductor region and the second amorphous semiconductor region among the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate Carriers to be collected can be collected with higher efficiency by the first amorphous semiconductor region and the second amorphous semiconductor region. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved.
 (7)ここで開示された実施の形態の光電変換素子は、第1の表面と第1の表面と反対側の第2の表面とを有する半導体基板と、第2の表面上に設けられたトンネル誘電体層と、トンネル誘電体層上に設けられるとともに、第1の導電型を有する第1の非晶質半導体層と、トンネル誘電体層上に設けられるとともに、第1の導電型と異なる第2の導電型を有する第1の非晶質半導体領域とを備える。第1の非晶質半導体層は第1の導電型を有する第1の不純物を含む。第1の非晶質半導体領域は第1の不純物と第2の導電型を有する第2の不純物とを含む。第1の非晶質半導体層及び第1の非晶質半導体領域は、連続して延在する1つの層を構成する。 (7) The photoelectric conversion element according to the embodiment disclosed herein is provided on a semiconductor substrate having a first surface and a second surface opposite to the first surface, and the second surface. A tunnel dielectric layer, provided on the tunnel dielectric layer, provided on the tunnel dielectric layer, and different from the first conductivity type, provided on the tunnel dielectric layer. And a first amorphous semiconductor region having a second conductivity type. The first amorphous semiconductor layer includes a first impurity having a first conductivity type. The first amorphous semiconductor region includes a first impurity and a second impurity having a second conductivity type. The first amorphous semiconductor layer and the first amorphous semiconductor region constitute one layer that extends continuously.
 トンネル誘電体層は、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアが半導体基板の第2の表面において再結合することを抑制することができる。ここで開示された実施の形態の光電変換素子は、向上されたパッシベーション特性を有する。 The tunnel dielectric layer can suppress recombination of carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate on the second surface of the semiconductor substrate. The photoelectric conversion elements of the embodiments disclosed herein have improved passivation characteristics.
 トンネル誘電体層は、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアを、第1の非晶質半導体層及び第1の非晶質半導体領域にトンネルさせる。ここで開示された実施の形態の光電変換素子によれば、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアが効率的に収集され得る。 The tunnel dielectric layer tunnels carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate to the first amorphous semiconductor layer and the first amorphous semiconductor region. According to the photoelectric conversion element of the embodiment disclosed herein, carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate can be efficiently collected.
 ここで開示された実施の形態の光電変換素子は、半導体基板の第2の表面上にトンネル誘電体層及び第1の非晶質半導体層が形成された後、半導体基板の第2の表面を露出させることなく製造し得る構造を備えている。半導体基板の第2の表面に汚染物質が付着したり、非晶質半導体層のエッチングにより半導体基板の第2の表面が荒れたりすることなく製造し得る構造を、ここで開示された実施の形態の光電変換素子は備えている。ここで開示された実施の形態の光電変換素子は、向上された特性及び信頼性を有する。 In the photoelectric conversion element of the embodiment disclosed herein, after the tunnel dielectric layer and the first amorphous semiconductor layer are formed on the second surface of the semiconductor substrate, the second surface of the semiconductor substrate is formed. It has a structure that can be manufactured without exposure. Embodiments disclosed herein include a structure that can be manufactured without a contaminant adhering to the second surface of a semiconductor substrate or the second surface of a semiconductor substrate being roughened by etching an amorphous semiconductor layer. The photoelectric conversion element is provided. The photoelectric conversion element of the embodiment disclosed herein has improved characteristics and reliability.
 (8)ここで開示された実施の形態の光電変換素子において、第1の非晶質半導体領域は、第1の非晶質半導体層の全厚さにわたって存在してもよい。第1の非晶質半導体領域と半導体基板との距離が減少し得る。半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアのうち、第1の非晶質半導体領域が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域によってより高い効率で収集され得る。ここで開示された実施の形態の光電変換素子によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 (8) In the photoelectric conversion element of the embodiment disclosed herein, the first amorphous semiconductor region may exist over the entire thickness of the first amorphous semiconductor layer. The distance between the first amorphous semiconductor region and the semiconductor substrate can be reduced. Of the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate, the carrier corresponding to the second conductivity type of the first amorphous semiconductor region is the first amorphous. Higher efficiency can be collected by the quality semiconductor region. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved.
 (9)ここで開示された実施の形態の光電変換素子において、第1の非晶質半導体領域における第1の不純物の濃度は、第1の非晶質半導体領域と第1の非晶質半導体層とが交互に配列される方向において一定であってもよい。そのため、半導体基板の第2の表面上にトンネル誘電体層及び第1の非晶質半導体層が形成された後、半導体基板の第2の表面を露出させることなく製造し得る構造を、ここで開示された実施の形態の光電変換素子は備えている。ここで開示された実施の形態の光電変換素子は、向上された特性及び信頼性を有する。 (9) In the photoelectric conversion element of the embodiment disclosed herein, the concentration of the first impurity in the first amorphous semiconductor region is the same as that of the first amorphous semiconductor region and the first amorphous semiconductor. It may be constant in the direction in which the layers are arranged alternately. Therefore, after the tunnel dielectric layer and the first amorphous semiconductor layer are formed on the second surface of the semiconductor substrate, a structure that can be manufactured without exposing the second surface of the semiconductor substrate is here. The photoelectric conversion element of the disclosed embodiment is provided. The photoelectric conversion element of the embodiment disclosed herein has improved characteristics and reliability.
 (10)ここで開示された実施の形態の光電変換素子において、第1の非晶質半導体層は、トンネル誘電体層に直接接してもよい。第1の非晶質半導体層はトンネル誘電体層に直接接しているので、第1の非晶質半導体層と半導体基板との距離及び第1の非晶質半導体層内に設けられる第1の非晶質半導体領域と半導体基板との距離が減少し得る。半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアのうち、第1の非晶質半導体層が有する第1の導電型に対応するキャリアが、第1の非晶質半導体層によってより高い効率で収集され得る。半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアのうち、第1の非晶質半導体領域が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域によってより高い効率で収集され得る。ここで開示された実施の形態の光電変換素子によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 (10) In the photoelectric conversion element of the embodiment disclosed herein, the first amorphous semiconductor layer may be in direct contact with the tunnel dielectric layer. Since the first amorphous semiconductor layer is in direct contact with the tunnel dielectric layer, the distance between the first amorphous semiconductor layer and the semiconductor substrate and the first amorphous semiconductor layer provided in the first amorphous semiconductor layer The distance between the amorphous semiconductor region and the semiconductor substrate can be reduced. Of the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate, the carrier corresponding to the first conductivity type of the first amorphous semiconductor layer is the first amorphous. It can be collected with higher efficiency by the quality semiconductor layer. Of the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate, the carrier corresponding to the second conductivity type of the first amorphous semiconductor region is the first amorphous. Higher efficiency can be collected by the quality semiconductor region. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved.
 ここで開示された実施の形態の光電変換素子は、半導体基板の第2の表面上にトンネル誘電体層を備えるとともに、トンネル誘電体層に直接接する第1の非晶質半導体層を備えている。ここで開示された実施の形態の光電変換素子では、半導体基板の第2の表面と第1の非晶質半導体層との間にトンネル誘電体層が存在する。第1の導電型を有する第1の不純物を含む第1の非晶質半導体層が形成される際に半導体基板に第1の不純物がドーピングされることを、トンネル誘電体層は確実に防ぐことができる。第1の非晶質半導体層の一部に第2の導電型を有する第2の不純物をドーピングして第1の非晶質半導体領域が形成される際に半導体基板に第2の不純物がドーピングされることを、トンネル誘電体層は確実に防ぐことができる。このように、ここで開示された実施の形態の光電変換素子は、第1の非晶質半導体層中の第1の不純物と第1の非晶質半導体領域中の第2の不純物とが半導体基板にドーピングされることが確実に防がれ得る構造を備えている。ここで開示された実施の形態の光電変換素子は、トンネル誘電体層を介した半導体基板と第1の非晶質半導体層との間のヘテロ接合構造と、トンネル誘電体層を介した半導体基板と第1の非晶質半導体領域との間のヘテロ接合構造とが確実に保たれ得る構造を備えている。ここで開示された実施の形態の光電変換素子は、向上された特性及び信頼性を有する。 The photoelectric conversion element according to the embodiment disclosed herein includes a tunnel dielectric layer on the second surface of the semiconductor substrate, and a first amorphous semiconductor layer in direct contact with the tunnel dielectric layer. . In the photoelectric conversion element according to the embodiment disclosed herein, a tunnel dielectric layer exists between the second surface of the semiconductor substrate and the first amorphous semiconductor layer. The tunnel dielectric layer reliably prevents the semiconductor substrate from being doped with the first impurity when the first amorphous semiconductor layer containing the first impurity having the first conductivity type is formed. Can do. The semiconductor substrate is doped with the second impurity when the first amorphous semiconductor region is formed by doping a part of the first amorphous semiconductor layer with the second impurity having the second conductivity type. The tunnel dielectric layer can be reliably prevented. As described above, in the photoelectric conversion element of the embodiment disclosed herein, the first impurity in the first amorphous semiconductor layer and the second impurity in the first amorphous semiconductor region are semiconductors. It has a structure that can reliably prevent the substrate from being doped. The photoelectric conversion element of the embodiment disclosed herein includes a heterojunction structure between a semiconductor substrate and a first amorphous semiconductor layer via a tunnel dielectric layer, and a semiconductor substrate via a tunnel dielectric layer And a heterojunction structure between the first amorphous semiconductor region and the first amorphous semiconductor region. The photoelectric conversion element of the embodiment disclosed herein has improved characteristics and reliability.
 (11)ここで開示された実施の形態の光電変換素子は、第1の非晶質半導体層とトンネル誘電体層との間及び第1の非晶質半導体領域とトンネル誘電体層との間に、i型を有する第2の非晶質半導体層をさらに備えてもよい。i型を有する第2の非晶質半導体層は、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアが半導体基板の第2の表面において再結合することを抑制することができる。ここで開示された実施の形態の光電変換素子によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上され得る。 (11) The photoelectric conversion element according to the embodiment disclosed herein includes a gap between the first amorphous semiconductor layer and the tunnel dielectric layer and a gap between the first amorphous semiconductor region and the tunnel dielectric layer. Further, an i-type second amorphous semiconductor layer may be further provided. The second amorphous semiconductor layer having i-type suppresses recombination of carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate on the second surface of the semiconductor substrate. can do. According to the photoelectric conversion element of the embodiment disclosed herein, the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
 (12)ここで開示された実施の形態の光電変換素子は、第2の非晶質半導体層内に設けられるとともに、第2の導電型を有する第2の非晶質半導体領域をさらに備えてもよい。第2の非晶質半導体領域は第2の不純物を含んでもよい。第2の非晶質半導体領域は第1の非晶質半導体領域に接してもよい。 (12) The photoelectric conversion element according to the embodiment disclosed herein further includes a second amorphous semiconductor region having a second conductivity type, as well as being provided in the second amorphous semiconductor layer. Also good. The second amorphous semiconductor region may include a second impurity. The second amorphous semiconductor region may be in contact with the first amorphous semiconductor region.
 ここで開示された実施の形態の光電変換素子では、第1の非晶質半導体領域及び第2の非晶質半導体領域からなる第2の導電型を有する非晶質半導体領域と半導体基板との距離が減少し得る。半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアのうち、第1の非晶質半導体領域及び第2の非晶質半導体領域が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域及び第2の非晶質半導体領域によってより高い効率で収集され得る。ここで開示された実施の形態の光電変換素子によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 In the photoelectric conversion element according to the embodiment disclosed herein, an amorphous semiconductor region having the second conductivity type including the first amorphous semiconductor region and the second amorphous semiconductor region, and the semiconductor substrate The distance can be reduced. Corresponding to the second conductivity type of the first amorphous semiconductor region and the second amorphous semiconductor region among the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate Carriers to be collected can be collected with higher efficiency by the first amorphous semiconductor region and the second amorphous semiconductor region. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved.
 ここで開示された実施の形態の光電変換素子は、半導体基板の第2の表面上にトンネル誘電体層を、トンネル誘電体層上に第2の非晶質半導体層を、第2の非晶質半導体層内に第2の非晶質半導体領域を備えてもよい。第2の非晶質半導体層の一部に第2の導電型を有する第2の不純物をドーピングして第2の非晶質半導体領域が形成される際に半導体基板に第2の不純物がドーピングされることを、トンネル誘電体層は確実に防ぐことができる。ここで開示された実施の形態の光電変換素子は、第2の非晶質半導体領域中の第2の不純物が半導体基板にドーピングされることが確実に防がれ得る構造を備えている。ここで開示された実施の形態の光電変換素子は、第2の非晶質半導体層及びトンネル誘電体層を介した半導体基板と第1の非晶質半導体層との間のヘテロ接合構造と、トンネル誘電体層を介した半導体基板と第1の非晶質半導体領域及び第2の非晶質半導体領域との間のヘテロ接合構造とが確実に保たれ得る構造を備えている。ここで開示された実施の形態の光電変換素子は、向上された特性及び信頼性を有する。 The photoelectric conversion element of the embodiment disclosed herein includes a tunnel dielectric layer on the second surface of the semiconductor substrate, a second amorphous semiconductor layer on the tunnel dielectric layer, and a second amorphous layer. A second amorphous semiconductor region may be provided in the crystalline semiconductor layer. When the second amorphous semiconductor region is formed by doping the second amorphous semiconductor layer with a second impurity having the second conductivity type in part of the second amorphous semiconductor layer, the semiconductor substrate is doped with the second impurity. The tunnel dielectric layer can be reliably prevented. The photoelectric conversion element of the embodiment disclosed here has a structure that can reliably prevent the second impurity in the second amorphous semiconductor region from being doped into the semiconductor substrate. The photoelectric conversion element of the embodiment disclosed herein includes a heterojunction structure between the semiconductor substrate and the first amorphous semiconductor layer via the second amorphous semiconductor layer and the tunnel dielectric layer, A structure in which the heterojunction structure between the semiconductor substrate and the first amorphous semiconductor region and the second amorphous semiconductor region via the tunnel dielectric layer can be reliably maintained is provided. The photoelectric conversion element of the embodiment disclosed herein has improved characteristics and reliability.
 (13)ここで開示された実施の形態の光電変換素子において、トンネル誘電体層は0.2nm以上5.0nm以下の厚さを有してもよい。0.2nm以上の厚さを有するトンネル誘電体層は、光電変換素子のパッシベーション特性をさらに向上させることができる。5.0nm以下の厚さを有するトンネル誘電体層は、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアを、第1の非晶質半導体層及び第1の非晶質半導体領域にさらに効率的にトンネルさせることができる。ここで開示された実施の形態の光電変換素子によれば、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアがさらに効率的に収集され得る。 (13) In the photoelectric conversion element of the embodiment disclosed herein, the tunnel dielectric layer may have a thickness of 0.2 nm to 5.0 nm. The tunnel dielectric layer having a thickness of 0.2 nm or more can further improve the passivation characteristics of the photoelectric conversion element. The tunnel dielectric layer having a thickness of 5.0 nm or less allows carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate to be converted into the first amorphous semiconductor layer and the first amorphous semiconductor layer. Tunneling to the amorphous semiconductor region can be performed more efficiently. According to the photoelectric conversion element of the embodiment disclosed herein, carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate can be collected more efficiently.
 (14)ここで開示された実施の形態の光電変換素子は、半導体基板の第2の表面上に設けられるとともに、第1の非晶質半導体層と電気的に接続される第1の電極と、半導体基板の第2の表面上に設けられるとともに、第1の非晶質半導体領域と電気的に接続される第2の電極とをさらに備えてもよい。第1の電極及び第2の電極は、光の入射面である半導体基板の第1の表面側に設けられていない。光電変換素子に入射する光は、第1の電極及び第2の電極によって遮られない。ここで開示された実施の形態の光電変換素子によれば、高い短絡電流JSCが得られ、光エネルギーを電気エネルギーに変換する効率が向上され得る。 (14) The photoelectric conversion element of the embodiment disclosed herein is provided on the second surface of the semiconductor substrate, and has a first electrode electrically connected to the first amorphous semiconductor layer The semiconductor device may further include a second electrode provided on the second surface of the semiconductor substrate and electrically connected to the first amorphous semiconductor region. The first electrode and the second electrode are not provided on the first surface side of the semiconductor substrate which is a light incident surface. Light incident on the photoelectric conversion element is not blocked by the first electrode and the second electrode. According to the photoelectric conversion element of the embodiment disclosed herein, a high short-circuit current J SC can be obtained, and the efficiency of converting light energy into electrical energy can be improved.
 (15)ここで開示された実施の形態の光電変換素子は、半導体基板の第1の表面上に誘電体層をさらに備えてもよい。誘電体層が反射防止膜として機能するとき、誘電体層は、より多くの光を光電変換素子内に入射させることができる。ここで開示された実施の形態の光電変換素子によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。誘電体層がパッシベーション膜として機能するとき、誘電体層は、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアが半導体基板の第1の表面において再結合することを抑制することができる。ここで開示された実施の形態の光電変換素子によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 (15) The photoelectric conversion element of the embodiment disclosed herein may further include a dielectric layer on the first surface of the semiconductor substrate. When the dielectric layer functions as an antireflection film, the dielectric layer can allow more light to enter the photoelectric conversion element. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved. When the dielectric layer functions as a passivation film, the dielectric layer is such that carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate are recombined on the first surface of the semiconductor substrate. Can be suppressed. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved.
 (16)ここで開示された実施の形態の光電変換素子は、半導体基板の第1の表面上に、i型を有する第3の非晶質半導体層をさらに備えてもよい。i型を有する第3の非晶質半導体層は、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアが半導体基板の第1の表面において再結合することを抑制することができる。ここで開示された実施の形態の光電変換素子によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上され得る。 (16) The photoelectric conversion element of the embodiment disclosed herein may further include an i-type third amorphous semiconductor layer on the first surface of the semiconductor substrate. The third amorphous semiconductor layer having i-type suppresses recombination of carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate on the first surface of the semiconductor substrate. can do. According to the photoelectric conversion element of the embodiment disclosed herein, the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
 (17)ここで開示された実施の形態の光電変換素子は、半導体基板の第1の表面上に、半導体基板と同じ導電型を有する第4の非晶質半導体層をさらに備えてもよい。半導体基板と同じ導電型を有する第4の非晶質半導体層は、光電変換素子に光が入射することによって半導体基板内に発生したキャリアのうち半導体基板の第1の表面に近づくキャリアを、半導体基板の内部に押し戻すことができる。第4の非晶質半導体層は、このキャリアが半導体基板の第1の表面において再結合することを抑制することができる。ここで開示された実施の形態の光電変換素子によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上され得る。 (17) The photoelectric conversion element of the embodiment disclosed herein may further include a fourth amorphous semiconductor layer having the same conductivity type as the semiconductor substrate, on the first surface of the semiconductor substrate. The fourth amorphous semiconductor layer having the same conductivity type as that of the semiconductor substrate has a carrier that is close to the first surface of the semiconductor substrate among carriers generated in the semiconductor substrate when light is incident on the photoelectric conversion element. It can be pushed back into the substrate. The fourth amorphous semiconductor layer can suppress recombination of the carriers on the first surface of the semiconductor substrate. According to the photoelectric conversion element of the embodiment disclosed herein, the passivation characteristics and the efficiency of converting light energy into electric energy can be improved.
 (18)ここで開示された実施の形態の光電変換素子において、半導体基板の第1の表面は、凹凸構造を含んでもよい。光の入射面である半導体基板の第1の表面上に凹凸構造を設けることによって、より多くの光が光電変換素子内に入射され得る。ここで開示された実施の形態の光電変換素子によれば、光エネルギーを電気エネルギーに変換する効率が向上され得る。 (18) In the photoelectric conversion element of the embodiment disclosed herein, the first surface of the semiconductor substrate may include an uneven structure. By providing the concavo-convex structure on the first surface of the semiconductor substrate which is the light incident surface, more light can be incident into the photoelectric conversion element. According to the photoelectric conversion element of the embodiment disclosed herein, the efficiency of converting light energy into electric energy can be improved.
 (19)ここで開示された実施の形態の光電変換素子の製造方法は、第1の表面と第1の表面と反対側の第2の表面とを有する半導体基板の第2の表面上に、第1の導電型を有する第1の非晶質半導体層を形成することを備える。第1の非晶質半導体層は第1の導電型を有する第1の不純物を含む。ここで開示された実施の形態の光電変換素子の製造方法は、第1の非晶質半導体層内に第2の導電型を有する第1の非晶質半導体領域を形成することをさらに備える。第1の非晶質半導体層内に第1の非晶質半導体領域を形成することは、第1の非晶質半導体層の一部に、第1の導電型と異なる第2の導電型を有する第2の不純物をドーピングすることを含む。 (19) A method for manufacturing a photoelectric conversion element according to an embodiment disclosed herein includes a first surface and a second surface of a semiconductor substrate having a second surface opposite to the first surface. Forming a first amorphous semiconductor layer having a first conductivity type. The first amorphous semiconductor layer includes a first impurity having a first conductivity type. The manufacturing method of the photoelectric conversion element according to the embodiment disclosed herein further includes forming a first amorphous semiconductor region having the second conductivity type in the first amorphous semiconductor layer. The formation of the first amorphous semiconductor region in the first amorphous semiconductor layer means that a part of the first amorphous semiconductor layer has a second conductivity type different from the first conductivity type. Doping with a second impurity.
 半導体基板の第2の表面上に第1の非晶質半導体層が形成された後、半導体基板の第2の表面を露出させることなく、光電変換素子が製造され得る。半導体基板の第2の表面に汚染物質が付着したり、非晶質半導体層のエッチングにより半導体基板の第2の表面が荒れたりすることなく、光電変換素子が製造され得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が製造され得る。 After the first amorphous semiconductor layer is formed on the second surface of the semiconductor substrate, the photoelectric conversion element can be manufactured without exposing the second surface of the semiconductor substrate. The photoelectric conversion element can be manufactured without a contaminant adhering to the second surface of the semiconductor substrate and without causing the second surface of the semiconductor substrate to be roughened by etching the amorphous semiconductor layer. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
 (20)ここで開示された実施の形態の光電変換素子の製造方法は、第1の表面と第1の表面と反対側の第2の表面とを有する半導体基板の第2の表面上に、第1の導電型を有する第1の非晶質半導体層を形成することを備える。第1の非晶質半導体層は第1の導電型を有する第1の不純物を含む。ここで開示された実施の形態の光電変換素子の製造方法は、第1の非晶質半導体層内に第2の導電型を有する第1の非晶質半導体領域を形成することをさらに備える。第1の非晶質半導体層内に第1の非晶質半導体領域を形成することは、第1の非晶質半導体層の一部に、第1の導電型と異なる第2の導電型を有する第2の不純物をドーピングすることを含む。 (20) In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the second surface of the semiconductor substrate having the first surface and the second surface opposite to the first surface is provided. Forming a first amorphous semiconductor layer having a first conductivity type. The first amorphous semiconductor layer includes a first impurity having a first conductivity type. The manufacturing method of the photoelectric conversion element according to the embodiment disclosed herein further includes forming a first amorphous semiconductor region having the second conductivity type in the first amorphous semiconductor layer. The formation of the first amorphous semiconductor region in the first amorphous semiconductor layer means that a part of the first amorphous semiconductor layer has a second conductivity type different from the first conductivity type. Doping with a second impurity.
 トンネル誘電体層は、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアが半導体基板の第2の表面において再結合することを抑制することができる。ここで開示された実施の形態の光電変換素子の製造方法によれば、向上されたパッシベーション特性を有する光電変換素子が製造され得る。 The tunnel dielectric layer can suppress recombination of carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate on the second surface of the semiconductor substrate. According to the photoelectric conversion element manufacturing method of the embodiment disclosed herein, a photoelectric conversion element having improved passivation characteristics can be manufactured.
 トンネル誘電体層は、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアを、第1の非晶質半導体層及び第1の非晶質半導体領域にトンネルさせる。ここで開示された実施の形態の光電変換素子の製造方法によれば、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアを効率的に収集することができる光電変換素子が製造され得る。 The tunnel dielectric layer tunnels carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate to the first amorphous semiconductor layer and the first amorphous semiconductor region. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, photoelectrics that can efficiently collect carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate. A conversion element can be manufactured.
 ここで開示された実施の形態の光電変換素子の製造方法では、第1の非晶質半導体層が形成される前に、半導体基板の第2の表面はトンネル誘電体層によって覆われている。そのため、半導体基板の第2の表面上にトンネル誘電体層及び第1の非晶質半導体層が形成された後、半導体基板の第2の表面を露出させることなく、光電変換素子が製造され得る。半導体基板の第2の表面に汚染物質が付着したり、非晶質半導体層のエッチングにより半導体基板の第2の表面が荒れたりすることなく、光電変換素子が製造され得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が製造され得る。 In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the second surface of the semiconductor substrate is covered with the tunnel dielectric layer before the first amorphous semiconductor layer is formed. Therefore, after the tunnel dielectric layer and the first amorphous semiconductor layer are formed on the second surface of the semiconductor substrate, the photoelectric conversion element can be manufactured without exposing the second surface of the semiconductor substrate. . The photoelectric conversion element can be manufactured without a contaminant adhering to the second surface of the semiconductor substrate and without causing the second surface of the semiconductor substrate to be roughened by etching the amorphous semiconductor layer. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
 (21)ここで開示された実施の形態の光電変換素子の製造方法において、第1の非晶質半導体領域は、第1の非晶質半導体層の全厚さにわたって存在してもよい。第1の非晶質半導体領域と半導体基板との距離が減少し得る。半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアのうち、第1の非晶質半導体領域が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域によってより高い効率で収集され得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 (21) In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the first amorphous semiconductor region may exist over the entire thickness of the first amorphous semiconductor layer. The distance between the first amorphous semiconductor region and the semiconductor substrate can be reduced. Of the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate, the carrier corresponding to the second conductivity type of the first amorphous semiconductor region is the first amorphous. Higher efficiency can be collected by the quality semiconductor region. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
 (22)ここで開示された実施の形態の光電変換素子の製造方法において、第1の非晶質半導体領域における第1の不純物の濃度は、第1の非晶質半導体領域と第1の非晶質半導体層とが交互に配列される方向において一定であってもよい。そのため、半導体基板の第2の表面上に第1の非晶質半導体層が形成された後、半導体基板の第2の表面を露出させることなく、光電変換素子が製造され得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が製造され得る。 (22) In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the concentration of the first impurity in the first amorphous semiconductor region is different from that in the first amorphous semiconductor region. It may be constant in the direction in which the crystalline semiconductor layers are alternately arranged. Therefore, after the first amorphous semiconductor layer is formed on the second surface of the semiconductor substrate, the photoelectric conversion element can be manufactured without exposing the second surface of the semiconductor substrate. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
 (23)ここで開示された実施の形態の光電変換素子の製造方法において、第1の非晶質半導体領域における第1の不純物の濃度は、第1の非晶質半導体領域と第1の非晶質半導体層とが交互に配列される方向において一定であってもよい。そのため、半導体基板の第2の表面上にトンネル誘電体層及び第1の非晶質半導体層が形成された後、半導体基板の第2の表面を露出させることなく、光電変換素子が製造され得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が製造され得る。 (23) In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the concentration of the first impurity in the first amorphous semiconductor region is different from that in the first amorphous semiconductor region. It may be constant in the direction in which the crystalline semiconductor layers are alternately arranged. Therefore, after the tunnel dielectric layer and the first amorphous semiconductor layer are formed on the second surface of the semiconductor substrate, the photoelectric conversion element can be manufactured without exposing the second surface of the semiconductor substrate. . According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
 (24)ここで開示された実施の形態の光電変換素子の製造方法において、半導体基板の第2の表面上に第1の非晶質半導体層を形成することは、半導体基板の第2の表面に直接接する第1の非晶質半導体層を形成することを含んでもよい。第1の非晶質半導体層は半導体基板の第2の表面に直接接しているので、第1の非晶質半導体層と半導体基板との距離及び第1の非晶質半導体層内に設けられる第1の非晶質半導体領域と半導体基板との距離が減少し得る。半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアのうち、第1の非晶質半導体層が有する第1の導電型に対応するキャリアが、第1の非晶質半導体層によってより高い効率で収集され得る。半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアのうち、第1の非晶質半導体領域が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域によってより高い効率で収集され得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 (24) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, forming the first amorphous semiconductor layer on the second surface of the semiconductor substrate is the second surface of the semiconductor substrate. Forming a first amorphous semiconductor layer in direct contact with the first amorphous semiconductor layer. Since the first amorphous semiconductor layer is in direct contact with the second surface of the semiconductor substrate, the distance between the first amorphous semiconductor layer and the semiconductor substrate and the first amorphous semiconductor layer are provided in the first amorphous semiconductor layer. The distance between the first amorphous semiconductor region and the semiconductor substrate can be reduced. Of the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate, the carrier corresponding to the first conductivity type of the first amorphous semiconductor layer is the first amorphous. It can be collected with higher efficiency by the quality semiconductor layer. Of the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate, the carrier corresponding to the second conductivity type of the first amorphous semiconductor region is the first amorphous. Higher efficiency can be collected by the quality semiconductor region. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
 (25)ここで開示された実施の形態の光電変換素子の製造方法において、トンネル誘電体層上に第1の非晶質半導体層を形成することは、トンネル誘電体層に直接接する第1の非晶質半導体層を形成することを含んでもよい。第1の非晶質半導体層はトンネル誘電体層に直接接しているので、第1の非晶質半導体層と半導体基板との距離及び第1の非晶質半導体層内に設けられる第1の非晶質半導体領域と半導体基板との距離が減少し得る。半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアのうち、第1の非晶質半導体層が有する第1の導電型に対応するキャリアが、第1の非晶質半導体層によってより高い効率で収集され得る。半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアのうち、第1の非晶質半導体領域が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域によってより高い効率で収集され得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 (25) In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, forming the first amorphous semiconductor layer on the tunnel dielectric layer includes the step of directly contacting the tunnel dielectric layer. It may also include forming an amorphous semiconductor layer. Since the first amorphous semiconductor layer is in direct contact with the tunnel dielectric layer, the distance between the first amorphous semiconductor layer and the semiconductor substrate and the first amorphous semiconductor layer provided in the first amorphous semiconductor layer The distance between the amorphous semiconductor region and the semiconductor substrate can be reduced. Of the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate, the carrier corresponding to the first conductivity type of the first amorphous semiconductor layer is the first amorphous. It can be collected with higher efficiency by the quality semiconductor layer. Of the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate, the carrier corresponding to the second conductivity type of the first amorphous semiconductor region is the first amorphous. Higher efficiency can be collected by the quality semiconductor region. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
 ここで開示された実施の形態の光電変換素子の製造方法は、半導体基板の第2の表面上にトンネル誘電体層を形成することと、トンネル誘電体層に直接接する第1の非晶質半導体層を形成することとを備えている。ここで開示された実施の形態の光電変換素子の製造方法では、第1の非晶質半導体層が形成される前に、半導体基板の第2の表面はトンネル誘電体層によって覆われている。ここで開示された実施の形態の光電変換素子の製造方法によれば、第1の導電型を有する第1の不純物を含む第1の非晶質半導体層が形成される際に半導体基板に第1の不純物がドーピングされることを、トンネル誘電体層は確実に防ぐことができる。第1の非晶質半導体層の一部に第2の導電型を有する第2の不純物をドーピングして第1の非晶質半導体領域が形成される際に半導体基板に第2の不純物がドーピングされることを、トンネル誘電体層は確実に防ぐことができる。ここで開示された実施の形態の光電変換素子の製造方法によれば、第1の非晶質半導体層中の第1の不純物と第1の非晶質半導体領域中の第2の不純物とが半導体基板にドーピングされることが確実に防がれ得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、トンネル誘電体層を介した半導体基板と第1の非晶質半導体層との間のヘテロ接合構造と、トンネル誘電体層を介した半導体基板と第1の非晶質半導体領域との間のヘテロ接合構造とが確実に保たれ得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が製造され得る。 According to the method of manufacturing a photoelectric conversion element of the embodiment disclosed herein, a tunnel dielectric layer is formed on a second surface of a semiconductor substrate, and a first amorphous semiconductor that is in direct contact with the tunnel dielectric layer Forming a layer. In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the second surface of the semiconductor substrate is covered with the tunnel dielectric layer before the first amorphous semiconductor layer is formed. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, the first amorphous semiconductor layer containing the first impurity having the first conductivity type is formed on the semiconductor substrate when the first amorphous semiconductor layer is formed. The tunnel dielectric layer can be reliably prevented from being doped with one impurity. The semiconductor substrate is doped with the second impurity when the first amorphous semiconductor region is formed by doping a part of the first amorphous semiconductor layer with the second impurity having the second conductivity type. The tunnel dielectric layer can be reliably prevented. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, the first impurity in the first amorphous semiconductor layer and the second impurity in the first amorphous semiconductor region are It can be reliably prevented that the semiconductor substrate is doped. According to the method of manufacturing the photoelectric conversion element of the embodiment disclosed herein, the heterojunction structure between the semiconductor substrate and the first amorphous semiconductor layer via the tunnel dielectric layer, and the tunnel dielectric layer Thus, the heterojunction structure between the semiconductor substrate and the first amorphous semiconductor region can be reliably maintained. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
 (26)ここで開示された実施の形態の光電変換素子の製造方法は、半導体基板の第2の表面上に第1の非晶質半導体層を形成する前に、半導体基板の第2の表面上に、i型を有する第2の非晶質半導体層を形成することをさらに備えてもよい。i型を有する第2の非晶質半導体層は、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアが半導体基板の第2の表面において再結合することを抑制することができる。ここで開示された実施の形態の光電変換素子の製造方法によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上された光電変換素子が製造され得る。 (26) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the second surface of the semiconductor substrate is formed before forming the first amorphous semiconductor layer on the second surface of the semiconductor substrate. A second amorphous semiconductor layer having i-type may be further formed thereon. The second amorphous semiconductor layer having i-type suppresses recombination of carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate on the second surface of the semiconductor substrate. can do. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved passivation characteristics and efficiency of converting light energy into electric energy can be manufactured.
 (27)ここで開示された実施の形態の光電変換素子の製造方法は、トンネル誘電体層上に第1の非晶質半導体層を形成する前に、トンネル誘電体層上に、i型を有する第2の非晶質半導体層を形成することをさらに備えてもよい。i型を有する第2の非晶質半導体層は、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアが半導体基板の第2の表面において再結合することを抑制することができる。ここで開示された実施の形態の光電変換素子の製造方法によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上された光電変換素子が製造され得る。 (27) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, before forming the first amorphous semiconductor layer on the tunnel dielectric layer, the i-type is formed on the tunnel dielectric layer. It may further include forming a second amorphous semiconductor layer. The second amorphous semiconductor layer having i-type suppresses recombination of carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate on the second surface of the semiconductor substrate. can do. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved passivation characteristics and efficiency of converting light energy into electric energy can be manufactured.
 (28)ここで開示された実施の形態の光電変換素子の製造方法において、第1の非晶質半導体層の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層の一部に第2の不純物をイオン注入することを含んでもよい。ここで開示された実施の形態の光電変換素子の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 (28) In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, doping the second impurity into a part of the first amorphous semiconductor layer may be the first amorphous semiconductor layer. A second impurity may be ion-implanted into a part of the first impurity. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 (29)ここで開示された実施の形態の光電変換素子の製造方法において、第1の非晶質半導体層の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層上に第2の不純物を含むドーパント含有膜を形成することと、ドーパント含有膜に含まれる第2の不純物を第1の非晶質半導体層の一部に移行させることとを含んでもよい。ここで開示された実施の形態の光電変換素子の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 (29) In the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, doping the second impurity into a part of the first amorphous semiconductor layer may be the first amorphous semiconductor layer. Forming a dopant-containing film containing a second impurity thereon and transferring the second impurity contained in the dopant-containing film to a part of the first amorphous semiconductor layer may be included. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 (30)ここで開示された実施の形態の光電変換素子の製造方法において、第1の非晶質半導体層上に第2の不純物を含むドーパント含有膜を形成することは、第1の非晶質半導体層の一部上に第2の不純物を含むドーピングペーストを施すことであってもよい。ドーパント含有膜に含まれる第2の不純物を第1の非晶質半導体層の一部に移行させることは、ドーピングペーストを熱処理することを含んでもよい。すなわち、ここで開示された実施の形態の光電変換素子の製造方法では、第1の非晶質半導体層の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層の一部上に第2の不純物を含むドーピングペーストを施すことと、ドーピングペーストを熱処理することとを含んでもよい。 (30) In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, forming the dopant-containing film containing the second impurity on the first amorphous semiconductor layer is the first amorphous The doping paste containing the second impurity may be applied on a part of the crystalline semiconductor layer. Transferring the second impurity contained in the dopant-containing film to a part of the first amorphous semiconductor layer may include heat-treating the doping paste. That is, in the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, doping a second impurity into a part of the first amorphous semiconductor layer Applying a doping paste containing a second impurity on a part and heat-treating the doping paste may be included.
 ドーパント含有膜としてドーピングペーストを用いることによって、高いパターン精度で、第1の非晶質半導体層内に第1の非晶質半導体領域が形成され得る。ドーパント含有膜としてドーピングペーストを用いることによって、インクジェット、スクリーン印刷などによって第1の非晶質半導体層上にドーパント含有膜が形成され得る。そのため、ここで開示された実施の形態の光電変換素子の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が安価かつ簡単な工程で製造され得る。 By using a doping paste as the dopant-containing film, the first amorphous semiconductor region can be formed in the first amorphous semiconductor layer with high pattern accuracy. By using a doping paste as the dopant-containing film, the dopant-containing film can be formed on the first amorphous semiconductor layer by inkjet, screen printing, or the like. Therefore, according to the photoelectric conversion element manufacturing method of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured at a low cost and with a simple process.
 (31)ここで開示された実施の形態の光電変換素子の製造方法において、ドーパント含有膜に含まれる第2の不純物を第1の非晶質半導体層の一部に移行させることは、ドーパント含有膜の一部にレーザ光を照射することを含んでもよい。すなわち、レーザドーピング法によって、第1の非晶質半導体層の一部に第2の不純物がドーピングされてもよい。レーザドーピング方法は、加熱炉を使用してドーパントを拡散する方法よりも、短時間でドーパントを拡散させることができる。そのため、ここで開示された実施の形態の光電変換素子の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が安価かつ簡単な工程で製造され得る。 (31) In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, transferring the second impurity contained in the dopant-containing film to a part of the first amorphous semiconductor layer includes dopant-containing. Irradiation of a part of the film with laser light may be included. That is, the second impurity may be doped into part of the first amorphous semiconductor layer by a laser doping method. The laser doping method can diffuse the dopant in a shorter time than the method of diffusing the dopant using a heating furnace. Therefore, according to the photoelectric conversion element manufacturing method of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured at a low cost and with a simple process.
 (32)ここで開示された実施の形態の光電変換素子の製造方法は、第2の非晶質半導体層の一部に第2の不純物をドーピングして、第2の非晶質半導体層内に第2の非晶質半導体領域を形成することをさらに備えてもよい。第2の非晶質半導体領域は第2の不純物を含んでもよい。第2の非晶質半導体領域は第1の非晶質半導体領域に接してもよい。ここで開示された実施の形態の光電変換素子の製造方法によれば、第1の非晶質半導体領域及び第2の非晶質半導体領域からなる第2の導電型を有する非晶質半導体領域と半導体基板との距離が減少し得る。半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアのうち、第1の非晶質半導体領域及び第2の非晶質半導体領域が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域及び第2の非晶質半導体領域によってより高い効率で収集され得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 (32) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, a second impurity is doped into a part of the second amorphous semiconductor layer, so that the inside of the second amorphous semiconductor layer The method may further comprise forming a second amorphous semiconductor region. The second amorphous semiconductor region may include a second impurity. The second amorphous semiconductor region may be in contact with the first amorphous semiconductor region. According to the method of manufacturing a photoelectric conversion element of the embodiment disclosed herein, the amorphous semiconductor region having the second conductivity type, which includes the first amorphous semiconductor region and the second amorphous semiconductor region. The distance between the semiconductor substrate and the semiconductor substrate can be reduced. Corresponding to the second conductivity type of the first amorphous semiconductor region and the second amorphous semiconductor region among the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate Carriers to be collected can be collected with higher efficiency by the first amorphous semiconductor region and the second amorphous semiconductor region. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
 (33)ここで開示された実施の形態の光電変換素子の製造方法は、第2の非晶質半導体層の一部に第2の不純物をドーピングして、第2の非晶質半導体層内に第2の非晶質半導体領域を形成することをさらに備えてもよい。第2の非晶質半導体領域は第2の不純物を含んでもよい。第2の非晶質半導体領域は第1の非晶質半導体領域に接してもよい。ここで開示された実施の形態の光電変換素子の製造方法によれば、第1の非晶質半導体領域及び第2の非晶質半導体領域からなる第2の導電型を有する非晶質半導体領域と半導体基板との距離が減少し得る。半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアのうち、第1の非晶質半導体領域及び第2の非晶質半導体領域が有する第2の導電型に対応するキャリアが、第1の非晶質半導体領域及び第2の非晶質半導体領域によってより高い効率で収集され得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 (33) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, a second impurity is doped into a part of the second amorphous semiconductor layer, and the inside of the second amorphous semiconductor layer The method may further comprise forming a second amorphous semiconductor region. The second amorphous semiconductor region may include a second impurity. The second amorphous semiconductor region may be in contact with the first amorphous semiconductor region. According to the method of manufacturing a photoelectric conversion element of the embodiment disclosed herein, the amorphous semiconductor region having the second conductivity type, which includes the first amorphous semiconductor region and the second amorphous semiconductor region. The distance between the semiconductor substrate and the semiconductor substrate can be reduced. Corresponding to the second conductivity type of the first amorphous semiconductor region and the second amorphous semiconductor region among the carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate Carriers to be collected can be collected with higher efficiency by the first amorphous semiconductor region and the second amorphous semiconductor region. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
 ここで開示された実施の形態の光電変換素子の製造方法は、半導体基板の第2の表面上にトンネル誘電体層を形成することと、トンネル誘電体層上に第2の非晶質半導体層を形成することと、第2の非晶質半導体層の一部に第2の不純物をドーピングして、第2の非晶質半導体層内に第2の非晶質半導体領域を形成することとを備えてもよい。ここで開示された実施の形態の光電変換素子の製造方法では、第2の非晶質半導体層が形成される前に、半導体基板の第2の表面はトンネル誘電体層によって覆われている。第2の非晶質半導体層の一部に第2の導電型を有する第2の不純物をドーピングして第2の非晶質半導体領域が形成される際に半導体基板に第2の不純物がドーピングされることを、トンネル誘電体層は確実に防ぐことができる。ここで開示された実施の形態の光電変換素子の製造方法によれば、第2の非晶質半導体領域中の第2の不純物が半導体基板にドーピングされることが確実に防がれ得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、第2の非晶質半導体層及びトンネル誘電体層を介した半導体基板と第1の非晶質半導体層との間のヘテロ接合構造と、トンネル誘電体層を介した半導体基板と第1の非晶質半導体領域及び第2の非晶質半導体領域との間のヘテロ接合構造とが確実に保たれ得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が製造され得る。 According to the method of manufacturing a photoelectric conversion element of the embodiment disclosed herein, a tunnel dielectric layer is formed on a second surface of a semiconductor substrate, and a second amorphous semiconductor layer is formed on the tunnel dielectric layer. Forming a second amorphous semiconductor region in the second amorphous semiconductor layer by doping a part of the second amorphous semiconductor layer with a second impurity. May be provided. In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the second surface of the semiconductor substrate is covered with the tunnel dielectric layer before the second amorphous semiconductor layer is formed. When the second amorphous semiconductor region is formed by doping the second amorphous semiconductor layer with a second impurity having the second conductivity type in part of the second amorphous semiconductor layer, the semiconductor substrate is doped with the second impurity. The tunnel dielectric layer can be reliably prevented. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, the semiconductor substrate can be reliably prevented from being doped with the second impurity in the second amorphous semiconductor region. According to the method for manufacturing the photoelectric conversion element of the embodiment disclosed herein, the second amorphous semiconductor layer and the tunnel dielectric layer between the semiconductor substrate and the first amorphous semiconductor layer are interposed. The heterojunction structure and the heterojunction structure between the semiconductor substrate and the first amorphous semiconductor region and the second amorphous semiconductor region via the tunnel dielectric layer can be reliably maintained. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured.
 (34)ここで開示された実施の形態の光電変換素子の製造方法において、第1の非晶質半導体層の一部及び第2の非晶質半導体層の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層の一部及び第2の非晶質半導体層の一部に第2の不純物をイオン注入することを含んでもよい。第2の不純物のイオンビームを照射するという一つの工程で、第1の非晶質半導体層の一部及び第2の非晶質半導体層の一部に第2の不純物がドーピングされ得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 (34) In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, a part of the first amorphous semiconductor layer and a part of the second amorphous semiconductor layer are doped with the second impurity. Doing may include implanting a second impurity into part of the first amorphous semiconductor layer and part of the second amorphous semiconductor layer. In one step of irradiating the ion beam of the second impurity, a part of the first amorphous semiconductor layer and a part of the second amorphous semiconductor layer may be doped with the second impurity. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 (35)ここで開示された実施の形態の光電変換素子の製造方法において、第1の非晶質半導体層の一部及び第2の非晶質半導体層の一部に第2の不純物をドーピングすることは、第1の非晶質半導体層上に第2の不純物を含むドーパント含有膜を形成することと、ドーパント含有膜に含まれる第2の不純物を第1の非晶質半導体層の一部及び第2の非晶質半導体層の一部に移行させることとを含んでもよい。ドーパント含有膜に含まれる第2の不純物を第1の非晶質半導体層の一部及び第2の非晶質半導体層の一部に移行させるという一つの工程で、第1の非晶質半導体層の一部及び第2の非晶質半導体層の一部に第2の不純物がドーピングされ得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 (35) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, a second impurity is doped into a part of the first amorphous semiconductor layer and a part of the second amorphous semiconductor layer. Forming a dopant-containing film containing a second impurity on the first amorphous semiconductor layer; and adding the second impurity contained in the dopant-containing film to one of the first amorphous semiconductor layers. And transition to part of the second amorphous semiconductor layer. The first amorphous semiconductor is formed in one step of transferring the second impurity contained in the dopant-containing film to a part of the first amorphous semiconductor layer and a part of the second amorphous semiconductor layer. A part of the layer and a part of the second amorphous semiconductor layer may be doped with the second impurity. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 (36)ここで開示された実施の形態の光電変換素子の製造方法において、第1の非晶質半導体層上に第2の不純物を含むドーパント含有膜を形成することは、第1の非晶質半導体層の一部上に第2の不純物を含むドーピングペーストを施すことであってもよい。ドーパント含有膜に含まれる第2の不純物を第1の非晶質半導体層の一部及び第2の非晶質半導体層の一部に移行させることは、ドーピングペーストを熱処理することを含んでもよい。ドーパント含有膜(ドーピングペースト)を熱処理するという一つの工程で、第1の非晶質半導体層の一部及び第2の非晶質半導体層の一部に第2の不純物がドーピングされ得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 (36) In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, forming the dopant-containing film containing the second impurity on the first amorphous semiconductor layer is the first amorphous The doping paste containing the second impurity may be applied on a part of the crystalline semiconductor layer. Transferring the second impurity contained in the dopant-containing film to part of the first amorphous semiconductor layer and part of the second amorphous semiconductor layer may include heat-treating the doping paste. . In one step of heat-treating the dopant-containing film (doping paste), the second impurity can be doped into a part of the first amorphous semiconductor layer and a part of the second amorphous semiconductor layer. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 (37)ここで開示された実施の形態の光電変換素子の製造方法において、ドーパント含有膜に含まれる第2の不純物を第1の非晶質半導体層の一部及び第2の非晶質半導体層の一部に移行させることは、ドーパント含有膜の一部にレーザ光を照射することを含んでもよい。ドーパント含有膜の一部にレーザ光を照射するという一つの工程で、第1の非晶質半導体層の一部及び第2の非晶質半導体層の一部に第2の不純物がドーピングされ得る。ここで開示された実施の形態の光電変換素子の製造方法によれば、向上された特性及び信頼性を有する光電変換素子が簡単な工程で製造され得る。 (37) In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the second impurity contained in the dopant-containing film may be a part of the first amorphous semiconductor layer and the second amorphous semiconductor. Transferring to a part of the layer may include irradiating a part of the dopant-containing film with laser light. In one step of irradiating a part of the dopant-containing film with laser light, a part of the first amorphous semiconductor layer and a part of the second amorphous semiconductor layer can be doped with the second impurity. . According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having improved characteristics and reliability can be manufactured by a simple process.
 (38)ここで開示された実施の形態の光電変換素子の製造方法において、半導体基板の第2の表面上にトンネル誘電体層を形成することは、半導体基板の第2の表面をオゾン水または過酸化水素水に浸漬することを含んでもよい。ここで開示された実施の形態の光電変換素子の製造方法によれば、半導体基板の第2の表面をオゾン水または過酸化水素水に浸漬するという簡単な工程によって、トンネル誘電体層を早く形成することができる。 (38) In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, forming the tunnel dielectric layer on the second surface of the semiconductor substrate may include forming the second surface of the semiconductor substrate with ozone water or It may include soaking in hydrogen peroxide solution. According to the method of manufacturing a photoelectric conversion element of the embodiment disclosed herein, the tunnel dielectric layer is quickly formed by a simple process of immersing the second surface of the semiconductor substrate in ozone water or hydrogen peroxide water. can do.
 (39)ここで開示された実施の形態の光電変換素子の製造方法において、半導体基板の第2の表面上にトンネル誘電体層を形成することは、半導体基板の第2の表面を熱酸化することを含んでもよい。ここで開示された実施の形態の光電変換素子の製造方法によれば、半導体基板の第2の表面を熱酸化するという簡単な工程によって、トンネル誘電体層が形成され得る。 (39) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, forming the tunnel dielectric layer on the second surface of the semiconductor substrate thermally oxidizes the second surface of the semiconductor substrate. You may include that. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, the tunnel dielectric layer can be formed by a simple process of thermally oxidizing the second surface of the semiconductor substrate.
 (40)ここで開示された実施の形態の光電変換素子の製造方法において、半導体基板の第2の表面上にトンネル誘電体層を形成することは、半導体基板の第2の表面上にトンネル誘電体層を堆積することを含んでもよい。ここで開示された実施の形態の光電変換素子の製造方法によれば、半導体基板の第2の表面上にトンネル誘電体層を堆積するという簡単な工程によって、トンネル誘電体層が形成され得る。 (40) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, forming the tunnel dielectric layer on the second surface of the semiconductor substrate includes forming a tunnel dielectric on the second surface of the semiconductor substrate. It may include depositing a body layer. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, the tunnel dielectric layer can be formed by a simple process of depositing the tunnel dielectric layer on the second surface of the semiconductor substrate.
 (41)ここで開示された実施の形態の光電変換素子の製造方法において、トンネル誘電体層は0.2nm以上5.0nm以下の厚さを有してもよい。0.2nm以上の厚さを有するトンネル誘電体層は、光電変換素子のパッシベーション特性をさらに向上させることができる。5.0nm以下の厚さを有するトンネル誘電体層は、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアを、第1の非晶質半導体層及び第1の非晶質半導体領域にさらに効率的にトンネルさせることができる。ここで開示された実施の形態の光電変換素子の製造方法によれば、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアをさらに効率的に収集することができる光電変換素子が製造され得る。 (41) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the tunnel dielectric layer may have a thickness of 0.2 nm to 5.0 nm. The tunnel dielectric layer having a thickness of 0.2 nm or more can further improve the passivation characteristics of the photoelectric conversion element. The tunnel dielectric layer having a thickness of 5.0 nm or less allows carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate to be converted into the first amorphous semiconductor layer and the first amorphous semiconductor layer. Tunneling to the amorphous semiconductor region can be performed more efficiently. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate can be collected more efficiently. A photoelectric conversion element can be manufactured.
 (42)ここで開示された実施の形態の光電変換素子の製造方法は、半導体基板の第2の表面上に、第1の非晶質半導体層と電気的に接続される第1の電極を形成することと、半導体基板の第2の表面上に、第1の非晶質半導体領域と電気的に接続される第2の電極を形成することとをさらに備えてもよい。ここで開示された実施の形態の光電変換素子の製造方法によれば、第1の電極及び第2の電極が光の入射面である半導体基板の第1の表面側に設けられていない光電変換素子が製造され得る。光電変換素子に入射する光は第1の電極及び第2の電極によって遮られない。ここで開示された実施の形態の光電変換素子の製造方法によれば、高い短絡電流JSCを有するとともに、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 (42) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the first electrode electrically connected to the first amorphous semiconductor layer is provided on the second surface of the semiconductor substrate. It may further include forming and forming a second electrode electrically connected to the first amorphous semiconductor region on the second surface of the semiconductor substrate. According to the method of manufacturing a photoelectric conversion element of the embodiment disclosed herein, the first electrode and the second electrode are not provided on the first surface side of the semiconductor substrate which is the light incident surface. An element can be manufactured. Light incident on the photoelectric conversion element is not blocked by the first electrode and the second electrode. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element having a high short-circuit current JSC and improved efficiency in converting light energy into electric energy can be manufactured.
 (43)ここで開示された実施の形態の光電変換素子の製造方法は、半導体基板の第1の表面上に誘電体層を形成することをさらに備えてもよい。誘電体層が反射防止膜として機能するとき、誘電体層は、より多くの光を光電変換素子内に入射させることができる。ここで開示された実施の形態の光電変換素子の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。誘電体層がパッシベーション膜として機能するとき、誘電体層は、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアが半導体基板の第1の表面において再結合することを抑制することができる。ここで開示された実施の形態の光電変換素子の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 (43) The method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein may further include forming a dielectric layer on the first surface of the semiconductor substrate. When the dielectric layer functions as an antireflection film, the dielectric layer can allow more light to enter the photoelectric conversion element. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured. When the dielectric layer functions as a passivation film, the dielectric layer is such that carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate are recombined on the first surface of the semiconductor substrate. Can be suppressed. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
 (44)ここで開示された実施の形態の光電変換素子の製造方法は、半導体基板の第1の表面上に、i型を有する第3の非晶質半導体層を形成することをさらに備えてもよい。i型を有する第3の非晶質半導体層は、半導体基板の第1の表面側から入射する光によって半導体基板内に生成されたキャリアが半導体基板の第1の表面において再結合することを抑制することができる。ここで開示された実施の形態の光電変換素子の製造方法によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上された光電変換素子が製造され得る。 (44) The method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein further includes forming a third amorphous semiconductor layer having i-type on the first surface of the semiconductor substrate. Also good. The third amorphous semiconductor layer having i-type suppresses recombination of carriers generated in the semiconductor substrate by light incident from the first surface side of the semiconductor substrate on the first surface of the semiconductor substrate. can do. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved passivation characteristics and efficiency of converting light energy into electric energy can be manufactured.
 (45)ここで開示された実施の形態の光電変換素子の製造方法は、半導体基板の第1の表面上に、半導体基板と同じ導電型を有する第4の非晶質半導体層を形成することをさらに備えてもよい。半導体基板と同じ導電型を有する第4の非晶質半導体層は、光電変換素子に光が入射することによって半導体基板内に発生したキャリアのうち半導体基板の第1の表面に近づくキャリアを、半導体基板の内部に押し戻すことができる。第4の非晶質半導体層は、このキャリアが半導体基板の第1の表面において再結合することを抑制することができる。ここで開示された実施の形態の光電変換素子の製造方法によれば、パッシベーション特性と光エネルギーを電気エネルギーに変換する効率とが向上された光電変換素子が製造され得る。 (45) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, a fourth amorphous semiconductor layer having the same conductivity type as the semiconductor substrate is formed on the first surface of the semiconductor substrate. May be further provided. The fourth amorphous semiconductor layer having the same conductivity type as that of the semiconductor substrate has a carrier that is close to the first surface of the semiconductor substrate among carriers generated in the semiconductor substrate when light is incident on the photoelectric conversion element. It can be pushed back into the substrate. The fourth amorphous semiconductor layer can suppress recombination of the carriers on the first surface of the semiconductor substrate. According to the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved passivation characteristics and efficiency of converting light energy into electric energy can be manufactured.
 (46)ここで開示された実施の形態の光電変換素子の製造方法は、半導体基板の第1の表面に、凹凸構造を形成することをさらに備えてもよい。光の入射面である半導体基板の第1の表面に凹凸構造を形成することによって、より多くの光が光電変換素子内に入射され得る。ここで開示された実施の形態の光電変換素子の光電変換素子の製造方法によれば、光エネルギーを電気エネルギーに変換する効率が向上された光電変換素子が製造され得る。 (46) The method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein may further include forming a concavo-convex structure on the first surface of the semiconductor substrate. By forming a concavo-convex structure on the first surface of the semiconductor substrate, which is the light incident surface, more light can be incident on the photoelectric conversion element. According to the photoelectric conversion element manufacturing method of the photoelectric conversion element of the embodiment disclosed herein, a photoelectric conversion element with improved efficiency of converting light energy into electric energy can be manufactured.
 今回開示された実施の形態はすべての点で例示であって制限的なものではないと考えられるべきである。本発明の範囲は上記した説明ではなく請求の範囲によって示され、請求の範囲と均等の意味および範囲内でのすべての変更が含まれることが意図される。 The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.
 1,4,7 光電変換素子、11 半導体基板、11a 第1の表面、11b 第2の表面、12 第3の非晶質半導体層、13 第4の非晶質半導体層、14 誘電体層、15 第2の非晶質半導体層、16 第1の非晶質半導体領域、17 第1の非晶質半導体層、18 第2の電極、19 第1の電極、21 イオンビーム、22 マスク、26 ドーパント含有膜、27 レーザ光、46 第2の非晶質半導体領域。 1, 4, 7 photoelectric conversion element, 11 semiconductor substrate, 11a first surface, 11b second surface, 12 third amorphous semiconductor layer, 13th fourth amorphous semiconductor layer, 14 dielectric layer, 15 second amorphous semiconductor layer, 16 first amorphous semiconductor region, 17 first amorphous semiconductor layer, 18 second electrode, 19 first electrode, 21 ion beam, 22 mask, 26 Dopant-containing film, 27 laser light, 46 second amorphous semiconductor region.

Claims (13)

  1.  第1の表面と前記第1の表面と反対側の第2の表面とを有する半導体基板と、
     前記第2の表面上に設けられるとともに、第1の導電型を有する第1の非晶質半導体層と、
     前記第2の表面上に設けられるとともに、前記第1の導電型と異なる第2の導電型を有する第1の非晶質半導体領域とを備え、
     前記第1の非晶質半導体層は前記第1の導電型を有する第1の不純物を含み、
     前記第1の非晶質半導体領域は前記第1の不純物と前記第2の導電型を有する第2の不純物とを含み、
     前記第1の非晶質半導体層及び前記第1の非晶質半導体領域は、連続して延在する1つの層を構成する、光電変換素子。
    A semiconductor substrate having a first surface and a second surface opposite to the first surface;
    A first amorphous semiconductor layer provided on the second surface and having a first conductivity type;
    A first amorphous semiconductor region provided on the second surface and having a second conductivity type different from the first conductivity type;
    The first amorphous semiconductor layer includes a first impurity having the first conductivity type;
    The first amorphous semiconductor region includes the first impurity and a second impurity having the second conductivity type;
    The photoelectric conversion element in which the first amorphous semiconductor layer and the first amorphous semiconductor region constitute one layer extending continuously.
  2.  前記第1の非晶質半導体領域は、前記第1の非晶質半導体層の全厚さにわたって存在する、請求項1に記載の光電変換素子。 The photoelectric conversion element according to claim 1, wherein the first amorphous semiconductor region exists over the entire thickness of the first amorphous semiconductor layer.
  3.  前記第1の非晶質半導体層は、前記半導体基板の前記第2の表面に直接接する、請求項1または請求項2に記載の光電変換素子。 The photoelectric conversion element according to claim 1, wherein the first amorphous semiconductor layer is in direct contact with the second surface of the semiconductor substrate.
  4.  前記第1の非晶質半導体層と前記半導体基板の前記第2の表面との間及び前記第1の非晶質半導体領域と前記半導体基板の前記第2の表面との間に、i型を有する第2の非晶質半導体層をさらに備える、請求項1または請求項2に記載の光電変換素子。 An i-type is formed between the first amorphous semiconductor layer and the second surface of the semiconductor substrate and between the first amorphous semiconductor region and the second surface of the semiconductor substrate. The photoelectric conversion element of Claim 1 or Claim 2 further provided with the 2nd amorphous semiconductor layer which has.
  5.  第1の表面と前記第1の表面と反対側の第2の表面とを有する半導体基板と、
     前記第2の表面上に設けられたトンネル誘電体層と、
     前記トンネル誘電体層上に設けられるとともに、第1の導電型を有する第1の非晶質半導体層と、
     前記トンネル誘電体層上に設けられるとともに、前記第1の導電型と異なる第2の導電型を有する第1の非晶質半導体領域とを備え、
     前記第1の非晶質半導体層は前記第1の導電型を有する第1の不純物を含み、
     前記第1の非晶質半導体領域は前記第1の不純物と前記第2の導電型を有する第2の不純物とを含み、
     前記第1の非晶質半導体層及び前記第1の非晶質半導体領域は、連続して延在する1つの層を構成する、光電変換素子。
    A semiconductor substrate having a first surface and a second surface opposite to the first surface;
    A tunnel dielectric layer provided on the second surface;
    A first amorphous semiconductor layer provided on the tunnel dielectric layer and having a first conductivity type;
    A first amorphous semiconductor region provided on the tunnel dielectric layer and having a second conductivity type different from the first conductivity type;
    The first amorphous semiconductor layer includes a first impurity having the first conductivity type;
    The first amorphous semiconductor region includes the first impurity and a second impurity having the second conductivity type;
    The photoelectric conversion element in which the first amorphous semiconductor layer and the first amorphous semiconductor region constitute one layer extending continuously.
  6.  前記第1の非晶質半導体領域は、前記第1の非晶質半導体層の全厚さにわたって存在する、請求項5に記載の光電変換素子。 The photoelectric conversion element according to claim 5, wherein the first amorphous semiconductor region exists over the entire thickness of the first amorphous semiconductor layer.
  7.  前記第1の非晶質半導体層は、前記トンネル誘電体層に直接接する、請求項5または請求項6に記載の光電変換素子。 The photoelectric conversion element according to claim 5 or 6, wherein the first amorphous semiconductor layer is in direct contact with the tunnel dielectric layer.
  8.  前記第1の非晶質半導体層と前記トンネル誘電体層との間及び前記第1の非晶質半導体領域と前記トンネル誘電体層との間に、i型を有する第2の非晶質半導体層をさらに備える、請求項5または請求項6に記載の光電変換素子。 A second amorphous semiconductor having i-type between the first amorphous semiconductor layer and the tunnel dielectric layer and between the first amorphous semiconductor region and the tunnel dielectric layer. The photoelectric conversion element according to claim 5, further comprising a layer.
  9.  前記第2の非晶質半導体層内に設けられるとともに、前記第2の導電型を有する第2の非晶質半導体領域をさらに備え、
     前記第2の非晶質半導体領域は前記第2の不純物を含み、
     前記第2の非晶質半導体領域は前記第1の非晶質半導体領域に接する、請求項4または請求項8に記載の光電変換素子。
    A second amorphous semiconductor region provided in the second amorphous semiconductor layer and having the second conductivity type;
    The second amorphous semiconductor region includes the second impurity;
    The photoelectric conversion element according to claim 4, wherein the second amorphous semiconductor region is in contact with the first amorphous semiconductor region.
  10.  前記半導体基板の前記第2の表面上に設けられるとともに、前記第1の非晶質半導体層と電気的に接続される第1の電極と、
     前記半導体基板の前記第2の表面上に設けられるとともに、前記第1の非晶質半導体領域と電気的に接続される第2の電極とをさらに備える、請求項1から請求項9のいずれか1項に記載の光電変換素子。
    A first electrode provided on the second surface of the semiconductor substrate and electrically connected to the first amorphous semiconductor layer;
    10. The semiconductor device according to claim 1, further comprising a second electrode provided on the second surface of the semiconductor substrate and electrically connected to the first amorphous semiconductor region. Item 1. The photoelectric conversion element according to item 1.
  11.  前記半導体基板の前記第1の表面上に誘電体層をさらに備える、請求項1から請求項10のいずれか1項に記載の光電変換素子。 The photoelectric conversion element according to any one of claims 1 to 10, further comprising a dielectric layer on the first surface of the semiconductor substrate.
  12.  第1の表面と前記第1の表面と反対側の第2の表面とを有する半導体基板の前記第2の表面上に、第1の導電型を有する第1の非晶質半導体層を形成することを備え、前記第1の非晶質半導体層は前記第1の導電型を有する第1の不純物を含み、
     前記第1の非晶質半導体層内に第2の導電型を有する第1の非晶質半導体領域を形成することを備え、
     前記第1の非晶質半導体層内に前記第1の非晶質半導体領域を形成することは、前記第1の非晶質半導体層の一部に、前記第1の導電型と異なる前記第2の導電型を有する第2の不純物をドーピングすることを含む、光電変換素子の製造方法。
    A first amorphous semiconductor layer having a first conductivity type is formed on the second surface of a semiconductor substrate having a first surface and a second surface opposite to the first surface. The first amorphous semiconductor layer includes a first impurity having the first conductivity type;
    Forming a first amorphous semiconductor region having a second conductivity type in the first amorphous semiconductor layer,
    Forming the first amorphous semiconductor region in the first amorphous semiconductor layer may include forming the first amorphous semiconductor layer in a part of the first amorphous semiconductor layer different from the first conductivity type. A method for manufacturing a photoelectric conversion element, comprising doping a second impurity having a conductivity type of 2.
  13.  第1の表面と前記第1の表面と反対側の第2の表面とを有する半導体基板の前記第2の表面上にトンネル誘電体層を形成することと、
     前記トンネル誘電体層上に、第1の導電型を有する第1の非晶質半導体層を形成することとを備え、前記第1の非晶質半導体層は前記第1の導電型を有する第1の不純物を含み、
     前記第1の非晶質半導体層内に第2の導電型を有する第1の非晶質半導体領域を形成することを備え、
     前記第1の非晶質半導体層内に前記第1の非晶質半導体領域を形成することは、前記第1の非晶質半導体層の一部に、前記第1の導電型と異なる前記第2の導電型を有する第2の不純物をドーピングすることを含む、光電変換素子の製造方法。
    Forming a tunnel dielectric layer on the second surface of the semiconductor substrate having a first surface and a second surface opposite the first surface;
    Forming a first amorphous semiconductor layer having a first conductivity type on the tunnel dielectric layer, wherein the first amorphous semiconductor layer has a first conductivity type. 1 impurity,
    Forming a first amorphous semiconductor region having a second conductivity type in the first amorphous semiconductor layer,
    Forming the first amorphous semiconductor region in the first amorphous semiconductor layer may include forming the first amorphous semiconductor layer in a part of the first amorphous semiconductor layer different from the first conductivity type. A method for manufacturing a photoelectric conversion element, comprising doping a second impurity having a conductivity type of 2.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013219355A (en) * 2012-04-04 2013-10-24 Samsung Sdi Co Ltd Method for manufacturing photoelectric element
WO2015060437A1 (en) * 2013-10-25 2015-04-30 シャープ株式会社 Photoelectric conversion element, photoelectric conversion module, and solar photovoltaic power generation system
JP2015142139A (en) * 2014-01-29 2015-08-03 エルジー エレクトロニクス インコーポレイティド Solar cell and manufacturing method of the same
WO2015114922A1 (en) * 2014-01-31 2015-08-06 シャープ株式会社 Photoelectric conversion device and method for manufacturing photoelectric conversion device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013219355A (en) * 2012-04-04 2013-10-24 Samsung Sdi Co Ltd Method for manufacturing photoelectric element
WO2015060437A1 (en) * 2013-10-25 2015-04-30 シャープ株式会社 Photoelectric conversion element, photoelectric conversion module, and solar photovoltaic power generation system
JP2015142139A (en) * 2014-01-29 2015-08-03 エルジー エレクトロニクス インコーポレイティド Solar cell and manufacturing method of the same
WO2015114922A1 (en) * 2014-01-31 2015-08-06 シャープ株式会社 Photoelectric conversion device and method for manufacturing photoelectric conversion device

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