WO2017041310A1 - 像素结构、阵列基板及液晶显示面板 - Google Patents

像素结构、阵列基板及液晶显示面板 Download PDF

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WO2017041310A1
WO2017041310A1 PCT/CN2015/089506 CN2015089506W WO2017041310A1 WO 2017041310 A1 WO2017041310 A1 WO 2017041310A1 CN 2015089506 W CN2015089506 W CN 2015089506W WO 2017041310 A1 WO2017041310 A1 WO 2017041310A1
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Prior art keywords
pixel
sub
strip
data line
electrode
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English (en)
French (fr)
Inventor
王金杰
郭晋波
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US14/897,674 priority Critical patent/US20180157135A1/en
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134318—Electrodes characterised by their geometrical arrangement having a patterned common electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/40—Arrangements for improving the aperture ratio

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a pixel structure, and to an array substrate having the pixel structure and a liquid crystal display panel having the array substrate.
  • liquid crystal display panels have been widely used as display components in electronic products such as mobile phones, digital cameras, and PDAs.
  • the liquid crystal display panel has a pixel structure.
  • FIG. 1 is a schematic view showing the structure of a pixel structure (pixel electrode not shown) in the prior art.
  • FIG. 2 is a schematic view showing the structure after the pixel electrode is added on the basis of the pixel structure shown in FIG. 1.
  • the pixel structure of the prior art includes a pixel electrode 40, a scan line 10, two data lines 30, and three common electrodes 20.
  • a sub-pixel area surrounded by the scanning line 10 and the common electrode 20 is vertically disposed.
  • the scanning line 10 is parallel to the width direction of the sub-pixel region.
  • the two common electrodes are parallel to the length direction of the sub-pixel region, and the two common electrodes are respectively disposed on the left and right sides of the sub-pixel region.
  • the two data lines 30 are parallel to the length direction of the sub-pixel regions, and the two data lines 30 are respectively disposed adjacent to the left and right sides of the two common electrodes.
  • a defect of the pixel structure in the prior art is that a voltage difference between the adjacently disposed data line 30 and the common electrode forms an electric field, and the electric field causes a significant deflection of the liquid crystal molecules at the corresponding position, thereby causing the liquid crystal display panel to be at the pixel electrode 40.
  • Light leakage occurs on both sides.
  • it is common to cover the black matrix with the data line 30 and the common electrode disposed adjacent to each other to shield the light.
  • the use of the black matrix greatly reduces the aperture ratio of the liquid crystal display panel, thereby affecting the transmittance of the liquid crystal display panel.
  • greater backlight brightness is required to meet the brightness requirements of the entire panel.
  • the technical problem to be solved by the present invention is that the pixel structure of the prior art is used, the aperture ratio and the transmittance of the liquid crystal display panel are greatly reduced, and a larger backlight brightness is required to meet the brightness requirement of the entire panel.
  • the present invention provides a pixel structure, an array substrate, and a liquid crystal display panel.
  • a pixel structure including a scan line, a data line, a pixel electrode, and a common electrode;
  • the scan line and the common electrode enclose a sub-pixel region; a length direction of the sub-pixel region is parallel to the scan line, and a width direction of the sub-pixel region is parallel to the data line;
  • the data line passes through the sub-pixel region and overlaps the pixel electrode.
  • the common electrode includes a first strip-shaped common electrode and a second strip-shaped common electrode that are parallel to a width direction of the sub-pixel region, and the first strip-shaped common electrode and the second strip-shaped common electrode respectively Located outside the short side of the sub-pixel region, the first strip-shaped common electrode and the second strip-shaped common electrode and the scan line enclose the sub-pixel region;
  • the data line is located between the first strip-shaped common electrode and the second strip-shaped common electrode.
  • a distance between the data line and the first strip-shaped common electrode and the second strip-shaped common electrode is greater than a preset distance.
  • a distance between the data line and the first strip-shaped common electrode is equal to a distance between the data line and the second strip-shaped common electrode.
  • the common electrode further includes a third strip-shaped common electrode parallel to a length direction of the sub-pixel region, and two ends of the third strip-shaped common electrode are respectively associated with the first strip-shaped common electrode and The second strip of common electrodes is connected.
  • the third strip-shaped common electrode is located in the sub-pixel region.
  • the data line is located below the pixel electrode, and the pixel electrode is divided into a first sub-pixel electrode region and a second sub-pixel electrode region by a separation electrode thereof, the separation electrode and the pixel a center line of the electrode along the length direction coincides; the first sub-pixel electrode region and the second sub-pixel electrode region are respectively symmetrical with respect to the data line;
  • Each of the sub-pixel electrode regions is provided with a plurality of slits, and the plurality of slits divide the sub-pixel electrode region into a plurality of separators, and the plurality of slits are alternately arranged in sequence with the plurality of separators.
  • the separator on the first sub-pixel electrode region and the corresponding separator on the second sub-pixel electrode region are respectively disconnected above the data line, and the pixel electrode above the data line is along A strip-shaped opening is formed in the longitudinal direction of the data line to reduce an overlapping area of the data line and the pixel electrode above the data line.
  • an array substrate comprising a substrate substrate and the above pixel structure.
  • the pixel structure is disposed on the base substrate.
  • a liquid crystal display panel comprising: a color filter substrate, the above array a substrate and a liquid crystal layer disposed between the color filter substrate and the array substrate.
  • the color filter substrate is disposed opposite to the array substrate.
  • the present invention By applying the pixel structure of the present invention, since the sub-pixel region is horizontally disposed, and the data line penetrates the sub-pixel region in the vertical direction, the parasitic capacitance between the data line and the pixel electrode is effectively reduced, thereby improving vertical crosstalk (V-Crosstalk) )phenomenon.
  • V-Crosstalk vertical crosstalk
  • the present invention significantly increases the distance between the data line and the common electrodes on both sides by horizontally setting the sub-pixel region, so that the distance between the data line and the common electrode is greater than a preset distance, thereby ensuring the data line and the common electrode.
  • the electric field generated due to the voltage difference is insufficient to cause significant deflection of the liquid crystal molecules.
  • the design can effectively reduce or completely eliminate the area of the black matrix corresponding to the adjacent data lines and the common electrode, thereby improving the aperture ratio and the transmittance of the liquid crystal display panel, and optimizing the display effect.
  • FIG. 1 is a schematic structural view of a pixel structure (a pixel electrode not shown) in the prior art
  • FIG. 2 is a schematic structural view showing the addition of a pixel electrode on the basis of the pixel structure shown in FIG. 1;
  • FIG. 3 is a schematic structural view showing a pixel structure (a pixel electrode not shown) of the embodiment
  • FIG. 4 is a schematic structural view showing a structure in which a pixel electrode is added on the basis of the pixel structure shown in FIG. 3;
  • FIG. 5 is a schematic structural view showing the pixel electrode shown in FIG. 4;
  • FIG. 6 is a schematic view showing another structure after the pixel electrode is added on the basis of the pixel structure shown in FIG. 3;
  • Fig. 7 is a view showing the structure of the pixel electrode shown in Fig. 6.
  • an embodiment of the present invention provides a pixel structure capable of significantly increasing an aperture ratio and a transmittance of a liquid crystal display panel.
  • FIG. 3 is a schematic view showing the structure of a pixel structure (pixel electrode not shown) according to an embodiment of the present invention.
  • the pixel structure of this embodiment mainly includes an active element (not shown), two scanning lines 10, one data line 30, one pixel electrode 40, and three strip-shaped common electrodes 20.
  • the active device is preferably a thin film transistor, and the active device is electrically connected to the scan line 10, the data line 30, and the pixel electrode 40, respectively.
  • the three strip-shaped common electrodes 20 are a first strip-shaped common electrode 21, a second strip-shaped common electrode 22, and a third strip-shaped common electrode 23, respectively.
  • a region surrounded by two scanning lines 10 disposed laterally and two strip-shaped common electrodes (21, 22) disposed longitudinally is a sub-pixel region 50.
  • the sub-pixel region 50 corresponds to one sub-pixel on the color filter substrate, and the sub-pixel region 50 is covered with the pixel electrode 40.
  • the sub-pixel region 50 is horizontally disposed, that is, the length direction of the sub-pixel region 50 is parallel to the horizontal direction in which the scanning line 10 is located, and the width direction of the sub-pixel region 50 is perpendicular to the vertical direction of the first strip-shaped common electrode 21 and the second strip-shaped common electrode 22. Straight parallel.
  • FIGS. 4 and 6 show two pixel structures provided with pixel electrodes 40, respectively. Referring to FIGS. 4 and 6, the pixel electrodes 40 disposed in the sub-pixel region 50 are also horizontally disposed accordingly.
  • the two scanning lines 10 are parallel to the longitudinal direction of the sub-pixel region 50.
  • the two scanning lines 10 are respectively disposed outside the upper and lower sides of the sub-pixel region 50.
  • the first strip-shaped common electrode 21 and the second strip-shaped common electrode 22 are both parallel to the width direction of the sub-pixel region 50, and the lengths of the third strip-shaped common electrode 23 and the sub-pixel region 50 are The directions are parallel.
  • the first strip-shaped common electrode 21 and the second strip-shaped common electrode 22 are disposed outside the left and right sides of the sub-pixel region 50, respectively.
  • the third strip-shaped common electrode 23 has the same distance from the upper and lower sides of the sub-pixel region 50. More specifically, the three strip-shaped common electrodes 20 are formed in an H-shaped structure.
  • the data line 30 of the pixel structure is parallel to the width direction of the sub-pixel region 50.
  • the distance between the data line 30 extending through the sub-pixel region 50 and the first strip-shaped common electrode 21 is greater than a predetermined distance, and the distance between the data line 30 and the second strip-shaped common electrode 22 is greater than the predetermined distance.
  • the preset distance is set to satisfy that the electric field formed by the voltage difference between the data line 30 and the first strip-shaped common electrode 21 is insufficient to cause significant deflection of the liquid crystal molecules, and the data line 30 and the second strip-shaped common electrode The electric field formed between 22 due to the voltage difference is insufficient to cause significant deflection of the liquid crystal molecules.
  • the present embodiment can reduce the parasitic capacitance between the data line 30 and the pixel electrode 40 to about 1/3 of that in the prior art.
  • the voltage jump when the pixel electrode 40 is affected by the parasitic capacitance is greatly reduced, thereby improving the vertical crosstalk phenomenon and improving the display quality of the picture.
  • the distance between the data line 30 and the common electrodes (21, 22) on both sides is significantly increased, so that the distance between the data line 30 and the common electrode is greater than a preset distance. It is ensured that the electric field generated by the voltage difference between the data line 30 and the common electrode is insufficient to cause significant deflection of the liquid crystal molecules.
  • the design can effectively reduce or completely eliminate the area of the black matrix corresponding to the adjacent data lines and the common electrode, thereby improving the aperture ratio and the transmittance of the liquid crystal display panel, and optimizing the display effect.
  • data line 30 extends through a central region of sub-pixel region 50.
  • the data line 30 is located at a central position of the sub-pixel region 50.
  • the distance between the data line 30 and the first strip-shaped common electrode 21 is equal to the distance between the data line 30 and the second strip-shaped common electrode 22.
  • the data line 30 is located below the pixel electrode 40.
  • the pixel electrode 40 includes a separation electrode 43.
  • the partition electrode 43 divides the pixel electrode 40 into two sub-pixel electrode regions, which are a first sub-pixel electrode region 41 and a second sub-pixel electrode region 42, respectively.
  • the separation electrode 43 is parallel to the longitudinal direction of the pixel electrode 40, and the separation electrode 43 is located at an intermediate position of the pixel electrode 40.
  • the first sub-pixel electrode region 41 and the second sub-pixel electrode region 42 are symmetrical with respect to the separation electrode 43.
  • the left and right partial structures of the first sub-pixel electrode region 41 are symmetrical with respect to the data line 30.
  • the left and right partial structures of the second sub-pixel electrode region 42 are also symmetrical with respect to the data line 30.
  • a plurality of slits 45 are formed in each of the sub-pixel electrode regions. These slits 45 divide the sub-pixel electrode region into a plurality of separator sheets 44. The plurality of slits 45 and the plurality of separators 44 are alternately arranged in sequence.
  • the pixel electrode 40 in this embodiment is divided into the symmetrical first sub-pixel electrode region 41 and the second sub-pixel electrode region 42 by the separation electrode 43, while the data line 30 is parallel to the width direction of the pixel electrode 40, and the data line 30 is located The intermediate position of the pixel electrode 40.
  • the arrangement is such that the area of each sub-pixel electrode region is more uniform. With the pixel electrode 40 of the present embodiment, the liquid crystal display panel has better resolution.
  • the slits 45 of the left and right portions of the first sub-pixel electrode region 41 are symmetric with respect to the data line 30 and communicate above the data line 30.
  • the separators 44 of the left and right portions of the first sub-pixel electrode region 41 are symmetrical with respect to the data line 30 and are connected above the data line 30.
  • the slit 45 of the left and right portions of the second sub-pixel electrode region 42 is symmetrical with respect to the data line 30 and communicates over the data line 30.
  • the separators 44 of the left and right portions of the second sub-pixel electrode region 42 are symmetrical with respect to the data line 30 and are connected above the data line 30.
  • the points on the first sub-pixel electrode region 41 The spacer 44 is disconnected above the data line 30, and the corresponding spacer 44 on the second sub-pixel electrode region 42 is disconnected above the data line 30.
  • the pixel electrode 40 above the data line 30 forms a strip-shaped opening 46 along the length direction of the data line 30, thereby reducing the overlapping area of the data line 30 and the pixel electrode 40 above the data line 30.
  • This embodiment further reduces the parasitic capacitance between the data line 30 and the pixel electrode 40, and is more helpful in improving the vertical crosstalk phenomenon.
  • an embodiment of the present invention further provides an array substrate.
  • the array substrate of this embodiment includes a base substrate and the pixel structure described in the above embodiments.
  • the pixel structure is formed over the base substrate.
  • an embodiment of the present invention further provides a liquid crystal display panel.
  • the liquid crystal display panel of the embodiment can be applied to electronic products such as mobile phones, digital cameras, and PDAs.
  • the liquid crystal display panel of the present embodiment mainly includes a color filter substrate, the array substrate described in the above embodiments, and a liquid crystal layer. Specifically, the array substrate is disposed opposite to the color filter substrate. The liquid crystal layer is disposed between the color filter substrate and the array substrate.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Geometry (AREA)
  • Liquid Crystal (AREA)

Abstract

一种像素结构、阵列基板及液晶显示面板。像素结构中，子像素区域（50）水平设置，且数据线（30）沿竖直方向贯穿子像素区域（50），使数据线（30）与像素电极（40）之间的寄生电容得到了有效减少，改善了垂直串扰现象。使数据线（30）与公共电极（21、22）之间的距离大于预设距离，从而避免设置额外的黑色矩阵，提高了面板的开口率和穿透率，优化了显示效果。

Description

像素结构、阵列基板及液晶显示面板
本申请要求享有2015年9月10日提交的名称为“像素结构、阵列基板及液晶显示面板”的中国专利申请CN201510574885.0的优先权，其全部内容通过引用并入本文中。
技术领域
本发明涉及显示技术领域，尤其涉及一种像素结构，还涉及一种具有该像素结构的阵列基板、以及具有该阵列基板的液晶显示面板。
背景技术
随着液晶显示技术的不断发展，液晶显示面板作为显示部件已广泛应用于移动电话、数码相机、PDA等电子产品中。液晶显示面板具有像素结构。
图1示出了现有技术中像素结构(未显示像素电极)的结构示意图。图2示出了在图1所示的像素结构的基础上加入像素电极后的结构示意图。参照图1和图2，现有技术中的像素结构包括像素电极40、扫描线10、两条数据线30和三个公共电极20。由扫描线10和公共电极20围成的子像素区域竖直设置。扫描线10与子像素区域的宽度方向平行。其中两个公共电极与子像素区域的长度方向平行，这两个公共电极分别设置在子像素区域的左右两侧。两条数据线30与子像素区域的长度方向平行，这两条数据线30分别邻近设置在上述两个公共电极的左右两侧。
现有技术中像素结构的缺陷在于：邻近设置的数据线30与公共电极之间的电压差会形成电场，电场使得相应位置的液晶分子发生明显偏转，从而使得液晶显示面板在该像素电极40的两侧出现漏光的现象。为了克服上述漏光的缺陷，通常要在邻近设置的数据线30与公共电极的上方覆盖黑色矩阵来进行遮光。然而，黑色矩阵的使用会大幅降低液晶显示面板的开口率，进而影响液晶显示面板的穿透率。最终，需要更大的背光亮度才能满足整个面板的亮度要求。
发明内容
本发明所要解决的技术问题是：采用现有技术中的像素结构，大幅降低了液晶显示面板的开口率和穿透率，需要更大的背光亮度才能满足整个面板的亮度要求。
为了解决上述技术问题，本发明提供了一种像素结构、阵列基板及液晶显示面板。
根据本发明的第一个方面，提供了一种像素结构，其包括扫描线、数据线、像素电极和公共电极；
所述扫描线和所述公共电极围成子像素区域；所述子像素区域的长度方向与所述扫描线平行，所述子像素区域的宽度方向与所述数据线平行；
所述数据线穿过所述子像素区域并与所述像素电极重叠。
优选的是，所述公共电极包括与所述子像素区域的宽度方向平行的第一条形公共电极和第二条形公共电极，所述第一条形公共电极和第二条形公共电极分别位于所述子像素区域的短边的外侧，所述第一条形公共电极和第二条形公共电极与所述扫描线围成所述子像素区域；
所述数据线位于所述第一条形公共电极和第二条形公共电极之间。
优选的是，所述数据线与所述第一条形公共电极和第二条形公共电极之间的距离均大于预设距离。
优选的是，所述数据线与所述第一条形公共电极之间的距离等于所述数据线与所述第二条形公共电极之间的距离。
优选的是，所述公共电极还包括与所述子像素区域的长度方向平行的第三条形公共电极，所述第三条形公共电极的两端分别与所述第一条形公共电极和第二条形公共电极连通。
优选的是，所述第三条形公共电极位于所述子像素区域内。
优选的是，所述数据线位于所述像素电极的下方，所述像素电极被其具有的分隔电极分隔成第一子像素电极区域和第二子像素电极区域，所述分隔电极与所述像素电极的沿长度方向的中心线重合；所述第一子像素电极区域和所述第二子像素电极区域分别关于所述数据线对称；
每个子像素电极区域上开设有若干缝隙，该若干缝隙将该子像素电极区域分隔为若干分隔片，该若干缝隙与该若干分隔片依次交替排列分布。
优选的是，所述第一子像素电极区域上的分隔片与所述第二子像素电极区域上对应的分隔片分别在所述数据线上方断开，所述数据线上方的像素电极沿着该数据线的长度方向形成了条状的开口，以减少所述数据线与该数据线上方的像素电极的重叠面积。
根据本发明的第二个方面，提供了一种阵列基板，其包括衬底基板以及上述像素结构。所述像素结构设置在所述衬底基板上。
根据本发明的第三个方面，提供了一种液晶显示面板，其包括：彩膜基板、上述阵列 基板以及设置在所述彩膜基板和所述阵列基板之间的液晶层。彩膜基板与所述阵列基板相对设置。
与现有技术相比，上述方案中的一个或多个实施例可以具有如下优点或有益效果：
应用本发明的像素结构，由于子像素区域水平设置，并且数据线沿竖直方向贯穿子像素区域，因此有效减少了数据线与像素电极之间的寄生电容，从而改善了垂直串扰(V-Crosstalk)现象。另外，本发明通过水平设置子像素区域，明显增大了数据线与两侧公共电极之间的距离，使数据线与公共电极之间的距离大于预设距离，保证了数据线与公共电极之间的由于电压差而产生的电场不足以使液晶分子发生明显偏转。该设计能有效减少或者完全取消对应用于遮挡相邻的数据线和公共电极的黑色矩阵的面积，从而提高了液晶显示面板的开口率和穿透率，优化了显示效果。
本发明的其它特征和优点将在随后的说明书中阐述，并且部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
附图用来提供对本发明的进一步理解，并且构成说明书的一部分，与本发明的实施例共同用于解释本发明，并不构成对本发明的限制。在附图中：
图1示出了现有技术中像素结构(未显示像素电极)的结构示意图；
图2示出了在图1所示的像素结构的基础上加入像素电极后的结构示意图；
图3示出了本实施例像素结构(未显示像素电极)的结构示意图；
图4示出了在图3所示的像素结构的基础上加入像素电极后的一种结构示意图；
图5示出了图4中所示的像素电极的结构示意图；
图6示出了在图3所示的像素结构的基础上加入像素电极后的另一种结构示意图；以及
图7示出了图6中所示的像素电极的结构示意图。
具体实施方式
以下将结合附图及实施例来详细说明本发明的实施方式，借此对本发明如何应用技术手段来解决技术问题，并达成技术效果的实现过程能充分理解并据以实施。需要说明的是，只要不构成冲突，本发明中的各个实施例以及各实施例中的各个特征可以相互结合，所形成的技术方案均在本发明的保护范围之内。
本发明实施例所要解决的技术问题是：采用现有技术中的像素结构，大幅降低了液晶显示面板的开口率和穿透率，需要更大的背光亮度才能满足整个面板的亮度要求。为解决上述技术问题，本发明实施例提供了一种能显著提高液晶显示面板的开口率和穿透率的像素结构。
图3示出了本发明实施例的像素结构(未显示像素电极)的结构示意图。本实施例的像素结构主要包括一个主动元件(图中未示出)、两条扫描线10、一条数据线30、一个像素电极40和三个条形公共电极20。主动元件优选为薄膜晶体管，且主动元件分别与扫描线10、数据线30和像素电极40电连接。三个条形公共电极20分别为第一条形公共电极21、第二条形公共电极22和第三条形公共电极23。
在本实施例中，由横向设置的两条扫描线10和纵向设置的两个条形公共电极(21、22)围成的区域为子像素区域50。该子像素区域50与彩膜基板上的一个子像素相对应，并且该子像素区域50上覆盖有像素电极40。子像素区域50水平设置，即子像素区域50的长度方向与扫描线10所在的水平方向平行，子像素区域50宽度方向与第一条形公共电极21和第二条形公共电极22所在的竖直方向平行。
图4和图6分别示出了两种设置有像素电极40的像素结构。参照图4和图6，布设在子像素区域50内的像素电极40也相应地水平设置。
两条扫描线10与子像素区域50的长度方向平行。两条扫描线10分别设置在子像素区域50的上下边的外侧。在三个条形公共电极20中，第一条形公共电极21和第二条形公共电极22均与子像素区域50的宽度方向平行，第三条形公共电极23与子像素区域50的长度方向平行。第一条形公共电极21和第二条形公共电极22分别设置在子像素区域50的左右边的外侧。特别地，第三条形公共电极23与子像素区域50的上边和下边的距离相等。更特别地，三个条形公共电极20形成呈H字型的结构。
像素结构的数据线30与子像素区域50的宽度方向平行。贯穿子像素区域50的数据线30与第一条形公共电极21的距离大于预设距离，同时该数据线30与第二条形公共电极22的距离大于该预设距离。这里，预设距离的设置需满足：数据线30与第一条形公共电极21之间由于电压差而形成的电场不足以使液晶分子发生明显偏转，并且数据线30与第二条形公共电极22之间由于电压差而形成的电场不足以使液晶分子发生明显偏转。
应用本实施例所述的像素结构，由于子像素区域50水平设置，并且数据线30沿竖直方向贯穿子像素区域50，因此有效减少了数据线30与像素电极40之间的寄生电容，从而改善了垂直串扰现象。举例来说，当子像素区域50的长度等于宽度的3倍时，使得位于该子像素区域50内的数据线30及像素电极40在沿竖直方向上的长度值接近现有技术 的1/3。因而，本实施例能将数据线30与像素电极40之间的寄生电容减小至现有技术情况下的1/3左右。这样可以在液晶显示面板显示Crosstalk画面时大幅度降低像素电极40受到寄生电容影响时的电压跳变，从而改善了垂直串扰现象，提高了画面的显示质量。另外，本实施例通过水平设置子像素区域50，明显增大了数据线30与两侧公共电极(21、22)之间的距离，使数据线30与公共电极之间的距离大于预设距离，保证了数据线30与公共电极之间的由于电压差而产生的电场不足以使液晶分子发生明显偏转。该设计能有效减少或者完全取消对应用于遮挡相邻的数据线和公共电极的黑色矩阵的面积，从而提高了液晶显示面板的开口率和穿透率，优化了显示效果。
在本发明一优选的实施例中，数据线30贯穿子像素区域50的中心区域。特别地，数据线30位于子像素区域50的中心位置。换言之，数据线30与第一条形公共电极21之间的距离等于该数据线30与第二条形公共电极22之间的距离。如此设置能够使液晶显示面板的显示效果更均衡。
下面结合图4至图7详细阐述像素电极40的具体结构。
如图4至图7所示，数据线30位于像素电极40的下方。像素电极40包括分隔电极43。分隔电极43将像素电极40分为两个子像素电极区域，分别为第一子像素电极区域41和第二子像素电极区域42。特别地，分隔电极43与像素电极40长度方向平行，并且分隔电极43位于像素电极40的中间位置。第一子像素电极区域41与第二子像素电极区域42关于分隔电极43对称。另外，第一子像素电极区域41的左右两部分结构关于数据线30对称。同样，第二子像素电极区域42的左右两部分结构也关于数据线30对称。
每个子像素电极区域上开设有若干缝隙45。这些缝隙45将该子像素电极区域分隔为若干分隔片44。该若干缝隙45与该若干分隔片44依次交替排列分布。
本实施例中的像素电极40被分隔电极43分成对称的第一子像素电极区域41和第二子像素电极区域42，同时数据线30与像素电极40的宽度方向平行，并且该数据线30位于像素电极40的中间位置。如此设置使得各子像素电极区域的面积更均一化。采用本实施例的像素电极40，使得液晶显示面板具有更好的解析度。
在本发明一优选的实施例中，具体参照图4和图5，第一子像素电极区域41左右两部分的缝隙45关于数据线30对称，并在数据线30上方连通。第一子像素电极区域41左右两部分的分隔片44关于数据线30对称，并在数据线30上方连接。第二子像素电极区域42左右两部分的缝隙45关于数据线30对称，并在数据线30上方连通。第二子像素电极区域42左右两部分的分隔片44关于数据线30对称，并在数据线30上方连接。
在本发明一优选的实施例中，具体参照图6和图7，第一子像素电极区域41上的分 隔片44在数据线30上方断开，第二子像素电极区域42上对应的分隔片44在数据线30上方断开。这样，数据线30上方的像素电极40沿着该数据线30的长度方向形成了条状的开口46，从而减少了数据线30与该数据线30上方的像素电极40的重叠面积。本实施例进一步减少了数据线30与像素电极40之间的寄生电容，更有助于改善垂直串扰现象。
相应地，本发明实施例还提供了一种阵列基板。本实施例的阵列基板包括衬底基板以及上述实施例所述的像素结构。该像素结构形成在衬底基板之上。
相应地，本发明实施例还提供一种液晶显示面板。本实施例的液晶显示面板可应用于移动电话、数码相机、PDA等电子产品中。本实施例所述的液晶显示面板主要包括彩膜基板、上述实施例所述的阵列基板以及液晶层。具体地，阵列基板与彩膜基板相对设置。液晶层设置在彩膜基板与阵列基板之间。
虽然本发明所公开的实施方式如上，但所述的内容只是为了便于理解本发明而采用的实施方式，并非用以限定本发明。任何本发明所属技术领域内的技术人员，在不脱离本发明所公开的精神和范围的前提下，可以在实施的形式上及细节上作任何的修改与变化，但本发明的保护范围，仍须以所附的权利要求书所界定的范围为准。

Claims (20)

  1. 一种像素结构，包括扫描线、数据线、像素电极和公共电极；
    所述扫描线和所述公共电极围成子像素区域；所述子像素区域的长度方向与所述扫描线平行，所述子像素区域的宽度方向与所述数据线平行；
    所述数据线穿过所述子像素区域并与所述像素电极重叠。
  2. 根据权利要求1所述的像素结构，其中，所述公共电极包括与所述子像素区域的宽度方向平行的第一条形公共电极和第二条形公共电极，所述第一条形公共电极和第二条形公共电极分别位于所述子像素区域的短边的外侧，所述第一条形公共电极和第二条形公共电极与所述扫描线围成所述子像素区域；
    所述数据线位于所述第一条形公共电极和第二条形公共电极之间。
  3. 根据权利要求2所述的像素结构，其中，所述数据线与所述第一条形公共电极和第二条形公共电极之间的距离均大于预设距离。
  4. 根据权利要求3所述的像素结构，其中，所述数据线与所述第一条形公共电极之间的距离等于所述数据线与所述第二条形公共电极之间的距离。
  5. 根据权利要求4所述的像素结构，其中，所述数据线位于所述像素电极的下方，所述像素电极被其具有的分隔电极分隔成第一子像素电极区域和第二子像素电极区域，所述分隔电极与所述像素电极的沿长度方向的中心线重合；所述第一子像素电极区域和所述第二子像素电极区域分别关于所述数据线对称；
    每个子像素电极区域上开设有若干缝隙，该若干缝隙将该子像素电极区域分隔为若干分隔片，该若干缝隙与该若干分隔片依次交替排列分布。
  6. 根据权利要求5所述的像素结构，其中，所述第一子像素电极区域上的分隔片与所述第二子像素电极区域上对应的分隔片分别在所述数据线上方断开，所述数据线上方的像素电极沿着该数据线的长度方向形成了条状的开口，以减少所述数据线与该数据线上方的像素电极的重叠面积。
  7. 根据权利要求2所述的像素结构，其中，所述公共电极还包括与所述子像素区域的长度方向平行的第三条形公共电极，所述第三条形公共电极的两端分别与所述第一条形公共电极和第二条形公共电极连通。
  8. 根据权利要求7所述的像素结构，其中，所述数据线位于所述像素电极的下方，所述像素电极被其具有的分隔电极分隔成第一子像素电极区域和第二子像素电极区域，所述分隔电极与所述像素电极的沿长度方向的中心线重合；所述第一子像素电极区域和所述第二子像素电极区域分别关于所述数据线对称；
    每个子像素电极区域上开设有若干缝隙，该若干缝隙将该子像素电极区域分隔为若干分隔片，该若干缝隙与该若干分隔片依次交替排列分布。
  9. 根据权利要求8所述的像素结构，其中，所述第一子像素电极区域上的分隔片与所述第二子像素电极区域上对应的分隔片分别在所述数据线上方断开，所述数据线上方的像素电极沿着该数据线的长度方向形成了条状的开口，以减少所述数据线与该数据线上方的像素电极的重叠面积。
  10. 根据权利要求7所述的像素结构，其中，所述第三条形公共电极位于所述子像素区域内。
  11. 根据权利要求10所述的像素结构，其中，所述数据线位于所述像素电极的下方，所述像素电极被其具有的分隔电极分隔成第一子像素电极区域和第二子像素电极区域，所述分隔电极与所述像素电极的沿长度方向的中心线重合；所述第一子像素电极区域和所述第二子像素电极区域分别关于所述数据线对称；
    每个子像素电极区域上开设有若干缝隙，该若干缝隙将该子像素电极区域分隔为若干分隔片，该若干缝隙与该若干分隔片依次交替排列分布。
  12. 根据权利要求11所述的像素结构，其中，所述第一子像素电极区域上的分隔片与所述第二子像素电极区域上对应的分隔片分别在所述数据线上方断开，所述数据线上方的像素电极沿着该数据线的长度方向形成了条状的开口，以减少所述数据线与该数据线上方的像素电极的重叠面积。
  13. 一种阵列基板，包括：
    衬底基板；以及
    像素结构，其设置在所述衬底基板上；
    所述像素结构，包括扫描线、数据线、像素电极和公共电极；
    所述扫描线和所述公共电极围成子像素区域；所述子像素区域的长度方向与所述扫描线平行，所述子像素区域的宽度方向与所述数据线平行；
    所述数据线穿过所述子像素区域并与所述像素电极重叠。
  14. 根据权利要求13所述的阵列基板，其中，所述公共电极包括与所述子像素区域的宽度方向平行的第一条形公共电极和第二条形公共电极，所述第一条形公共电极和第二条形公共电极分别位于所述子像素区域的短边的外侧，所述第一条形公共电极和第二条形公共电极与所述扫描线围成所述子像素区域；
    所述数据线位于所述第一条形公共电极和第二条形公共电极之间。
  15. 根据权利要求14所述的阵列基板，其中，所述数据线与所述第一条形公共电极 和第二条形公共电极之间的距离均大于预设距离。
  16. 根据权利要求15所述的阵列基板，其中，所述数据线与所述第一条形公共电极之间的距离等于所述数据线与所述第二条形公共电极之间的距离。
  17. 一种液晶显示面板，包括：
    彩膜基板；
    阵列基板，其与所述彩膜基板相对设置；以及
    设置在所述彩膜基板和所述阵列基板之间的液晶层；
    所述阵列基板包括：
    衬底基板；以及
    像素结构，其设置在所述衬底基板上；
    所述像素结构，包括扫描线、数据线、像素电极和公共电极；
    所述扫描线和所述公共电极围成子像素区域；所述子像素区域的长度方向与所述扫描线平行，所述子像素区域的宽度方向与所述数据线平行；
    所述数据线穿过所述子像素区域并与所述像素电极重叠。
  18. 根据权利要求17所述的液晶显示面板，其中，所述公共电极包括与所述子像素区域的宽度方向平行的第一条形公共电极和第二条形公共电极，所述第一条形公共电极和第二条形公共电极分别位于所述子像素区域的短边的外侧，所述第一条形公共电极和第二条形公共电极与所述扫描线围成所述子像素区域；
    所述数据线位于所述第一条形公共电极和第二条形公共电极之间。
  19. 根据权利要求18所述的液晶显示面板，其中，所述数据线与所述第一条形公共电极和第二条形公共电极之间的距离均大于预设距离。
  20. 根据权利要求19所述的液晶显示面板，其中，所述数据线与所述第一条形公共电极之间的距离等于所述数据线与所述第二条形公共电极之间的距离。
PCT/CN2015/089506 2015-09-10 2015-09-14 像素结构、阵列基板及液晶显示面板 Ceased WO2017041310A1 (zh)

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