WO2017037953A1 - Liquid crystal display device - Google Patents

Liquid crystal display device Download PDF

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Publication number
WO2017037953A1
WO2017037953A1 PCT/JP2015/075260 JP2015075260W WO2017037953A1 WO 2017037953 A1 WO2017037953 A1 WO 2017037953A1 JP 2015075260 W JP2015075260 W JP 2015075260W WO 2017037953 A1 WO2017037953 A1 WO 2017037953A1
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WIPO (PCT)
Prior art keywords
scanning signal
signal line
signal lines
liquid crystal
crystal display
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PCT/JP2015/075260
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French (fr)
Japanese (ja)
Inventor
琢也 大石
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堺ディスプレイプロダクト株式会社
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Priority to PCT/JP2015/075260 priority Critical patent/WO2017037953A1/en
Publication of WO2017037953A1 publication Critical patent/WO2017037953A1/en

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device

Definitions

  • the present invention relates to a liquid crystal display device.
  • the liquid crystal display device is a flat display device having excellent features such as high definition, thinness, light weight, and low power consumption, and is widely used for thin televisions, personal computer monitors, digital signage, and the like.
  • a commonly used TN (Twisted Nematic) mode liquid crystal display device has excellent productivity, but has a problem in viewing angle characteristics related to screen display. For example, when the display screen is viewed obliquely with respect to the normal line, the contrast ratio is remarkably lowered in the TN mode liquid crystal display device, and the luminance difference between gradations becomes remarkably unclear. In addition, a so-called gradation inversion phenomenon may be observed in which a portion that appears bright (or dark) when viewed from the front is viewed dark (or bright) when viewed from an oblique direction with respect to the normal.
  • each pixel is composed of two sub-pixels (sub-pixels), and one sub-pixel is provided with a discharge capacitor (down capacitor).
  • the sub-pixel electrode (sub-pixel electrode) of each of the two sub-pixels is sourced via a first switching element and a second switching element in which a scanning signal (gate voltage) is applied to the control electrode from a scanning signal line (gate line). It is connected to a signal line (data line).
  • a discharge capacity electrode (coupling electrode) related to the discharge capacity is connected to a sub-pixel electrode of one sub-pixel via a third switching element.
  • the control electrode of the third switching element is connected to the scanning signal line behind one line.
  • a scanning signal line for applying a signal to the third switching element may be disconnected.
  • a scanning signal cannot be applied to the portion beyond the disconnection portion of the scanning signal line, resulting in a display defect.
  • the present invention has been made in view of such circumstances, and an object of the present invention is to provide a liquid crystal display device capable of preventing display defects due to disconnection of scanning signal lines and improving yield. There is to do.
  • the liquid crystal display device includes a pixel arranged in a matrix and having a plurality of sub-pixels, a first switching element connected to a sub-pixel electrode of one of the sub-pixels, and a sub-pixel of the other sub-pixel.
  • a second switching element connected to the pixel electrode; a discharge capacity electrode included in the other subpixel; a third switching element connected between the subpixel electrode of the other subpixel and the discharge capacity electrode;
  • a first scanning signal line for applying a scanning signal to the first switching element and the second switching element, and a first scanning signal line arranged in parallel to the first scanning signal line, for applying the scanning signal to the third switching element.
  • the present invention when one second scanning signal line is disconnected in the first scanning signal line and the second scanning signal line overlapping the third scanning signal line, the one second scanning signal line,
  • the three scanning signal lines can be electrically connected.
  • the second scanning signal line other than the one second scanning signal line or the first scanning signal line and the third scanning signal line can be electrically connected.
  • the scanning signal can be applied first from the disconnected portion of the second scanning signal line. Therefore, display defects due to disconnection of the scanning signal lines can be prevented, and the yield can be improved.
  • the liquid crystal display device is characterized in that the third scanning signal line overlaps all of the first scanning signal line and the second scanning signal line.
  • the present invention even if any of the second scanning signal lines is disconnected, it is possible to prevent a display defect due to the disconnection and to improve the yield.
  • the liquid crystal display device is characterized in that there are a plurality of the third scanning signal lines.
  • the liquid crystal display device is characterized in that there are a plurality of the third scanning signal lines, and all the first scanning signal lines and the second scanning signal lines overlap the third scanning signal lines. To do.
  • the present invention even if any of the second scanning signal lines is disconnected, it is possible to prevent a display defect due to the disconnection and to improve the yield. Further, even when the plurality of second scanning signal lines are disconnected, display failure due to disconnection can be prevented, and the yield can be improved.
  • the present invention it is possible to prevent display defects due to disconnection of the scanning signal lines, and to improve the yield.
  • FIG. 3 is a block diagram illustrating a configuration example of a liquid crystal display device according to Embodiment 1.
  • FIG. 4 is an explanatory diagram schematically showing a configuration for defining pixels in the liquid crystal panel according to Embodiment 1.
  • FIG. It is explanatory drawing of the connection of a 3rd scanning signal line. It is explanatory drawing of the connection of a 3rd scanning signal line.
  • FIG. 6 is a block diagram illustrating a configuration example of a liquid crystal display device according to a second embodiment.
  • FIG. 6 is a block diagram illustrating a configuration example of a liquid crystal display device according to a third embodiment.
  • FIG. 6 is a block diagram illustrating a configuration example of a liquid crystal display device according to a fourth embodiment.
  • FIG. 1 is a block diagram illustrating a configuration example of a liquid crystal display device according to the first embodiment
  • FIG. 2 is an explanatory diagram schematically illustrating a configuration in which pixels P are defined in the liquid crystal panel 100 according to the first embodiment. It is.
  • pixels P shown by dotted lines
  • the liquid crystal panel 100 is arranged in a matrix in a horizontal direction or a row direction. In FIG. 1, a part of the pixel P is shown.
  • the pixel P has one sub-pixel SP1 and another sub-pixel SP2 that are bisected in the vertical direction of the display screen of the liquid crystal panel 100.
  • the sub-pixel SP1 includes an electrode pair of the sub-pixel electrode 11a and the counter electrode 21 facing each other through the liquid crystal layer 3, and an electrode pair of the auxiliary capacitor electrode 12a and the auxiliary capacitor counter electrode 22a facing each other through an insulating layer (not shown).
  • One end of a TFT (Thin FilmTransistor) 15a (corresponding to the first switching element) is connected to the subpixel electrode 11a.
  • the subpixel electrode 11a and the auxiliary capacitance electrode 12a are electrically connected.
  • the storage capacitor counter electrode 22 a is connected to the potential of the counter electrode 21.
  • a liquid crystal capacitor Clc1 is formed by the sub-pixel electrode 11a and the counter electrode 21.
  • the auxiliary capacitor Ccs1 is formed by the auxiliary capacitor electrode 12a and the auxiliary capacitor counter electrode 22a.
  • the sub-pixel SP2 is opposed to the electrode pair of the sub-pixel electrode 11b and the counter electrode 21 facing each other through the liquid crystal layer 3, and the electrode pair of the auxiliary capacitor electrode 12b and the auxiliary capacitor counter electrode 22b through an insulating layer (not shown).
  • the discharge capacity electrode 13 and the electrode pair of the discharge capacity counter electrode 23 are defined.
  • One end of a TFT 15b (corresponding to the second switching element) is connected to the subpixel electrode 11b.
  • the subpixel electrode 11b and the auxiliary capacitance electrode 12b are electrically connected.
  • the discharge capacity electrode 13 is connected to the sub-pixel electrode 11b via the TFT 14 (corresponding to the third switching element).
  • the auxiliary capacity counter electrode 22 b and the discharge capacity counter electrode 23 are connected to the potential of the counter electrode 21.
  • the counter electrode 21 is common to the subpixels SP1 and SP2, but is not limited thereto.
  • a liquid crystal capacitor Clc2 is formed by the sub-pixel electrode 11b and the counter electrode 21.
  • the auxiliary capacitance Ccs2 is formed by the auxiliary capacitance electrode 12b and the auxiliary capacitance counter electrode 22b.
  • the discharge capacity Cdc is formed by the discharge capacity electrode 13 and the discharge capacity counter electrode 23.
  • source signal lines SL for applying source signals to the sub-pixel electrodes 11a and 11b via the TFTs 15a and 15b are linearly arranged in the vertical direction.
  • the other ends of the TFTs 15a and 15b are connected to the source signal line SL.
  • the gate electrodes of the TFTs 15a and 15b are connected to a first scanning signal line GL1 that is linearly arranged so as to cross the central portion of the pixel P in the horizontal direction.
  • the gate electrode of the TFT 14 is connected to the second scanning signal line GL2 adjacent to the first scanning signal line GL1 in the column direction, that is, in the vertical direction.
  • a plurality of first scanning signal lines GL1, GL1,... GL1 and a plurality of second scanning signal lines GL2, GL2,. are arranged in parallel.
  • the first scanning signal line GL1 is positioned on one end side in the vertical direction
  • the second scanning signal line GL2 is positioned on the other end side.
  • one third scan is provided on one end side of the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,.
  • a signal line GL3 is arranged.
  • the third scanning signal line GL3 is substantially parallel to the source signal line SL, that is, linearly arranged in the vertical direction.
  • the first scanning signal lines GL1, GL1,. Overlaps all of the second scanning signal lines GL2, GL2,.
  • the liquid crystal display device is arranged on the other end side in the horizontal direction and includes a gate driver GD for applying a scanning signal.
  • the other end of all the first scanning signal lines GL1, GL1,... GL1 is connected to the gate driver GD.
  • the second scanning signal lines GL2, GL2,... GL2 are connected to the first scanning signal lines GL1, GL1,... GL1 one by one, except for the second scanning signal line GL2 located on the most other end side in the vertical direction.
  • Via the gate driver GD Via the gate driver GD.
  • the second scanning signal line GL2 located on the most other end side in the vertical direction is directly connected to the gate driver GD.
  • the second scanning signal line GL2 is not connected to the first scanning signal line GL1 positioned on the most end side in the vertical direction. All of the second scanning signal lines GL2, GL2,... GL2 may be directly connected to the gate driver GD without passing through the first scanning signal lines GL1, GL1,.
  • the liquid crystal display device includes a source driver SD that is disposed on one end side in the vertical direction and applies a source signal. One end of each of the source signal lines SL, SL,... SL is connected to the source driver SD. 1 shows a part of the first scanning signal lines GL1, GL1,... GL1, the second scanning signal lines GL2, GL2,... GL2, and the source signal lines SL, SL,. ing.
  • the liquid crystal display device includes a display control circuit 4a that controls display by the liquid crystal panel 100 using the gate driver GD and the source driver SD.
  • the display control circuit 4a receives an image signal input circuit 40 that receives an image signal including image data representing an image, and the gate driver GD and the source driver SD based on the clock signal and the synchronization signal separated by the image signal input circuit 40, respectively.
  • a gate driver control circuit 41 and a source driver control circuit 42 are controlled.
  • Each of the gate driver control circuit 41 and the source driver control circuit 42 generates control signals such as a start signal, a clock signal, and an enable signal necessary for the periodic operation of the gate driver GD and the source driver SD.
  • the source driver control circuit 42 also outputs the digital image data separated by the image signal input circuit 40 to the source driver SD.
  • the gate driver GD sequentially scans the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,. Is applied. At this time, a scanning signal is applied to the second scanning signal line GL2 connected to the first scanning signal line GL1 via the first scanning signal line GL1. Therefore, the gate electrode of the TFT 14 included in each of the pixels P, P,... P for one line is delayed by one horizontal scanning period from the scanning signal applied to the gate electrodes of the TFTs 15a and 15b of the corresponding pixel P. A scanning signal is applied.
  • the source driver SD accumulates digital image data supplied from the source driver control circuit 42 for one horizontal scanning period, generates an analog source signal representing an image for one line, and generates the generated source signal as a source signal line. SL, SL,... Applied in parallel to SL.
  • the source signal for one line here is updated at the predetermined time difference.
  • the scanning signal applied to one of the first scanning signal lines GL1, GL1,... GL1 is the gate of the TFTs 15a and 15b included in the pixels P, P,. Applied to the electrode.
  • the gate electrode of the TFT 14 included in each of the pixels P, P,... P for one line is applied only for one horizontal scanning period from the scanning signal applied to the gate electrodes of the TFTs 15a and 15b of the corresponding pixel P.
  • a delayed scanning signal is applied, but a scanning signal delayed by two horizontal scanning periods or more may be applied.
  • the amount of delay of the scanning signal applied to the gate electrode of the TFT 14 is preferably negligible for one frame period.
  • the source signal applied to the source signal lines SL, SL,... SL is gated to the first scanning signal line GL1 in one horizontal scanning period in which the scanning signal is applied to the first scanning signal line GL1.
  • the voltage is applied to the subpixel electrodes 11a and 11b via the TFTs 15a and 15b to which the electrodes are connected, and also to the auxiliary capacitance electrodes 12a and 12b.
  • source signals are written into the liquid crystal capacitors Clc1 and Clc2 and the auxiliary capacitors Ccs1 and Ccs2 formed in the sub-pixels SP1 and SP2, respectively.
  • one line of source signal is simultaneously written to one line of pixels P, P,... P in one horizontal scanning period.
  • the source signal written to the liquid crystal capacitor Clc1 is stably held by the auxiliary capacitor Ccs1
  • the source signal written to the liquid crystal capacitor Clc2 is stably held by the auxiliary capacitor Ccs2.
  • the voltage of the Clc 2 changes so that the absolute value thereof becomes smaller due to the movement of electric charge to the discharge capacity Cdc. Therefore, the effective voltage of the subpixels SP1 and SP2 can be changed. Thereby, a brightness difference or a brightness difference can be generated between the sub-pixels SP1 and SP2 for each pixel P, and the viewing angle characteristics are improved.
  • the liquid crystal display device displays an image with improved viewing angle characteristics by the above-described operation.
  • the second scanning signal line GL2 is disconnected in the manufacturing stage of the liquid crystal display device, the viewing angle characteristics cannot be improved, and there is a risk of display failure.
  • display defects can be prevented by using the third scanning signal line GL3 as follows.
  • 3A and 3B are explanatory diagrams of the connection of the third scanning signal line GL3.
  • a disconnection occurs in one second scanning signal line GL2, and a disconnected portion A is shown.
  • the third scanning signal line GL3 can be electrically connected to one second scanning signal line GL2 and the second scanning signal line GL2 of the next line.
  • the connection of the third scanning signal line GL3 is performed, for example, by irradiating a laser beam to the connecting portion and melting the insulating film, the second scanning signal line GL2, and the third scanning signal line GL3.
  • the portion marked with X is a connection location.
  • a scanning signal is applied to the TFT 14 relating to the pixel ahead of the disconnection portion A via the second scanning signal line GL2 connected to the third scanning signal line GL3, thereby forming a discharge capacitor Cdc.
  • the third scanning signal line GL3 may be connected to the second scanning signal line GL2 where the disconnection has occurred and the first scanning signal line GL1 to which the scanning signal is applied next.
  • the second scanning signal line GL2 or the first scanning signal line GL1 connected to the GL3 is the second scanning signal line GL2 to which a scanning signal is applied simultaneously with or after the second scanning signal line GL2 in which the disconnection has occurred.
  • any of the first scanning signal lines GL1 may be used.
  • the one second scanning signal line GL2 and the third scanning signal line GL3 can be electrically connected. Further, the second scanning signal line GL2 or the first scanning signal line GL1 other than the one second scanning signal line GL2 can be electrically connected to the third scanning signal line GL3. As a result, the scanning signal can be applied first from the disconnected portion of the second scanning signal line GL2. Therefore, in the liquid crystal display device, display defects due to disconnection can be prevented, and the yield can be improved.
  • the third scanning signal line GL3 overlaps all of the first scanning signal lines GL1, GL1,... GL1, and the second scanning signal lines GL2, GL2,. Therefore, even if any of the second scanning signal lines GL2 is disconnected, it is possible to prevent display defects due to the disconnection.
  • the third scanning signal line GL3 does not overlap all of the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,. It may be. In this case, display failure can be prevented when a disconnection occurs in the range where the third scanning signal line GL3 overlaps. Further, the number of sub-pixels is not limited to two and may be three or more.
  • FIG. 4 is a block diagram illustrating a configuration example of the liquid crystal display device according to the second embodiment.
  • symbol is attached
  • the two third scanning signal lines GL3, GL3 are arranged substantially parallel to the source signal lines SL, SL,.
  • the two third scanning signal lines GL3, GL3 are arranged substantially in parallel and overlap each of the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,. Yes.
  • the third scanning signal line GL2 is not limited to two, and may be three or more.
  • FIG. 5 is a block diagram illustrating a configuration example of the liquid crystal display device according to the third embodiment.
  • symbol is attached
  • two third scanning signal lines GL3, GL3 are arranged, are arranged substantially parallel to the source signal lines SL, SL,... SL, and are arranged on substantially the same straight line in the vertical direction. Yes. Therefore, the two third scanning signal lines overlap with the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,. Here, all the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,... GL2 overlap one of the third scanning signal lines GL3, GL3.
  • the third scanning signal line GL3 is not limited to two, and may be three or more. By increasing the number of third scanning signal lines GL3, it is possible to cope with many disconnections.
  • a signal line GL3 may be provided. In this case, it is possible to prevent display failure due to disconnection in the range where the two third scanning signal lines GL3 overlap the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,.
  • FIG. 6 is a block diagram illustrating a configuration example of the liquid crystal display device according to the fourth embodiment.
  • symbol is attached
  • third scanning signal lines GL3, and all the third scanning signal lines GL3, GL3,... GL3 are connected to the source signal lines SL, SL,. They are arranged substantially in parallel, and a plurality (three in the figure) are arranged on the substantially same straight line in the vertical direction.
  • the third scanning signal lines arranged on substantially the same straight line overlap the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,.
  • the number of third scanning signal lines GL3 is not limited to the number shown in the figure, and the number of third scanning signal lines GL3 arranged on substantially the same straight line is not limited to the number shown. Further, the number of the third scanning signal lines GL3 where the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,.
  • Subpixel electrode 13 Discharge capacity electrode 14, 15a, 15b TFT GL1 first scanning signal line GL2 second scanning signal line GL3 third scanning signal line P pixel SP1, SP2 subpixel

Abstract

Provided is a liquid crystal display device such that display failures caused by a broken scanning signal line can be prevented, and yield can be improved. At one side of a liquid crystal panel 100 in a horizontal direction, a single third scanning signal line GL3 is provided at one end of first scanning signal lines GL1, GL1, … GL1 and second scanning signal lines GL2, GL2, … GL2. The third scanning signal line GL3 is provided substantially parallel to a source signal line SL, and overlapped by all the first scanning signal lines GL1, GL1, … GL1 and the second scanning signal lines GL2, GL2, … GL2 with, for example, an insulating film interposed therebetween.

Description

液晶表示装置Liquid crystal display
　本発明は、液晶表示装置に関する。 The present invention relates to a liquid crystal display device.
　液晶表示装置は、高精細、薄型、軽量、及び低消費電力等の優れた特長を有する平面表示装置であり、薄型テレビ、パソコンモニタ、デジタルサイネージ等に幅広く利用される。 The liquid crystal display device is a flat display device having excellent features such as high definition, thinness, light weight, and low power consumption, and is widely used for thin televisions, personal computer monitors, digital signage, and the like.
　従来、一般的に用いられていたＴＮ（Twisted Nematic ）モードの液晶表示装置は、生産性に優れている一方で、画面表示に係る視野角特性に問題があった。例えば表示画面を法線に対して斜め方向から見た場合に、ＴＮモードの液晶表示装置ではコントラスト比が著しく低下すると共に、階調間の輝度差が著しく不明瞭になる。また、表示画面を正面から見ると明るく（又は暗く）見える部分が、法線に対して斜め方向から見ると暗く（又は明るく）見える、いわゆる階調反転現象が観察される場合がある。 Conventionally, a commonly used TN (Twisted Nematic) mode liquid crystal display device has excellent productivity, but has a problem in viewing angle characteristics related to screen display. For example, when the display screen is viewed obliquely with respect to the normal line, the contrast ratio is remarkably lowered in the TN mode liquid crystal display device, and the luminance difference between gradations becomes remarkably unclear. In addition, a so-called gradation inversion phenomenon may be observed in which a portion that appears bright (or dark) when viewed from the front is viewed dark (or bright) when viewed from an oblique direction with respect to the normal.
　液晶表示装置の視野角特性は、例えば、画素を二つの副画素に分割し、一方を明画素、他方を暗画素として、明暗差又は輝度差を生じさせることにより改善することができる。特許文献１に記載の液晶表示装置は、各画素が二つの副画素（サブ画素）によって構成されており、一つの副画素に放電容量（ダウンキャパシタ）が設けられている。二つの副画素夫々の副画素電極（サブ画素電極）は、制御電極に走査信号線（ゲートライン）から走査信号（ゲート電圧）が印加される第１スイッチング素子及び第２スイッチング素子を介してソース信号線（データライン）に接続されている。放電容量に係る放電容量電極（カップリング電極）は第３スイッチング素子を介して一の副画素の副画素電極に接続されている。そして、第３スイッチング素子の制御電極が、１ライン後方の走査信号線に接続されている。 The viewing angle characteristics of a liquid crystal display device can be improved by, for example, dividing a pixel into two sub-pixels, and using one as a bright pixel and the other as a dark pixel to produce a light / dark difference or a luminance difference. In the liquid crystal display device described in Patent Document 1, each pixel is composed of two sub-pixels (sub-pixels), and one sub-pixel is provided with a discharge capacitor (down capacitor). The sub-pixel electrode (sub-pixel electrode) of each of the two sub-pixels is sourced via a first switching element and a second switching element in which a scanning signal (gate voltage) is applied to the control electrode from a scanning signal line (gate line). It is connected to a signal line (data line). A discharge capacity electrode (coupling electrode) related to the discharge capacity is connected to a sub-pixel electrode of one sub-pixel via a third switching element. The control electrode of the third switching element is connected to the scanning signal line behind one line.
　特許文献１に記載の液晶表示装置では、各画素について、第１スイッチング素子及び第２スイッチング素子に対する走査信号より１水平走査時間だけ遅れた走査信号が第３スイッチング素子の制御電極に印加される。このように一方の副画素の副画素電極及び放電容量電極間を走査信号より時間的に遅れた信号に応じて接続することにより、二つの副画素夫々が液晶層に印加する実効電圧を変えることができる。これにより、二つの副画素に明暗差又は輝度差が生じ、視野角特性が改善される。 In the liquid crystal display device described in Patent Document 1, for each pixel, a scanning signal delayed by one horizontal scanning time from the scanning signals for the first switching element and the second switching element is applied to the control electrode of the third switching element. In this way, the effective voltage applied to the liquid crystal layer by each of the two sub-pixels is changed by connecting the sub-pixel electrode and the discharge capacitance electrode of one of the sub-pixels according to the signal delayed in time from the scanning signal. Can do. Thereby, a brightness difference or a brightness difference is generated between the two sub-pixels, and the viewing angle characteristics are improved.
特開２０１２－３７８９０号公報JP 2012-37890 A
　しかしながら、液晶表示装置の製造段階において、第３スイッチング素子に信号を印加するための走査信号線が断線してしまう場合がある。この場合、走査信号線の断線部分から先の部分には走査信号を印加できず、表示不良が生じるという問題がある。 However, in the manufacturing stage of the liquid crystal display device, a scanning signal line for applying a signal to the third switching element may be disconnected. In this case, there is a problem that a scanning signal cannot be applied to the portion beyond the disconnection portion of the scanning signal line, resulting in a display defect.
　本発明は、斯かる事情に鑑みてなされたものであり、その目的とするところは、走査信号線の断線による表示不良を防止することができ、歩留まりを向上させることができる液晶表示装置を提供することにある。 The present invention has been made in view of such circumstances, and an object of the present invention is to provide a liquid crystal display device capable of preventing display defects due to disconnection of scanning signal lines and improving yield. There is to do.
　本発明に係る液晶表示装置は、マトリクス状に配列され、複数の副画素を有する画素と、一の前記副画素の副画素電極に接続された第１スイッチング素子と、他の前記副画素の副画素電極に接続された第２スイッチング素子と、前記他の副画素に含まれた放電容量電極と、前記他の副画素の副画素電極及び前記放電容量電極間に接続された第３スイッチング素子と、前記第１スイッチング素子及び第２スイッチング素子に走査信号を印加するための第１走査信号線と、前記第１走査信号線に並設され、前記第３スイッチング素子に走査信号を印加するための第２走査信号線と、前記第１走査信号線及び第２走査信号線の一端側において、前記第１走査信号線及び第２走査信号線に重なっている第３走査信号線とを備えることを特徴とする。 The liquid crystal display device according to the present invention includes a pixel arranged in a matrix and having a plurality of sub-pixels, a first switching element connected to a sub-pixel electrode of one of the sub-pixels, and a sub-pixel of the other sub-pixel. A second switching element connected to the pixel electrode; a discharge capacity electrode included in the other subpixel; a third switching element connected between the subpixel electrode of the other subpixel and the discharge capacity electrode; A first scanning signal line for applying a scanning signal to the first switching element and the second switching element, and a first scanning signal line arranged in parallel to the first scanning signal line, for applying the scanning signal to the third switching element. A second scanning signal line; and a third scanning signal line overlapping with the first scanning signal line and the second scanning signal line on one end side of the first scanning signal line and the second scanning signal line. Features.
　本発明によれば、第３走査信号線に重なる第１走査信号線及び第２走査信号線において、一の第２走査信号線が断線した場合に、該一の第２走査信号線と、第３走査信号線とを電気的に接続することができる。また、前記一の第２走査信号線以外の第２走査信号線又は第１走査信号線と第３走査信号線とを電気的に接続できる。これにより、第２走査信号線の断線部分から先に走査信号を印加することが可能となる。したがって、走査信号線の断線による表示不良を防止することができ、歩留まりを向上させることができる。 According to the present invention, when one second scanning signal line is disconnected in the first scanning signal line and the second scanning signal line overlapping the third scanning signal line, the one second scanning signal line, The three scanning signal lines can be electrically connected. Further, the second scanning signal line other than the one second scanning signal line or the first scanning signal line and the third scanning signal line can be electrically connected. As a result, the scanning signal can be applied first from the disconnected portion of the second scanning signal line. Therefore, display defects due to disconnection of the scanning signal lines can be prevented, and the yield can be improved.
　本発明に係る液晶表示装置は、前記第３走査信号線は、前記第１走査信号線及び第２走査信号線の全てに重なっていることを特徴とする。 The liquid crystal display device according to the present invention is characterized in that the third scanning signal line overlaps all of the first scanning signal line and the second scanning signal line.
　本発明によれば、いずれの第２走査信号線が断線した場合であっても、断線による表示不良を防止することができ、歩留まりを向上させることができる。 According to the present invention, even if any of the second scanning signal lines is disconnected, it is possible to prevent a display defect due to the disconnection and to improve the yield.
　本発明に係る液晶表示装置は、前記第３走査信号線は、複数あることを特徴とする。 The liquid crystal display device according to the present invention is characterized in that there are a plurality of the third scanning signal lines.
　本発明によれば、複数の第２走査信号線が断線した場合であっても、断線による表示不良を防止することができ、歩留まりを向上させることができる。 According to the present invention, even when a plurality of second scanning signal lines are disconnected, display failure due to disconnection can be prevented, and yield can be improved.
　本発明に係る液晶表示装置は、前記第３走査信号線は、複数あり、全ての前記第１走査信号線及び第２走査信号線は、前記第３走査信号線と重なっていることを特徴とする。 The liquid crystal display device according to the present invention is characterized in that there are a plurality of the third scanning signal lines, and all the first scanning signal lines and the second scanning signal lines overlap the third scanning signal lines. To do.
　本発明によれば、いずれの第２走査信号線が断線した場合であっても、断線による表示不良を防止することができ、歩留まりを向上させることができる。また、複数の第２走査信号線が断線した場合であっても、断線による表示不良を防止することができ、歩留まりを向上させることができる。 According to the present invention, even if any of the second scanning signal lines is disconnected, it is possible to prevent a display defect due to the disconnection and to improve the yield. Further, even when the plurality of second scanning signal lines are disconnected, display failure due to disconnection can be prevented, and the yield can be improved.
　本発明によれば、走査信号線の断線による表示不良を防止することができ、歩留まりを向上することができる。 According to the present invention, it is possible to prevent display defects due to disconnection of the scanning signal lines, and to improve the yield.
実施の形態１に係る液晶表示装置の構成例を示すブロック図である。3 is a block diagram illustrating a configuration example of a liquid crystal display device according to Embodiment 1. FIG. 実施の形態１に係る液晶パネルで画素を画定する構成を模式的に示す説明図である。4 is an explanatory diagram schematically showing a configuration for defining pixels in the liquid crystal panel according to Embodiment 1. FIG. 第３走査信号線の接続の説明図である。It is explanatory drawing of the connection of a 3rd scanning signal line. 第３走査信号線の接続の説明図である。It is explanatory drawing of the connection of a 3rd scanning signal line. 実施の形態２に係る液晶表示装置の構成例を示すブロック図である。FIG. 6 is a block diagram illustrating a configuration example of a liquid crystal display device according to a second embodiment. 実施の形態３に係る液晶表示装置の構成例を示すブロック図である。FIG. 6 is a block diagram illustrating a configuration example of a liquid crystal display device according to a third embodiment. 実施の形態４に係る液晶表示装置の構成例を示すブロック図である。FIG. 6 is a block diagram illustrating a configuration example of a liquid crystal display device according to a fourth embodiment.
　以下、本発明をその実施の形態を示す図面に基づいて詳述する。
（実施の形態１）
　図１は、実施の形態１に係る液晶表示装置の構成例を示すブロック図であり、図２は、実施の形態１に係る液晶パネル１００で画素Ｐを画定する構成を模式的に示す説明図である。図１に示す液晶表示装置は、後述の電極対を複数含んで画定される画素Ｐ（点線で示す）が表示画面の垂直方向（以下、単に垂直方向又は列方向という）及び水平方向（以下、単に水平方向又は行方向という）にマトリックス状に配列された液晶パネル１００を備える。なお、図１においては、画素Ｐの一部を示している。 Hereinafter, the present invention will be described in detail with reference to the drawings illustrating embodiments thereof.
(Embodiment 1)
FIG. 1 is a block diagram illustrating a configuration example of a liquid crystal display device according to the first embodiment, and FIG. 2 is an explanatory diagram schematically illustrating a configuration in which pixels P are defined in the liquid crystal panel 100 according to the first embodiment. It is. In the liquid crystal display device shown in FIG. 1, pixels P (shown by dotted lines) defined by including a plurality of electrode pairs to be described later are arranged in a vertical direction (hereinafter, simply referred to as a vertical direction or a column direction) and a horizontal direction (hereinafter, referred to as a dotted line). The liquid crystal panel 100 is arranged in a matrix in a horizontal direction or a row direction. In FIG. 1, a part of the pixel P is shown.
　図２に示すように、画素Ｐは、液晶パネル１００の表示画面の垂直方向に二分された一の副画素ＳＰ１及び他の副画素ＳＰ２を有する。副画素ＳＰ１は、液晶層３を介して対向する副画素電極１１ａ及び対向電極２１の電極対と、不図示の絶縁層を介して対向する補助容量電極１２ａ及び補助容量対向電極２２ａの電極対とを含んで画定される。副画素電極１１ａには、ＴＦＴ（Thin Film Transistor）１５ａ（第１スイッチング素子に対応）の一端が接続されている。副画素電極１１ａ及び補助容量電極１２ａは電気的に接続されている。補助容量対向電極２２ａは対向電極２１の電位に接続されている。副画素電極１１ａ及び対向電極２１により、液晶容量Ｃｌｃ１が形成される。また、補助容量電極１２ａ及び補助容量対向電極２２ａにより、補助容量Ｃｃｓ１が形成される。 As shown in FIG. 2, the pixel P has one sub-pixel SP1 and another sub-pixel SP2 that are bisected in the vertical direction of the display screen of the liquid crystal panel 100. The sub-pixel SP1 includes an electrode pair of the sub-pixel electrode 11a and the counter electrode 21 facing each other through the liquid crystal layer 3, and an electrode pair of the auxiliary capacitor electrode 12a and the auxiliary capacitor counter electrode 22a facing each other through an insulating layer (not shown). Are defined. One end of a TFT (Thin FilmTransistor) 15a (corresponding to the first switching element) is connected to the subpixel electrode 11a. The subpixel electrode 11a and the auxiliary capacitance electrode 12a are electrically connected. The storage capacitor counter electrode 22 a is connected to the potential of the counter electrode 21. A liquid crystal capacitor Clc1 is formed by the sub-pixel electrode 11a and the counter electrode 21. The auxiliary capacitor Ccs1 is formed by the auxiliary capacitor electrode 12a and the auxiliary capacitor counter electrode 22a.
　副画素ＳＰ２は、液晶層３を介して対向する副画素電極１１ｂ及び対向電極２１の電極対と、補助容量電極１２ｂ及び補助容量対向電極２２ｂの電極対と、不図示の絶縁層を介して対向する放電容量電極１３及び放電容量対向電極２３の電極対とを含んで画定される。副画素電極１１ｂには、ＴＦＴ１５ｂ（第２スイッチング素子に対応）の一端が接続されている。副画素電極１１ｂ及び補助容量電極１２ｂは電気的に接続されている。放電容量電極１３はＴＦＴ１４（第３スイッチング素子に対応）を介して副画素電極１１ｂに接続されている。補助容量対向電極２２ｂ及び放電容量対向電極２３は対向電極２１の電位に接続されている。対向電極２１は、副画素ＳＰ１及びＳＰ２について共通であるが、これに限定されるものではない。副画素電極１１ｂ及び対向電極２１により、液晶容量Ｃｌｃ２が形成される。補助容量電極１２ｂ及び補助容量対向電極２２ｂにより、補助容量Ｃｃｓ２が形成される。また、放電容量電極１３及び放電容量対向電極２３により、放電容量Ｃｄｃが形成される。 The sub-pixel SP2 is opposed to the electrode pair of the sub-pixel electrode 11b and the counter electrode 21 facing each other through the liquid crystal layer 3, and the electrode pair of the auxiliary capacitor electrode 12b and the auxiliary capacitor counter electrode 22b through an insulating layer (not shown). The discharge capacity electrode 13 and the electrode pair of the discharge capacity counter electrode 23 are defined. One end of a TFT 15b (corresponding to the second switching element) is connected to the subpixel electrode 11b. The subpixel electrode 11b and the auxiliary capacitance electrode 12b are electrically connected. The discharge capacity electrode 13 is connected to the sub-pixel electrode 11b via the TFT 14 (corresponding to the third switching element). The auxiliary capacity counter electrode 22 b and the discharge capacity counter electrode 23 are connected to the potential of the counter electrode 21. The counter electrode 21 is common to the subpixels SP1 and SP2, but is not limited thereto. A liquid crystal capacitor Clc2 is formed by the sub-pixel electrode 11b and the counter electrode 21. The auxiliary capacitance Ccs2 is formed by the auxiliary capacitance electrode 12b and the auxiliary capacitance counter electrode 22b. Further, the discharge capacity Cdc is formed by the discharge capacity electrode 13 and the discharge capacity counter electrode 23.
　画素Ｐの水平方向の一の側方には、ＴＦＴ１５ａ及び１５ｂ夫々を介して副画素電極１１ａ及び１１ｂにソース信号を印加するためのソース信号線ＳＬが垂直方向に直線的に配されている。ソース信号線ＳＬには、ＴＦＴ１５ａ及び１５ｂの他端が接続されている。ＴＦＴ１５ａ及び１５ｂのゲート電極は、画素Ｐの中央部を水平方向に横切るように直線的に配された第１走査信号線ＧＬ１に接続されている。ＴＦＴ１４のゲート電極は、第１走査信号線ＧＬ１に列方向、即ち垂直方向に隣り合う第２走査信号線ＧＬ２に接続されている。 On one side of the pixel P in the horizontal direction, source signal lines SL for applying source signals to the sub-pixel electrodes 11a and 11b via the TFTs 15a and 15b are linearly arranged in the vertical direction. The other ends of the TFTs 15a and 15b are connected to the source signal line SL. The gate electrodes of the TFTs 15a and 15b are connected to a first scanning signal line GL1 that is linearly arranged so as to cross the central portion of the pixel P in the horizontal direction. The gate electrode of the TFT 14 is connected to the second scanning signal line GL2 adjacent to the first scanning signal line GL1 in the column direction, that is, in the vertical direction.
　ここで、図１に示すように、走査信号を印加するための複数の第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１及び複数の第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２は、垂直方向に交互に並設されている。ここで、垂直方向の一端側には第１走査信号線ＧＬ１が位置し、他端側には第２走査信号線ＧＬ２が位置している。 Here, as shown in FIG. 1, a plurality of first scanning signal lines GL1, GL1,... GL1 and a plurality of second scanning signal lines GL2, GL2,. Are arranged in parallel. Here, the first scanning signal line GL1 is positioned on one end side in the vertical direction, and the second scanning signal line GL2 is positioned on the other end side.
　更に、液晶パネル１００の水平方向の一端側において、第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１及び第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２の一端側には、一本の第３走査信号線ＧＬ３が配されている。第３走査信号線ＧＬ３は、ソース信号線ＳＬに略平行、即ち垂直方向に直線的に配され、例えば絶縁膜（不図示）を介して、第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１及び第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２のすべてに重なっている。 Further, on the one end side in the horizontal direction of the liquid crystal panel 100, one third scan is provided on one end side of the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,. A signal line GL3 is arranged. The third scanning signal line GL3 is substantially parallel to the source signal line SL, that is, linearly arranged in the vertical direction. For example, the first scanning signal lines GL1, GL1,. Overlaps all of the second scanning signal lines GL2, GL2,.
　液晶表示装置は、水平方向の他端側に配され、走査信号を印加するゲートドライバＧＤを備え、ゲートドライバＧＤには全ての第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１の他端が接続されている。第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２は、垂直方向の最も他端側に位置する第２走査信号線ＧＬ２を除き、一本ずつ、第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１を介して、ゲートドライバＧＤに接続されている。垂直方向の最も他端側に位置する第２走査信号線ＧＬ２は直接ゲートドライバＧＤに接続されている。ここで、垂直方向の最も一端側に位置する第１走査信号線ＧＬ１には、第２走査信号線ＧＬ２は接続されていない。なお、全ての第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２を、第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１を介さずに直接、ゲートドライバＧＤに接続してもよい。 The liquid crystal display device is arranged on the other end side in the horizontal direction and includes a gate driver GD for applying a scanning signal. The other end of all the first scanning signal lines GL1, GL1,... GL1 is connected to the gate driver GD. Has been. The second scanning signal lines GL2, GL2,... GL2 are connected to the first scanning signal lines GL1, GL1,... GL1 one by one, except for the second scanning signal line GL2 located on the most other end side in the vertical direction. Via the gate driver GD. The second scanning signal line GL2 located on the most other end side in the vertical direction is directly connected to the gate driver GD. Here, the second scanning signal line GL2 is not connected to the first scanning signal line GL1 positioned on the most end side in the vertical direction. All of the second scanning signal lines GL2, GL2,... GL2 may be directly connected to the gate driver GD without passing through the first scanning signal lines GL1, GL1,.
　また、ソース信号線ＳＬ，ＳＬ，・・ＳＬは、水平方向に並設されている。液晶表示装置は、垂直方向一端側に配され、ソース信号を印加するソースドライバＳＤを備える。ソース信号線ＳＬ，ＳＬ，・・ＳＬは、一端がソースドライバＳＤに接続されている。なお、図１においては、第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１、第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２及びソース信号線ＳＬ，ＳＬ，・・ＳＬの内の一部を示している。 Further, the source signal lines SL, SL,... SL are juxtaposed in the horizontal direction. The liquid crystal display device includes a source driver SD that is disposed on one end side in the vertical direction and applies a source signal. One end of each of the source signal lines SL, SL,... SL is connected to the source driver SD. 1 shows a part of the first scanning signal lines GL1, GL1,... GL1, the second scanning signal lines GL2, GL2,... GL2, and the source signal lines SL, SL,. ing.
　液晶表示装置は、ゲートドライバＧＤ及びソースドライバＳＤを用いて液晶パネル１００による表示を制御する表示制御回路４ａを備える。表示制御回路４ａは、画像を表す画像データを含む画像信号を受け付ける画像信号入力回路４０と、画像信号入力回路４０によって分離されたクロック信号及び同期信号に基づいてゲートドライバＧＤ及びソースドライバＳＤ夫々を制御するゲートドライバ制御回路４１及びソースドライバ制御回路４２とを有する。 The liquid crystal display device includes a display control circuit 4a that controls display by the liquid crystal panel 100 using the gate driver GD and the source driver SD. The display control circuit 4a receives an image signal input circuit 40 that receives an image signal including image data representing an image, and the gate driver GD and the source driver SD based on the clock signal and the synchronization signal separated by the image signal input circuit 40, respectively. A gate driver control circuit 41 and a source driver control circuit 42 are controlled.
　ゲートドライバ制御回路４１及びソースドライバ制御回路４２夫々は、ゲートドライバＧＤ及びソースドライバＳＤの周期的な動作に必要となるスタート信号、クロック信号、イネーブル信号等の制御信号を生成する。ソースドライバ制御回路４２は、また、画像信号入力回路４０によって分離されたデジタルの画像データをソースドライバＳＤへ出力する。 Each of the gate driver control circuit 41 and the source driver control circuit 42 generates control signals such as a start signal, a clock signal, and an enable signal necessary for the periodic operation of the gate driver GD and the source driver SD. The source driver control circuit 42 also outputs the digital image data separated by the image signal input circuit 40 to the source driver SD.
　ゲートドライバＧＤは、画像データの１フレーム期間内に、第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１及び第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２に対して、所定の時間差で順次走査信号を印加する。このとき、第１走査信号線ＧＬ１に接続された第２走査信号線ＧＬ２には、第１走査信号線ＧＬ１を介して、走査信号が印加される。したがって、１ライン分の画素Ｐ，Ｐ，・・Ｐ夫々に含まれるＴＦＴ１４のゲート電極には、対応する画素ＰのＴＦＴ１５ａ，１５ｂのゲート電極に印加される走査信号から１水平走査期間だけ遅れた走査信号が印加される。 The gate driver GD sequentially scans the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,. Is applied. At this time, a scanning signal is applied to the second scanning signal line GL2 connected to the first scanning signal line GL1 via the first scanning signal line GL1. Therefore, the gate electrode of the TFT 14 included in each of the pixels P, P,... P for one line is delayed by one horizontal scanning period from the scanning signal applied to the gate electrodes of the TFTs 15a and 15b of the corresponding pixel P. A scanning signal is applied.
　ソースドライバＳＤは、ソースドライバ制御回路４２から与えられたデジタルの画像データを１水平走査期間だけ蓄積して１ライン分の画像を表すアナログのソース信号を生成し、生成したソース信号をソース信号線ＳＬ，ＳＬ，・・ＳＬに並列的に印加する。ここでの１ライン分のソース信号は、上記所定の時間差で更新される。 The source driver SD accumulates digital image data supplied from the source driver control circuit 42 for one horizontal scanning period, generates an analog source signal representing an image for one line, and generates the generated source signal as a source signal line. SL, SL,... Applied in parallel to SL. The source signal for one line here is updated at the predetermined time difference.
　第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１の一つに印加された走査信号は、行方向に配列された１ライン分の画素Ｐ，Ｐ，・・Ｐ夫々に含まれるＴＦＴ１５ａ，１５ｂのゲート電極に印加される。このとき、上記１ライン分の画素Ｐ，Ｐ，・・Ｐ夫々に含まれるＴＦＴ１４のゲート電極には、対応する画素ＰのＴＦＴ１５ａ，１５ｂのゲート電極に印加される走査信号から１水平走査期間だけ遅れた走査信号が印加されるが、２水平走査期間以上遅れた走査信号が印加されるようにしてもよい。ＴＦＴ１４のゲート電極に印加される走査信号の遅れ量は、１フレーム期間に対して無視できる程度であることが好ましい。 The scanning signal applied to one of the first scanning signal lines GL1, GL1,... GL1 is the gate of the TFTs 15a and 15b included in the pixels P, P,. Applied to the electrode. At this time, the gate electrode of the TFT 14 included in each of the pixels P, P,... P for one line is applied only for one horizontal scanning period from the scanning signal applied to the gate electrodes of the TFTs 15a and 15b of the corresponding pixel P. A delayed scanning signal is applied, but a scanning signal delayed by two horizontal scanning periods or more may be applied. The amount of delay of the scanning signal applied to the gate electrode of the TFT 14 is preferably negligible for one frame period.
　ソース信号線ＳＬ，ＳＬ，・・ＳＬに印加されたソース信号は、一の第１走査信号線ＧＬ１に走査信号が印加される１水平走査期間に、前記一の第１走査信号線ＧＬ１にゲート電極が接続されたＴＦＴ１５ａ及び１５ｂ夫々を介して副画素電極１１ａ及び１１ｂに印加されると共に、補助容量電極１２ａ及び１２ｂにも印加される。これにより、副画素ＳＰ１及びＳＰ２夫々に形成された液晶容量Ｃｌｃ１及びＣｌｃ２と、補助容量Ｃｃｓ１及びＣｃｓ２とにソース信号が書き込まれる。このようにして１水平走査期間に１ライン分のソース信号が１ライン分の画素Ｐ，Ｐ，・・Ｐに同時的に書き込まれる。ここで、補助容量Ｃｃｓ１により、液晶容量Ｃｌｃ１に書き込まれたソース信号が安定的に保持され、補助容量Ｃｃｓ２により、液晶容量Ｃｌｃ２に書き込まれたソース信号が安定的に保持される。 The source signal applied to the source signal lines SL, SL,... SL is gated to the first scanning signal line GL1 in one horizontal scanning period in which the scanning signal is applied to the first scanning signal line GL1. The voltage is applied to the subpixel electrodes 11a and 11b via the TFTs 15a and 15b to which the electrodes are connected, and also to the auxiliary capacitance electrodes 12a and 12b. As a result, source signals are written into the liquid crystal capacitors Clc1 and Clc2 and the auxiliary capacitors Ccs1 and Ccs2 formed in the sub-pixels SP1 and SP2, respectively. In this way, one line of source signal is simultaneously written to one line of pixels P, P,... P in one horizontal scanning period. Here, the source signal written to the liquid crystal capacitor Clc1 is stably held by the auxiliary capacitor Ccs1, and the source signal written to the liquid crystal capacitor Clc2 is stably held by the auxiliary capacitor Ccs2.
　ＴＦＴ１４に電圧が印加され、オンとなった場合、放電容量Ｃｄｃへの電荷の移動により、Ｃｌｃ２の電圧はその絶対値が小さくなるように変化する。したがって、副画素ＳＰ１及びＳＰ２の実効電圧を変化させることができる。これにより、画素Ｐごとに副画素ＳＰ１及びＳＰ２間に明暗差又は輝度差を生じさせることができ、視野角特性が改善される。 When a voltage is applied to the TFT 14 and the TFT 14 is turned on, the voltage of the Clc 2 changes so that the absolute value thereof becomes smaller due to the movement of electric charge to the discharge capacity Cdc. Therefore, the effective voltage of the subpixels SP1 and SP2 can be changed. Thereby, a brightness difference or a brightness difference can be generated between the sub-pixels SP1 and SP2 for each pixel P, and the viewing angle characteristics are improved.
　液晶表示装置は、上述の動作により、視野角特性が改善された画像を表示する。しかしながら、液晶表示装置の製造段階において、第２走査信号線ＧＬ２が断線した場合、視野角特性の改善を行うことができず、表示不良となる虞がある。ここで、以下の如く第３走査信号線ＧＬ３を用いることにより、表示不良を防止できる。 The liquid crystal display device displays an image with improved viewing angle characteristics by the above-described operation. However, when the second scanning signal line GL2 is disconnected in the manufacturing stage of the liquid crystal display device, the viewing angle characteristics cannot be improved, and there is a risk of display failure. Here, display defects can be prevented by using the third scanning signal line GL3 as follows.
　図３Ａ及び図３Ｂは、第３走査信号線ＧＬ３の接続の説明図である。図３Ａ及び図３Ｂに示す液晶パネル１００においては、一の第２走査信号線ＧＬ２に断線が生じており、断線部分Ａが示されている。ここで、図３Ａに示すように、第３走査信号線ＧＬ３は、断線が生じた一の第２走査信号線ＧＬ２及び次のラインの第２走査信号線ＧＬ２に電気的に接続することができる。第３走査信号線ＧＬ３の接続は、例えば、接続する箇所にレーザーを照射し、絶縁膜、第２走査信号線ＧＬ２、第３走査信号線ＧＬ３を溶融させることにより行う。図３Ａにおいて、Ｘ印の部分が接続箇所である。これにより、断線部分Ａより先の画素に係るＴＦＴ１４には、第３走査信号線ＧＬ３に接続した第２走査信号線ＧＬ２を介して走査信号が印加され、放電容量Ｃｄｃが形成される。ここで、図３Ｂに示すように、第３走査信号線ＧＬ３は、断線が生じた第２走査信号線ＧＬ２及び次に走査信号が印加される第１走査信号線ＧＬ１に接続してもよい。 3A and 3B are explanatory diagrams of the connection of the third scanning signal line GL3. In the liquid crystal panel 100 shown in FIG. 3A and FIG. 3B, a disconnection occurs in one second scanning signal line GL2, and a disconnected portion A is shown. Here, as shown in FIG. 3A, the third scanning signal line GL3 can be electrically connected to one second scanning signal line GL2 and the second scanning signal line GL2 of the next line. . The connection of the third scanning signal line GL3 is performed, for example, by irradiating a laser beam to the connecting portion and melting the insulating film, the second scanning signal line GL2, and the third scanning signal line GL3. In FIG. 3A, the portion marked with X is a connection location. As a result, a scanning signal is applied to the TFT 14 relating to the pixel ahead of the disconnection portion A via the second scanning signal line GL2 connected to the third scanning signal line GL3, thereby forming a discharge capacitor Cdc. Here, as shown in FIG. 3B, the third scanning signal line GL3 may be connected to the second scanning signal line GL2 where the disconnection has occurred and the first scanning signal line GL1 to which the scanning signal is applied next.
　なお、ＧＬ３に接続される第２走査信号線ＧＬ２又は第１走査信号線ＧＬ１は、断線が生じた第２走査信号線ＧＬ２と同時に又はそれ以後に走査信号が印加される第２走査信号線ＧＬ２又は第１走査信号線ＧＬ１であれば何れであってもよい。 The second scanning signal line GL2 or the first scanning signal line GL1 connected to the GL3 is the second scanning signal line GL2 to which a scanning signal is applied simultaneously with or after the second scanning signal line GL2 in which the disconnection has occurred. Alternatively, any of the first scanning signal lines GL1 may be used.
　上記の構成によれば、一の第２走査信号線ＧＬ２が断線した場合に、該一の第２走査信号線ＧＬ２と、第３走査信号線ＧＬ３とを電気的に接続することができる。また、前記一の第２走査信号線ＧＬ２以外の第２走査信号線ＧＬ２又は第１走査信号線ＧＬ１と、第３走査信号線ＧＬ３とを電気的に接続できる。これにより、第２走査信号線ＧＬ２の断線部分から先に走査信号を印加することが可能となる。したがって、液晶表示装置において、断線による表示不良を防止することができ、歩留まりを向上させることができる。 According to the above configuration, when one second scanning signal line GL2 is disconnected, the one second scanning signal line GL2 and the third scanning signal line GL3 can be electrically connected. Further, the second scanning signal line GL2 or the first scanning signal line GL1 other than the one second scanning signal line GL2 can be electrically connected to the third scanning signal line GL3. As a result, the scanning signal can be applied first from the disconnected portion of the second scanning signal line GL2. Therefore, in the liquid crystal display device, display defects due to disconnection can be prevented, and the yield can be improved.
　第３走査信号線ＧＬ３は、第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１及び第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２の全てに重なっている。したがって、いずれの第２走査信号線ＧＬ２が断線した場合であっても、断線による表示不良を防止することができる。 The third scanning signal line GL3 overlaps all of the first scanning signal lines GL1, GL1,... GL1, and the second scanning signal lines GL2, GL2,. Therefore, even if any of the second scanning signal lines GL2 is disconnected, it is possible to prevent display defects due to the disconnection.
　なお、第３走査信号線ＧＬ３は、第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１及び第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２の全てに重ならず、一部に重なる配置又は長さであってもよい。この場合、第３走査信号線ＧＬ３が重なった範囲で、断線が生じた場合に、表示不良を防止できる。また、副画素の数は、二つに限られず、三つ以上であってもよい。 The third scanning signal line GL3 does not overlap all of the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,. It may be. In this case, display failure can be prevented when a disconnection occurs in the range where the third scanning signal line GL3 overlaps. Further, the number of sub-pixels is not limited to two and may be three or more.
（実施の形態２）
　図４は実施の形態２に係る液晶表示装置の構成例を示すブロック図である。実施の形態２に係る液晶表示装置の構成について、実施の形態１と同様な構成については、同一の符号を付してその詳細な説明を省略する。 (Embodiment 2)
FIG. 4 is a block diagram illustrating a configuration example of the liquid crystal display device according to the second embodiment. About the structure of the liquid crystal display device which concerns on Embodiment 2, about the structure similar to Embodiment 1, the same code | symbol is attached | subjected and the detailed description is abbreviate | omitted.
　実施の形態２においては、二本の第３走査信号線ＧＬ３，ＧＬ３がソース信号線ＳＬ，ＳＬ，・・ＳＬの略平行に配されている。二本の第３走査信号線ＧＬ３，ＧＬ３は、略平行に並べられ、夫々第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１及び第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２の全てに重なっている。 In the second embodiment, the two third scanning signal lines GL3, GL3 are arranged substantially parallel to the source signal lines SL, SL,. The two third scanning signal lines GL3, GL3 are arranged substantially in parallel and overlap each of the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,. Yes.
　したがって、いずれの第２走査信号線ＧＬ２が断線した場合であっても、また、複数の第２走査信号線ＧＬ２が断線した場合であっても断線による表示不良を防止でき、液晶表示装置の歩留まりを向上できる。なお、第３走査信号線ＧＬ２は、二本に限られず、三本以上であってもよい。 Therefore, even when any of the second scanning signal lines GL2 is disconnected, or even when the plurality of second scanning signal lines GL2 are disconnected, display defects due to disconnection can be prevented, and the yield of the liquid crystal display device can be prevented. Can be improved. The third scanning signal line GL2 is not limited to two, and may be three or more.
（実施の形態３）
　図５は実施の形態３に係る液晶表示装置の構成例を示すブロック図である。実施の形態３に係る液晶表示装置の構成について、実施の形態１と同様な構成については、同一の符号を付してその詳細な説明を省略する。 (Embodiment 3)
FIG. 5 is a block diagram illustrating a configuration example of the liquid crystal display device according to the third embodiment. About the structure of the liquid crystal display device which concerns on Embodiment 3, about the structure similar to Embodiment 1, the same code | symbol is attached | subjected and the detailed description is abbreviate | omitted.
　実施の形態３においては、二本の第３走査信号線ＧＬ３，ＧＬ３が配され、夫々ソース信号線ＳＬ，ＳＬ，・・ＳＬに略平行に配され、垂直方向の略同一直線上に並んでいる。したがって、二本の第３走査信号線は、第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１及び第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２に対して、異なる範囲で重なっている。ここで、全ての第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１及び第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２は、何れかの第３走査信号線ＧＬ３，ＧＬ３に重なっている。 In the third embodiment, two third scanning signal lines GL3, GL3 are arranged, are arranged substantially parallel to the source signal lines SL, SL,... SL, and are arranged on substantially the same straight line in the vertical direction. Yes. Therefore, the two third scanning signal lines overlap with the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,. Here, all the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,... GL2 overlap one of the third scanning signal lines GL3, GL3.
　したがって、いずれの第２走査信号線が断線した場合であっても、また、複数の第２走査信号線ＧＬ２が断線した場合であっても断線による表示不良を防止でき、液晶表示装置の歩留まりを向上できる。 Therefore, even if any of the second scanning signal lines is disconnected, or even when the plurality of second scanning signal lines GL2 are disconnected, display defects due to disconnection can be prevented, and the yield of the liquid crystal display device can be reduced. Can be improved.
　なお、全ての第１走査信号線及び第２走査信号線が第３走査信号線ＧＬ３に重なっていれば、二本の第３走査信号線ＧＬ３は、略同一直線上に並んでいなくともよい。また、第３走査信号線ＧＬ３は、二本に限られるものではなく、三本以上であってもよい。第３走査信号線ＧＬ３の数を増やすことにより多くの断線に対応できることとなる。 Note that if all the first scanning signal lines and the second scanning signal lines overlap the third scanning signal line GL3, the two third scanning signal lines GL3 do not have to be arranged on substantially the same straight line. . The third scanning signal line GL3 is not limited to two, and may be three or more. By increasing the number of third scanning signal lines GL3, it is possible to cope with many disconnections.
　また、第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１及び第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２の一部が、第３走査信号線ＧＬ３に重ならないように、二本の第３走査信号線ＧＬ３を配してもよい。この場合、二本の第３走査信号線ＧＬ３が第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１及び第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２に重なる範囲における断線による表示不良を防止できる。 Further, the second scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,. A signal line GL3 may be provided. In this case, it is possible to prevent display failure due to disconnection in the range where the two third scanning signal lines GL3 overlap the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,.
（実施の形態４）
　図６は実施の形態４に係る液晶表示装置の構成例を示すブロック図である。実施の形態４に係る液晶表示装置の構成について、実施の形態１と同様な構成については、同一の符号を付してその詳細な説明を省略する。 (Embodiment 4)
FIG. 6 is a block diagram illustrating a configuration example of the liquid crystal display device according to the fourth embodiment. About the structure of the liquid crystal display device which concerns on Embodiment 4, about the structure similar to Embodiment 1, the same code | symbol is attached | subjected and the detailed description is abbreviate | omitted.
　実施の形態４においては、第３走査信号線ＧＬ３は複数（図では六本）あり、全ての第３走査信号線ＧＬ３，ＧＬ３，・・ＧＬ３は、ソース信号線ＳＬ，ＳＬ，・・ＳＬに略平行に配され、複数本（図では三本）ずつ垂直方向に略同一直線上に並べて配されている。略同一直線上に並ぶ第３走査信号線は、異なる範囲で第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１及び第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２に重なっている。ここで、全ての、第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１及び第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２は、複数本（図では二本）の第３走査信号線ＧＬ３に重なっている。 In the fourth embodiment, there are a plurality of (three in the figure) third scanning signal lines GL3, and all the third scanning signal lines GL3, GL3,... GL3 are connected to the source signal lines SL, SL,. They are arranged substantially in parallel, and a plurality (three in the figure) are arranged on the substantially same straight line in the vertical direction. The third scanning signal lines arranged on substantially the same straight line overlap the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,. Here, all of the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,. ing.
　したがって、いずれの第２走査信号線が断線した場合であっても、また、複数の第２走査信号線ＧＬ２が断線した場合であっても断線による表示不良を防止でき、液晶表示装置の歩留まりを向上できる。 Therefore, even if any of the second scanning signal lines is disconnected, or even when the plurality of second scanning signal lines GL2 are disconnected, display defects due to disconnection can be prevented, and the yield of the liquid crystal display device can be reduced. Can be improved.
　なお、第３走査信号線ＧＬ３の数は図示の本数に限られず、略同一直線上に並ぶ第３走査信号線ＧＬ３の本数は図示の本数に限られない。更に、第１走査信号線ＧＬ１，ＧＬ１，・・ＧＬ１及び第２走査信号線ＧＬ２，ＧＬ２，・・ＧＬ２が重なる第３走査信号線ＧＬ３の本数は、図示の本数に限られない。 The number of third scanning signal lines GL3 is not limited to the number shown in the figure, and the number of third scanning signal lines GL3 arranged on substantially the same straight line is not limited to the number shown. Further, the number of the third scanning signal lines GL3 where the first scanning signal lines GL1, GL1,... GL1 and the second scanning signal lines GL2, GL2,.
　今回開示された実施の形態はすべての点で例示であって、制限的なものではないと考えられるべきである。本発明の範囲は、上記した意味ではなく、請求の範囲によって示され、請求の範囲と均等の意味及び範囲内でのすべての変更が含まれることが意図される。即ち、請求項に示した範囲で適宜変更した技術的手段を組み合わせて得られる実施形態も本発明の技術的範囲に含まれる。 It should be considered that the embodiment disclosed this time is illustrative in all respects and not restrictive. The scope of the present invention is defined not by the above-described meaning but by the scope of claims, and is intended to include all modifications within the meaning and scope equivalent to the scope of claims. That is, embodiments obtained by combining technical means appropriately changed within the scope of the claims are also included in the technical scope of the present invention.
　１１ａ，１１ｂ　副画素電極
　１３　放電容量電極
　１４，１５ａ，１５ｂ　ＴＦＴ
　ＧＬ１　第１走査信号線
　ＧＬ２　第２走査信号線
　ＧＬ３　第３走査信号線
　Ｐ　画素
　ＳＰ１，ＳＰ２　副画素 11a, 11b Subpixel electrode 13 Discharge capacity electrode 14, 15a, 15b TFT
GL1 first scanning signal line GL2 second scanning signal line GL3 third scanning signal line P pixel SP1, SP2 subpixel

Claims (4)

  1. 　マトリクス状に配列され、複数の副画素を有する画素と、
    　一の前記副画素の副画素電極に接続された第１スイッチング素子と、
    　他の前記副画素の副画素電極に接続された第２スイッチング素子と、
    　前記他の副画素に含まれた放電容量電極と、
    　前記他の副画素の副画素電極及び前記放電容量電極間に接続された第３スイッチング素子と、
    　前記第１スイッチング素子及び第２スイッチング素子に走査信号を印加するための第１走査信号線と、
    　前記第１走査信号線に並設され、前記第３スイッチング素子に走査信号を印加するための第２走査信号線と、
    　前記第１走査信号線及び第２走査信号線の一端側において、前記第１走査信号線及び第２走査信号線に重なっている第３走査信号線と
    　を備えることを特徴とする液晶表示装置。     Pixels arranged in a matrix and having a plurality of sub-pixels;
    A first switching element connected to a subpixel electrode of one of the subpixels;
    A second switching element connected to a subpixel electrode of another subpixel;
    A discharge capacitance electrode included in the other subpixel;
    A third switching element connected between the subpixel electrode of the other subpixel and the discharge capacitance electrode;
    A first scanning signal line for applying a scanning signal to the first switching element and the second switching element;
    A second scanning signal line arranged in parallel with the first scanning signal line and for applying a scanning signal to the third switching element;
    A liquid crystal display device comprising: a third scanning signal line overlapping with the first scanning signal line and the second scanning signal line on one end side of the first scanning signal line and the second scanning signal line.
  2. 　前記第３走査信号線は、前記第１走査信号線及び第２走査信号線の全てに重なっていることを特徴とする請求項１に記載の液晶表示装置。 The liquid crystal display device according to claim 1, wherein the third scanning signal line overlaps all of the first scanning signal line and the second scanning signal line.
  3. 　前記第３走査信号線は、複数あることを特徴とする請求項１又は請求項２に記載の液晶表示装置。 The liquid crystal display device according to claim 1, wherein there are a plurality of the third scanning signal lines.
  4. 　前記第３走査信号線は、複数あり、全ての前記第１走査信号線及び第２走査信号線は、前記第３走査信号線と重なっていることを特徴とする請求項１に記載の液晶表示装置。 2. The liquid crystal display according to claim 1, wherein there are a plurality of the third scanning signal lines, and all of the first scanning signal lines and the second scanning signal lines overlap with the third scanning signal lines. apparatus.
PCT/JP2015/075260 2015-09-04 2015-09-04 Liquid crystal display device WO2017037953A1 (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05203986A (en) * 1992-01-27 1993-08-13 Nec Corp Liquid crystal display device
JPH09288282A (en) * 1996-04-19 1997-11-04 Fujitsu Ltd Liquid crystal display device and disconnection processing method for bus line
JP2005326562A (en) * 2004-05-13 2005-11-24 Sony Corp Liquid crystal panel and method for manufacturing same
JP2012037890A (en) * 2010-08-05 2012-02-23 Samsung Electronics Co Ltd Display device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05203986A (en) * 1992-01-27 1993-08-13 Nec Corp Liquid crystal display device
JPH09288282A (en) * 1996-04-19 1997-11-04 Fujitsu Ltd Liquid crystal display device and disconnection processing method for bus line
JP2005326562A (en) * 2004-05-13 2005-11-24 Sony Corp Liquid crystal panel and method for manufacturing same
JP2012037890A (en) * 2010-08-05 2012-02-23 Samsung Electronics Co Ltd Display device

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