WO2017013769A1

WO2017013769A1 - Semiconductor device

Info

Publication number: WO2017013769A1
Application number: PCT/JP2015/070836
Authority: WO
Inventors: 孝靜朴; 一修田島
Original assignee: サンケン電気株式会社
Priority date: 2015-07-22
Filing date: 2015-07-22
Publication date: 2017-01-26

Abstract

This semiconductor device is provided with: a first semiconductor chip and a second semiconductor chip, which are disposed by being electrically insulated from each other; and a first signal path and a second signal path, which transmit signals from the first semiconductor chip to the second semiconductor chip by means of magnetic field coupling in a chip transformer wherein a conductor layer and an insulating layer are laminated. Operations of the second semiconductor chip are controlled by means of first control signals transmitted via the first signal path, and second control signals transmitted via the second signal path.

Description

Semiconductor device

The present invention relates to a semiconductor device having a plurality of semiconductor chips that are insulated from each other.

For example, by mounting a high-voltage semiconductor chip driven by a high power supply voltage and a low-voltage semiconductor chip driven by a low power supply voltage on one semiconductor device, the number of components can be reduced and space can be saved. realizable. It is also effective for space saving to mount a high-voltage semiconductor chip and a semiconductor chip that controls the operation of the high-voltage semiconductor chip in one semiconductor device.

In these cases, it is preferable to electrically isolate and isolate the semiconductor chips from each other for safety and stable operation. For insulation separation between semiconductor chips, it is effective to use an optical device or a transformer for signal transmission. For example, a method of increasing the signal propagation speed by using a substrate transformer has been proposed (see, for example, Patent Document 1).

International Publication No. 2013/027454

However, sufficient studies have not been made on techniques for high-speed signal propagation using a transformer. An object of the present invention is to provide a semiconductor device having an improved signal propagation speed between insulated semiconductor chips.

According to one aspect of the present invention, the first semiconductor chip and the second semiconductor chip that are electrically insulated from each other, and the first magnetic field coupling by the chip transformer in which the conductor layer and the insulating layer are stacked. A first signal path and a second signal path for transmitting a signal from the semiconductor chip to the second semiconductor chip, and the first control signal and the second signal transmitted via the first signal path A semiconductor device is provided in which the operation of the second semiconductor chip is controlled by the second control signal transmitted through the path.

According to the present invention, it is possible to provide a semiconductor device in which the signal propagation speed between insulated semiconductor chips is improved.

It is a schematic diagram which shows the structural example of the semiconductor device which concerns on embodiment of this invention. 4 is a timing chart for explaining an operation example of the semiconductor device according to the embodiment of the present invention. It is typical sectional drawing which shows the structural example of the chip transformer used for the semiconductor device which concerns on embodiment of this invention. It is a typical perspective view showing the 1st inductor of the chip transformer used for the semiconductor device concerning the embodiment of the present invention. It is a typical perspective view showing the 2nd inductor of the chip transformer used for the semiconductor device concerning the embodiment of the present invention. It is a typical perspective view which shows the shield of the chip transformer used for the semiconductor device which concerns on embodiment of this invention. It is a typical perspective view showing the 1st inductor and the 2nd inductor used for the transmission transformer of the semiconductor device concerning the embodiment of the present invention. It is typical sectional drawing which shows the structural example of the transmission transformer of the semiconductor device which concerns on embodiment of this invention. It is a typical top view showing pad arrangement of a transmission transformer of a semiconductor device concerning an embodiment of the present invention. It is a schematic diagram which shows the example of a layout of the semiconductor device which concerns on embodiment of this invention.

Next, an embodiment of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the planar dimensions, the ratio of the lengths of the respective parts, and the like are different from the actual ones. Therefore, specific dimensions should be determined in consideration of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

Further, the embodiments described below exemplify apparatuses and methods for embodying the technical idea of the present invention, and the technical idea of the present invention includes the shape, structure, arrangement, etc. of components. It is not specified to the following. The embodiment of the present invention can be variously modified within the scope of the claims.

As shown in FIG. 1, the semiconductor device 1 according to the embodiment of the present invention includes a first semiconductor chip 11, a second semiconductor chip 12, a third semiconductor chip 13, a first transmission transformer 21, and a second semiconductor chip 11. The transmission transformer 22 is provided. The first semiconductor chip 11, the second semiconductor chip 12, and the third semiconductor chip 13 are disposed so as to be electrically insulated from each other.

The first transmission transformer 21 and the second transmission transformer 22 are chip transformers having a structure in which a conductor layer and an insulating layer are stacked. The first transmission transformer 21 has a first signal path 201 and a second signal path 202 through which signals propagate due to magnetic field coupling in the chip transformer. The second transmission transformer 22 includes a third signal path 203 and a fourth signal path 204 through which signals propagate due to magnetic field coupling in the chip transformer. Details of the structure of the chip transformer will be described later.

The first semiconductor chip 11, the second semiconductor chip 12, the third semiconductor chip 13, the first transmission transformer 21 and the second transmission transformer 22 are molded and sealed with a molding material 15 such as an insulating resin. It is mounted on one package.

The first semiconductor chip 11 outputs a first control signal Sc1 and a second control signal Sc2 that control the operation of the second semiconductor chip 12. Further, the first semiconductor chip 11 outputs a third control signal Sc3 and a fourth control signal Sc4 that control the operation of the third semiconductor chip 13. The operation of the first semiconductor chip 11 is controlled by, for example, the microprocessor 2.

The first control signal Sc1 and the second control signal Sc2 are transmitted from the first semiconductor chip 11 to the second semiconductor chip 12 via the first transmission transformer 21. That is, the transmission side terminal Tx1 of the first signal path 201 of the first transmission transformer 21 and the transmission side terminal Tx2 of the second signal path 202 are connected to the first semiconductor chip 11. In addition, the reception-side terminal Rx 1 of the first signal path 201 of the first transmission transformer 21 and the reception-side terminal Rx 2 of the second signal path 202 are connected to the second semiconductor chip 12. Here, a terminal to which a signal propagating through the chip transformer is input from the outside is referred to as a “transmission side terminal”, and a terminal from which the signal is output to the outside is referred to as a “reception side terminal”. With the above connection, the first control signal Sc <b> 1 is transmitted from the first semiconductor chip 11 to the second semiconductor chip 12 through the first signal path 201. Then, the second control signal Sc <b> 2 is transmitted from the first semiconductor chip 11 to the second semiconductor chip 12 through the second signal path 202.

In addition, the third control signal Sc3 and the fourth control signal Sc4 are transmitted from the first semiconductor chip 11 to the third semiconductor chip 13 via the second transmission transformer 22. That is, the transmission side terminal Tx3 of the third signal path 203 of the second transmission transformer 22 and the transmission side terminal Tx4 of the fourth signal path 204 are connected to the first semiconductor chip 11. Further, the reception-side terminal Rx3 of the third signal path 203 of the second transmission transformer 22 and the reception-side terminal Rx4 of the fourth signal path 204 are connected to the third semiconductor chip 13. As a result, the third control signal Sc3 is transmitted from the first semiconductor chip 11 to the third semiconductor chip 13 via the third signal path 203. Then, the fourth control signal Sc4 is transmitted from the first semiconductor chip 11 to the third semiconductor chip 13 through the fourth signal path 204.

Hereinafter, the transmission side terminal Tx1, the transmission side terminal Tx2, the transmission side terminal Tx3, and the transmission side terminal Tx4 are collectively referred to as “transmission side terminal Tx”. The reception side terminal Rx1, the reception side terminal Rx2, the reception side terminal Rx3, and the reception side terminal Rx4 are collectively referred to as “reception side terminal Rx”.

As described above, the channel through which the first control signal Sc1 and the second control signal Sc2 propagate from the first semiconductor chip 11 to the second semiconductor chip 12 has an insulating structure using the first transmission transformer 21. is there. The channel through which the third control signal Sc3 and the fourth control signal Sc4 propagate from the first semiconductor chip 11 to the third semiconductor chip 13 has an insulating structure using the second transmission transformer 22. Therefore, the first semiconductor chip 11, the second semiconductor chip 12, and the third semiconductor chip 13 can be electrically insulated from each other. For this reason, the safety and operational stability of the semiconductor device 1 are improved.

The second semiconductor chip 12 and the third semiconductor chip 13 are formed with drive circuits for driving external elements. A drive signal Sd 1 for driving the external element 31 is output from the second semiconductor chip 12 to the external element 31. A drive signal Sd 2 for driving the external element 32 is output from the third semiconductor chip 13 to the external element 32. The

external elements

31 and 32 are, for example, power MOSFETs. At this time, the driving capabilities of the second semiconductor chip 12 and the third semiconductor chip 13 may be the same or different.

When the second semiconductor chip 12 or the third semiconductor chip is used as a drive chip for driving the power IC, the first semiconductor chip 11 is a control chip for controlling the drive chip. For example, the first control signal Sc <b> 1 is transmitted to the second semiconductor chip 12 as a set signal for turning on the external element 31 by the second semiconductor chip 12. In addition, a second control signal Sc2 is transmitted to the second semiconductor chip 12 as a reset signal that causes the external element 31 to be turned off by the second semiconductor chip 12. That is, the semiconductor device 1 employs a set reset (SR) method in which the set signal and the reset signal are transmitted through different signal paths.

The timing chart of the above operation will be described below with reference to FIG. FIG. 2 shows an operation example of the first transmission transformer 21.

First, an input signal IN is input to the first semiconductor chip 11. In response to the rising edge of the input signal IN, the first semiconductor chip 11 transmits the first control signal Sc1 to the second semiconductor chip 12. That is, the first semiconductor chip 11 outputs a pulse signal to the transmission side terminal Tx1 of the first signal path 201 of the first transmission transformer 21. As a result, a pulse signal is output to the reception-side terminal Rx1 of the first signal path 201. This pulse signal propagating through the first signal path 201 is input to the second semiconductor chip 12 as a set signal, and the second semiconductor chip 12 turns on the external element 31. For example, the drive signal Sd1 becomes high level and the external element 31 is turned on.

Thereafter, in response to the fall of the input signal IN, the first semiconductor chip 11 transmits the second control signal Sc2 to the second semiconductor chip 12. That is, the first semiconductor chip 11 outputs a pulse signal to the transmission-side terminal Tx2 of the second signal path 202 of the first transmission transformer 21. As a result, a pulse signal is output to the reception-side terminal Rx2 of the second signal path 202. This pulse signal propagating through the second signal path 202 is input to the second semiconductor chip 12 as a reset signal, and the second semiconductor chip 12 turns off the external element 31. For example, the drive signal Sd1 becomes a low level and the external element 31 is turned off.

As described above, the first signal path 201 is used as a signal path for transmitting a set signal, and the second signal path 202 is used as a signal path for transmitting a reset signal. Thus, the external element 31 can be operated at high speed by the SR method in which the set signal and the reset signal are transmitted through different signal paths. For example, the input / output delay time is shortened. According to the study by the present inventors, in the case of the conventional method in which the set signal and the reset signal are transmitted through the same signal path, the input / output delay time is about 400 nanoseconds, whereas the set signal and the reset signal Is transmitted through a different signal path, the input / output delay time is about 80 nanoseconds.

The third signal path 203 and the fourth signal path 204 can also be used as signal paths for transmitting the set signal and the reset signal. For example, the third control signal Sc3 is transmitted to the third semiconductor chip 13 as a set signal for turning on the external element 32 by the third semiconductor chip 13. In addition, the fourth control signal Sc4 is transmitted to the third semiconductor chip 13 as a reset signal that causes the external element 32 to be turned off by the third semiconductor chip 13.

Below, an example of the structure of a chip transformer will be described. For example, a structure as shown in FIG. 3 can be adopted for the chip transformer used in the semiconductor device 1.

The chip transformer 100 shown in FIG. 3 has a laminated structure in which a plurality of conductor layers are laminated with an insulating layer interposed therebetween. For example, a stacked body 130 including a plurality of conductor layers is disposed over a semiconductor substrate 110 such as a silicon substrate with an insulating film 120 such as a silicon oxide film interposed therebetween. The stacked body 130 has a structure in which a first conductor layer 1M, a second conductor layer 2M, a third conductor layer 3M, and a fourth conductor layer 4M are stacked with an insulating layer 135 interposed therebetween. is there. For example, the thickness of the semiconductor substrate 110 is about 400 μm, and the thickness of the stacked body 130 is about 10 to 30 μm.

The second conductor layer 2M is a first inductor layer in which a first inductor L1 having a spiral conductive pattern as shown in FIG. 4 is formed. One end of the first inductor L1 located at the center of the conductive pattern is electrically connected to the first conductor layer 1M by the plug 101 disposed in the insulating layer 135. The “plug” has a structure in which a conductive material is embedded in a through hole formed in the insulating layer 135.

The first conductor layer 1M is electrically connected to the pad P1a disposed on the upper surface of the chip transformer 100 via the plug 102. That is, the first conductor layer 1M is used as part of the wiring that electrically connects the first inductor L1 and the pad P1a. On the other hand, the other end located at the outer edge of the first inductor L1 is electrically connected to the pad P1b disposed on the upper surface of the chip transformer 100 via the plug 103.

The fourth conductor layer 4M is exposed on the surface of the stacked body 130 and disposed on the upper surface of the chip transformer 100. The fourth conductor layer 4M is a second inductor layer in which a second inductor L2 having a spiral conductive pattern as shown in FIG. 5 is formed. One end of the second inductor L2 located at the center of the conductive pattern is electrically connected to the pad P2a disposed on the inner side of the conductive pattern on the upper surface of the chip transformer 100. The other end located at the outer edge of the second inductor L2 is electrically connected to a pad P2b disposed outside the conductive pattern on the upper surface of the chip transformer 100.

In the chip transformer 100, signal propagation due to magnetic field coupling between the pads P1a and P1b and the pads P2a and P2b is achieved by the above structure in which the first inductor layer and the second inductor layer are stacked via the insulating layer. Done. It is preferable to form the first inductor L1 and the second inductor L2 so that the respective center positions coincide in plan view. According to the chip transformer 100, high-speed pulse signal communication having a pulse width of about several nanoseconds is possible.

In the chip transformer 100, it is preferable to dispose a conductive shield 136 as shown in FIG. 6 between the first inductor L1 and the second inductor L2. The shield 136 is formed on the third conductor layer 3M. This is due to the following reason.

In the chip transformer 100, a parasitic capacitance is formed between the first inductor L1 and the second inductor L2. There is a possibility that the charges accumulated in the parasitic capacitance move to an external circuit and an abnormal voltage or current is generated. By arranging the shield 136 between the first inductor L1 and the second inductor L2, the charge of the parasitic capacitance is discharged through the shield 136. Thereby, it can suppress that noise generate | occur | produces in the output of the semiconductor device 1. FIG.

The shield 136 is formed so as not to disturb the magnetic field communication in the chip transformer 100. For example, a U-shaped plate-shaped conductor shield 136 as shown in FIG. 6 is used so that the shield 136 does not shield between the centers of the first inductor L1 and the second inductor L2. The shield 136 is electrically connected to the pad Ps disposed on the upper surface of the chip transformer 100 via the plug 106. The pad Ps is grounded via a semiconductor chip to which the receiving side terminal Rx of the chip transformer 100 is connected, for example.

By the way, when the film thickness of the second conductor layer 2M, which is the lower layer side of the laminated body 130, is increased, the flatness is deteriorated, and there arises a problem that a defect occurs in the processes after the second conductor layer 2M. For this reason, it is relatively easy to increase the thickness of the fourth conductor layer 4M, but it is difficult to increase the thickness of the second conductor layer 2M. For example, the thickness of the second conductor layer 2M is set to about 1 μm, and the thickness of the fourth conductor layer 4M is set to about 4 μm.

When performing signal propagation by magnetic field coupling using the chip transformer 100, it is preferable that the on-resistance on the transmission side is smaller than that on the reception side in order to stably perform high-frequency signal propagation. For this reason, the pad P2a and the pad P2b connected to the second inductor L2 formed in the fourth conductor layer 4M having a large thickness are used as the transmission side terminal Tx. The pads P1a and P1b connected to the first inductor L1 formed on the second conductor layer 2M having a small film thickness are used as the reception-side terminal Rx. This facilitates the manufacture of the chip transformer 100 with good flatness.

In addition, when flatness can be ensured or when flatness is not a problem, the film thickness of the second conductor layer 2M may be set to the same thickness as the film thickness of the fourth conductor layer 4M. Or you may make the film thickness of the 2nd conductor layer 2M thicker than the film thickness of the 4th conductor layer 4M. In that case, the first inductor L1 formed in the second conductor layer 2M may be used as a transmitting inductor, and the second inductor L2 formed in the fourth conductor layer 4M may be used as a receiving inductor. it can.

Examples of the material of the first conductor layer 1M, the second conductor layer 2M, the third conductor layer 3M, and the fourth conductor layer 4M include aluminum (Al), copper (Cu), and AlCu. Conductive materials can be used. Further, the above conductive material can be used for the plug embedded in the insulating layer 135.

Note that the first transmission transformer 21 has a structure in which a chip transformer constituting the first signal path 201 and a chip transformer constituting the second signal path 202 are formed on the same semiconductor substrate 110. In this case, as shown in FIG. 7, the first inductor L1 (hereinafter referred to as “inductor L11”) that constitutes the first signal path 201 and the first inductor L1 that constitutes the second signal path 202 ( Hereinafter, “inductor L12” is formed on the same first inductor layer (second conductor layer 2M). The second inductor L2 (hereinafter referred to as “inductor L21”) constituting the first signal path 201 and the second inductor L2 (hereinafter referred to as “inductor L22”) constituting the second signal path 202. Are formed on the same second inductor layer (fourth conductor layer 4M).

In addition, as shown in FIG. 7, it is preferable to connect the edge part located in each outer edge part of the inductor L21 and the inductor L22 in the 4th conductor layer 4M. This connection location is electrically connected to a pad P20b disposed outside the conductive pattern on the upper surface of the first transmission transformer 21.

On the other hand, the end located at the center of the inductor L21 is electrically connected to the pad P21a disposed inside the inductor L21 on the upper surface of the first transmission transformer 21. Further, the end portion located at the center portion of the inductor L22 is electrically connected to the pad P22a disposed inside the inductor L22 on the upper surface of the first transmission transformer 21. In FIG. 7, the plugs connected to the inductor L11 and the inductor L12, the first conductor layer 1M, and the third conductor layer 3M are not shown.

As shown in FIG. 8, the end portion located at the center of the inductor L11 has a pad P11a disposed on the upper surface of the first transmission transformer 21 via the plug 1011, the first conductor layer 1M, and the plug 1021. And electrically connected. An end portion located at the outer edge portion of the inductor L11 is electrically connected to a pad P11b disposed on the upper surface of the first transmission transformer 21 via a plug 1031.

Further, the end portion located at the center of the inductor L12 is electrically connected to the pad P12a disposed on the upper surface of the first transmission transformer 21 through the plug 1012, the first conductor layer 1M, and the plug 1022. Is done. The end located at the outer edge of the inductor L12 is electrically connected to the pad P12b disposed on the upper surface of the first transmission transformer 21 via the plug 1032.

As shown in FIGS. 7 and 8, the number of pads can be reduced by connecting one end of each of the inductor L21 and the inductor L22 to the common pad P20b. Further, as shown in FIG. 8, by connecting the shield of the chip transformer constituting the first signal path 201 and the chip transformer constituting the second signal path 202, the shield pad Ps can be made common.

In the first signal path 201, a signal is propagated by magnetic field coupling between the pads P11a and P11b and the pads P21a and P20b by a structure in which the inductor L11 and the inductor L21 are stacked via an insulating layer. In the second signal path 202, a signal is propagated by magnetic field coupling between the pads P12a and P12b and the pads P22a and P20b by a structure in which the inductor L12 and the inductor L22 are stacked via an insulating layer.

As shown in FIG. 8, by using a common pad, the number of pads of the first transmission transformer 21 can be reduced as compared with the case where two chip transformers 100 are arranged. FIG. 9 shows a pad arrangement example of the first transmission transformer 21. Further, by using the first transmission transformer 21 including two chip transformers, the area required for the chip transformer arrangement can be reduced as compared with the case where the two chip transformers 100 are arranged side by side.

Also for the second transmission transformer 22, it is possible to adopt a structure in which the chip transformer constituting the third signal path 203 and the chip transformer constituting the fourth signal path 204 are formed on the same semiconductor substrate 110. In this case, the structure of the second transmission transformer 22 can be made the same as the structure of the first transmission transformer 21 shown in FIGS. That is, the inductor L11 constituting the third signal path 203 and the inductor L12 constituting the fourth signal path 204 are formed in the same first inductor layer. Then, the inductor L21 constituting the third signal path 203 and the inductor L22 constituting the fourth signal path 204 are formed in the same second inductor layer.

The input / output of signals to / from the semiconductor device 1 is performed through external leads 16 that penetrate the molding material 15 as shown in FIG. That is, the connection between the first semiconductor chip 11 and the microprocessor 2, the connection between the second semiconductor chip 12 and the external element 31, and the connection between the third semiconductor chip 13 and the external element 32 are the external leads 16. Is done through. For example, bonding wires are used to connect the first semiconductor chip 11, the second semiconductor chip, the third semiconductor chip, and the external leads 16. In addition, the connection between the first semiconductor chip 11 and the first transmission transformer 21 and the second transmission transformer 22, the connection between the first transmission transformer 21 and the second semiconductor chip 12, and the second transmission transformer. For example, a bonding wire is used for the connection between 22 and the third semiconductor chip 13.

As shown in FIG. 10, the region where the second semiconductor chip 12 is disposed and the region where the third semiconductor chip 13 is disposed are the first semiconductor chip 11, the first transmission transformer 21, and the second semiconductor chip 13. The transmission transformer 22 is arranged so as to face each other. For this reason, in the semiconductor device 1, the electromagnetic noise generated in the second semiconductor chip 12 or the third semiconductor chip 13 is suppressed from interfering with the other semiconductor chip.

When a metal frame such as a copper alloy material is used for the semiconductor device 1, the die pad that is the semiconductor chip mounting portion of the metal frame is divided into three parts, and the first semiconductor chip 11, the second semiconductor chip 12, The third semiconductor chip 13 is mounted on a separate die pad. As a result, the semiconductor chips are electrically and electromagnetically isolated from each other. The first transmission transformer 21 can be mounted on a die pad on which the second semiconductor chip 12 is mounted. The second transmission transformer 22 can be mounted on a die pad on which the third semiconductor chip 13 is mounted.

The semiconductor device 1 can be used for a part of an in-vehicle electronic circuit system of a hybrid vehicle. For example, the second semiconductor chip 12 and the third semiconductor chip 13 are used as a driving device for driving a high-voltage system circuit of a hybrid car, and the first semiconductor chip 11 is driven to drive a low-voltage system circuit of a hybrid car. Use as a device. Here, the low voltage system circuit is a circuit that is powered by a 12V system or 24V system battery, such as an in-vehicle electronic circuit, lights such as a headlight and a winker, and an ignition device for an internal combustion engine such as a gasoline engine or a diesel engine. It is. The high voltage system circuit is a circuit that drives an electric motor. In order to drive the electric motor, for example, the output of the 200V battery is boosted to a high voltage of 500V to 900V.

As described above, according to the semiconductor device 1 according to the embodiment of the present invention, the signal propagation speed between the insulated semiconductor chips is improved by using the chip transformer in the signal propagation path. Can do.

Unlike the embodiment of the present invention, when an optical device is used in the signal propagation path, the light receiving characteristic of the light receiving element is deteriorated due to the deterioration of the luminance of the light emitting element such as a light emitting diode, and the signal transmission response is lowered. . Further, when the optical device is placed in a high temperature environment, the luminance of the light emitting element is deteriorated and the light receiving characteristics of the light receiving element are rapidly deteriorated, and the service life is shortened.

On the other hand, in the semiconductor device 1 according to the embodiment of the present invention, since a chip transformer is used instead of an optical device in the signal propagation path, the signal transmission responsiveness is not deteriorated and the useful life is shortened. Absent. For example, the semiconductor device 1 according to the embodiment is suitable for in-vehicle use in which the environmental temperature is high.

Furthermore, the chip transformer is smaller than the substrate transformer and has a smaller coupling capacity. For this reason, the propagation speed of a signal can be improved by using a chip transformer. In addition, the size of the entire semiconductor device 1 can be reduced by using a chip transformer. Furthermore, since the size of the chip transformer is small, the influence of the external magnetic field received by the semiconductor device 1 can be suppressed. For example, when an external element having a large element current is arranged around the semiconductor device 1, the first transmission transformer 21 and the second transmission transformer 22 are affected by the magnetic field generated due to the operation of the external element. Can be suppressed.

(Other embodiments)
As mentioned above, although this invention was described by embodiment, it should not be understood that the description and drawing which form a part of this indication limit this invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

In the description of the above-described embodiment, a pair of signal paths including the first signal path 201 and the second signal path 202 and a pair of signal paths including the third signal path 203 and the fourth signal path 204 are used. A two-channel semiconductor device 1 is shown. However, the present invention can also be applied to a one-channel semiconductor device 1 having a pair of signal paths.

Thus, it goes without saying that the present invention includes various embodiments that are not described herein. Therefore, the technical scope of the present invention is defined only by the invention specifying matters according to the scope of claims reasonable from the above description.

The semiconductor device of the present invention can be used for a semiconductor device in which a plurality of semiconductor chips are arranged so as to be insulated from each other.

Claims

A first semiconductor chip and a second semiconductor chip, which are arranged to be electrically insulated from each other;
A first signal path and a second signal path for transmitting a signal from the first semiconductor chip to the second semiconductor chip by magnetic field coupling in a chip transformer in which a conductor layer and an insulating layer are stacked;
The operation of the second semiconductor chip is controlled by the first control signal transmitted via the first signal path and the second control signal transmitted via the second signal path. A semiconductor device.
The semiconductor device according to claim 1, further comprising a transmission transformer having the first signal path and the second signal path.
The second semiconductor chip has a drive circuit for driving an external element;
The first control signal is a set signal for turning on the external element by the second semiconductor chip;
The semiconductor device according to claim 1, wherein the second control signal is a reset signal that causes the external element to be turned off by the second semiconductor chip.
The chip transformer is
A first inductor layer on which a first inductor having a spiral conductive pattern is formed;
A second inductor layer on which a second inductor having a spiral conductive pattern is formed;
The semiconductor device according to claim 1, further comprising: an insulating layer disposed between the first inductor layer and the second inductor layer.
The film thickness of the second inductor layer disposed above the first inductor layer is larger than the film thickness of the first inductor layer,
The first inductor is connected to the second semiconductor chip;
The semiconductor device according to claim 4, wherein the second inductor is connected to the first semiconductor chip.
The semiconductor device according to claim 4, further comprising a conductive shield disposed inside the insulating layer between the first inductor and the second inductor.
Two first inductors are formed in the first inductor layer apart from each other;
The two second inductors are spaced apart from each other and one of the terminals is connected to each other, formed on the second inductor layer;
The first signal path and the second signal path each having a structure in which the first inductor, the insulating layer, and the second inductor are laminated are formed on the same semiconductor substrate. The semiconductor device according to claim 4.
A third semiconductor chip disposed electrically insulated from the first semiconductor chip and the second semiconductor chip;
A third signal path and a fourth signal path for transmitting a signal from the first semiconductor chip to the third semiconductor chip by magnetic field coupling in a chip transformer in which a conductor layer and an insulating layer are stacked;
The operation of the third semiconductor chip is controlled by the third control signal transmitted through the third signal path and the fourth control signal transmitted through the fourth signal path. The semiconductor device according to claim 1.
9. The semiconductor device according to claim 8, further comprising a transmission transformer having the third signal path and the fourth signal path.
The third semiconductor chip has a drive circuit for driving an external element;
The third control signal is a set signal for turning on the external element by the third semiconductor chip;
The semiconductor device according to claim 8, wherein the fourth control signal is a reset signal that causes the external element to be turned off by the third semiconductor chip.