WO2016206225A1 - Procédé et appareil d'annulation de filtrage fort et support de stockage informatique - Google Patents

Procédé et appareil d'annulation de filtrage fort et support de stockage informatique Download PDF

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Publication number
WO2016206225A1
WO2016206225A1 PCT/CN2015/091103 CN2015091103W WO2016206225A1 WO 2016206225 A1 WO2016206225 A1 WO 2016206225A1 CN 2015091103 W CN2015091103 W CN 2015091103W WO 2016206225 A1 WO2016206225 A1 WO 2016206225A1
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WO
WIPO (PCT)
Prior art keywords
value
output
parallel
equalizer
group
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PCT/CN2015/091103
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English (en)
Chinese (zh)
Inventor
周晏
邵晨峰
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深圳市中兴微电子技术有限公司
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Publication of WO2016206225A1 publication Critical patent/WO2016206225A1/fr

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/25Arrangements specific to fibre transmission
    • H04B10/2507Arrangements specific to fibre transmission for the reduction or elimination of distortion or dispersion

Definitions

  • the present invention relates to communication technologies, and in particular, to a strong filtering cancellation method and apparatus, and a computer storage medium.
  • optical fiber In the development of transmission technology, optical fiber has proved to be an indispensable medium. How to transmit the most abundant information with the least amount of optical fiber. For this kind of exploration, the development of optical transmission has basically gone through the following stages: Space Division Multiplexing (SDM), Time Division Multiplexing (TDM, Time) Division Multiplexing) Phase and Wavelength Division Multiplexing (WDM) phase.
  • SDM Space Division Multiplexing
  • TDM Time Division Multiplexing
  • WDM Wavelength Division Multiplexing
  • the system can only be expanded by laying new fiber optic cables or adding new equipment. This will increase the time and cost in the expansion process. Therefore, the system expansion has found a new alternative method - time division multiplexing.
  • the time division multiplexing stage once occupied the dominant position of system expansion. Later, because time division multiplexing affects existing services in the upgrade process, and lacks flexibility in system upgrade, the most important thing is that in the high rate stage, especially after 40G, TDM is electronic. The transmission rate limit of the device makes the TDM system expansion encounter ceiling effects. At this time, the system expansion naturally went to the wavelength division multiplexing stage. Wavelength division multiplexing has quickly become the mainstream solution for system expansion because of its economy, speed and maturity.
  • the industry uses a filtering method to solve chromatic dispersion, and a constant modulus algorithm to solve polarization film dispersion.
  • the strong filtering effect has little effect on the transmission performance in the 10G, 40G, etc., but with the development of communication technology, the original 40G transmission gradually evolves to 100G, 400G transmission, at the same time, The data transmission distance is also constantly expanding.
  • the strong filtering effect has an increasing influence on the transmission performance of dense wavelength division, but there is no technical solution for canceling the strong filtering.
  • embodiments of the present invention provide a strong filtering cancellation method and apparatus, and a computer storage medium.
  • the embodiment of the present invention provides a strong filtering cancellation method, which is applied to a strong filtering cancellation device.
  • the method includes:
  • the output value is determined and output.
  • the determining the hard decision result according to the parallel input weight includes:
  • the calculated parallel input weights are divided into a first group and a second group according to a preset rule
  • the determining the output value according to the soft value and the hard judgment result, and outputting includes:
  • the soft value is determined to be an output value and output.
  • the noise in the input signal channel is smoothed to obtain a received signal, including:
  • the noise in the input signal channel is smoothed by first-order delay filtering to obtain a received signal.
  • the equalizer is a quad parallel equalizer, and the equalizer is a Viterbi viterbi equalizer.
  • a weight calculation unit configured to smooth the noise in the input signal channel to obtain a received signal; and calculate parallel input weights according to the received signal and the theoretical signal;
  • Adding a comparison unit configured to determine a hard decision result and a corresponding soft value according to the parallel input weight
  • the backtracking soft value unit is configured to determine an output value and output according to the soft value and the hard decision result.
  • the comparison and selection unit is configured to divide the calculated parallel input weight into a first group and a second group according to a preset rule
  • the backtracking soft value unit is configured to determine that the preset fixed value is an output value and output when the hard decision result is the first set value
  • the soft value is determined to be an output value and output.
  • the weight calculation unit is configured to perform smoothing processing on noise in the input signal channel by first-order delay filtering to obtain a received signal.
  • the equalizer is a quad parallel equalizer, and the equalizer is a Viterbi viterbi equalizer.
  • Embodiments of the present invention provide a computer storage medium storing a computer program for performing the above-described strong filtering cancellation method.
  • the technical solution of the embodiment of the invention can effectively cancel the strong filtering and ensure the transmission performance.
  • FIG. 1 is a schematic flowchart diagram of an embodiment of a strong filtering cancellation method according to the present invention
  • FIG. 2 is a schematic structural diagram of an embodiment of a strong filter canceling apparatus according to the present invention.
  • FIG. 3 is a state transition diagram according to an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of implementation of first-order delay filtering according to an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of another embodiment of a strong filter canceling apparatus according to the present invention.
  • a strong filtering cancellation method provided by an embodiment of the present invention is applied to a strong filtering cancellation device.
  • the methods include:
  • Step 101 Smoothing noise in an input signal channel to obtain a received signal
  • the smoothing processing the noise in the input signal channel to obtain the received signal includes:
  • the noise in the input signal channel is smoothed by first-order delay filtering to obtain a received signal.
  • may be a coefficient greater than 0 and less than 1, and may be set according to a specific scene; the k represents a current sampling point, and the K-1 represents a sampling point before the current sampling point.
  • Step 102 Calculate parallel input weights according to the received signal and the theoretical signal
  • Step 103 Determine a hard decision result and a corresponding soft value according to the parallel input weight
  • the determining the hard decision result according to the parallel input weight includes:
  • the calculated parallel input weights are divided into a first group and a second group according to a preset rule; where the parallel input weights of the first group and the second group are the same, in practical applications,
  • the weights corresponding to the current input of 0 are grouped into groups, and the weights corresponding to the current input of 1 are divided into another group.
  • Step 104 Determine an output value according to the soft value and the hard judgment result, and output.
  • the determining, according to the soft value and the hard judgment result, the output value and outputting including:
  • the soft value is determined to be an output value and output.
  • the preset fixed value is determined to be an output value and output; when the hard judgment result is 0, the soft value is determined to be an output value and output.
  • the equalizer is a quad parallel equalizer, and the equalizer is a Viterbi viterbi equalizer.
  • the embodiment of the present invention provides a strong filtering cancellation device.
  • the device further includes:
  • the weight calculation unit 201 is configured to perform smoothing processing on noise in the input signal channel to obtain a received signal, and calculate parallel input weights according to the received signal and the theoretical signal;
  • the comparison selection unit 202 is configured to determine a hard decision result and a corresponding soft value according to the parallel input weight
  • the backtracking soft value unit 203 is configured to determine an output value and output according to the soft value and the hard decision result.
  • the equalizer is a quad parallel equalizer, and the equalizer may be a Viterbi viterbi equalizer.
  • the comparison and selection unit 202 is configured to divide the calculated parallel input weight into a first group and a second group according to a preset rule
  • the backtracking soft value unit 203 is configured to determine that the preset fixed value is an output value and output when the hard decision result is the first set value;
  • the soft value is determined to be an output value and output.
  • the weight calculation unit 201 is configured to smooth the noise in the input signal channel by first-order delay filtering to obtain a received signal.
  • the strong filtering cancellation technical solution proposed by the embodiment of the present invention adopts an N parallel viterbi equalizer, and the number of N may be a power of 2, that is, 2 n , where n is a positive integer.
  • each unit in the above-mentioned strong filter canceling device may be implemented by a central processing unit (CPU) in a strong filter canceling device, or a digital signal processor (DSP), or programmable.
  • CPU central processing unit
  • DSP digital signal processor
  • FPGA Field- Programmable Gate Array
  • the embodiment of the present invention uses first-order delay filtering to smooth the noise in the channel, and the N-parallel viterbi equalizer eliminates crosstalk between the signals.
  • the embodiment of the invention innovates in structure, so that the system adopting the technical solution of the invention has small area, low power consumption, large throughput, and low hardware implementation cost.
  • the technical solution of the embodiment of the present invention can be implemented and verified in a 100G optical communication DSP processing chip, and the system can effectively cancel the influence of the strong filtering effect in the real channel, and ensure the throughput of 128 Gbit/s is larger than the traditional implementation area. Reduced by 70% and reduced power consumption by 70%.
  • Embodiments of the Invention can also be stored in a computer readable storage medium if it is implemented in the form of a software function module and sold or used as a standalone product. Based on such understanding, the technical solution of the embodiments of the present invention may be embodied in the form of a software product in essence or in the form of a software product stored in a storage medium, including a plurality of instructions.
  • a computer device (which may be a personal computer, server, or network device, etc.) is caused to perform all or part of the methods described in various embodiments of the present invention.
  • the foregoing storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read only memory (ROM), a magnetic disk, or an optical disk.
  • program codes such as a USB flash drive, a mobile hard disk, a read only memory (ROM), a magnetic disk, or an optical disk.
  • an embodiment of the present invention further provides a computer storage medium, wherein a computer program is stored, and the computer program is used to execute the strong filtering cancellation method of the embodiment of the present invention.
  • the specific implementation of the embodiment is divided into four steps: 1. smoothing the noise in the channel by first-order delay filtering; 2. calculating the four parallel input weight values; 3. completing the hard-choice unit output hard decision result and soft value; The retrograde soft value output is output according to the hard judgment result; the following four steps in the method are described step by step.
  • Figure 3 is a state transition diagram, as shown in Figure 3, each line contains eight paths.
  • reception signal Y k and the corresponding weight W under the serial input are first introduced.
  • the second parameter ⁇ 1-2 ⁇
  • the third parameter ⁇ 2 ⁇ (1- ⁇ ) ⁇
  • the implementation method of the weight calculation unit in FIG. 5 can be obtained from Table 3. It can be seen that there are a large number of the same operation units in the 32 weights, and the same operation unit can be independently used in the hardware implementation.
  • soft value Store in the soft bit (bit) register according to the order of the input samples. It should be noted that the order of the storage must correspond to the position of the hard-check register. Representing soft values at times k, k-1, k-2, and k-3, respectively;
  • backtracking is a backtracking of a bit, each time you need to judge W 0 , W 1 , so that it is backtracking from sel0, or sel1 starts backtracking.
  • Output soft bit according to the result of hard judgment. Specifically, if the hard judgment result is 1, the output is fixed. Value, which is configurable by the register; if the hard decision result is 0, the corresponding value in the current soft bit register is output.
  • the strong filtering cancellation technical solution provided by the embodiment of the invention can ensure the quality of the transmitted signal while canceling the high frequency noise in the line.
  • the N parallel viterbi equalizer is proposed in the embodiment of the invention, and the cost is optimal.
  • the N parallel viterbi equalizer adopts a small area, low power consumption, and simple hardware implementation in a high-throughput scenario such as 100G and 400G.
  • 10% which is over-constrained; when N>4, at the same throughput, the storage unit area decreases much faster than the computational unit's logic complexity increases, resulting in an increase in area, power consumption, and timing.
  • the timing cost is optimal; in summary, Table 5 below.
  • embodiments of the present invention can be provided as a method, system, or computer program product. Accordingly, the present invention can take the form of a hardware embodiment, a software embodiment, or a combination of software and hardware. Moreover, the present invention may employ computer-usable storage media (including but not limited to disks) in one or more of the computer-usable program code embodied therein. A form of computer program product embodied on a memory and optical storage, etc.).
  • the present invention has been described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (system), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or FIG.
  • the computer program instructions can be provided to a processor of a general purpose computer, a special purpose computer, an embedded processor, or other programmable data processing device to produce a machine such that the instructions are executed by a processor or other programmable data processing device.
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device.
  • the apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps that are configured to implement the functions specified in one or more blocks of the flowchart or in a block or blocks of the flowchart.

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  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Noise Elimination (AREA)
  • Filters That Use Time-Delay Elements (AREA)
  • Dc Digital Transmission (AREA)

Abstract

L'invention concerne un procédé et un appareil d'annulation de filtrage fort, ainsi qu'un support de stockage informatique, N dispositifs d'équilibrage étant disposés en parallèle dans l'appareil, N = 2n, et n étant un nombre entier positif. Le procédé consiste : à réaliser un traitement de lissage sur du bruit dans un canal de signal d'entrée, de façon à obtenir un signal de réception ; à calculer des poids d'entrée parallèles selon le signal de réception et un signal théorique ; à déterminer un résultat de décision ferme et une valeur souple correspondante selon les poids d'entrée parallèles ; et à déterminer une valeur de sortie selon la valeur souple et le résultat de décision ferme, et à délivrer la valeur de sortie.
PCT/CN2015/091103 2015-06-24 2015-09-29 Procédé et appareil d'annulation de filtrage fort et support de stockage informatique WO2016206225A1 (fr)

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CN201510355422.5 2015-06-24
CN201510355422.5A CN106330321B (zh) 2015-06-24 2015-06-24 一种强滤波抵消方法和装置

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Cited By (1)

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CN113781354A (zh) * 2021-09-18 2021-12-10 北京环境特性研究所 图像噪点抑制方法、装置、计算设备及存储介质

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US20130294782A1 (en) * 2012-04-24 2013-11-07 The Royal Institution for the Advancement of Learning / McGill University Methods and Systems for Optical Receivers

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RU2420886C1 (ru) * 2007-03-02 2011-06-10 Квэлкомм Инкорпорейтед Конфигурирование повторителя
KR101529627B1 (ko) * 2008-12-23 2015-06-29 삼성전자 주식회사 이동통신 시스템의 채널 추정장치 및 방법
CN202305829U (zh) * 2011-10-27 2012-07-04 中国海洋石油总公司 一种光电数据转换装置
CN102664841B (zh) * 2012-04-30 2014-12-17 电子科技大学 Sc-fde系统低复杂度rls自适应信道估计的方法
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CN1836393A (zh) * 2003-06-30 2006-09-20 三菱电机株式会社 光接收装置和光接收方法
US20130294782A1 (en) * 2012-04-24 2013-11-07 The Royal Institution for the Advancement of Learning / McGill University Methods and Systems for Optical Receivers

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113781354A (zh) * 2021-09-18 2021-12-10 北京环境特性研究所 图像噪点抑制方法、装置、计算设备及存储介质
CN113781354B (zh) * 2021-09-18 2023-09-22 北京环境特性研究所 图像噪点抑制方法、装置、计算设备及存储介质

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