WO2016187343A1 - Power factor correction - Google Patents

Power factor correction Download PDF

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Publication number
WO2016187343A1
WO2016187343A1 PCT/US2016/033138 US2016033138W WO2016187343A1 WO 2016187343 A1 WO2016187343 A1 WO 2016187343A1 US 2016033138 W US2016033138 W US 2016033138W WO 2016187343 A1 WO2016187343 A1 WO 2016187343A1
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WO
WIPO (PCT)
Prior art keywords
controller
current
power supply
current loop
power factor
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Ceased
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PCT/US2016/033138
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French (fr)
Inventor
Shamim A. CHOUDHURY
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Texas Instruments Japan Ltd
Texas Instruments Inc
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Texas Instruments Japan Ltd
Texas Instruments Inc
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Publication of WO2016187343A1 publication Critical patent/WO2016187343A1/en
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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4225—Arrangements for improving power factor of AC input using a non-isolated boost converter
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the power factor of a power supply is the ratio of the real power delivered to a load divided by the apparent input power, where the apparent input power is the root-mean-square (RMS) input voltage times RMS input current.
  • RMS root-mean-square
  • input current harmonics cause the RMS value of the input current to be substantially higher than the current delivered to the load.
  • Many power supplies include power factor correction to reduce input current harmonics. Some jurisdictions legally require power factor correction for supplies with output power over a specified limit, which includes most power supplies for computer systems.
  • FIG. 1A illustrates an example of part of a power supply 100 (simplified to facilitate illustration and discussion) with conventional power factor correction.
  • An AC input voltage Vi is rectified by a full-wave rectifier 102.
  • An inductor 104 provides energy storage to enable a continuous input current.
  • a power factor correction (PFC) module 106 controls an electronic switch 108 using pulse-width-modulation (PWM) to control the DC output voltage V B and to generate a continuous sinusoidal input current in phase with the input voltage Vi.
  • PFC power factor correction
  • PWM pulse-width-modulation
  • the circuit of FIG. 1A may be a front end to a DC-DC converter. Alternatively, there may be multiple inductors and switches driving multiple DC outputs, which in turn may connect to multiple DC-DC converters.
  • FIG. IB illustrates an example of additional detail for the PFC module 106 of FIG. 1A.
  • the output bus voltage V B is subtracted from a reference voltage V REF at a summing node 1 10.
  • the resulting voltage error signal is input to a voltage loop controller 112, which regulates the bus voltage V B to be equal to V REF -
  • An RMS calculator 114 computes the inverse of the square of the RMS value of the input voltage Vi.
  • the output of controller 112 is multiplied by 1/VI 2 RM S by a multiplier 1 16. That result is multiplied by the input voltage Vi by a multiplier 118 with a gain of K, the value of which depends on system parameters.
  • Sensed current I SEN is subtracted from the reference current signal I REF at a summing node 120, and resulting current error signal is processed by a current loop controller 122, and the result is used to generate the PWM output that controls the electronic switch 108.
  • the operating conditions may vary widely, with input voltages ranging from 90V to 264V, and output loads varying from zero to full load.
  • the PFC power stage characteristics can change significantly, which results in a corresponding significant change in gain, bandwidth, and stability margins (phase margin and gain margin) of the current control loop, making it difficult to achieve a good power factor and low input current total harmonic distortion (TUD) under all operating conditions, especially for light loads and high input voltages.
  • TDD total harmonic distortion
  • a power supply includes a power factor correction module that is real-time adaptive based on the operating conditions.
  • FIG. 1A is a block diagram schematic of an example embodiment of part of a conventional power supply with power factor correction.
  • FIG. IB is a block diagram schematic illustrating additional detail for a power factor correction module of FIG. 1A.
  • FIG. 2A is a block diagram schematic illustrating an example embodiment of part of a power supply with improved power factor correction.
  • FIG. 2B is a block diagram schematic illustrating additional detail for a power correction module of FIG. 2 A.
  • a power factor controller uses an adaptive current loop controller that changes depending on the operating conditions.
  • a system controller switches among sets of control coefficients for the current loop controller, maintaining a high current loop gain for a wide range of operating conditions.
  • FIG. 2A illustrates an example of part of a power supply 200 (simplified to facilitate illustration and discussion) with improved power factor correction.
  • An AC input voltage Vi is rectified by a full-wave rectifier 202.
  • An inductor 204 provides energy storage to enable a continuous input current.
  • a PFC module 206 controls an electronic switch 208 using PWM to control the DC output voltage V B and to generate a continuous input current matching the shape of the rectified input voltage V RE C T and in phase with V RE C T -
  • the PFC module 206 of FIG. 2A uses the rectified input voltage V RE C T instead of the AC input voltage Vi as in FIG. 1 A.
  • FIG. 2B illustrates example additional detail for the PFC module 206 of FIG. 2A.
  • the output bus voltage V B is subtracted from a reference voltage V REF at a summing node 210.
  • the resulting voltage error signal is input to a voltage loop controller 212, which regulates the bus voltage V B to be equal to V REF -
  • the output Uy of the voltage loop controller 212 is then multiplied by three parameters (K, l/V 2 RECT(rms), and VRECT) to form a reference current IREF-
  • a RMS calculator 214 computes the RMS value of the rectified input voltage V RE C T - calculator 216 computes the inverse of the square of the RMS value of the rectified input voltage V RE C T -
  • the output Uy of the voltage loop controller 212 is multiplied by l/V 2 RE C T (rms) by a multiplier 218.
  • AGC automatic gain control
  • the current error signal from the output of summing node 224 is input to a selected current loop controller 228, and the result is used to control the PWM duty-cycle of the electronic switch 208 so that the output voltage V B is equal to V REF and the current IS E N tracks the shape and phase of the reference current signal I REF -
  • IS EN is both the input current and the output current, so that controlling IS EN also controls the power factor.
  • the selector of a current controller 228 is depicted as a switch 230 and the coupling of the output of the selected current controller 228 is depicted as a switch 232, but these can also be implemented as a multiplexer and a demultiplexer, or by firmware in a system controller. In one embodiment, essentially everything in the PFC module 206 is implemented by firmware in a system controller.
  • the AGC module 226 receives at least one calculated operating parameter.
  • the AGC module 226 receives the output U v of the voltage controller 212, and the calculated RMS value of the rectified input voltage V RE C T (rms)-
  • Each of these operating parameters is compared to a range of values.
  • the range of Uy may be 0-1
  • the range of V RE C T (rms) may be 90V to 260V.
  • current controllers 228 with higher gains are selected, and at higher values of U v , current controllers 228 with lower gains are selected.
  • V RE C T current controllers 228 with lower gains are selected, and at higher values of V RE C T (rms), current controllers 228 with higher gains are selected.
  • these selections may be done using IF/THEN statements. For example: IF (V RE C T (rms) is between 220V-260V AND U v is between 0.8 and 1.0) THEN select the current controller 228 having the lowest gain.
  • the sampling and averaging module 222 samples the current I SEN multiple times during each switching cycle and averages the current samples to improve accuracy under discontinuous inductor current mode.
  • the voltage loop controller 212 and the current loop controllers 228 may be any conventional loop control algorithms such as proportional-integrative-derivative (PID) or various compensation filters.
  • PID proportional-integrative-derivative
  • each of the current loop controllers 228 is a two-pole two-zero compensation filter, implemented as firmware in a system controller, having the following general z-transform form:
  • a method for power factor correction may include adapting, by a system controller, characteristics of a current loop controller, in a power factor correction module, to control power factor.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)
  • Dc-Dc Converters (AREA)

Abstract

In described examples, a power supply (200) includes a power factor correction module (206) that is real-time adaptive based on the operating conditions.

Description

POWER FACTOR CORRECTION
BACKGROUND
[0001] Electrical power supplies commonly use diode rectifier circuits to convert from alternating current (AC) to direct current (DC). A diode rectifier conducts current only when the input voltage of the rectifier exceeds the output voltage of the rectifier, so a sinusoidal input voltage results in intermittent non-sinusoidal current flow. The intermittent current flow has a primary frequency component equal to the AC input frequency and substantial energy at integer multiples of the AC input frequency (harmonics). Input current harmonics can cause transient current flow in the AC mains, which can increase the power required from the AC mains and can cause heating of the distribution system. Also, input current harmonics create electrical noise that can interfere with other systems connected to the AC mains. Increased power, heating, and electrical noise are especially important considerations for uninterruptable power supply (UPS) systems used to provide AC power in large computer server systems.
[0002] The power factor of a power supply is the ratio of the real power delivered to a load divided by the apparent input power, where the apparent input power is the root-mean-square (RMS) input voltage times RMS input current. Generally, input current harmonics cause the RMS value of the input current to be substantially higher than the current delivered to the load. Many power supplies include power factor correction to reduce input current harmonics. Some jurisdictions legally require power factor correction for supplies with output power over a specified limit, which includes most power supplies for computer systems.
[0003] FIG. 1A illustrates an example of part of a power supply 100 (simplified to facilitate illustration and discussion) with conventional power factor correction. An AC input voltage Vi is rectified by a full-wave rectifier 102. An inductor 104 provides energy storage to enable a continuous input current. A power factor correction (PFC) module 106 controls an electronic switch 108 using pulse-width-modulation (PWM) to control the DC output voltage VB and to generate a continuous sinusoidal input current in phase with the input voltage Vi. The circuit of FIG. 1A may be a front end to a DC-DC converter. Alternatively, there may be multiple inductors and switches driving multiple DC outputs, which in turn may connect to multiple DC-DC converters.
[0004] FIG. IB illustrates an example of additional detail for the PFC module 106 of FIG. 1A. The output bus voltage VB is subtracted from a reference voltage VREF at a summing node 1 10. The resulting voltage error signal is input to a voltage loop controller 112, which regulates the bus voltage VB to be equal to VREF- An RMS calculator 114 computes the inverse of the square of the RMS value of the input voltage Vi. The output of controller 112 is multiplied by 1/VI2 RMS by a multiplier 1 16. That result is multiplied by the input voltage Vi by a multiplier 118 with a gain of K, the value of which depends on system parameters. That result is used as a sinusoidal reference signal IREF for a current control loop. Sensed current ISEN is subtracted from the reference current signal IREF at a summing node 120, and resulting current error signal is processed by a current loop controller 122, and the result is used to generate the PWM output that controls the electronic switch 108.
[0005] For some power supplies, such as power supplies used for computer servers, the operating conditions may vary widely, with input voltages ranging from 90V to 264V, and output loads varying from zero to full load. Under such varying operating conditions, the PFC power stage characteristics can change significantly, which results in a corresponding significant change in gain, bandwidth, and stability margins (phase margin and gain margin) of the current control loop, making it difficult to achieve a good power factor and low input current total harmonic distortion (TUD) under all operating conditions, especially for light loads and high input voltages.
SUMMARY
[0006] In described examples, a power supply includes a power factor correction module that is real-time adaptive based on the operating conditions.
BRIEF DESCRIPTION OF THE DRAWINGS
[0007] FIG. 1A is a block diagram schematic of an example embodiment of part of a conventional power supply with power factor correction.
[0008] FIG. IB is a block diagram schematic illustrating additional detail for a power factor correction module of FIG. 1A.
[0009] FIG. 2A is a block diagram schematic illustrating an example embodiment of part of a power supply with improved power factor correction. [0010] FIG. 2B is a block diagram schematic illustrating additional detail for a power correction module of FIG. 2 A.
DETAILED DESCRIPTION OF EXAMPLE EMB ODFMENT S
[0011] As discussed above, a high power factor and low TUD are difficult to achieve under all operating conditions, especially for light loads and high input voltages.
[0012] In the improved design discussed below, instead of using a fixed current loop controller for all operating conditions, a power factor controller uses an adaptive current loop controller that changes depending on the operating conditions. In a firmware implementation, a system controller switches among sets of control coefficients for the current loop controller, maintaining a high current loop gain for a wide range of operating conditions.
[0013] FIG. 2A illustrates an example of part of a power supply 200 (simplified to facilitate illustration and discussion) with improved power factor correction. An AC input voltage Vi is rectified by a full-wave rectifier 202. An inductor 204 provides energy storage to enable a continuous input current. A PFC module 206 controls an electronic switch 208 using PWM to control the DC output voltage VB and to generate a continuous input current matching the shape of the rectified input voltage VRECT and in phase with VRECT- The PFC module 206 of FIG. 2A uses the rectified input voltage VRECT instead of the AC input voltage Vi as in FIG. 1 A.
[0014] FIG. 2B illustrates example additional detail for the PFC module 206 of FIG. 2A. The output bus voltage VB is subtracted from a reference voltage VREF at a summing node 210. The resulting voltage error signal is input to a voltage loop controller 212, which regulates the bus voltage VB to be equal to VREF- The output Uy of the voltage loop controller 212 is then multiplied by three parameters (K, l/V2RECT(rms), and VRECT) to form a reference current IREF- A RMS calculator 214 computes the RMS value of the rectified input voltage VRECT- calculator 216 computes the inverse of the square of the RMS value of the rectified input voltage VRECT- The output Uy of the voltage loop controller 212 is multiplied by l/V2 RECT(rms) by a multiplier 218. That result is multiplied by the rectifier output voltage VRECT by a multiplier 220 with a system dependent gain of K. That result is used as a reference current signal IREF for a current control loop. The variable gain K is used to adjust the range of the reference current signal IREF to the full range of the input voltage Vi. Sensed current ISEN is oversampled and averaged by a sampling and averaging module 222 and the averaged result is subtracted from the reference current signal IREF at a summing node 224. An automatic gain control (AGC) module 226 controls the selection of one of multiple current loop controllers 228, each of which has gain and control coefficients appropriate for a particular input voltage range and load range. The current error signal from the output of summing node 224 is input to a selected current loop controller 228, and the result is used to control the PWM duty-cycle of the electronic switch 208 so that the output voltage VB is equal to VREF and the current ISEN tracks the shape and phase of the reference current signal IREF- Notably, ISEN is both the input current and the output current, so that controlling ISEN also controls the power factor.
[0015] In the example of FIG. 2B, the selector of a current controller 228 is depicted as a switch 230 and the coupling of the output of the selected current controller 228 is depicted as a switch 232, but these can also be implemented as a multiplexer and a demultiplexer, or by firmware in a system controller. In one embodiment, essentially everything in the PFC module 206 is implemented by firmware in a system controller.
[0016] The AGC module 226 receives at least one calculated operating parameter. In the example of FIG. 2B, the AGC module 226 receives the output Uv of the voltage controller 212, and the calculated RMS value of the rectified input voltage VRECT(rms)- Each of these operating parameters is compared to a range of values. For example, the range of Uy may be 0-1 , and the range of VRECT(rms) may be 90V to 260V. At lower values of Uv, current controllers 228 with higher gains are selected, and at higher values of Uv, current controllers 228 with lower gains are selected. At lower values of VRECT(rms), current controllers 228 with lower gains are selected, and at higher values of VRECT(rms), current controllers 228 with higher gains are selected. For example, these selections may be done using IF/THEN statements. For example: IF (VRECT(rms) is between 220V-260V AND Uv is between 0.8 and 1.0) THEN select the current controller 228 having the lowest gain.
[0017] Under no-load or relatively light load conditions, relatively little current flows and relatively little energy is stored in the inductor 104. Under these conditions, the inductor may fail to provide current for the entire cycle so that current becomes discontinuous. In the PFC module 206 of figure 2B, the sampling and averaging module 222 samples the current ISEN multiple times during each switching cycle and averages the current samples to improve accuracy under discontinuous inductor current mode.
[0018] The voltage loop controller 212 and the current loop controllers 228 may be any conventional loop control algorithms such as proportional-integrative-derivative (PID) or various compensation filters. In one embodiment, each of the current loop controllers 228 is a two-pole two-zero compensation filter, implemented as firmware in a system controller, having the following general z-transform form:
Cx - C2z_1 + C3z~2
G (Z) " 1 - Qz-1 + C5z-2
where the coefficients Ci -C5 vary for each current loop controller 228 and they are selected to provide an appropriate gain and filter characteristic for selected combinations of Uv and
VRECT(rms)-
[0019] Accordingly, in example embodiments, a method for power factor correction may include adapting, by a system controller, characteristics of a current loop controller, in a power factor correction module, to control power factor.
[0020] Modifications are possible in the described embodiments, and other embodiments are possible, within the scope of the claims.

Claims

CLAIMS What is claimed is:
1. A power supply, comprising:
a power factor correction module having a current loop controller that is real-time adaptive based on the operating conditions.
2. The power supply of claim 1, wherein the power factor correction module selects among a plurality of current loop controllers.
3. The power supply of claim 2, wherein selection of a current loop controller depends on at least one measured operating parameter of the power supply.
4. The power supply of claim 3, wherein the measured operating parameter includes at least one of: a voltage controller output signal and a root-mean-square input voltage signal.
5. The power supply of claim 4, further comprising an automatic-gain-control module, capable of receiving the voltage controller output signal and the root-mean-square input voltage signal, and capable of selecting a current loop controller in response to the voltage controller output signal and the root-mean-square input voltage signal.
6. The power supply of claim 2, wherein each current loop controller is implemented as firmware in a system controller.
7. The power supply of claim 6, wherein the firmware in the system controller selects among sets of current loop controller coefficients.
8. The power supply of claim 7, wherein each set of controller coefficients is a set of coefficients of a two-pole two-zero compensation filter.
9. The power supply of claim 1, further comprising a sampling and averaging module to sample power factor correction module output current multiple times and average the samples for current feedback.
10. A method for power factor correction, comprising:
adapting, by a system controller, characteristics of a current loop controller, in a power factor correction module, to control power factor.
11. A method of claim 10, further comprising:
measuring, by the system controller, at least one operating parameter of a power supply.
12. A method of claim 11, wherein the adapting includes:
adapting, by the system controller, the current loop controller, based on the measured operating parameter.
13. The method of claim 12, wherein the adapting includes:
selecting, by the system controller, one current loop controller from a plurality of current loop controllers, based on the measured operating parameter.
14. The method of claim 10, further comprising:
sampling, current being controlled by the current loop controller, multiple times; and averaging the sampled currents for use as a feedback signal.
PCT/US2016/033138 2015-05-18 2016-05-18 Power factor correction Ceased WO2016187343A1 (en)

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Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9979281B2 (en) * 2016-10-07 2018-05-22 Excelitas Technologies Corp. Apparatus and method for dynamic adjustment of the bandwidth of a power converter
US10461654B2 (en) 2017-05-04 2019-10-29 Dell Products, Lp Power supply light load efficiency control circuit
CN110048597B (en) 2018-01-15 2021-01-15 株式会社村田制作所 Control method, controller and system of power factor correction circuit
US10686369B1 (en) 2019-07-24 2020-06-16 Dean Hatsuo Motoyama Device and process for detecting and mitigating reverse power-flow
WO2023078524A1 (en) * 2021-11-02 2023-05-11 Huawei Digital Power Technologies Co., Ltd. Apparatus and method for bi-directional ac/dc power conversion
CN117559827A (en) * 2022-08-04 2024-02-13 山特电子（深圳）有限公司 Stable control system and method based on unidirectional rectifier and staggered parallel booster
US20250373153A1 (en) * 2024-05-31 2025-12-04 Texas Instruments Incorporated Power factor correction converter system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070067069A1 (en) * 2005-09-22 2007-03-22 Artesyn Technologies, Inc. Digital power factor correction controller and AC-to-DC power supply including same
CN103840652A (en) * 2012-11-20 2014-06-04 上海儒竞电子科技有限公司 Composite power factor correction circuit
US20150117074A1 (en) * 2013-10-30 2015-04-30 Analog Devices, Inc. Auto-tuning current loop compensation for power factor correction controller

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8130522B2 (en) * 2007-06-15 2012-03-06 The Regents Of The University Of Colorado, A Body Corporate Digital power factor correction
US20080316779A1 (en) * 2007-06-19 2008-12-25 Chandrasekaran Jayaraman System and method for estimating input power for a power processing circuit
US8736246B2 (en) * 2011-09-22 2014-05-27 Acbel Polytech Inc. Power factor control circuit and power factor control method
US8861230B2 (en) * 2012-05-30 2014-10-14 Astec International Limited Control circuits for power converters
US8937469B2 (en) * 2012-10-09 2015-01-20 Delta-Q Technologies Corp. Digital controller based detection methods for adaptive mixed conduction mode power factor correction circuit
US9912229B2 (en) * 2013-12-31 2018-03-06 Texas Instruments Incorporated Multiple output integrated power factor correction
US9431894B2 (en) * 2014-08-29 2016-08-30 Nxp B.V. Inductance variation based compensation in boost converter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070067069A1 (en) * 2005-09-22 2007-03-22 Artesyn Technologies, Inc. Digital power factor correction controller and AC-to-DC power supply including same
CN103840652A (en) * 2012-11-20 2014-06-04 上海儒竞电子科技有限公司 Composite power factor correction circuit
US20150117074A1 (en) * 2013-10-30 2015-04-30 Analog Devices, Inc. Auto-tuning current loop compensation for power factor correction controller

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