CN103840652A - Composite power factor correction circuit - Google Patents
Composite power factor correction circuit Download PDFInfo
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- CN103840652A CN103840652A CN201210472357.0A CN201210472357A CN103840652A CN 103840652 A CN103840652 A CN 103840652A CN 201210472357 A CN201210472357 A CN 201210472357A CN 103840652 A CN103840652 A CN 103840652A
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- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
Provided in the invention is a composite power factor correction circuit comprising a power circuit and a control circuit. The control circuit is connected with the power circuit and is used for generating M*N-path phase-shift drive pulse signals and inputting the signals into the power circuit. The power circuit includes a rectifier bridge, M boost inductors, and an electrolytic capacitor; the output terminal of each boost inductor is respectively with N power devices; a positive terminal of the electrolytic capacitor is connected with a common terminal of negative output terminals of M backward fast recovery diodes to form a second positive output terminal; and a negative terminal of the electrolytic capacitor is connected with an emitter common terminal of M*N power devices to form a second negative output terminal. Besides, the control circuit includes a voltage outer-loop controller, M current inner-loop controllers, and a carrier generator; and each of the current inner-loop controllers is connected with N phase-shift comparison drivers. According to the invention, the power level can be effectively improved; the boost inductor design is simplified; the model selection and installation of the power devices can be realized conveniently; and the total cost is lowered.
Description
Technical field
The present invention relates to power electronic device technical field, particularly relate to a kind of circuit of power factor correction, specifically a kind of hybrid power factor correcting circuit.
Background technology
Single-phase active power factor corrector (APFC) has been widely applied in the frequency-conversion domestic electric appliances such as convertible frequency air-conditioner, as the front stage circuits of handing over orthogonal converter, and can AC-DC converter.Along with the trend of some application scenario convertible frequency air-conditioner high-power, need to develop the high-power single-phase APFC of corresponding power grade.Up to now, there is altogether following alternative circuit: (1) multistage staggered APFC; (2) single-stage APFC, considers power device parallel connection; (3) single-stage APFC, selects high-power component.
The first scheme: advantage is can share power between APFC at different levels, boost inductance can be installed at plate, and deficiency is that the ripple frequency of boost inductance is equal to carrier frequency, need to consider at different levels between equal flow problems, boost inductance current detecting difficulty, control program is comparatively complicated.
First scheme: advantage is just can bring to power grade, and deficiency is that the ripple frequency of boost inductance is equal to carrier frequency, and boost inductance can not be installed at plate, need to consider between power device all flow problems.For APFC more than 5.0kW, although feasible in this scheme principle, technically and unreasonable economically, be difficult for adopting.
The third scheme: advantage is just can bring to power grade, and deficiency is that the ripple frequency of boost inductance is equal to carrier frequency, and boost inductance can not be very difficult in plate installing device type selecting, indices is all difficult to improve.Similar first scheme, for APFC more than 5.0kW, although feasible in this scheme principle, technically and unreasonable economically, be difficult for adopting.
For this reason, for high-power APFC application scenario, the first scheme is feasible generally, but in the time adopting power device in parallel, also need prior art especially Driving technique to improve, to solve the problems such as boost inductance design, power device type selecting, be intended to improve overall performance.
Through the retrieval of prior art is found to following document has also encircleed high-power APFC:
【1】Michael?O'Loughlin.UCC28070?300-W?Interleaved?PFC?Pre-Regulator?Design?Review.ApplicationReport.SLUA479B-August?2008-Revised?July?2010；【2】RENESAS?Electronics?Corporation,R2A20104/114APN?Rev.1.5?2010.07.23.http://www.renesas.com；【3】Fairchild?Semiconductor?Corporation,FANxxxx-ThreeChannels?Interleaved?CCM?PFC?Controller.2011，Rev.0.2.Preliminary?Version.www.fairchildsemi.com；【4】Thomas?Nussbaumer,Johann?W.Kolar.Design?Guidelines?for?Interleaved?Single-PhaseBOOST?PFC?Circuits[J].IEEE?Trans,power?electron,vol.56,no.7,pp.2559–2573,July?200。
Above document also all exists as problems such as boost inductance design and installation question, power device type selecting and installations.
Summary of the invention
The shortcoming of prior art in view of the above, the object of the present invention is to provide a kind of hybrid power factor correcting circuit, the power device type selecting and installation difficulty and the higher problem of cost that exist for solving existing circuit of power factor correction.
For achieving the above object and other relevant objects, the invention provides a kind of hybrid power factor correcting circuit, comprising: power circuit be connected with described power circuit, for generation of the drive pulse signal of M × N road phase shift and be input to the control circuit in described power circuit; Rectifier bridge, is connected with single-phase alternating current, and described rectifier bridge output forms the first cathode output end and the first cathode output end; M boost inductance, the input of each boost inductance is connected with described the first cathode output end, and the output of each boost inductance is connected with N power device respectively, and described in each, the other end of power device is connected with described the first cathode output end; M reverse fast recovery diode, each reverse fast recovery diode anode correspondence is connected with the output of a boost inductance; Electrochemical capacitor, the positive terminal of described electrochemical capacitor is connected with the common port of the cathode end of M reverse fast recovery diode, form the second cathode output end, the negative pole end of described electrochemical capacitor is connected with the emitter common port of M × N power device, forms the second cathode output end; Described control circuit comprises: outer voltage controller, is connected with the output of described power circuit, for obtaining voltage control quantity; M current inner loop controller, is connected with described power circuit with described outer voltage controller, for obtaining Current Control amount; Carrier generator, for generation of carrier signal; Relatively driver of M × N phase shift, is connected with the power device in described current inner loop controller, carrier generator and described power circuit respectively, gives described power circuit for generation of the drive pulse signal of M × N road phase shift; Wherein described in each, current inner loop controller is connected with relatively driver of N phase shift; Wherein M, N are greater than 2 positive integer.
Alternatively, described power device is insulated gate bipolar transistor, and between the collector and emitter of described insulated gate bipolar transistor, connecting inverse parallel has fly-wheel diode; The collector electrode of described insulated gate bipolar transistor is connected with the anode of fly-wheel diode, and emitter is connected with the negative electrode of electrochemical capacitor.
Alternatively, described power circuit also comprises inspection leakage resistance, and one end of described inspection leakage resistance is connected with the first cathode output end, and the other end is connected with the emitter of insulated gate bipolar transistor described in each respectively.
Alternatively, the described phase shift comparison output of driver and the gate pole of described insulated gate bipolar transistor are connected.
Alternatively, described outer voltage controller obtains voltage control quantity according to the direct voltage of the output in power circuit with reference to direct voltage.
Alternatively, the current signal in described current controller forms according to the voltage control quantity in described outer voltage controller, the first cathode output end and the first cathode output end input voltage detection signal and boost inductance obtains Current Control amount.
Alternatively, each phase shift relatively driver produces driving pulse according to the carrier signal of the Current Control amount of described current inner loop controller output and carrier generator generation, and described driving pulse is input in the power device in described power circuit.
Alternatively, described rectifier bridge is both arms diode rectifier bridge; The live wire of described single-phase alternating current is connected with two brachium pontis mid points of described both arms diode rectifier bridge respectively after being connected ac capacitor with zero line.
Alternatively, between described the first cathode output end and the first cathode output end, be connected with the first resistance, the second resistance and the 3rd resistance of series connection.
As mentioned above, a kind of hybrid power factor correcting circuit of the present invention, has following beneficial effect:
1, the present invention is by adopting M level cross structure at power circuit, every grade of cross structure comprises the heavy power device of N in parallel, control circuit produces the driving signal of MN road phase shift, for driving power circuit power device, can effectively reach raising power grade, simplify boost inductance design, be convenient to power device type selecting and installation, reduce overall cost, can be widely used in single phase power factor correcting circuit.
2, circuit structure of the present invention is simple, and control algolithm is easy, reduces design time.
3, the present invention adopts the phase shift trigger theory of multiple power device to realize unity power factor to proofread and correct, and the ripple frequency of the boost inductance that doubled, is conducive to the Miniaturization Design of boost inductance, has reduced switching loss and the conduction loss of power device simultaneously.
Accompanying drawing explanation
Fig. 1 is shown as the structural representation of power circuit in a kind of hybrid power factor correcting circuit of the present invention.
Fig. 2 is shown as the structural representation of control circuit in a kind of hybrid power factor correcting circuit of the present invention.
Element numbers explanation
1 power circuit
2 control circuits
Embodiment
By particular specific embodiment explanation embodiments of the present invention, person skilled in the art scholar can understand other advantages of the present invention and effect easily by the disclosed content of this specification below.
Refer to Fig. 1.Notice, appended graphic the illustrated structure of this specification, ratio, size etc., all contents in order to coordinate specification to disclose only, understand and read for person skilled in the art scholar, not in order to limit the enforceable qualifications of the present invention, therefore the not technical essential meaning of tool, the adjustment of the modification of any structure, the change of proportionate relationship or size, not affecting under effect that the present invention can produce and the object that can reach, all should still drop on disclosed technology contents and obtain in the scope that can contain.Simultaneously, in this specification, quote as " on ", the term of D score, " left side ", " right side ", " centre " and " " etc., also only for ease of understanding of narrating, but not in order to limit the enforceable scope of the present invention, the change of its relativeness or adjustment, changing under technology contents, when being also considered as the enforceable category of the present invention without essence.
Current power factor correcting circuit all ubiquity as problems such as boost inductance design and installation question, power device type selecting and installations.In view of this, the object of the present invention is to provide a kind of hybrid power factor correcting circuit, the power device type selecting and installation difficulty and the higher problem of cost that exist for solving existing circuit of power factor correction.To elaborate principle and the execution mode of a kind of hybrid power factor correcting circuit of the present invention below, make those skilled in the art not need creative work can understand a kind of hybrid power factor correcting circuit of the present invention.
Refer to Fig. 1 and Fig. 2, be shown as the structural representation of a kind of hybrid power factor correcting circuit of the present invention.As depicted in figs. 1 and 2, the invention provides a kind of hybrid power factor correcting circuit, comprising: power circuit 1 and control circuit 2.
Described power circuit 1 and single phase alternating current power supply u
inbe connected, DC voltage output end be provided, and be connected with control circuit 2, there is each other signal contact.
Refer to Fig. 1, be shown as the structural representation of power circuit in a kind of hybrid power factor correcting circuit of the present invention.As shown in Figure 1, described power circuit 1 at least comprises rectifier bridge B1, a M boost inductance, M × N power device, an electrochemical capacitor E1 and an inspection leakage resistance R8.
Rectifier bridge B1, with single phase alternating current (A.C.) source u
inbe connected, described rectifier bridge B1 output forms the first cathode output end DCP1 and the first cathode output end DCN1.Particularly, in the present embodiment, described rectifier bridge B1 is both arms diode rectifier bridge; The live wire ACL of described single-phase alternating current is connected with two brachium pontis mid points of described both arms diode rectifier bridge respectively with zero line ACN.Further, described both arms diode rectifier bridge is made up of four diodes (the diode Di1 shown in figure, diode Di2, diode Di3 and diode Di4).
Simultaneously, two inputs of described both arms diode rectifier bridge, namely between the live wire ACL of described single-phase alternating current and zero line ACN, be connected with ac capacitor C1, one end of described ac capacitor C1 is connected with the live wire ACL of described single-phase alternating current, and the other end is connected with the zero line ACN of described single-phase alternating current.
Between the first cathode output end DCP1 that described rectifier bridge B1 output forms and the first cathode output end DCN1, be connected with the first resistance R 1, the second resistance R 2 and the 3rd resistance R 3 of series connection.Between the first cathode output end DCP1 and the first cathode output end DCN1, form input voltage detection signal | u
in|.
M boost inductance, the input of each boost inductance is connected with described the first cathode output end DCP1, the output of each boost inductance is connected with N power device respectively, one total M × N power device, described in each, the other end of power device is connected with described the first cathode output end DCN1, and wherein M, N are greater than 2 positive integer.
Specifically refer to Fig. 1, the input of the first boost inductance L1 is connected with the first cathode output end DCP1, and the output of the first boost inductance L1 is connected with the collector electrode of power device S11 ~ power device S1N; The input of the second boost inductance L2 is connected with the first cathode output end DCP1, and the output of the second boost inductance L2 is connected with power device S21 ~ power device S2N collector electrode; By that analogy, (M-1) boost inductance L
(M-1)input be connected with the first cathode output end DCP1, (M-1) boost inductance L
(M-1)output be connected with power device S (M-1) 1 ~ power device S1 (M-1) N collector electrode; M boost inductance L
minput be connected with the first cathode output end DCP1, M boost inductance L
moutput be connected with power device SM1～power device SMN collector electrode.
The first boost inductance L1, the second boost inductance L2 are until (M-1) boost inductance L
(M-1), M boost inductance L
mthe current i of corresponding output the first boost inductance respectively
l1, the second boost inductance current i
l2until the current i of (M-1) boost inductance
l (M-1), M boost inductance current i
lM.
In the present embodiment, described power device is insulated gate bipolar transistor, between the collector and emitter of described insulated gate bipolar transistor, is connected with fly-wheel diode; The collector electrode of described insulated gate bipolar transistor is connected with the negative electrode of fly-wheel diode, and emitter is connected with the anode of fly-wheel diode.
Particularly, as shown in Figure 1,
The output of the first boost inductance L1 is connected with the anode of sustained diode 1N to the collector electrode of insulated gate bipolar transistor P1N with the collector electrode of insulated gate bipolar transistor P11 and the negative electrode of sustained diode 11 respectively, and the anode of the emitter of insulated gate bipolar transistor P11 and sustained diode 11 to the emitter of insulated gate bipolar transistor P1N and the anode of sustained diode 1N is connected with described the first cathode output end DCN1 by inspection leakage resistance R8.
The output of the second boost inductance L2 is connected with the anode of sustained diode 2N to the collector electrode of insulated gate bipolar transistor P2N with the collector electrode of insulated gate bipolar transistor P21 and the negative electrode of sustained diode 21 respectively, and the anode of the emitter of insulated gate bipolar transistor P21 and sustained diode 21 to the emitter of insulated gate bipolar transistor P2N and the anode of sustained diode 2N is connected with described the first cathode output end DCN1 by inspection leakage resistance R8.
The like, the annexation of the 3rd boost inductance to the (M-2) boost inductance and power device does not repeat one by one at this.
(M-1) boost inductance L
(M-1)output be connected with the anode of sustained diode (M-1) N to the collector electrode of insulated gate bipolar transistor P (M-1) N with the collector electrode of insulated gate bipolar transistor P (M-1) 1 and the negative electrode of sustained diode (M-1) 1 respectively, the anode of the emitter of insulated gate bipolar transistor P (M-1) 1 and sustained diode (M-1) 1 to the emitter of insulated gate bipolar transistor P (M-1) N and the anode of sustained diode (M-1) N is connected with described the first cathode output end DCN1 by inspection leakage resistance R8.
M boost inductance L
moutput be connected with the negative electrode of sustained diode MN to the collector electrode of insulated gate bipolar transistor PMN with the collector electrode of insulated gate bipolar transistor PM1 and the anode of sustained diode M1 respectively, the anode of the emitter of insulated gate bipolar transistor PM1 and sustained diode M1 to the emitter of insulated gate bipolar transistor PMN and the anode of sustained diode MN is connected with described the first cathode output end DCN1 by inspection leakage resistance R8.
Described in each, the output of boost inductance is also connected with a reverse fast recovery diode, a total M reverse fast recovery diode, and each reverse fast recovery diode anode correspondence is connected with the output of a boost inductance.As can see from Figure 1, the output of the first boost inductance L1 is connected with reverse fast recovery diode D1, and the output of the second boost inductance L2 is connected with reverse fast recovery diode D2, (M-1) boost inductance L
(M-1)output be connected with reverse fast recovery diode D (M-1), M boost inductance L
moutput be connected with reverse fast recovery diode DM.
Described in each, the output of boost inductance connects after a reverse fast recovery diode, and the cathode end of M reverse fast recovery diode pools a common output end, and this common output end is connected with the positive terminal of described electrochemical capacitor E1.
The positive terminal of described electrochemical capacitor E1 is connected with the common port of the cathode end of M reverse fast recovery diode, form the second cathode output end DCP2, the negative pole end of described electrochemical capacitor E1 is connected with the emitter common port of M × N power device, forms the second cathode output end DCN2.The direct voltage U exporting between the second cathode output end DCP2 and the second cathode output end DCN2
dc.
Described electrochemical capacitor E1 is parallel with the resistance R 4 of series connection, resistance R 5 and resistance R 6, and described electrochemical capacitor E1 is also parallel with resistance R 7.
One end of described steady resistance R8 is connected with the first cathode output end DCN1, and the other end is connected with the emitter (also can be described as the common end of the emitter of insulated gate bipolar transistor and the anode of fly-wheel diode) of insulated gate bipolar transistor described in each respectively.
Described control circuit 2 is connected with described power circuit 1, for generation of the drive pulse signal of M × N road phase shift and be input in described power circuit 1.
Described control circuit 2 comprises: outer voltage controller, a M current inner loop controller, a carrier generator and a relatively driver of M × N phase shift.
Described outer voltage controller, is connected with the output of described power circuit 1, for obtaining voltage control quantity.Particularly, described outer voltage controller has two inputs, respectively the direct voltage U of output in received power circuit 1
dcwith with reference to direct voltage U
ref, described with reference to direct voltage U
refset according to actual needs, general analog control circuit is 5.0V, and digital control circuit is 3.0V.Described outer voltage controller obtains the direct voltage U of the output in power circuit 1
dcwith with reference to direct voltage U
ref, obtain voltage control quantity through PI control algorithm.Meanwhile, described outer voltage controller output voltage control amount.
The quantity of described current inner loop controller equates with the quantity of boost inductance in power circuit 1, because the quantity of described boost inductance is M, so shown in the quantity of current inner loop controller be also that M is individual.
Described M current inner loop controller, is connected with described power circuit 1 with described outer voltage controller respectively, for obtaining Current Control amount.Particularly, described in each, current controller has three inputs, the input voltage detection signal forming between voltage control quantity, the first cathode output end DCP1 and the first cathode output end DCN1 | u
in| and the current signal (current i of the first boost inductance in M boost inductance
l1, the second boost inductance current i
l2until the current i of (M-1) boost inductance
l (M-1), M boost inductance current i
lM) respectively with ring controller in ring controller, the 2nd stream in the 1st stream until in M-1 stream three inputs of ring controller and M current inner loop controller be connected respectively, each current inner loop controller output current controlled quentity controlled variable.
Accordingly, the current i of the first boost inductance
l1input in the 1st current inner loop controller, the current i of the second boost inductance
l2input in the 1st current inner loop controller until the current i of (M-1) boost inductance
l (M-1)input in M-1 current inner loop controller, input in M current inner loop controller.
Further, described current controller process is to the input voltage detection signal forming between the first cathode output end DCP1 in the voltage control quantity in described outer voltage controller, power circuit 1 and the first cathode output end DCN1 | u
in| and the computing of the current signal of M boost inductance obtains Current Control amount.
Described carrier generator, for generation of carrier signal; Described carrier signal can be triangular carrier signal or sawtooth carrier wave signal.
The described phase shift relatively quantity of driver equates with the quantity of power device in power circuit 1, because the quantity of power device in power circuit 1 is M × N, is also M × N so the quantity of driver is compared in described phase shift.
Relatively driver of described M × N phase shift, be connected with the power device in described current inner loop controller, carrier generator and described power circuit 1 respectively, drive pulse signal for generation of M × N road phase shift is given described power circuit 1, and wherein described in each, current inner loop controller is connected with relatively driver of N phase shift.The output of driver is compared in described phase shift and the gate pole of described insulated gate bipolar transistor is connected.
Particularly, as shown in Figure 2, the 1st current inner loop controller compares driver P11 with the 11st phase shift respectively, the 12nd phase shift is driver P12 relatively, until 1(N-1) phase shift comparison driver P1(N-1) be connected with the input of 1N phase shift comparison driver P1N, relatively driver P11 of the 11st phase shift simultaneously, the 12nd phase shift is driver P12 relatively, until 1(N-1) relatively driver P1(N-1 of phase shift) and the relatively output difference correspondence of driver P1N and the gate pole of insulated gate bipolar transistor P11 of 1N phase shift, the gate pole of insulated gate bipolar transistor P12 is until insulated gate bipolar transistor P1(N-1) gate pole be connected with the gate pole of insulated gate bipolar transistor P1N.
Similarly, the 2nd current inner loop controller compares driver P21 with the 21st phase shift respectively, the 22nd phase shift is driver P22 relatively, until 2(N-1) phase shift comparison driver P2(N-1) be connected with the input of 2N phase shift comparison driver P1N, relatively driver P21 of the 21st phase shift simultaneously, the 22nd phase shift is driver P22 relatively, until 2(N-1) relatively driver P2(N-1 of phase shift) and the relatively output difference correspondence of driver P2N and the gate pole of insulated gate bipolar transistor P21 of 2N phase shift, the gate pole of insulated gate bipolar transistor P22 is until insulated gate bipolar transistor P2(N-1) gate pole be connected with the gate pole of insulated gate bipolar transistor P2N.
The like, the annexation of the individual current inner loop controller of the 3rd current inner loop controller to the (M-2) and phase shift comparison driver does not repeat one by one at this.
M-1 current inner loop controller compares driver P (M-1) 1 with (M-1) 1 phase shift respectively, relatively driver P (M-1) 2 of (M-1) 2 phase shifts, until (M-1) (N-1) phase shift relatively driver P (M-1) (N-1) and the input of (M-1) N phase shift comparison driver P (M-1) N be connected, relatively driver P (M-1) 1 of (M-1) 1 phase shift simultaneously, relatively driver P (M-1) 2 of (M-1) 2 phase shifts, until (M-1) (N-1) phase shift relatively driver P (M-1) is (N-1) and the relatively output gate pole of corresponding and insulated gate bipolar transistor P (M-1) 1 respectively of driver P (M-1) N of (M-1) N phase shift, the gate pole of insulated gate bipolar transistor P (M-1) 2 until insulated gate bipolar transistor P (M-1) gate pole (N-1) be connected with the gate pole of insulated gate bipolar transistor P (M-1) N.
M current inner loop controller compares driver PM1 with M1 phase shift respectively, M2 phase shift is driver PM2 relatively, until M(N-1) phase shift comparison driver PM(N-1) be connected with the input of MN phase shift comparison driver PMN, relatively driver PM1 of M1 phase shift simultaneously, M2 phase shift is driver PM2 relatively, until M(N-1) relatively driver PM(N-1 of phase shift) and the relatively output difference correspondence of driver PMN and the gate pole of insulated gate bipolar transistor PM1 of MN phase shift, the gate pole of insulated gate bipolar transistor PM2 is until insulated gate bipolar transistor PM(N-1) gate pole be connected with the gate pole of insulated gate bipolar transistor PMN.
Described carrier generator is connected with the input that driver is compared in each phase shift.
Each phase shift relatively driver produces driving pulse according to the carrier signal of the Current Control amount of described current inner loop controller output and carrier generator generation, and described driving pulse is input in the power device in described power circuit 1.
As from the foregoing, each current inner loop controller compares driver with N phase shift and is connected, and M current inner loop controller is connected with relatively driver of M × N phase shift, produces altogether the drive pulse signal of M × N road phase shift, its phase shift is 360 °/MN, distributes regularly.
In summary it can be seen, the invention belongs to the staggered circuit of power factor correction of M level, every grade of circuit of power factor correction is responsible for 360 °/MN of driving N phase shift driving pulse, and every grade of circuit of power factor correction is only born the 1/M of gross power, total current.The 1/M when duty ratio of every power device only has original single-stage power factor correcting circuit, the conduction loss of every power device only has original 1/MN.In the situation that switching frequency is constant, the on-off times of every power device is constant, but switching loss declines at double, the ripple frequency of boost inductance is increased to original N doubly, the design of boost inductance can be simplified greatly, M × N that synthetic total current ripple frequency is carrier frequency doubly, is conducive to the filtering of ac capacitor C1.If reduction switching frequency, the on-off times of every power device and switching loss can decline, and the ripple frequency of boost inductance can remain unchanged.The power consumption of power device is disperseed, and its type selecting can be simplified.
By above analysis, the present invention, by the power factor correcting method that adopts two-stage phase shift to drive, except realizing power factor correction, can also be suitable for relatively high power application scenario, and concrete methods of realizing has two kinds:
(1) maintain carrier frequency constant, the switching frequency of holding power device is constant, simplifies the design of boost inductance, but the conduction loss of total power device is constant, and total switching loss doubles, and the switching loss that every power device is born reduces greatly.
(2) reduce at double carrier frequency, reduce at double the switching frequency of power device, maintain the design of original boost inductance, but the conduction loss of total power device is constant, total switching loss is constant, the switching loss that every power device is born reduces greatly, is conducive to type selecting and the installation of device.
In when application, according to actual conditions, M and N can be greater than 2 compared with small integer.
In sum, a kind of hybrid power factor correcting circuit of the present invention, has following beneficial effect:
1, the present invention is by adopting M level cross structure at power circuit, every grade of cross structure comprises the heavy power device of N in parallel, control circuit 2 produces the driving signal of MN road phase shift, for driving power circuit power device, can effectively reach raising power grade, simplify boost inductance design, be convenient to power device type selecting and installation, reduce overall cost, can be widely used in single phase power factor correcting circuit.
2, circuit structure of the present invention is simple, and control algolithm is easy, reduces design time.
3, the present invention adopts the phase shift trigger theory of multiple power device to realize unity power factor to proofread and correct, and the ripple frequency of the boost inductance that doubled, is conducive to the Miniaturization Design of boost inductance, has reduced switching loss and the conduction loss of power device simultaneously.
So the present invention has effectively overcome various shortcoming of the prior art and tool high industrial utilization.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any person skilled in the art scholar all can, under spirit of the present invention and category, modify or change above-described embodiment.Therefore, such as in affiliated technical field, have and conventionally know that the knowledgeable, not departing from all equivalence modifications that complete under disclosed spirit and technological thought or changing, must be contained by claim of the present invention.
Claims (9)
1. a hybrid power factor correcting circuit, is characterized in that, comprising: power circuit be connected with described power circuit, for generation of the drive pulse signal of M × N road phase shift and be input to the control circuit in described power circuit;
Described power circuit comprises:
Rectifier bridge, is connected with single-phase alternating current, and described rectifier bridge output forms the first cathode output end and the first cathode output end;
M boost inductance, the input of each boost inductance is connected with described the first cathode output end, and the output of each boost inductance is connected with N power device respectively, and described in each, the other end of power device is connected with described the first cathode output end;
M reverse fast recovery diode, each reverse fast recovery diode anode correspondence is connected with the output of a boost inductance;
Electrochemical capacitor, the positive terminal of described electrochemical capacitor is connected with the common port of the cathode end of M reverse fast recovery diode, form the second cathode output end, the negative pole end of described electrochemical capacitor is connected with the emitter common port of M × N power device, forms the second cathode output end;
Described control circuit comprises:
Outer voltage controller, is connected with the output of described power circuit, for obtaining voltage control quantity;
M current inner loop controller, is connected with described power circuit with described outer voltage controller, for obtaining Current Control amount;
Carrier generator, for generation of carrier signal;
Relatively driver of M × N phase shift, is connected with the power device in described current inner loop controller, carrier generator and described power circuit respectively, gives described power circuit for generation of the drive pulse signal of M × N road phase shift; Wherein described in each, current inner loop controller is connected with relatively driver of N phase shift;
Wherein M, N are greater than 2 positive integer.
2. hybrid power factor correcting circuit according to claim 1, is characterized in that, described power device is insulated gate bipolar transistor, and between the collector and emitter of described insulated gate bipolar transistor, connecting inverse parallel has fly-wheel diode; The collector electrode of described insulated gate bipolar transistor is connected with the anode of fly-wheel diode, and emitter is connected with the negative electrode of electrochemical capacitor.
3. hybrid power factor correcting circuit according to claim 2, it is characterized in that, described power circuit also comprises inspection leakage resistance, and one end of described inspection leakage resistance is connected with the first cathode output end, and the other end is connected with the emitter of insulated gate bipolar transistor described in each respectively.
4. hybrid power factor correcting circuit according to claim 2, is characterized in that, the output of driver is compared in described phase shift and the gate pole of described insulated gate bipolar transistor is connected.
5. hybrid power factor correcting circuit according to claim 1, is characterized in that, described outer voltage controller obtains voltage control quantity according to the direct voltage of the output in power circuit with reference to direct voltage.
6. hybrid power factor correcting circuit according to claim 1, it is characterized in that, the current signal in input voltage detection signal and boost inductance that described current controller forms according to the voltage control quantity in described outer voltage controller, the first cathode output end and the first cathode output end obtains Current Control amount.
7. hybrid power factor correcting circuit according to claim 1, it is characterized in that, each phase shift relatively driver produces driving pulse according to the carrier signal of the Current Control amount of described current inner loop controller output and carrier generator generation, and described driving pulse is input in the power device in described power circuit.
8. hybrid power factor correcting circuit according to claim 1, is characterized in that, described rectifier bridge is both arms diode rectifier bridge; The live wire of described single-phase alternating current is connected with two brachium pontis mid points of described both arms diode rectifier bridge respectively after being connected ac capacitor with zero line.
9. hybrid power factor correcting circuit according to claim 1, is characterized in that, is connected with the first resistance, the second resistance and the 3rd resistance of series connection between described the first cathode output end and the first cathode output end.
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| CN108599550A (en) * | 2018-06-22 | 2018-09-28 | 广东志高暖通设备股份有限公司 | A kind of active alternating expression power factor correction circuit |
| CN116683768A (en) * | 2023-06-15 | 2023-09-01 | 广州市锐丰数字科技有限公司 | Single-phase staggered parallel voltage-stabilizing power supply |
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| CN116683768A (en) * | 2023-06-15 | 2023-09-01 | 广州市锐丰数字科技有限公司 | Single-phase staggered parallel voltage-stabilizing power supply |
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