WO2016175769A1 - Capteur d'image à commande d'économie d'énergie intégrée - Google Patents

Capteur d'image à commande d'économie d'énergie intégrée Download PDF

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Publication number
WO2016175769A1
WO2016175769A1 PCT/US2015/028043 US2015028043W WO2016175769A1 WO 2016175769 A1 WO2016175769 A1 WO 2016175769A1 US 2015028043 W US2015028043 W US 2015028043W WO 2016175769 A1 WO2016175769 A1 WO 2016175769A1
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WO
WIPO (PCT)
Prior art keywords
readout
frame
image sensor
pixel array
post
Prior art date
Application number
PCT/US2015/028043
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English (en)
Inventor
Kang-Huai Wang
Jiafu Luo
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Capso Vision Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Capso Vision Inc filed Critical Capso Vision Inc
Priority to PCT/US2015/028043 priority Critical patent/WO2016175769A1/fr
Priority to CN201580079351.9A priority patent/CN107534745B/zh
Publication of WO2016175769A1 publication Critical patent/WO2016175769A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50—Constructional details
    • H04N23/555—Constructional details for picking-up images in sites, inaccessible due to their dimensions or hazardous conditions, e.g. endoscopes or borescopes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/60—Control of cameras or camera modules
    • H04N23/65—Control of camera operation in relation to power supply
    • H04N23/651—Control of camera operation in relation to power supply for reducing power consumption by affecting camera operations, e.g. sleep mode, hibernation mode or power off of selective parts of the camera
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/60—Control of cameras or camera modules
    • H04N23/667—Camera operation mode switching, e.g. between still and video, sport and normal or high- and low-resolution modes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/7795—Circuitry for generating timing or clock signals

Definitions

  • TITLE Image Sensor with Integrated Power Conservation Control
  • the present invention relates to integrated image sensor circuits.
  • the present invention relates to image sensing ICs that use multiple power modes to reduce the power consumption.
  • Endoscopes are flexible or rigid tubes that pass into the body through an orifice or surgical opening, typically into the esophagus via the mouth or into the colon via the rectum.
  • An image is formed at the distal end using a lens and transmitted to the proximal end, outside the body, either by a lens-relay system or by a coherent fiber-optic bundle.
  • a conceptually similar instrument might record an image electronically at the distal end, for example using a CCD or CMOS array, and transfer the image data as an electrical signal to the proximal end through a cable.
  • Endoscopes allow a physician control over the field of view and are well-accepted diagnostic tools. However, they do have a number of limitations, present risks to the patient, are invasive and uncomfortable for the patient, and their cost restricts their application as routine health-screening tools.
  • endoscopes Because of the difficulty traversing a convoluted passage, endoscopes cannot reach the majority of the small intestine and special techniques and precautions, that add cost, are required to reach the entirety of the colon. Endoscopic risks include the possible perforation of the bodily organs traversed and complications arising from anesthesia. Moreover, a trade -off must be made between patient pain during the procedure and the health risks and post-procedural down time associated with anesthesia. Endoscopies are necessarily inpatient services that involve a significant amount of time from clinicians and thus are costly.
  • a camera is housed in a swallowable capsule, along with a radio transmitter for transmitting data, primarily comprising images recorded by the digital camera, to a base-station receiver or transceiver and data recorder outside the body.
  • the capsule may also include a radio receiver for receiving instructions or other data from a base-station transmitter.
  • radio-frequency transmission lower-frequency electromagnetic signals may be used.
  • Power may be supplied inductively from an external inductor to an internal inductor within the capsule or from a battery within the capsule.
  • the wireless-based capsule camera system will require a patient to wear a wireless transceiver and data recorder to receive and record the captured images.
  • the capsule camera may stay in the body for over ten hours. Therefore, the patient may have to wear the wireless data receiver pack for extended hours which may be uncomfortable.
  • the capsule camera system typically consists of an optical lens or lens system, and a light sensing element.
  • the light sensing element is based on integrated-circuit sensor fabricated through various manufacturing process, such as CMOS (complementary metal-oxide semiconductor) or CCD (charge-coupled device) processes.
  • CMOS image sensors are becoming more popular and have been used extensively today in various digital imaging applications.
  • the light sensing devices traditionally have light sensing elements, called pixels, arranged into one-dimensional (one row) or two-dimensional (many rows and columns) arrays.
  • the pixel array is aligned with the image formed by the associated optical lens system and positioned within the focus depth of the optical system. Each pixel provides an electrical output corresponding to the incident light to which the pixel is exposed.
  • the capsule device For the capsule camera application, the capsule device has to travel in the human body for an extended period of time. Furthermore, the capsule device usually is powered by batteries. During the course of imaging the gastrointestinal track inside the human body, a capsule camera may have to capture tens of thousands of images.
  • the image sensor is one of the major power consuming devices. Therefore, power consumption of such CMOS image sensors is an important factor that limits the lifetime of such system, if the image sensor is powered by disposable batteries. If it is powered by rechargeable batteries, the power consumption will determine the usage time between two charges. As a result, it is desirable to reduce the power consumption of the image sensor.
  • a capsule camera system typically consists of one or more CMOS image sensors, LED light sources, image processing ASIC (application specific integrated circuit) and other components.
  • CMOS image sensors In order to keep the capsule camera easily swallowable, the physical size of the capsule camera becomes very limited. As a result, the batteries are usually very small and the power consumption of all components inside the capsule camera, including the image sensor becomes a critical issue. Therefore, it is desirable to develop an image sensor with power saving control to extend the battery life.
  • the integrated circuit comprises a pixel array to capture an image projected thereon; an analog block to process analog signal associated with the pixel array, where the analog block comprises an analog to digital convertor (ADC); and a first control circuit to enable or disable the analog block or to configure the analog block to a high-power mode or a low-power mode depending on whether the pixel array is in a readout frame or in a reset frame with no active readout.
  • the reset frame corresponds to a period of time starting from a global reset to immediately before a first-row readout for the integrated image sensor circuit operated in a global shutter mode.
  • the reset frame corresponds to a period of time starting from a first-row reset to immediately before the first-row readout for the integrated image sensor circuit operated in a rolling shutter mode.
  • the analog block is enabled or is configured to the high-power mode when the pixel array is in the readout frame, and the analog block is disabled or is configured to the low-power mode when the pixel array is in the reset frame with no active readout.
  • the analog block is powered up at a short period before the readout frame starts, and the short period depends on a settling time associated with said at least one analog block. The short period may have a range as small as one order of microsecond or a range as large as one order of millisecond.
  • the analog block may further comprise a bias circuit, a reference circuit, a gain amplifier or any combination. In one embodiment, the analog block is powered down once the readout frame is completed.
  • the integrated image sensor circuit further comprises a post-processing block and a second control circuit to enable or disable the post-processing block or to configure the post-processing block to the high-power mode or the low-power mode depending on whether the pixel array is in the readout frame or in the reset frame with no active readout.
  • the post-processing block can be enabled or be configured to the high-power mode when the pixel array is in the readout frame.
  • the post-processing block can be disabled or be configured to the low-power mode when the pixel array is in the reset frame with no active readout.
  • the post-processing block can be powered up at a short period before the readout frame starts, where the short period depends on a settling time associated with the post-processing block and wherein the settling time associated with the post-processing block is shorted than the settling time associated with the analog block.
  • the analog block and the post-processing block are powered down once the readout frame is completed.
  • the post-processing block may further comprise noise reduction, demosaicing, edge sharpening, color format conversion or any combination.
  • the integrated image sensor circuit further comprises a configurable timing circuit and a third control circuit to configure the configurable timing circuit to provide a high clock frequency or a low clock frequency for the integrated image sensor circuit depending on whether the pixel array is in the readout frame or in the reset frame with no active readout.
  • the configurable timing circuit is configured to provide the high clock frequency when the pixel array is in the readout frame, and the configurable timing circuit is configured to provide the low clock frequency when the pixel array is in the reset frame with no active readout.
  • the integrated image sensor circuit may further comprise a regulator and a fourth control circuit to configure the regulator to provide a high-current output or a low-current output depending on whether the pixel array is in the readout frame or in the reset frame with no active readout.
  • the regulator incurs higher quiescent current when the regulator is configured to provide the high-current output.
  • the regulator can be configured to provide the high-current output when the pixel array is in the readout frame and the regulator can be configured to provide the low-current output when the pixel array is in the reset frame with no active readout.
  • Fig. 1 illustrates an exemplary layout of a two-dimensional pixel array with supporting column and row driving circuits.
  • Fig.2 illustrates exemplary timing diagrams to operate a two-dimensional pixel array.
  • Fig.3 illustrates an exemplary operational flow chart for an integrated image sensor circuit incorporating multiple power modes according to an embodiment of the present invention.
  • a conventional digital camera typically has an optical imaging path with an image sensing IC comprising a two-dimensional (2-D) pixel array.
  • the image sensor is placed at or near the focal plane of the optical imaging path, with the center of the 2-D pixel array aligned with the center of the optical imaging path.
  • Fig. 1 illustrates a typical image sensor 100 including a 2-D pixel array 110, row driver circuit 120 and column driver circuit 130.
  • the 2-D pixel array 100 is configured as two-dimensional sensing elements with n rows and m columns. Each row is substantially the same. If the pixel array is used as a color sensor, a color filter with different patterns may be applied on top of the pixel array.
  • the pixel locations of the 2-D array are designated as (x,y), where x represents the horizontal position and y represents the vertical position.
  • the coordinates x and y also represent the column and row numbers of the 2-D pixel array respectively. While Fig. 1 illustrates an example where the pixels in all rows are vertically aligned, some pixel arrays may have offset patterns from row to row. For example, a pixel array may have half-pixel offset for every other row.
  • Row driver 120 consists of individual row driving circuits RD1, RD2, ... , RD/7 for corresponding n rows of the pixel array. In addition to individual row driving circuits, row driver 120 also includes common components 122 that support all individual row driving circuits. Similarly, pixels in the same column share certain common electrical signals, provided by column circuit 130. Column circuit 130 consists of common components 132 and individual column driving circuits, CD1, CD2, ..., CDm for corresponding m columns of the pixel array.
  • Fig. 2 illustrates exemplary timing diagrams to operate the 2-D pixel array 100 in Fig. 1.
  • the reset signals 211, 212, 213 and 214 are shown for rows 1, 2, 3 and n respectively.
  • Individual row driving circuits generate the respective reset signals.
  • reset signal 211 is generated by the row driving circuit RD1 for the I s row.
  • the 1 st row is reset and the row of pixels will start integrating light signals.
  • Timing signal 212 which comprises a reset pulse indicated by 222 to reset the 2 nd row.
  • the time difference between signal 221 and signal 222 corresponds to one line period.
  • timing signal 213 is generated by individual row driving circuit RD3 for the 3 rd row and the reset pulse 223 is one line period behind the reset pulse 222. This continues for the remaining rows of the pixel array until the last row is reset. While a pulse signal is illustrated in Fig. 2 to cause a corresponding row to reset, other signal types may also be used. For example, an upward transient signal, such as the leading edge of a positive pulse, or a downward transient signal, such as the trailing edge of a positive pulse may also be used to trigger the reset.
  • the charge signals can be read out from the pixel array in a row by row fashion.
  • the sensing elements start to accumulate charges caused by the incident light ray after the reset pulse.
  • Fig. 2 illustrates the readout signals generated by the individual driving circuits.
  • individual row driving circuit RD1 for 1 st row generates a timing signal 231, which comprises a readout pulse 241 to trigger the readout for the 1 st row.
  • the readout pulse occurs at a desired instance after the reset pulse 221 for the 1 st row to integrate charges.
  • Readout pulses 242 and 243 of readout signal 232 and 233 for the 2 nd row and the 3 rd row occur at one row period after respective readout signals 241 and 242.
  • the readout pulses for the remaining rows continue until all rows are read.
  • a pulse signal is illustrated in Fig. 2 to cause a corresponding row to start the readout, other signal types may also be used.
  • an upward transient signal such as the leading edge of a positive pulse
  • a downward transient signal such as the trailing edge of a positive pulse may also be used as the readout signal.
  • the timing scheme shown in Fig. 2 is referred as rolling shutter operation.
  • the timing signal shown in Fig. 2 repeats frame after frame to form a stream of image frames, which is also referred as a video sequence.
  • each row integrates light signal at slightly different time period using the rolling shutter operation.
  • Two neighboring rows have reset time, charge accumulation time and readout time apart by one line period.
  • the time difference between 1 st and last row is about one frame apart, which may be substantial long. Consequently, the resulting picture with fast moving objects may experience the so-called rolling shutter artifact.
  • One manifest of the rolling shutter artifact is that a vertical line becomes a slant line in the captured picture when the vertical line moves quickly horizontally.
  • reset frame 250 and readout frame 260 have a certain overlap. The amount of overlap depends on the integration time and total number of readout rows (n). If the integration time is short, 1 st row readout pulse 241 occurs at a short time after corresponding reset pulse 221. This will result in larger overlap between reset frame 250 and corresponding readout frame 260. On the other hand, if the integration time is longer, the overlap will become smaller. Once the integration time is longer than n line periods, reset frame 250 and readout frame 260 will have no overlap at all.
  • the readout chain will be needed, where the readout chain may include bias and reference circuit, a gain amplifier, an analog to digital converter (ADC) and output interface.
  • ADC analog to digital converter
  • SOC system-on-chip
  • certain digital post-processing may also be performed on outputs from the pixel array during the readout frame. During this time, the sensor will need to run at a clock frequency equal to or higher than the pixel rate.
  • Post-processing for image sensors is known technique in the field.
  • the post-processing may include one or more of the processing techniques selected from a group comprising noise reduction, demosaicing, edge sharpening, and color format conversion.
  • the power consumption of an image sensor can be reduced by selectively powering down/disabling different on-chip components or selectively configuring on-chip components to different power modes.
  • the analog blocks and on-chip post-processing blocks will be powered down/disabled or configured to a low-power mode and this will result in substantial power reduction of the image sensor.
  • these analog blocks will be powered up/enabled or configured to a high-power mode so that the on-chip component can be ready to process pixel output from the sensor array when a readout frame starts.
  • the exact time to power up these blocks in advance depends on the settling time of these analog blocks and can range from a few microseconds to milliseconds.
  • Post-processing digital blocks can be waked up or enabled in a similar manner with slightly different wake-up time since these can typically settle much faster than the analog blocks.
  • the readout chain analog blocks and post-processing digital blocks can be powered down or disabled again until the pixel array needs to readout again.
  • high-power mode and low-power mode are relative terms where the high-power mode causes the image sensor to consume more power than the low-power mode. Therefore, the high-power mode may correspond to a normal power mode, while the low-power mode may correspond to a mode using less power than the normal mode.
  • CMOS image sensors today include certain amount of digital circuits, even for non-SOC sensors which do not have post-processing circuits.
  • One example is the timing generator that generates different timing pulses for the image sensor.
  • digital blocks can be operated with different clock frequencies, depending on whether the sensor is in the reset frame with no active readout or the readout frame. When the sensor is not in the readout frame, a slower clock can be provided to the digital blocks to reduce power consumption of the digital block. Once the readout frame starts, a faster clock will be sent to the digital block to enable generation of higher frequency signals required for operating the analog readout chain and any post-processing digital block.
  • an on-chip regulator is used to provide different current supply capability to power other circuit blocks. This enables some blocks, particularly digital blocks, to operate at different voltages from a single power supply.
  • Quiescent current in a regulator circuit is the current drawn internally, not available to the load. The quiescent current normally is measured as the input current with no load. Accordingly, the quiescent current represents a source of inefficiency of the regulator. Usually, a regulator with capability to supply higher current will incur a higher quiescent current. Therefore, the regulators should match required currents in order to further save power. However, there is usually a trade -off between the quiescent current consumed and the response speed that the regulator can react to load change.
  • the regulator for image sensors with an on-chip regulator can be operated in at least two different modes.
  • the sensor When the sensor is not in a readout frame, the sensor can be operated at a slower clock and any post-processing blocks can be powered down to reduce power consumption. Therefore, there will be very small load and small load change on the power supply generated by the on-chip regulator.
  • the regulator can be operated in a low-power mode or a low-current regulator is used, where the quiescent current is small. Once the sensor enters the readout frame, larger current will be needed from the regulator. In this case, the regulator is operated in higher power mode or a large-current regulator is used. Accordingly, the power consumption of the CMOS image sensor can be further reduced.
  • the present invention for reducing image sensor power consumption can be applied to a general sensor where the reset frame and the readout frame may overlap.
  • particular care must be taken into consideration during design and layout of an integrated image sensor, especially for the column drive circuitry.
  • a large amount of power change may occur when a sensor enters a readout frame. This large power change can cause large perturbation on the sensor IC. Since image sensors are very sensitive to such perturbations, row offset may become visible in the captured image data. Row noise correction design can be implemented to reduce such effect.
  • CMOS image sensor that has no overlap between the readout frame and the reset frame.
  • Fig. 3 shows an exemplary sensor configuration during various phases for operating a sensor in the video mode. The time sequence starts from readout frame i-l using a normal power mode (or a high-power mode) as shown in step 310. In the normal power mode, the sensor is configured as follows:
  • On-chip regulators operated with a high-current mode i.e., higher quiescent
  • the senor enters a low-power mode as shown in step 320.
  • the sensor is configured as follows:
  • On-chip regulators operated with a low-current mode (i.e., low quiescent current).
  • the senor can be placed into an even more aggressive power saving mode, such as a sleep mode.
  • a sleep mode In the sleep mode, almost all on-chip blocks can be powered down except for a small block that is needed for accepting a wake-up signal or generating such a signal itself with pre-programmed delay.
  • the sensor When frame i is needed, the sensor is waken up and enters the low-power mode again as shown in step 330. This time period can be as short as a few clock cycles, which is enough for the digital blocks and any necessary analog blocks for the sensor reset to settle. The sensor then enters reset frame i, where the reset starts with the first row, followed by the second row, etc., until the last row, n and then the sensor remains in the low-power mode as shown in step 340.
  • Step 350 is optional since a sensor can enter a readout frame quickly. For certain sensors, step 350 may require longer time to allow firing of LED light sources or operation of a mechanical shutter.
  • Step 360 should be long enough to allow the powered up analog blocks to settle. The time to settle typically ranges from a few microseconds to a few milliseconds.
  • the sensor starts readout frame i. In step 370, it reads out image data from the pixel array, one row at a time. Once all rows have been readout, it enters low-power mode again, or an optional sleep mode as shown in step 380.
  • the image sensor can achieve substantially lower average power consumption compared to a similar image sensor running in a conventional operation mode.
  • steps 330 through 370 all analog blocks will be powered up once the image sensor is waken up.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

L'invention porte sur un circuit de capteur d'image intégré à multiples modes de puissance. Le circuit intégré comprend une matrice de pixels, un bloc analogique pour traiter un signal analogique associé à la matrice de pixels, le bloc analogique comprenant un convertisseur analogique/numérique (CAN), et un premier circuit de commande pour activer/désactiver le bloc analogique ou pour configurer le bloc analogique dans un mode haute/basse puissance selon que la matrice de pixels est dans une lecture d'image ou dans une réinitialisation d'image sans lecture active. Le circuit de capteur d'image intégré peut en outre comprendre un bloc de post-traitement et un second circuit de commande pour activer/désactiver le bloc de post-traitement ou pour configurer le bloc de post-traitement dans le mode haute puissance ou le mode basse puissance selon que la matrice de pixels est dans la lecture d'image ou dans la réinitialisation d'image n'ayant pas de lecture active.
PCT/US2015/028043 2015-04-28 2015-04-28 Capteur d'image à commande d'économie d'énergie intégrée WO2016175769A1 (fr)

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PCT/US2015/028043 WO2016175769A1 (fr) 2015-04-28 2015-04-28 Capteur d'image à commande d'économie d'énergie intégrée
CN201580079351.9A CN107534745B (zh) 2015-04-28 2015-04-28 具有集成功率节约控制的图像传感器

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PCT/US2015/028043 WO2016175769A1 (fr) 2015-04-28 2015-04-28 Capteur d'image à commande d'économie d'énergie intégrée

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