WO2016167005A1 - Light detecting device - Google Patents

Abstract

In the present invention, when viewed in a direction in which a main surface 1Na of a semiconductor substrate 1N and a main surface 1Nb thereof oppose each other, the semiconductor substrate has a pair of opposing first edges 1N1, a pair of opposing second edges 1N2 and a third edge 1N3 that is connected to one end of one of the first edges 1N1 and one end of one of the second edges 1N2. An electrode E3 is disposed on the semiconductor substrate 1N and is electrically connected to a plurality of pixels (avalanche photodiodes APD). An electrode E5 is disposed on a mounting substrate 20. A bonding wire W1 has one end that is connected to the electrode E3 and one end that is connected to the electrode E5. The bonding wire W1 is disposed so as to cross the third edge 1N3 when viewed in the direction in which the main surface 1Na and the main surface 1Nb oppose each other.

Description

Photodetector

The present invention relates to a photodetection device.

2. Description of the Related Art A photodetection device including a semiconductor photodetection element and a mounting substrate on which the semiconductor photodetection element is arranged is known (for example, see Patent Document 1). The semiconductor photodetecting element has a semiconductor substrate on which a photodiode array having a plurality of pixels is formed. The semiconductor photodetecting element and the mounting substrate are opposed to each other. The semiconductor substrate has a pair of first sides facing each other and a pair of second sides facing each other in plan view.

U.S. Pat. No. 8,420,433

In the light detection device described in Patent Document 1, a notch is formed in a corner of a semiconductor substrate, that is, a corner formed by a first side and a second side. A wire connecting the first electrode disposed on the semiconductor substrate and the second electrode disposed on the mounting substrate is disposed at the position of the notch. The cutout is formed at one corner of the semiconductor substrate so as to cut into the inside of the semiconductor substrate in plan view.

By forming the notches, the outer edge of the semiconductor substrate has not only the pair of first and second sides described above but also a pair of third sides extending in a direction intersecting each other. In the photodetection device described in Patent Literature 1, the pair of third sides are orthogonal to each other. At the top of the notch, that is, at the angle formed by the pair of third sides, the mechanical strength of the semiconductor substrate tends to decrease. For this reason, there exists a possibility that a crack may arise toward the inside of a semiconductor substrate from the angle | corner which a pair of 3rd side makes.

An object of one embodiment of the present invention is to provide a photodetector in which electrical connection between a semiconductor substrate and a mounting substrate is realized by a wire while suppressing a decrease in mechanical strength of the semiconductor substrate.

A light detection device according to one embodiment of the present invention electrically includes a semiconductor light detection element having a semiconductor substrate, a mounting substrate on which the semiconductor light detection element is disposed, and the semiconductor light detection element and the mounting substrate. A first wire connected thereto. The semiconductor substrate is formed with a photodiode array having a plurality of pixels, and includes a first main surface and a second main surface facing each other. The mounting substrate includes a third main surface facing the second main surface of the semiconductor substrate and a fourth main surface facing the third main surface. The semiconductor substrate includes a pair of first sides facing each other, a pair of second sides facing each other, and a first side of the first side when viewed from the direction in which the first main surface and the second main surface are facing each other. A third side connected to one end and one end of the second side; The semiconductor photodetecting element has a first electrode arranged on the first main surface side of the semiconductor substrate. The first electrode is electrically connected to the plurality of pixels. The mounting board has a second electrode arranged on the third main surface side. The first wire has one end connected to the first electrode and the other end connected to the second electrode. The first wire is disposed so as to intersect with the third side when viewed from the direction in which the first main surface and the second main surface are opposed to each other.

In the photodetecting device according to this aspect, the first wire connecting the first electrode and the second electrode has a third side as viewed from the direction in which the first main surface and the second main surface face each other. It is arranged to intersect. The signal of the photodiode array is taken out from the first main surface side of the semiconductor substrate and sent to the third main surface side of the mounting substrate. That is, the electrical connection between the semiconductor substrate and the mounting substrate is realized by the first wire.

The third side is connected to one end of one first side and one end of one second side. That is, the third side extends in one direction intersecting one first side and one second side. In the photodetecting device according to this aspect, since the notch formed in the semiconductor substrate in the photodetecting device described in Patent Document 1 is not formed in the semiconductor substrate, the mechanical strength of the semiconductor substrate is reduced. Is suppressed.

The corner formed by the first side and the third side and the corner formed by the second side and the third side in the semiconductor substrate are viewed from the direction in which the first main surface and the second main surface face each other. A recess may be formed along each corner. In this case, it is possible to suppress the occurrence of chipping at each corner.

A metal film may be disposed at a corner portion formed by the first side and the third side and a corner portion formed by the second side and the third side in the semiconductor substrate. In this case, since the mechanical strength of each corner is improved, the occurrence of chipping at each corner can be suppressed.

The length of the third side may be shorter than the lengths of the first side and the second side. In this case, a decrease in the area of the region (effective region) where a plurality of pixels are located is suppressed.

The photodetecting device according to this aspect may include a second wire that electrically connects the semiconductor photodetecting element and the mounting substrate. In this case, the semiconductor photodetecting element has a third electrode arranged on the first main surface side of the semiconductor substrate, and the mounting substrate has a fourth electrode arranged on the third main surface side. Yes. The third electrode is electrically connected to the semiconductor substrate. The second wire has one end connected to the third electrode and the other end connected to the fourth electrode. The second wire may be arranged so as to intersect the third side when viewed from the direction in which the first main surface and the second main surface are opposed to each other. In this embodiment, a predetermined potential (for example, a cathode potential) can be appropriately applied to the semiconductor substrate through the second wire and the third electrode. That is, the electrical connection between the semiconductor substrate and the mounting substrate is realized by the second wire.

The semiconductor substrate has a fourth side connected to one end of the other first side and one end of the other second side when viewed from the direction in which the first main surface and the second main surface face each other. You may do it. In this case, the second wire may be arranged so as to intersect the fourth side when viewed from the direction in which the first main surface and the second main surface are opposed to each other. Also in this embodiment, a predetermined potential (for example, a cathode potential) can be appropriately applied to the semiconductor substrate through the second wire and the third electrode. That is, the electrical connection between the semiconductor substrate and the mounting substrate is realized by the second wire.

The fourth side is connected to one end of one side and one end of the other second side. That is, the fourth side extends in one direction intersecting the other first side and the other second side. Therefore, in this embodiment, since the notch formed in the semiconductor substrate is not formed in the semiconductor substrate in the photodetector described in Patent Document 1, a decrease in the mechanical strength of the semiconductor substrate is suppressed. Yes.

The corner formed by the first side and the fourth side of the semiconductor substrate and the corner formed by the second side and the fourth side are viewed from the direction in which the first main surface and the second main surface are opposed to each other. A recess may be formed along each corner. In this case, it is possible to suppress the occurrence of chipping at each corner.

A metal film may be disposed at a corner portion formed by the first side and the fourth side and a corner portion formed by the second side and the fourth side in the semiconductor substrate. In this case, since the mechanical strength of each corner is improved, the occurrence of chipping at each corner can be suppressed.

The length of the fourth side may be shorter than the lengths of the first side and the second side. In this case, a decrease in the area of the region (effective region) where a plurality of pixels are located is suppressed.

The light detection device according to this aspect may include a plurality of semiconductor light detection elements. In this case, the plurality of semiconductor photodetecting elements are arranged on the mounting substrate so that the second main surface and the third main surface face each other, and for each semiconductor photodetecting element, the first electrode and the second electrode May be connected via the first wire. In this embodiment, since the photodetecting device includes a plurality of semiconductor photodetecting elements, the area of the light receiving region of the photodetecting device can be increased.

The photodiode array operates in Geiger mode and is connected to a plurality of avalanche photodiodes formed in the semiconductor substrate in series with each avalanche photodiode and arranged on the first main surface side of the semiconductor substrate. The quenching resistor and the signal line connected to the quenching resistor in parallel and disposed on the first main surface side of the semiconductor substrate may be connected to the first electrode. In this case, in the photodiode array, when the avalanche photodiode constituting the pixel detects a photon and performs Geiger discharge, a pulse-like signal is obtained by the action of the quenching resistor connected to the avalanche photodiode. Each avalanche photodiode counts photons. Therefore, even when a plurality of photons are incident at the same timing, the number of incident photons is determined according to the output charge amount or the signal intensity of the total output pulse.

According to the above-described aspect of the present invention, there is provided a photodetecting device in which the electrical connection between the semiconductor substrate and the mounting substrate is realized by the wire while suppressing the decrease in the mechanical strength of the semiconductor substrate.

It is a schematic perspective view which shows the photon detection apparatus which concerns on one Embodiment. It is a figure for demonstrating the arrangement | sequence of a semiconductor photon detection element. It is a figure for demonstrating the cross-sectional structure of the photon detection apparatus which concerns on this embodiment. It is a schematic plan view of a semiconductor photodetection element. It is a schematic diagram which shows the structure of the semiconductor photodetection element around the third side. It is a circuit diagram of a photon detection device. It is a schematic perspective view of the semiconductor photodetector element around the third side. It is a schematic perspective view of the semiconductor photodetector element around the third side. It is a figure for demonstrating the arrangement | sequence of the semiconductor photodetection element which concerns on the modification of this embodiment. It is a figure for demonstrating the cross-sectional structure of the photon detection apparatus which concerns on the modification of this embodiment. It is a schematic plan view of a semiconductor photodetection element. It is a schematic diagram which shows the structure of the semiconductor photodetection element around the third side. It is a figure for demonstrating the arrangement | sequence of the semiconductor photodetection element which concerns on the modification of this embodiment. It is a figure for demonstrating the cross-sectional structure of the photon detection apparatus which concerns on the modification of this embodiment. It is a schematic plan view of a semiconductor photodetection element. It is a schematic diagram which shows the structure of the semiconductor photodetection element around the fourth side. It is a schematic perspective view of the semiconductor photodetector element around the fourth side. It is a schematic perspective view of the semiconductor photodetector element around the fourth side. It is a schematic perspective view which shows the photon detection apparatus which concerns on the modification of this embodiment. It is a schematic plan view of a semiconductor photodetection element. It is a schematic plan view of a semiconductor photodetection element. It is a schematic plan view of a semiconductor photodetection element. It is a figure for demonstrating the manufacturing process of the semiconductor photodetector element which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the semiconductor photodetector element which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the semiconductor photodetector element which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the semiconductor photodetector element which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the semiconductor photodetector element which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the semiconductor photodetector element which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the semiconductor photodetector element which concerns on this embodiment. It is a figure for demonstrating the modification of the manufacturing process of the semiconductor photodetection element which concerns on this embodiment. It is a figure for demonstrating the modification of the manufacturing process of the semiconductor photodetection element which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the semiconductor photodetection element which concerns on the modification of this embodiment. It is a figure for demonstrating the manufacturing process of the semiconductor photodetection element which concerns on the modification of this embodiment. It is a figure for demonstrating the manufacturing process of the semiconductor photodetection element which concerns on the modification of this embodiment. It is a figure for demonstrating the manufacturing process of the semiconductor photodetection element which concerns on the modification of this embodiment.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description, the same reference numerals are used for the same elements or elements having the same function, and redundant description is omitted.

The configuration of the photodetecting device 1 according to the present embodiment will be described with reference to FIGS. FIG. 1 is a schematic perspective view showing a photodetecting device according to the present embodiment. FIG. 2 is a diagram for explaining the arrangement of the semiconductor photodetector elements. FIG. 3 is a diagram for explaining a cross-sectional configuration of the photodetecting device according to the present embodiment. FIG. 4 is a schematic plan view of the semiconductor photodetecting element. FIG. 5 is a diagram showing the configuration of the semiconductor photodetecting element around the third side. FIG. 6 is a circuit diagram of the photodetector.

As shown in FIGS. 1 to 3, the photodetecting device 1 includes a plurality of semiconductor photodetecting elements 10, a mounting substrate 20, and a plurality of scintillators 30. The plurality of semiconductor photodetecting elements 10 are disposed on the mounting substrate 20 and face the mounting substrate 20. The plurality of semiconductor photodetecting elements 10 are molded with resin (for example, epoxy resin) 11. In the present embodiment, the number of semiconductor photodetector elements 10 is “16”, and the number of scintillators 30 is “16”.

Each semiconductor light detecting element 10 has one photodiode array PDA. The semiconductor photodetector 10 has a semiconductor substrate 1N. The semiconductor substrate 1N has a rectangular shape in plan view. The semiconductor substrate 1N includes a main surface 1Na and a main surface 1Nb facing each other. The semiconductor substrate 1N is an N-type (first conductivity type) semiconductor substrate made of Si.

The semiconductor substrate 1N has a polygonal shape when viewed from the facing direction. In the present embodiment, the semiconductor substrate 1N has a pentagonal shape when viewed from the facing direction. That is, the semiconductor substrate 1N has a pair of first sides 1N1, a pair of second sides 1N2, and a third side 1N3 as outer edges when viewed from the opposite direction, as shown in FIG. is doing.

The pair of first sides 1N1 face each other and are parallel to each other. The pair of second sides 1N2 face each other and are parallel to each other. The third side 1N3 is connected to one first side 1N1 and one second side 1N2. The third side 1N3 extends in one direction intersecting one first side 1N1 and one second side 1N2. That is, the third side 1N3 is located between one first side 1N1 and one second side 1N2.

One end of one first side 1N1 and one end of the third side 1N3 are connected. The angle formed by the first side 1N1 and the third side 1N3 is, for example, 135 °. One end of one second side 1N2 and the other end of third side 1N3 are connected. The angle formed by the second side 1N2 and the third side 1N3 is, for example, 135 °. The other end of one first side 1N1 and one end of the other second side 1N2 are connected. The other end of one second side 1N2 and one end of the other first side 1N1 are connected. The other end of the other first side 1N1 and the other end of the other second side 1N2 are connected. In the present embodiment, the first side 1N1 and the second side 1N2 are orthogonal to each other.

The length of the third side 1N3 is shorter than the lengths of the first side 1N1 and the second side 1N2. The length of one first side 1N1 is shorter than the length of the other first side 1N1. The length of one second side 1N2 is shorter than the length of the other second side 1N2. In the present embodiment, the length of one first side 1N1 is equal to the length of one second side 1N2, and the length of the other first side 1N1 is equal to the length of the other second side 1N2. .

The photodiode array PDA includes a plurality of avalanche photodiodes APD. The plurality of avalanche photodiodes APD are formed on the semiconductor substrate 1N. One avalanche photodiode APD constitutes one pixel in the photodiode array PDA. The plurality of avalanche photodiodes APD are arranged two-dimensionally when viewed from the direction in which the main surface 1Na and the main surface 1Nb face each other (hereinafter simply referred to as “opposing direction”).

The semiconductor substrate 1N has a first region RS1 and a second region RS2 as shown in FIG. A plurality of avalanche photodiodes APD are arranged in the first region RS1. The second region RS2 is located outside the first region RS1 and in the vicinity of the third side 1N3 when viewed from the facing direction. The second region RS2 has, for example, a triangular shape in plan view. In FIG. 4, the facing direction coincides with the Z-axis direction.

As shown in FIG. 5, a quenching resistor R1 is connected in series to each avalanche photodiode APD. All the avalanche photodiodes APD are all connected in parallel in such a manner that each avalanche photodiode APD is connected in series with the quenching resistor R1. A reverse bias voltage is applied from each power source to each avalanche photodiode APD. The output current from the avalanche photodiode APD is detected by a signal processing unit SP described later.

Each avalanche photodiode APD has a P-type (second conductivity type) first semiconductor region 1PA and a P-type second semiconductor region 1PB. The first semiconductor region 1PA is formed on the main surface 1Na side of the semiconductor substrate 1N. The second semiconductor region 1PB is formed in the first semiconductor region 1PA and has an impurity concentration higher than that of the first semiconductor region 1PA. The planar shape of the second semiconductor region 1PB is, for example, a polygon (in this embodiment, a quadrangle). The depth of the first semiconductor region 1PA is larger than the depth of the second semiconductor region 1PB.

The semiconductor substrate 1N has an N-type semiconductor region 1PC. The semiconductor region 1PC is formed on the main surface 1Na side of the semiconductor substrate 1N. The semiconductor region 1PC prevents a PN junction formed between the N-type semiconductor substrate 1N and the P-type first semiconductor region 1PA from being exposed at the end of the semiconductor substrate 1N. The semiconductor region 1PC is formed at a position corresponding to the end of the semiconductor substrate 1N.

As shown in FIG. 5, the avalanche photodiode APD has an electrode E1 arranged on the main surface 1Na side of the semiconductor substrate 1N. The electrode E1 is electrically connected to the second semiconductor region 1PB. As shown in FIG. 3, the avalanche photodiode APD has an electrode E2 disposed on the main surface 1Nb side of the semiconductor substrate 1N. The electrode E2 is electrically connected to the semiconductor substrate 1N. The first semiconductor region 1PA is electrically connected to the electrode E1 through the second semiconductor region 1PB.

The photodiode array PDA includes a signal line TL and an electrode E3 as shown in FIG. The signal line TL and the electrode E3 are formed on the semiconductor substrate 1N outside the second semiconductor region 1PB via the insulating layer L1. The signal line TL and the electrode E3 are disposed on the main surface 1Na side of the semiconductor substrate 1N. The electrode E3 is located in the second region RS2. The signal line TL is connected to the electrode E3.

The signal line TL includes a plurality of signal lines TL1 and a plurality of signal lines TL2. Each signal line TL1 is disposed along the Y-axis direction between the avalanche photodiodes APD adjacent in the X-axis direction in plan view. Each signal line TL2 is disposed between the avalanche photodiodes APD adjacent in the Y-axis direction along the X-axis direction. Each signal line TL2 electrically connects a plurality of signal lines TL1. In the present embodiment, the signal line TL1 and the signal line TL2 are connected to the electrode E3. Either one of the signal line TL1 and the signal line TL2 may be connected to the electrode E3.

The photodiode array PDA has a quenching resistor R1 for each avalanche photodiode APD. The quenching resistor R1 is formed on the semiconductor substrate 1N via the insulating layer L1. Quenching resistor R1 is arranged on the main surface 1Na side of semiconductor substrate 1N. One end of the quenching resistor R1 is connected to the electrode E1. The other end of the quenching resistor R1 is connected to the signal line TL1. For example, the quenching resistor R1 is located on the semiconductor substrate 1N outside the second semiconductor region 1PB. In FIG. 5, the description of the insulating layers L1 and L3 shown in FIG. 3 is omitted for clarity of the structure.

Each avalanche photodiode APD (region immediately below the first semiconductor region 1PA) is connected to the signal line TL1 through the electrode E1 and the quenching resistor R1. A plurality of avalanche photodiodes APD are connected to one signal line TL1 through an electrode E1 and a quenching resistor R1, respectively. The quenching resistor R1 is electrically connected to the electrode E3 via the signal line TL. That is, each avalanche photodiode APD (each pixel) is electrically connected to the electrode E3.

An insulating layer L3 is disposed on the main surface 1Na side of the semiconductor substrate 1N. The insulating layer L3 is formed so as to cover the electrodes E1 and E3, the quenching resistor R1, and the signal line TL.

The quenching resistor R1 has a higher resistivity than the electrode E1 to which the quenching resistor R1 is connected. Quenching resistor R1 is made of polysilicon, for example. As a method for forming the quenching resistor R1, a CVD (Chemical Vapor Deposition) method can be used.

The electrodes E1, E2, E3 and the signal line TL are made of metal (for example, Al). When the semiconductor substrate is made of Si, AuGe / Ni is also used as the electrode material in addition to Al. A sputtering method can be used as a method of forming the electrodes E1, E2, E3 and the signal line TL.

When Si is used as the material of the semiconductor substrate 1N, a Group 3 element (for example, B) is used for the P-type impurity, and a Group 5 element (for example, N, P, or As) is used for the N-type impurity. . Even when the semiconductor conductivity type N-type and P-type are replaced with each other to form an element, the element functions as a semiconductor photodetector element. As a method for adding these impurities, a diffusion method or an ion implantation method can be used.

As a material of the insulating layers L1 and L3, SiO ₂ or SiN can be used. If the insulating layer L1, L3 consists of SiO _2, the method for forming the insulating layer L1, L3, it is possible to use a thermal oxidation method or a sputtering method.

In the photodiode array PDA, an avalanche photodiode APD is formed by forming a PN junction between the N-type semiconductor substrate 1N and the P-type first semiconductor region 1PA. The semiconductor substrate 1N is electrically connected to an electrode E2 formed on the main surface 1Nb of the semiconductor substrate 1N. The first semiconductor region 1PA is connected to the electrode E1 through the second semiconductor region 1PB. The quenching resistor R1 is connected in series with the avalanche photodiode APD (see FIG. 6).

In the photodiode array PDA, each avalanche photodiode APD operates in Geiger mode. In the Geiger mode, a reverse voltage (reverse bias voltage) larger than the breakdown voltage of the avalanche photodiode APD is applied between the anode and the cathode of the avalanche photodiode APD. That is, the (−) potential V1 is applied to the anode, and the (+) potential V2 is applied to the cathode. The polarities of these potentials are relative, and one potential may be a ground potential.

The anode is a P-type first semiconductor region 1PA, and the cathode is an N-type semiconductor substrate 1N. When light (photons) enters the avalanche photodiode APD, photoelectric conversion is performed inside the substrate to generate photoelectrons. Avalanche multiplication is performed in a region near the PN junction interface of the first semiconductor region 1PA, and the multiplied electron group flows toward the electrode E2. That is, when light (photon) is incident on any pixel (avalanche photodiode APD) of the photodiode array PDA, it is multiplied and extracted from the electrode E3 as a signal.

The other end of the quenching resistor R1 connected to each avalanche photodiode APD is electrically connected to a common signal line TL along the main surface 1Na of the semiconductor substrate 1N. Each avalanche photodiode APD operates in the Geiger mode and is connected to a common signal line TL. For this reason, when photons simultaneously enter a plurality of avalanche photodiodes APD, the outputs of the plurality of avalanche photodiodes APD are all input to a common signal line TL. Therefore, the photodiode array PDA measures a high-intensity signal corresponding to the number of incident photons. In each semiconductor photodetector 10 (each photodiode array PDA), a signal is output through the electrode E3.

The mounting substrate 20 has a main surface 20a and a main surface 20b facing each other as shown in FIG. The mounting substrate 20 has a rectangular shape in plan view. Main surface 20a is opposed to main surface 1Nb of semiconductor substrate 1N. Each semiconductor photodetecting element 10 is arranged on the mounting substrate 20 so that the main surface 1Nb and the main surface 20a of the semiconductor substrate 1N face each other. Each semiconductor photodetecting element 10 is two-dimensionally arranged on the mounting substrate 20.

The mounting substrate 20 includes a plurality of electrodes E5 and a plurality of electrodes E7. The electrode E5 and the electrode E7 are disposed at positions corresponding to the respective semiconductor light detection elements 10 (each photodiode array PDA). The electrode E5 and the electrode E7 are disposed on the main surface 20a side.

As shown in FIG. 3, the electrode E5 is disposed outside the semiconductor substrate 1N and in the vicinity of the third side 1N3 when viewed from the facing direction. That is, the electrode E5 is formed on a region located in the vicinity of the third side 1N3 on the main surface 20a. The electrode E5 is exposed from the semiconductor substrate 1N when viewed from the facing direction. The facing direction coincides with the direction in which the main surface 20a and the main surface 20b face each other.

The electrode E7 is arrange | positioned in the position corresponding to the electrode E2, as FIG. 3 shows. That is, the electrode E7 is formed on each region facing the electrode E2 on the main surface 20a.

The mounting substrate 20 includes a plurality of electrodes E6 and a plurality of electrodes E8. The electrode E6 and the electrode E8 are disposed on the main surface 20b side. The electrode E6 is electrically connected to the corresponding electrode E5. The electrode E8 is electrically connected to the corresponding electrode E7. Similarly to the electrodes E1, E2, and E3, the electrodes E5, E6, E7, and E8 are also made of metal (for example, Al). As an electrode material, AuGe / Ni may be used in addition to Al.

The electrode E3 and the electrode E5 are connected by a bonding wire W1. That is, the bonding wire W1 has one end connected to the electrode E3 and the other end connected to the electrode E5. Thereby, the electrode E3 is electrically connected to the electrode E5 via the bonding wire W1. The bonding wire W1 extends so as to straddle the third side 1N3 when viewed from the facing direction. That is, the bonding wire W1 is disposed so as to intersect with the third side 1N3 when viewed from the facing direction. The bonding wire W1 is made of, for example, Al, Cu, or Au. The quenching resistor R1 is electrically connected to the electrode E5 via the signal line TL, the electrode E3, and the bonding wire W1.

The electrode E2 and the electrode E7 are connected by a conductive resin 21, for example. Thereby, the electrode E2 is electrically connected to the electrode E7 through the conductive resin 21. The conductive resin 21 includes a conductive filler and a resin. For example, Ag powder is used as the conductive filler.

The signal processing unit SP is disposed on the main surface 20b side of the mounting substrate 20, for example. The signal processing unit SP constitutes an ASIC (Application Specific Integrated Circuit). Each electrode E6 is electrically connected to the signal processing unit SP via a wiring formed on the mounting substrate 20, a bonding wire (both not shown), and the like. An output signal from each semiconductor photodetector 10 (each photodiode array PDA) is input to the signal processing unit SP, and the signal processor SP processes an output signal from each semiconductor photodetector 10. The signal processing unit SP includes a CMOS circuit that converts an output signal from each semiconductor photodetecting element 10 into a digital pulse. The signal processing unit SP may be disposed on a substrate different from the mounting substrate 20.

Each scintillator 30 is optically connected to the resin 11 by an optical adhesive 31. The scintillator 30 is disposed at a position corresponding to each semiconductor light detection element 10 (each photodiode array PDA). The scintillation light from the scintillator passes through the optical adhesive 31 and the resin 11 and enters the semiconductor light detection element 10. The number of scintillators 30 is the same as the number of semiconductor photodetecting elements 10, and the scintillator 30 and the semiconductor photodetecting elements 10 are in a one-to-one correspondence.

As described above, in the present embodiment, the bonding wire W1 connecting the electrode E3 and the electrode E5 extends so as to straddle the third side 1N3 when viewed from the facing direction. That is, the bonding wire W1 is disposed so as to intersect with the third side 1N3 when viewed from the facing direction. Thereby, the signal of the photodiode array PDA is extracted from the main surface 1Na side of the semiconductor substrate 1N and sent to the main surface 20a side of the mounting substrate 20. In the present embodiment, the electrical connection between the semiconductor substrate 1N and the mounting substrate 20 is realized by the bonding wire W1.

The third side 1N3 is connected to one end of one first side 1N1 and one end of one second side 1N2. That is, the third side 1N3 extends in one direction intersecting one first side 1N1 and one second side 1N2. Therefore, the semiconductor substrate 1N is not formed with a notch that is formed in the semiconductor substrate in the photodetector described in Patent Document 1. For this reason, in the photodetection device 1, a decrease in the mechanical strength of the semiconductor substrate 1N is suppressed.

The length of the third side 1N3 is shorter than the lengths of the first side 1N1 and the second side 1N2. Thereby, the fall of the area of 1st area | region RS1 is suppressed. As described above, the first region RS1 is a region (effective region) where a plurality of pixels (a plurality of avalanche photodiodes APD) are located.

In the present embodiment, the light detection device 1 includes a plurality of semiconductor light detection elements 10. Each semiconductor photodetecting element 10 is arranged on the mounting substrate 20 so that the main surface 1Nb of the semiconductor substrate 1N and the main surface 20a of the mounting substrate 20 face each other. For each semiconductor photodetecting element 10, an electrode E3 and an electrode E5 are connected via a bonding wire W1. Since the light detection device 1 includes the plurality of semiconductor light detection elements 10, the area of the light receiving region of the light detection device 1 can be increased.

In each photodiode array PDA, when the avalanche photodiode APD constituting the pixel detects photons and performs Geiger discharge, a pulsed signal is obtained by the action of the quenching resistor R1 connected to the avalanche photodiode APD. Each avalanche photodiode APD counts photons. Therefore, even when a plurality of photons are incident at the same timing, the number of incident photons is determined according to the output charge amount or the signal intensity of the total output pulse.

In the present embodiment, the semiconductor photodetecting element 10 and the scintillator 30 are tiled on the mounting substrate 20 in such a manner that the semiconductor photodetecting element 10 and the scintillator 30 are coupled on a one-to-one basis. The semiconductor photodetecting elements 10 adjacent in the X-axis direction are tiled so that the first sides 1N1 face each other. The semiconductor photodetecting elements 10 adjacent in the Y-axis direction are tiled so that the second side 1N2 faces each other.

Next, with reference to FIG. 7, the structure of the photodetection device 1 according to a modification of the present embodiment will be described. FIG. 7 is a schematic perspective view of the semiconductor photodetector element around the third side. In FIG. 7, the semiconductor photodetecting element 10 (semiconductor substrate 1N) is schematically shown.

In the modification shown in FIG. 7, the depressions 3 and 5 are formed on the main surface 1Na side of the semiconductor substrate 1N. The recess 3 is formed at a corner formed by the first side 1N1 and the third side 1N3. The recess 5 is formed at a corner formed by the second side 1N2 and the third side 1N3. A step is formed by a recess 3 at a corner formed by the first side 1N1 and the third side 1N3. A step is formed by a recess 5 at a corner formed by the second side 1N2 and the third side 1N3. The depressions 3 and 5 are constituted by slits 45 described later.

The depression 3 is formed along a corner formed by the first side 1N1 and the third side 1N3 when viewed from the facing direction. That is, the recess 3 has a region along the first side 1N1 and a region along the third side 1N3 when viewed from the facing direction. The depression 5 is formed along a corner formed by the second side 1N2 and the third side 1N3 when viewed from the facing direction. That is, the recess 5 has a region along the second side 1N2 and a region along the third side 1N3 when viewed from the facing direction.

In this modification, since the depression 3 is formed at the corner formed by the first side 1N1 and the third side 1N3, it is possible to suppress chipping from occurring at the corner. Since the recess 5 is formed at the corner formed by the second side 1N2 and the third side 1N3, it is possible to suppress chipping from occurring at the corner.

Next, with reference to FIG. 8, the structure of the photodetection device 1 according to a modification of the present embodiment will be described. FIG. 8 is a schematic perspective view of the semiconductor photodetector element around the third side. In FIG. 8, the semiconductor photodetecting element 10 (semiconductor substrate 1N) is schematically shown.

In the modification shown in FIG. 8, metal films 7 and 9 are disposed on the main surface 1Na side of the semiconductor substrate 1N. The metal film 7 is disposed at a corner formed by the first side 1N1 and the third side 1N3. The metal film 9 is disposed at a corner formed by the second side 1N2 and the third side 1N3. The metal film 7 has a side along a direction parallel to the first side 1N1 and a side along a direction parallel to the third side 1N3 when viewed from the facing direction. The metal film 9 has a side along a direction parallel to the second side 1N2 and a side along a direction parallel to the third side 1N3 when viewed from the facing direction. In the present embodiment, each of the metal films 7 and 9 has a pentagonal shape in plan view. The metal films 7 and 9 are made of, for example, Al, Au, or Cu. The metal films 7 and 9 are constituted by a metal film 47 described later.

In the present modification, since the metal film 7 is disposed at the corner formed by the first side 1N1 and the third side 1N3, the mechanical strength of the corner is improved. Thereby, it can suppress that a chipping arises in the corner | angular part which 1st edge | side 1N1 and 3rd edge | side 1N3 make. Since the metal film 9 is disposed at the corner formed by the second side 1N2 and the third side 1N3, the mechanical strength of the corner is improved. Thereby, it can suppress that a chipping arises in the corner | angular part which 2nd edge | side 1N2 and 3rd edge | side 1N3 make.

Next, the configuration of the photodetecting device 1 according to a modification of the present embodiment will be described with reference to FIGS. FIG. 9 is a diagram for explaining the arrangement of the semiconductor photodetecting elements according to this modification. FIG. 10 is a diagram for explaining a cross-sectional configuration of the light detection device according to the present modification. FIG. 11 is a schematic plan view of the semiconductor photodetecting element. FIG. 12 is a schematic diagram showing the configuration of the semiconductor photodetector element around the third side.

The semiconductor photodetecting element 10 has an electrode E9 disposed on the main surface 1Na side of the semiconductor substrate 1N, as shown in FIG. The electrode E9 is connected to the N-type semiconductor region 1PC through a via formed in the insulating layer L1. The electrode E9 is electrically connected to the semiconductor substrate 1N through the semiconductor region 1PC. The electrode E9 is located in the second region RS2. The electrode E9 and the electrode E3 are arranged along the third side 1N3 when viewed from the facing direction. The cross-sectional configuration including the electrode E3 is the same as that of the above-described embodiment (see FIG. 3), and the illustration is omitted.

The electrode E7 has a pad portion E7p. As shown in FIGS. 11 and 12, the pad portion E7p is disposed outside the semiconductor substrate 1N and in the vicinity of the third side 1N3 when viewed from the facing direction. That is, the pad portion E7p is formed on a region located in the vicinity of the third side 1N3 on the main surface 20a. The pad portion E7p is exposed from the semiconductor substrate 1N when viewed from the facing direction. The pad portion E7p and the electrode E5 are arranged along the third side 1N3 when viewed from the facing direction.

The electrode E9 and the pad portion E7p (electrode E7) are connected by a bonding wire W2. That is, the bonding wire W2 has one end connected to the electrode E9 and the other end connected to the pad portion E7p. Thereby, the electrode E9 is electrically connected to the electrode E7 via the bonding wire W2. The semiconductor substrate 1N is electrically connected to the electrode E7 via the semiconductor region 1PC, the electrode E9, and the bonding wire W2. Similar to the bonding wire W1, the bonding wire W2 extends so as to straddle the third side 1N3 when viewed from the facing direction. That is, the bonding wire W2 is also arranged so as to intersect with the third side 1N3 when viewed from the opposing direction. The bonding wire W1 and the bonding wire W2 are arranged in a direction intersecting the third side 1N3 when viewed from the facing direction. The bonding wire W2 is made of, for example, Al, Cu, Au, or the like, similar to the bonding wire W1.

Also in this modified example, as in the above-described embodiment, the electrical connection between the semiconductor substrate 1N and the mounting substrate 20 is realized by the bonding wire W1. A decrease in mechanical strength of the semiconductor substrate 1N is suppressed.

In this modification, the electrode E9 and the electrode E7 are connected via a bonding wire W2. In this case, the cathode potential can be appropriately applied to the semiconductor substrate 1N through the bonding wire W2 and the electrode E9. That is, in this modification, the electrical connection between the semiconductor substrate 1N and the mounting substrate 20 is realized by the bonding wire W2.

The electrode E2 may not be disposed on the main surface 1Nb side of the semiconductor substrate 1N. That is, the main surface 1Nb of the semiconductor substrate 1N may be directly connected to the electrode E7 by the conductive resin 21. In this case, an electrode for applying a cathode potential to the semiconductor substrate 1N does not need to be disposed on the main surface 1Nb side of the semiconductor substrate 1N, and the manufacturing cost of the semiconductor photodetector 10 is reduced. The semiconductor substrate 1N is electrically connected to the electrode E7 through the conductive resin 21.

Next, the configuration of the photodetection device 1 according to a modification of the present embodiment will be described with reference to FIGS. FIG. 13 is a diagram for explaining the arrangement of the semiconductor photodetecting elements according to the present modification. FIG. 14 is a diagram for explaining a cross-sectional configuration of the light detection device according to the present modification. FIG. 15 is a schematic plan view of the semiconductor photodetector element. FIG. 16 is a schematic diagram showing the configuration of the semiconductor photodetector element around the fourth side. Also in this modification, the cross-sectional configuration including the electrode E3 is the same as that of the above-described embodiment (see FIG. 3), and the illustration is omitted.

In this modification, the semiconductor substrate 1N has a hexagonal shape when viewed from the facing direction. That is, the semiconductor substrate 1N has a pair of first sides 1N1, a pair of second sides 1N2, a third side 1N3, and a fourth side 1N4 as outer edges when viewed from the opposite direction. is doing. The pair of first sides 1N1 face each other and are parallel to each other. The pair of second sides 1N2 face each other and are parallel to each other.

The third side 1N3 and the fourth side 1N4 face each other and are parallel to each other. The fourth side 1N4 is connected to the other first side 1N1 and the other second side 1N2. The fourth side 1N4 extends in one direction intersecting the other first side 1N1 and the other second side 1N2. That is, the fourth side 1N4 is located between the other first side 1N1 and the other second side 1N2. The other end of the other first side 1N1 and one end of the fourth side 1N4 are connected. The angle formed by the first side 1N1 and the fourth side 1N4 is, for example, 135 °. The other end of the other second side 1N2 and the other end of the fourth side 1N4 are connected. The angle formed by the second side 1N2 and the fourth side 1N4 is, for example, 135 °.

Not only the length of the third side 1N3 but also the length of the fourth side 1N4 is shorter than the lengths of the first side 1N1 and the second side 1N2. In the present modification, the length of the third side 1N3 and the length of the fourth side 1N4 are equivalent. The length of the third side 1N3 and the length of the fourth side 1N4 may not be the same or may be different.

The semiconductor substrate 1N has a first region RS1, a second region RS2, and a third region RS3 as shown in FIG. The third region RS3 is located outside the first region RS1 and in the vicinity of the fourth side 1N4 when viewed from the facing direction. That is, the third region RS3 is located so as to face the second region RS2 across the first region RS1 when viewed from the facing direction. The third region RS3 has, for example, a triangular shape in plan view. In FIG. 15, the facing direction coincides with the Z-axis direction.

In this modification, the electrode E9 is located in the third region RS3. As shown in FIG. 15, the pad portion E7p of the electrode E7 is disposed outside the semiconductor substrate 1N and in the vicinity of the fourth side 1N4 when viewed from the facing direction. That is, the pad portion E7p is formed on a region located in the vicinity of the fourth side 1N4 on the main surface 20a. The bonding wire W2 extends so as to straddle the fourth side 1N4 when viewed from the facing direction. That is, the bonding wire W2 is disposed so as to intersect the fourth side 1N4 when viewed from the facing direction.

Also in this modification, as in the modification shown in FIGS. 9 to 12, the electrical connection between the semiconductor substrate 1N and the mounting substrate 20 is realized by the bonding wires W1 and W2. A decrease in mechanical strength of the semiconductor substrate 1N is suppressed. Similarly to the modification shown in FIGS. 9 to 12, the electrode E2 may not be disposed on the main surface 1Nb side of the semiconductor substrate 1N. In this case, the manufacturing cost of the semiconductor photodetector 10 is reduced.

The length of the fourth side 1N4 is shorter than the lengths of the first side 1N1 and the second side 1N2. Thereby, the fall of the area of 1st area | region RS1 is suppressed.

Next, with reference to FIG. 17, a configuration of a modified example of the photodetecting device 1 shown in FIGS. 13 to 16 will be described. FIG. 17 is a schematic perspective view of the semiconductor photodetector element around the fourth side. In FIG. 17, the semiconductor photodetecting element 10 (semiconductor substrate 1N) is schematically shown.

In the modification shown in FIG. 17, depressions 13 and 15 are formed on the main surface 1Na side of the semiconductor substrate 1N. The recess 13 is formed at a corner formed by the first side 1N1 and the fourth side 1N4. The recess 15 is formed at a corner formed by the second side 1N2 and the fourth side 1N4. A step is formed by a recess 13 at a corner formed by the first side 1N1 and the fourth side 1N4. A step is formed by a recess 15 at a corner formed by the second side 1N2 and the fourth side 1N4. Although not shown, the above-described recesses 3 and 5 may be formed in the semiconductor substrate 1N.

The depression 13 is formed along a corner formed by the first side 1N1 and the fourth side 1N4 when viewed from the facing direction. That is, the depression 13 has a region along the first side 1N1 and a region along the fourth side 1N4 when viewed from the facing direction. The recess 15 is formed along a corner formed by the second side 1N2 and the fourth side 1N4 when viewed from the facing direction. That is, the recess 15 has a region along the second side 1N2 and a region along the fourth side 1N4 when viewed from the facing direction.

In this modification, since the depression 13 is formed at the corner formed by the first side 1N1 and the fourth side 1N4, it is possible to suppress chipping from occurring at the corner. Since the depression 15 is formed at the corner formed by the second side 1N2 and the fourth side 1N4, it is possible to suppress chipping from occurring at the corner.

Next, with reference to FIG. 18, a configuration of a modified example of the photodetecting device 1 shown in FIGS. 13 to 16 will be described. FIG. 18 is a schematic perspective view of the semiconductor photodetector element around the fourth side. In FIG. 18, the semiconductor photodetecting element 10 (semiconductor substrate 1N) is schematically shown.

In the modification shown in FIG. 8, metal films 17 and 19 are arranged on the main surface 1Na side of the semiconductor substrate 1N. The metal film 17 is disposed at a corner formed by the first side 1N1 and the fourth side 1N4. The metal film 19 is disposed at a corner formed by the second side 1N2 and the fourth side 1N4. Although illustration is omitted, the metal films 7 and 9 described above may be formed on the semiconductor substrate 1N.

The metal film 17 has a side along the first side 1N1 and a side along the fourth side 1N4 when viewed from the facing direction. The metal film 19 has a side along the second side 1N2 and a side along the fourth side 1N4 when viewed from the facing direction. In this modification, the metal films 17 and 19 have a pentagonal shape in plan view. The metal films 17 and 19 are made of, for example, Al, Au, or Cu, as with the metal films 7 and 9.

In this modification, since the metal film 17 is disposed at the corner formed by the first side 1N1 and the fourth side 1N4, the mechanical strength of the corner is improved. Thereby, it can suppress that a chipping arises in the corner | angular part which the 1st edge | side 1N1 and the 4th edge | side 1N4 make. Since the metal film 19 is disposed at the corner formed by the second side 1N2 and the fourth side 1N4, the mechanical strength of the corner is improved. Thereby, it can suppress that a chipping arises in the corner | angular part which 2nd edge | side 1N2 and 4th edge | side 1N4 make.

Next, the configuration of the photodetecting device 1 according to a modification of the present embodiment will be described with reference to FIGS. FIG. 19 is a schematic perspective view showing a light detection device according to a modification of the present embodiment. 20 to 22 are schematic plan views of the semiconductor photodetector element.

19 and 20, the photodetection device 1 includes one semiconductor photodetection element 10, one mounting substrate 20, and one scintillator 30. Also in this modification, as in the above-described embodiment, the electrical connection between the semiconductor substrate 1N and the mounting substrate 20 is realized by the bonding wire W1. A decrease in mechanical strength of the semiconductor substrate 1N is suppressed.

21 and 22 also, the light detection device 1 includes one semiconductor light detection element 10, one mounting substrate 20, and one scintillator 30. Also in this modification, the electrical connection between the semiconductor substrate 1N and the mounting substrate 20 is realized by the bonding wires W1 and W2. A decrease in mechanical strength of the semiconductor substrate 1N is suppressed.

Next, with reference to FIGS. 23 to 29, a manufacturing process of the semiconductor photodetector 10 according to the present embodiment will be described. 23 to 29 are views for explaining a manufacturing process of the semiconductor photodetector element according to the present embodiment.

First, a semiconductor substrate (semiconductor wafer) 40 is prepared (see FIG. 23). The semiconductor substrate 40 includes a plurality of element formation regions 42. The plurality of element formation regions 42 are located adjacent to each other in the first direction D1 and the second direction D2 intersecting the first direction D1. In the present embodiment, the first direction D1 and the second direction D2 are orthogonal to each other. The element formation region 42 has a pentagonal shape in plan view. In FIG. 23, for the sake of explanation, the position that becomes the boundary between the adjacent element formation regions 42 is indicated by a solid line.

The element formation region 42 has a configuration corresponding to the semiconductor photodetecting element 10 shown in FIG. That is, in the element formation region 42, although not shown in FIG. 23, a plurality of avalanche photodiodes APD (first semiconductor region 1PA and second semiconductor region 1PB), quenching resistor R1, semiconductor region 1PC, signal line TL, electrodes E2 and E3, and insulating layers L1 and L3 are formed at corresponding positions. The semiconductor substrate 40 is divided into individual pieces to constitute the semiconductor substrate 1N. The formation processes of the avalanche photodiode APD, the quenching resistor R1, the semiconductor region 1PC, the signal line TL, the electrodes E2 and E3, and the insulating layers L1 and L3 are known in the art, and detailed description thereof is omitted.

Next, the semiconductor substrate 40 is singulated for each of the plurality of element formation regions 42 (see FIG. 30). Thereby, the semiconductor photodetection element 10 is obtained.

In this embodiment, the semiconductor substrate 40 is separated into pieces by using the stealth dicing technique. The stealth dicing technique is a dicing technique in which a modified region is formed at an arbitrary position by irradiating a semiconductor substrate (semiconductor wafer) with a laser beam, and the semiconductor substrate is cut from the modified region as a starting point (for example, (See JP 2009-135342 A). A laser processing apparatus used for the stealth dicing technique is called a so-called SDE (stealth dicing engine: registered trademark). This SDE is, for example, a laser light source that oscillates laser light, a dichroic mirror that is arranged so as to change the direction of the optical axis (optical path) of the laser light, and a condensing lens for condensing the laser light ( A condensing optical system).

In this process, the laser beam L is irradiated from the main surface 40a side, and a condensing point P is formed inside the semiconductor substrate 40 (see FIG. 24). In this state, the laser light L is relatively moved along a planned cutting line (a line along the solid line in FIG. 24) located at the boundary of the adjacent element forming regions 42 among the plurality of element forming regions 42. The Thereby, the modified region MR is formed inside the semiconductor substrate 40 along the planned cutting line (see FIGS. 25 and 26). The modified region MR is a starting point for cutting. Next, starting from the formed modified region MR, the semiconductor substrate 40 is cut, and the semiconductor substrate 40 is singulated. 24 to 26, a semiconductor substrate 40 (semiconductor wafer) is schematically illustrated, and an avalanche photodiode APD, a quenching resistor R1, a semiconductor region 1PC, a signal line TL, electrodes E2 and E3, and insulating layers L1 and L3 are illustrated. Such illustrations are omitted.

The condensing point P is a part where the laser light L is condensed. The modified region MR may be formed continuously or may be formed intermittently. The modified region MR may be in a line shape or a dot shape. The modified region MR may be formed at least inside the semiconductor substrate 40. A crack may be formed starting from the modified region MR. The crack and modified region MR may be exposed on the outer surface (front surface, back surface, or outer peripheral surface) of the semiconductor substrate 40.

The laser beam L is transmitted through the semiconductor substrate 40 and is particularly absorbed near the condensing point inside the semiconductor substrate 40, whereby a modified region MR is formed in the semiconductor substrate 40 (that is, an internal absorption laser). processing). Therefore, since the laser beam L is hardly absorbed by the main surface 40a of the semiconductor substrate 40, the main surface 40a of the semiconductor substrate 40 does not melt.

The modified region formed in the present embodiment is a region where the density, refractive index, mechanical strength, or other physical characteristics are different from the surroundings. Examples of the modified region include a melt processing region, a crack region, a dielectric breakdown region, or a refractive index change region, and there are also regions where these are mixed. As the modified region, there are a region where the density of the modified region in the semiconductor substrate 40 is changed as compared with the density of the non-modified region, and a region where lattice defects are formed (collectively, these are collectively referred to as a high-density transition region). Say).

Here, the scheduled cutting line will be described in detail with reference to FIG.

A pair of scheduled cutting lines 51 parallel to the second direction D2, a pair of scheduled cutting lines 52 parallel to the first direction D1, and a planned cutting line 53 are set on the five sides of each element forming region 42. Yes. One cutting planned line 51 and the planned cutting line 53 are connected. One cutting planned line 52 and the cutting planned line 53 are connected. In each element formation region 42, the length of the planned cutting line 53 is shorter than the length of each of the planned cutting line 51 and the planned cutting line 52.

In the present embodiment, four element formation regions 42 are handled as one arrangement unit. The four element formation regions 42 are arranged such that a rectangle is formed by the planned cutting line 53 of each element formation region 42. A rectangular area surrounded by the planned cutting line 53 is an ineffective area that is not used as an element. The semiconductor substrate 40 includes a plurality of the above arrangement units. The plurality of arrangement units are arranged adjacent to each other in the first direction D1 and the second direction D2.

In the region surrounded by the planned cutting line 53, the planned cutting line 51 and the planned cutting line 52 do not intersect. Except for the region surrounded by the planned cutting line 53, the planned cutting line 51 and the planned cutting line 52 intersect.

In the region surrounded by the planned cutting line 53, the planned cutting line 51 is separated in the first direction D1. That is, in the two element formation regions 42 adjacent in the first direction D1, the one scheduled cutting line 51 connected to the scheduled cutting line 53 is separated in the first direction D1. Within the region surrounded by the planned cutting line 53, the planned cutting line 52 is separated in the second direction D2. That is, in the two element formation regions 42 adjacent in the second direction D2, the one scheduled cutting line 52 connected to the scheduled cutting line 53 is separated in the second direction D2.

The semiconductor substrate 40 is affixed to an expanded tape (dicing tape) (not shown). In this state, the semiconductor substrate 40 is irradiated with the laser light L along the planned cutting line 51 as described above. As a result, a modified region 61 is formed in the semiconductor substrate 40 along the planned cutting line 51 (see FIG. 28). In the region surrounded by the planned cutting line 53, the modified regions 61 are separated in the first direction D1.

The semiconductor substrate 40 is irradiated with the laser light L along the scheduled cutting line 52 as described above. Thereby, the modified region 62 is formed in the semiconductor substrate 40 along the planned cutting line 52 (see FIG. 28). Within the region surrounded by the planned cutting line 53, the modified regions 62 are separated in the second direction D2. Except for the region surrounded by the planned cutting line 53, the modified region 61 and the modified region 62 intersect each other.

The semiconductor substrate 40 is irradiated with the laser light L along the scheduled cutting line 53 as described above. As a result, a modified region 63 is formed in the semiconductor substrate 40 along the planned cutting line 53 (see FIG. 28). The reforming region 63 is not connected to the reforming regions 61 and 62, and the reforming region 63 is separated from the reforming regions 61 and 62. That is, the modified region 63 is formed in the intermediate portion 53 b excluding both end portions 53 a of the planned cutting line 53. The length of each end portion 53a is set to a distance at which the crack generated from the modified region 63 extends toward the scheduled cutting lines 51 and 52. The length of each end portion 53a is set to 10 μm, for example.

After the modified regions 61, 62, 63 are formed on the semiconductor substrate 40, the expanded tape is expanded. As a result, cracks generated from the modified regions 61, 62, 63 reach the main surfaces 40 a, 40 b of the semiconductor substrate 40, and the semiconductor substrate 40 is cut along the scheduled cutting lines 51, 52, 53. At this time, the crack generated from the modified region 63 reaches the modified regions 61 and 62. Therefore, a plurality of element formation regions 42 are cut out from the semiconductor substrate 40, and as shown in FIG. 29, a plurality of semiconductor photodetector elements 10 having the configuration shown in FIG. 3 are obtained.

When the semiconductor substrate 40 is cut along the planned cutting line 51, the side surface constituting the first side 1N1 is formed when the semiconductor photodetector 10 is viewed from the facing direction. By cutting the semiconductor substrate 40 along the planned cutting line 52, a side surface constituting the second side 1N2 is formed when the semiconductor photodetector 10 is viewed from the facing direction. By cutting the semiconductor substrate 40 along the planned cutting line 53, a side surface constituting the third side 1N3 is formed when the semiconductor photodetector 10 is viewed from the facing direction.

In the manufacturing process described above, the scheduled cutting lines 51 and 52 extend in an ineffective area that is not used as an element. For this reason, when the modified regions 61 and 62 are formed along the scheduled cutting lines 51 and 52, the position where the irradiation of the laser light L is turned on / off is located in the ineffective region. Even when the positions of the modified regions 61 and 62 are shifted in accordance with the ON / OFF accuracy of the irradiation with the laser beam L, the semiconductor substrate 40 is appropriately cut. The length of the portion of the scheduled cutting lines 51 and 52 located in the ineffective area is set in consideration of the ON / OFF accuracy of the laser light L irradiation. The length of the part located in the ineffective area of the scheduled cutting lines 51 and 52 is set to 10 μm, for example.

The modified region 63 formed along the planned cutting line 53 is separated from the modified regions 61 and 62. Even when the position of the modified region 63 is shifted in accordance with the ON / OFF accuracy of the irradiation with the laser beam L, the modified region 63 is not formed in the element forming region 42. Therefore, the length of each end portion 53a needs to be set in consideration of the ON / OFF accuracy of the irradiation with the laser light L. Even in this case, the length of each end portion 53a is set to 10 μm, for example.

The plurality of element formation regions 42 are located adjacent to each other in the first direction D1 and the second direction D2, and the scheduled cutting lines 51 and 52 are not complicated. Therefore, the process time for cutting the semiconductor substrate 40 by the stealth dicing technique is short.

Next, with reference to FIG. 30, a modified example of the manufacturing process of the semiconductor photodetector 10 according to the present embodiment will be described. FIG. 30 is a diagram for explaining a modification of the manufacturing process of the semiconductor photodetecting element 10.

In this modification, a slit 45 is formed in the semiconductor substrate 40 as shown in FIG. The slit 45 extends from a connection point (intersection) between the planned cutting lines 51 and 52 and the planned cutting line 53 along the planned cutting lines 51 and 52 and the planned cutting line 53, respectively. No scheduled cutting lines 51 and 52 are set in the non-effective area that is not used as an element. Of course, as shown in FIG. 27, the scheduled cutting lines 51 and 52 may be set in the ineffective area. Each length from the connection point along the scheduled cutting lines 51, 52, 53 of the slit 45 is set in consideration of the ON / OFF accuracy of the laser light L irradiation. The length of the slit 45 from the connection point is set to 10 μm, for example.

The reformed regions 61, 62, 63 are formed so as to reach the slit 45 as shown in (b) of FIG. In this case, when the expanded tape is expanded, cracks generated from the modified regions 61, 62, 63 extend along the slit 45. Therefore, the semiconductor substrate 40 is appropriately cut even at a position where three of the scheduled cutting lines 51, 52, 53 intersect. The slits 45 formed in the semiconductor substrate 40 remain as the depressions 3 and 5 in the separated semiconductor photodetector 10.

Next, with reference to FIG. 31, a modification of the manufacturing process of the semiconductor photodetector 10 according to the present embodiment will be described. FIG. 31 is a diagram for explaining a modification of the manufacturing process of the semiconductor photodetector 10.

In this modified example, as shown in FIG. 31A, a plurality of metal films 47 are formed. The plurality of metal films 47 are disposed in the vicinity of connection points between the planned cutting lines 51 and 52 and the planned cutting line 53. Each metal film 47 has a polygonal shape in plan view. In this modification, the metal film 47 has a pentagonal shape. The metal film 47 has sides along the planned cutting lines 51, 52, 53 in plan view. The plurality of metal films 47 are arranged such that the sides along the scheduled cutting lines 51, 52, and 53 are opposed to each other with the scheduled cutting lines 51, 52, and 53 in plan view. The metal film 47 is made of, for example, Al, Au, or Cu.

The reformed regions 61, 62, 63 are formed so as to intersect at connection points between the planned cutting lines 51, 52 and the planned cutting line 53, as shown in FIG. 31 (b). Even when the irradiation position of the laser beam L enters the element formation region 42 according to the ON / OFF accuracy of the irradiation of the laser beam L, the metal film 47 prevents the laser beam L from being irradiated into the semiconductor substrate 40. be able to. Thereby, the modified region 63 is not formed in the element forming region 42. Therefore, the semiconductor substrate 40 is appropriately cut even at a position where three of the scheduled cutting lines 51, 52, 53 intersect. The metal film 47 formed on the semiconductor substrate 40 remains as the metal films 7 and 9 in the separated semiconductor photodetector 10.

Next, with reference to FIGS. 32 to 35, a manufacturing process of the semiconductor photodetector 10 according to the modification of the present embodiment will be described. 32 to 35 are views for explaining the manufacturing process of the semiconductor photodetector element according to the modification of the present embodiment.

In the present modification, the plurality of element formation regions 42 included in the prepared semiconductor substrate 40 have a configuration corresponding to the semiconductor photodetector 10 shown in FIG. The element formation region 42 has a hexagonal shape in plan view. In FIG. 32 and FIG. 34, the position (scheduled cutting line 51, 52, 53) that becomes the boundary between the adjacent element formation regions 42 is indicated by a solid line for the sake of explanation.

In the modification shown in FIG. 32, on the six sides of the element formation region 42, a pair of planned cutting lines 51 parallel in the second direction D2, a pair of planned cutting lines 52 parallel in the first direction D1, A pair of scheduled cutting lines 53 that are parallel in the direction intersecting the first and second directions D1 and D2 are set. Also in this modification, four element formation regions 42 are handled as one arrangement unit. The four element formation regions 42 are arranged such that a rectangle is formed by the planned cutting line 53 of each element formation region 42. The semiconductor substrate 40 includes a plurality of the above arrangement units. The plurality of arrangement units are arranged adjacent to each other in the first direction D1 and the second direction D2.

By dividing the semiconductor substrate 40 into pieces for each of the plurality of element formation regions 42, as shown in FIG. 33, a plurality of semiconductor photodetector elements 10 having the configuration shown in FIG. 14 are obtained. The process of dividing the semiconductor substrate 40 is the same as the above-described process of dividing the semiconductor substrate 40 to obtain a plurality of semiconductor photodetector elements 10 having the configuration shown in FIG. That is, the semiconductor substrate 40 is cut along the scheduled cutting line 51, whereby the side surface constituting the first side 1N1 is formed when the semiconductor photodetector 10 is viewed from the facing direction. By cutting the semiconductor substrate 40 along the planned cutting line 52, a side surface constituting the second side 1N2 is formed when the semiconductor photodetector 10 is viewed from the facing direction. By cutting the semiconductor substrate 40 along the planned cutting line 53, a side surface constituting the third side 1N3 or a side surface constituting the fourth side 1N4 is formed when the semiconductor photodetector 10 is viewed from the facing direction.

Also in this modified example, as shown in (a) of FIG. 30, the slit 45 may be formed in the semiconductor substrate 40. In this case, the slits 45 formed in the semiconductor substrate 40 remain as the depressions 3, 5, 13, and 15 in the separated semiconductor photodetector 10. As shown in FIG. 31A, a plurality of metal films 47 may be formed. In this case, the metal film 47 formed on the semiconductor substrate 40 remains as the metal films 7, 9, 17, and 19 in the separated semiconductor photodetector 10.

In the modification shown in FIG. 34, the six sides of the element forming region 42 are paired with a pair of scheduled cutting lines 51 parallel to the first and second directions D1 and D2, and the first and second directions. A pair of scheduled cutting lines 52 parallel to the direction intersecting D1 and D2 and a pair of scheduled cutting lines 53 parallel to the second direction D2 are set. The element formation regions 42 are arranged in the above direction intersecting the first and second directions D1 and D2. That is, in this modification, the plurality of element formation regions 42 are arranged in a honeycomb shape. Each of the scheduled cutting lines 51, 52, 53 is set such that a plurality of element forming regions 42 are arranged in a honeycomb shape.

By dividing the semiconductor substrate 40 into pieces for each of the plurality of element formation regions 42, as shown in FIG. 35, a plurality of semiconductor photodetector elements 10 having the configuration shown in FIG. 14 are obtained. The process of dividing the semiconductor substrate 40 is the same as the above-described process of dividing the semiconductor substrate 40 to obtain a plurality of semiconductor photodetector elements 10 having the configuration shown in FIG. Therefore, also in this modified example, when the semiconductor substrate 40 is cut along the scheduled cutting line 51, a side surface constituting the first side 1N1 is formed when the semiconductor photodetector 10 is viewed from the facing direction. By cutting the semiconductor substrate 40 along the planned cutting line 52, a side surface constituting the second side 1N2 is formed when the semiconductor photodetector 10 is viewed from the facing direction. By cutting the semiconductor substrate 40 along the planned cutting line 53, a side surface constituting the third side 1N3 or a side surface constituting the fourth side 1N4 is formed when the semiconductor photodetector 10 is viewed from the facing direction.

34 and FIG. 35, when the semiconductor substrate 40 is cut, an ineffective region that is not used as an element is hardly generated. Therefore, the semiconductor substrate 40 is appropriately cut and the semiconductor substrate 40 is effectively utilized.

Also in this modified example, as shown in (a) of FIG. 30, the slit 45 may be formed in the semiconductor substrate 40. In this case, the slits 45 formed in the semiconductor substrate 40 remain as the depressions 3, 5, 13, and 15 in the separated semiconductor photodetector 10. In this case, in this modification, a depression is also formed at the corner formed by the first side 1N1 and the second side 1N2. As shown in FIG. 31A, a plurality of metal films 47 may be formed. In this case, the metal film 47 formed on the semiconductor substrate 40 remains as the metal films 7, 9, 17, and 19 in the separated semiconductor photodetector 10. In this case, in this modification, a metal film is also formed at the corner portion formed by the first side 1N1 and the second side 1N2.

As mentioned above, although embodiment of this invention has been described, this invention is not necessarily limited to embodiment mentioned above, A various change is possible in the range which does not deviate from the summary.

The shapes of the first and second semiconductor regions 1PA and 1PB are not limited to the shapes described above, but may be other shapes (for example, circular shapes). The number (number of rows and columns) and arrangement of the avalanche photodiodes APD (second semiconductor regions 1PB) are not limited to the numbers and arrangement shown in the figure. The number and arrangement of the photodiode arrays PDA (channels) are not limited to the illustrated number and arrangement.

The present invention can be used for a light detection device that detects weak light.

DESCRIPTION OF SYMBOLS 1 ... Photodetection device, 1N ... Semiconductor substrate, 1N1 ... First side, 1N2 ... Second side, 1N3 ... Third side, 1N4 ... Fourth side, 1Na, 1Nb ... Main surface of semiconductor substrate, 1PA ... First semiconductor Region, 1PB ... second semiconductor region, 3, 5, 13, 15 ... depression, 7, 9, 17, 19 ... metal film, 10 ... semiconductor photodetector, 20 ... mounting substrate, 20a, 20b ... main mounting substrate APD, avalanche photodiode, E1 to E3, E5 to E9, electrode, PDA, photodiode array, R1, quenching resistor, TL, signal line, W1, W2, bonding wire.

Claims (11)

1. A light detection device comprising:
   A semiconductor photodetector having a semiconductor substrate on which a photodiode array having a plurality of pixels is formed and including a first main surface and a second main surface facing each other;
   A mounting substrate including the semiconductor photodetecting element and a third main surface facing the second main surface of the semiconductor substrate and a fourth main surface facing the third main surface;
   A first wire that electrically connects the semiconductor photodetecting element and the mounting substrate,
   The semiconductor substrate includes a pair of first sides opposed to each other, a pair of second sides opposed to each other, and Having a third side connected to one end of the first side and one end of the second side;
   The semiconductor photodetecting element has a first electrode disposed on the first main surface side of the semiconductor substrate and electrically connected to the plurality of pixels,
   The mounting substrate has a second electrode disposed on the third main surface side,
   The first wire has one end connected to the first electrode and the other end connected to the second electrode, and the first main surface and the second main surface are opposed to each other. It is arrange | positioned so that it may cross | intersect the said 3rd side seeing from the said direction.
2. The photodetection device according to claim 1,
   In the corner portion formed by the first side and the third side, and the corner portion formed by the second side and the third side in the semiconductor substrate, the first main surface and the second main surface are A depression is formed along each of the corners when viewed from the facing direction.
3. The photodetection device according to claim 1,
   In the semiconductor substrate, metal films are disposed at corners formed by the first side and the third side, and corners formed by the second side and the third side.
4. The photodetection device according to any one of claims 1 to 3,
   The length of the third side is shorter than the lengths of the first side and the second side.
5. The photodetection device according to any one of claims 1 to 4,
   A second wire that electrically connects the semiconductor photodetecting element and the mounting substrate;
   The semiconductor photodetecting element has a third electrode disposed on the first main surface side of the semiconductor substrate and electrically connected to the semiconductor substrate,
   The mounting substrate has a fourth electrode disposed on the third main surface side,
   The second wire has one end connected to the third electrode and the other end connected to the fourth electrode, and the first main surface and the second main surface are opposed to each other. It is arrange | positioned so that it may cross | intersect the said 3rd side seeing from the said direction.
6. The photodetection device according to any one of claims 1 to 4,
   A second wire that electrically connects the semiconductor photodetecting element and the mounting substrate;
   The semiconductor substrate is connected to one end of the other first side and the other end of the second side as seen from the direction in which the first main surface and the second main surface are opposed to each other. Has a fourth side,
   The semiconductor photodetecting element has a third electrode disposed on the first main surface side of the semiconductor substrate and electrically connected to the semiconductor substrate,
   The mounting substrate has a fourth electrode disposed on the third main surface side,
   The second wire has one end connected to the third electrode and the other end connected to the fourth electrode, and the first main surface and the second main surface are opposed to each other. It is arrange | positioned so that it may cross | intersect the said 4th side seeing from the said direction.
7. The light detection device according to claim 6,
   In the corner formed by the first side and the fourth side and the corner formed by the second side and the fourth side in the semiconductor substrate, the first main surface and the second main surface are A depression is formed along each of the corners when viewed from the facing direction.
8. The light detection device according to claim 6,
   A metal film is disposed on a corner formed by the first side and the fourth side and a corner formed by the second side and the fourth side in the semiconductor substrate.
9. The photodetection device according to any one of claims 6 to 8,
   The length of the fourth side is shorter than the lengths of the first side and the second side.
10. The photodetection device according to any one of claims 1 to 9,
    A plurality of the semiconductor photodetecting elements,
    The plurality of semiconductor photodetecting elements are disposed on the mounting substrate such that the second main surface and the third main surface are opposed to each other.
    For each of the semiconductor photodetector elements, the first electrode and the second electrode are connected via the first wire.
11. The photodetection device according to any one of claims 1 to 10,
    The photodiode array is
    A plurality of avalanche photodiodes operating in the Geiger mode and formed in the semiconductor substrate;
    A quenching resistor connected in series to each of the avalanche photodiodes and disposed on the first main surface side of the semiconductor substrate;
    The quenching resistor is connected in parallel and disposed on the first main surface side of the semiconductor substrate, and
    The signal line is connected to the first electrode.

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