TW201637188A - Light detecting device - Google Patents

Abstract

When viewed in a direction in which a main surface 1Na of a semiconductor substrate 1N of the present invention, and a main surface 1Nb thereof oppose each other, the semiconductor substrate has a pair of opposing first edges 1N1, a pair of opposing second edges 1N2, and a third edge 1N3 that is connected to one end of one of the first edges 1N1 and one end of one of the second edges 1N2. An electrode E3 is allocated on the semiconductor substrate 1N, and is electrically connected to a plurality of pixels (avalanche photodiodes APD). Electrode E5 is allocated on a mounting substrate 20. A bonding wire W1 has one end that is connected to the electrode E3 and the other end that is connected to the electrode E5. The welding wire W1 is allocated so as to cross the third edge 1N3 when viewed in the direction in which the main surface 1Na and the main surface 1Nb oppose each other.

Description

Light detecting device

The present invention relates to a light detecting device.

A photodetecting device including a semiconductor photodetecting element and a mounting substrate on which the semiconductor photodetecting element is disposed is known (for example, see Patent Document 1). The semiconductor photodetecting element includes a semiconductor substrate on which a photodiode array having a plurality of pixels is formed. The semiconductor photodetecting element is opposed to the mounting substrate. The semiconductor substrate includes a pair of first sides facing each other in a plan view and a pair of opposite sides facing each other.

[Previous Technical Literature] [Patent Literature]

Patent Document 1: US Patent No. 8420433

In the photodetecting device described in Patent Document 1, a notch is formed at a corner portion of the semiconductor substrate, that is, a corner formed by the first side and the second side. A lead wire that connects the first electrode disposed on the semiconductor substrate and the second electrode disposed on the mounting substrate is disposed at the notch position. The notch is formed as follows: at one corner of the semiconductor substrate, it is cut into the inside of the semiconductor substrate in plan view.

By forming the notch, the outer edge of the semiconductor substrate is included in one of the first side and the second side of the pair, and is also included in one of the third sides extending in the direction intersecting each other. In the photodetecting device described in Patent Document 1, the pair of third sides are orthogonal. At the top of the gap, ie The mechanical strength of the semiconductor substrate is easily lowered by the angle between the pair of third sides. Therefore, there is a problem that cracks are generated from the angle between the pair of third sides toward the inside of the semiconductor substrate.

An aspect of the present invention is to provide a photodetecting device which can suppress a decrease in mechanical strength of a semiconductor substrate, and electrical connection between the semiconductor substrate and the mounting substrate can be realized by a wire.

A photodetecting device according to an aspect of the present invention includes a semiconductor photodetecting element including a semiconductor substrate, a mounting substrate on which a semiconductor photodetecting element is disposed, and a first conductive wire electrically connected to the semiconductor photodetecting element and the mounting substrate. The semiconductor substrate is formed with an array of photodiodes having a plurality of pixels, and includes first and second major surfaces that face each other. The mounting substrate includes a third major surface opposite the second major surface of the semiconductor substrate, and a fourth major surface opposite the third major surface. The semiconductor substrate includes: one side opposite to the first side, one opposite to the second side, and the third side when viewed from a direction opposite to the first main surface and the second main surface, which are connected to the first side One end of one side and one end of one second side. The semiconductor light detecting element includes a first electrode disposed on a first main surface side of the semiconductor substrate. The first electrode is electrically connected to the plurality of pixels. The mounting substrate includes a second electrode disposed on the third main surface side. The first wire has one end connected to one end of the first electrode and the other end connected to the second electrode. The first wire is configured to intersect the third side as viewed from a direction opposite the first major surface and the second major surface.

In the light detecting device of the present aspect, the first wire connecting the first electrode and the second electrode is disposed as follows: the third side intersects from the direction opposite to the first main surface and the second main surface. The signal of the photodiode array is extracted from the first main surface side of the semiconductor substrate and transferred to the third main surface side of the mounting substrate. That is, the electrical connection between the semiconductor substrate and the mounting substrate is achieved by the first wire.

The third side is connected to one end of the first side and one end of the second side. That is, the third side extends in a direction crossing one of the first side and the second side. In this aspect of the light detection device In the case where the semiconductor substrate does not have a notch formed in the semiconductor substrate in the photodetecting device described in Patent Document 1, the mechanical strength of the semiconductor substrate can be suppressed from being lowered.

a corner formed by the first side and the third side of the semiconductor substrate, and a corner formed by the second side and the third side, viewed from a direction opposite to the first main surface and the second main surface The corners form a notch. In this case, it is possible to suppress the generation of debris at each of the above corner portions.

A metal film can be disposed at a corner formed by the first side and the third side of the semiconductor substrate and a corner formed by the second side and the third side. In this case, since the mechanical strength of each of the corner portions is improved, generation of debris at each corner portion can be suppressed.

The length of the third side may be shorter than the length of each of the first side and the second side. In this case, the area in which the area (effective area) in which a plurality of pixels are located is suppressed from decreasing.

The light detecting device of the present aspect may include a second wire electrically connected to the semiconductor light detecting element and the mounting substrate. In this case, the semiconductor photodetecting element includes a third electrode disposed on the first main surface side of the semiconductor substrate, and a mounting substrate including a fourth electrode disposed on the third main surface side. The third electrode is electrically connected to the semiconductor substrate. The second wire has one end connected to the third electrode and the other end connected to the fourth electrode. The second wire may be configured to intersect the third side as viewed from a direction opposite the first major surface and the second major surface. In the present aspect, a specific potential (for example, a cathode potential) can be appropriately applied to the semiconductor substrate by the second wire and the third electrode. That is, the electrical connection between the semiconductor substrate and the mounting substrate is achieved by the second wire.

The semiconductor substrate may include a fourth side viewed from a direction opposite to the first main surface and the second main surface, and connected to one end of the other first side and one end of the other second side. In this case, the second wire may be configured to intersect the fourth side as viewed from a direction opposite the first major surface and the second major surface. In this embodiment, a specific potential (for example, a cathode potential) can be appropriately applied to the semiconductor substrate by the second wire and the third electrode. That is, the electrical connection between the semiconductor substrate and the mounting substrate is achieved by the second wire.

The fourth side is connected to one end of one side and one end of the other second side. That is, the fourth side Crossing extends in the direction of one of the other first side and the other second side. Therefore, in the present embodiment, since the photodetecting device described in Patent Document 1 is not formed in the semiconductor substrate in the semiconductor substrate, the mechanical strength of the semiconductor substrate is suppressed from being lowered.

a corner formed by the first side and the fourth side of the semiconductor substrate, and a corner formed by the second side and the fourth side, viewed from a direction opposite to the first main surface and the second main surface The corners form a notch. In this case, it is possible to suppress the generation of debris at each of the above corner portions.

A metal film can be disposed at a corner formed by the first side and the fourth side of the semiconductor substrate and at a corner formed by the second side and the fourth side. In this case, since the mechanical strength of each of the corner portions is improved, generation of debris at each corner portion can be suppressed.

The length of the fourth side may be shorter than the length of each of the first side and the second side. In this case, the area in which the area (effective area) in which a plurality of pixels are located is suppressed from decreasing.

The light detecting device of the present aspect may include a plurality of semiconductor light detecting elements. In this case, the plurality of semiconductor light detecting elements are disposed on the mounting substrate such that the second main surface faces the third main surface, and the first electrode and the second electrode are provided for each of the semiconductor light detecting elements. Connected via a first wire. In the present embodiment, since the photodetecting device includes a plurality of semiconductor photodetecting elements, it is possible to increase the area of the light receiving region of the photodetecting device.

The photodiode array includes: a plurality of avalanche photodiodes operating in a Geiger mode and formed in a semiconductor substrate; and a quenching resistor connected in series to each of the avalanche photodiodes and disposed on the semiconductor substrate a first main surface side; a signal line connected in parallel to the quenching resistor, and disposed on the first main surface side of the semiconductor substrate, wherein the signal line is connectable to the first electrode. In this case, in the photodiode array, the avalanche photodiode constituting the pixel is pulsed by the operation of the quenching resistor connected to the avalanche photodiode when the photon is subjected to the GeGe discharge. Signal. Each avalanche photodiode counts individual photons. Therefore, even when a plurality of photons are incident at the same time point, the number of incident photons can be determined based on the output charge amount or signal intensity of the total output pulse.

According to the above aspect of the invention, there is provided a photodetecting device which suppresses a decrease in mechanical strength of a semiconductor substrate, and electrical connection between the semiconductor substrate and the mounting substrate is achieved by a wire.

1‧‧‧Light detection device

1N‧‧‧Semiconductor substrate

1N1‧‧‧ first side

1N2‧‧‧ second side

1N3‧‧‧ third side

1N4‧‧‧ fourth side

Main surface of 1Na‧‧‧ semiconductor substrate

Main surface of 1Nb‧‧‧ semiconductor substrate

1PA‧‧‧First semiconductor area

1PB‧‧‧second semiconductor area

1PC‧‧‧Semiconductor area

3‧‧‧ Notch

5‧‧‧ Notch

7‧‧‧Metal film

9‧‧‧Metal film

10‧‧‧Semiconductor light detecting element

11‧‧‧Resin

13‧‧‧ Notch

15‧‧‧ Notch

17‧‧‧Metal film

19‧‧‧Metal film

20‧‧‧ Mounting substrate

20a‧‧‧ Mounting the main surface of the substrate

20b‧‧‧ Main surface of the substrate

30‧‧‧Scintillator

31‧‧‧Optical adhesive

40‧‧‧Semiconductor substrate

40a‧‧‧Main surface

40b‧‧‧Main surface

42‧‧‧Component formation area

45‧‧‧ notch

47‧‧‧Metal film

51‧‧‧ cut off the booking line

52‧‧‧ cut off the booking line

53‧‧‧ cut off the booking line

53a‧‧‧End parts

61‧‧‧Modified area

62‧‧‧Modified area

63‧‧‧Modified area

APD‧‧‧Avalanche Photodiode

D1‧‧‧ first direction

D2‧‧‧ second direction

E1~E3‧‧‧electrode

E5~E9‧‧‧electrode

E7p‧‧‧ solder pad

L‧‧‧Laser light

L1‧‧‧Insulation

L3‧‧‧Insulation

MR‧‧‧modified area

P‧‧‧ spotlight

PDA‧‧‧Photodiode Array

R1‧‧‧ quenching resistor

RS1‧‧‧ first area

RS2‧‧‧Second area

RS3‧‧‧ third area

SP‧‧‧Signal Processing Department

TL‧‧‧ signal line

TL1‧‧‧ signal line

TL2‧‧‧ signal line

V1‧‧‧ potential

V2‧‧‧ potential

W1‧‧‧ bonding wire

W2‧‧‧ bonding wire

X-Y-Z‧‧ Direction

Fig. 1 is a schematic perspective view showing a photodetecting device of an embodiment.

Fig. 2 is a view for explaining the arrangement of semiconductor light detecting elements.

Fig. 3 is a view for explaining a cross-sectional configuration of the photodetecting device of the embodiment.

4 is a schematic plan view of a semiconductor photodetecting element.

Fig. 5 is a schematic view showing the configuration of a semiconductor photodetecting element around the third side.

Fig. 6 is a circuit diagram of a photodetecting device.

Fig. 7 is a schematic perspective view of a semiconductor photodetecting element around the third side.

Fig. 8 is a schematic perspective view of a semiconductor photodetecting element around the third side.

Fig. 9 is a view for explaining the arrangement of semiconductor light detecting elements according to a variation of the embodiment.

Fig. 10 is a view for explaining a cross-sectional configuration of a photodetecting device according to a modification of the embodiment.

Fig. 11 is a schematic plan view of a semiconductor photodetecting element.

Fig. 12 is a schematic view showing the configuration of a semiconductor photodetecting element around the third side.

Fig. 13 is a view for explaining the arrangement of semiconductor light detecting elements according to a modification of the embodiment.

Fig. 14 is a view for explaining a cross-sectional configuration of a photodetecting device according to a modification of the embodiment.

Fig. 15 is a schematic plan view of a semiconductor photodetecting element.

Fig. 16 is a schematic view showing the configuration of a semiconductor photodetecting element around the fourth side.

Fig. 17 is a schematic perspective view showing a semiconductor photodetecting element around the fourth side.

Fig. 18 is a schematic perspective view of a semiconductor photodetecting element around the fourth side.

Fig. 19 is a schematic perspective view showing a photodetecting device according to a modification of the embodiment.

Fig. 20 is a schematic plan view of a semiconductor photodetecting element.

Fig. 21 is a schematic plan view of a semiconductor photodetecting element.

Fig. 22 is a schematic plan view of a semiconductor photodetecting element.

Fig. 23 is a view for explaining the manufacturing process of the semiconductor photodetecting element of the embodiment.

Fig. 24 is a view for explaining the manufacturing process of the semiconductor photodetecting element of the embodiment.

Fig. 25 is a view for explaining the manufacturing process of the semiconductor photodetecting element of the embodiment.

Fig. 26 is a view for explaining the manufacturing process of the semiconductor photodetecting element of the embodiment.

Fig. 27 is a view for explaining the manufacturing process of the semiconductor photodetecting element of the embodiment.

Fig. 28 is a view for explaining the manufacturing process of the semiconductor photodetecting element of the embodiment.

Fig. 29 is a view for explaining the manufacturing process of the semiconductor photodetecting element of the embodiment.

30(a) and (b) are views for explaining a modification of the manufacturing process of the semiconductor photodetecting device of the embodiment.

31 (a) and (b) are views for explaining a modification of the manufacturing process of the semiconductor photodetecting device of the embodiment.

Fig. 32 is a view for explaining the manufacturing process of the semiconductor photodetecting element according to the modification of the embodiment.

Figure 33 is a view for explaining the manufacture of a semiconductor photodetecting element according to a variation of the embodiment. Diagram of the process.

Fig. 34 is a view for explaining the manufacturing process of the semiconductor photodetecting element according to the modification of the embodiment.

Fig. 35 is a view for explaining the manufacturing process of the semiconductor photodetecting element according to the modification of the embodiment.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description, the same elements or elements having the same functions are denoted by the same reference numerals, and the description thereof will not be repeated.

The configuration of the photodetecting device 1 of the present embodiment will be described with reference to Figs. 1 to 6 . Fig. 1 is a schematic perspective view showing a photodetecting device of the embodiment. Fig. 2 is a view for explaining the arrangement of semiconductor light detecting elements. Fig. 3 is a view for explaining a cross-sectional configuration of the photodetecting device of the embodiment. 4 is a schematic plan view of a semiconductor photodetecting element. Fig. 5 is a view showing the configuration of a semiconductor photodetecting element around the third side. Fig. 6 is a circuit diagram of a photodetecting device.

As shown in FIGS. 1 to 3, the photodetecting device 1 includes a plurality of semiconductor photodetecting elements 10, a mounting substrate 20, and a plurality of scintillators 30. The plurality of semiconductor light detecting elements 10 are disposed on the mounting substrate 20 and are opposed to the mounting substrate 20 . A plurality of semiconductor light detecting elements 10 are molded by a resin (for example, epoxy resin) 11. In the present embodiment, the number of semiconductor light detecting elements 10 is "16", and the number of scintillators 30 is "16".

Each of the semiconductor light detecting elements 10 includes a photodiode array PDA. The semiconductor light detecting element 10 includes a semiconductor substrate 1N. The semiconductor substrate 1N has a rectangular shape in plan view. The semiconductor substrate 1N includes main surfaces 1Na and main surfaces 1Nb opposed to each other. The semiconductor substrate 1N is an N-type (first conductivity type) semiconductor substrate containing Si.

The semiconductor substrate 1N has a polygonal shape as viewed in the opposite direction. In the present embodiment, the semiconductor substrate 1N has a pentagonal shape as viewed in the opposite direction. That is, the semiconductor substrate 1N is as shown in FIG. The figure includes a pair of first sides 1N1, a pair of second sides 1N2, and a third side 1N3 as outer edges when viewed from the opposite direction.

The pair of first sides 1N1 are opposite to each other and parallel. The pair of second sides 1N2 are opposite to each other and parallel. The third side 1N3 is connected to a first side 1N1 and a second side 1N2. The third side 1N3 extends in a direction crossing one of the first side 1N1 and the second side 1N2. That is, the third side 1N3 is located between a first side 1N1 and a second side 1N2.

One end of the first side 1N1 is connected to one end of the third side 1N3. The angle formed by the first side 1N1 and the third side 1N3 is, for example, 135°. One end of the second side 1N2 is connected to the other end of the third side 1N3. The angle formed by the second side 1N2 and the third side 1N3 is, for example, 135°. The other end of the first side 1N1 is connected to one end of the other second side 1N2. The other end of a second side 1N2 is connected to one end of the other first side 1N1. The other end of the other first side 1N1 is connected to the other end of the other second side 1N2. In the present embodiment, the first side 1N1 is orthogonal to the second side 1N2.

The length of the third side 1N3 is shorter than the length of each of the first side 1N1 and the second side 1N2. The length of one first side 1N1 is shorter than the length of the other first side 1N1. The length of one second side 1N2 is shorter than the length of the other second side 1N2. In the present embodiment, the length of one first side 1N1 is equal to the length of one second side 1N2, and the length of the other first side 1N1 is equal to the length of the other second side 1N2.

The photodiode array PDA includes a plurality of avalanche photodiode APDs. A plurality of avalanche photodiodes APD are formed on the semiconductor substrate 1N. An avalanche photodiode APD constitutes one pixel in the photodiode array PDA. The avalanche photodiode APD autonomous surface 1Na is observed in a direction opposite to the main surface 1Nb (hereinafter, simply referred to as "opposite direction"), and is arranged in a two-dimensional shape.

As shown in FIG. 4, the semiconductor substrate 1N further includes a first region RS1 and a second region RS2. A plurality of avalanche photodiodes APD are disposed in the first region RS1. The second region RS2 is viewed from the opposite direction, and is located on the outer side of the first region RS1 and in the vicinity of the third side 1N3. The second region RS2 has a triangular shape, for example, in a plan view. In Figure 4, the opposite direction Consistent with the Z-axis direction.

As shown in FIG. 5, each of the avalanche photodiode APDs is connected in series with a quenching resistor R1. Each of the avalanche photodiodes APD is connected in parallel in a state in which the respective quenching resistors R1 are connected in series. For each avalanche photodiode APD, a reverse bias is applied from the power source. The output current from the avalanche photodiode APD is detected by a signal processing unit SP which will be described later.

Each avalanche photodiode APD includes a P-type (second conductivity type) first semiconductor region 1PA and a P-type second semiconductor region 1PB. The first semiconductor region 1PA is formed on the main surface 1Na side of the semiconductor substrate 1N. The second semiconductor region 1PB is formed in the first semiconductor region 1PA and has a higher impurity concentration than the first semiconductor region 1PA. The planar shape of the second semiconductor region 1PB is, for example, a polygonal shape (in the present embodiment, a square shape). The depth of the first semiconductor region 1PA is deeper than the depth of the second semiconductor region 1PB.

The semiconductor substrate 1N includes an N-type semiconductor region 1PC. The semiconductor region 1PC is formed on the main surface 1Na side of the semiconductor substrate 1N. The semiconductor region 1PC prevents the PN junction formed between the N-type semiconductor substrate 1N and the P-type first semiconductor region 1PA from being exposed at the end of the semiconductor substrate 1N. The semiconductor region 1PC is formed at a position corresponding to the end of the semiconductor substrate 1N.

As shown in FIG. 5, the avalanche photodiode APD includes an electrode E1 disposed on the main surface 1Na side of the semiconductor substrate 1N. The electrode E1 is electrically connected to the second semiconductor region 1PB. As shown in FIG. 3, the avalanche photodiode APD includes an electrode E2 disposed on the main surface 1Nb side of the semiconductor substrate 1N. The electrode E2 is electrically connected to the semiconductor substrate 1N. The first semiconductor region 1PA is electrically connected to the electrode E1 via the second semiconductor region 1PB.

As shown in FIG. 5, the photodiode array PDA includes a signal line TL and an electrode E3. The signal line TL and the electrode E3 are formed on the semiconductor substrate 1N outside the second semiconductor region 1PB via the insulating layer L1. The signal line TL and the electrode E3 are disposed on the main surface 1Na side of the semiconductor substrate 1N. The electrode E3 is located in the second region RS2. The signal line TL is connected to the electrode E3.

The signal line TL includes a plurality of signal lines TL1 and a plurality of signal lines TL2. Each of the signal lines TL1 is disposed between the avalanche photodiodes APD adjacent in the X-axis direction along the Y-axis direction in plan view. Each signal line TL2 is disposed between the avalanche photodiodes APD adjacent to each other in the Y-axis direction along the X-axis direction. Each of the signal lines TL2 is electrically connected to the plurality of signal lines TL1. In the present embodiment, the signal line TL1 and the signal line TL2 are connected to the electrode E3. Any one of the signal line TL1 and the signal line TL2 may be connected to the electrode E3.

The photodiode array PDA has a quenching resistor R1 for each avalanche photodiode APD. The quenching resistor R1 is formed on the semiconductor substrate 1N via the insulating layer L1. The quenching resistor R1 is disposed on the main surface 1Na side of the semiconductor substrate 1N. One end of the quenching resistor R1 is connected to the electrode E1. The other end of the quenching resistor R1 is connected to the signal line TL1. The quenching resistor R1 is, for example, on the semiconductor substrate 1N outside the second semiconductor region 1PB. In FIG. 5, the description of the insulating layers L1 and L3 shown in FIG. 3 is omitted for the sake of clarification of the structure.

Each avalanche photodiode APD (a region directly under the first semiconductor region 1PA) is connected to the signal line TL1 via the electrode E1 and the quenching resistor R1. A plurality of avalanche photodiodes APD are connected to the quenching resistor R1 via the respective electrodes E1 on one signal line TL1. The quenching resistor R1 is electrically connected to the electrode E3 via the signal line TL1. That is, each avalanche photodiode APD (each pixel) is electrically connected to the electrode E3.

An insulating layer L3 is disposed on the main surface 1Na side of the semiconductor substrate 1N. The insulating layer L3 is formed to cover the electrodes E1 and E3, the quenching resistor R1, and the signal line TL.

The resistivity of the quenching resistor R1 is higher than that of the electrode E1 to which the quenching resistor R1 is connected. The quenching resistor R1 contains, for example, polycrystalline germanium. For the method of forming the quenching resistor R1, a CVD (Chemical Vapor Deposition) method can be used.

The electrodes E1, E2, E3 and the signal line TL contain a metal (for example, Al). In the case where the semiconductor substrate contains Si, AuGe/Ni may be used as the electrode material in addition to Al. For the formation of the electrodes E1, E2, E3 and the signal line TL, a sputtering method can be used.

When Si is used as the material of the semiconductor substrate 1N, the P-type impurity uses a group 3 element. (For example, B), the N-type impurity uses a Group 5 element (for example, N, P, or As). Even when the conductive type of the semiconductor, that is, the N-type and the P-type, replace the constituent elements, the element can function as a semiconductor photodetecting element. For the method of adding such impurities, a diffusion method or an ion implantation method can be used.

As the material of the insulating layers L1, L3, SiO ₂ or SiN can be used. In the case where the insulating layers L1, L3 contain SiO ₂ , a thermal oxidation method or a sputtering method can be used for the formation of the insulating layers L1 and L3.

In the photodiode array PDA, an avalanche photodiode APD is formed between the N-type semiconductor substrate 1N and the P-type first semiconductor region 1PA by PN bonding. The semiconductor substrate 1N is electrically connected to the electrode E2 formed on the main surface 1Nb of the semiconductor substrate 1N. The first semiconductor region 1PA is connected to the electrode E1 via the second semiconductor region 1PB. The quenching resistor R1 is connected in series to the avalanche photodiode APD (see FIG. 6).

In the photodiode array PDA, each avalanche photodiode APD operates in a Geiger mode. In the Geiger mode, a reverse voltage (reverse bias) greater than the breakdown voltage of the avalanche photodiode APD is applied between the anode and the cathode of the avalanche photodiode APD. That is, a (-) potential V1 is applied to the anode, and a (+) potential V2 is applied to the cathode. The polarity of the equipotential is opposite, and one potential can be a ground potential.

The anode is a P-type first semiconductor region 1PA, and the cathode is an N-type semiconductor substrate 1N. When light (photons) is incident on the avalanche photodiode APD, photoelectric conversion is performed inside the substrate to generate photoelectrons. In the vicinity of the PN junction interface of the first semiconductor region 1PA, avalanche multiplication is performed, and the multiplied electron group flows toward the electrode E2. That is, when light (photons) is incident on any of the pixels (avalanche photodiode APD) of the photodiode array PDA, it is multiplied and extracted as a signal from the electrode E3.

The other end of the quenching resistor R1 connected to each avalanche photodiode APD is electrically connected to the common signal line TL along the main surface 1Na of the semiconductor substrate 1N. Each avalanche photodiode APD operates in a Geiger mode and is connected to a common signal line TL. Therefore, Yu Guangzi When simultaneously incident on a plurality of avalanche photodiodes APD, the outputs of the plurality of avalanche photodiodes APD are all input to the common signal line TL. Therefore, in the photodiode array PDA, a high-intensity signal corresponding to the number of incident photons is measured. In each of the semiconductor light detecting elements 10 (each photodiode array PDA), a signal is output through the electrode E3.

As shown in FIG. 3, the mounting substrate 20 includes a main surface 20a and a main surface 20b which face each other. The mounting substrate 20 has a rectangular shape in plan view. The main surface 20a is opposed to the main surface 1Nb of the semiconductor substrate 1N. Each of the semiconductor light detecting elements 10 is disposed on the mounting substrate 20 such that the main surface 1Nb of the semiconductor substrate 1N faces the main surface 20a. Each of the semiconductor light detecting elements 10 is placed two-dimensionally on the mounting substrate 20.

The mounting substrate 20 includes a plurality of electrodes E5 and a plurality of electrodes E7. The electrode E5 and the electrode E7 are disposed at positions corresponding to the respective semiconductor photodetecting elements 10 (each photodiode array PDA). The electrode E5 and the electrode E7 are disposed on the main surface 20a side.

As shown in FIG. 3, the electrode E5 is disposed on the outer side of the semiconductor substrate 1N and in the vicinity of the third side 1N3 as viewed in the opposite direction. That is, the electrode E5 is formed in the main surface 20a on the region near the third side 1N3. The electrode E5 is exposed from the opposite direction and is exposed from the semiconductor substrate 1N. The opposite direction system and the main surface 20a are aligned with the main surface 20b.

As shown in FIG. 3, the electrode E7 is disposed at a position corresponding to the electrode E2. That is, the electrode E7 is formed on the main surface 20a and opposed to each of the regions of the electrode E2.

The mounting substrate 20 includes a plurality of electrodes E6 and a plurality of electrodes E8. The electrode E6 and the electrode E8 are disposed on the main surface 20b side. The electrode E6 is electrically connected to the corresponding electrode E5. The electrode E8 is electrically connected to the corresponding electrode E7. The electrodes E5, E6, E7, and E8 are also the same as the electrodes E1, E2, and E3, and contain a metal (for example, Al). As the electrode material, AuGe/Ni can be used in addition to Al.

The electrode E3 and the electrode E5 are connected by a bonding wire W1. That is, the bonding wire W1 includes one end connected to the electrode E3 and the other end connected to the electrode E5. Thereby, the electrode E3 is electrically connected to the electrode E5 via the bonding wire W1. The bonding wire W1 is viewed from the opposite direction across the third side The way of 1N3 extends. That is, the bonding wire W1 is disposed so as to intersect the third side 1N3 as viewed from the opposite direction. The bonding wire W1 includes, for example, Al, Cu, or Au. The quenching resistor R1 is electrically connected to the electrode E5 via the signal line TL, the electrode E3, and the bonding wire W1.

The electrode E2 and the electrode E7 are connected by, for example, a conductive resin 21. Thereby, the electrode E2 is electrically connected to the electrode E7 via the conductive resin 21. The conductive resin 21 contains a conductive filler and a resin. As the conductive filler, for example, Ag powder is used.

The signal processing unit SP is disposed, for example, on the main surface 20b side of the mounting substrate 20. The signal processing unit SP constitutes an ASIC (Application Specific Integrated Circuit). Each of the electrodes E6 is electrically connected to the signal processing unit SP via a wiring and a bonding wire (not shown) formed on the mounting substrate 20 . An output signal from each of the semiconductor light detecting elements 10 (each photodiode array PDA) is input to the signal processing unit SP, and the signal processing unit SP processes the output signals from the respective semiconductor light detecting elements 10. The signal processing unit SP includes a CMOS circuit that converts an output signal from each semiconductor light detecting element 10 into a digital pulse. The signal processing unit SP can be disposed on a substrate different from the mounting substrate 20 .

Each of the scintillators 30 is optically connected to the resin 11 by an optical adhesive 31. The scintillator 30 is disposed at a position corresponding to each of the semiconductor light detecting elements 10 (each photodiode array PDA). The scintillation light from the scintillator is incident on the semiconductor light detecting element 10 through the optical adhesive 31 and the resin 11. The number of the scintillators 30 is the same as the number of the semiconductor light detecting elements 10, and the scintillator 30 is in one-to-one correspondence with the semiconductor light detecting elements 10.

As described above, in the present embodiment, the bonding wire W1 connecting the electrode E3 and the electrode E5 extends so as to cross the third side 1N3 as viewed from the opposite direction. That is, the bonding wire W1 is disposed so as to intersect the third side 1N3 as viewed from the opposite direction. Thereby, the signal of the photodiode array PDA is extracted from the main surface 1Na side of the semiconductor substrate 1N, and is transmitted to the main surface 20a side of the mounting substrate 20. In the present embodiment, the electrical connection between the semiconductor substrate 1N and the mounting substrate 20 is achieved by the bonding wire W1.

The third side 1N3 is connected to one end of a first side 1N1 and one end of a second side 1N2. That is, the third side 1N3 extends in a direction crossing one of the first side 1N1 and the second side 1N2. Therefore, in the semiconductor substrate 1N, the gap formed in the semiconductor substrate in the photodetecting device described in Patent Document 1 is not formed. Therefore, in the photodetecting device 1, the mechanical strength of the semiconductor substrate 1N is suppressed from being lowered.

The length of the third side 1N3 is shorter than the length of each of the first side 1N1 and the second side 1N2. Thereby, the area reduction of the first region RS1 is suppressed. The first region RS1 is a region (effective region) in which a plurality of pixels (a plurality of avalanche photodiodes APD) are located as described above.

In the present embodiment, the photodetecting device 1 includes a plurality of semiconductor photodetecting elements 10. Each of the semiconductor light detecting elements 10 is disposed on the mounting substrate 20 such that the main surface 1Nb of the semiconductor substrate 1N faces the main surface 20a of the mounting substrate 20. Each of the semiconductor light detecting elements 10, the electrode E3 and the electrode E5 are connected by a bonding wire W1. Since the photodetecting device 1 includes a plurality of semiconductor photodetecting elements 10, it is possible to increase the area of the light receiving region of the photodetecting device 1.

In each photodiode array PDA, when photons are detected and a Geiger discharge is performed on the avalanche photodiode APD constituting the pixel, a pulse shape is obtained by the operation of the quenching resistor R1 connected to the avalanche photodiode APD. Signal. Each avalanche photodiode APD counts individual photons. Therefore, even when a plurality of photons are incident at the same time point, the number of incident photons can be determined based on the output charge amount or signal intensity of the total output pulse.

In the present embodiment, the semiconductor light detecting element 10 and the scintillator 30 are spliced to the mounting substrate 20 in a state in which the semiconductor light detecting element 10 and the scintillator 30 are connected one to one. The semiconductor light detecting elements 10 adjacent to each other in the X-axis direction are spliced to each other with the first side 1N1 facing each other. The semiconductor light detecting elements 10 adjacent to each other in the Y-axis direction are spliced to each other with the second side 1N2 facing each other.

Next, a configuration of the photodetecting device 1 according to a modification of the embodiment will be described with reference to Fig. 7 . Fig. 7 is a schematic perspective view of a semiconductor photodetecting element around the third side. In FIG. 7, the semiconductor light detecting element 10 (semiconductor substrate 1N) is schematically illustrated.

In the modification shown in FIG. 7, the notches 3, 5 are formed on the main surface 1Na side of the semiconductor substrate 1N. The notch 3 is formed at a corner formed by the first side 1N1 and the third side 1N3. The notch 5 is formed at a corner formed by the second side 1N2 and the third side 1N3. At the corner formed by the first side 1N1 and the third side 1N3, a step is formed due to the notch 3. At the corner formed by the second side 1N2 and the third side 1N3, a step is formed by the notch 5. The notches 3 and 5 are constituted by notches 45 which will be described later.

The notch 3 is formed from a corner formed along the first side 1N1 and the third side 1N3 from the opposite direction. That is, the notch 3 is viewed from the opposite direction, and includes a region along the first side 1N1 and a region along the third side 1N3. The notch 5 is formed in a corner portion formed along the second side 1N2 and the third side 1N3 as viewed from the opposite direction. That is, the notch 5 is viewed from the opposite direction, and includes a region along the second side 1N2 and a region along the third side 1N3.

In the present modification, since the notch 3 is formed at the corner portion formed by the first side 1N1 and the third side 1N3, it is possible to suppress generation of debris at the corner portion. The notch 5 is formed at a corner formed by the second side 1N2 and the third side 1N3, so that generation of debris at the corner portion can be suppressed.

Next, a configuration of the photodetecting device 1 according to a modification of the embodiment will be described with reference to Fig. 8 . Fig. 8 is a schematic perspective view of a semiconductor photodetecting element around the third side. In FIG. 8, the semiconductor light detecting element 10 (semiconductor substrate 1N) is schematically illustrated.

In the modification shown in FIG. 8, the metal films 7, 9 are disposed on the main surface 1Na side of the semiconductor substrate 1N. The metal film 7 is disposed at a corner formed by the first side 1N1 and the third side 1N3. The metal film 9 is disposed at a corner formed by the second side 1N2 and the third side 1N3. The metal film 7 is viewed from the opposite direction and includes a side along a direction parallel to the first side 1N1 and a side along a direction parallel to the third side 1N3. The metal film 9 is viewed from the opposite direction, and includes a side along a direction parallel to the second side 1N2 and a side along a direction parallel to the third side 1N3. In the present embodiment, each of the metal films 7 and 9 has a pentagonal shape in plan view. The metal films 7, 9 include, for example, Al, Au, or Cu. The metal films 7 and 9 are composed of a metal film 47 to be described later.

In the present modification, since the metal film 7 is disposed at the corner formed by the first side 1N1 and the third side 1N3, the mechanical strength of the corner portion is improved. Thereby, it can be suppressed on the first side 1N1 and The corner formed by the third side 1N3 produces debris. Since the metal film 9 is formed at the corner formed by the second side 1N2 and the third side 1N3, the mechanical strength of the corner portion is improved. Thereby, it is possible to suppress generation of debris at the corner portions formed by the second side 1N2 and the third side 1N3.

Next, a configuration of the photodetecting device 1 according to a modification of the embodiment will be described with reference to Figs. 9 to 12 . Fig. 9 is a view for explaining the arrangement of the semiconductor photodetecting elements of the present modification. Fig. 10 is a view for explaining the cross-sectional configuration of the photodetecting device of the present modification. Fig. 11 is a schematic plan view of a semiconductor photodetecting element. Fig. 12 is a schematic view showing the configuration of a semiconductor photodetecting element around the third side.

As shown in FIG. 10, the semiconductor light detecting element 10 includes an electrode E9 disposed on the main surface 1Na side of the semiconductor substrate 1N. The electrode E9 is connected to the N-type semiconductor region 1PC through a channel formed in the insulating layer L1. The electrode E9 is electrically connected to the semiconductor substrate 1N via the semiconductor region 1PC. The electrode E9 is located in the second region RS2. The electrode E9 and the electrode E3 are viewed from the opposite direction and are arranged along the third side 1N3. The cross-sectional configuration including the electrode E3 is the same as that of the above-described embodiment (see FIG. 3), and thus the illustration thereof is omitted.

The electrode E7 includes a pad portion E7p. As shown in FIGS. 11 and 12, the pad portion E7p is disposed on the outer side of the semiconductor substrate 1N and in the vicinity of the third side 1N3 as viewed in the opposite direction. That is, the pad portion E7p is formed in the main surface 20a and is located in the region near the third side 1N3. The pad portion E7p is exposed from the semiconductor substrate 1N as viewed from the opposite direction. The pad portion E7p and the electrode E5 are viewed from the opposite direction and are arranged along the third side 1N3.

The electrode E9 and the pad portion E7p (electrode E7) are connected by a bonding wire W2. That is, the bonding wire W2 includes one end connected to the electrode E9 and the other end connected to the pad portion E7p. Thereby, the electrode E9 is electrically connected to the electrode E7 via the bonding wire W2. The semiconductor substrate 1N is electrically connected to the electrode E7 via the semiconductor region 1PC, the electrode E9, and the bonding wire W2. Similarly to the bonding wire W1, the bonding wire W2 extends so as to cross the third side 1N3 as viewed from the opposite direction. That is, the bonding wire W2 is also disposed so as to intersect the third side 1N3 as viewed from the opposite direction. The bonding wire W1 and the bonding wire W2 are arranged in the direction crossing the third side 1N3 as viewed from the opposite direction. Similarly to the bonding wire W1, the bonding wire W2 includes, for example, Al, Cu, or Au.

In the present modification, as in the above embodiment, the electrical connection between the semiconductor substrate 1N and the mounting substrate 20 is realized by the bonding wire W1. The mechanical strength reduction of the semiconductor substrate 1N is suppressed.

In the present modification, the electrode E9 and the electrode E7 are connected via a bonding wire W2. In this case, the cathode potential can be appropriately applied to the semiconductor substrate 1N by the bonding wire W2 and the electrode E9. That is, in the present modification, the electrical connection between the semiconductor substrate 1N and the mounting substrate 20 is achieved by the bonding wire W2.

The electrode E2 may not be disposed on the main surface 1Nb side of the semiconductor substrate 1N. That is, the main surface 1Nb of the semiconductor substrate 1N can be directly connected to the electrode E7 by the conductive resin 21. In this case, it is not necessary to dispose the electrode for applying the cathode potential to the semiconductor substrate 1N on the main surface 1Nb side of the semiconductor substrate 1N, so that the manufacturing cost of the semiconductor photodetecting element 10 is lowered. The semiconductor substrate 1N is electrically connected to the electrode E7 via the conductive resin 21.

Next, a configuration of the photodetecting device 1 according to a modification of the embodiment will be described with reference to Figs. 13 to 16 . Fig. 13 is a view for explaining the arrangement of the semiconductor photodetecting elements of the present modification. Fig. 14 is a view for explaining the cross-sectional configuration of the photodetecting device of the present modification. Fig. 15 is a schematic plan view of a semiconductor photodetecting element. Fig. 16 is a schematic view showing the configuration of a semiconductor photodetecting element around the fourth side. In the present modification, the cross-sectional configuration including the electrode E3 is the same as that of the above-described embodiment (see FIG. 3), and thus the illustration thereof is omitted.

In the present modification, the semiconductor substrate 1N has a hexagonal shape as viewed in the opposing direction. That is, the semiconductor substrate 1N includes a pair of first sides 1N1, a pair of second sides 1N2, a third side 1N3, and a fourth side 1N4 as outer edges when viewed from the opposite direction. The pair of first sides 1N1 are opposite to each other and parallel. The pair of second sides 1N2 are opposite to each other and parallel.

The third side 1N3 and the fourth side 1N4 are opposite to each other and parallel. The fourth side 1N4 is connected to the other first side 1N1 and the other second side 1N2. The fourth side 1N4 extends in a direction intersecting the other first side 1N1 and the other second side 1N2. That is, the fourth side 1N4 is located on the other first side 1N1 Between the other second side 1N2. The other end of the other first side 1N1 is connected to one end of the fourth side 1N4. The angle formed by the first side 1N1 and the fourth side 1N4 is, for example, 135°. The other end of the other second side 1N2 is connected to the other end of the fourth side 1N4. The angle formed by the second side 1N2 and the fourth side 1N4 is, for example, 135°.

Not only the length of the third side 1N3, but also the length of the fourth side 1N4 is shorter than the length of each of the first side 1N1 and the second side 1N2. In the present variation, the length of the third side 1N3 is equal to the length of the fourth side 1N4. The length of the third side 1N3 and the length of the fourth side 1N4 may not be equal and may be different.

As shown in FIG. 15, the semiconductor substrate 1N further includes a first region RS1, a second region RS2, and a third region RS3. The third region RS3 is located on the outer side of the first region RS1 and in the vicinity of the fourth side 1N4 from the opposite direction. That is, the third region RS3 is located at a position facing the second region RS2 across the first region RS1 as viewed from the opposite direction. The third region RS3 has a triangular shape, for example, in a plan view. In Fig. 15, the opposite direction coincides with the Z-axis direction.

In the present variation, the electrode E9 is located in the third region RS3. As shown in FIG. 15, the pad portion E7p of the electrode E7 is disposed on the outer side of the semiconductor substrate 1N and in the vicinity of the fourth side 1N4 as viewed from the opposite direction. That is, the pad portion E7p is formed on a region of the main surface 20a located near the fourth side 1N4. The bonding wire W2 extends in a self-opposing direction and extends across the fourth side 1N4. That is, the bonding wire W2 is disposed so as to intersect the fourth side 1N4 as viewed from the opposite direction.

In the present modification, as in the modification shown in FIGS. 9 to 12, the electrical connection between the semiconductor substrate 1N and the mounting substrate 20 is realized by the bonding wires W1 and W2. The mechanical strength reduction of the semiconductor substrate 1N is suppressed. Similarly to the modification shown in FIGS. 9 to 12, the electrode E2 may not be disposed on the main surface 1Nb side of the semiconductor substrate 1N. In this case, the manufacturing cost of the semiconductor light detecting element 10 is lowered.

The length of the fourth side 1N4 is shorter than the length of each of the first side 1N1 and the second side 1N2. Thereby, the area reduction of the first region RS1 is suppressed.

Next, a modification of the photodetecting device 1 shown in Figs. 13 to 16 will be described with reference to Fig. 17 . The composition. Fig. 17 is a schematic perspective view showing a semiconductor photodetecting element around the fourth side. In FIG. 17, the semiconductor light detecting element 10 (semiconductor substrate 1N) is schematically illustrated.

In the modification shown in FIG. 17, the notches 13 and 15 are formed on the main surface 1Na side of the semiconductor substrate 1N. The notch 13 is formed at a corner formed by the first side 1N1 and the fourth side 1N4. The notch 15 is formed at a corner formed by the second side 1N2 and the fourth side 1N4. At the corner formed by the first side 1N1 and the fourth side 1N4, a step is formed by the notch 13. At the corner formed by the second side 1N2 and the fourth side 1N4, a step is formed by the notch 15. Although not shown in the drawings, the notches 3 and 5 may be formed on the semiconductor substrate 1N.

The notch 13 is formed at a corner formed along the first side 1N1 and the fourth side 1N4 as viewed from the opposite direction. That is, the notch 13 is viewed from the opposite direction, and includes a region along the first side 1N1 and a region along the fourth side 1N4. The notch 15 is formed at a corner formed along the second side 1N2 and the fourth side 1N4 as viewed from the opposite direction. That is, the notch 15 is viewed from the opposite direction, and includes a region along the second side 1N2 and a region along the fourth side 1N4.

In the present modification, since the notch 13 is formed at the corner formed by the first side 1N1 and the fourth side 1N4, it is possible to suppress generation of debris at the corner portion. Since the notch 15 is formed at the corner formed by the second side 1N2 and the fourth side 1N4, generation of debris at the corner portion can be suppressed.

Next, a configuration of a modification of the photodetecting device 1 shown in Figs. 13 to 16 will be described with reference to Fig. 18 . Fig. 18 is a schematic perspective view of a semiconductor photodetecting element around the fourth side. In FIG. 18, the semiconductor light detecting element 10 (semiconductor substrate 1N) is schematically illustrated.

In the modification shown in FIG. 8, the metal films 17, 19 are disposed on the main surface 1Na side of the semiconductor substrate 1N. The metal film 17 is disposed at a corner formed by the first side 1N1 and the fourth side 1N4. The metal film 19 is disposed at a corner formed by the second side 1N2 and the fourth side 1N4. Although not shown in the drawings, the metal films 7 and 9 may be formed on the semiconductor substrate 1N.

The metal film 17 is viewed from the opposite direction and includes a side along the first side 1N1 and a side along the fourth side 1N4. The metal film 19 is viewed from the opposite direction and includes a side along the second side 1N2 and a side along the fourth side 1N4. In the present variation, each of the metal films 17, 19 is in a plan view It has a pentagonal shape. The metal films 17, 19 are the same as the metal films 7, 9 and include, for example, Al, Au, or Cu.

In the present modification, since the metal film 17 is disposed at the corner portion formed by the first side 1N1 and the fourth side 1N4, the mechanical strength of the corner portion is improved. Thereby, it is possible to suppress generation of debris at the corner portions formed by the first side 1N1 and the fourth side 1N4. Since the metal film 19 is disposed at the corner formed by the second side 1N2 and the fourth side 1N4, the mechanical strength of the corner portion is improved. Thereby, it is possible to suppress generation of debris at the corner portions formed by the second side 1N2 and the fourth side 1N4.

Next, a configuration of the photodetecting device 1 according to a modification of the embodiment will be described with reference to Figs. 19 to 22 . Fig. 19 is a schematic perspective view showing a photodetecting device according to a modification of the embodiment. 20 to 22 are schematic plan views of semiconductor light detecting elements.

In the variation shown in FIGS. 19 and 20, the photodetecting device 1 includes a semiconductor photodetecting element 10, a mounting substrate 20, and a scintillator 30. In the present modification, as in the above embodiment, the electrical connection between the semiconductor substrate 1N and the mounting substrate 20 is realized by the bonding wire W1. The mechanical strength reduction of the semiconductor substrate 1N is suppressed.

In the variation shown in FIGS. 21 and 22, the photodetecting device 1 further includes a semiconductor photodetecting element 10, a mounting substrate 20, and a scintillator 30. In the present modification, the electrical connection between the semiconductor substrate 1N and the mounting substrate 20 is also achieved by the bonding wires W1 and W2. The mechanical strength reduction of the semiconductor substrate 1N is suppressed.

Next, a manufacturing process of the semiconductor photodetecting element 10 of the present embodiment will be described with reference to Figs. 23 to 29 . 23 to 29 are views for explaining the manufacturing process of the semiconductor photodetecting element of the embodiment.

First, a semiconductor substrate (semiconductor wafer) 40 (see FIG. 23) is prepared. The semiconductor substrate 40 includes a plurality of element forming regions 42. The plurality of element forming regions 42 are positioned adjacent to the first direction D1 and the second direction D2 crossing the first direction D1. In the present embodiment, the first direction D1 is orthogonal to the second direction D2. The element forming region 42 has a pentagonal shape in plan view. In FIG. 23, for the sake of explanation, the adjacent element shapes are indicated by solid lines. The location of the boundary of the region 42.

The element formation region 42 includes a configuration corresponding to the semiconductor light detecting element 10 shown in FIG. In other words, the element formation region 42 is not shown in FIG. 23, but a plurality of avalanche photodiodes APD (first semiconductor region 1PA and second semiconductor region 1PB), quenching resistor R1, semiconductor region 1PC, and signal line. TL, electrodes E2, E3, and insulating layers L1, L3 are formed at corresponding positions, respectively. The semiconductor substrate 40 is formed into a semiconductor substrate 1N by being singulated. The formation processes of the avalanche photodiode APD, the quenching resistor R1, the semiconductor region 1PC, the signal line TL, the electrodes E2, E3, and the insulating layers L1, L3, etc. are known in the art, and a detailed description thereof will be omitted.

Next, the semiconductor substrate 40 is singulated into a plurality of element formation regions 42 one by one (see FIG. 30). Thereby, the semiconductor light detecting element 10 is obtained.

In the present embodiment, the semiconductor substrate 40 is singulated by using a non-contact cutting technique. The non-contact cutting technique is a technique in which a laser beam is irradiated to a portion of a semiconductor substrate (semiconductor wafer) to form a modified region at an arbitrary position, and the semiconductor substrate is cut by using the modified region as a starting point (for example, refer to JP-A-2009- Bulletin No. 135342). A laser processing apparatus used for a non-contact cutting technique is called a so-called SDE (Non-Contact Cutting Engine: Registered Trademark). The SDE includes, for example, a laser light source that oscillates laser light, a two-color polygon mirror that is configured to change an optical axis (optical path) of the laser light, and a condensing lens (concentrating optical system). Used to concentrate laser light.

In this process, the laser beam L is irradiated to the side of the autonomous surface 40a, and a light-converging point P is formed inside the semiconductor substrate 40 (see FIG. 24). In this state, the laser light L relatively moves along a line to cut (in FIG. 24, along the line of the solid line) which is located at the boundary between the adjacent element forming regions 42 in the plurality of element forming regions 42. Thereby, the modified region MR is formed inside the semiconductor substrate 40 along the line to cut (see FIGS. 25 and 26). The modified region MR serves as a starting point for cutting. Next, the semiconductor substrate 40 is cut and the semiconductor substrate 40 is diced by using the formed modified region MR as a starting point. In FIGS. 24 to 26, a semiconductor substrate is schematically illustrated. 40 (semiconductor wafer), the avalanche photodiode APD, the quenching resistor R1, the semiconductor region 1PC, the signal line TL, the electrodes E2, E3, and the insulating layers L1, L3 are omitted.

The condensed spot P is a portion where the laser light L condenses light. It is possible that the modified region MR is continuously formed and, in turn, may be formed intermittently. The modified region MR may be in the form of a row or a dot. The modified region MR system may be formed at least inside the semiconductor substrate 40. It is possible to form a crack by using the modified region MR as a starting point. The cracked and modified region MR may be exposed on the outer surface (surface, back surface, or outer peripheral surface) of the semiconductor substrate 40.

The laser light L is transmitted through the semiconductor substrate 40 and is particularly absorbed near the light collecting point inside the semiconductor substrate 40, whereby the modified region MR is formed on the semiconductor substrate 40 (that is, internal absorption type laser processing). Therefore, since the main surface 40a of the semiconductor substrate 40 hardly absorbs the laser light L, the main surface 40a of the semiconductor substrate 40 does not melt.

The modified region formed in the present embodiment is a region in which the density, the refractive index, the mechanical strength, or other physical properties are different from the surroundings. The modified region is, for example, a molten processed region, a crack region, an insulating fracture region, or a refractive index changing region, and the like, and there are also regions in which such mixing exists. As the modified region, there are regions in which the density of the modified region in the semiconductor substrate 40 changes compared with the density of the non-modified region, and a region in which lattice defects are formed (this is also collectively referred to as a high-density transfer region).

Here, the cutting planned line will be described in detail with reference to Fig. 27 .

On the five sides of each element forming region 42, one of the pair of cutting planned lines 51 in the second direction D2 is parallel, the pair of cutting planned lines 52 in the first direction D1, and the planned cutting line 53 are cut. A cutting planned line 51 is connected to the cutting planned line 53. A cutting planned line 52 is connected to the cutting planned line 53. In each of the element forming regions 42, the length of the line to cut 53 is shorter than the length of each of the line to cut 51 and the line to cut 52.

In the present embodiment, the four element forming regions 42 are treated as one arrangement unit. The four element forming regions 42 are arranged in such a manner that a predetermined line 53 of the respective element forming regions 42 is formed into a rectangular shape. The rectangular region surrounded by the line to cut 53 is not a member The non-effective area used by the piece. The semiconductor substrate 40 includes a plurality of the above-described arrangement units. A plurality of configuration units are arranged adjacent to each other in the first direction D1 and the second direction D2.

In the above-described area surrounded by the cutting planned line 53, the line to cut 51 does not intersect the line to cut 52. The line to cut 51 intersects the line to cut 52, except for the above-described area surrounded by the line to cut 53.

In the above-described region surrounded by the cutting planned line 53, the cutting planned line 51 is separated in the first direction D1. That is, in the two element forming regions 42 adjacent in the first direction D1, the one planned cutting line 51 connected to the planned cutting line 53 is separated in the first direction D1. In the above-described region surrounded by the cutting planned line 53, the cutting planned line 52 is separated in the second direction D2. That is, in the two element forming regions 42 adjacent in the second direction D2, the one planned cutting line 52 connected to the planned cutting line 53 is separated in the second direction D2.

The semiconductor substrate 40 is attached to an extension tape (cut tape) (not shown). In this state, the laser light L is irradiated to the semiconductor substrate 40 along the line to cut 51 as described above. Thereby, the modified region 61 is formed along the line to cut 51 on the semiconductor substrate 40 (see FIG. 28). The modified regions 61 are separated in the first direction D1 in the above region surrounded by the cutting planned line 53.

The laser light L is irradiated to the semiconductor substrate 40 along the line to cut 52 as described above. Thereby, the modified region 62 is formed along the line to cut 52 on the semiconductor substrate 40 (see FIG. 28). The modified regions 62 are separated in the second direction D2 in the above region surrounded by the cutting planned line 53. The modified region 61 intersects the modified region 62 except for the above region surrounded by the line to cut 53.

The laser light L is irradiated to the semiconductor substrate 40 along the line to cut 53 as described above. Thereby, the modified region 63 is formed along the line to cut 53 on the semiconductor substrate 40 (see FIG. 28). The modified region 63 is not connected to the modified regions 61, 62, and the modified region 63 is separated from the modified regions 61, 62. That is, the modified region 63 is formed in the intermediate portion 53b except for the both end portions 53a of the planned cutting line 53. The length of each end portion 53a is set to be self-modifying region 63 The raw cracks are oriented toward the distance at which the predetermined lines 51, 52 are cut. The length of each end portion 53a is set, for example, to 10 μm.

After the modified regions 61, 62, and 63 are formed on the semiconductor substrate 40, the extension band is expanded. Thereby, the cracks generated from the modified regions 61, 62, and 63 reach the main surfaces 40a and 40b of the semiconductor substrate 40, and the semiconductor substrate 40 is cut along the line to cut 51, 52, and 53. At this time, the crack generated from the reformed region 63 reaches the modified regions 61 and 62. Therefore, a plurality of element forming regions 42 are cut out from the semiconductor substrate 40. As shown in Fig. 29, a plurality of semiconductor light detecting elements 10 including the configuration shown in Fig. 3 are obtained.

The semiconductor substrate 40 is cut by the cutting planned line 51, and the side surface of the first side 1N1 is formed when the semiconductor light detecting element 10 is viewed from the opposite direction. The semiconductor substrate 40 is cut by the cutting planned line 52, and the side surface of the second side 1N2 is formed when the semiconductor light detecting element 10 is viewed from the opposite direction. When the semiconductor substrate 40 is cut by the cutting planned line 53, the side surface of the third side 1N3 is formed when the semiconductor light detecting element 10 is viewed from the opposite direction.

In the above manufacturing process, the cutting planned lines 51, 52 extend in the ineffective area not used as the element. Therefore, when the modified regions 61, 62 are formed along the line to cut 51, 52, the position at which the laser light L is turned on/off is located in the above-described ineffective area. Even when the positions of the modified regions 61 and 62 are shifted according to the on/off precision of the laser light L irradiation, the semiconductor substrate 40 is appropriately cut. The length of the portion of the cut-off predetermined lines 51, 52 located in the ineffective area is set in consideration of the on/off precision of the laser light L irradiation. The length of the portion of the cut planned lines 51, 52 located in the ineffective area is set to, for example, 10 μm.

The modified region 63 formed along the line to cut 53 is separated from the modified regions 61, 62. Even in the case where the position of the modified region 63 is shifted in accordance with the on/off precision of the laser light L irradiation, the modified region 63 is not formed in the element forming region 42. Therefore, the length of each end portion 53a must also be set in consideration of the on/off precision of the laser light L irradiation. In this case, the length of each end portion 53a is also set to, for example, 10 μm.

The plurality of component forming regions 42 are adjacent to each other in the first direction D1 and the second direction D2 The positioning is performed, and the cutting planned lines 51, 52 are not complicated. Therefore, the step time for cutting the semiconductor substrate 40 by the non-contact cutting technique is short.

Next, a modification of the manufacturing process of the semiconductor photodetecting element 10 of the present embodiment will be described with reference to FIG. Fig. 30 is a view for explaining a modification of the manufacturing process of the semiconductor photodetecting element 10.

In the present modification, as shown in FIG. 30(a), a notch 45 is formed in the semiconductor substrate 40. The notch 45 extends from the connection points (intersections) of the planned cutting lines 51, 52 and the planned cutting line 53 along the planned cutting lines 51, 52 and the planned cutting line 53, respectively. The cut-off planned lines 51, 52 are not set in the non-effective area that is not used as the component. Of course, as shown in Fig. 27, the planned cutting lines 51 and 52 may be set in the above-described ineffective area. The length of each of the notches 45 from the above-described connection points along the line to cut 51, 52, 53 is also set in consideration of the on/off precision of the irradiation of the laser light L. The length of the notch 45 from the above connection point is set to, for example, 10 μm.

The modified regions 61, 62, 63 are formed as shown in (b) of FIG. 30 so as to reach the notches 45. In this case, the crack generated from the modified regions 61, 62, 63 extends along the notch 45 when the extension band is extended. Therefore, the semiconductor substrate 40 is appropriately cut at the position where the three predetermined lines are cut at the predetermined line of cut 51, 52, and 53. The notch 45 formed in the semiconductor substrate 40 is retained as a notch 3, 5 on the singulated semiconductor photodetecting element 10.

Next, a modification of the manufacturing process of the semiconductor photodetecting element 10 of the present embodiment will be described with reference to FIG. Fig. 31 is a view for explaining a variation of the manufacturing process of the semiconductor photodetecting element 10.

In this modification, as shown in (a) of FIG. 31, a plurality of metal films 47 are formed. The plurality of metal films 47 are disposed in the vicinity of the connection point between the planned cutting lines 51 and 52 and the planned cutting line 53. Each of the metal films 47 has a polygonal shape in plan view. In the present variation, the metal film 47 has a pentagonal shape. The metal film 47 includes sides along the line to cut 51, 52, and 53 in plan view. The plurality of metal films 47 are disposed such that the respective sides along the line to cut 51, 52, and 53 are opposed to each other in the plan view by the line to cut 51, 52, and 53. The metal film 47 contains, for example, Al, Au, or Cu.

The modified regions 61, 62, and 63 are formed so as to intersect the connection points of the planned cutting lines 51 and 52 and the line to cut 53 as shown in (b) of FIG. Even when the irradiation position of the laser light L enters the element formation region 42 in accordance with the on/off precision of the laser light L irradiation, the laser light L can be prevented from being irradiated into the semiconductor substrate 40 by the metal film 47. Thereby, the modified region 63 is not formed in the element formation region 42. Therefore, the semiconductor substrate 40 is appropriately cut at the position where the three predetermined lines are cut at the predetermined line of cut 51, 52, and 53. The metal film 47 formed on the semiconductor substrate 40 is retained as the metal films 7, 9 on the singulated semiconductor photodetecting element 10.

Next, a manufacturing process of the semiconductor light detecting element 10 according to a modification of the embodiment will be described with reference to FIGS. 32 to 35. 32 to 35 are views for explaining a manufacturing process of a semiconductor photodetecting element according to a modification of the embodiment.

In the present modification, the plurality of element formation regions 42 included in the prepared semiconductor substrate 40 include the configuration corresponding to the semiconductor light detecting element 10 shown in FIG. The element formation region 42 has a hexagonal shape in plan view. In FIGS. 32 and 34, for the sake of explanation, the positions (the planned cutting lines 51, 52, and 53) which are the boundaries of the adjacent element forming regions 42 are indicated by solid lines.

In the variation shown in FIG. 32, one of the six sides of the element forming region 42 is set in the second direction D2 in parallel with the pair of cutting planned lines 51, and the first direction D1 is parallel to the pair of cutting planned lines 52, The predetermined line 53 is cut in parallel with one of the directions intersecting the first and second directions D1 and D2. In the present variation, the four element forming regions 42 are also handled as one configuration unit. The four element forming regions 42 are arranged in such a manner that a predetermined line 53 of the respective element forming regions 42 is formed into a rectangular shape. The semiconductor substrate 40 includes a plurality of the above-described arrangement units. A plurality of configuration units are arranged adjacent to each other in the first direction D1 and the second direction D2.

By singulating the semiconductor substrates 40 one by one into a plurality of element forming regions 42, as shown in FIG. 33, a plurality of semiconductor light detecting elements 10 including the configuration shown in FIG. 14 are obtained. The process of singulating the semiconductor substrate 40 is the same as the process of obtaining the above-described singulation of the plurality of semiconductor photodetecting elements 10 including the configuration shown in FIG. In other words, the semiconductor substrate 40 is cut by the cutting planned line 51, and the side surface of the first side 1N1 is formed when the semiconductor light detecting element 10 is viewed from the opposite direction. The semiconductor substrate 40 is cut by the cutting planned line 52, and the side surface of the second side 1N2 is formed when the semiconductor light detecting element 10 is viewed from the opposite direction. The semiconductor substrate 40 is cut by the cutting planned line 53 to form a side surface of the third side 1N3 or a side surface constituting the fourth side 1N4 when the semiconductor light detecting element 10 is viewed from the opposite direction.

In the present modification, as shown in FIG. 30(a), the notch 45 can be formed in the semiconductor substrate 40. In this case, the notch 45 formed in the semiconductor substrate 40 remains as the notches 3, 5, 13, 15 on the singulated semiconductor photodetecting element 10. Further, as shown in (a) of FIG. 31, a plurality of metal films 47 may be formed. In this case, the metal film 47 formed on the semiconductor substrate 40 remains as the metal films 7, 9, 17, 19 on the singulated semiconductor photodetecting element 10.

In the variation shown in FIG. 34, one of the six sides of the element forming region 42 is set in a direction parallel to the direction intersecting the first and second directions D1 and D2, and the first and second lines are cut. One of the two directions D1 and D2 intersects in parallel with the pair of cutting planned lines 52 and one of the pair of cutting lines 53 in the second direction D2. The element formation region 42 is arranged in the above-described direction crossing the first and second directions D1, D2. That is, in the present modification, the plurality of element forming regions 42 are arranged in a honeycomb shape. Each of the planned cutting lines 51, 52, and 53 is set such that a plurality of element forming regions 42 are arranged in a honeycomb shape.

By singulating the semiconductor substrate 40 into a plurality of element formation regions 42, as shown in FIG. 35, a plurality of semiconductor light detecting elements 10 including the configuration shown in FIG. 14 are obtained. The process of singulating the semiconductor substrate 40 is the same as the process of obtaining the above-described singulation of the plurality of semiconductor photodetecting elements 10 including the configuration shown in FIG. Therefore, in this variation, The semiconductor substrate 40 is cut by the cutting planned line 51, and the side surface of the first side 1N1 is formed when the semiconductor light detecting element 10 is viewed from the opposite direction. The semiconductor substrate 40 is cut by the cutting planned line 52, and the side surface of the second side 1N2 is formed when the semiconductor light detecting element 10 is viewed from the opposite direction. The semiconductor substrate 40 is cut by the cutting planned line 53 to form a side surface of the third side 1N3 or a side surface constituting the fourth side 1N4 when the semiconductor light detecting element 10 is viewed from the opposite direction.

In the modification shown in FIG. 34 and FIG. 35, when the semiconductor substrate 40 is cut, it is difficult to generate an ineffective area that is not used as an element. Therefore, the semiconductor substrate 40 is appropriately cut and the semiconductor substrate 40 is effectively utilized.

In the present modification, as shown in FIG. 30(a), the notch 45 may be formed in the semiconductor substrate 40. In this case, the notch 45 formed in the semiconductor substrate 40 remains as the notches 3, 5, 13, 15 on the singulated semiconductor photodetecting element 10. In this case, in the present modification, a notch is formed at a corner formed by the first side 1N1 and the second side 1N2. Further, as shown in (a) of FIG. 31, a plurality of metal films 47 may be formed. In this case, the metal film 47 formed on the semiconductor substrate 40 remains as the metal films 7, 9, 17, 19 on the singulated semiconductor photodetecting element 10. In this case, in the present modification, a metal film may be formed at a corner formed by the first side 1N1 and the second side 1N2.

The embodiments of the present invention have been described above, but the present invention is not limited to the embodiments described above, and various modifications can be made without departing from the scope of the invention.

The shape of the first and second semiconductor regions 1PA and 1PB is not limited to the above shape, and may be other shapes (for example, a circular shape). The number (column number and number of rows) and arrangement of the avalanche photodiode APD (second semiconductor region 1PB) are not limited to the number and arrangement shown. The number and arrangement of the photodiode array PDAs (channels) are also not limited to the number and arrangement shown.

[Industrial availability]

The present invention is applicable to a light detecting device that detects weak light.

1N1‧‧‧ first side

1N2‧‧‧ second side

1N3‧‧‧ third side

1PB‧‧‧second semiconductor area

10‧‧‧Semiconductor light detecting element

20‧‧‧ Mounting substrate

APD‧‧‧Avalanche Photodiode

E3‧‧‧electrode

E5‧‧‧electrode

L3‧‧‧Insulation

PDA‧‧‧Photodiode

RS1‧‧‧ first area

RS2‧‧‧Second area

W1‧‧‧ bonding wire

X-Y-Z‧‧ Direction

Claims (11)

A photodetecting device comprising: a semiconductor photodetecting element comprising: a semiconductor substrate formed with a photodiode array having a plurality of pixels, and including a first main surface and a second main surface facing each other; a substrate, wherein the semiconductor light detecting element is disposed, and includes: a third main surface opposite to the second main surface of the semiconductor substrate; and a fourth main surface opposite to the third main surface; and a first lead electrically connected to the semiconductor photodetecting element and the mounting substrate; and the semiconductor substrate includes: facing the first side when viewed from a direction opposite to the first main surface and the second main surface And the semiconductor light detecting element includes a first electrode disposed on the semiconductor substrate, and the first side of the first side and the third side connected to one of the first side and the second side The first main surface side is electrically connected to the plurality of pixels; the mounting substrate includes a second electrode disposed on the third main surface side; the first The wire has one end connected to the first electrode and the other end connected to the second electrode, and intersects with the third side when viewed from the direction opposite to the first main surface and the second main surface Mode configuration. The light detecting device according to claim 1, wherein the corner portion formed by the first side and the third side of the semiconductor substrate and the corner formed by the second side and the third side are from the first When the main surface and the second main surface face each other in the above-described direction, a notch is formed along each of the corner portions. The photodetecting device according to claim 1, wherein a metal film is disposed on a corner portion of the semiconductor substrate in which the first side and the third side are formed, and a corner formed by the second side and the third side. . The photodetecting element according to any one of claims 1 to 3, wherein the length of the third side is shorter than the length of each of the first side and the second side. The photodetecting element according to any one of claims 1 to 4, further comprising: a second wire electrically connected to the semiconductor photodetecting element and the mounting substrate; wherein the semiconductor photodetecting element includes a third electrode disposed in the above The first main surface side of the semiconductor substrate is electrically connected to the semiconductor substrate; the mounting substrate includes a fourth electrode disposed on the third main surface side; and the second wire has one end connected to the third electrode And being connected to the other end of the fourth electrode, and arranged to intersect the third side when viewed from the direction in which the first main surface and the second main surface face each other. The photodetecting element according to any one of claims 1 to 4, further comprising: a second wire electrically connected to the semiconductor photodetecting element and the mounting substrate; the semiconductor substrate comprising: a fourth side from the first When the main surface is opposite to the second main surface, the one end is connected to one end of the other first side and the other end of the second side; and the semiconductor photodetecting element includes: a third electrode, the configuration The semiconductor substrate is electrically connected to the semiconductor substrate on the first main surface side; the mounting substrate includes a fourth electrode disposed on the third main surface side, and the second wire is connected to the third surface One end of the electrode and the other end connected to the fourth electrode are disposed to intersect the fourth side when viewed from the direction in which the first main surface and the second main surface face each other. The light detecting device of claim 6, wherein the corner portion formed by the first side and the fourth side of the semiconductor substrate and the corner formed by the second side and the fourth side are from the first The main surface is formed with a notch along each of the corner portions as viewed in the direction opposite to the second main surface. The light detecting device according to claim 6, wherein a metal film is disposed at a corner portion formed by the first side and the fourth side and a corner portion formed by the second side and the fourth side of the semiconductor substrate . The photodetecting element according to any one of claims 6 to 8, wherein the length of the fourth side is shorter than the length of each of the first side and the second side. The photodetecting element according to any one of claims 1 to 9, comprising: a plurality of the above-mentioned semiconductor photodetecting elements; and the plurality of semiconductor photodetecting elements are opposed to the third main surface by the second main surface In the above-described mounting substrate, the first electrode and the second electrode are connected to each other via the first wire for each of the semiconductor light detecting elements. The photodetecting element according to any one of claims 1 to 10, wherein the photodiode array comprises: a plurality of avalanche photodiodes operating in a Geiger mode and formed in the semiconductor substrate; quenching resistor Each of the avalanche photodiodes is connected in series to the first main surface side of the semiconductor substrate, and a signal line is connected in parallel to the quenching resistor and disposed on the first surface of the semiconductor substrate. a main surface side; and the signal line is connected to the first electrode.