WO2016157739A1

WO2016157739A1 - Semiconductor light-emitting element

Info

Publication number: WO2016157739A1
Application number: PCT/JP2016/001275
Authority: WO
Inventors: 信一郎能崎
Original assignee: パナソニック株式会社
Priority date: 2015-03-30
Filing date: 2016-03-09
Publication date: 2016-10-06
Also published as: JPWO2016157739A1; JP6785221B2

Abstract

A semiconductor light-emitting element (110) is provided with: a substrate (111); a first cladding layer (n-type cladding layer (112)) of a first electroconductivity type disposed above the substrate (111); a first guide layer (n-side guide layer (113)) of the first electroconductivity type disposed above the first cladding layer; an active layer (114) disposed above the first guide layer; a second guide layer (p-side guide layer (115)) disposed above the active layer (114); and a second cladding layer (p-type cladding layer (116)) that is disposed above the second guide layer and is of a second electroconductivity type different from the first electroconductivity type. The semiconductor light-emitting element has a first highly-doped layer which is disposed between the first cladding layer and the first guide layer, and in which the first-electroconductivity-type dopant concentration is higher than the mean dopant concentration of the first cladding layer.

Description

Semiconductor light emitting device

The present disclosure relates to a semiconductor light emitting device.

Patent Document 1 discloses a structure of a conventional semiconductor light emitting element. A conventional semiconductor light emitting device has a DBR reflection layer, an n-type semiconductor region, an active layer, and a multilayer film in which low refractive index regions and high refractive index regions are alternately laminated on a low resistance substrate made of silicon single crystal. P-type semiconductor regions are sequentially stacked. Furthermore, a current limiting layer made of n-type GaN and a light-transmitting conductive film are laminated thereon, and a first electrode is formed on the current limiting layer made of n-type GaN. On the other hand, a second electrode is provided on the back surface of the low-resistance substrate made of silicon single crystal. At this time, in the low refractive index region and the high refractive index region constituting the DBR reflection layer, the dopant concentration is higher in the high refractive index region than in the low refractive index region, and the crystallinity is higher than that in the low refractive index region. The rate area is lower.

JP 2003-142730 A

However, when the structure described in Patent Document 1 is used to achieve a low refractive index layer that achieves both low resistance and high crystallinity of a semiconductor light emitting device, it has the following problems.

First, as described in Patent Document 1, when an AlGaN-based material having a lattice mismatch with respect to GaN is used in a low refractive index region, strain accumulates as the film thickness increases, causing dislocations and cracks. Will occur.

On the other hand, when an AlInGaN-based material that is lattice-matched to GaN is used in the low refractive index region, the problem of distortion associated with increasing the film thickness is solved. However, in order to realize a sufficiently low resistance DBR reflection layer, it is necessary to supply a high concentration dopant to a high refractive index region where resistance is relatively low. As a result, since the crystallinity of the high refractive index region is lowered, the crystallinity of the low refractive index region formed on the high refractive index region is also lowered, and the crystallinity of the entire DBR reflection layer is lowered.

The present disclosure has been made to solve the above-described problems, and provides a semiconductor light-emitting device having a cladding layer having a low refractive index, a low resistance, and a high crystallinity without causing dislocation or crack due to strain.

In order to solve the above problem, a semiconductor light emitting element according to one embodiment of the present disclosure includes a substrate, a first conductivity type first cladding layer disposed above the substrate, and a first cladding layer. A first guide layer of a first conductivity type disposed; an active layer disposed above the first guide layer; a second guide layer disposed above the active layer; and a second guide layer And a second clad layer of a second conductivity type different from the first conductivity type, and disposed between the first clad layer and the first guide layer, the first conductivity type The first heavily doped layer has a higher dopant concentration than the average dopant concentration of the first cladding layer.

According to the present disclosure, it is possible to provide a semiconductor light emitting element having a clad layer having a low refractive index, a low resistance, and a high crystallinity without causing dislocations and cracks due to strain.

1A is a plan view of a semiconductor light emitting element according to Embodiment 1. FIG. 1B is a cross-sectional view of the semiconductor light emitting element according to Embodiment 1. FIG. 1C is a perspective view of the semiconductor light emitting device according to Embodiment 1. FIG. FIG. 2A is a diagram illustrating a band structure of the semiconductor light emitting device according to the first embodiment. 2B is a diagram illustrating a band structure of a comparative example of the semiconductor light emitting element according to Embodiment 1. FIG. FIG. 3 is a diagram showing the surface morphology of the semiconductor light emitting device and the comparative example according to the first embodiment. FIG. 4 is a cross-sectional view showing each manufacturing process of the semiconductor light emitting device according to the first embodiment. FIG. 5 is a cross-sectional view of the semiconductor light emitting device according to the second embodiment. FIG. 6 is a cross-sectional view of the semiconductor light emitting device according to the third embodiment.

Hereinafter, each embodiment will be described with reference to the drawings. The present disclosure is not limited to the following embodiments. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between the parts, and the like are not necessarily the same as actual ones. Even in the case where substantially the same part is represented, the dimensions and ratio may be represented differently depending on the drawing. Substantially the same components are denoted by the same symbols, and detailed description may be omitted as appropriate. Among the constituent elements in the following embodiments, constituent elements that are not described in the independent claims indicating the highest concept of the present disclosure are described as optional constituent elements.

Unless otherwise deviating from the gist of the present disclosure, the present disclosure also includes various modifications in which the present embodiment has been modified within the scope conceived by those skilled in the art. In addition, it is possible to combine at least some of the plurality of embodiments without departing from the gist of the present disclosure.

Also, in this specification, the term “upward” does not indicate the upward direction (vertically upward) in absolute space recognition, but is a term defined by a relative positional relationship based on the stacking order in the stacking configuration. Used as In addition, the term “above” means not only when two components are spaced apart from each other and another component is present between the two components, but the two components are in close contact with each other. It is also applied to the case where two components are in contact with each other.

(Embodiment 1)
[1-1. Construction]
First, the structure of the semiconductor light emitting element according to Embodiment 1 of the present disclosure will be described with reference to FIGS. 1A, 1B, and 1C.

FIG. 1A is a plan view of the semiconductor light emitting device 110 according to the present embodiment.

FIG. 1B is a cross-sectional view of the semiconductor light emitting device 110 according to the present embodiment. FIG. 1B shows a cross section taken along line IB-IB shown in FIG. 1A.

FIG. 1C is a perspective view of the semiconductor light emitting device 110 according to the present embodiment.

As shown in FIGS. 1B and 1C, the semiconductor light emitting device 110 includes a substrate 111, an n-type cladding layer 112, a heavily doped layer 125, an n-side guide layer 113, an active layer 114, a p-side guide layer 115, and a p-type. A clad layer 116 and a p-type contact layer 117 are provided. The semiconductor light emitting device 110 further includes a current blocking layer 121, a p-electrode 122, and an n-electrode 123.

The semiconductor light emitting device 110 includes an n-type cladding layer 112, a heavily doped layer 125, an n-side guide layer 113, an active layer 114, a p-side guide layer 115, a p-type cladding layer 116, and a p-type contact layer 117 on a substrate 111. Are stacked in order.

The substrate 111 is, for example, an n-type GaN substrate. As the substrate 111, it is also possible to use a heterogeneous substrate such as an n-type SiC substrate, an n-type GaAs substrate, or an n-type Si substrate, or an insulating substrate such as a sapphire substrate. The thickness of the substrate 111 is preferably about 60 to 100 μm. With such a configuration, the yield in the cleavage process can be improved.

The n-side guide layer 113 is a first guide layer that is disposed above the n-type cladding layer 112 (the positive direction of the z-axis shown in FIGS. 1A, 1B, and 1C) and has an n-type conductivity. . The n-side guide layer 113 is made of, for example, n-type GaN containing undoped or n-type dopants. The film thickness of the n-side guide layer 113 is preferably about 100 to 300 nm. With such a configuration, both good crystallinity and light confinement near the active layer 114 can be achieved.

The active layer 114 is a light emitting layer disposed above the n-side guide layer 113. The active layer 114 has, for example, a structure in which three layers of InGaN quantum well layers and GaN quantum barrier layers are alternately stacked. The active layer 114 may be undoped. Further, at least one of the quantum well layer and the quantum barrier layer may contain an n-type dopant. The active layer 114 is adjusted to emit light having an arbitrary wavelength of, for example, about 400 to 650 nm. The thickness of the active layer 114 is preferably about 30 to 100 nm. With such a configuration, both good crystallinity and light confinement near the active layer 114 can be achieved. The thickness of the InGaN quantum well layer is preferably about 2.5 to 7.5 nm. With such a configuration, it is possible to achieve both good crystallinity and effective light emission recombination in the well layer. The film thickness of the GaN quantum barrier layer is preferably about 3.0 to 15.0 nm. With such a configuration, both good crystallinity and light confinement near the active layer 114 can be achieved.

The p-side guide layer 115 is a second guide layer that is disposed above the active layer 114 and has a p-type conductivity. The p-side guide layer 115 is made of, for example, GaN containing a p-type dopant or undoped n-type GaN. The film thickness of the p-side guide layer 115 is preferably about 50 to 200 nm. With such a configuration, it is possible to achieve both good crystallinity and light confinement in the vicinity of the active layer.

The p-type cladding layer 116 is a second cladding layer disposed above the p-side guide layer 115 and having a p-type conductivity. The p-type cladding layer 116 is made of, for example, AlGaN containing a p-type dopant.

The p-type contact layer 117 is disposed above the p-type cladding layer 116 and is a layer in contact with the p-electrode. The p-type contact layer 117 is made of, for example, GaN containing a p-type dopant.

For example, Si or Ge can be used as the n-type dopant, and Mg or the like can be used as the p-type dopant. Hereinafter, unless otherwise specified, in the case of n-type or p-type, it is assumed that any of the aforementioned dopants is included.

The n-type cladding layer 112 is a first cladding layer that is disposed above the substrate 111 and has an n-type conductivity. The n-type cladding layer 112 is composed of a multilayer film including a first n-type semiconductor layer 112a and a second n-type semiconductor layer 112b. The refractive index of the first n-type semiconductor layer 112a is different from the refractive index of the second n-type semiconductor layer 112b.

The first n-type semiconductor layer 112a is a first semiconductor layer whose conductivity type is n-type, and Al _x In _y Ga _1-xy N (0 <x ≦ 1, 0 ≦ y ≦ 1, x + y ≦ 1) may be included, and for example, it may be made of AlInN. The second n-type semiconductor layer 112b is a second semiconductor layer having an n-type conductivity, and In _z Ga _1-z N (0 ≦ z) having a higher refractive index than that of the first n-type semiconductor layer 112a. ≦ 1) may be included, and for example, it may be composed of GaN.

The film thickness of the n-type cladding layer 112 is preferably about 500 to 1000 nm. The film thickness of the first n-type semiconductor layer 112a is preferably about 0.5 to 2 nm. With such a configuration, both good crystallinity and good tunneling current can be achieved. The film thickness of the second n-type semiconductor layer 112b is preferably about 1.0 to 3.0 nm.

The heavily doped layer 125 is disposed between the n-type cladding layer 112 and the n-side guide layer 113, and the n-type dopant concentration is higher than the average dopant concentration of the n-type cladding layer 112. The n-type dopant doped into the heavily doped layer 125 is, for example, Si.

The heavily doped layer 125 only needs to contain Al _x In _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, x + y ≦ 1), for example, GaN. When the n-type cladding layer 112 or the n-side guide layer 113 and the high-concentration doped layer 125 have the same composition, they can be regarded as a part of the n-type cladding layer 112 or one of the n-side guide layer 113. It can also be regarded as a part.

The concentration of the dopant in the heavily doped layer 125 is desirably 1 × 10 ²⁰ cm ⁻³ or more and 1 × 10 ²² cm ⁻³ or less. The film thickness of the heavily doped layer 125 is desirably 0.5 nm or more and 1.5 nm or less. With such a configuration, both good crystallinity and good tunneling current can be achieved.

In the n-type cladding layer 112, the dopant concentration decreases from the n-side guide layer 113 side toward the substrate 111 side. The first n-type semiconductor layer 112a is preferably undoped, and the second n-type semiconductor layer 112b is preferably doped with an n-type dopant.

An optical waveguide extending in the y-axis direction is formed on the surface of the semiconductor light emitting device 110 as shown in FIGS. 1A and 1C. The optical waveguide has a ridge structure dug up to a part of the p-type cladding layer 116. A current blocking layer 121 is disposed so as to cover the ridge structure.

The current block layer 121 is an insulating layer made of, for example, SiO ₂ . The current blocking layer 121 is provided with an opening for exposing the p-type contact layer 117. A p-electrode 122 is formed in contact with the p-type contact layer 117 in the opening.

The p-electrode 122 is an electrode made of a single layer or a multilayer film of one or more metals such as Cr, Ti, Ni, Pd, Pt, and Au.

An n-electrode 123 is formed on the back surface of the substrate 111.

The n-electrode 123 is an electrode composed of a single layer or a multilayer film of one or more metals such as Cr, Ti, Ni, Pd, Pt, and Au.

The semiconductor light emitting device 110 has a structure in which a laser operation or a super luminescent diode operation is performed by injecting a current between the p electrode 122 and the n electrode 123.

In the case where an insulating substrate is used as the substrate 111, power is supplied to the semiconductor light emitting device by forming an n electrode electrically insulated from the p electrode 122 on the surface outside the optical waveguide where the n-type cladding layer 112 is exposed. Can be supplied.

[1-2. Operation and effect]
Next, the operation and effect of the semiconductor light emitting device 110 of this embodiment will be described with reference to FIGS. 2A, 2B, and 3.

Hereinafter, layers from the substrate 111 to the n-side guide layer 113 are collectively referred to as an n-type semiconductor layer.

First, the band structure of this embodiment will be described with reference to FIGS. 2A and 2B.

FIG. 2A is a diagram illustrating a band structure of the semiconductor light emitting device according to this embodiment. An outline of the layer structure of the n-type semiconductor layer is shown in the upper part of FIG. 2A. A graph showing the energy level of the conduction band with respect to the position of the n-type semiconductor layer is shown in the lower part of FIG. 2A. In the graphs shown in FIGS. 2A and 2B, “E” represents a power of 10. For example, “1E18” represents 10 to the 18th power, that is, 10 ¹⁸ .

Curve 150 in the graph shown in FIG. 2A shows the energy level when the heavily doped layer 125 has an n-type dopant concentration of 5 × 10 ¹⁹ cm ⁻³ . Curve 152 represents the energy level when the heavily doped layer 125 has an n-type dopant concentration of 7 × 10 ¹⁹ cm ⁻³ . Curve 154 represents the energy level when the heavily doped layer 125 has an n-type dopant concentration of 1 × 10 ²⁰ cm ⁻³ . In any case, the n-type dopant concentration of the layers other than the heavily doped layer 125 of the n-type semiconductor layer is 1 × 10 ¹⁸ cm ⁻³ .

FIG. 2B is a diagram showing a band structure of a comparative example of the semiconductor light emitting device according to this embodiment. FIG. 2B shows a graph showing the energy level of the conduction band with respect to the position of the n-type semiconductor layer of the comparative example. The layer structure of the n-type semiconductor layer of the comparative example is different from the n-type semiconductor layer according to the present embodiment in that the highly doped layer 125 is not provided, and is identical in other points.

A curve 160 in the graph shown in FIG. 2B indicates the energy level when the n-type dopant concentration of the entire n-type semiconductor layer is 1 × 10 ¹⁹ cm ⁻³ . Curve 162 represents the energy level when the n-type dopant concentration of the entire n-type semiconductor layer is 5 × 10 ¹⁹ cm ⁻³ . Curve 164 shows the energy level when the n-type dopant concentration of the entire n-type semiconductor layer is 1 × 10 ²⁰ cm ⁻³ .

In an n-type semiconductor layer containing an n-type semiconductor material having a large band gap such as AlInN, diffusion of electrons that pass through the band gap is hindered by a large energy barrier. In order to reduce this influence, the n-type cladding layer 112 is a multilayer film in which first n-type semiconductor layers 112a made of AlInN and second n-type semiconductor layers 112b made of GaN are alternately stacked. ing.

With this configuration, electrons can be conducted by tunneling through the second n-type semiconductor layer 112b having a relatively small band gap. Therefore, in order to tunnel electrons effectively, it is necessary to dope the second n-type semiconductor layer 112b at a high concentration.

However, as can be seen from the energy levels shown by

curves

154 and 164, the doping concentration at which good current-voltage characteristics are obtained is as high as about 1 × 10 ²⁰ cm ⁻³ . For this reason, if the entire n-type cladding layer 112 is doped uniformly as shown in FIG. 2B, the crystallinity of the n-type cladding layer 112 is deteriorated.

Here, paying attention to the band structure of the entire n-type cladding layer 112, it can be seen that the energy barrier having the largest width is the interface between the n-type cladding layer 112 and the n-side guide layer 113.

This is because charges are concentrated on the interface between the n-type cladding layer 112 and the n-side guide layer 113 in order to compensate the polarization in the n-type cladding layer 112. This large energy barrier reduces the probability of tunneling near the interface, making it impossible to obtain good current-voltage characteristics.

Therefore, the semiconductor light emitting device 110 according to the present disclosure includes the high-concentration doped layer 125 in which the n-type dopant is locally doped between the n-type cladding layer 112 and the n-side guide layer 113.

Therefore, the energy barrier in the vicinity of the interface between the n-type cladding layer 112 and the n-side guide layer 113 that inhibits the electric conduction of the n-type cladding layer 112 can be effectively reduced by the charge of the ionized dopant. Therefore, even if the average dopant concentration of the n-type cladding layer 112 is lowered, the electrical characteristics can be maintained, and the crystal quality of the n-type cladding layer 112 can be kept high. As a result, the semiconductor light emitting device 110 having the n-type cladding layer 112 having a low refractive index, low resistance, and high crystallinity can be realized without generating dislocations and cracks due to strain.

Here, the current-voltage characteristics and crystallinity of the semiconductor light emitting device 110 will be described with reference to FIG.

FIG. 3 is a diagram illustrating the surface morphology of the semiconductor light emitting device 110 according to the present embodiment and the semiconductor light emitting device according to the comparative example. 3 shows (1) no doping, (2) a case where the entire n-type cladding layer 112 is uniformly doped (5 × 10 ¹⁹ cm ⁻³ ), and (3) the n-type cladding layer 112 and the n-side guide. The surface morphology of each sample is shown when only the interface with the layer 113 is heavily doped (the interface 1.5 nm is 1 × 10 ²⁰ cm ⁻³ and the other regions are 5 × 10 ¹⁸ cm ⁻³ ). FIG. 3 is a diagram of the surface morphology observed with the crystal grown up to the n-side guide layer 113. Further, the upper part of FIG. 3 shows an image obtained by an atomic force microscope (AFM), and the lower part shows a differential image of AFM.

In each sample, the first n-type semiconductor layer 112a is composed of AlInN having an In composition of 17% and a film thickness of 1.5 nm. The second n-type semiconductor layer 112b is made of GaN and has a thickness of 1.5 nm. These two kinds of materials are laminated in 67 cycles, and the total film thickness is 201 nm.

3 that the uniformly doped sample of (2) has a surface morphology with more pits than the other two samples. On the other hand, the surface morphology of the undoped sample (1) and the sample (2) including the heavily doped layer 125 at the interface between the n-type cladding layer 112 and the n-side guide layer 113 are approximately the same. That is, in the sample including the heavily doped layer 125 at the interface with the n-side guide layer 113, no increase in pits due to doping is observed. In other words, high crystallinity is maintained in the sample including the heavily doped layer 125.

Regarding the current-voltage characteristics, both a uniformly doped sample and a highly doped sample only at the interface between the n-type cladding layer 112 and the n-side guide layer 113 were obtained.

From the above, it was confirmed that both the crystallinity and the current-voltage characteristics can be achieved by the technique of the present disclosure.

[1-3. Production method]
Subsequently, a method for manufacturing the semiconductor light emitting device 110 according to the present embodiment will be described with reference to FIGS.

FIG. 4 is a cross-sectional view showing each manufacturing process of the semiconductor light emitting device 110 according to the first embodiment.

First, as shown in FIG. 4A, an n-type clad layer 112 is formed on a substrate 111 made of GaN having n-type conductivity by using MOCVD (Metal Organic Chemical Vapor Deposition). In the present embodiment, the n-type cladding layer 112 is formed on the substrate 111 by alternately laminating the first n-type semiconductor layer 112a made of AlInN and the second n-type semiconductor layer 112b made of GaN.

4A, the heavily doped layer 125, the n-side guide layer 113, the active layer 114, the p-side guide layer 115, the p-type cladding film 116M, and the n-type cladding layer 112 are formed. A p-type contact film 117M is sequentially formed. Note that the high-concentration doped layer 125 can be formed by supplying a high-concentration dopant (eg, SiH 4) at the same time as the crystal raw material. Further, if the supply of the crystal raw material is interrupted immediately after the formation of the high-concentration doped layer 125, the dopant concentration of the high-concentration doped layer 125 can be increased by a pile-up phenomenon.

Next, an SiO ₂ mask (not shown) is formed on the p-type contact film 117M by plasma CVD (Chemical Vapor Deposition) method or the like. Thereafter, a stripe pattern is formed on the SiO ₂ mask by using a photolithography method and a dry etching method to expose the p-type contact film 117M. Subsequently, for example, dry etching using Cl ₂ gas is performed to remove the exposed portion of the p-type contact film 117M, and a part of the p-type cladding film 116M is etched. Thereafter, the SiO ₂ mask is removed by wet etching such as HF to form the p-type contact layer 117 and the p-type cladding layer 116 as shown in FIG.

Next, a current blocking layer 121 made of, for example, SiO ₂ is formed on the p-type cladding layer 116 and the p-type contact layer 117 by plasma CVD or the like. Subsequently, the current blocking layer 121 is etched using photolithography and dry etching so that the p-type contact layer 117 is exposed. Next, the p-electrode 122 is formed so as to be in electrical contact with the p-type contact layer 117 by using a photolithography method and a vacuum evaporation method. Next, an n-electrode 123 made of a multilayer film of Ti, Al, Ni, Au or the like is formed on the back surface of the substrate 111 by using a photolithography method and a vacuum deposition method ((c) in FIG. 4).

Finally, chip separation of the semiconductor light emitting element is performed by dicing using a blade or cleavage (not shown).

Thus, the semiconductor light emitting device 110 according to the first embodiment can be realized.

(Embodiment 2)
[2-1. Construction]
Next, the structure of the semiconductor light emitting device according to the second embodiment will be described with reference to FIG. 5 focusing on differences from the first embodiment.

FIG. 5 is a cross-sectional view of the semiconductor light emitting device 210 according to the second embodiment.

The main difference between the present embodiment and the first embodiment is the configuration of the p-type cladding layer 216 and the high-concentration doped layer 225.

As shown in FIG. 5, the p-type cladding layer 216 of the semiconductor light emitting device 210 according to the present embodiment is configured by a multilayer film including a first p-type semiconductor layer 216a and a second p-type semiconductor layer 216b. Is done. The first p-type semiconductor layer 216a is a third semiconductor layer whose conductivity type is p-type, and is Al _x In _y Ga _1-xy N (0 <x ≦ 1, 0 ≦ y ≦ 1, x + y). ≦ 1) may be included. The second p-type semiconductor layer 216b is a fourth semiconductor layer having a p-type conductivity and may contain In _z Ga _1-z N (0 ≦ z ≦ 1).

The thickness of the p-type cladding layer 216 is preferably about 200 to 1000 nm. With such a configuration, both good crystallinity and light confinement near the active layer 114 can be achieved. The film thickness of the first p-type semiconductor layer 216a is preferably 0.5 nm or more and 2 nm or less. The film thickness of the second p-type semiconductor layer 216b is preferably about 1.0 to 3.0 nm. With such a configuration, both good crystallinity and good tunneling current can be achieved.

The heavily doped layer 225 is disposed between the p-type cladding layer 216 and the p-side guide layer 115, and the p-type dopant concentration is higher than the average dopant concentration of the p-type cladding layer 216. The p-type dopant doped into the heavily doped layer 225 is, for example, Mg.

The heavily doped layer 225 only needs to contain Al _x In _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, x + y ≦ 1), and is, for example, GaN. If the p-type cladding layer 216 and the p-side guide layer 115 and the heavily doped layer 225 have the same composition, they can be regarded as a part of the p-type cladding layer 216 or one of the p-side guide layer 115. It can also be regarded as a part.

It is desirable that the dopant concentration of the heavily doped layer 225 is 1 × 10 ²⁰ cm ⁻³ or more and 10 × 10 ²² cm ⁻³ or less. The film thickness of the heavily doped layer 225 is preferably 0.5 nm or more and 1.5 nm or less. With such a configuration, both good crystallinity and good tunneling current can be achieved.

The p-type cladding layer 216 has a structure in which the dopant concentration decreases from the p-side guide layer 115 side toward the p-type contact layer 117 side.

[2-2. Operation and effect]
Next, effects of the semiconductor light emitting device 210 of the present embodiment will be described.

In the second embodiment, the p-type cladding layer 216 has a structure in which first p-type semiconductor layers 216a made of, for example, AlInN and second p-type semiconductor layers 216b made of, for example, GaN are alternately stacked. Further, Mg is doped at a high concentration at the interface between the p-side guide layer 115 and the p-type cladding layer 216.

Since the semiconductor light emitting device 210 has such a structure, the p-side guide layer 115 and the p-type cladding layer 216 generated to compensate the polarization in the p-type cladding layer 216, as in the first embodiment, The large energy barrier at the interface can be reduced by the charge of the ionized acceptor. Further, since the doping concentration can be reduced as the average of the p-type cladding layer 216, both crystallinity and current-voltage characteristics can be achieved.

As described above, a semiconductor light emitting device having a clad layer having low refractive index, low resistance, and high crystallinity can be realized.

(Embodiment 3)
[3-1. Construction]
Next, the structure of the semiconductor light emitting device according to the third embodiment will be described with reference to FIG. 6 focusing on differences from the second embodiment.

FIG. 6 is a cross-sectional view of the semiconductor light emitting device according to the third embodiment.

The p-type cladding layer 316 is composed of a multilayer film including a first p-type semiconductor layer 316a and a second p-type semiconductor layer 316b. The first p-type semiconductor layer 316a is a third semiconductor layer having a conductivity type of p-type, and Al _x In _y Ga _1-xy N (0 <x ≦ 1, 0 ≦ y ≦ 1, x + y ≦ 1) may be included. The second p-type semiconductor layer 316b is a fourth semiconductor layer having a conductivity type of p-type, and may include In _z Ga _1-z N (0 ≦ z ≦ 1).

The semiconductor light emitting element 310 is provided with a current blocking layer 321 in which an opening for exposing a part of the p-type contact layer 317 is formed on the p-type contact layer 317. A first p-electrode 322 a made of, for example, ITO is disposed on the opening and the current blocking layer 321. The second p electrode 322b electrically connected to the first p electrode 322a is disposed so as not to overlap with the opening of the current blocking layer 321 in plan view. The second p-electrode 322b is composed of a single layer or a multilayer of at least one metal such as Cr, Ti, Ni, Pd, Pt, Au, for example.

The n-type cladding layer 112 and the p-type cladding layer 316 are designed so that the reflectance at the wavelength of the light generated in the active layer 314 is increased by adjusting the film thickness and period of the multilayer films having different refractive indexes. be able to. In this case, since the resonator is formed in the stacking direction of the semiconductor light emitting device 310, the semiconductor light emitting device 310 is laser-induced in the stacking direction by injecting a current between the second p electrode 322 b and the n electrode 323. It is structured to operate as a vertical cavity surface emitting laser that emits light.

Also in the present embodiment having the above-described configuration, it is possible to realize a semiconductor light emitting element having a cladding layer having both a low refractive index, low resistance, and high crystallinity.

(Variations, etc.)
As mentioned above, although the semiconductor light emitting element concerning this indication was explained based on each embodiment, this indication is not limited to each above-mentioned embodiment.

For example, in the above embodiment, the conductivity type on the substrate 111 side is n-type, but the conductivity type on the substrate 111 side may be p-type. In other words, the semiconductor light emitting device according to the present disclosure includes a substrate, a first conductivity type first cladding layer disposed above the substrate, and a first conductivity type first cladding disposed above the first cladding layer. 1 guide layer, an active layer disposed above the first guide layer, a second guide layer disposed above the active layer, and a first guide layer disposed above the second guide layer, A second cladding layer of a second conductivity type different from the conductivity type. The semiconductor light emitting device according to the present disclosure is disposed between the first cladding layer and the first guide layer, and the dopant concentration of the first conductivity type is higher than the average dopant concentration of the first cladding layer. Having a high, first heavily doped layer;

In the above embodiment, a semiconductor light emitting device using a nitride semiconductor has been described. However, the technology of the present disclosure can also be applied to a semiconductor light emitting device using another material. For example, the technology of the present disclosure can also be applied to a semiconductor light emitting device in the gallium arsenide-based infrared region.

The semiconductor light emitting device according to the present disclosure can be applied to an optical pickup of an optical drive, a light source for illumination, and the like that require high efficiency and reliability because its cladding layer has low resistance and high crystallinity.

110, 210, 310 Semiconductor light emitting device 111 Substrate 112 n-type cladding layer (first cladding layer)
112a First n-type semiconductor layer (first semiconductor layer)
112b Second n-type semiconductor layer (second semiconductor layer)
113 n-side guide layer (first guide layer)
114, 314 Active layer 115 p-side guide layer (second guide layer)
116, 216, 316 p-type cladding layer (second cladding layer)
116M p-type cladding film 117, 317 p-type contact layer 117M p-

type contact film

121, 321 current blocking layer 122 p-electrode 123, 323 n-

electrode

125, 225 heavily doped

layer

216a, 316a first p-type semiconductor layer (first 3 semiconductor layers)
216b, 316b Second p-type semiconductor layer (fourth semiconductor layer)
322a first p-electrode 322b second p-electrode

Claims

A substrate,
A first conductivity type first cladding layer disposed above the substrate;
A first guide layer of the first conductivity type disposed above the first cladding layer;
An active layer disposed above the first guide layer;
A second guide layer disposed above the active layer;
A second cladding layer of a second conductivity type different from the first conductivity type, disposed above the second guide layer,
A first high concentration disposed between the first cladding layer and the first guide layer, wherein the first conductivity type dopant concentration is higher than an average dopant concentration of the first cladding layer. A semiconductor light emitting device having a doped layer.
The first cladding layer is composed of a multilayer film including a first semiconductor layer and a second semiconductor layer,
The semiconductor light emitting element according to claim 1, wherein a refractive index of the first semiconductor layer is different from a refractive index of the second semiconductor layer.
The semiconductor light-emitting element according to claim 2, wherein the first semiconductor layer includes Al x In y Ga 1-xy N (0 <x ≦ 1, 0 ≦ y ≦ 1, x + y ≦ 1).
The semiconductor light emitting element according to claim 2, wherein the second semiconductor layer includes In z Ga 1-z N (0 ≦ z ≦ 1).
The semiconductor light-emitting device according to claim 2, wherein the second semiconductor layer is doped with the dopant of the first conductivity type.
6. The semiconductor light emitting element according to claim 2, wherein the first semiconductor layer is undoped.
7. The semiconductor light emitting device according to claim 1, wherein a dopant concentration of the first heavily doped layer is 1 × 10 20 cm −3 or more.
The semiconductor light-emitting element according to claim 1, wherein a thickness of the first highly doped layer is 1.5 nm or less.
The semiconductor light emitting element according to any one of claims 1 to 8, wherein a dopant concentration of the first cladding layer decreases from the first guide layer side toward the substrate side.
A second high concentration disposed between the second cladding layer and the second guide layer, wherein the second conductivity type dopant concentration is higher than an average dopant concentration of the second cladding layer; The semiconductor light-emitting element according to claim 1, further comprising a doped layer.
The second cladding layer is composed of a multilayer film including a third semiconductor layer and a fourth semiconductor layer,
The semiconductor light-emitting element according to any one of claims 1 to 10, wherein a refractive index of the third semiconductor layer is different from a refractive index of the fourth semiconductor layer.
The first clad layer, the first guide layer, the active layer, the second guide layer, and the second clad layer are all made of a nitride semiconductor. The semiconductor light emitting element of any one of Claims.
The semiconductor light-emitting element according to claim 1, wherein the first conductivity type is an n-type.