WO2016155335A1 - 异构多核可重构计算平台上任务调度的方法和装置 - Google Patents

异构多核可重构计算平台上任务调度的方法和装置 Download PDF

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Publication number
WO2016155335A1
WO2016155335A1 PCT/CN2015/095249 CN2015095249W WO2016155335A1 WO 2016155335 A1 WO2016155335 A1 WO 2016155335A1 CN 2015095249 W CN2015095249 W CN 2015095249W WO 2016155335 A1 WO2016155335 A1 WO 2016155335A1
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core
task
target task
reconfigurable
target
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PCT/CN2015/095249
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English (en)
French (fr)
Inventor
王超
李曦
周学海
张军能
陈鹏
郭琦
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华为技术有限公司
中国科学技术大学
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Priority to EP15887288.7A priority Critical patent/EP3190515A4/en
Publication of WO2016155335A1 publication Critical patent/WO2016155335A1/zh
Priority to US15/621,768 priority patent/US10452605B2/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/505—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177—Initialisation or configuration control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5083—Techniques for rebalancing the load in a distributed system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G06F9/5066—Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs

Definitions

  • the present invention relates to the field of computers and, more particularly, to a method and apparatus for task scheduling on a heterogeneous multi-core reconfigurable computing platform.
  • the software task has the advantages of flexibility, easy modification and debugging, and its disadvantage is that the calculation speed is not ideal; and the hardware task has the advantage of high speed, and the disadvantage is that it is not flexible enough and is not easy to debug.
  • Heterogeneous multi-core reconfigurable computing platform is an effective means to balance general-purpose processors and ASICs.
  • Heterogeneous multi-core reconfigurable computing platforms can use reconfigurable logic devices to achieve high speedup ratios and heavyweights. Building technology or adding a general purpose processor makes it very flexible.
  • heterogeneous multi-core reconfigurable computing platforms can overcome the high cost and non-reusability drawbacks of ASICs due to the complex process of pre-designed manufacturing.
  • Reconfigurable resources ie, hardware logic resources
  • heterogeneous multi-core reconfigurable computing platforms are usually very limited, and reconfigurable resources need to be reconstructed to implement hardware execution of tasks.
  • the hardware resource reconstruction on the heterogeneous multi-core reconfigurable computing platform can be divided into static reconstruction and dynamic reconstruction according to its reconstruction characteristics.
  • Static reconfiguration refers to the static reconfiguration of the hardware logic resources of the system, that is, online programming in various ways during system idle to configure the logic functions of the reconfigurable hardware logic devices.
  • Dynamic reconfiguration refers to the dynamic configuration of the logic function of the reconfigurable logic device in real time during the real-time operation of the system.
  • heterogeneous multi-core reconfigurable computing platforms generally use a window-based task migration method for reconstruction.
  • the window is defined as the time interval from one reconfiguration to the next reconfiguration.
  • the composition of a window includes three phases: hardware execution time (Hardware Execution) time, scheduling time, and reconfiguration time.
  • the scheduling time is hidden in the hardware execution time.
  • the size of the reconstruction window is fixed, and the size of the window may affect the performance of the system. For example, if the window is too large, the reconfigurable resource is idle for a long time, which may reduce resource utilization and system performance; If the window is too small, the system will be refactored too frequently, which will introduce additional refactoring overhead, which will reduce the performance of the system.
  • Embodiments of the present invention provide a method and apparatus for task scheduling on a heterogeneous multi-core reconfigurable computing platform, which can determine an execution manner of a task according to the execution condition of the task and the usage of the reconfigurable resource of the computing platform, and can effectively improve Utilization of reconfigurable resources on heterogeneous multicore reconfigurable computing platforms.
  • a method for task scheduling on a heterogeneous multi-core reconfigurable computing platform comprising:
  • the execution mode includes a hardware mode or a software mode, where the target task is The heterogeneous multi-core reconfigurable computing platform does not have a corresponding target intellectual property IP core for performing the target task, and the heat of the target task is used to indicate the occupancy rate of the target task to the central processing unit CPU, and the reconfigurable resource Usage is used to indicate the use of the reconfigurable resource;
  • the target task is executed according to the determined execution mode.
  • determining execution of the target task according to the heat of the target task and the usage rate of the reconfigurable resource of the heterogeneous multi-core reconfigurable computing platform Ways including:
  • T L is the length of time between the current time and the time when the reconfigurable resource was last reconstructed. The number of times the i-th IP core performs the corresponding task of the i-th IP core within the time length T L , The length of time required to perform the corresponding task for the i-th IP core;
  • the execution mode of the target task is determined according to the weighted heat C w of the target task and the usage rate E ave of the reconfigurable resource.
  • determining, according to the weighted heat C w of the target task and the usage rate E ave of the reconfigurable resource The way the target task is executed including:
  • the method further includes:
  • An IP core for performing the task to be performed is not laid out in the heterogeneous multi-core reconfigurable computing platform In case, the task to be executed is determined as the target task to be executed.
  • the heterogeneous multi-core may be heavy
  • the computing platform includes a plurality of reconfigurable resource packages.
  • the target task is executed according to the determined execution manner, including:
  • the target task is executed using the target IP core.
  • the at least one reconfigurable resource packet of the plurality of reconfigurable resource packets is reconfigurable to be executable
  • the target IP core of the target task including:
  • the method further includes:
  • the heterogeneous multi-core reconfigurable computing platform has an IP core for indicating the task to be executed, it is determined that the execution mode of the task to be executed is hardware execution.
  • the second aspect provides a device for task scheduling on a heterogeneous multi-core reconfigurable computing platform, the device comprising:
  • a first determining module configured to determine, according to the heat of the target task to be executed and the usage rate of the reconfigurable resource of the heterogeneous multi-core reconfigurable computing platform, the execution manner of the target task includes a hardware mode or software
  • the target task has no corresponding target intellectual property IP core for performing the target task in the heterogeneous multi-core reconfigurable computing platform, and the heat of the target task is used to indicate the occupancy rate of the target task to the CPU of the central processing unit.
  • the usage rate of the reconfigurable resource is used to indicate the usage of the reconfigurable resource;
  • an execution module configured to execute the target task according to the execution manner determined by the first determining module.
  • the first determining module is specifically configured to:
  • T L is the length of time between the current time and the time when the reconfigurable resource was last reconstructed. The number of times the i-th IP core performs the corresponding task of the i-th IP core within the time length T L , The length of time required to perform the corresponding task for the i-th IP core;
  • the execution mode of the target task is determined according to the weighted heat C w of the target task and the usage rate E ave of the reconfigurable resource.
  • determining, according to the weighted heat C w of the target task and the usage rate E ave of the reconfigurable resource is specifically configured to:
  • the device further includes:
  • a second determining module configured to determine a task to be executed
  • a third determining module configured to determine the task to be executed as the target task to be executed if the heterogeneous multi-core reconfigurable computing platform does not deploy an IP core for executing the task to be executed.
  • the heterogeneous multi-core may be heavy
  • the computing platform includes a plurality of reconfigurable resource packages, and the execution module is specifically configured to: perform the target task according to the determined execution manner:
  • the target task is executed using the target IP core.
  • the at least one reconfigurable resource packet of the plurality of reconfigurable resource packets is reconfigured to be capable of The aspect of the target IP core that performs the target task, the execution module is specifically used to:
  • the apparatus further includes:
  • a fourth determining module configured to determine, in the case that the heterogeneous multi-core reconfigurable computing platform has an IP core for indicating the task to be executed, performing an execution manner of the task to be executed as hardware execution.
  • determining the execution mode of the target task according to the heat of the target task and the usage rate of the reconfigurable resource of the heterogeneous multi-core reconfigurable computing platform by performing according to the task
  • the situation and the usage of the reconfigurable resources of the computing platform dynamically determine the execution mode of the task, and can realize the rational utilization of the reconfigurable resources, and the IP core is frequently reconstructed compared with the execution mode of the task specified by the user in the prior art.
  • the method provided by the embodiment of the present invention can effectively improve the utilization rate of the reconfigurable resources on the heterogeneous multi-core reconfigurable computing platform, thereby improving the overall performance of the computing platform.
  • FIG. 1 is a schematic flowchart of a method for task scheduling on a heterogeneous multi-core reconfigurable computing platform according to an embodiment of the present invention
  • FIG. 2 is another schematic flowchart of a method for task scheduling on a heterogeneous multi-core reconfigurable computing platform according to an embodiment of the present invention
  • FIG. 3 is still another schematic flowchart of a method for task scheduling on a heterogeneous multi-core reconfigurable computing platform according to an embodiment of the present invention
  • FIG. 4 is a schematic block diagram showing a system architecture involved in an embodiment of the present invention.
  • FIG. 5 is a schematic block diagram of an apparatus for scheduling tasks on a heterogeneous multi-core reconfigurable computing platform according to an embodiment of the present invention
  • FIG. 6 is a schematic diagram of a reconfigurable resource package according to an embodiment of the present invention.
  • FIG. 7 is a schematic block diagram of an apparatus for task scheduling on a heterogeneous multi-core reconfigurable computing platform according to an embodiment of the present invention.
  • FIG. 8 is another schematic block diagram of an apparatus for scheduling tasks on a heterogeneous multi-core reconfigurable computing platform according to an embodiment of the present invention.
  • FIG. 9 is still another schematic block diagram of an apparatus for task scheduling on a heterogeneous multi-core reconfigurable computing platform according to an embodiment of the present invention.
  • heterogeneous multi-core reconfigurable computing platform in the embodiment of the present invention refers to a general purpose processor (General Purpose Processor, referred to as "GPP"), such as a central processing unit (Central Processing Unit). "CPU”), and Field Programmable Gate Arrays (“FPGA”) computing systems, where FPGA Has reconfigurable hardware features.
  • GPP General Purpose Processor
  • CPU Central Processing Unit
  • FPGA Field Programmable Gate Arrays
  • the multi-core feature of the computing platform is embodied by integrating a plurality of computing modules on a single physical chip, including but not limited to multiple general-purpose processors, and multiple intellectual property rights (Intellectual Property, referred to as The "IP" core and a plurality of dedicated processors, etc., wherein the IP core refers to a logic circuit that performs a certain function in a physical chip, and generally belongs to the category of hardware.
  • IP Intellectual Property
  • the heterogeneous features of the computing platform are embodied in that the number of multiple computing modules integrated on the single physical chip is greater than one.
  • the reconfigurable feature of the computing platform is embodied by the dynamic change state of the functional unit of the computing module, for example, for the first IP core integrated on the physical chip to complete the first function, and replaced with the first IP core for completing the first
  • the second IP core of the second function is reconfigurable.
  • the reconfigurable resource refers to a reconfigurable hardware resource on the heterogeneous multi-core reconfigurable computing platform, specifically, an FPGA logical resource integrated on a physical chip, the FPGA Has reconfigurable hardware features.
  • the IP core refers to a hardware module built by a reconfigurable resource for performing a certain function, and specifically refers to a hardware module built by a basic gate circuit on an FPGA.
  • the task is executed in software mode, that is, the task is executed on the general-purpose processor GPP, that is, the task is presented in the form of software code, and the task can also be called a software task;
  • Performing in hardware means that the task is performed on an application specific integrated circuit (ie, the circuit module used to accomplish the task), and the task is presented in the form of a hardware circuit, which may also be referred to as a hardware task.
  • the task is executed in hardware, based on the reconfigurable resources, and is performed on the IP core capable of performing the task. It should be understood that to perform a target task in hardware, it is necessary to construct an IP core capable of accomplishing the target task based on the reconfigurable resource.
  • the reconfigurable resources of the heterogeneous multi-core reconfigurable computing platform may be divided into equal or no areas.
  • a number of reconfigurable resource bundles, etc., the layout of the reconfigurable resource bundle is fixed after each system startup, and changes are not allowed.
  • the IP cores that can be laid out on each reconfigurable resource bundle can be dynamically changed, that is, the functions that each reconfigurable resource bundle can perform are dynamically changed.
  • An IP core that can be configured with multiple different functions on one reconfigurable resource package, and one IP core can also be arranged on multiple reconfigurable resource packages, which will be further described below in conjunction with FIG. 6.
  • an IP core is a hardware function built on reconfigurable resources to perform a certain function. Module, therefore, the IP core can also be regarded as a form of reconfigurable resources, and the usage rate of the IP core also reflects the usage rate of the reconfigurable resource, wherein the usage rate of the IP core refers to the execution of the IP core. The frequency of the task.
  • the function of the hardware task in the embodiment of the present invention refers to the function requested by the hardware task or the function that can be performed by the hardware task, for example, the function may be a logical operation, a matrix operation, a video processing, or the like.
  • the hardware platform can determine the function of the hardware task by providing an interface for the user program to transmit hardware functions through the flag bit.
  • each task that can run on a reconfigurable logical resource typically has a corresponding software version.
  • the heterogeneous multi-core reconfigurable computing platform refers to a computer system based on modules such as a computing module, a storage module, an interconnect module, and related peripherals, but the invention is not limited thereto.
  • heterogeneous multi-core reconfigurable computing platform is referred to as a computing platform or system for ease of understanding and description.
  • FIG. 1 is a schematic flowchart of a method 100 for task scheduling on a heterogeneous multi-core reconfigurable computing platform according to an embodiment of the present invention.
  • the heterogeneous multi-core reconfigurable computing platform includes multiple reconfigurable resource packets.
  • the method 100 can be performed, for example, by a computing platform (eg, the computing platform can be a computer), as shown in FIG. 1, the method 100 includes:
  • S110 Determine, according to the heat of the target task to be executed and the usage rate of the reconfigurable resource of the heterogeneous multi-core reconfigurable computing platform, the execution manner of the target task, where the execution mode includes a hardware mode or a software mode, and the target task includes
  • the heterogeneous multi-core reconfigurable computing platform there is no corresponding target intellectual property IP core for performing the target task, and the heat of the target task is used to indicate the occupancy rate of the target task to the central processing unit CPU, and the reconfigurable The usage rate of the resource is used to indicate the usage of the reconfigurable resource;
  • the target task is a computing task to be executed at the current time, and the IP core capable of executing the target task is not laid out on the computing platform. It should be understood that, since the IP core capable of executing the target task is not laid out on the computing platform, before S110
  • the target task is implemented in software by the processor GPP (specifically, the central processing unit CPU in the embodiment of the present invention).
  • the heat of the target task characterizes the CPU's occupancy rate of the target task in the previous period, that is, the number of times executed in software.
  • the previous period mentioned here may be, for example, a time period from the time when the reconfigurable resource last occurred the IP core reconstruction to the current time.
  • the usage of reconfigurable resources of a heterogeneous multi-core reconfigurable computing platform specifically, for example, according to the use of all IP cores laid out on the computing platform (the IP cores of these layouts are not used to perform the current target task to be executed) Rate determining, wherein the usage rate of an IP core is used for characterization, and the IP core executes the i-th IP core from a time when the IP core reconfiguration of the reconfigurable resource last occurred to a time period between the current moments
  • the number of times corresponding to the task (the task corresponding to the function that the IP core can perform) will be described in detail below.
  • determining the execution manner of the target task according to the heat of the target task and the usage rate of the reconfigurable resource of the heterogeneous multi-core reconfigurable computing platform that is, according to the execution condition of the task and the computing platform
  • the use of the reconfigurable resource dynamically determines the execution mode of the task, and can realize the rational use of the reconfigurable resource.
  • the IP core is frequently reconstructed or some tasks are performed.
  • the method provided by the embodiments of the present invention can effectively improve the utilization of reconfigurable resources on the heterogeneous multi-core reconfigurable computing platform, thereby improving the overall performance of the computing platform.
  • the S110 determines the execution manner of the target task according to the heat of the target task and the usage rate of the reconfigurable resource of the heterogeneous multi-core reconfigurable computing platform, including:
  • the length of time required for the mode to be executed, S is the hardware acceleration ratio of the target task, and the hardware acceleration ratio S is used to indicate that the target task performs the corresponding execution speed in hardware and the corresponding execution of the target task in software mode. The ratio between speeds;
  • the time when the reconfigurable resource was last reconstructed refers to the moment when the IP core reconstruction occurred last time before the current time, for example, the reconfigurable resource of the heterogeneous multi-core reconfigurable computing platform before the current time t2.
  • the time t1 at which the IP core reconstruction occurred last time that is, in the time period T L from t1 to t2, no reconstruction occurs in the IP core laid out on the computing platform.
  • the heat C of the target task characterizes the CPU usage of the target task over the length of time T L . It should be understood that the greater the heat C of the target task, the more times the target task is executed on the computing platform.
  • the heat C of the target task can also be referred to as the priority of the target task.
  • the execution speed of the target task is R1 in hardware
  • the execution speed of the target task is R2 in software
  • the hardware acceleration ratio S of the target task is R1/R2.
  • the first time and the time required to accomplish the target task in software can be The ratio of the second time required to complete the target task in the hardware mode is estimated.
  • the hardware acceleration ratio S of the target task is estimated to be R1/R2, which is not limited in the embodiment of the present invention.
  • the value of the target IP core For example, the priority may be determined which task layout corresponding IP core heat weighted comparison task A and task B, C w weighting heat large tasks performed using IP core will have a temperature performance than the weighted smaller tasks C w.
  • T L is the length of time between the current time and the time when the reconfigurable resource was last reconstructed. The number of times the i-th IP core performs the corresponding task of the i-th IP core within the time length T L , The length of time required to perform the corresponding task for the i-th IP core;
  • the IP core for performing other computing tasks is laid out, and the usage rate is used for each IP core of the layout. Reflects the use of each IP core.
  • the average usage rate of all IP cores laid out on the platform can reflect the overall usage rate of the laid IP core as a whole, and indirectly reflect the usage rate of the reconfigurable resources of the heterogeneous multi-core reconfigurable computing platform.
  • the average value of the usage rates of all the IP cores laid out on the platform is determined as the usage rate E ave of the reconfigurable resources of the heterogeneous multi-core reconfigurable computing platform, which can represent the heavyweight on the computing platform.
  • the use of resources is determined as the usage rate E ave of the reconfigurable resources of the heterogeneous multi-core reconfigurable computing platform, which can represent the heavyweight on the computing platform.
  • the execution manner of the target task may be determined by comparing the weight between the weighted heat C w of the target task and the usage rate E ave of the reconfigurable resource.
  • S113 determines, according to the weighted heat C w of the target task and the usage rate E ave of the reconfigurable resource, the execution manner of the target task, including:
  • the reconstruction coefficient k of the heterogeneous multi-core reconfigurable computing platform reflects the reconstruction cost of the system.
  • the reconstruction coefficient k may be set according to a reconstruction speed of the reconfigurable resource of the computing platform and a size of the reconstructed IP core, where the size of the IP core refers to an occupation of the IP core. How much to rebuild resources.
  • the weighted heat C w of the target task can be regarded as the utilization rate of the reconfigurable resource if the target task executed in software mode is executed in multiple times in the time length T L .
  • the product of E ave and k characterizes the actual usage of the reconfigurable resource. Therefore, when C w is greater than or equal to the product of E ave and k, it indicates that the current time, the utilization of the reconfigurable resource is insufficient, that is, the utilization of the IP core laid out on the current computing platform is insufficient, therefore, There is a need to increase the utilization of reconfigurable resources.
  • the IP core needs to be reconstructed, for example, the IP core with the lowest utilization on the computing platform is reconstructed into a target IP core for performing the target task.
  • C w is less than the product of E ave and k
  • the utilization of the reconfigurable resource has been relatively sufficient, that is, the utilization of the IP core laid out on the current computing platform is relatively sufficient.
  • the execution mode is software, so that it continues to be executed based on the CPU.
  • the embodiment of the present invention according to the execution of the target task to be executed (heat And the use of the reconfigurable resources of the computing platform (usage rate) to determine the execution of the target task, thereby effectively improving the utilization of the reconfigurable resources and improving the performance of the system.
  • the heterogeneous multi-core reconfigurable computing platform includes a plurality of reconfigurable resource packets.
  • the execution mode of the target task is determined to be a hardware mode
  • the S120 is determined according to the determined execution manner. To perform this target task, including:
  • the reconfigurable resource 640 of the heterogeneous multi-core reconfigurable resource computing platform is managed in the manner of a reconfigurable resource packet 641.
  • the IP cores that can be laid out on each reconfigurable resource bundle can be dynamically changed, that is, the functions that each reconfigurable resource bundle can perform are dynamically changed.
  • the process of this change is mainly through the reorganization of reconfigurable logic units (such as lookup tables, etc.) to achieve functional replacement.
  • a many-to-many mapping relationship is satisfied between the reconfigurable resource bundle and the function.
  • a reconfigurable resource bundle can be laid out as an IP core with different functions. The same function can also be laid out on different reconfigurable resource bundles. This will be described in detail below with reference to FIG. 6.
  • the layout process of the target IP core is embodied as a process in which hardware logical resources (ie, reconfigurable resources) are organized into functional modules (capable of performing the target tasks).
  • the target task may also be referred to as a hardware task.
  • the hardware task (such as the target task) is performed by using the target IP core
  • the specific implementation process is that the heterogeneous multi-core reconfigurable computing platform controls the target IP core by providing hardware tasks.
  • the input is used to drive the hardware circuit to achieve the purpose of performing the hardware task and to generate an output.
  • the S121 reconstructs the at least one reconfigurable resource bundle of the plurality of reconfigurable resource bundles into a target IP core capable of performing the target task, including:
  • the target reconfigurable resource packet in the plurality of reconfigurable resource packets is reconstructed into the target IP core, where the target reconfiguration resource packet is the longest idle time among the plurality of reconfigurable resource packets Construct a resource package.
  • the reconfigurable logic resources are organized in a reconfigurable resource package, that is, all IP cores have a unified external interface, and all IP cores can be replaced with each other.
  • the IP core replacement strategy adopts the most recent unused replacement principle, and the time for each IP core to complete the execution is T1. The previous time is T2, and the idle time of the IP core is T2-T1. When an IP core replacement is to occur, the IP core with the longest idle time T2-T1 is selected for replacement.
  • the time for performing the reconstruction on the reconfigurable resource package K is T1
  • the current time is T2
  • the idle time of the reconfigurable resource package K is defined as T2-T1.
  • the method 100 further includes:
  • the heterogeneous multi-core reconfigurable computing platform does not lay out an IP core for executing the task to be executed, determine the task to be executed as the target task to be executed.
  • the system includes an IP core layout state information table, where the state information table records configuration information of the laid out IP core, and according to the configuration information, it can be determined whether the task to be executed has an IP core. If the configuration information of the IP core capable of performing the task is matched in the IP core layout state information table, the heterogeneous multi-core reconfigurable computing platform is considered to have an IP core for performing the task to be performed; if in the IP core If the layout state information table cannot match the configuration information of the IP core capable of performing the task, it is considered that the heterogeneous multi-core reconfigurable computing platform does not lay out an IP core for executing the task to be executed.
  • the task to be executed involved in S130 refers to the computing task to be executed at the current time.
  • the target task in the embodiment of the present invention may be the same task as the task to be executed, which is not limited by the embodiment of the present invention.
  • the method 100 further includes:
  • heterogeneous multi-core reconfigurable computing platform has an IP core for indicating the task to be executed, determine that the execution mode of the task to be executed is hardware execution.
  • FIG. 2 is another schematic flowchart of a method for task scheduling on a heterogeneous multi-core reconfigurable computing platform provided by an embodiment of the present invention.
  • the method may be performed, for example, by a computing platform (eg, the computing platform may be a computer), as shown in FIG. 2, in S21, the system is initialized, specifically, including a function library in the initialization system, the function library including a software function. It also includes a hardware function.
  • the system uses an IP core as an acceleration component and provides an interface for calling an IP core.
  • the software function and the hardware function are encapsulated into a library.
  • the system initialization information includes the following information: a set of IP cores that can be laid out in the system.
  • the task A to be executed is determined.
  • it is judged whether the heterogeneous multi-core reconfigurable computing platform has an IP core for performing the task A if it is laid out, it jumps to S24, and if it is not laid out, it jumps to S25.
  • S25 it is determined whether the weighted heat Cw of the task A is greater than or equal to the product of the reusable resource usage rate E ave and the reconstruction coefficient k. If yes, the process jumps to S26, and if not, the process jumps to S27.
  • the IP core corresponding to the task A is laid out, that is, the IP core capable of executing the task A is reconstructed according to the reconfigurable resource.
  • the execution mode of the task A is the hardware execution mode.
  • the execution mode of the task A is the software execution mode.
  • system involved in the embodiments of the present invention refers to a computing system corresponding to the heterogeneous multi-core reconfigurable computing platform.
  • S29 is further included to perform the task A in hardware, that is, the task A is executed using the IP core laid out for the task A in S26.
  • S28 is further included to perform the task A in software.
  • the specific execution method of task A can be performed according to the corresponding execution means. For example, if it is executed in hardware, the processor only needs to send the input data and the startup signal to the corresponding IP core through the interconnection module (that is, the IP core capable of executing task A), and the IP core automatically starts execution. After the execution ends, the IP core will return the result to the processor through the interconnect module.
  • the hardware version of the task A is created by calling the library function, and the hardware version data is sent to the IP core corresponding to the task A. After the corresponding IP core completes the task A, the result is returned in the form of an interrupt. .
  • the process of determining the execution mode of task A according to the historical execution situation (heat) of task A and the usage of reconfigurable resources shown in FIG. 2 may also be referred to as a task dynamic determination process, and the specific process may also be referred to as a task.
  • Dynamic binding can be understood as an execution unit that dynamically determines the task of completing a certain function during the running of the system.
  • the execution unit may be a general-purpose processor or an IP core.
  • the execution mode of the task A is software execution, that is, the execution unit that determines that the task A is completed is a general-purpose processor, and in S24.
  • the execution mode of the task A is hardware execution, that is, it is determined that the execution unit of the task A is an IP core.
  • target task in the embodiment of the present invention may specifically be task A in FIG. 2 .
  • the current state of the system is comprehensively considered, and the use of the resource can be reconstructed, and the execution of the target task can be solved.
  • the problem of unreasonable use of reconfigurable resources in technology enables Improve the overall performance of the system.
  • a heterogeneous multi-core reconfigurable computing platform generally adopts a window-based task migration method for reconstruction.
  • the window is defined as the time interval from one reconfiguration to the next reconfiguration.
  • the composition of a window includes three phases: hardware execution time (Hardware Execution) time, scheduling time, and reconfiguration time.
  • the scheduling time is hidden in the hardware execution time.
  • the size of the reconstruction window is fixed, and the size of the window may affect the performance of the system. For example, if the window is too large, the reconfigurable resource is idle for a long time, which may reduce resource utilization and system performance; If the window is too small, the system will be refactored too frequently, which will introduce additional refactoring overhead, which will reduce the performance of the system.
  • a user-specified interface is also provided, that is, for a computing task to be executed, whether the task is executed in software mode or hardware mode, and the user specifies the execution mode of the task.
  • the user specifies to perform the task in hardware. If the task already exists on the reconfigurable resource in the form of a hardware module, the task is executed after waiting for the hardware module to be idle. Otherwise, the task is reconstructed according to the reconfigurable resource in the system. The hardware module of the task. If there are not enough reconfigurable resources in the current system for refactoring, then refactoring is performed when there are enough reconfigurable resources.
  • the user specifies the execution mode of the task, lacks the utilization of the overall information of the system, and it is not easy to select the most suitable computing unit (ie, the execution mode) for each task, and the resource utilization rate of the system. low.
  • the refactoring timing is largely determined by the user. If the user-specified method is not appropriate, it will not only cause frequent reconfiguration of the system, but also cause some tasks to wait for a long time, which affects the efficiency of the system.
  • the execution manner of the target task is determined according to the execution condition of the target task to be executed and the usage of the reconfigurable resource of the heterogeneous multi-core reconfigurable computing platform, that is, the system dynamic determination method is adopted. It is more reasonable to determine the execution mode of the target task, thereby improving the utilization of the reconfigurable resources, thereby improving the overall system performance of the computing platform.
  • the execution manner of the target task may also be determined according to the user instruction, specifically, the user is provided with a related interface, and for the target task to be executed, the user may specify the target through the relevant code. Whether the task is executed in hardware or in software.
  • FIG. 3 shows task scheduling on a heterogeneous multi-core reconfigurable computing platform provided by an embodiment of the present invention.
  • Another schematic flow chart of the method may be performed, for example, by a computing platform (for example, the computing platform may be a computer).
  • the system is initialized, specifically similar to S21 in FIG. 2, and details are not described herein again.
  • S32 it is determined that the execution mode of the task A to be executed is performed. If it is determined that the software specified by the user is executed, the process jumps to S33. If the determined hardware specified by the user is executed, the process jumps to S34, and if it is determined by the system dynamic determination The manner of (as shown in FIG.
  • the task A when it is determined that the task A has a corresponding IP core, the task A is executed by the corresponding IP core.
  • the execution mode of the task A is determined by the method of system dynamic determination. The specific steps are as described in S23 to S29 shown in FIG. 2, and details are not described herein again.
  • the hardware version of the task A is created by calling the library function, and the hardware version data is sent to the IP core corresponding to the task A. After the corresponding IP core completes the task A, the result is returned in the form of an interrupt. .
  • target task in the embodiment of the present invention may specifically be task A in FIG. 3 .
  • one option is an execution mode specified by the user, and the user can autonomously select the hardware task or the software mode to execute the target task;
  • Another option is to dynamically determine the system according to the current state of the system. Specifically, it is based on the heat of the task and the usage rate of the reconfigurable resources to determine the execution mode of the target task, which can effectively improve the heterogeneity.
  • the utilization of reconfigurable resources of the multi-core reconfigurable computing platform can improve the performance of the computing platform.
  • the heterogeneous multi-core reconfigurable computing platform involved in the embodiments of the present invention is a heterogeneous, reconfigurable, computer processor (platform).
  • the processor refers to a processor that integrates a general purpose processor and an FPGA programmable logic array, where the FPGA has reconfigurable hardware features.
  • FIG. 4 shows a system architecture diagram according to an embodiment of the present invention. As shown in FIG. 4, the system architecture 400 includes a software operating system 410 and a hardware platform 420.
  • the operating system 410 can be divided into an application layer 411, a programming abstraction layer 412, and a middleware from top to bottom. Layer 413, hardware abstraction layer 414, and communication layer 415.
  • the application layer 411 first makes a call to the application by means of the package interface provided by the program abstraction layer 412.
  • the middleware layer 413 is responsible for work related to system virtualization, distribution, flexibility, and the like, covering various core functions in the operating system 410.
  • the operating system 410 can simultaneously handle hardware tasks and software tasks, and the hardware and software tasks are uniformly abstracted through the hardware abstraction layer, and interact with the hardware platform through the communication layer.
  • the hardware platform 420 includes an instruction set general-purpose processor GPP, a reconfiguration controller, a reconfigurable logic resource, an interconnect structure, and a memory component.
  • the interconnect structure connects the multi-core system and peripheral devices, such as a memory and a hard disk.
  • the application scenarios of the heterogeneous multi-core reconfigurable computing platform involved in the embodiments of the present invention include embedded devices, server devices, and the like.
  • FIG. 5 shows a schematic block diagram of an apparatus 500 for task scheduling on a heterogeneous multi-core reconfigurable computing platform, in accordance with an embodiment of the present invention.
  • the structure of the device 500 for hardware task scheduling on a heterogeneous multi-core reconfigurable computing platform is divided into two main parts: a hardware portion 600 and a software portion 700.
  • the hardware portion 600 includes portions of an on-chip multi-core system 610, a system bus 620, a reconstruction controller 630, and a reconfigurable resource 640. among them,
  • the on-chip multi-core system 610 is composed of an on-chip interconnect 611 and a multi-core central processing unit (CPU) 612, which is a carrier for software task execution.
  • CPU central processing unit
  • the system bus 620 is connected to a multi-core system and peripheral devices such as a memory, a hard disk, and the like.
  • the reconstruction controller 630 receives the reconstruction control signal 723 and the reconstructed data signal 724, and performs a reconstruction operation on the reconfigurable resource according to the reconstruction control signal 723 and the reconstructed data signal 724.
  • the reconstruction controller 630 is a device that is closely related to the reconfigurable platform.
  • the reconfigurable resource 640 is divided into different reconfigurable resource packages 641, and each reconfigurable resource packet 641 can be used as a standalone device.
  • the reconfigurable resource 640 is specifically an FPGA.
  • the reconfigurable resource 640 is managed in the form of a reconfigurable resource bundle.
  • the layout of the reconfigurable resource bundle is fixed after each system startup, and no change is allowed.
  • the IP cores that can be laid out on each reconfigurable resource bundle can be dynamically changed, that is, the functions that each reconfigurable resource bundle can perform are dynamically changed.
  • a many-to-many mapping relationship is satisfied between the reconfigurable resource bundle and the function.
  • a reconfigurable resource bundle can be laid out as an IP core with different functions. The same function can also be laid out on different reconfigurable resource bundles.
  • the software portion 700 includes a programming model 710 and a scheduling and resource management module 720. Its in,
  • Programming model 710 including programming interface 711 and system function library 712, provides programming interface 711 to the user and creates tasks through system function library 712.
  • the hardware function library 713 in the system function library 712 is unique to the reconfigurable platform, and the hardware function library 713 defines an interface that calls the reconfigurable resource package 641 on the reconfigurable resource 640.
  • the hardware function library 713 of the system only includes the function interface, and the mapping relationship between the reconfigurable resource package 641 and the function is completely transparent to the programmer, and the scheduling and resource management module 720 in the system is responsible for dynamic management at runtime.
  • the scheduling and resource management module 720 includes two sub-portions, a task scheduling module 721 and a resource management module 722.
  • the task scheduling module 721 is configured to determine the timing of the task execution and determine the execution unit of the task.
  • the resource management module 722 is configured to manage the reconfigurable resource 640 by using the reconstruction control signal 723 and the reconstructed data signal 724 according to the result of the task scheduling module 721.
  • the reconstruction control signal 723 refers to a trigger signal that controls the reconstruction state and the flow
  • the reconstructed data signal 724 is a signal that guides a specific function that the reconfigurable resource needs to be configured.
  • the configuration information of the IP cores that can be laid out on each reconfigurable resource package 641 in the reconfigurable resource 640 is stored in the IP core library 700, and its representation form is a netlist, a gate circuit, and the like.
  • the IP core library 700 provides configuration information needed to lay out the IP core to the reconstruction controller 630 based on the received reconstructed data signal 724.
  • the task scheduling module 721 is configured to:
  • the execution mode includes a hardware mode or a software mode, where the target task is The heterogeneous multi-core reconfigurable computing platform does not have a corresponding target intellectual property IP core for performing the target task, and the heat of the target task is used to indicate the occupancy rate of the target task to the central processing unit CPU, and the reconfigurable resource Usage is used to indicate the usage of the reconfigurable resource.
  • the task scheduling module 721 is specifically configured to:
  • T L is the length of time between the current time and the time when the reconfigurable resource was last reconstructed. The number of times the i-th IP core performs the corresponding task of the i-th IP core within the time length T L , The length of time required to perform the corresponding task for the i-th IP core;
  • the execution mode of the target task is determined according to the weighted heat C w of the target task and the usage rate E ave of the reconfigurable resource.
  • the task scheduling module 721 is specifically used. to:
  • Determining the execution manner of the target task according to the weighted heat C w of the target task and the usage rate E ave of the reconfigurable resource including:
  • the task scheduling module 721 is further configured to:
  • the task to be executed is determined as the target task to be executed.
  • the task scheduling module 721 is further configured to: when the heterogeneous multi-core reconfigurable computing platform has an IP core for indicating the task to be executed, determine the to-be-executed The execution of the task is hardware execution.
  • the resource management module 722 is configured to pass the result of the task scheduling module 721.
  • the reconstruction control signal 723 and the reconstructed data signal 724 are managed to the reconfigurable resource 640, specifically, the reconstruction control signal 723 and the reconstructed data signal 724 are sent to the reconstruction controller 630;
  • the reconstruction controller 630 is configured to perform a reconstruction operation on the reconfigurable resource 640 according to the received reconstruction control signal 723 and the reconstructed data signal 724.
  • the plurality of reconfigurable resources 640 may be Reconfiguring at least one reconfigurable resource bundle in the refactoring resource bundle 641 as the target IP core for performing the target task;
  • the multi-core central processing unit 612 (such as a microprocessor or a single-chip microcomputer) in the on-chip multi-core system 610 sends the target task related processing data to the target IP core, and the target IP core automatically starts to perform the target task (also referred to as hardware). task). After the target task is executed, the target IP core will return the processing result to the processor.
  • the target IP core automatically starts to perform the target task (also referred to as hardware). task).
  • the target IP core After the target task is executed, the target IP core will return the processing result to the processor.
  • the reconfiguration controller 630 is specifically configured to: reconstruct the target reconfigurable resource packet in the plurality of reconfigurable resource packets into the target IP core, where the target reconfiguration resource The packet is the reconfigurable resource package with the longest idle time among the plurality of reconfigurable resource packets.
  • the software portion 700 is configured to program a processor (for example, a CPU). With the corresponding processing functions, the software is used to achieve the target task.
  • a processor for example, a CPU
  • the reconfigurable resource 640 is managed in the manner of a reconfigurable resource bundle 641, the layout of the reconfigurable resource bundle 641 being fixed after each system startup, and no changes are allowed.
  • the IP cores that can be laid out on each reconfigurable resource package 641 can be dynamically changed, that is, the functions that each reconfigurable resource package 641 can perform are dynamically changed.
  • the process of this change is mainly through the reorganization of reconfigurable logic units (such as lookup tables, etc.) to achieve functional replacement.
  • the reconfigurable resource package 641 satisfies a many-to-many mapping relationship with the function.
  • a reconfigurable resource bundle 641 can be laid out as an IP core with different functions, and the same function can also be laid out on different reconfigurable resource bundles 641.
  • the reconfigurable resource package 641 shown in FIG. 5 can be laid out as an IP core with different functions, and the same function can also be laid out on different reconfigurable resource packages.
  • the reconfigurable resource of the computing platform is divided into three reconfigurable resource packages, numbered 0, 1, and 2, respectively.
  • the computing platform can perform four functions: function 1 (addition), function 2 (subtraction) Operation), function 3 (matrix operation), function 4 (video processing), the correspondence between the reconfigurable resource package and the function can be expressed as: 0 can correspond to function 1 and function 2, 1 can correspond to function 1 and function 3, 2 can correspond to function 1, function 3 and function 4.
  • the set of reconfigurable resource bundles in the system may be set to BbSet, and each element in the set represents the number BbNum of the reconfigurable resource bundle; the set function set is FunSet, and each element in the set represents The function number FunNum, there may be more than one IP core corresponding to each function in the system.
  • Defining the mapping relationship between BbSet and FunSet is f:BbSet ⁇ FunSet, then the mapping relationship f can be expressed as a set of two-group ⁇ BbNum, FunNum>, which actually represents the reconfigurable resource package and IP.
  • the correspondence between the cores defines the set as an IPSet. IPSet determines the design of the IP core library.
  • the set of configuration files in the IP core library is defined as ConfigSet.
  • Each element of the set is a configuration file FileNum.
  • the IPSet and ConfigSet satisfy the one-to-one mapping relationship, that is, each binary group ⁇ BbNum , FunNum> corresponds to a FileNum.
  • the invention is not limited to this.
  • the mapping relationship between the reconfigurable resource package and the function may be established; for example, in the process of initializing the computing platform system, establishing a mapping relationship between the reconfigurable resource package and the function
  • the embodiment of the invention is not limited.
  • a typical application scenario of the heterogeneous multi-core reconfigurable computing platform task scheduling method provided by the embodiment of the present invention is: in the initial operation of the system (embedded or server), the load/task in the system is allocated in general according to the user agreement or plan. Executed on the processor and FPGA accelerator. During the operation of the system, as the load/task changes, the system determines the cost and benefit of the task hardware execution based on the current hardware resources and task information, and whether the decision task is accelerated.
  • determining the execution manner of the target task according to the heat of the target task and the usage rate of the reconfigurable resource of the heterogeneous multi-core reconfigurable computing platform that is, by performing the execution of the target task.
  • the situation and the use of reconfigurable resources to determine the execution mode of the target task can realize the rational use of the reconfigurable resources, and the IP core is frequently reconstructed or some relative to the execution mode of the task specified by the user in the prior art.
  • the method provided by the embodiment of the present invention can effectively improve the utilization rate of the reconfigurable resources, thereby effectively improving the overall operating efficiency of the heterogeneous multi-core reconfigurable computing platform.
  • the execution of the software and hardware tasks is transparent to the user, and the user only needs to create the task according to the preset rule, and does not need to care about how the final task will be executed. Therefore, the heterogeneous multi-core of the embodiment of the present invention may be Reconstructing the task scheduling method on the computing platform improves the user experience and improves the utilization of computing resources of the heterogeneous multi-core reconfigurable computing platform.
  • FIG. 7 shows a schematic block diagram of an apparatus 800 for task scheduling on a heterogeneous multi-core reconfigurable computing platform, the apparatus 800 including:
  • the first determining module 810 is configured to determine, according to the heat of the target task to be executed and the usage rate of the reconfigurable resource of the heterogeneous multi-core reconfigurable computing platform, the execution manner of the target task, where the execution manner includes hardware mode or In the software mode, the target task has no corresponding target intellectual property IP core for performing the target task in the heterogeneous multi-core reconfigurable computing platform, and the heat of the target task is used to indicate that the target task is occupied by the CPU of the central processing unit. Rate, the usage rate of the reconfigurable resource is used to indicate the usage of the reconfigurable resource;
  • the executing module 820 is configured to execute the target task according to the execution manner determined by the first determining module.
  • determining the execution manner of the target task according to the heat of the target task and the usage rate of the reconfigurable resource of the heterogeneous multi-core reconfigurable computing platform that is, by performing the execution of the target task.
  • the situation and the use of reconfigurable resources to determine the execution mode of the target task can realize the rational use of the reconfigurable resources, and the IP core is frequently reconstructed or some relative to the execution mode of the task specified by the user in the prior art.
  • the method provided by the embodiment of the present invention can effectively improve the utilization rate of the reconfigurable resources, thereby effectively improving the overall operating efficiency of the heterogeneous multi-core reconfigurable computing platform.
  • the aspect of determining the execution manner of the target task according to the heat of the target task and the usage rate of the reconfigurable resource of the heterogeneous multi-core reconfigurable computing platform is specifically configured to:
  • T L is the length of time between the current time and the time when the reconfigurable resource was last reconstructed. The number of times the i-th IP core performs the corresponding task of the i-th IP core within the time length T L , The length of time required to perform the corresponding task for the i-th IP core;
  • the execution mode of the target task is determined according to the weighted heat C w of the target task and the usage rate E ave of the reconfigurable resource.
  • the first determining module 810 determines a manner in which the target task is executed according to the weighted heat C w of the target task and the usage rate E ave of the reconfigurable resource. Specifically used for:
  • the apparatus 800 further includes:
  • a second determining module 830 configured to determine a task to be executed
  • the third determining module 840 is configured to determine the task to be executed as the target task to be executed if the heterogeneous multi-core reconfigurable computing platform does not deploy an IP core for executing the task to be executed.
  • the heterogeneous multi-core reconfigurable computing platform includes multiple weights
  • the resource module is configured to perform the target task according to the determined execution manner
  • the execution module 820 is specifically configured to:
  • the target task is executed using the target IP core.
  • the at least one reconfigurable resource package of the plurality of reconfigurable resource packets is reconstructed into a target IP core capable of performing the target task, where the execution module 820 is specific Used for:
  • the apparatus 800 further includes:
  • the fourth determining module 850 is configured to determine, in the case that the heterogeneous multi-core reconfigurable computing platform has an IP core for indicating the task to be executed, performing an execution manner of the task to be executed as hardware execution.
  • determining the execution manner of the target task according to the heat of the target task and the usage rate of the reconfigurable resource of the heterogeneous multi-core reconfigurable computing platform that is, by performing the execution of the target task.
  • the situation and the use of reconfigurable resources to determine the execution mode of the target task can realize the rational use of the reconfigurable resources, and the IP core is frequently reconstructed or some relative to the execution mode of the task specified by the user in the prior art.
  • the method provided by the embodiment of the present invention can effectively improve the utilization rate of the reconfigurable resources, thereby effectively improving the overall operating efficiency of the heterogeneous multi-core reconfigurable computing platform.
  • the device 800 for task scheduling on the heterogeneous multi-core reconfigurable computing platform may correspond to the device 500 for task scheduling on the heterogeneous multi-core reconfigurable computing platform provided by the embodiment of the present invention, and the device 800
  • the above and other operations and/or functions of the respective modules in order to implement the respective processes of the respective methods in FIG. 1 to FIG. 3 are omitted for brevity.
  • the present embodiment provides a hardware structure of a device 900 for task scheduling on a heterogeneous multi-core reconfigurable computing platform.
  • the hardware structure of the device 900 may include:
  • Transceiver device software device and hardware device
  • the transceiver device is a hardware circuit for completing packet transmission and reception
  • a hardware device can also be called a "hardware processing module", or simpler, or simply “hardware”.
  • the hardware devices mainly include dedicated hardware circuits such as FPGAs and ASICs (which also cooperate with other supporting devices, such as memories) to implement certain specific functions of hardware circuits.
  • the processing speed is often much faster than that of general-purpose processors, but the functions are once Customization is difficult to change, so it is not flexible to implement and is usually used to handle some fixed functions.
  • the hardware device may also include an MCU (microprocessor, such as a single chip microcomputer) or a processor such as a CPU in practical applications, but the main function of these processors is not to complete the processing of big data, but mainly used for processing. Some control is performed.
  • the system that is paired with these devices is a hardware device.
  • Software devices mainly include general-purpose processors (such as CPU) and some supporting devices (such as memory, hard disk and other storage devices), which can be programmed to let the processor have the corresponding processing functions.
  • general-purpose processors such as CPU
  • some supporting devices such as memory, hard disk and other storage devices
  • the processed data can be sent through the transceiver device through the hardware device, or the processed data can be sent to the transceiver device through an interface connected to the transceiver device.
  • the software device is used to perform the system dynamic determination mentioned in the foregoing embodiment, that is, the software device is used to:
  • the execution mode includes a hardware mode or a software mode, where the target task is The heterogeneous multi-core reconfigurable computing platform does not have a corresponding target intellectual property IP core for performing the target task, and the heat of the target task is used to indicate the occupancy rate of the target task to the central processing unit CPU, and the reconfigurable resource Usage is used to indicate the usage of the reconfigurable resource.
  • the software device is specifically configured to:
  • T L is the length of time between the current time and the time when the reconfigurable resource was last reconstructed. The number of times the i-th IP core performs the corresponding task of the i-th IP core within the time length T L , The length of time required to perform the corresponding task for the i-th IP core;
  • the execution mode of the target task is determined according to the weighted heat C w of the target task and the usage rate E ave of the reconfigurable resource.
  • the software device in terms of determining a manner of execution of the target task according to the weighted heat C w of the target task and the usage rate E ave of the reconfigurable resource, is specifically configured to:
  • the heterogeneous multi-core reconfigurable computing platform includes a plurality of reconfigurable resource packages, and when determining that the execution mode of the target task is a hardware mode,
  • This software device is used to:
  • This hardware device is used to:
  • the target task is executed using the target IP core.
  • a processor for example, a microprocessor or a single chip microcomputer included in the hardware device transmits processed data, such as input data and an activation signal, to the target IP core through the transceiver, and the target IP core automatically starts executing the target.
  • Tasks also known as hardware tasks.
  • the target IP core will return the processing result to the processor through the transceiver.
  • the software device is configured to reconstruct at least one reconfigurable resource packet of the plurality of reconfigurable resource packets into the target IP core for performing the target task.
  • the software device is configured to reconstruct at least one reconfigurable resource packet of the plurality of reconfigurable resource packets into the target IP core for performing the target task.
  • the software device in a case where it is determined that the execution mode of the target task is a software mode, the software device is configured to:
  • the software device is further configured to:
  • the task to be executed is determined as the target task to be executed.
  • determining the execution manner of the target task according to the heat of the target task and the usage rate of the reconfigurable resource of the heterogeneous multi-core reconfigurable computing platform that is, by performing the execution of the target task.
  • the situation and the use of reconfigurable resources to determine the execution mode of the target task can realize the rational use of the reconfigurable resources, and the IP core is frequently reconstructed or some relative to the execution mode of the task specified by the user in the prior art.
  • the method provided by the embodiment of the present invention can effectively improve the utilization rate of the reconfigurable resources, thereby effectively improving the overall operating efficiency of the heterogeneous multi-core reconfigurable computing platform.
  • the apparatus 900 for task scheduling on the heterogeneous multi-core reconfigurable computing platform may correspond to the apparatus 500 for task scheduling on the heterogeneous multi-core reconfigurable computing platform provided by the embodiment of the present invention, and may also correspond to The apparatus 800 for task scheduling on a heterogeneous multi-core reconfigurable computing platform provided by an embodiment of the present invention, and the above and other operations and/or functions of respective devices in the apparatus 900 are respectively implemented to implement the respective methods in FIGS. 1 to 3. The corresponding process, for the sake of brevity, will not be described here.
  • the size of the sequence numbers of the above processes does not mean the order of execution, and the order of execution of each process should be determined by its function and internal logic, and should not be taken to the embodiments of the present invention.
  • the implementation process constitutes any limitation.
  • the disclosed systems, devices, and methods may be implemented in other manners.
  • the device embodiments described above are merely illustrative.
  • the division of the unit is only a logical function division.
  • there may be another division manner for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not executed.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be in an electrical, mechanical or other form.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
  • the functions may be stored in a computer readable storage medium if implemented in the form of a software functional unit and sold or used as a standalone product.
  • the technical solution of the present invention which is essential or contributes to the prior art, or a part of the technical solution, may be embodied in the form of a software product, which is stored in a storage medium, including
  • the instructions are used to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention.
  • the foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and the like. .

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Abstract

一种异构多核可重构计算平台上任务调度的方法和装置，该方法包括：根据待执行的目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式，该执行方式包括硬件方式或软件方式，该目标任务在该异构多核可重构计算平台没有对应的用于执行该目标任务的目标知识产权IP核，该目标任务的热度用于指示该目标任务对中央处理器CPU的占用率，该可重构资源的使用率用于指示该可重构资源的使用情况（S110）；根据确定的执行方式，执行该目标任务（S120）。根据任务的执行情况和可重构资源的使用情况动态确定任务的执行方式，能够有效提高计算平台的可重构资源的利用率，从而能够提高计算平台的整体性能。

Description

异构多核可重构计算平台上任务调度的方法和装置
本申请要求于2015年3月27日提交中国专利局、申请号为201510142346.X、发明名称为“异构多核可重构计算平台上任务调度的方法和装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及计算机领域，并且更具体地，涉及异构多核可重构计算平台上任务调度的方法和装置。
背景技术
计算任务现在具有两种表现形式：在通用处理器(General Purpose Processor，简称为“GPP”)上，任务通常以软件代码的形式呈现，称为软件任务；而在专用集成电路上，任务通常以专用的硬件电路的形式呈现，称为硬件任务。其中，软件任务的具有灵活性好、易于修改与调试的优点，其缺点是计算速度不理想；而硬件任务具有速度快的优点，其缺点是不够灵活，也不易于调试。异构多核可重构计算平台是权衡通用处理器与专用集成电路的有效手段，异构多核可重构计算平台既可以使用可重构逻辑器件来获得很高的加速比，又可以使用可重构技术或者添加通用处理器使得其具有很好的灵活性。此外，异构多核可重构计算平台能够克服专用集成电路因为前期设计制造的复杂过程而带来的高代价和不可重用等缺陷。
异构多核可重构计算平台中的可重构资源(即硬件逻辑资源)通常非常有限，需要对可重构资源进行重构，来实现任务的硬件执行。异构多核可重构计算平台上的硬件资源重构根据其重构特性可以分为静态重构和动态重构。静态重构是指系统的硬件逻辑资源静态重构，即在系统空闲期间通过各种方式进行在线编程，以对可重构硬件逻辑器件的逻辑功能进行配置。动态重构是指在系统实时运行期间对可重构逻辑器件的逻辑功能实时地进行动态配置，例如，能够只对系统内部需要修改的逻辑单元(即可重构资源)进行重新配置，而不影响没有被修改的逻辑单元的正常工作。相对于静态重构，动态重构缩短了重构的时间，一方面减少了系统的开销，另一方面提高了系统运行的效率。为了提高资源利用率，当前技术中，异构多核可重构计算平台一般采用动态重构。
目前，异构多核可重构计算平台一般采用基于窗口(Window)的任务迁移方法进行重构。其中，窗口定义为从一次重构到下一次重构之间的时间间隔，一个窗口的组成包含硬件执行(Hardware Execution)时间、调度(Scheduling)时间和重构(Reconfiguration)时间三个阶段，其中，调度时间被隐藏在硬件执行时间中。当前技术中，重建窗口的大小是固定的，则窗口的大小会对系统的性能产生影响，例如，窗口过大会导致可重构资源长时间处于空闲状态，会降低资源利用率和系统性能；而窗口过小会导致系统重构过于频繁，从而引入额外的重构开销，会降低系统的性能。
发明内容
本发明实施例提供一种异构多核可重构计算平台上任务调度的方法和装置，根据任务的执行情况和计算平台的可重构资源的使用情况，来确定任务的执行方式，能够有效提高异构多核可重构计算平台上可重构资源的利用率。
第一方面，提供了一种异构多核可重构计算平台上任务调度的方法，该方法包括：
根据待执行的目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式，该执行方式包括硬件方式或软件方式，该目标任务在该异构多核可重构计算平台没有对应的用于执行该目标任务的目标知识产权IP核，该目标任务的热度用于指示该目标任务对中央处理器CPU的占用率，该可重构资源的使用率用于指示该可重构资源的使用情况；
根据确定的执行方式，执行该目标任务。
结合第一方面，在第一方面的第一种可能的实现方式中，根据该目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式，包括：
根据该目标任务的热度，确定该目标任务的加权热度Cw，且Cw＝C·S，其中，C为该目标任务的热度，且C＝N1·T1/TL，TL为当前时刻与该可重构资源上次发生重构的时刻之间的时间长度，N1为该目标任务在TL内以软件方式执行的次数，T1为该目标任务单次以软件方式执行所需的时间长度，S为该目标任务的硬件加速比，该硬件加速比S用于指示该目标任务以硬件方式执 行所对应的执行速度与该目标任务以软件方式执行所对应的执行速度之间的比值；
根据如下公式确定该异构多核可重构计算平台的可重构资源的使用率Eave：
Figure PCTCN2015095249-appb-000001
Figure PCTCN2015095249-appb-000002
其中，M为该异构多核可重构计算平台上布局的IP核的数量，Ei为该异构多核可重构计算平台上布局的M个IP核中的第i个IP核的IP核使用率，TL为当前时刻与该可重构资源上次发生重构的时刻之间的时间长度，
Figure PCTCN2015095249-appb-000003
为该第i个IP核在该时间长度TL内执行该第i个IP核的对应任务的次数，
Figure PCTCN2015095249-appb-000004
为该第i个IP核执行一次该对应任务所需的时间长度；
根据该目标任务的加权热度Cw和该可重构资源的使用率Eave，确定该目标任务的执行方式。
结合第一方面的第一种可能的实现方式，在第一方面的第二种可能的实现方式中，根据该目标任务的加权热度Cw和该可重构资源的使用率Eave，确定该目标任务的执行方式，包括：
当确定该目标任务的加权热度Cw大于或等于Eave与k的乘积时，确定该目标任务的执行方式为硬件方式，k为该异构多核可重构计算平台的重构系数，用于指示该异构多核可重构计算平台的重构开销；
当确定该目标任务的加权热度Cw小于Eave与k的乘积时，确定该目标任务的执行方式为软件方式。
结合第一方面和第一方面的第一种和第二种可能的实现方式中的任何一种可能的实现方式，在第一方面的第三种可能的实现方式中，该方法还包括：
确定待执行的任务；
在该异构多核可重构计算平台未布局用于执行该待执行的任务的IP核 的情况下，将该待执行的任务确定为该待执行的目标任务。
结合第一方面或第一方面的第一种至第三种可能的实现方式中的任何一种可能的实现方式，在第一方面的第四种可能的实现方式中，该异构多核可重构计算平台包括多个可重构资源包，在确定该目标任务的执行方式为硬件方式的情况下，根据确定的执行方式，执行该目标任务，包括：
将该多个可重构资源包中的至少一个可重构资源包重构为用于执行该目标任务的该目标IP核；
利用该目标IP核，执行该目标任务。
结合第一方面的第四种可能的实现方式，在第一方面的第五种可能的实现方式中，将该多个可重构资源包中的至少一个可重构资源包重构为能够执行该目标任务的目标IP核，包括：
将该多个可重构资源包中的目标可重构资源包重构为该目标IP核，该目标重构资源包为该多个可重构资源包中空闲时间最长的可重构资源包。
结合第一方面的第三种可能的实现方式，在第一方面的第六种可能的实现方式中，该方法还包括：
在该异构多核可重构计算平台布局有用于指示该待执行的任务的IP核的情况下，确定该待执行的任务的执行方式为硬件执行。
第二方面提供了一种异构多核可重构计算平台上任务调度的装置，该装置包括：
第一确定模块，用于根据待执行的目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式，该执行方式包括硬件方式或软件方式，该目标任务在该异构多核可重构计算平台没有对应的用于执行该目标任务的目标知识产权IP核，该目标任务的热度用于指示该目标任务对中央处理器CPU的占用率，该可重构资源的使用率用于指示该可重构资源的使用情况；
执行模块，用于根据该第一确定模块确定的执行方式，执行该目标任务。
结合第二方面，在第二方面的第一种可能的实现方式中，在根据该目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式的方面，该第一确定模块具体用于：
根据该目标任务的热度，确定该目标任务的加权热度Cw，且Cw＝C·S，其中，C为该目标任务的热度，且C＝N1·T1/TL，TL为当前时刻与该可重构资 源上次发生重构的时刻之间的时间长度，N1为该目标任务在TL内以软件方式执行的次数，T1为该目标任务单次以软件方式执行所需的时间长度，S为该目标任务的硬件加速比，该硬件加速比S用于指示该目标任务以硬件方式执行所对应的执行速度与该目标任务以软件方式执行所对应的执行速度之间的比值；
根据如下公式确定该异构多核可重构计算平台的可重构资源的使用率Eave：
Figure PCTCN2015095249-appb-000005
Figure PCTCN2015095249-appb-000006
其中，M为该异构多核可重构计算平台上布局的IP核的数量，Ei为该异构多核可重构计算平台上布局的M个IP核中的第i个IP核的IP核使用率，TL为当前时刻与该可重构资源上次发生重构的时刻之间的时间长度，
Figure PCTCN2015095249-appb-000007
为该第i个IP核在该时间长度TL内执行该第i个IP核的对应任务的次数，
Figure PCTCN2015095249-appb-000008
为该第i个IP核执行一次该对应任务所需的时间长度；
根据该目标任务的加权热度Cw和该可重构资源的使用率Eave，确定该目标任务的执行方式。
结合第二方面的第一种可能的实现方式，在第二方面的第二种可能的实现方式中，在根据该目标任务的加权热度Cw和该可重构资源的使用率Eave，确定该目标任务的执行方式的方方面，该第一确定模块具体用于：
当确定该目标任务的加权热度Cw大于或等于Eave与k的乘积时，确定该目标任务的执行方式为硬件方式，k为该异构多核可重构计算平台的重构系数，用于指示该异构多核可重构计算平台的重构开销；
当确定该目标任务的加权热度Cw小于Eave与k的乘积时，确定该目标任务的执行方式为软件方式。
结合第二方面和第二方面的第一种和第二种可能的实现方式中的任何 一种可能的实现方式，在第二方面的第三种可能的实现方式中，该装置还包括：
第二确定模块，用于确定待执行的任务；
第三确定模块，用于在该异构多核可重构计算平台未布局用于执行该待执行的任务的IP核的情况下，将该待执行的任务确定为该待执行的目标任务。
结合第二方面或第二方面的第一种至第三种可能的实现方式中的任何一种可能的实现方式，在第二方面的第四种可能的实现方式中，该异构多核可重构计算平台包括多个可重构资源包，在根据确定的执行方式，执行该目标任务的方面，该执行模块具体用于：
在确定该目标任务的执行方式为硬件方式的情况下，将该多个可重构资源包中的至少一个可重构资源包重构为用于执行该目标任务的该目标IP核；
利用该目标IP核，执行该目标任务。
结合第二方面的第四种可能的实现方式，在第二方面的第五种可能的实现方式中，在将该多个可重构资源包中的至少一个可重构资源包重构为能够执行该目标任务的目标IP核的方面，该执行模块具体用于：
将该多个可重构资源包中的目标可重构资源包重构为该目标IP核，该目标重构资源包为该多个可重构资源包中空闲时间最长的可重构资源包。
结合第二方面的第三种可能的实现方式，在第二方面的第六种可能的实现方式中，该装置还包括：
第四确定模块，用于在该异构多核可重构计算平台布局有用于指示该待执行的任务的IP核的情况下，确定该待执行的任务的执行方式为硬件执行。
基于上述技术方案，在本发明实施例中，根据该目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式，通过根据任务的执行情况和计算平台的可重构资源的使用情况动态地确定任务的执行方式，能够实现可重构资源的合理利用，相对于现有技术中由用户指定任务的执行方式而导致IP核频繁重构或者某些任务长时间处于等待状态的问题，本发明实施例提供的方法，能够有效提高异构多核可重构计算平台上可重构资源的利用率，从而能够提高计算平台的整体性能。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1示出了本发明实施例提供的异构多核可重构计算平台上任务调度的方法的示意性流程图；
图2示出了本发明实施例提供的异构多核可重构计算平台上任务调度的方法的另一示意性流程图；
图3示出了本发明实施例提供的异构多核可重构计算平台上任务调度的方法的再一示意性流程图；
图4示出了本发明实施例涉及的系统架构的示意性框图；
图5示出了本发明实施例提供的异构多核可重构计算平台上任务调度的装置的示意性框图；
图6示出了本发明实施例涉及的可重构资源包的示意图；
图7示出了本发明实施例提供的异构多核可重构计算平台上任务调度的装置的示意性框图；
图8示出了本发明实施例提供的异构多核可重构计算平台上任务调度的装置的另一示意性框图；
图9示出了本发明实施例提供的异构多核可重构计算平台上任务调度的装置的再一示意性框图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
应理解，本发明实施例中的异构多核可重构计算平台指单个物理芯片中同时集成通用处理器(General Purpose Processor，简称为“GPP”)，比如中央处理器(Central Processing Unit，简称为“CPU”)，以及现场可编程门阵列(Field Programmable Gate Arrays，简称为“FPGA”)的计算系统，其中FPGA 具有可重构的硬件特性。具体而言，该计算平台的多核特征具体体现于，在单个物理芯片上集成有多个计算模块，该多个计算模块包括但不限于多个通用处理器、多个知识产权(Intellectual Property，简称为“IP”)核和多个专用处理器等，其中，IP核指的是在物理芯片中完成某种特定功能的逻辑电路，一般属于硬件的范畴。在此基础上，该计算平台的异构特征具体体现于，在该单个物理芯片上集成的多个计算模块的种类大于一种。该计算平台的可重构特征，具体体现于，计算模块的功能单元的动态变化状态，例如针对物理芯片上集成的用来完成第一功能的第一IP核，将其更换为用于完成第二功能的第二IP核，则为可重构。
在本发明实施例中，可重构资源指的是该异构多核可重构计算平台上的可重构的硬件资源，具体来说，指的是物理芯片上集成的FPGA逻辑资源，该FPGA具有可重构的硬件特性。
在本发明实施例中，该IP核指的是，通过可重构资源构建的用于完成某种功能的硬件模块，具体指的是，通过FPGA上的基本门电路搭建起来的硬件模块。
在该异构多核可重构计算平台上，任务以软件方式执行指的是，在通用处理器GPP上来执行任务，即任务以软件代代码的形式呈现，该任务也可称为软件任务；任务以硬件方式执行指的是，在专用集成电路(即用于完成该任务的电路模块)上执行任务，任务以硬件电路的形式呈现，该任务也可称之为硬件任务。换句话说，任务以硬件方式执行指的，基于可重构资源，在能够执行该任务的IP核上执行该任务。应理解，要以硬件方式执行目标任务，需要基于可重构资源构建能够完成该目标任务的IP核。
应理解，在本发明实施例中，该异构多核可重构计算平台的可重构资源(例如现场可编程门阵列，Field Programmable Gate Arrays，简称为“FPGA”)可以被分成面积相等或不等的多个可重构资源包，可重构资源包的布局在每次系统启动后是固定的，不允许进行更改。系统启动之后，每个可重构资源包上可以布局的IP核是可以动态变化的，即每个可重构资源包能够完成的功能是动态变化的。一个可重构资源包上可以布局多个不同功能的IP核，一个IP核也可以布局在多个可重构资源包上，下文将结合图6作进一步地说明。
还应理解，IP核是基于可重构资源构建的用于完成某种功能的硬件功能 模块，因此，该IP核也可看作是可重构资源的一种形式，该IP核的使用率也体现了可重构资源的使用率，其中IP核的使用率指的是IP核执行任务的频率。
应理解，在本发明实施例中硬件任务的功能是指该硬件任务请求的功能或者执行该硬件任务能够完成的功能，例如：该功能可以是逻辑运算、矩阵运算、视频处理等。硬件平台可以通过标记位对用户程序提供传输硬件功能的接口，以此来确定硬件任务的功能。在异构多核可重构计算平台上，每一个可以在可重构逻辑资源上运行的任务通常都有一个对应的软件版本。
可选地，该异构多核可重构计算平台，指的是基于计算模块、存储模块、互联模块以及相关外设等模块组成的计算机系统，但本发明并不限于此。
下文中为了便于理解和描述，将该异构多核可重构计算平台见简称为计算平台或者系统。
图1示出了本发明实施例提供的异构多核可重构计算平台上任务调度的方法100的示意性流程图，所述异构多核可重构计算平台包括多个可重构资源包，该方法100例如可以由计算平台(例如该计算平台可以是一台计算机)执行，如图1所示，该方法100包括：
S110，根据待执行的目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式，该执行方式包括硬件方式或软件方式，该目标任务在该异构多核可重构计算平台没有对应的用于执行该目标任务的目标知识产权IP核，该目标任务的热度用于指示该目标任务对中央处理器CPU的占用率，该可重构资源的使用率用于指示该可重构资源的使用情况；
具体地，该目标任务为当前时刻即将执行的计算任务，计算平台上未布局能够执行该目标任务的IP核，应理解，由于计算平台上未布局能够执行该目标任务的IP核，在S110之前，该目标任务是通过处理器GPP(本发明实施例中具体是中央处理器CPU)以软件方式执行的。
其中，该目标任务的热度表征了该目标任务在此前一段时间内对CPU的占有率，即以软件方式执行的次数。这里提到的此前一段时间例如可以是可重构资源上次发生IP核重构的时刻到当前时刻之间的时间段。异构多核可重构计算平台的可重构资源的使用率，具体地，例如根据计算平台上布局的所有IP核(这些布局的IP核不用于执行当前待执行的目标任务)的使用 率来确定，其中，一个IP核的使用率用于表征，从可重构资源上次发生IP核重构的时刻到当前时刻之间的时间段，该IP核执行该第i个IP核的对应任务(该IP核能够执行的功能所对应的任务)的次数，下文将进行详细说明。
S120，根据确定的执行方式，执行该目标任务。
在本发明实施例中，根据该目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式，即通过根据任务的执行情况和计算平台的可重构资源的使用情况动态地确定任务的执行方式，能够实现可重构资源的合理利用，相对于现有技术中由用户指定任务的执行方式而导致IP核频繁重构或者某些任务长时间处于等待状态的问题，本发明实施例提供的方法，能够有效提高异构多核可重构计算平台上可重构资源的利用率，从而能够提高计算平台的整体性能。
可选地，在本发明实施例中，S110根据该目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式，包括：
S111，根据该目标任务的热度，确定该目标任务的加权热度Cw，且Cw＝C·S，其中，C为该目标任务的热度，且C＝N1·T1/TL，TL为当前时刻与该可重构资源上次发生重构的时刻之间的时间长度，N1为该目标任务在TL内以软件方式执行的次数，T1为该目标任务单次以软件方式执行所需的时间长度，S为该目标任务的硬件加速比，该硬件加速比S用于指示该目标任务以硬件方式执行所对应的执行速度与该目标任务以软件方式执行所对应的执行速度之间的比值；
其中，该可重构资源上次发生重构的时刻指的是当前时刻之前最近一次发生IP核重构的时刻，例如在当前时刻t2之前该异构多核可重构计算平台的可重构资源最近一次发生IP核重构的时刻t1，即在t1到t2的时间段TL内，计算平台上布局的IP核没有发生重构。
该目标任务的热度C表征了该目标任务在时间长度TL内，对CPU的占用率。应理解，该目标任务的热度C的越大，表明该目标任务在计算平台上被执行的次数越多。该目标任务的热度C也可称之为目标任务的优先级。
假设该目标任务以硬件方式执行所对应的执行速度为R1，该目标任务以软件方式执行所对应的执行速度为R2，则该目标任务的硬件加速比S为R1/R2。应理解，可以根据以软件方式完成该目标任务所需的第一时间与以 硬件方式完成该目标任务所需的第二时间的比值，估算目标任务的硬件加速比S为R1/R2，本发明实施例对此不作限定。
该目标任务的加权热度Cw＝C·S，表征了该目标任务相对于其他功能的任务利用对应的IP核执行的优劣性，即指示了为该目标任务布局用于执行该目标任务的目标IP核的价值。例如，可以通过比较任务A和任务B的加权热度来决定优先为哪个任务布局对应的IP核，加权热度Cw较大的任务利用IP核执行会比加权热度Cw较小的任务有性能上的优势。
S112，根据如下公式确定该异构多核可重构计算平台的可重构资源的使用率Eave：
Figure PCTCN2015095249-appb-000009
Figure PCTCN2015095249-appb-000010
其中，M为该异构多核可重构计算平台上布局的IP核的数量，Ei为该异构多核可重构计算平台上布局的M个IP核中的第i个IP核的IP核使用率，TL为当前时刻与该可重构资源上次发生重构的时刻之间的时间长度，
Figure PCTCN2015095249-appb-000011
为该第i个IP核在该时间长度TL内执行该第i个IP核的对应任务的次数，
Figure PCTCN2015095249-appb-000012
为该第i个IP核执行一次该对应任务所需的时间长度；
应理解，计算平台上虽然没有布局用于执行目标任务的目标IP核，但是布局了用于执行其他计算任务的IP核，对于布局的每个IP核，其使用率
Figure PCTCN2015095249-appb-000013
反映了该每个IP核的使用情况。平台上布局的所有IP核的使用率的平均值能够整体上反映布局的IP核的总体使用率，也间接地反映了该异构多核可重构计算平台的可重构资源的使用率。在本发明实施例中，将平台上布局的所有IP核的使用率的平均值确定为该异构多核可重构计算平台的可重构资源的使用率Eave，能够表征计算平台上可重构资源的使用情况。
S113，根据该目标任务的加权热度Cw和该可重构资源的使用率Eave，确定该目标任务的执行方式。
具体地，可以通过对比该目标任务的加权热度Cw和该可重构资源的使用率Eave之间的大小，来决定该目标任务的执行方式。
可选地，在本发明实施例中，S113根据该目标任务的加权热度Cw和该可重构资源的使用率Eave，确定该目标任务的执行方式，包括：
S113A，当确定该目标任务的加权热度Cw大于或等于Eave与k的乘积时，确定该目标任务的执行方式为硬件方式，k为该异构多核可重构计算平台的重构系数，用于指示该异构多核可重构计算平台的重构开销；
S113B，当确定该目标任务的加权热度Cw小于Eave与k的乘积时，确定该目标任务的执行方式为软件方式。
具体地，该异构多核可重构计算平台的重构系数k反应了系统的重构开销，k越大，系统允许的重构频率越低，k越小，系统允许的重构频率越高。可选地，该重构系数k可根据该计算平台的可重构资源的重构速度以及重构的IP核的大小来设定，该IP核的大小指的是该IP核所占用的可重构资源的多少。
应理解，目标任务的加权热度Cw可以看作为，在时间长度TL内，多次采用软件方式执行的该目标任务如果采用硬件方式执行，其对可重构资源的利用率。而Eave与k的乘积表征的是，该可重构资源实际的使用率。因此，当Cw大于或等于Eave与k的乘积时，则表明当前时刻，对该可重构资源的利用率不充分，即对当前计算平台上布局的IP核的利用不充分，因此，需要增强对可重构资源的利用率。从而需要重构IP核，例如将计算平台上利用率最低的IP核重构为用于执行目标任务的目标IP核。可以理解的是，当Cw小于Eave与k的乘积时，则表明当前时刻，对该可重构资源的利用已经相对充分，即对当前计算平台上布局的IP核的利用也相对充分，此时如果为该目标任务布局对应的目标IP核，反而会降低可重构资源的利用率，因此，当确定该目标任务的加权热度Cw小于Eave与k的乘积时，确定该目标任务的执行方式为软件方式，使其继续基于CPU执行。
综上所述，在本发明实施例中，根据待执行的目标任务的执行情况(热 度)和计算平台的可重构资源的使用情况(使用率)，来确定该目标任务的执行情况，进而可以有效提高可重构资源的利用率，并且提升系统的性能。
可选地，在本发明实施例中，该异构多核可重构计算平台包括多个可重构资源包，在确定该目标任务的执行方式为硬件方式的情况下，S120根据确定的执行方式，执行该目标任务，包括：
S121，将该多个可重构资源包中的至少一个可重构资源包重构为用于执行该目标任务的该目标IP核；
具体地，如图5所示，该异构多核可重构资源计算平台的可重构资源640以可重构资源包641的方式进行管理。系统启动之后，每个可重构资源包上可以布局的IP核是可以动态变化的，即每个可重构资源包能够完成的功能是动态变化的。该变化的过程主要通过可重构逻辑单元(如查找表等)的重新组织来实现功能的替换。可重构资源包与功能之间满足多对多的映射关系。一个可重构资源包可以布局为不同功能的IP核，同样的功能也可以在不同的可重构资源包上进行布局，下文将结合图6进行详细介绍。
具体地，该目标IP核的布局过程体现为硬件逻辑资源(即可重构资源)组织为功能模块(能够执行该目标任务)的过程。
S122，利用该目标IP核，执行该目标任务。
在确定该目标任务的执行方式为硬件执行的情况下，该目标任务也可称之为硬件任务。
应理解，在本发明实施例中，利用该目标IP核，执行硬件任务(如该目标任务)，具体实现过程是异构多核可重构计算平台控制该目标IP核，通过给其提供硬件任务的输入来驱动硬件电路，来达到执行该硬件任务的目的，并生成输出。
可选地，在本发明实施例中，S121将该多个可重构资源包中的至少一个可重构资源包重构为能够执行该目标任务的目标IP核，包括：
S121A，将该多个可重构资源包中的目标可重构资源包重构为该目标IP核，该目标重构资源包为该多个可重构资源包中空闲时间最长的可重构资源包。
对可重构逻辑资源采用可重构资源包的方式进行组织，即所有的IP核都有统一的对外接口，所有的IP核之间都可以互相替换。IP核替换策略采用最近最久未使用替换原则，设每个IP核上一次执行完成的时间为T1，当 前时间为T2，则IP核的空闲时间为T2-T1。当要发生IP核替换时，选择空闲时间T2-T1最长的IP核进行替换。
具体地，设可重构资源包K上一次执行重构的时间为T1，当前时间为T2，则该可重构资源包K的空闲时间定义为T2-T1。则在S131A中，选择空闲时间最长的可重构资源包进行目标IP核的重构。
可选地，在本发明实施例中，该方法100还包括：
S130，确定待执行的任务；
S140，在该异构多核可重构计算平台未布局用于执行该待执行的任务的IP核的情况下，将该待执行的任务确定为该待执行的目标任务。
具体地，例如，系统中包括一个IP核布局状态信息表，该状态信息表记录有布局的IP核的配置信息，根据该配置信息，可以确定该待执行的任务是否布局有IP核。如果在IP核布局状态信息表中匹配到能够执行该任务的IP核的配置信息，则认为该异构多核可重构计算平台布局有用于执行该待执行的任务的IP核；如果在IP核布局状态信息表中无法匹配到能够执行该任务的IP核的配置信息，则认为该异构多核可重构计算平台未布局用于执行该待执行的任务的IP核。
应理解，S130中涉及的待执行的任务指的是当前时刻即将执行的计算任务。本发明实施例中的目标任务可以与该待执行的任务可以是同一个任务，本发明实施例对此不作限定。
可选地，在本发明实施例中，该方法100还包括：
S150，在该异构多核可重构计算平台布局有用于指示该待执行的任务的IP核的情况下，确定该待执行的任务的执行方式为硬件执行。
具体地，如图2所示，图2示出了本发明实施例提供的异构多核可重构计算平台上任务调度的方法的另一示意性流程图。该方法例如可以由计算平台(例如该计算平台可以是一台计算机)执行，如图2所示，在S21中，系统初始化，具体地，包括初始化系统中的函数库，该函数库包括软件函数，也包括硬件函数，该系统以IP核为加速部件，并提供调用IP核的接口，将软件函数和硬件函数封装为库，系统初始化的信息中包括以下信息：系统中可以布局的IP核集合、每种IP核的执行时间、每种任务的硬件加速比。在S22中，确定当前待执行的任务A。在S23中，判断该异构多核可重构计算平台是否布局有用于执行该任务A的IP核，如果布局了，则跳到S24，如 果未布局，则跳到S25。在S25中，判断该任务A的加权热度Cw是否大于或者等于可重构资源的使用率Eave与重构系数k的乘积，如果是，则跳到S26，如果否，则跳到S27。在S26中，为该任务A布局对应的IP核，即根据可重构资源重构能够执行该任务A的IP核。在S24中，确定该任务A的执行方式为硬件执行方式。在S27中，确定该任务A的执行方式为软件执行方式。
应理解，本发明实施例涉及的系统指的是该异构多核可重构计算平台所对应的计算系统。
还应理解，在图2所示的流程图中，在S24之后，还包括S29以硬件方式执行该任务A，即利用S26中为任务A布局的IP核执行该任务A。在S27之后，还包括S28以软件方式执行该任务A。任务A的具体执行方法，可以根据对应的执行手段进行。例如如果是以硬件方式执行，处理器只需要将输入数据与启动信号通过互联模块发送给对应的IP核(即能够执行任务A的IP核)，IP核会自动开始执行。在执行结束后，IP核会将结果通过互联模块返回到处理器。
在S29中，具体地，通过调用库函数创建任务A的硬件版本，并将硬件版本数据发送到该任务A对应的IP核，该对应的IP核完成任务A后，以中断的形式将结果返回。
在S23中，如果确定该异构多核可重构计算平台布局了该任务A的IP核，则跳到S4中，确定以硬件方式来执行该任务A，应理解，这是由于IP核的执行速度远大于通用处理器的计算速度。
图2所示的根据任务A的历史执行情况(热度)以及可重构资源的使用情况来确定任务A的执行方式的过程也可称之为任务动态判定过程，具体过程也可称之为任务动态绑定。具体地，任务动态绑定可以理解为在系统运行的过程中动态决定完成某一功能的任务的执行单元。该执行单元可以是通用处理器，也可以是IP核，例如图2中，在S27中确定任务A的执行方式为软件执行，即确定完成该任务A的执行单元为通用处理器，在S24中确定该任务A的执行方式为硬件执行，即确定完成该任务A的执行单元为IP核。
应理解，本发明实施例中的目标任务具体地，可以为图2中的任务A。
综上所述，在本发明实施例中，在确定目标任务的执行方式的过程中，综合考虑了系统当前状态，即可重构资源的使用情况，以及目标任务的执行情况，能够解决现有技术中存在的可重构资源利用不合理的问题，从而能够 提高系统的整体性能。
当前技术中，异构多核可重构计算平台一般采用基于窗口(Window)的任务迁移方法进行重构。其中，窗口定义为从一次重构到下一次重构之间的时间间隔，一个窗口的组成包含硬件执行(Hardware Execution)时间、调度(Scheduling)时间和重构(Reconfiguration)时间三个阶段，其中，调度时间被隐藏在硬件执行时间中。当前技术中，重建窗口的大小是固定的，则窗口的大小会对系统的性能产生影响，例如，窗口过大会导致可重构资源长时间处于空闲状态，会降低资源利用率和系统性能；而窗口过小会导致系统重构过于频繁，从而引入额外的重构开销，会降低系统的性能。
此外，在现有技术中，也会提供用户指定接口，即对于一个将要执行的计算任务，该任务具体是以软件方式执行还是硬件方式执行，是由用户指定该任务的执行方式。假设用户指定以硬件方式执行任务，如果该任务已经以硬件模块的形式存在于可重构资源上，则等待该硬件模块空闲后执行该任务，否则，根据系统中的可重构资源重构该任务的硬件模块。如果当前系统中没有足够的可重构资源进行重构，则等待有了足够的可重构资源时才进行重构。由此可知，在现有技术中，由用户来指定任务的执行方式，缺少对系统整体信息的利用，不容易为每一个任务选择最合适的计算单元(即执行方式)，系统的资源利用率低。重构时机的很大程度上是由用户决定的，如果用户指定的方式不恰当，不仅会导致系统频繁重构，而且会导致某些任务长时间处于等待状态，影响了系统的效率。
而在本发明实施例中，是根据待执行的目标任务的执行情况和异构多核可重构计算平台的可重构资源的使用情况确定目标任务的执行方式，即采用系统动态判定的方式来较为合理的确定目标任务的执行方式，从而能够提高可重构资源的利用率，进而能够提高计算平台的整体系统性能。
上文结合图1和图2，描述了本发明实施例提供的根据目标任务的执行情况和异构多核可重构计算平台的可重构资源的使用情况来确定目标任务的执行方式的方案。
可选地，在本发明实施例中，也可以根据用户指令来确定目标任务的执行方式，具体地，为用户提供相关的接口，对于待执行的目标任务，用户可以通过相关代码指定，该目标任务以硬件方式执行还是软件方式执行。
图3示出了本发明实施例提供的异构多核可重构计算平台上任务调度的 方法的另一示意性流程图。该方法例如可以由计算平台(例如该计算平台可以是一台计算机)执行，如图3所示，在S31中，系统初始化，具体地与图2中的S21类似，不再赘述。在S32中，判断将要执行的任务A的执行方式，如果确定是用户指定的软件执行，则跳到S33中，如果确定的用户指定的硬件执行，则跳到S34中，如果确定由系统动态判定(如图2所示的方法)的方式确定任务A的执行方式，则跳到S37中。在S33中，在用户指定任务A的执行方式为软件执行的情况下，调用库函数，创建任务A的软件版本，以软件方式执行该任务A。在S34中，判断该计算平台是否布局用于执行该任务A的IP核，如果布局了，跳到S35中，如果没有布局，则跳到步骤S36中。在S36中，为该任务A布局对应的IP核，具体地，将该异构多核可重建计算平台上的多个可重构资源包中的至少一个可重构资源包重构为能够执行该任务A的IP核。在S35中，在确定该任务A布局了对应的IP核的情况下，利用该对应的IP核执行该任务A。在S37中，利用系统动态判定的方式判断任务A的执行方式，具体步骤如图2所示的S23至S29的描述，这里不再赘述。
在S35中，具体地，通过调用库函数创建任务A的硬件版本，并将硬件版本数据发送到该任务A对应的IP核，该对应的IP核完成任务A后，以中断的形式将结果返回。
应理解，本发明实施例中的目标任务具体地，可以为图3中的任务A。
在本发明实施例中，在确定目标任务的执行方式的过程中，相当于提供了两个选项：一个选项是由用户指定执行方式，用户可以自主地选择采用硬件方式或者软件方式执行目标任务；另一个选项是系统动态判定，根据系统当前的状态来判断执行方式，具体来说，是根据任务的热度和可重构资源的使用率，来确定目标任务的执行方式，能够有效提高该异构多核可重构计算平台的可重构资源的利用率，从而能够提高该计算平台的性能。
本发明实施例涉及的异构多核可重构计算平台为一种异构的、可重构的、计算机处理器(平台)。该处理器泛指集成通用处理器和FPGA可编程逻辑阵列的处理器，其中FPGA具有可重构的硬件特性。图4示出了本发明实施例涉及的系统架构图，如图4所示，系统架构400包括软件操作系统410和硬件平台420部分。
操作系统410自顶向下可以分为应用层411，编程抽象层412，中间件 层413，硬件抽象层414，以及通信层415。首先应用层411借助于编程抽象层412提供的封装接口来进行应用程序的调用。中间件层413负责与系统虚拟化、分布式、灵活性等方面相关的工作，涵盖了操作系统410中的各个核心功能。操作系统410能够同时负责处理硬件任务，以及软件任务，软硬件任务通过硬件抽象层进行统一抽象，并通过通信层与硬件平台进行交互。
硬件平台420包括指令集通用处理器GPP，重构控制器，可重构逻辑资源，互联结构和内存等部件，其中，互联结构连接了多核系统和外围设备，如内存、硬盘等。
本发明实施例涉及的异构多核可重构计算平台的应用场景包括嵌入式设备、服务器设备等。
图5示出了根据本发明实施例提供的异构多核可重构计算平台上任务调度的装置500的示意性框图。如图5所示，异构多核可重构计算平台上的硬件任务调度的装置500的结构分为两个主要部分：硬件部分600和软件部分700。硬件部分600包括片上多核系统610、系统总线620、重构控制器630和可重构资源640等部分。其中，
片上多核系统610，由片上互联611和多核中央处理器(Central Processing Unit，简称为“CPU”)612组成，该片上多核系统610是软件任务执行的载体。
系统总线620，连接了多核系统和外围设备，如内存、硬盘等。
重构控制器630，接收重构控制信号723和重构数据信号724，并根据该重构控制信号723和重构数据信号724对可重构资源进行重构操作。该重构控制器630为与可重构平台紧密相关的设备。
可重构资源640，被划分为不同的可重构资源包641，每个可重构资源包641都可以作为一个独立的设备使用。该可重构资源640具体为FPGA。
可重构资源640以可重构资源包的方式进行管理，可重构资源包的布局在每次系统启动后是固定的，不允许进行更改。系统启动之后，每个可重构资源包上可以布局的IP核是可以动态变化的，即每个可重构资源包能够完成的功能是动态变化的。可重构资源包与功能之间满足多对多的映射关系。一个可重构资源包可以布局为不同功能的IP核，同样的功能也可以在不同的可重构资源包上进行布局。
软件部分700包括编程模型710和调度及资源管理模块720两部分。其 中，
编程模型710，包括编程接口711和系统函数库712，对用户提供编程接口711，并通过系统函数库712创建任务。
系统函数库712中的硬件函数库713是可重构平台所特有的，硬件函数库713定义了调用可重构资源640上可重构资源包641的接口。系统的硬件函数库713中只包含功能接口，可重构资源包641与功能之间的映射关系对程序员完全透明，由系统中的调度及资源管理模块720负责运行时动态管理。
调度及资源管理模块720，包含任务调度模块721和资源管理模块722两个子部分。
任务调度模块721，用于决定任务执行的时机，并确定任务的执行单元。
资源管理模块722，用于根据任务调度模块721的结果通过重构控制信号723和重构数据信号724对可重构资源640进行管理。其中，重构控制信号723是指控制重构状态和流程的触发信号，重构数据信号724为指导可重构资源需要配置的具体功能的信号。
可重构资源640中每个可重构资源包641上可以布局的IP核的配置信息都保存在IP核库700中，其表现形式为网表、门电路等。IP核库700根据接收到的重构数据信号724，向重构控制器630提供布局IP核所需要的配置信息。
在本发明实施例中，任务调度模块721用于，
根据待执行的目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式，该执行方式包括硬件方式或软件方式，该目标任务在该异构多核可重构计算平台没有对应的用于执行该目标任务的目标知识产权IP核，该目标任务的热度用于指示该目标任务对中央处理器CPU的占用率，该可重构资源的使用率用于指示该可重构资源的使用情况。
可选地，在本发明实施例中，该任务调度模块721具体用于：
根据该目标任务的热度，确定该目标任务的加权热度Cw，且Cw＝C·S，其中，C为该目标任务的热度，且C＝N1·T1/TL，TL为当前时刻与该可重构资源上次发生重构的时刻之间的时间长度，N1为该目标任务在TL内以软件方式执行的次数，T1为该目标任务单次以软件方式执行所需的时间长度，S为该目标任务的硬件加速比，该硬件加速比S用于指示该目标任务以硬件方式执 行所对应的执行速度与该目标任务以软件方式执行所对应的执行速度之间的比值；
根据如下公式确定该异构多核可重构计算平台的可重构资源的使用率Eave：
Figure PCTCN2015095249-appb-000014
Figure PCTCN2015095249-appb-000015
其中，M为该异构多核可重构计算平台上布局的IP核的数量，Ei为该异构多核可重构计算平台上布局的M个IP核中的第i个IP核的IP核使用率，TL为当前时刻与该可重构资源上次发生重构的时刻之间的时间长度，
Figure PCTCN2015095249-appb-000016
为该第i个IP核在该时间长度TL内执行该第i个IP核的对应任务的次数，
Figure PCTCN2015095249-appb-000017
为该第i个IP核执行一次该对应任务所需的时间长度；
根据该目标任务的加权热度Cw和该可重构资源的使用率Eave，确定该目标任务的执行方式。
可选地，在本发明实施例中，在根据该目标任务的加权热度Cw和该可重构资源的使用率Eave，确定该目标任务的执行方式的方面，该任务调度模块721具体用于：
该根据该目标任务的加权热度Cw和该可重构资源的使用率Eave，确定该目标任务的执行方式，包括：
当确定该目标任务的加权热度Cw大于或等于Eave与k的乘积时，确定该目标任务的执行方式为硬件方式，k为该异构多核可重构计算平台的重构系数，用于指示该异构多核可重构计算平台的重构开销；
当确定该目标任务的加权热度Cw小于Eave与k的乘积时，确定该目标任务的执行方式为软件方式。
可选地，在本发明实施例中，该任务调度模块721还用于：
确定待执行的任务；
在该异构多核可重构计算平台未布局用于执行该待执行的任务的IP核的情况下，将该待执行的任务确定为该待执行的目标任务。
可选地，在本发明实施例中，任务调度模块721还用于，在该异构多核可重构计算平台布局有用于指示该待执行的任务的IP核的情况下，确定该待执行的任务的执行方式为硬件执行。
可选地，在本发明实施例中，在该任务调度模块721的确定结果为该目标任务的执行方式为硬件执行的情况下，该资源管理模块722用于，根据任务调度模块721的结果通过重构控制信号723和重构数据信号724对可重构资源640进行管理，具体地，将该重构控制信号723和重构数据信号724发送给重构控制器630；
重构控制器630用于，根据接收到的该重构控制信号723和重构数据信号724对可重构资源640进行重构操作，具体地，将可重构资源640中的该多个可重构资源包641中的至少一个可重构资源包重构为用于执行该目标任务的该目标IP核；
片上多核系统610中的多核中央处理器612(例如微处理器或单片机等)将目标任务相关处理数据，发送给目标IP核，该目标IP核会自动开始执行目标任务(也可称之为硬件任务)。在目标任务执行结束后，目标IP核会将处理结果返回到处理器。
可选地，在本发明实施例中，重构控制器630具体用于，将该多个可重构资源包中的目标可重构资源包重构为该目标IP核，该目标重构资源包为该多个可重构资源包中空闲时间最长的可重构资源包。
可选地，在本发明实施例中，在该任务调度模块721的确定结果为该目标任务的执行方式为软件执行的情况下，软件部分700用于，通过编程来让处理器(例如CPU)具备相应的处理功能，用软件来实现该目标任务。
可重构资源640以可重构资源包641的方式进行管理，可重构资源包641的布局在每次系统启动后是固定的，不允许进行更改。系统启动之后，每个可重构资源包641上可以布局的IP核是可以动态变化的，即每个可重构资源包641能够完成的功能是动态变化的。该变化的过程主要通过可重构逻辑单元(如查找表等)的重新组织来实现功能的替换。可重构资源包641与功能之间满足多对多的映射关系。一个可重构资源包641可以布局为不同功能的IP核，同样的功能也可以在不同的可重构资源包641上进行布局。
具体地，如图6所示，图5中所示的可重构资源包641可以布局为不同功能的IP核，同样的功能也可以在不同的可重构资源包上进行布局。例如，假设该计算平台的可重构资源被分成三个可重构资源包，编号分别为0、1、2，该计算平台可以执行四种功能：功能1(加法运算)、功能2(减法运算)、功能3(矩阵运算)、功能4(视频处理)，则可重构资源包和功能之间的对应关系可以体现为：0可以对应功能1和功能2，1可以对应功能1和功能3，2可以对应功能1、功能3和功能4。具体而言，可以设定系统中的可重构资源包的集合为BbSet，集合中的每一个元素表示可重构资源包的编号BbNum；设定功能集合为FunSet，集合中的每一个元素表示功能的编号FunNum，系统中与每一种功能对应的IP核的数量可以有多个。定义BbSet与FunSet之间的映射关系为f：BbSet→FunSet，则映射关系f可以表示为二元组<BbNum，FunNum>的集合，该二元组实际上也表示了可重构资源包与IP核之间的对应关系，定义该集合为IPSet。IPSet决定了IP核库的设计，定义IP核库中的配置文件集合为ConfigSet，集合的每一个元素为一个配置文件FileNum，则IPSet与ConfigSet满足一一映射关系，即每一个二元组<BbNum，FunNum>与一个FileNum对应。但本发明并不限于此。
可选地，可以在进行任务调度前，建立以上可重构资源包与功能之间的映射关系；例如在计算平台系统初始化的过程中，建立以上可重构资源包与功能之间的映射关系，本发明实施例不做限定。
本发明实施例提供的异构多核可重构计算平台任务调度的方法的典型应用场景有：在系统(嵌入式or服务器)运行初期，系统中的负载/任务按照用户约定或规划被分配在通用处理器和FPGA加速器上执行。系统运行过程中，随着负载/任务的变化，系统根据当前硬件资源及任务信息，判定任务硬件执行的代价和收益，决策任务是否加速执行。
因此，在本发明实施例中，根据该目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式，即通过权衡该目标任务的执行情况和可重构资源的使用情况，来确定目标任务的执行方式，能够实现可重构资源的合理利用，相对于现有技术中由用户指定任务的执行方式而导致IP核频繁重构或者某些任务长时间处于等待状态的问题，本发明实施例提供的方法，能够有效提高可重构资源的利用率，从而能够有效提高异构多核可重构计算平台的整体运行效率。
在本发明实施例中，软硬件任务的执行对用户透明化，用户只需要按照预设规则来创建任务，而不需要关心最终任务将被如何执行，因此，本发明实施例的异构多核可重构计算平台上任务调度的方法，在改善用户体验的同时，也提高了异构多核可重构计算平台计算资源的利用率。
图7示出了根据本发明实施例的异构多核可重构计算平台上任务调度的装置800的示意性框图，该装置800包括：
第一确定模块810，用于根据待执行的目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式，该执行方式包括硬件方式或软件方式，该目标任务在该异构多核可重构计算平台没有对应的用于执行该目标任务的目标知识产权IP核，该目标任务的热度用于指示该目标任务对中央处理器CPU的占用率，该可重构资源的使用率用于指示该可重构资源的使用情况；
执行模块820，用于根据该第一确定模块确定的执行方式，执行该目标任务。
因此，在本发明实施例中，根据该目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式，即通过权衡该目标任务的执行情况和可重构资源的使用情况，来确定目标任务的执行方式，能够实现可重构资源的合理利用，相对于现有技术中由用户指定任务的执行方式而导致IP核频繁重构或者某些任务长时间处于等待状态的问题，本发明实施例提供的方法，能够有效提高可重构资源的利用率，从而能够有效提高异构多核可重构计算平台的整体运行效率。
可选地，在本发明实施例中，在根据该目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式的方面，该第一确定模块810具体用于：
根据该目标任务的热度，确定该目标任务的加权热度Cw，且Cw＝C·S，其中，C为该目标任务的热度，且C＝N1·T1/TL，TL为当前时刻与该可重构资源上次发生重构的时刻之间的时间长度，N1为该目标任务在TL内以软件方式执行的次数，T1为该目标任务单次以软件方式执行所需的时间长度，S为该目标任务的硬件加速比，该硬件加速比S用于指示该目标任务以硬件方式执行所对应的执行速度与该目标任务以软件方式执行所对应的执行速度之间的比值；
根据如下公式确定该异构多核可重构计算平台的可重构资源的使用率Eave：
Figure PCTCN2015095249-appb-000018
Figure PCTCN2015095249-appb-000019
其中，M为该异构多核可重构计算平台上布局的IP核的数量，Ei为该异构多核可重构计算平台上布局的M个IP核中的第i个IP核的IP核使用率，TL为当前时刻与该可重构资源上次发生重构的时刻之间的时间长度，
Figure PCTCN2015095249-appb-000020
为该第i个IP核在该时间长度TL内执行该第i个IP核的对应任务的次数，
Figure PCTCN2015095249-appb-000021
为该第i个IP核执行一次该对应任务所需的时间长度；
根据该目标任务的加权热度Cw和该可重构资源的使用率Eave，确定该目标任务的执行方式。
可选地，在本发明实施例中，在根据该目标任务的加权热度Cw和该可重构资源的使用率Eave，确定该目标任务的执行方式的方方面，该第一确定模块810具体用于：
当确定该目标任务的加权热度Cw大于或等于Eave与k的乘积时，确定该目标任务的执行方式为硬件方式，k为该异构多核可重构计算平台的重构系数，用于指示该异构多核可重构计算平台的重构开销；
当确定该目标任务的加权热度Cw小于Eave与k的乘积时，确定该目标任务的执行方式为软件方式。
可选地，在本发明实施例中，如图8所示，该装置800还包括：
第二确定模块830，用于确定待执行的任务；
第三确定模块840，用于在该异构多核可重构计算平台未布局用于执行该待执行的任务的IP核的情况下，将该待执行的任务确定为该待执行的目标任务。
可选地，在本发明实施例中，该异构多核可重构计算平台包括多个可重 构资源包，在根据该确定的执行方式，执行该目标任务的方面，该执行模块820具体用于：
在确定该目标任务的执行方式为硬件方式的情况下，将该多个可重构资源包中的至少一个可重构资源包重构为用于执行该目标任务的该目标IP核；
利用该目标IP核，执行该目标任务。
可选地，在本发明实施例中，在将该多个可重构资源包中的至少一个可重构资源包重构为能够执行该目标任务的目标IP核的方面，该执行模块820具体用于：
将该多个可重构资源包中的目标可重构资源包重构为该目标IP核，该目标重构资源包为该多个可重构资源包中空闲时间最长的可重构资源包。
可选地，在本发明实施例中，该装置800还包括：
第四确定模块850，用于在该异构多核可重构计算平台布局有用于指示该待执行的任务的IP核的情况下，确定该待执行的任务的执行方式为硬件执行。
因此，在本发明实施例中，根据该目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式，即通过权衡该目标任务的执行情况和可重构资源的使用情况，来确定目标任务的执行方式，能够实现可重构资源的合理利用，相对于现有技术中由用户指定任务的执行方式而导致IP核频繁重构或者某些任务长时间处于等待状态的问题，本发明实施例提供的方法，能够有效提高可重构资源的利用率，从而能够有效提高异构多核可重构计算平台的整体运行效率。
应理解，根据本发明实施例的异构多核可重构计算平台上任务调度的装置800可对应于本发明实施例提供的异构多核可重构计算平台上任务调度的装置500，并且装置800中的各个模块的上述和其它操作和/或功能分别为了实现图1至图3中的各个方法的相应流程，为了简洁，在此不再赘述。
基于上述各实施例，本实施例提供了一种异构多核可重构计算平台上任务调度的装置900的硬件结构，参见图9，该装置900的硬件结构可以包括：
收发器件、软件器件以及硬件器件两部分；
收发器件为用于完成包收发的硬件电路；
硬件器件也可称“硬件处理模块”，或者更简单的，也可简称为“硬件”， 硬件器件主要包括基于FPGA、ASIC之类专用硬件电路(也会配合其他配套器件，如存储器)来实现某些特定功能的硬件电路，其处理速度相比通用处理器往往要快很多，但功能一经定制，便很难更改，因此，实现起来并不灵活，通常用来处理一些固定的功能。需要说明的是，硬件器件在实际应用中，也可以包括MCU(微处理器，如单片机)、或者CPU等处理器，但这些处理器的主要功能并不是完成大数据的处理，而主要用于进行一些控制，在这种应用场景下，由这些器件搭配的系统为硬件器件。
软件器件(或者也简单“软件”)主要包括通用的处理器(例如CPU)及其一些配套的器件(如内存、硬盘等存储设备)，可以通过编程来让处理器具备相应的处理功能，用软件来实现时，可以根据业务需求灵活配置，但往往速度相比硬件器件来说要慢。软件处理完后，可以通过硬件器件将处理完的数据通过收发器件进行发送，也可以通过一个与收发器件相连的接口向收发器件发送处理完的数据。
在本发明实施例中，软件器件用于进行上述实施例提到的系统动态判定，即该软件器件用于：
根据待执行的目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式，该执行方式包括硬件方式或软件方式，该目标任务在该异构多核可重构计算平台没有对应的用于执行该目标任务的目标知识产权IP核，该目标任务的热度用于指示该目标任务对中央处理器CPU的占用率，该可重构资源的使用率用于指示该可重构资源的使用情况。
可选地，在本发明实施例中，该软件器件具体用于：
根据该目标任务的热度，确定该目标任务的加权热度Cw，且Cw＝C·S，其中，C为该目标任务的热度，且C＝N1·T1/TL，TL为当前时刻与该可重构资源上次发生重构的时刻之间的时间长度，N1为该目标任务在TL内以软件方式执行的次数，T1为该目标任务单次以软件方式执行所需的时间长度，S为该目标任务的硬件加速比，该硬件加速比S用于指示该目标任务以硬件方式执行所对应的执行速度与该目标任务以软件方式执行所对应的执行速度之间的比值；
根据如下公式确定该异构多核可重构计算平台的可重构资源的使用率Eave：
Figure PCTCN2015095249-appb-000022
Figure PCTCN2015095249-appb-000023
其中，M为该异构多核可重构计算平台上布局的IP核的数量，Ei为该异构多核可重构计算平台上布局的M个IP核中的第i个IP核的IP核使用率，TL为当前时刻与该可重构资源上次发生重构的时刻之间的时间长度，
Figure PCTCN2015095249-appb-000024
为该第i个IP核在该时间长度TL内执行该第i个IP核的对应任务的次数，
Figure PCTCN2015095249-appb-000025
为该第i个IP核执行一次该对应任务所需的时间长度；
根据该目标任务的加权热度Cw和该可重构资源的使用率Eave，确定该目标任务的执行方式。
可选地，在本发明实施例中，在根据该目标任务的加权热度Cw和该可重构资源的使用率Eave，确定该目标任务的执行方式的方面，该软件器件具体用于：
当确定该目标任务的加权热度Cw大于或等于Eave与k的乘积时，确定该目标任务的执行方式为硬件方式，k为该异构多核可重构计算平台的重构系数，用于指示该异构多核可重构计算平台的重构开销；
当确定该目标任务的加权热度Cw小于Eave与k的乘积时，确定该目标任务的执行方式为软件方式。
可选地，在本发明实施例中，该异构多核可重构计算平台包括多个可重构资源包，在确定该目标任务的执行方式为硬件方式的情况下，
该软件器件用于：
将该多个可重构资源包中的至少一个可重构资源包重构为用于执行该目标任务的该目标IP核；
该硬件器件用于：
利用该目标IP核，执行该目标任务。
具体地，例如硬件器件中包括的处理器(例如微处理器或单片机等)将处理后的数据，例如输入数据与启动信号通过收发器发送给目标IP核，该目标IP核会自动开始执行目标任务(也可称之为硬件任务)。在目标任务执 行结束后，目标IP核会将处理结果通过收发器返回到处理器。
可选地，在本发明实施例中，在将该多个可重构资源包中的至少一个可重构资源包重构为用于执行该目标任务的该目标IP核的方面，该软件器件具体用于：
将该多个可重构资源包中的目标可重构资源包重构为该目标IP核，该目标重构资源包为该多个可重构资源包中空闲时间最长的可重构资源包。
可选地，在本发明实施例中，在确定该目标任务的执行方式为软件方式的情况下，该软件器件用于：
通过编程来让处理器(例如CPU)具备相应的处理功能，用软件来实现该目标任务。
可选地，在本发明实施例中，该软件器件还用于：
确定待执行的任务；
在该异构多核可重构计算平台未布局用于执行该待执行的任务的IP核的情况下，将该待执行的任务确定为该待执行的目标任务。
通过本实施例软硬结合的方法，既保证了处理的速度，又具有灵活性。
因此，在本发明实施例中，根据该目标任务的热度和该异构多核可重构计算平台的可重构资源的使用率，确定该目标任务的执行方式，即通过权衡该目标任务的执行情况和可重构资源的使用情况，来确定目标任务的执行方式，能够实现可重构资源的合理利用，相对于现有技术中由用户指定任务的执行方式而导致IP核频繁重构或者某些任务长时间处于等待状态的问题，本发明实施例提供的方法，能够有效提高可重构资源的利用率，从而能够有效提高异构多核可重构计算平台的整体运行效率。
应理解，根据本发明实施例的异构多核可重构计算平台上任务调度的装置900可对应于本发明实施例提供的异构多核可重构计算平台上任务调度的装置500，也可对应于本发明实施例提供的异构多核可重构计算平台上任务调度的装置800，并且装置900中的各个器件的上述和其它操作和/或功能分别为了实现图1至图3中的各个方法的相应流程，为了简洁，在此不再赘述。
应理解，在本发明的各种实施例中，上述各过程的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本发明实施例的实施过程构成任何限定。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各 示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本发明的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统、装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本发明各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本发明各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限 于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (21)

  1. 一种异构多核可重构计算平台上任务调度的方法，其特征在于，所述方法包括：
    根据待执行的目标任务的热度和所述异构多核可重构计算平台的可重构资源的使用率，确定所述目标任务的执行方式，所述执行方式包括硬件方式或软件方式，所述目标任务在所述异构多核可重构计算平台没有对应的用于执行所述目标任务的目标知识产权IP核，所述目标任务的热度用于指示所述目标任务对中央处理器CPU的占用率，所述可重构资源的使用率用于指示所述可重构资源的使用情况；
    根据确定的执行方式，执行所述目标任务。
  2. 根据权利要求1所述的方法，其特征在于，所述根据所述目标任务的热度和所述异构多核可重构计算平台的可重构资源的使用率，确定所述目标任务的执行方式，包括：
    根据所述目标任务的热度，确定所述目标任务的加权热度Cw，且Cw＝C·S，其中，C为所述目标任务的热度，且C＝N1·T1/TL，TL为当前时刻与所述可重构资源上次发生重构的时刻之间的时间长度，N1为所述目标任务在TL内以软件方式执行的次数，T1为所述目标任务单次以软件方式执行所需的时间长度，S为所述目标任务的硬件加速比，所述硬件加速比S用于指示所述目标任务以硬件方式执行所对应的执行速度与所述目标任务以软件方式执行所对应的执行速度之间的比值；
    根据如下公式确定所述异构多核可重构计算平台的可重构资源的使用率Eave：
    Figure PCTCN2015095249-appb-100001
    Figure PCTCN2015095249-appb-100002
    其中，M为所述异构多核可重构计算平台上布局的IP核的数量，Ei为所述异构多核可重构计算平台上布局的M个IP核中的第i个IP核的IP核使用率，TL为当前时刻与所述可重构资源上次发生重构的时刻之间的时间长度，
    Figure PCTCN2015095249-appb-100003
    为所述第i个IP核在所述时间长度TL内执行所述第i个IP核的对应 任务的次数，
    Figure PCTCN2015095249-appb-100004
    为所述第i个IP核执行一次所述对应任务所需的时间长度；
    根据所述目标任务的加权热度Cw和所述可重构资源的使用率Eave，确定所述目标任务的执行方式。
  3. 根据权利要求2所述的方法，其特征在于，所述根据所述目标任务的加权热度Cw和所述可重构资源的使用率Eave，确定所述目标任务的执行方式，包括：
    当确定所述目标任务的加权热度Cw大于或等于Eave与k的乘积时，确定所述目标任务的执行方式为硬件方式，k为所述异构多核可重构计算平台的重构系数，用于指示所述异构多核可重构计算平台的重构开销；
    当确定所述目标任务的加权热度Cw小于Eave与k的乘积时，确定所述目标任务的执行方式为软件方式。
  4. 根据权利要求1至3中任一项所述的方法，其特征在于，所述方法还包括：
    确定待执行的任务；
    在所述异构多核可重构计算平台未布局用于执行所述待执行的任务的IP核的情况下，将所述待执行的任务确定为所述待执行的目标任务。
  5. 根据权利要求1至4中任一项所述的方法，其特征在于，所述异构多核可重构计算平台包括多个可重构资源包，在确定所述目标任务的执行方式为硬件方式的情况下，所述根据所述确定的执行方式，执行所述目标任务，包括：
    将所述多个可重构资源包中的至少一个可重构资源包重构为用于执行所述目标任务的所述目标IP核；
    利用所述目标IP核，执行所述目标任务。
  6. 根据权利要求5所述的方法，其特征在于，所述将所述多个可重构资源包中的至少一个可重构资源包重构为能够执行所述目标任务的目标IP核，包括：
    将所述多个可重构资源包中的目标可重构资源包重构为所述目标IP核，所述目标重构资源包为所述多个可重构资源包中空闲时间最长的可重构资 源包。
  7. 根据权利要求4所述的方法，其特征在于，所述方法还包括：
    在所述异构多核可重构计算平台布局有用于指示所述待执行的任务的IP核的情况下，确定所述待执行的任务的执行方式为硬件执行。
  8. 一种异构多核可重构计算平台上任务调度的装置，其特征在于，所述装置包括：
    第一确定模块，用于根据待执行的目标任务的热度和所述异构多核可重构计算平台的可重构资源的使用率，确定所述目标任务的执行方式，所述执行方式包括硬件方式或软件方式，所述目标任务在所述异构多核可重构计算平台没有对应的用于执行所述目标任务的目标知识产权IP核，所述目标任务的热度用于指示所述目标任务对中央处理器CPU的占用率，所述可重构资源的使用率用于指示所述可重构资源的使用情况；
    执行模块，用于根据所述第一确定模块确定的执行方式，执行所述目标任务。
  9. 根据权利要求8所述的装置，其特征在于，在根据所述目标任务的热度和所述异构多核可重构计算平台的可重构资源的使用率，确定所述目标任务的执行方式的方面，所述第一确定模块具体用于：
    根据所述目标任务的热度，确定所述目标任务的加权热度Cw，且Cw＝C·S，其中，C为所述目标任务的热度，且C＝N1·T1/TL，TL为当前时刻与所述可重构资源上次发生重构的时刻之间的时间长度，N1为所述目标任务在TL内以软件方式执行的次数，T1为所述目标任务单次以软件方式执行所需的时间长度，S为所述目标任务的硬件加速比，所述硬件加速比S用于指示所述目标任务以硬件方式执行所对应的执行速度与所述目标任务以软件方式执行所对应的执行速度之间的比值；
    根据如下公式确定所述异构多核可重构计算平台的可重构资源的使用率Eave：
    Figure PCTCN2015095249-appb-100005
    Figure PCTCN2015095249-appb-100006
    其中，M为所述异构多核可重构计算平台上布局的IP核的数量，Ei为所述异构多核可重构计算平台上布局的M个IP核中的第i个IP核的IP核使用率，TL为当前时刻与所述可重构资源上次发生重构的时刻之间的时间长度，
    Figure PCTCN2015095249-appb-100007
    为所述第i个IP核在所述时间长度TL内执行所述第i个IP核的对应任务的次数，
    Figure PCTCN2015095249-appb-100008
    为所述第i个IP核执行一次所述对应任务所需的时间长度；
    根据所述目标任务的加权热度Cw和所述可重构资源的使用率Eave，确定所述目标任务的执行方式。
  10. 根据权利要求9所述的装置，其特征在于，在根据所述目标任务的加权热度Cw和所述可重构资源的使用率Eave，确定所述目标任务的执行方式的方方面，所述第一确定模块具体用于：
    当确定所述目标任务的加权热度Cw大于或等于Eave与k的乘积时，确定所述目标任务的执行方式为硬件方式，k为所述异构多核可重构计算平台的重构系数，用于指示所述异构多核可重构计算平台的重构开销；
    当确定所述目标任务的加权热度Cw小于Eave与k的乘积时，确定所述目标任务的执行方式为软件方式。
  11. 根据权利要求8至10中任一项所述的装置，其特征在于，所述装置还包括：
    第二确定模块，用于确定待执行的任务；
    第三确定模块，用于在所述异构多核可重构计算平台未布局用于执行所述待执行的任务的IP核的情况下，将所述待执行的任务确定为所述待执行的目标任务。
  12. 根据权利要求8至11中任一项所述的装置，其特征在于，所述异构多核可重构计算平台包括多个可重构资源包，在根据所述确定的执行方式，执行所述目标任务的方面，所述执行模块具体用于：
    在确定所述目标任务的执行方式为硬件方式的情况下，将所述多个可重构资源包中的至少一个可重构资源包重构为用于执行所述目标任务的所述目标IP核；
    利用所述目标IP核，执行所述目标任务。
  13. 根据权利要求12所述的装置，其特征在于，在将所述多个可重构资源包中的至少一个可重构资源包重构为能够执行所述目标任务的目标IP核的方面，所述执行模块具体用于：
    将所述多个可重构资源包中的目标可重构资源包重构为所述目标IP核，所述目标重构资源包为所述多个可重构资源包中空闲时间最长的可重构资源包。
  14. 根据权利要求11所述的装置，其特征在于，所述装置还包括：
    第四确定模块，用于在所述异构多核可重构计算平台布局有用于指示所述待执行的任务的IP核的情况下，确定所述待执行的任务的执行方式为硬件执行。
  15. 一种异构多核可重构计算平台上任务调度的装置，其特征在于，所述装置包括：
    处理器，用于执行存储器存储的指令；
    所述存储器，用于存储指令和数据，并向所述处理器提供所述指令和所述数据；
    通信总线，用于实现所述处理器和所述存储器之间的连接通信；
    其中，所述处理器具体用于：
    根据待执行的目标任务的热度和所述异构多核可重构计算平台的可重构资源的使用率，确定所述目标任务的执行方式，所述执行方式包括硬件方式或软件方式，所述目标任务在所述异构多核可重构计算平台没有对应的用于执行所述目标任务的目标知识产权IP核，所述目标任务的热度用于指示所述目标任务对中央处理器CPU的占用率，所述可重构资源的使用率用于指示所述可重构资源的使用情况；
    根据确定的执行方式，执行所述目标任务。
  16. 根据权利要求15所述的装置，其特征在于，所述处理器用于：
    根据所述目标任务的热度，确定所述目标任务的加权热度Cw，且Cw＝C·S，其中，C为所述目标任务的热度，且C＝N1·T1/TL，TL为当前时刻与所述可重构资源上次发生重构的时刻之间的时间长度，N1为所述目标任务在TL内以软件方式执行的次数，T1为所述目标任务单次以软件方式执行所需的时间长度，S为所述目标任务的硬件加速比，所述硬件加速比S用于指示 所述目标任务以硬件方式执行所对应的执行速度与所述目标任务以软件方式执行所对应的执行速度之间的比值；
    根据如下公式确定所述异构多核可重构计算平台的可重构资源的使用率Eave：
    Figure PCTCN2015095249-appb-100009
    Figure PCTCN2015095249-appb-100010
    其中，M为所述异构多核可重构计算平台上布局的IP核的数量，Ei为所述异构多核可重构计算平台上布局的M个IP核中的第i个IP核的IP核使用率，TL为当前时刻与所述可重构资源上次发生重构的时刻之间的时间长度，
    Figure PCTCN2015095249-appb-100011
    为所述第i个IP核在所述时间长度TL内执行所述第i个IP核的对应任务的次数，
    Figure PCTCN2015095249-appb-100012
    为所述第i个IP核执行一次所述对应任务所需的时间长度；
    根据所述目标任务的加权热度Cw和所述可重构资源的使用率Eave，确定所述目标任务的执行方式。
  17. 根据权利要求16所述的装置，其特征在于，所述处理器用于：
    当确定所述目标任务的加权热度Cw大于或等于Eave与k的乘积时，确定所述目标任务的执行方式为硬件方式，k为所述异构多核可重构计算平台的重构系数，用于指示所述异构多核可重构计算平台的重构开销；
    当确定所述目标任务的加权热度Cw小于Eave与k的乘积时，确定所述目标任务的执行方式为软件方式。
  18. 根据权利要求15至17中任一项所述的装置，其特征在于，所述处理器用于：
    确定待执行的任务；
    在所述异构多核可重构计算平台未布局用于执行所述待执行的任务的IP核的情况下，将所述待执行的任务确定为所述待执行的目标任务。
  19. 根据权利要求15至18中任一项所述的装置，其特征在于，所述处 理器用于：
    将所述多个可重构资源包中的至少一个可重构资源包重构为用于执行所述目标任务的所述目标IP核；
    利用所述目标IP核，执行所述目标任务。
  20. 根据权利要求19所述的装置，其特征在于，所述处理器用于：
    将所述多个可重构资源包中的目标可重构资源包重构为所述目标IP核，所述目标重构资源包为所述多个可重构资源包中空闲时间最长的可重构资源包。
  21. 根据权利要求18所述的装置，其特征在于，所述处理器用于：
    在所述异构多核可重构计算平台布局有用于指示所述待执行的任务的IP核的情况下，确定所述待执行的任务的执行方式为硬件执行。
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111176814A (zh) * 2019-12-29 2020-05-19 山东英信计算机技术有限公司 一种任务执行方法及相关装置
CN111190705A (zh) * 2019-12-31 2020-05-22 支付宝(杭州)信息技术有限公司 任务处理方法以及装置

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104778083B (zh) * 2015-03-27 2018-07-03 华为技术有限公司 异构多核可重构计算平台上任务调度的方法和装置
US9792154B2 (en) 2015-04-17 2017-10-17 Microsoft Technology Licensing, Llc Data processing system having a hardware acceleration plane and a software plane
US10198294B2 (en) * 2015-04-17 2019-02-05 Microsoft Licensing Technology, LLC Handling tenant requests in a system that uses hardware acceleration components
US10216555B2 (en) 2015-06-26 2019-02-26 Microsoft Technology Licensing, Llc Partially reconfiguring acceleration components
US9891935B2 (en) * 2015-08-13 2018-02-13 Altera Corporation Application-based dynamic heterogeneous many-core systems and methods
US10387198B2 (en) * 2016-08-11 2019-08-20 Rescale, Inc. Integrated multi-provider compute platform
CN106598761B (zh) * 2016-12-19 2020-07-14 北京奇虎科技有限公司 基于中间件的事务连接建立方法及装置
US10402527B2 (en) 2017-01-04 2019-09-03 Stmicroelectronics S.R.L. Reconfigurable interconnect
CN108269224B (zh) 2017-01-04 2022-04-01 意法半导体股份有限公司 可重新配置的互连
CN108363615B (zh) * 2017-09-18 2019-05-14 清华大学 用于可重构处理系统的任务分配方法和系统
CN108052839A (zh) * 2018-01-25 2018-05-18 知新思明科技（北京）有限公司 拟态任务处理机
US10901806B2 (en) * 2018-05-01 2021-01-26 International Business Machines Corporation Internet of things resource optimization
CN110968320A (zh) * 2018-09-30 2020-04-07 上海登临科技有限公司 针对异构硬件架构的联合编译方法和编译系统
CN111258744B (zh) * 2018-11-30 2024-08-06 中兴通讯股份有限公司 一种基于异构计算的任务处理方法及软硬件框架系统
CN109582465A (zh) * 2018-12-04 2019-04-05 中国航空工业集团公司西安航空计算技术研究所 一种多核操作系统核心配置方法
CN109862023B (zh) * 2019-02-27 2020-08-07 中国科学院软件研究所 一种嵌入式设备实现加速计算和高速网络数据传输方法
US11593609B2 (en) 2020-02-18 2023-02-28 Stmicroelectronics S.R.L. Vector quantization decoding hardware unit for real-time dynamic decompression for parameters of neural networks
US11531873B2 (en) 2020-06-23 2022-12-20 Stmicroelectronics S.R.L. Convolution acceleration with embedded vector decompression
CN112905317B (zh) * 2021-02-04 2023-12-15 西安电子科技大学 快速可重构信号处理异构平台下任务调度方法和系统
CN113051053B (zh) * 2021-03-24 2023-09-08 博瀚智能(深圳)有限公司 异构资源调度方法、装置、设备和计算机可读存储介质
CN113553031B (zh) * 2021-06-04 2023-02-24 中国人民解放军战略支援部队信息工程大学 软件定义变结构计算架构及利用其实现的左右脑一体化资源联合分配方法
CN114124389B (zh) * 2021-11-09 2023-08-11 国网山东省电力公司电力科学研究院 一种基于可重构计算的国密算法fpga部署方法及系统
WO2023232127A1 (zh) * 2022-06-02 2023-12-07 华为技术有限公司 任务调度方法、装置、系统及相关设备

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040054999A1 (en) * 2002-08-30 2004-03-18 Willen James W. Computer OS dispatcher operation with virtual switching queue and IP queues
CN101630305A (zh) * 2008-07-16 2010-01-20 中国人民解放军信息工程大学 高效能计算机中可重构部件的柔性管理方法
CN101833368A (zh) * 2010-04-13 2010-09-15 杭州电子科技大学 一种软硬件协调处理的局部动态可重构系统能量管理方法
CN102360309A (zh) * 2011-09-29 2012-02-22 中国科学技术大学苏州研究院 片上多核异构系统的调度系统与调度执行方法
CN102508712A (zh) * 2011-09-29 2012-06-20 中国科学技术大学苏州研究院 异构多核可重构混合系统中的中间件系统及任务执行方法
CN104778083A (zh) * 2015-03-27 2015-07-15 华为技术有限公司 异构多核可重构计算平台上任务调度的方法和装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6938256B2 (en) * 2000-01-18 2005-08-30 Galactic Computing Corporation System for balance distribution of requests across multiple servers using dynamic metrics
US8639489B2 (en) * 2003-11-10 2014-01-28 Brooks Automation, Inc. Methods and systems for controlling a semiconductor fabrication process
DE602004006955T2 (de) * 2003-11-25 2008-02-28 Interuniversitair Micro-Elektronica Centrum Heterogenes Mehrrechnersystem in Form eines Network on Chip, sowie Verfahren und Betriebssystem zur Kontrolle desselben
GB0519981D0 (en) * 2005-09-30 2005-11-09 Ignios Ltd Scheduling in a multicore architecture
US20080104601A1 (en) * 2006-10-26 2008-05-01 Nokia Corporation Scheduler for multiple software tasks to share reconfigurable hardware
CN101710292B (zh) 2009-12-21 2013-03-27 中国人民解放军信息工程大学 一种可重构任务处理系统、调度器及任务调度方法
CN101763265B (zh) * 2010-01-19 2012-10-03 湖南大学 一种过程级软硬件协同设计自动化开发方法
US8694994B1 (en) * 2011-09-07 2014-04-08 Amazon Technologies, Inc. Optimization of packet processing by delaying a processor from entering an idle state
CN102629218A (zh) 2012-03-14 2012-08-08 西安交通大学 一种基于任务长宽比的可重构硬件任务放置方法
CN102662765B (zh) * 2012-04-28 2014-09-03 中国科学技术大学 一种运行效率指导的可重构多核处理器的资源分配方法
CN102681901B (zh) 2012-05-08 2014-04-23 西安交通大学 一种分区域的可重构硬件任务放置方法
KR102082859B1 (ko) * 2013-01-07 2020-02-28 삼성전자주식회사 복수의 이종 코어들을 포함하는 시스템 온 칩 및 그 동작 방법

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040054999A1 (en) * 2002-08-30 2004-03-18 Willen James W. Computer OS dispatcher operation with virtual switching queue and IP queues
CN101630305A (zh) * 2008-07-16 2010-01-20 中国人民解放军信息工程大学 高效能计算机中可重构部件的柔性管理方法
CN101833368A (zh) * 2010-04-13 2010-09-15 杭州电子科技大学 一种软硬件协调处理的局部动态可重构系统能量管理方法
CN102360309A (zh) * 2011-09-29 2012-02-22 中国科学技术大学苏州研究院 片上多核异构系统的调度系统与调度执行方法
CN102508712A (zh) * 2011-09-29 2012-06-20 中国科学技术大学苏州研究院 异构多核可重构混合系统中的中间件系统及任务执行方法
CN104778083A (zh) * 2015-03-27 2015-07-15 华为技术有限公司 异构多核可重构计算平台上任务调度的方法和装置

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
See also references of EP3190515A4 *
WANG, CHAO: "Study on Reconfigurable Heterogenous Multi Processor System on Chip", ELECTRONIC TECHNOLOGY & INFORMATION SCIENCE , CHINA DOCTORAL DISSERTATIONS FULL-TEXT DATABASE, 15 September 2011 (2011-09-15), XP008185435, ISSN: 1674-022X *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111176814A (zh) * 2019-12-29 2020-05-19 山东英信计算机技术有限公司 一种任务执行方法及相关装置
CN111176814B (zh) * 2019-12-29 2022-06-17 山东英信计算机技术有限公司 一种任务执行方法及相关装置
CN111190705A (zh) * 2019-12-31 2020-05-22 支付宝(杭州)信息技术有限公司 任务处理方法以及装置
CN111190705B (zh) * 2019-12-31 2023-08-15 支付宝(杭州)信息技术有限公司 任务处理方法以及装置

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