WO2016153515A1

WO2016153515A1 - Resistance memory devices including cation metal doped volatile selectors

Info

Publication number: WO2016153515A1
Application number: PCT/US2015/022699
Authority: WO
Inventors: Jianhua Yang; Ning GE; Zhiyong Li; Katy SAMUELS
Original assignee: Hewlett-Packard Development Company, L.P.
Priority date: 2015-03-26
Filing date: 2015-03-26
Publication date: 2016-09-29

Abstract

A nonvolatile memory cell includes a volatile selector electrically coupled in series with a nonvolatile memory device. The nonvolatile memory device includes a switching oxide or switching nitride sandwiched between a first bottom electrode and a first top electrode. The volatile selector includes a selector insulator sandwiched between a second bottom electrode and a second top electrode. The selector insulator may be composed of a composite material of a dielectric and fast-diffusing cation metal particles. A memory array including a plurality of the nonvolatile memory cells is also disclosed.

Description

RESISTANCE MEMORY DEVICES INCLUDING CATION METAL DOPED

VOLATILE SELECTORS

BACKGROUND

[0001] Non-volatile memory is computer memory that can get back stored information even when not powered. Types of non-volatile memory may include resistive RAM (random access memory) (RRAM or ReRAM), phase change RAM (PCRAM), conductive bridge RAM (CBRAM), ferroelectric RAM (F-RAM), etc.

[0002] Resistance memory elements, such as resistive RAM, or ReRAM, can be programmed to different resistance states by applying programming energy. After programming, the state of the resistive memory elements can be read and remains stable over a specified time period. Large arrays of resistive memory elements can be used to create a variety of resistive memory devices, including non-volatile solid state memory, programmable logic, signal processing, control systems, pattern recognition devices, and other applications. Examples of resistive memory devices include valence change memory and electrochemical metallization memory, both of which involve ionic motion during electrical switching and belong to the category of memristors.

[0003] Memristors are devices that can be programmed to different resistive states by applying a programming energy, for example, a voltage or current pulse. This energy generates a combination of electric field and thermal effects that can modulate the conductivity of both non-volatile switch and non-linear select functions in a memristive element. After programming, the state of the memristor can be read and remains stable over a specified time period. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] FIGS. 1 A-1 B depict, in perspective, a memristor crossbar and a selector-memristor crossbar, respectively, according to an example.

[0005] FIG. 2 depicts a half V scheme with selector, according to an example.

[0006] FIG. 3 is a cross-sectional view, depicting a device structure for a selector, according to an example.

[0007] FIG. 4 is a cross-sectional view, depicting a stack that

incorporates the selector described herein in series with a memristor, according to an example.

[0008] FIG. 5 is an example flow chart for manufacturing a stack of a memristor and selector, according to an example.

[0009] FIG. 6, on coordinates of current (I) and voltage (V), is an l-V plot for two switches employing a silver co-sputtered selector, according to an example. FIG. 6A depicts the example selector structure used to generate the I- V curve depicted in FIG. 6.

[0010] FIGS. 7A-7B, on coordinates of current (I) and voltage (V), are l-V plots for a micrometer-sized selector, using doped spin-on-glass (SOG), according to an example.

DETAILED DESCRIPTION

[0011] It is appreciated that, in the following description, numerous specific details are set forth to provide a thorough understanding of the examples. However, it is appreciated that the examples may be practiced without limitation to these specific details. In other instances, well-known methods and structures may not be described in detail to avoid unnecessarily obscuring the description of the examples. Also, the examples may be used in combination with each other.

[0012] While a limited number of examples have been disclosed, it should be understood that there are numerous modifications and variations therefrom. Similar or equal elements in the Figures may be indicated using the same numeral.

[0013] It is be noted that, as used in this specification and the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise.

[0014] Memristors are nano-scale devices that may be used as a component in a wide range of electronic circuits, such as memories, switches, radio frequency circuits, and logic circuits and systems. In a memory structure, a crossbar array of memristor devices may be used. When used as a basis for memories, memristors may be used to store bits of information, 1 or 0. When used as a logic circuit, a memristor may be employed as configuration bits and switches in a logic circuit that resembles a Field Programmable Gate Array, or may be the basis for a wired-logic Programmable Logic Array. It is also possible to use memristors capable of multi-state or analog behavior for these and other applications. While specific examples to memristors are provided herein, it is appreciated that many other types of non-volatile memory may beneficially employ the teachings herein. Examples of such other types of non-volatile memory may include resistive RAM (random access memory) (RRAM or ReRAM), phase change RAM (PC RAM), conductive bridge RAM (CBRAM), ferroelectric RAM (F-RAM), etc.

[0015] The resistance of a memristor may be changed by applying a voltage across or a current through the memristor. Generally, at least one channel may be formed that is capable of being switched between two states— one in which the channel forms an electrically conductive path ("ON") and one in which the channel forms a less conductive path ("OFF"). In some cases, conducting channels may be formed by ions and/or vacancies. Some memristors exhibit bipolar switching, where applying a voltage of one polarity may switch the state of the memristor and where applying a voltage of the opposite polarity may switch back to the original state. Alternatively, memristors may exhibit unipolar switching, where switching is performed, for example, by applying different voltages of the same polarity.

[0016] Using memristors in crossbar arrays may lead to read and/or write failure due to sneak currents passing through the cells that are not selected, for example, cells on the same row or column as a targeted cell. Failure may arise when the total current from an applied voltage is higher than the current through the targeted memristor due to current sneaking through untargeted neighboring cells. As a result, effort has been spent on minimizing sneak currents. Using a transistor with each memristor has been proposed to isolate each cell and overcome the sneak current. However, using a transistor with each memristor in a crossbar array limits array density and increases cost, which may impact the commercialization of memristor devices.

[0017] When used as a switch, the memristor may either be in a low resistance (ON) state or high resistance (OFF) state in a crosspoint memory. During the last few years, researchers have made great progress in finding ways to make the switching function of these memristors behave efficiently. For example, tantalum oxide (TaOx)-based memristors have been demonstrated to have superior endurance over other nano-scale devices capable of electronic switching. In lab settings, tantalum oxide-based memristors are capable of over 10 billion switching cycles.

[0018] A memristor may use a switching material, such as TiO_x, HfO_x or TaOx, sandwiched between two electrodes. Memristive behavior is achieved by the movement of ionic species (e.g., oxygen ions or vacancies) within the switching material to create localized changes in conductivity via modulation of a conductive filament between two electrodes, which results in a low resistance "ON" state, a high resistance "OFF" state, or intermediate states. Initially, when the memristor is first fabricated, the entire switching material may be noncon- ductive. As such, a forming process may be required to form the conductive channel in the switching material between the two electrodes. A known forming process, often called "electroforming", includes applying a sufficiently high (threshold) voltage across the electrodes for a sufficient length of time to cause a nucleation and formation of a localized conductive channel (or active region) in the switching material. The threshold voltage and the length of time required for the forming process may depend upon the type of material used for the switching material, the first electrode, and the second electrode, and the device geometry.

[0019] Metal or semiconductor oxides may be employed in memristive devices; examples include either transition metal oxides, such as tantalum oxide, titanium oxide, yttrium oxide, hafnium oxide, niobium oxide, zirconium oxide, or other like oxides, or non-transition metal oxides, such as aluminum oxide, calcium oxide, magnesium oxide, dysprosium oxide, lanthanum oxide, silicon dioxide, or other like oxides. Further examples include transition metal nitrides, such as aluminum nitride, gallium nitride, tantalum nitride, and silicon nitride.

[0020] TaOx and HfO_x based memristors have demonstrated the most promising results. However, both of these oxide systems have a linear current- voltage relation in the ON state, which is not desired due to the sneak path current issue, described above. For applications in high density crossbar arrays, a nonlinear selector may be in series with each memristor to form a 1 S1 R (one selector - one resistor) structure. A bipolar nonlinear selector to suppress the sneak current in the crossbar array has been fabricated using a simple metal- oxide-metal structure realized by the Schottky emission over the metal/oxide barriers or other method. Many materials can be used for the oxide (e.g., V0₂, ΤΊΟ2, Nb0₂, etc.). The metal for the bottom electrode and the top electrode can be TiN, TaN, etc. For example, both TaN/Nb0₂/TaN and TaN/TaO/TaN have shown good performance. [0021] However, for practical applications, the selectors presently under development may not be able to meet the requirement for both high nonlinearity (>1000), low leakage current (less than 1 nA at below threshold voltage), and high current density requirement at above threshold voltage (on the order of 10⁶ A/cm²). As used herein, "high nonlinearity" is based on a comparison of the current density level at two different voltages, here, V and V/2. The ratio of the two current densities may be at least 10³ to be considered nonlinear. In some cases, the ratio may approach or even exceed 10⁶ for improved nonlinearity. Herein, a new type of selector is described, which can satisfy both requirements of high nonlinearity and be able to conduct current at a level of a few tens of μΑ for a nano device size such as 30nm x 30nm, or have a current density of at least 10⁶ A/cm². The new selector may enable the final production of memristors for large cross-bar applications.

[0022] In accordance with the teachings herein, a volatile, nonlinear selector may be made of a fast-diffusing cation metal particles (e.g., Ag, Cu, Au), which may be introduced to a dielectric (e.g., Si0₂, etc.). By "volatile", in reference to memory, is meant computer memory that requires power to maintain the stored information; it retains its contents while powered on but when the power is interrupted, the stored data is immediately lost or decay with time, which is characterized by relaxation time. For example, a volatile selector may have a relaxation time in the micro second or nano second range. By "fast- diffusing" is meant that the rate of diffusion should be faster than the rate of diffusion of oxygen vacancies in a memristor oxide (or nitrogen vacancies in a memristor nitride). The dielectric may be relatively porous and low density, compared to the oxide or nitride used in the memristor. For example, the dielectric may be microporous, which may have pore diameters of less than 2 nm, or mesoporous, which may have pore diameters between 2 nm and 50 nm.

[0023] In addition to the dielectric being Si0₂, the dielectric may include spin-on glass (SOG), hydrogen si!sesquioxane (HSQ), silicon carbide (SiC), silicon nitride (Si3N₄), silicon carbon nitride (SiC_xN_y), silicon oxynitride (SiO_xN_y), and silicon oxycarbide (SiO_xC_y), where x and y are both greater than 0. The metal particles may be in the form of metal atoms or in its oxide form as cations (e.g., for Ag, AgO_x can be used). Due to the high mobility of those metal/metal oxide species, unique switching properties can be found for this type of device. The selector may be configured in series with a nonvolatile element, such as a memristor. The term "in series" means that the components are electrically connected along a single path so that the same current flows through all of the components. While the components may be in series, they may or may not be in direct contact with one another, and the order of the components may vary.

[0024] In an example, the nonvolatile element may be linear, or, if nonlinear, then only slightly. The selector formed with the materials mentioned (fast- diffusing cation metal particles) evidences high nonlinearity and volatile characterizations. The terms "linear" and "non-linear" refer to the nature of the current-voltage (l-V) curve; that is, whether the curve is linear or non-linear, respectively. As used in the present specification and in the appended claims, the term "nonlinear" may refer to a property of the selector or memristor wherein a change in voltage applied across the selector or memristor results in a disproportionate change in current flowing through the selector or memristor, respectively.

[0025] The sneak-path issue is inherent for crossbar architectures, regardless of the memory element employed. FIG. 1A depicts a crossbar 100 containing a plurality of memory elements 102. Each memory element 102 may include a switching oxide sandwiched between a bottom electrode and a top electrode (not visible in FIG. 1 , but depicted in FIG. 4). Each memory element 102 is sandwiched between a bottom electrically conducting trace 106 and a top electrically conducting trace 108. The crossbar 100 is made of a lower layer 1 10 of electrically conducting traces formed by a plurality of bottom conducting traces 106 and an upper layer 1 12 of electrically conducting traces formed by a plurality of top conducting traces 108, with the memory element 102 at each crosspoint 1 14 formed by a bottom trace 106 and a top trace 108. The bottom conductive traces 106 may be referred to as row, or bit, lines, while the top conductive traces 108 may be referred to as column, or word, lines. However, it is immaterial whether the row (bit) lines are above or below the column (word) lines.

[0026] FIG. 1 A depicts the situation that while trying to read the high resistive element 102a, a current sneak path exists due to three low resistive elements 102b. The thin line 1 16 with arrow head shows the desired current path. The dashed line 1 18 with arrow head shows a sneak path current path.

[0027] The solution, illustrated in FIG. 1 B, may be to increase the nonlinearity or asymmetry of the l-V characteristic of the memristor elements 102, which may ensure that the memristor, or other nonlinear memory device, can be used in large crossbar arrays 150. Increasing the nonlinearity of the memristor cells 102 may result in reduction or even elimination of the sneak path current path 1 18. As noted above, a nonlinear, nonvolatile memristor cell 102' may include a selector 300 (discussed below in connection with FIG. 3) and a memristor element 102. The selector 300 may be nonlinear and volatile; the memristor 102 may be linear and nonvolatile. While these are the ideal states of the selector 300 and memristor 102, respectively, it is understood that there may be slight variations from the ideal state. In any event, the net intent is to provide a memory cell 102' that is both nonlinear and nonvolatile.

[0028] The selector 300 may be used to mitigate the sneak path current issue by suppressing the total current passing through the non-selected devices in the array at the given voltage. Nonlinearity may depend on the operating voltage range, which in turn depends on the materials used and structure of the device stack (memristor plus selector). For memristors having a certain operating voltage, there may be a need to tune the threshold of selector 300, such as by adjusting the species, film thickness, concentration, etc., as described in greater detail below.

[0029] The concept for a selector associated with the popular reading scheme is shown in FIG. 2. The selected high resistance cell is denoted 102'a and the cells having low resistance are denoted 102'b. The low resistance cells 102'b are in the same row or column as the selected cell 102'a. It is the low resistance cells 102'b that may support sneak path currents. V is the applied voltage, V/2 is half voltage, and G is ground.

[0030] The selector 300, shown in FIG. 3, may include a bottom electrode 302, a top electrode 304, and a selector insulator 306 disposed between the two electrodes. The selector insulator 306 may include nanoparticles 308 dispersed in a dielectric 310. The bottom electrode 302 and top electrode 304 may each include, but are not limited to, aluminum (Al), platinum (Pt), tungsten (W), gold (Au), titanium (Ti), ruthenium dioxide (Ru0₂), titanium nitride (TiN), tungsten nitride (WN₂), tantalum (Ta),hafnium nitride (HfN), niobium nitride (NbN), tantalum nitride (TaN), and the like. The bottom and top electrodes 302 and 304 may be the same or different.

[0031] The dielectric layer 310 may be a porous, relatively low density material, such as described above. The nanoparticles 308 may include a fast- diffusing cation metal or metal oxide. Examples include, but are not limited to, silver (Ag), copper (Cu), and gold (Au), and their oxides. The thickness of the selector insulator 306 may range from about 3 to 100 nm.

[0032] The nanoparticles 308 may have a particle size in the range of 1 to 20 nm. While any shape of the nanoparticles, such as spherical, filamentary, and the like, may be used, in many cases, symmetrical (e.g., spherical) particles may be used. The nanoparticles 308 may be present in the dielectric 310 in a concentration range of about 5 to 50 atom% (in terms of the atomic ratio of the nanoparticle atoms in the dielectric to the total atom concentration). For example, in the case of Ag or AgO_x nanoparticles in Si0₂, the atomic ratio may be measured as Ag/(Ag+Si+0).

[0033] As indicated above and as shown in FIG. 4, a nonvolatile memory cell 102' may include the volatile selector 300 electrically coupled in series with the nonvolatile resistance memory device, such as memristor 102. The nonvolatile resistance memory device 102 may include a switching layer 406 composed of an oxide or nitride sandwiched between a first bottom electrode 402 and a first top electrode 404. The volatile selector 300 may include the selector insulator 306 sandwiched between a second bottom electrode 302 and a second top electrode 304. In a crossbar configuration (FIG. 1 , 150), each memory cell 102' may be disposed at the intersection 1 14 formed by one of the bottom conducting traces 106 and one of the top conducting traces 108.

[0034] The teachings herein may be employed with an crossbar that is fabricated with resistance memory devices, or resistance random access memory devices, denoted RRAM or ReRAM, such as phase change RAM (PC RAM), spin transfer torque RAM (STTRAM), conductive bridge RAM

(CBRAM), and others. In some examples, the nonvolatile resistance memory device 102' may be a memristor.

[0035] In some examples, the nonvolatile memory cell 102' may include an optional interface layer 408 sandwiched between the first top electrode 404 of the nonvolatile resistance memory element 102 and the second bottom electrode 302 of the selector 300. The interface layer 408 may serve as a buffer layer to separate the memristor and selector so that they do not chemically and/or physically interfere with each other. The interface layer 408 may be a good electrical conductor over the temperature range from room temperature (approximately 20° to 26°C) to 85°C and a good diffusion barrier. In some examples, the interface layer 408 may be a metal, such as tantalum or tungsten. The choice of a material for the interface layer may depend on layers below and above it. Additional non-limiting examples of the interface layer 408 may include TiN, Ti₄0₇, TaN, NbN, Ru, and W. The interface layer 408 is optional, in that it may be omitted, since the nonvolatile memory cell 102' may operate fine without it. Alternatively, it may be used for an improved device 102', but accepting the costs associated with providing the extra layer.

[0036] A memory array, or crossbar, 150 having nonvolatile resistance memory devices may include a set 1 10 of electrically conducting row traces 106 intersecting a set 1 12 of electrically conducting column traces 108 to form intersections 1 14, with a memory cell 102' disposed at each intersection between one of the row lines and one of the column lines. The memory cell 102' may be a combination of a volatile selector 300 electrically coupled in series with the nonvolatile resistance memory device 102, as described above. The second bottom electrode 402 may be electrically coupled to a row trace 106 or to a column trace 108 and wherein the first top electrode 304 may be electrically coupled to the other of the row trace 106 or the column trace 108. In some examples, the first bottom electrode 402 and the second top electrode 304 may be omitted, and the switching oxide 406 and selector insulator 306 layers may be coupled directly to the electrically conducting row trace 106 and the electrically conducting column trace 108, respectively.

[0037] A method of manufacturing a memory array with nonvolatile resistance memory devices is depicted in FIG.5. The method 500 includes providing 505 a set 1 10 of electrically conducting row traces 106. The electrically conducting row traces 106 may be formed by any of a number of processes, including electroplating, sputtering, evaporation, ALD (atomic layer deposition), co-deposition, chemical vapor deposition, IBAD (ion beam assisted deposition), oxidation of pre-deposited materials, or any other film deposition technology.

[0038] The method 500 further includes providing 510 memory cells 102' disposed at a plurality of locations along the set 1 10 of row traces 106. The memory cell 102' may include the nonvolatile memory device 102 electrically coupled in series with the volatile selector 300, as described above, in which the selector insulator 306 may be composed of a composite material of an oxide and fast-diffusing cation metal particles.

[0039] Taking FIG. 4 as an example, deposition of the metal layers 402, 404, 302, and 304 may be performed by such processes as electroplating, sputtering, evaporation, ALD (atomic layer deposition), co-deposition, chemical vapor deposition, IBAD (ion beam assisted deposition), oxidation of pre- deposited materials, or any other film deposition technology. The switching oxide layer 406, the optional interface layer 308, and the selector insulator 306 may be formed by e-beam deposition, sputter deposition, atomic layer deposition (ALD), and the like. The layers 402, 406, 404, 408 (if used), 302, 306, and 304 may be deposited sequentially. It will be appreciated that in FIG. 4, the selector 300 is shown on "top" and the memristor 102 is shown on the "bottom" of the device 102'. However, in some examples, the memristor 102 may be on "top" and the selector 300 on the "bottom".

[0040] The method 500 concludes with providing 515 a set 1 12 of electrically conducting column traces 108 to contact the memory cells 102' at unique intersections 1 14. The electrically conducting column traces 1 12 may be formed by any of a number of processes, including electroplating, sputtering, evaporation, ALD (atomic layer deposition), co-deposition, chemical vapor deposition, IBAD (ion beam assisted deposition), oxidation of pre-deposited materials, or any other film deposition technology. The process used may be the same as or different than the process used to form the electrically conducting row traces 1 10. The order of the steps of method 500 may be reversed, so that the column traces 108 are formed first and the row traces 106 are formed last.

[0041] For the volatile selector 300, fast-diffusing cation metal particles (e.g., Ag, Cu, Au) may be introduced to the oxide (e.g., Si0₂, etc.) through various methods, for example, co-sputtering or pre-doped spin- on-glass. The metal particle can be in the metal atoms form or in its oxide form (e.g., for Ag, AgOx can be used). Due to the high mobility of these metal species, unique switching properties can be found for this type of device. The selector formed with the material mentioned shows a high nonlinearity and volatile

characteristics.

[0042] In some examples, the new selector 300 may have a nonlinearity of >10⁶ with large current density. The higher the current ratio (nonlinearity), the larger the potential crossbar size. For example, a nonlinearity of >10⁶ may allow a crossbar array of 1000 rows by 1000 columns, or 10⁶ memristors to populate the 10⁶ crosspoints. On the other hand, a nonlinearity on the order of 10³ would lead to a smaller array. [0043] Presently, the selector disclosed herein may be realized through a cation metal doped oxide as the switching material. While not subscribing to any particular theory, it appears that the working mechanism of the volatile selector may be explained by a volatile metal conduction mechanism which involves the "volatile generalized metal bridge conduction" of cations resulting from diffusion with cation metals such as Ag, Cu or Au. The dual-switching-mode of selector provides a promising application for three-dimensional crossbar RRAMs. A stable bipolar memristor resistive switching can be achieved by current- controlled RESET and voltage-controlled SET processes. Both nano size and micro sized devices have been built.

[0044] FIG. 6 shows the l-V results using the Ag co-sputtered selector. The results are for two different switches, with Curve 602 depicting a first switching cycle and Curve 604 depicting a second switching cycle. FIG. 6A illustrates the structure of the device 300' employed. In an example of the device 300, the selector insulator 306 was a 15 nm thick layer composed of 50% AgOx and 50% Si0₂. The bottom electrode 302 was tungsten, joined to the selector insulator 306 by a bridge 606 of titanium nitride. The top electrode 304 was 30 nm TiN, on which a layer of chromium 608 was formed. Co-deposition was used to form the AgOx-Si0₂ selector insulator 306.

[0045] Similar results were obtained for the micrometer-sized device using doped spin-on-glass (SOG), as shown in FIGS. 7A-7B, which are both l-V curves. SOG was used to deposit a 90 nm thin film of Si0₂ and Ag particles having a particle size of about 20 nm. FIG. 7A shows the switching l-V, similar to FIG. 6, with the positive curve (current and voltage) and the negative curve (current and voltage) both substantially symmetrical. The voltage can be tuned by adjusting the thickness of the film 304 and the composition of the dielectric material. FIG. 7B shows the same data as in 7A, but plotted as semi-log scale (in current) to show nonlinearity.

[0046] It is appreciated that volatile switching (as a selector 300), using a composite material of a dielectric 310 and fast-diffusing cation metal particles 308, may be obtained in accordance with the teachings herein. The volatility may be maintained by choosing appropriate dielectric materials, fast-diffusing metal cations, dielectric thickness, and suitable operating voltage regions, among others. Keeping the current density low, in the range of 1 to 10⁶ A/cm² (the operating range for stack 102'), may avoid the formation of a permanent filament in the selector; permanent filament formation may accompany memristor operation.

[0047] The selector disclosed herein may achieve both high current and nonlinear selection functions. The selector may return to high resistance after each time that the background current is reduced from an unselected device.

Claims

CLAIMS What is claimed is:

1 . A nonvolatile memory cell, including:

a volatile selector electrically coupled in series with a nonvolatile resistance memory device, the nonvolatile resistance memory device comprising a switching oxide or switching nitride sandwiched between a first bottom electrode and a first top electrode and the volatile selector comprising a selector insulator sandwiched between a second bottom electrode and a second top electrode,

wherein the selector insulator comprises a composite material of a dielectric and fast-diffusing cation metal particles.

2. The nonvolatile memory cell of claim 1 , wherein the non-volatile resistance memory device is a memristor.

3. The nonvolatile memory cell of claim 1 , further including an interface layer sandwiched between the first top electrode of the nonvolatile resistance memory element and the second bottom electrode of the selector, the interface layer acting as a diffusion barrier while being electrically conducting.

4. The nonvolatile memory cell of claim 3, wherein the interface layer comprises a material selected from the group consisting of TiN, Ti₄0₇, TaN, Ta, NbN, Ru, and W.

5. The nonvolatile memory cell of claim 1 , wherein the fast-diffusing cation metal particles are selected from the group consisting of Ag, Cu, and Au, and oxides thereof, and are present in the selector insulator in a concentration range of about 5 to 50 atomic percent.

6. The nonvolatile memory cell of claim 1 in which the oxide of the selector insulator is selected from the group consisting of spin-on glass, hydrogen silsesquioxane, S1O2, SiC, Si3N₄, SiC_xN_y, SiO_xN_y, and SiO_xC_y, where x and y are both greater than 0.

7. A memory array with nonvolatile memory cells, the memory array including:

a set of electrically conducting row lines intersecting a set of electrically conducting column lines to form intersections; and

each nonvolatile memory cell disposed at each intersection between one of the row lines and one of the column lines;

wherein the memory cell comprises a nonvolatile memory device electrically coupled in series with a volatile selector, the nonvolatile resistance memory device comprising a switching oxide or switching nitride sandwiched between a first bottom electrode and a first top electrode and the volatile selector comprising a selector insulator sandwiched between a second bottom electrode and a second top electrode,

wherein the selector insulator comprises a composite material of a dielectric and fast-diffusing cation metal particles and

wherein the first bottom electrode is electrically coupled to a row trace or to a column trace and wherein the second top electrode is electrically coupled to the other of the row trace or the column trace.

8. The memory array of claim 7, wherein the non-volatile memory device is a memristor.

9. The memory array of claim 7, further including an interface layer sandwiched between the first top electrode of the nonvolatile resistance memory element and the second bottom electrode of the selector.

10. The memory array of claim 9, wherein the interface layer comprises a material selected from the group consisting of TiN, Ti₄0₇, TaN, Ta, NbN, Ru, and W.

1 1 . The memory array of claim 7, wherein the fast-diffusing cation metal particles are selected from the group consisting of Ag, Cu, and Au, and oxides thereof, and are present in the selector insulator in a concentration range of about 5 to 50 atomic percent and wherein the oxide of the selector insulator is selected from the group consisting of spin-on glass, hydrogen si!sesquioxane, Si0₂, SiC, Si3N₄, SiCxNy, SiO_xN_y, and SiO_xC_y, where x and y are both greater than 0.

12. A method of manufacturing a memory array with nonvolatile memory cells, the method including:

providing a set of electrically conducting row traces; providing a memory cell disposed at a plurality of locations along each of the row traces, wherein each memory cell comprises a nonvolatile memory device electrically coupled in series with a volatile selector having a selector insulator, wherein the selector insulator comprises a composite material of an oxide and fast-diffusing cation metal particles; and

providing a set of electrically conducting column traces to contact the memory cells at unique intersections.

13. The method of claim 12, wherein each nonvolatile memory device comprises a switching oxide or switching nitride sandwiched between a first bottom electrode and a first top electrode and the volatile selector comprises a selector insulator sandwiched between a second bottom electrode and a second top electrode,

wherein the first bottom electrode of each memory device is electrically coupled to a given row trace or to a given column trace and wherein the second top electrode of each selector is electrically coupled to the other of the row trace or the column trace.

14. The method of claim 12, wherein the fast-diffusing cation metal particles are selected from the group consisting of Ag, Cu, and Au and are present in the selector insulator in a concentration range of about 5 to 50 atomic percent.

15. The method of claim 12, further including providing an interface layer sandwiched between the first top electrode of the nonvolatile memory element and the second bottom electrode of the selector.