WO2016141551A1 - Interleaving processing method and device - Google Patents

Abstract

Provided in the embodiments of the present invention are an interleaving processing method and device. The apparatus comprises: a grouping unit, a bit branch unit and multiple sub-resource unit interleaving units, wherein, the grouping unit is configured to divide multiple bits of an encoded data stream corresponding to a user equipment into multiple sets of input bits according to a resource unit (RU) currently allocated to the user equipment, the number of each set of multiple sets of input bits is determined by the size and number of the RU; the bit branch unit is configured to allocate each set of multiple sets of input bits to at least one sub-resource unit interleaving unit corresponding to each set of input bits according to a certain order; each of multiple sub-resource unit interleaving units is configured to perform discrete interleaving on multiple bits inputted into each sub-resource unit interleaving unit. The above apparatus and method can improve system performance.

Description

Interlacing processing method and device Technical field

The present invention relates to the field of communications technologies, and in particular, to an interleaving processing method and apparatus in a WLAN (Wireless Local Area Networks) system based on OFMDA.

Background technique

When communicating in a WLAN system, transmission information bit errors often occur serially. However, channel coding is only effective when detecting and correcting single errors and not too long error strings.

In order to solve the above problem, the transmission data bits are processed using an interleaving processing technique. After the interleaving processing technique is employed, successive transmission data bits are spread out, and the transmission data bits can be transmitted in a discontinuous manner. In this way, even if a string of errors occurs during transmission, when the message is restored to a successive bit string, the error becomes a single (or a shorter length), and then the channel coding error correction function is used to correct the error, so that Accurate recovery of original transmission data bits.

In the 802.11a/g protocol, two sub-interleaving processes are required for the transmission data bits. In the 802.11n/ac/ah protocol, three sub-interleaving processes are required, and the interleaving processing parameters of any one of the sub-interleaving processes may be performed by the data. The number of subcarriers is determined, that is, when the number of data subcarriers changes, the interleaving processing parameters also need to be changed accordingly.

In addition, the 802.11a/g/n/ac/ah protocol uses OFDM (Orthogonal Frequency Division Multiplexing) technology for data transmission. OFDM is a multi-carrier technology, which divides the frequency domain into a plurality of mutually orthogonal data subcarriers, and maps the intermodulation processing and the modulated signal corresponding to the modulated transmission data bits to corresponding data subcarriers, respectively. Transmission, and the number of data subcarriers is fixed.

In order to further improve the transmission efficiency of the system under multi-user equipment, the next-generation WLAN standard will introduce Orthogonal Frequency Division Multiple Access (OFDMA) technology. OFDMA divides the transmission bandwidth into orthogonal sets of subcarriers that do not overlap each other, and allocates different subcarrier sets to different users of orthogonal frequency division multiple access to implement multiple access. Compared with OFDM technology, OFDMA system can dynamically allocate available bandwidth resources to users in need, and it is easier to optimize the utilization of system resources. Since different subcarrier sets in each OFDM symbol will be allocated to different users, and the number and size of RUs allocated to a single user are very flexible, the original full-band interleaving scheme will result in data between different users. Interweaving, thus affecting the excellent User subcarrier allocation. Therefore, the next-generation WLAN technology needs to redesign a more effective bit interleaving scheme for the frequency band occupied by each user in the OFDMA system, and improve the system performance without increasing the system complexity as much as possible.

Summary of the invention

The embodiment of the invention provides an interleaving processing method and device, which can improve system performance.

In a first aspect, an interleaving processing apparatus is provided for use in an OFMDA-based WLAN system, the apparatus comprising: a packet unit, a bit offloading unit, and a plurality of sub-resource block interleaving units, wherein the grouping unit is configured to be based on a user equipment The resource block RU currently allocated to divide the plurality of bits in the encoded data stream corresponding to the user equipment into a plurality of sets of input bits, and the number of each input bit of the plurality of input bits is determined by the size of the RU a quantity determining unit; the bit stream dividing unit is configured to allocate each group of input bits in the plurality of sets of bits to at least one sub-resource block interleave unit corresponding to each set of input bits; the sub-resource block interleaving And a unit, configured to discretely interleave a plurality of bits input into each of the sub-resource block interleaving units.

With reference to the first aspect, in an implementation manner of the first aspect, the grouping unit is specifically configured to: divide the bit into a first bit group and a second bit group, where the first bit group corresponds to M ₁ sub-resources a block interleaving unit, where the second bit group corresponds to the M ₂ sub-resource block interleaving units, and the size of the RU to be processed by the sub-resource block interleaving unit corresponding to the first bit group is greater than the sub-resource block interlacing corresponding to the second bit group. The size of the RU that the unit currently needs to process, M ₁ and M ₂ are positive integers, and M = M ₁ + M ₂ , where M is the number of RUs to which the user equipment is currently assigned.

In combination with the first aspect and the foregoing implementation manner, in another implementation manner of the first aspect, the grouping unit is specifically configured to allocate a continuous N to the first bit group in each allocation period of an allocation cycle. ₁ bit, and allocates consecutive N ₂ bits to the second bit group, where N ₁ =[RU ₁ /RU ₂ ]·M ₁ , N ₂ =M ₂ , and RU ₁ represents the first bit group corresponding The sub-resource block interleaving unit currently needs to process the size of the RU, and RU ₂ indicates the size of the RU that the sub-resource block interleaving unit corresponding to the second bit group currently needs to process, and [] represents the rounding operation.

In combination with the first aspect and the foregoing implementation manner, in another implementation manner of the first aspect, the grouping unit is specifically configured to: alternately allocate the user equipment corresponding to the first bit group and the second bit group Encoding a plurality of bits in the data stream; when the first bit group is allocated N ₁ bits, stopping assigning bits to the first bit group, where N ₁ =[RU ₁ /RU ₂ ]·M ₁ , RU ₁ indicates the size of the RU that the sub-resource block interleaving unit corresponding to the first bit group needs to process, and RU ₂ indicates the size of the RU that the sub-resource block interleave unit corresponding to the second bit group needs to process, [] indicates An integer operation; when the second set of bits is allocated N ₂ bits, stopping assigning bits to the second set of bits, where N ₂ = M ₂ ; when the first set of bits is allocated N ₁ bits, And when the second bit group is allocated N ₂ bits, a plurality of bits in the encoded data stream corresponding to the user equipment are alternately allocated to the first bit group and the second bit group.

In combination with the first aspect and the foregoing implementation manner, in another implementation manner of the first aspect, the grouping unit is specifically configured to: generate a random driving code, where the random driving code includes multiple indicator bits, and the multiple indicator bits are Each of the plurality of indicator bits is used to assign a bit corresponding to each indicator bit to the first bit group or the second. In the bit group, wherein the ratio of the number of bits allocated to the first bit group to the number of bits allocated to the second bit group is N ₁ /N ₂ , where N ₁ =[RU ₁ /RU ₂ ]·M ₁ , N ₂ = M ₂ , where RU ₁ indicates the size of the RU that the sub-resource block interleaving unit corresponding to the first bit group needs to process, and RU ₂ indicates that the sub-resource block interleave unit corresponding to the second bit group currently needs to be processed. The size of RU, [] represents the rounding operation.

In conjunction with the first aspect and the foregoing implementation manner, in another implementation manner of the first aspect, the random driving code includes a first indicator bit and a second indicator bit, where the first indicator bit is used to be the first The bit corresponding to the indicator bit is allocated to the first bit group, and the second indicator bit is used to allocate the bit corresponding to the first indicator bit to the second bit group.

In combination with the first aspect and the foregoing implementation manner, in another implementation manner of the first aspect, the bit offloading unit is configured to sequentially or alternately allocate each s bit in each input bit group to each input bit. The at least two sub-resource block interleaving units corresponding to the group, where s is a positive integer greater than zero.

With reference to the first aspect and the foregoing implementation manner, in another implementation manner of the first aspect, if s is 1, the output sequence number of the bit allocated by the ith _{RU RU} corresponding to the xth bit group is represented by for:

j=(i _RU -1)+n·k

If s is greater than 1, the output sequence number of the bit allocated by the ith _{RU RU} corresponding to the xth bit group is expressed as:

Where k is the input number of the bit to which the i-th _RU unit is allocated, k is a non-negative integer, and n is the number of sub-resource block interleaving units corresponding to the x-th bit group.

With reference to the first aspect and the foregoing implementation manner, in another implementation manner of the first aspect, the apparatus further includes a total bit splitting unit, wherein an output bit stream of the bit splitting unit is sequentially input in units of r bits To the total bit splitting unit, the total bit splitting unit is configured to interleave the r bits and then allocate them to the plurality of sub-resource block interleaving units in a certain order, where r is a positive integer.

With reference to the first aspect and the foregoing implementation manner, in another implementation manner of the first aspect, the apparatus further includes a total resource block interleaving unit, where the multiple sub-resource block interleaving units input the output bits to the total resource block. In the interleaving unit, the total resource block interleaving unit is configured to perform discrete interleaving on at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group.

In combination with the first aspect and the foregoing implementation manner, in another implementation manner of the first aspect, the total resource block interleaving unit is specifically configured to: use the sub-resource block corresponding to each bit group according to a preset list. At least two sub-resource block interleaving units in the interleaving unit perform discrete interleaving; or at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group are interleaved according to a row-column rule.

In combination with the first aspect and the foregoing implementation manner, in another implementation manner of the first aspect, the total resource block interleaving unit is further configured to: when the number of the sub resource block interleaving units corresponding to the xth bit group is greater than When the odd number is 1, the last position of the interleaved unit of the total resource block is vacated.

In combination with the first aspect and the foregoing implementation manner, in another implementation manner of the first aspect, the multiple resource block interleaving units are further configured to: serially output the discrete interleaved multiple bits in a certain order or in parallel Output.

With reference to the first aspect and the foregoing implementation manner, in another implementation manner of the first aspect, each of the multiple resource block interleaving units is specifically configured to: according to the interleaving unit of each sub-resource block The bits in each of the sub-resource block interleaving units are cyclically shifted in order.

With reference to the first aspect and the foregoing implementation manner, in another implementation manner of the first aspect, the each sub-resource block interleaving unit is specifically configured to: according to an order of RUs that each sub-resource block interleave unit currently needs to process, The bits in each of the sub-resource block interleaving units are cyclically shifted by s bits to the right or left.

With reference to the first aspect and the foregoing implementation manner, in another implementation manner of the first aspect, the bit direction in the interleaving unit of each sub-resource block is in accordance with an order of RUs that each sub-resource block interleaving unit currently needs to process s-bit right circular shift, the x-th bit group corresponding to the first I RU _RU th input bits and output bits j correspondence is:

The sequence of the interleaving block of each sub-resource unit RU currently need to be processed, each of the sub-block interleaved bits within the resource unit bit left cyclic shift s, the x-th bit group corresponding to the first input I RU _RU th The correspondence between the bit and the output bit j is:

Where 1 ≤ i _RU ≤ n, k = 0, 1, ..., n is the number of RUs currently allocated by the user equipment, m is the modulation order, and k is the position number of the input bit of the i-th _RU RU, j is the position number of the output bit of the i-th _RU unit, and n is the number of sub-resource block interleaving units corresponding to the x-th bit group.

In a second aspect, an interleaving processing method is provided, which is applied to an OFMDA-based WLAN system, the method comprising: according to a resource block RU to which a user equipment is currently allocated, a packet unit in the encoded data stream corresponding to the user equipment The plurality of bits are divided into a plurality of sets of input bits, the number of each of the plurality of sets of input bits being determined by the size and number of the RUs; the bit shunting unit according to each set of input bits of the plurality of sets of bits The order is allocated to at least one sub-resource block interleave unit corresponding to each set of input bits; the sub-resource block interleave unit discretely interleaves a plurality of bits input into each sub-resource block interleave unit.

With reference to the second aspect, in an implementation manner of the second aspect, the grouping unit divides the plurality of bits in the encoded data stream corresponding to the user equipment into multiple groups of inputs according to the resource block RU to which the user equipment is currently allocated. a bit, comprising: the grouping unit dividing the plurality of bits into a first bit group and a second bit group, wherein the first bit group corresponds to M ₁ sub-resource block interleaving units, and the second bit group corresponds to M ₂ sub-resources a block interleaving unit, the size of the RU that needs to be processed by the sub-resource block interleaving unit corresponding to the first bit group is greater than the size of the RU currently required to be processed by the sub-resource block interleave unit corresponding to the second bit group, M ₁ and M ₂ Is a positive integer, and M = M ₁ + M ₂ , where M is the number of RUs to which the user equipment is currently assigned.

With reference to the second aspect and the foregoing implementation manner, in another implementation manner of the second aspect, the grouping unit is configured to use the resource block RU to which the user equipment is currently allocated, and the grouping unit is configured to use the plurality of encoded data streams corresponding to the user equipment. The bit is divided into a plurality of sets of input bits, including: allocating consecutive N ₁ bits to the first bit group and allocating consecutive N ₂ bits to the second bit group in each allocation period of an allocation cycle, Wherein, N ₁ =[RU ₁ /RU ₂ ]·M ₁ , N ₂ =M ₂ , and RU ₁ represents the size of the RU that the sub-resource block interleaving unit corresponding to the first bit group needs to process, and RU ₂ represents the first The size of the RU that the sub-resource block interleaving unit corresponding to the second bit needs to process, [] represents the rounding operation.

With reference to the second aspect and the foregoing implementation manner, in another implementation manner of the second aspect, the grouping unit is configured to use the resource block RU to which the user equipment is currently allocated, and the grouping unit is configured to use the plurality of encoded data streams corresponding to the user equipment. The bit is divided into a plurality of sets of input bits, including: alternately allocating a plurality of bits in the encoded data stream corresponding to the user equipment to the first bit group and the second bit group; when the first bit group is allocated N _{When 1} bit is used, the allocation of bits to the first bit group is stopped, where N ₁ =[RU ₁ /RU ₂ ]·M ₁ , and RU ₁ indicates that the sub-resource block interleaving unit corresponding to the first bit group currently needs to be processed. The size of RU, RU ₂ indicates the size of the RU that the sub-resource block interleaving unit corresponding to the second bit group needs to process, [] represents the rounding operation; when the second group of bits is allocated N ₂ bits, the stopping Allocating bits in the second bit group, where N ₂ = M ₂ ; when the first bit group is allocated N ₁ bits, and the second bit group is allocated N ₂ bits, alternately Allocating the first bit group and the second bit group A plurality of bits corresponding to the user equipment encoded data stream.

With reference to the second aspect and the foregoing implementation manner, in another implementation manner of the second aspect, the grouping unit is configured to use the resource block RU to which the user equipment is currently allocated, and the grouping unit is configured to use the plurality of encoded data streams corresponding to the user equipment. The bit is divided into a plurality of sets of input bits, including: generating a random driving code, where the random driving code includes a plurality of indicator bits, and the plurality of indicator bits are in one-to-one correspondence with a plurality of bits in the encoded data stream corresponding to the user equipment, Each of the indicator bits is used to allocate a bit corresponding to each indicator bit to the first bit group or the second bit group, wherein the number of bits allocated to the first bit group is allocated to The ratio of the number of bits of the second bit group is N ₁ /N ₂ , where N ₁ =[RU ₁ /RU ₂ ]·M ₁ , N ₂ =M ₂ , and RU ₁ represents the child corresponding to the first bit group The size of the RU that the resource block interleaving unit currently needs to process, the RU ₂ indicates the size of the RU that the sub-resource block interleaving unit corresponding to the second bit group needs to process, and [] represents the rounding operation.

In conjunction with the second aspect and the foregoing implementation manner, in another implementation manner of the second aspect, the random driving code includes a first indicator bit and a second indicator bit, where the first indicator bit is used to be the first The bit corresponding to the indicator bit is allocated to the first bit group, and the second indicator bit is used to allocate the bit corresponding to the first indicator bit to the second bit group.

With reference to the second aspect and the foregoing implementation manner, in another implementation manner of the second aspect, the bit splitting unit sequentially or alternately allocates each s bits in each input bit group to each of the bits Entering at least two sub-resource block interleave units corresponding to the bit group, where s is a positive integer greater than zero.

With reference to the second aspect and the foregoing implementation manner, in another implementation manner of the second aspect, if s is 1, the output sequence number of the bit allocated by the ith _{RU RU} corresponding to the xth bit group is represented by for:

j=(i _RU -1)+n·k

If s is greater than 1, the output sequence number of the bit allocated by the ith _{RU RU} corresponding to the xth bit group is expressed as:

Where k is the input number of the bit to which the i-th _RU unit is allocated, k is a non-negative integer, and n is the number of sub-resource block interleaving units corresponding to the x-th bit group.

With reference to the second aspect and the foregoing implementation manner, in another implementation manner of the second aspect, the method further includes: outputting the bit stream of the bit splitting unit into the total bit shunting unit in units of r bits; The total bit shunting unit interleaves the r bits and respectively allocates them to the plurality of sub-resource block interleaving units in a certain order, where r is a positive integer.

With reference to the second aspect and the foregoing implementation manner, in another implementation manner of the second aspect, the method further includes: the multiple sub-resource block interleaving units input the output bits into the total resource block interleaving unit; the total resource The block interleaving unit performs discrete interleaving on at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group.

With reference to the second aspect and the foregoing implementation manner, in another implementation manner of the second aspect, the total resource block interleaving unit at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group Performing discrete interleaving includes: performing, by the total resource block interleaving unit, discrete interleaving of at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group according to a preset list; or the total resource block The interleaving unit interleaves the at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group according to the row-column rule.

With reference to the second aspect and the foregoing implementation manner, in another implementation manner of the second aspect, the total resource block interleaving unit at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group The interleaving according to the row and column rules includes: when the number of sub-resource block interleaving units corresponding to the xth bit group is an odd number greater than 1, the last position of the interleaved unit of the total resource block is vacated.

With reference to the second aspect and the foregoing implementation manner, in another implementation manner of the second aspect, each of the plurality of sub-resource block interleaving units inputs the sub-resource block The plurality of bits of the interleaving unit are discretely interleaved, including: serially outputting or sequentially outputting the plurality of bits after the discrete interleaving in a certain order.

With reference to the second aspect and the foregoing implementation manner, in another implementation manner of the second aspect, each of the plurality of sub-resource block interleaving units is to input multiple bits of the inter-resource unit of each sub-resource block Performing discrete interleaving includes: each of the plurality of sub-resource block interleaving units cyclically shifts bits in each of the sub-resource block interleaving units according to an order of the each sub-resource block interleaving unit.

With reference to the second aspect and the foregoing implementation manner, in another implementation manner of the second aspect, each of the plurality of sub-resource block interleaving units is configured according to an order of each of the sub-resource block interleaving units The bits in the sub-resource block interleaving unit are cyclically shifted, including: each sub-resource block interleave unit, according to the order of the RUs that each sub-resource block interleave unit needs to process, the bit in each inter-resource block interleave unit Rotate the s bit right or left.

With reference to the second aspect and the foregoing implementation manner, in another implementation manner of the second aspect, the bit direction in the interleave unit of each sub-resource block is in accordance with an order of RUs that each sub-resource block interleave unit currently needs to process s-bit right circular shift, the x-th bit group corresponding to the first I RU _RU th input bits and output bits j correspondence is:

The sequence of the interleaving block of each sub-resource unit RU currently need to be processed, each of the sub-block interleaved bits within the resource unit bit left cyclic shift s, the x-th bit group corresponding to the first input bits I RU _RU th Correspondence with output bit j is:

Where 1 ≤ i _RU ≤ n, k = 0, 1, ..., n is the number of RUs currently allocated by the user equipment, m is the modulation order, and k is the position number of the input bit of the i-th _RU RU, j is the position number of the output bit of the i-th _RU unit, and n is the number of sub-resource block interleaving units corresponding to the x-th bit group.

Based on the above technical solution, the method and apparatus for interleaving processing in the embodiment of the present invention are applied to an OFDMA-based WLAN system, and the encoded data stream corresponding to the user equipment is configured by the grouping unit according to the size and number of RUs allocated by the current user equipment. The plurality of bits are divided into a plurality of sets of input bits; the bit splitting unit divides the bits included in each of the plurality of input bit groups according to one a predetermined order is allocated to all sub-resource block interleave units corresponding to each bit group; each sub-resource block interleave unit of the plurality of sub-resource block interleaving units discretizes a plurality of bits input to each of the sub-resource block interleave units Interleaving, the interleaving scheme is applicable when a single user equipment is allocated multiple RUs, and the performance is excellent and the implementation is simple, thereby improving the performance of the system without increasing system complexity.

DRAWINGS

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly described below. Obviously, the drawings in the following description are only It is a certain embodiment of the present invention, and other drawings can be obtained from those skilled in the art without any creative work.

1 is a block diagram of a BICM part system in BCC encoding in the existing WLAN standard;

2 is a schematic diagram of a first embodiment of performing three sub-interleaving processes for data bits to be transmitted in the prior art;

3 is a schematic diagram of a second embodiment of performing three sub-interleaving processes for data bits to be transmitted in the prior art;

4a is a schematic structural diagram of a first embodiment of a WLAN device according to the present invention;

4b is a schematic diagram of an interleaving processing unit in a first embodiment structure of a WLAN device according to the present invention;

FIG. 5 is a schematic structural diagram of a second embodiment of a WLAN device according to the present invention; FIG.

FIG. 6 is a schematic block diagram of an apparatus for interleaving processing according to an embodiment of the present invention.

FIG. 7 is another schematic block diagram of an apparatus for interleaving processing according to an embodiment of the present invention.

FIG. 8 is still another schematic block diagram of an apparatus for interleaving processing according to an embodiment of the present invention.

FIG. 9 is a schematic diagram of an interleaving manner of a sub-resource block interleaving unit according to an embodiment of the present invention;

FIG. 10 is a schematic diagram of another interleaving manner of a sub-resource block interleaving unit according to an embodiment of the present disclosure;

11 is a schematic structural diagram of a third embodiment of a WLAN device according to the present invention;

12 is a flowchart of a first implementation manner of an interleaving processing method in a WLAN system according to the present invention;

FIG. 13 is a flowchart of a second implementation manner of an interleaving processing method in a WLAN system according to the present invention;

FIG. 14 is a third implementation manner of an interleaving processing method in a WLAN system according to the present invention. Flow chart

FIG. 15 is a schematic structural diagram of another embodiment of a WLAN system according to the present invention;

FIG. 16 is a schematic diagram showing performance comparison of four interleaving schemes when coding and modulating into MCS0 under the Channel D NLOS channel.

detailed description

The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are only a part of the embodiments of the present invention, but not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

Currently, in the 802.11a/g/n/ac/ah standard, a system framework based on bit-interleaved coded modulation (BICM) is adopted, as shown in Fig. 1, serially cascading a channel coder, A shunt, a bit interleaver, and a memoryless constellation mapper. Under the fading channel, the BICM system increases the channel coding gain through the cascade interleaver, thereby effectively improving the system transmission reliability.

The existing WLAN standard combines OFDM and BICM techniques to interleave a channel coded bit sequence prior to OFDM modulation to obtain a frequency domain coded diversity gain over a wireless fading channel.

Figure 1 is a block diagram of the BICM part of the Binary Convolutional Code (BCC) encoding in the existing WLAN standard. As can be seen, the interleaver is serially cascaded between the BCC encoder and the constellation mapper, where the interleaver interleaves the bits of the OFDM symbol to obtain frequency domain coded diversity. The system includes the following components: a Forward Error Control (FEC) unit for performing a channel coding operation on the data bits to obtain a channel-coded data bit stream. A Stream Parser (SP) is used to allocate a single bit stream in the FEC unit to the iss spatial data stream. The interleaver (Interlever) is used to interleave each spatial data stream, and may be interleaved multiple times, for example, three times. The Constellation Mapper is used to map the interleaved bitstream to the constellation points in the modulation constellation to obtain a constellation symbol data stream. A Cyclic Shift Delay (CSD) unit is used to perform a cyclic shift delay operation on each spatial data stream.

When BCC coding is adopted, frequency domain interleaving processing is required, where 802.11a/g standard interleaving is performed twice, and 802.11n/ac/ah standard introduces MIMO (Multiple Input Multiple) Output, multiple input and multiple output technology, need to be interleaved three times. The two sub-interleaving processes performed by the 802.11a/g standard are the same as the first two sub-interleaving processes performed by the 802.11n/ac/ah standard.

In order to describe the scheme more clearly, first, a method of performing three sub-interleaving processing in the 802.11n/ac/ah standard is briefly described.

As shown in FIG. 2, a schematic diagram of performing three sub-interleaving processes for data bits to be transmitted. The first interleaving processing unit is configured to map adjacent data bits to be transmitted onto non-adjacent data subcarriers. k denotes an input position label of the first interleaving processing unit, and i denotes a corresponding output position label (or an input position label of the first interleaving processing unit) after the data bit to be transmitted passes through the first interleaving processing unit; the mapping relationship between k and i may be for:

Where N _COL , N _ROW are the interleaving parameters processed by the known first interleaving processing unit; N _CBPSSI is the number of input/output locations processed by the first interleaving processing unit, and N _CBPSSI is equal to the number of data subcarriers multiplied by the modulation order number;

Indicates the rounding operation. It is worth noting that N _COL and N _ROW are all determined by the number of data subcarriers.

The second interleaving processing unit is configured to alternately map adjacent coded bits to a low significant bit (LSB) and a high significant bit (MSB) in the constellation, to prevent the coded bits from being continuously mapped to the low significant bits. i denotes an output position label after the first interleaving of the first interleaving processing unit, and is also an input position label processed by the second interleaving processing unit, and j denotes an output position label after the data bit to be transmitted is interleaved by the second interleaving processing unit, i The mapping relationship with j can be:

Where s=max(N _BPSCS /2,1).

The third interleaving processing unit is configured to perform frequency rotation on other spatial streams to reduce correlation between adjacent bits of different spatial streams. j denotes an output position number after the interleaving process of the second interleaving processing unit, and is also an input position number of the interleaving process of the third interleaving processing unit, and r denotes an output position number of the data bit to be transmitted after being interleaved by the third interleaving processing unit. If the number of spatial streams N _{ss is} greater than or equal to 2 and less than or equal to 4, the mapping relationship between j and r can be:

j=0,1,...,N _CBPSSI -1,i _ss =1,2,3...N _ss

Wherein, N _BPSCS is a modulation order; N _ROT is an interleaving parameter of a known third interleaving processing unit interleaving process. If the number of spatial streams is greater than 4, the mapping relationship between j and r can be:

_{r = {jJ (i ss)} · N ROT · N BPSCS} mod N CBPSSI,

j=0,1,2,...N _CBPSSI -1,i _ss =1,2,3...N _ss

Where J(i _ss ) is the stream bit cyclic shift coefficient in the above formula, i _ss is the sequence number of the spatial bit stream, and J(i _ss ) is related to i _ss . The relationship between the two is as follows:

i ss	J(i ss )
		1	0
2	5
		3	2
4	7
		5	3
6	6
		7	1
8	4

In addition, the relationship between different bandwidths and interleaving parameters can be as follows:

Parameter	20MHz	40MHz	80MHz
				N COL	13	18	26
N ROW	4×N BPSCS	6×N BPSCS	9×N BPSCS
				N ROT (N SS ≤ 4)	11	29	58
N ROT (N SS >4)	6	13	28

Where N _COL and N _ROW are the interleaving parameters processed by the known first interleaving processing unit, N _ROT is the block size coefficient of the stream bit cyclic shift, and N _BPSCS is the modulation order.

It is worth noting that the number of data subcarriers in different bandwidths may also be different, and the number of data subcarriers is fixed under a certain bandwidth.

For example, when the bandwidth is 20 MHz, the number of data subcarriers may be 52; when the bandwidth is 40 MHz, the number of data subcarriers may be 108; when the bandwidth is 80 MHz, the number of data subcarriers may be Thought 234. It is not limited to the above-mentioned cases, and may be set according to actual needs, and details are not described herein again.

It should be noted that, in the above embodiment, the input position of each sub-interlacing process has a one-to-one correspondence with the output position, but an embodiment that does not correspond one-to-one in the order of the input position may be adopted. For example, as shown in FIG. 3, it is a schematic diagram of a second embodiment for performing three sub-interleaving processes on data bits to be transmitted in the prior art.

Wherein, the input position of the transmission data bit 1 shown in FIG. 3 before the first sub-interleaving process is the first input position of the first sub-interleave processing, and the output position after the first sub-interleave processing may be performed. For the second output position of the first sub-interleave processing, at this time, the input position before the second sub-interleave processing of the transmission data bit is the second input position of the second sub-interleave processing, and the second input position is performed. The output position after the second sub-interlacing process may be the third output position of the second sub-interlacing process, and the relationship between the input position and the output position of the third sub-interlacing process is not described again, and may be performed according to actual needs and corresponding protocols. set up.

Further, after the WLAN device performs interleaving processing on the data bits to be transmitted, the data bits to be transmitted after the interleaving process are modulated to obtain a modulated signal, and then the modulated signal is mapped to the corresponding data subcarrier for transmission.

As shown in FIG. 3, each of the input/output positions for interleaving in the interleaver corresponds to a corresponding data subcarrier, that is, data bits to be transmitted through any input/output position are mapped to corresponding data. After the subcarrier is sent and sent.

The method for modulating the data bits to be transmitted and the correspondence between the input/output locations and the data subcarriers are not limited in this embodiment, and are well-known in the art, and can be set according to actual needs, and are no longer Narration.

For a conventional OFDM system, the data of a single user equipment corresponds to the entire frequency band, the size of the interleaver corresponds to the bandwidth size (for example: 20M/40M/80M), and the parameters of the interleaver (N _ROW , N _COL ) need only Three bandwidth designs are available. However, for an OFDMA system, a single user equipment may be assigned a number of flexible and flexible RUs, such that the number of frequency bands corresponding to the user equipment is large. In this case, using the above technique would require designing a large number of interleavers, and each interleaver size is m·n·N _RU , where N _RU is the number of data subcarriers within each RU, m is The modulation order, n is the number of RUs allocated to the user equipment. It can be seen that the above technology needs to save a set of bit interleavers with different parameters, and the implementation complexity is too high for the WLAN system.

Furthermore, after the introduction of OFDMA in the next-generation WLAN system, the fixed-length bit interleaver of a single bandwidth defined by the existing WLAN standard cannot be reused, and a more flexible interleaver needs to be redesigned; for an OFDMA-based WLAN system, a single user equipment When multiple RUs are assigned, the redesigned interleaving scheme requires superior performance and simplicity of implementation.

In order to solve the above problem, the first embodiment of the present invention provides an OFDMA-based WLAN system architecture diagram, where the WLAN system uses a serial cascading device when allocating multiple RUs for a single user equipment, and the serial cascading mode can be adopted. A four-level processor, as shown in FIG. 4, wherein the WLAN device includes an access point (AP) and a terminal, such as a transmitting end being an AP and a receiving end being a terminal, as shown in FIG. 4a, where the transmitting The terminal includes: an FEC unit, a splitter, an interleaving processing device, a constellation mapper, and a cyclic shift delay unit, wherein, as shown in FIG. 4b, the interleave processing device in the OFMDA-based WLAN system further includes a packet unit, a bit split unit, and a sub Resource block interleaving unit.

The FEC encoder unit is configured to perform channel coding operation on the data bits to obtain a channel-coded data bit stream.

A splitter is configured to allocate a single bit stream in the FEC unit to the iss spatial data stream, where the spatial data stream refers to a MIMO multi-antenna that needs to be converted from a single data stream to an iss data stream, so that multiple antennas simultaneously transmit data.

a grouping unit, configured to divide, according to the resource block RU to which the user equipment is currently allocated, a plurality of bits in the encoded data stream corresponding to the user equipment into multiple sets of input bits, each group of input bits of the multiple sets of input bits The number of the RUs is determined by the size and number of the RUs to which the user equipment is currently allocated; and each set of input bits corresponds to at least one sub-resource block interleaving unit, and the sub-resource interleave units corresponding to the same set of input bits currently need to process the same RU. .

Optionally, the transmitting end may include iss grouping units, one grouping unit corresponding to one spatial data stream, and the iss grouping unit respectively assigning bits of the iss spatial data stream to each group of input bits.

Specifically, the grouping unit may be a user equipment corresponding to the plurality of bits of the coded data stream into a first bit group and second bit group, wherein the first bit group corresponding to the resource block interleaver M ₁ sub-unit, The second bit group corresponds to the M ₂ sub-resource block interleaving units, and the size of the RU that needs to be processed by each sub-resource block interleaving unit corresponding to the first bit group is greater than that of each sub-resource block corresponding to the second bit group. The size of the RU that the unit currently needs to process, M ₁ and M ₂ are positive integers, and M = M ₁ + M ₂ , where M is the number of resource blocks RU to which the user equipment is currently assigned.

Optionally, the grouping unit divides the plurality of bits in the encoded data stream corresponding to the user equipment into a first bit group and a second bit group, and the grouping unit may be used in each allocation period of one allocation cycle, Allocating consecutive N ₁ bits to the first bit group and allocating consecutive N ₂ bits to the second bit group, where N ₁ =[RU ₁ /RU ₂ ]·M ₁ , N ₂ =M ₂ , RU ₁ indicates the size of the RU that each sub-resource block interleaving unit corresponding to the first bit group needs to process, and RU ₂ indicates the size of the RU that each sub-resource block interleave unit corresponding to the second bit group needs to process. ] indicates a rounding operation.

Optionally, the grouping unit divides the plurality of bits in the encoded data stream corresponding to the user equipment into a first bit group and a second bit group, where the grouping unit is further configured to alternately apply to the first bit group and the Allocating a plurality of bits in the encoded data stream corresponding to the user equipment in the second bit group; when the first bit group is allocated N ₁ bits, stopping allocating bits to the first bit group, where N ₁ =[ RU ₁ /RU ₂ ·· M ₁ , N ₂ =M ₂ , where RU ₁ represents the size of the RU that each sub-resource block interleaving unit corresponding to the first bit group needs to process, and RU ₂ represents the corresponding bit of the second bit group. The size of the RU that each sub-resource block interleaving unit currently needs to process, [] represents a rounding operation; when the second bit group is allocated N ₂ bits, the allocation of bits to the second bit group is stopped, where N ₂ =M ₂ ; when the first bit group is allocated N ₁ bit, and the second bit group is allocated N ₂ bits, the user is allocated to the first bit group and the second bit group alternately a plurality of bits in the encoded data stream corresponding to the device, the first bit group The second bit group, the bits are allocated to continue the reception.

Optionally, the grouping unit divides the plurality of bits in the encoded data stream corresponding to the user equipment into a first bit group and a second bit group, where the grouping unit is further configured to generate a random driving code, where the random driving code includes a plurality of indicator bits, the plurality of indicator bits are in one-to-one correspondence with a plurality of bits in the encoded data stream corresponding to the user equipment, and each of the plurality of indicator bits is used for the bit corresponding to each indicator bit Assigned to the first bit group or the second bit group, wherein a ratio of the number of bits allocated to the first bit group to the number of bits allocated to the second bit group is N ₁ /N ₂ , where N ₁ = [RU ₁ /RU ₂ ]·M ₁ , N ₂ = M ₂ , RU ₁ represents the size of the RU that the sub-resource block interleaving unit corresponding to the first bit group needs to process, and RU ₂ represents the second bit group The size of the RU that the corresponding sub-resource block interleaving unit currently needs to process, and [] represents the rounding operation.

Optionally, the random driving code may include a first indicator bit and a second indicator bit, where the first indicator bit is used to allocate a bit corresponding to the first indicator bit to the first bit group, the second indication The bit is used to allocate the bit corresponding to the first indicator bit to the second bit group.

a bit-splitting unit for allocating bits to which each bit group is allocated in a certain order All sub-resource block interleave units corresponding to each bit group. The bit stream splitting unit can be a bit stream splitter. Optionally, the interleaving processing apparatus may include a bit stream splitter for respectively processing the number of bits included in each bit group; the interleaving processing apparatus may also include a plurality of bit stream splitters, and each bit stream splitter corresponds to one A bit group for processing a bit stream in the group, and the present invention is not limited thereto.

Specifically, the bit offloading unit is configured to sequentially or alternately allocate each s of the bits included in each bit group to the sub-resource block interleaving unit corresponding to each bit group, where s is a positive integer greater than 0.

If s is 1, the bit number assigned to the ith _{RU RU} corresponding to the xth bit group is j, and the corresponding relationship is:

j=(i _RU -1)+n·k.

If s is greater than 1, the bit number assigned to the ith _{RU RU} corresponding to the xth bit group is j, and the corresponding relationship is:

Where k is the input number of the bit to which the ith _RU RU is allocated, k is a non-negative integer, and n is the number of sub-resource block interleaving units corresponding to the x-th bit group.

a plurality of sub-resource block interleaving units, wherein each sub-resource interleaving unit is configured to discretely interleave a plurality of bits input to each of the sub-resource block interleaving units. The specific discrete interleaving process includes at least one of the following:

Each of the plurality of sub-resource block interleaving units is configured to discretely interleave the input bits, and the discrete interleaving is serially outputted in a certain order or output to the mapping unit in parallel;

Each of the plurality of sub-resource block interleaving units may be further configured to input the input bits in the order of the rows and output them in a column manner. Specifically, each of the sub-resource block interleaving units may be configured to alternately map the bits output according to the column to the low significant bit and the high significant bit in the constellation; and/or each sub-resource block interleaving unit is configured to interleave according to each sub-resource block. The order of the cells cyclically shifts the inner bits thereof. Alternatively, the each sub-resource block interleaving unit may cyclically shift its inner bits to the right or left by s bits according to the order of the RUs.

Optionally, the apparatus for interleaving processing may further include a total bit splitting unit, where the total bit splitting unit is located between the bit splitting unit and the plurality of sub-resource block interleaving units, and the output bit stream of the bit shunting unit is per r The bits are sequentially input to the total bit splitting unit, which is the total ratio The special offloading unit is configured to interleave the r bits and allocate them to the plurality of sub resource block interleaving units in a certain order, where r is a positive integer.

Optionally, the apparatus for the interleaving process may further include a total resource block interleaving unit, where the total resource block interleaving unit is located between the multiple sub-resource block interleaving units and the constellation mapper, and the multiple sub-resource block interleaving units will output The bit is input to the total resource block interleaving unit; the total resource block interleaving unit is configured to perform discrete interleaving on at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group.

A constellation mapper is configured to map the bit stream output after the interleaving to a constellation point in the modulation constellation to obtain a constellation symbol data stream.

A cyclic shift delay unit is configured to perform a cyclic shift delay operation on each spatial data stream.

Among them, the receiving end includes:

a constellation demapper, configured to demap the received constellation symbols into bit data to obtain a received bit data stream;

a deinterleaver, configured to perform a deinterleaving operation on the received bit data stream to obtain each spatial bit stream after deinterleaving;

a bit converger for combining bits in a plurality of sub-resource block interleaving units corresponding to each bit group into a plurality of sets of single bit data streams in a corresponding order;

An anti-packet unit, configured to combine the bit data streams of each group to obtain a single bit data stream of all groups;

a combiner for combining iss spatial data streams into a single bit data stream;

An FEC decoder unit is configured to perform a channel decoding operation on a single bit data stream to obtain a sequence of information data bits.

The receiving end performs corresponding processing according to the processing of the transmitting end, and details are not described herein again.

Therefore, the apparatus for interleaving processing in the embodiment of the present invention is applied to an OFDMA-based WLAN system, where a plurality of bits in an encoded data stream corresponding to a user equipment are used by a grouping unit according to the size and number of RUs allocated by the current user equipment. Dividing into a plurality of sets of input bits; the bit shunting unit assigns bits included in each of the plurality of input bit groups to all of the sub-resource block interleaving units corresponding to each of the bit groups in a certain order; Each of the resource block interleaving units performs discrete interleaving on a plurality of bits input to each of the sub-resource block interleaving units, and the interleaving scheme is applicable when a single user equipment is allocated a plurality of RUs, and the performance is excellent It is simple enough to improve system performance without increasing system complexity.

As an embodiment, as shown in FIG. 5, a schematic structural diagram of a second implementation manner of a WLAN device according to this embodiment is provided. The WLAN device sending end includes the following components:

FEC encoder unit: used for error control coding (or channel coding) on a bit stream to obtain a channel coded data bit stream;

A splitter is used to allocate a single bit stream in the FEC unit to the iss spatial data stream. Assuming that there are iss spatial data streams on the data transmitting end, the splitter allocates the channel-coded single-bit stream to the iss spatial data stream;

The iss grouping unit is configured to divide, according to the resource block RU to which the user equipment is currently allocated, the plurality of bits in the encoded data stream corresponding to the user equipment into multiple sets of input bits, each of the multiple sets of input bits. The number of input bits is determined by the size and number of RUs to which the user equipment is currently allocated, and each set of input bits corresponds to at least one sub-resource block interleaving unit, and the sub-resource block interleaving unit corresponding to the same set of input bits currently needs to be processed by the RU. Same size;

a bit stream splitter, configured to allocate bits included in the xth bit group to all sub-resource block interleave units corresponding to each bit group in a certain order;

a plurality of sub-resource block interleaving units, wherein each sub-resource interleaving unit is configured to discretely interleave the input bits, and the plurality of sub-resource block interleaving units input the output bits into the total resource block interleaving unit, where the x-th bit group corresponds The n sub-resource block interleaving units are taken as an example, and the n sub-resource block interleaving units perform interleaving processing on the bits in the x-th bit group;

a total resource block interleaving unit, configured to perform discrete interleaving on at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group;

A constellation mapper is configured to map the interleaved bitstream to a constellation point in the modulation constellation to obtain a constellation symbol data stream.

A cyclic shift delay unit is configured to perform a cyclic shift delay operation on each spatial data stream.

Specifically, in the embodiment of the present invention, for an OFDMA-based system, it is assumed that M RUs of different sizes are currently allocated to the same user equipment together, and the interleaving processing apparatus may include a grouping unit, a bit component, and M sub-resource block interleaving. unit.

Specifically, the grouping unit is configured to divide, according to the size and quantity of the resource block RU to which the user equipment is currently allocated, the plurality of bits in the encoded data stream corresponding to the user equipment into multiple sets of input bits, each group of input bits. Corresponding to at least one sub-resource block interleaving unit, corresponding to the same set of input bits The sub-resource block interleaving unit currently needs to process the same RU, and all the sub-resource block interleave units corresponding to all the group input bits have a total of M. .

Specifically, the grouping unit may divide the plurality of bits in the encoded data stream corresponding to the user equipment into a first bit group and a second bit group according to the size and quantity of the resource block RU to which the user equipment is currently allocated. The first bit group includes M ₁ sub-resource block interleaving units, and the second bit group includes M ₂ sub-resource block interleaving units, and the size of the RU currently required to be processed by each sub-resource block interleaving unit corresponding to the first bit group Each of the sub-resource block interleaving units corresponding to the second bit group is currently required to process the size of the RU, and M ₁ and M ₂ are positive integers, and M=M ₁ +M ₂ , where M is the current sub-resource block interleaving unit. The total number.

Optionally, the grouping unit divides the plurality of bits in the encoded data stream corresponding to the user equipment into the first bit group and the second bit group according to the size and quantity of the resource block RU to which the user equipment is currently allocated. the grouping unit may be used within each allocation period of a dispensing cycle, the group assigned consecutive bits of the N ₁ to the first bit, and assign consecutive N ₂ bits of the second bit group, wherein, N ₁ =[RU ₁ /RU ₂ ]·M ₁ , N ₂ =M ₂ , where RU ₁ represents the size of the RU that each sub-resource block interleaving unit corresponding to the first bit group needs to process, and RU ₂ represents the second bit group. Corresponding to each sub-resource block interleave unit currently needs to process the size of the RU, [] represents the rounding operation.

As an embodiment, as shown in FIG. 6, for an OFDMA-based system, it is assumed that the size of the system FFT in the 40M bandwidth is 256 points, and at this time, the 40M bandwidth is divided into 8 small RUs and 1 large RU, wherein Each small RU contains 24 data subcarriers and 2 pilot subcarriers, and each large RU contains 234 data subcarriers and 8 pilot subcarriers.

When the 8 small RUs and 1 large RU are allocated to the same user equipment, and the system adopts 64QAM modulation, correspondingly, the user equipment is allocated 9 sub-resource block interleaving units, and the grouping unit will firstly be based on the size of the RUs. And the plurality of bits in the encoded data stream corresponding to the user equipment are grouped into a first bit group and a second bit group, and the first bit group corresponds to one large RU, that is, corresponding to one sub-resource interleaving unit, The two-bit group corresponds to eight small RUs, that is, corresponding to eight sub-resource block interleaving units.

As shown in FIG. 6, since the size of the RU corresponding to the first bit group is larger than the second bit group, consecutive N ₁ bits are allocated to the first bit group in each allocation period of one allocation cycle, and The second bit group is allocated consecutive N ₂ bits, where N ₁ =[RU ₁ /RU ₂ ]·M ₁ =[234/24]·1=10, N ₂ =M ₂ =8, ie at each During the allocation period, consecutive 10 bits are allocated to the first bit group, and consecutive 8 bits are allocated to the second bit group.

In the embodiment of the present invention, optionally, the grouping unit divides the plurality of bits in the encoded data stream corresponding to the user equipment into the first bit according to the size and quantity of the resource block RU to which the user equipment is currently allocated. a group and a second bit group, the grouping unit may be further configured to alternately allocate a plurality of bits corresponding to the user equipment to the first bit group and the second bit group; when the first bit group is allocated N ₁ bit Stop assigning bits to the first bit group, where N ₁ =[RU ₁ /RU ₂ ]·M ₁ , N ₂ =M ₂ , and RU ₁ represents each sub-resource block interleaving unit corresponding to the first bit group The size of the RU that needs to be processed currently, RU ₂ indicates the size of the RU that each sub-resource block interleave unit corresponding to the second bit group needs to process, [] represents a rounding operation; when the second bit group is allocated N ₂ bits Stop assigning bits to the second bit group, where N ₂ = M ₂ ; when the first bit group is allocated N ₁ bit, and the second bit group is allocated N ₂ bits, Alternating the allocation to the first bit group and the second bit group A plurality of bits in the encoded data stream corresponding to the user equipment, the first bit group and the second bit group continuing to receive the allocated bits.

As an embodiment, as shown in FIG. 7, for an OFDMA-based system, it is assumed that the size of the system FFT in the 40M bandwidth is 256 points, and at this time, the 40M bandwidth is divided into 8 small RUs and 1 large RU, wherein Each small RU contains 24 data subcarriers and 2 pilot subcarriers, and each large RU contains 234 data subcarriers and 8 pilot subcarriers.

When the 8 small RUs and 1 large RU are allocated to the same user equipment, and the system adopts 64QAM modulation, correspondingly, the user equipment is allocated 9 sub-resource block interleaving units, and the grouping unit will firstly be based on the size of the RUs. And the plurality of bits in the encoded data stream corresponding to the user equipment are grouped into a first bit group and a second bit group, and the first bit group corresponds to one large RU, that is, corresponding to one sub-resource interleaving unit, The two-bit group corresponds to eight small RUs, that is, corresponding to eight sub-resource block interleaving units.

As shown in FIG. 7, since the size of the RU corresponding to the first bit group is larger than the second bit group, the grouping unit may alternately move to the first bit group and the second bit group through a combination of a conventional bit interleaver and a selection switch. A kind of allocation bit. Specifically, the conventional bit interleaver is configured to allocate a single bit to each group of bit groups in turn, and the selection switch of the first bit group is turned off after receiving the N ₁ bit, that is, the bit is allocated to the first bit group; the second bit group is The selection switch, once closed after receiving N ₂ bits, stops assigning bits to the second bit group, where N ₁ =[RU ₁ /RU ₂ ]·M ₁ =[234/24]·1=10, N ₂ =M ₂ =8. The selection switch of the two bit groups adopts centralized control, and restarts after the selection switches of both bit groups are turned off, and continues to receive the bits transmitted by the conventional bit interleaving.

In the embodiment of the present invention, optionally, the grouping unit divides the plurality of bits in the encoded data stream corresponding to the user equipment into the first bit according to the size and quantity of the resource block RU to which the user equipment is currently allocated. a group and a second bit group, the grouping unit may be further configured to generate a random driving code, where the random driving code includes a plurality of indicator bits, and the plurality of indicator bits are a plurality of bits in the encoded data stream corresponding to the user equipment. Correspondingly, each of the plurality of indicator bits is used to allocate a bit corresponding to each indicator bit to the first bit group or the second bit group, wherein the bit allocated to the first bit group is The ratio of the number to the number of bits allocated to the second bit group is N ₁ /N ₂ , where N ₁ =[RU ₁ /RU ₂ ]·M ₁ , N ₂ =M ₂ , and RU ₁ represents the first bit The size of the RU that the sub-resource block interleaving unit currently needs to process, the RU ₂ indicates the size of the RU that the sub-resource block interleaving unit in the second bit group needs to process, and [] represents the rounding operation.

Optionally, the random driving code may include a first indicator bit and a second indicator bit, where the first indicator bit is used to allocate a bit corresponding to the first indicator bit to the first bit group, the second indication The bit is used to allocate the bit corresponding to the first indicator bit to the second bit group.

As an embodiment, as shown in FIG. 8, for an OFDMA-based system, it is assumed that the size of the system FFT in the 40M bandwidth is 256 points, and at this time, the 40M bandwidth is divided into 8 small RUs and 1 large RU, wherein Each small RU contains 24 data subcarriers and 2 pilot subcarriers, and each large RU contains 234 data subcarriers and 8 pilot subcarriers.

When the 8 small RUs and 1 large RU are allocated to the same user equipment, and the system adopts 64QAM modulation, correspondingly, the user equipment is allocated 9 sub-resource block interleaving units, and the grouping unit will firstly be based on the size of the RUs. And the plurality of bits in the encoded data stream corresponding to the user equipment are grouped into a first bit group and a second bit group, and the first bit group corresponds to one large RU, that is, corresponding to one sub-resource interleaving unit, The two-bit group corresponds to eight small RUs, that is, corresponding to eight sub-resource block interleaving units.

As shown in FIG. 8, the grouping unit may generate a random driving code by using a random bit interleaver, where the random driving code includes a plurality of indicator bits, and the plurality of indicator bits are a plurality of bits in the encoded data stream corresponding to the user equipment. Correspondingly, the random driving code may include a first indicator bit “0”, a second indicator bit “1”, and the random driver code may be “01101110011101000101...”, wherein the first indicator bit “0” is used to indicate the indication. The bit corresponding to the bit is allocated to the first bit group; the second indicator bit "1" is used to indicate that the bit corresponding to the indicator bit is allocated to the second bit group. The ratio of the number of bits allocated to the first bit group to the number of bits allocated to the second bit group is N ₁ /N ₂ , where N is larger than the second bit group. ₁ = [RU ₁ /RU ₂ ]·M ₁ =[234/24]·1=10, N ₂ =M ₂ =8.

Optionally, the random driving code may include a first indicator bit and a second indicator bit, where the first indicator bit is “00”, and is used to indicate that the bit corresponding to the indicator bit is allocated to the first bit group; The second indication bit is "11" for indicating that the bit corresponding to the indication bit is allocated to the second bit group, and the present invention is not limited thereto.

In the embodiment of the present invention, after the bits are allocated to each bit group, the bits included in each bit group are further interleaved and output by the bit stream splitter and the corresponding multiple resource block interleaving units. Specifically, the interleaving process can be performed by the following method.

In the embodiment of the present invention, for an OFDMA-based system, it is assumed that N RUs are allocated to the same user equipment together, and after the foregoing grouping unit is divided into multiple input bit groups, if only one of the input bit groups is associated The sub-resource block interleaving unit may perform the interleaving process by using the sub-resource block interleaving unit in the interleaving processing apparatus of the embodiment of the present invention; if the input bit group is used, Corresponding to a plurality of sub-resource block interleaving units, the bits included in each bit group can be further interleaved by the following method, as shown in FIG. 5, where the x-th bit group is taken as an example, and the input bit group corresponds to At least two sub-resource block interleaving units are assumed. For example, the bit group corresponds to n sub-resource block interleaving units, and the bit-dividing unit included in the x-th bit group is processed by the interleaving scheme of the present invention. The specific processing flow is as follows:

The bit-dividing unit interleaves each bit of the xth bit group to a plurality of RUs corresponding to the plurality of sub-resource block interleaving units corresponding to the user equipment in the x-th bit group. Let m=log ₂ M be the system modulation order, and M be the constellation size. If the xth bit group corresponds to n sub-resource block interleaving units, that is, the xth bit group corresponds to n RUs, the bit shunting unit may The bit-by-bit interleaving is assigned to RU1 to RUn. Let s=max{1,m/2}, s denote the number of bits allocated continuously for each resource block interleaving unit, the bit shunt unit input is y _j , and the i th _RUs corresponding to the xth bit group are allocated The corresponding relationship of the bit number to j is as follows:

j=(i _RU -1)+n·k

Where 1 ≤ i _RU ≤ n, k represents the bit number input by each resource block interleaving unit, and k is a non-negative integer, and the value ranges from k=0, 1, 2, 3, .

Further assume that multiple RUs are simultaneously assigned to a single user equipment, and grouping units are grouped Then, any one of the bit groups corresponds to four sub-resource block interleaving units, corresponding to four RUs, or four RUs of the same size are currently allocated to the user equipment at the same time, and four sub-resources corresponding to four RUs are grouped by the grouping unit. The block interleaving unit corresponds to the same bit group at the same time, and the number of data subcarriers in each RU is three, and the modulation mode of the system is 64QAM, and there are 72 bits in the data stream of one OFDMA symbol bit. According to the above decomposition method, the order of the bit data streams is (0, 1, ..., 71), and is decomposed one by one to four RUs as shown in the following table:

Table 1

k	First RU	Second RU	Third RU	Fourth RU
					0	0	1	2	3
1	4	5	6	7
					2	8	9	10	11
3	12	13	14	15
					4	16	17	18	19
5	20	twenty one	twenty two	twenty three
					6	twenty four	25	26	27
7	28	29	30	31
					8	32	33	34	35
9	36	37	38	39
					10	40	41	42	43
11	44	45	46	47
					12	48	49	50	51
13	52	53	54	55
					14	56	57	58	59
15	60	61	62	63
					16	64	65	66	67
17	68	69	70	71

The bit-split unit may also allocate a set of interlaces to RU1 to RUn for each s-bit, and the corresponding relationship of the bit number assigned to the i-th _RU of the x-th bit group is j is as follows:

Where k represents the bit number input by each resource block interleaving unit, k is a non-negative integer, s represents the number of bits allocated consecutively for each resource block interleaving unit, and n is the sub-resource block interleaving unit corresponding to the xth bit group The number.

According to the above decomposition method and the above assumption, the order of the bit data stream is (0, 1, ..., 71), and at least two bits can be decomposed into four RUs as shown in the following table:

Table 2

k	First RU	Second RU	Third RU	Fourth RU
					0	0,1	2,3	4,5	6,7
1	8,9	10,11	12,13	14,15
					2	16,17	18,19	20,21	22,23
3	24,25	26,27	28,29	30,31
					4	32,33	34,35	36,37	38,39
5	40,41	42,43	44,45	46,47
					6	48,49	50,51	52,53	54,55
7	56,57	58,59	60,61	62,63
					8	64,65	66,67	68,69	70,71

The bit-split unit in the embodiment of the present invention is not limited to the allocation of s bit sequences in the data stream to RU1 to RUn. For example, q RUs may be selected for alternate allocation. In this case, the corresponding bit of the x-th bit group The bit number assigned to the i _RU RUs is j, and the corresponding relationship is:

among them

It is guaranteed to return to the beginning of the RU set when it is alternately allocated to the end of the RU set, so that the bits are allocated to all RUs, where k represents the bit number input by each resource block interleaving unit, k is a non-negative integer, and s represents continuous for each resource block. The number of bits allocated by the interleaving unit.

According to the above decomposition method and the above assumption, the order of the bit data stream is (0, 1, ..., 71), and q = 2, and at least two bits can be decomposed into 4 RUs as shown in the following table:

table 3

k	First RU	Second RU	Third RU	Fourth RU
					0	0	2	1	3
1	4	6	5	7
					2	8	10	9	11
3	12	14	13	15
					4	16	18	17	19
5	20	twenty two	twenty one	twenty three
					6	twenty four	26	25	27
7	28	30	29	31
					8	32	34	33	35
9	36	38	37	39
					10	40	42	41	43
11	44	46	45	47
					12	48	50	49	51
13	52	54	53	55
					14	56	58	57	59
15	60	62	61	63
					16	64	66	65	67
17	68	70	69	71

The n RU interleaving units include an RU1 interleaving unit, an RU2 interleaving unit, an RU3 interleaving unit, and a RUn interleaving unit. The interleaving manner for each RU interleaving unit may adopt the following implementation manner:

Embodiment 1

Each sub-resource block interleaving unit is configured to input the bits input in the order of rows and output them in a column manner, and each sub-resource block interleaving unit after discrete interleaving serially outputs or discretely interleaves in a certain order. The sub-resource block interleaving units are output in parallel.

Each of the corresponding n RU interleaved units in the xth bit group may adopt a row and column interleaver, that is, a travel list, and the parameter is (N _ROW , N _COL ). Let the bits before and after the interleaving be x _k and w _{i respectively} , where k is the bit position number before interleaving, the number before the x _k interleaving is the bit corresponding to the k bit position, i is the bit position number after the interleaving, and the number after w _i interleaving is For the bit corresponding to the position of the i bit, the specific interleaving formula is:

Where N _COL and N _ROW are the interleaving parameters processed by the known first interleaving processing unit.

Taking RU1 as an example, it is assumed that the number of data subcarriers in the RU is 12, and the modulation mode adopted by the system is 16QAM, so that N _COL = 4, N _ROW = 2 × 4 = 8, and the bit order before interleaving in RU1 is ( 0, 1, ..., 32), then the bit order in the first RU after the interleaving is as follows:

Table 4

	Column 1	Column 2	Column 3	Column 4
					Line 1	0	1	2	3
Line 2	4	5	6	7
					Line 3	8	9	10	11
Line 4	12	13	14	15
					Line 5	16	17	18	19
Line 6	20	twenty one	twenty two	twenty three
					Line 7	twenty four	25	26	27
Line 8	28	29	30	31

After reading the bits in columns, the order of bits in RU1 is: (0,4,8,12,16,20,24,28,1,5,9,13,17,21,25,29,2,6, ...,27,31).

Embodiment 2

Each of the sub-resource block interleaving units is configured to cyclically shift the inner bits according to the order of each sub-resource block interleave unit, and the cyclically shifted bits are serially output in a certain order in each sub-resource block interleave unit, or FIG. 9 is a schematic diagram of a specific interleaving manner of a sub-resource block interleaving unit according to an embodiment of the present invention.

Each of the bit interleaving units alternately maps adjacent coded bits to low significant bits and high significant bits in the constellation. Let m=log ₂ M be the constellation point modulation order (m=4 in 16QAM), s=max{1, m/2}, so that the bits before and after interleaving are w _i and y _{j respectively} , where i is the pre-interleaving bit The position number, the number before the w _i interleaving is the bit corresponding to the i bit position, j is the bit position number after the interleaving, the number corresponding to the j bit position after the y _j interleaving, and the number of bits after the N _{CBPSS is encoded} for the data stream The specific interweaving formula is:

Where N _CBPSS is the number of coded bits per spatial data stream.

Taking RU1 as an example, assuming that the number of data subcarriers in the RU is 12, the modulation mode adopted by the system is BPSK, and N _COL = 4, N _ROW = 3, and the upper table is followed, the bit order in the RU1 after the interleaving is as follows The table shows:

table 5

	Column 1	Column 2	Column 3	Column 4
					Line 1	0	5	2	7
Line 2	4	1	6	3
					Line 3	8	13	10	15
Line 4	12	9	14	11
					Line 5	16	twenty one	18	twenty three
Line 6	20	17	twenty two	19
					Line 7	twenty four	29	26	31
Line 8	28	25	30	27

The above-mentioned Embodiment 1 and Embodiment 2 can perform independent interleaving, that is, only interleaving once, or can be interleaved in combination, that is, interleaving according to Embodiment 1 and performing Interleaving 2, that is, interleaving twice.

Embodiment 3

Each of the sub-resource block interleaving units is used by each sub-resource block interleaving unit to output in columns The bits are alternately mapped to the low significant bits and the high significant bits in the constellation diagram, and the cyclically shifted bits are serially output in a certain order in each sub-resource block interleaving unit or each sub-resource block interleaved unit after discrete interleaving Parallel output.

In the third embodiment of the present invention, each of the sub-resource block interleaving units may also adopt an RU I/Q interleaving manner, in particular, each of the RUs respectively performs a rotation operation on the I/Q path bits corresponding to the constellation points, so as to prevent the coding bits from being continuously mapped to the constellation. The medium and low significant bits are as follows:

FIG. 10 shows an example of an RU I/Q interleaving unit. If the modulation mode is 64QAM, all bit positions in the RU1 are unchanged, and the RU2 data s=m/2=3 bits are cyclically shifted to the right. Bit, RU3 data 3 bits are cyclically shifted to the right by 2 bits, and so on.

So s = max {1, m / 2}, the corresponding x-th bit group of input bits I as RU _RU th

The RU I/Q interleaving unit outputs

Then the corresponding relationship is:

Where 1 ≤ i _RU ≤ n, k = 0, 1, ..., n is the number of RUs corresponding to the user equipment currently in the xth bit group, m is the modulation order, and k is the i-th _RU RU The bit position number input before the /Q interleaving, and j is the bit position number outputted after the I/Q interleaving in the i-th _RU RU.

It is assumed that the xth bit group corresponds to 4 sub resource block interleaving units, and also corresponds to 4 RUs, or it is assumed that 4 RUs of the same size are simultaneously allocated to a single user equipment, and the number of data subcarriers in each RU is Three, the modulation mode of the system is 64QAM, then there are 72 bits in the data stream of one OFDMA symbol bit. According to the above decomposition method, the sequence of each bit in Table 1 and 4 RUs is as shown in Table 6:

Table 6

k	First RU	Second RU	Third RU	Fourth RU
					0	0	9	6	3
1	4	1	10	7
					2	8	5	2	11
3	12	twenty one	18	15
					4	16	13	twenty two	19
5	20	17	14	twenty three
					6	twenty four	33	30	27

7	28	25	34	31
					8	32	29	26	35
9	36	45	42	39
					10	40	37	46	43
11	44	41	38	47
					12	48	57	54	51
13	52	49	58	55
					14	56	53	50	59
15	60	69	66	63
					16	64	61	70	67
17	68	65	62	71

At the same time, the cyclic shift in the RU I/Q interleaving unit can also be performed to the left, at this time:

Where 1 ≤ i _RU ≤ n, k = 0, 1, 2, ....

The third embodiment of the present invention can be interleaved independently, and only interleaved once, or can be interleaved in combination with the first embodiment. That is, according to the first embodiment, the third embodiment is interleaved, that is, interleaved twice.

In the embodiment of the present invention, the total number of corresponding sub-resource block interleave units in all the bit groups is N, that is, the number of RUs allocated by the user equipment. The total RU interleaving unit is located between the N sub-resource block interleaving units and the constellation mapper. Each of the N sub-resource block interleaving units is configured to discretely interleave the input bits and output the data to the total resource block in parallel. In the interleaving unit, the total resource block interleaving unit is configured to perform discrete interleaving on at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group.

The total resource block interleaving unit does not interleave internal bits of each sub-RU interleaving unit, and performs overall replacement operations only between multiple RUs corresponding to each bit group, thereby increasing the frequency of the system in a case where the complexity is low. Diversity coding gain. The size of the total RU interleaving unit is much smaller than that of the conventional bit interleaver. Therefore, the interleaving rule can be pre-stored as a list, and the RU position number comparison before and after the interleaving is saved in the list, and the list is queried when the interleaving operation is performed. At the same time, the RU The weaver can also be interleaved using simple interleaving rules, such as a row and column interleaver. When the row and column interleaver is used, the number of rows and columns interleaver columns can be fixed first, and the number of rows can be gradually increased as the interleaving elements increase. At the same time, the number of rows and columns of interleaver rows can also be fixed first, and the number of columns can be gradually increased as the interleaving elements increase.

Wherein, when the number of the row and column interleaver columns is fixed to 2, the interleaving rules are as shown in Table 7 when the elements to be interleaved are even and odd. Where n is an even number and p is an even number. The table in the left table indicates that each row and column of the row and column interleaver can be filled when the number of elements to be interleaved is n, and the last element of the last row of the row and column interleaver is filled when the element to be interleaved is p. Empty, this element can be ignored during write and read operations.

Table 7

It is assumed that the xth bit group corresponds to 4 sub resource block interleaving units, and also corresponds to 4 RUs, or if there are 4 simultaneous RUs of the same size allocated to a single user equipment, and the number of data subcarriers in each RU For three, the modulation mode of the system is 64QAM, and there are 72 bits in the data stream of one OFDMA symbol bit. According to the above decomposition method, the sequence of each bit in Table 6 and 4 RUs is as shown in Table 8:

Table 8

k	First RU	Second RU	Third RU	Fourth RU
					0	0	6	9	3
1	4	10	1	7
					2	8	2	5	11
3	12	18	twenty one	15
					4	16	twenty two	13	19
5	20	14	17	twenty three
					6	twenty four	30	33	27
7	28	34	25	31
					8	32	26	29	35

9	36	42	45	39
					10	40	46	37	43
11	44	38	41	47
					12	48	54	57	51
13	52	58	49	55
					14	56	50	53	59
15	60	66	69	63
					16	64	70	61	67
17	68	62	65	71

In addition, the total RU interleaving unit can also be incorporated into the bit decomposing unit, and the bit decomposing unit changes the bit allocation rule to achieve the same function as the RU interleaver.

In addition, in the foregoing embodiment, each of the sub-resource block interleaving units after the discrete interleaving is outputted in parallel to the total RU interleave unit to perform interleaving between the RUs, and the embodiment of the present invention may also adopt a total RU interleave unit, and each sub-resource block is interleaved. The units are serially output to the constellation mapping unit in a certain order, and the specific serial output may be alternated or other discrete manners, and the present invention will not be described in detail.

Therefore, the apparatus for interleaving processing in the embodiment of the present invention is applied to an OFDMA-based WLAN system, where a plurality of bits in an encoded data stream corresponding to a user equipment are used by a grouping unit according to the size and number of RUs allocated by the current user equipment. Dividing into a plurality of sets of input bits; the bit shunting unit assigns bits included in each of the plurality of input bit groups to all of the sub-resource block interleaving units corresponding to each of the bit groups in a certain order; Each of the resource block interleaving units is configured to discretely interleave a plurality of bits input to each of the sub-resource block interleaving units, where the interleaving scheme is applicable when a single user equipment is allocated multiple RUs, and the performance is excellent and the implementation is simple. Thereby improving the performance of the system without increasing system complexity.

FIG. 11 is a schematic structural diagram of a third embodiment of a WLAN device according to an embodiment of the present invention; as shown in FIG. 11, different from the second embodiment of the WLAN device according to the embodiment of the present invention is a bit splitter and a sub-resource block. A total bit splitting unit is added between the interleaving units, and the sub-resource block interleaving unit is directly connected to the constellation. After the bit-split unit is added, the total bit-splitting unit is added. For an OFDMA-based system, it is assumed that N RUs are allocated to the same user equipment together, and the grouping unit is used to divide the plurality of bits corresponding to the user equipment according to the size of each RU. For multiple bit groups, Each set of input bits corresponds to an RU of the same size, where the xth bit group corresponds to n sub resource block interleaving units, and the n sub resource block interleaving units also correspond to n same size RUs, for example, for the bit processing flow in each bit group described as follows:

The bit shunting unit inputs the bit stream of the xth bit group into the total bit shunting unit in units of r bits, and interleaves the r bits by the total bit shunting unit, and sends the n resources corresponding to the xth bit group. The block interleaving unit, the n resource block interleaving unit processing flow is the same as the previous scheme description.

Suppose the xth bit group corresponds to 4 sub-resource block interleaving units, and also corresponds to 4 RUs, or assumes that 4 simultaneous RUs of the same size are allocated to a single user equipment, then the bit shunt unit will output the shunt at this time. The bit stream is input to the total bit stream unit in units of every 8 bits. For example, if the output bits of the bit shunting unit are (0, 1, 2, 3, 4, 5, 6, 7), the total bit shunting unit interleaves the interleaving interleaving unit shown in Table 9 and outputs the bit order from top to bottom. It is (0, 2, 4, 6, 1, 3, 5, 7). The 8 bits are written to the respective resource blocks, and then the 8 bits are read in to repeat the above process until each resource block is filled.

Table 9

0	1
		2	3
4	5
		6	7

The OFDMAA-based WLAN system in the above embodiment adopts the above system architecture, not only solves the problem that the bit interleaver cannot be reused, but also the interleaver length based on the design is more flexible, when a single user equipment is allocated multiple RUs of different sizes. The interleaving scheme of the above design is excellent in performance and simple in implementation, thereby improving system performance without increasing system complexity.

The apparatus for interleaving processing according to an embodiment of the present invention is described in detail above with reference to FIGS. 1 through 11, and a method of interleaving processing according to an embodiment of the present invention will be described below with reference to FIGS. 12 through 15.

The embodiment provides a method for interleaving processing in an OFDMA-based WLAN system, and the executor of the method may be a WLAN device including an interleaver, as shown in FIG. 12, which is sent in a WLAN system provided by the present invention. The flowchart of the first implementation manner of the interleaving processing method includes the following steps:

S101. The packet unit divides, according to the resource block RU to which the user equipment is currently allocated, the plurality of bits in the encoded data stream corresponding to the user equipment into multiple sets of input bits, and each group of the input bits of the multiple sets of input bits The number is determined by the size and number of the RU.

The same input bit group corresponds to at least one RU, and the at least one RU corresponds to the same number of sub-resource block interleave units, and the RUs corresponding to the same input bit group have the same size.

Specifically, the grouping unit may be a user equipment corresponding to the plurality of bits of the coded data stream into a first bit group and second bit group, wherein the first bit group corresponding to the resource block interleaver M ₁ sub-unit, The second bit group corresponds to the M ₂ sub-resource block interleaving units, and the size of the RU that needs to be processed by each sub-resource block interleaving unit corresponding to the first bit group is greater than that of each sub-resource block corresponding to the second bit group. The size of the RU that the unit currently needs to process, M ₁ and M ₂ are positive integers, and M = M ₁ + M ₂ , where M is the number of resource blocks RU to which the user equipment is currently assigned.

Optionally, the grouping unit divides the plurality of bits in the encoded data stream corresponding to the user equipment into a first bit group and a second bit group, and the grouping unit may be used in each allocation period of one allocation cycle, Allocating consecutive N ₁ bits to the first bit group and allocating consecutive N ₂ bits to the second bit group, where N ₁ =[RU ₁ /RU ₂ ]·M ₁ , N ₂ =M ₂ , RU ₁ indicates the size of the RU that each sub-resource block interleaving unit corresponding to the first bit group needs to process, and RU ₂ indicates the size of the RU that each sub-resource block interleave unit corresponding to the second bit group needs to process. ] indicates a rounding operation.

Optionally, the grouping unit divides the plurality of bits in the encoded data stream corresponding to the user equipment into a first bit group and a second bit group, where the grouping unit is further configured to alternately apply to the first bit group and the Allocating a plurality of bits in the encoded data stream corresponding to the user equipment in the second bit group; when the first bit group is allocated N ₁ bits, stopping allocating bits to the first bit group, where N ₁ =[ RU ₁ /RU ₂ ·· M ₁ , N ₂ =M ₂ , where RU ₁ represents the size of the RU that each sub-resource block interleaving unit corresponding to the first bit group needs to process, and RU ₂ represents the corresponding bit of the second bit group. The size of the RU that each sub-resource block interleaving unit currently needs to process, [] represents a rounding operation; when the second bit group is allocated N ₂ bits, the allocation of bits to the second bit group is stopped, where N ₂ =M ₂ ; when the first bit group is allocated N ₁ bit, and the second bit group is allocated N ₂ bits, the user is allocated to the first bit group and the second bit group alternately a plurality of bits in the encoded data stream corresponding to the device, the first bit group The second bit group, the bits are allocated to continue the reception.

Optionally, the grouping unit divides the plurality of bits in the encoded data stream corresponding to the user equipment into a first bit group and a second bit group, where the grouping unit is further configured to generate a random driving code, where the random driving code includes a plurality of indicator bits, the plurality of indicator bits are in one-to-one correspondence with a plurality of bits in the encoded data stream corresponding to the user equipment, and each of the plurality of indicator bits is used for the bit corresponding to each indicator bit Assigned to the first bit group or the second bit group, wherein a ratio of the number of bits allocated to the first bit group to the number of bits allocated to the second bit group is N ₁ /N ₂ , where N ₁ = [RU ₁ /RU ₂ ]·M ₁ , N ₂ = M ₂ , RU ₁ represents the size of the RU that the sub-resource block interleaving unit corresponding to the first bit group needs to process, and RU ₂ represents the second bit group The size of the RU that the corresponding sub-resource block interleaving unit currently needs to process, and [] represents the rounding operation.

Optionally, the random driving code may include a first indicator bit and a second indicator bit, where the first indicator bit is used to allocate a bit corresponding to the first indicator bit to the first bit group, the second indication The bit is used to allocate the bit corresponding to the first indicator bit to the second bit group.

S102. The bit offloading unit allocates the bits of each bit group to all the sub-resource block interleaving units corresponding to each bit group in a certain order.

Specifically, the bit offloading unit is configured to sequentially or alternately allocate each s of the bits of each bit group to the sub-resource block interleaving unit corresponding to each bit group, where s is a positive integer greater than 0.

If s is 1, the bit number assigned to the ith _{RU RU} corresponding to the xth bit group is j, and the corresponding relationship is:

j=(i _RU -1)+n·k

If s is greater than 1, the bit number assigned to the ith _{RU RU} corresponding to the xth bit group is j, and the corresponding relationship is:

Where k is the input number of the bit to which the i-th _RU unit is allocated, k is a non-negative integer, and n is the number of sub-resource block interleaving units corresponding to the x-th bit group.

S103. Each of the plurality of sub-resource block interleaving units performs discrete interleaving on a plurality of bits input to each of the sub-resource block interleaving units.

The plurality of resource block interleaving units perform discrete interleaving of the input bits, and specifically: each of the plurality of sub-resource block interleaving units is used for discretely interleaving the input bits, and the discrete interleaving is performed in a certain order. Output or parallel output to the mapping unit.

The sub-resource block interleaving unit performs discrete interleaving on the input bits, where the inter-interleaving unit inputs the input bits in the order of the rows and then according to the column manner. And performing outputting; and/or each of the plurality of sub-resource block interleaving units cyclically shifting bits in each of the sub-resource block interleaving units according to an order of the each sub-resource block interleaving unit.

The sub-resource block interleaving unit inputs the input bits in the order of the rows and outputs them in a column manner. The method further includes: each sub-resource block interleaving unit alternately maps the bits output according to the columns to the low-significant bits in the constellation diagram. And high effective bits.

Each of the sub-resource block interleaving units cyclically shifts the inner bits according to the order of each sub-resource block interleave unit, specifically: the per-sub-resource block interleaving unit cyclically shifts its inner bits to the right or left according to the order of the RUs. Bit s bit.

The sequence of the interleaving block of each sub-resource unit RU currently need to be processed, the resource block for each sub-bit right circular shift s interleaved bits within a cell, the I RU _RU th input bits of the bit group corresponding to x The output bit j correspondence is:

The sequence of the interleaving block of each sub-resource unit RU currently need to be processed, each of the sub-block interleaved bits within the resource unit bit left cyclic shift s, the x-th bit group corresponding to the first input bits I RU _RU th Correspondence with output bit j is:

Where 1 ≤ i _RU ≤ n, k = 0, 1, ..., n is the number of RUs corresponding to the xth bit group in the RU currently allocated by the user equipment, m is the modulation order, and k is the i _thth The position number of the input bit in the RU, and j is the position number of the output bit in the i-th _RU RU.

After the step S102, the method further includes: outputting the bit stream of the bit shunting unit into the total bit shunting unit in units of r bits; the total bit shunting unit interleaving the r bits in a certain order And respectively allocated to the plurality of sub-resource block interleaving units, where r is a positive integer.

After the S103, the method further includes: the multiple sub-resource block interleaving units input the output bits into the total resource block interleaving unit; the total resource block interleaving unit is in the sub-resource block interleaving unit corresponding to each bit group At least two sub-resource block interleaving units perform discrete interleaving.

Specifically, the total resource block interleaving unit performs discrete interleaving on at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group, including: according to a preset list, The total resource block interleaving unit performs discrete interleaving on at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group; or the total resource block interleaving unit sub-resource block corresponding to each bit group At least two sub-resource block interleaving units in the interleaving unit perform interleaving according to the row and column rules.

It should be understood that, in various embodiments of the present invention, the size of the sequence numbers of the above processes does not mean the order of execution, and the order of execution of each process should be determined by its function and internal logic, and should not be taken to the embodiments of the present invention. The implementation process constitutes any limitation.

Therefore, the method of the interleaving process in the embodiment of the present invention is applied to the OFDMA-based WLAN system, and the plurality of bits in the encoded data stream corresponding to the user equipment are used by the grouping unit according to the size and number of the RUs allocated by the current user equipment. Dividing into a plurality of sets of input bits; the bit shunting unit assigns bits included in each of the plurality of input bit groups to all of the sub-resource block interleaving units corresponding to each of the bit groups in a certain order; Each of the resource block interleaving units is configured to discretely interleave a plurality of bits input to each of the sub-resource block interleaving units, where the interleaving scheme is applicable when a single user equipment is allocated multiple RUs, and the performance is excellent and the implementation is simple. Thereby improving the performance of the system without increasing system complexity.

Optionally, the flowchart of the second implementation manner of the interleaving processing method in the WLAN system provided by the present invention, as shown in FIG. 13, includes the following steps:

S201: Perform error control coding (or channel coding) on the bit data stream to obtain a channel coded data bit stream, where the step of performing the step may be an FEC encoder;

S202: The packet unit divides, according to the resource block RU to which the user equipment is currently allocated, the plurality of bits in the encoded data stream corresponding to the user equipment into multiple sets of input bits, and each group of the input bits of the plurality of input bits The number is determined by the size and number of the RU.

The same input bit group corresponds to at least one RU, and the at least one RU corresponds to the same number of sub-resource block interleave units, and the RUs corresponding to the same input bit group have the same size.

Optionally, S202 may further allocate the S201 processed single bit stream to the iss spatial data stream by using a bit splitter, and then group by the grouping unit, and in S202, execute the iss spatial data streams in a certain order. Assigned to each bit group separately. Assuming that the data sender has an iss spatial data stream, the splitter or processor allocates the channel-coded single-bit stream to the iss spatial data stream;

S203: The bit splitting unit allocates the bits of each bit group to each of the bits in a certain order. All sub-resource block interleave units corresponding to each bit group.

S204: Each of the plurality of sub-resource block interleaving units performs discrete interleaving on a plurality of bits input to each of the sub-resource block interleaving units.

S205: Perform discrete interleaving on at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group.

S206: Mapping the interleaved bit stream to a constellation point in the modulation constellation to obtain a constellation symbol data stream;

S207: The cyclic shift delay unit performs a cyclic shift delay operation on each spatial data stream.

S204 and S205 may be performed in an interleaver, where the interleaver includes a plurality of sub-resource block interleaving units and a total resource block interleaving unit. S207 can be executed in a constellation mapper, and S208 can be executed in a cyclic shift delay. Furthermore, the execution of the above steps in the embodiments of the present invention is not limited to the above-mentioned independent components, and the processor may perform S101 to S108.

For an OFDMA-based system, it is assumed that N different sizes of RUs are currently allocated to the same user equipment, and S202 and S203 are specifically operated as follows:

Specifically, in S202, the grouping unit may divide the plurality of bits in the encoded data stream corresponding to the user equipment into the first bit group and the second according to the size and quantity of the resource block RU to which the user equipment is currently allocated. a bit group, where the first bit group includes M ₁ sub-resource block interleaving units, where the second bit group includes M ₂ sub-resource block interleaving units, and each sub-resource block interleaving unit corresponding to the first bit group currently needs to be processed. The size of the RU is greater than the size of the RU currently to be processed by each sub-resource block interleave unit corresponding to the second bit group, M ₁ and M ₂ are positive integers, and M=M ₁ +M ₂ , where M is a plurality of sub-resource blocks. The number of interleaved units.

Optionally, in S202, the grouping unit divides the multiple bits in the encoded data stream corresponding to the user equipment into the first bit group and the first according to the size and quantity of the resource block RU to which the user equipment is currently allocated. A bin, in particular, the packet unit may allocate consecutive N ₁ bits to the first bit group and allocate consecutive N ₂ bits to the second bit group in each allocation cycle of an allocation cycle Where N ₁ =[RU ₁ /RU ₂ ]·M ₁ , N ₂ =M ₂ , and RU ₁ represents the size of the RU that each sub-resource block interleaving unit corresponding to the first bit group needs to process, and RU ₂ represents The second bit group corresponds to the size of the RU that each sub-resource block interleaving unit currently needs to process, and [] represents a rounding operation.

As an embodiment, as shown in Figure 6, for an OFDMA-based system, assume The size of the system FFT is 256 points under the 40M bandwidth, and the 40M bandwidth is divided into 8 small RUs and 1 large RU, where each small RU contains 24 data subcarriers and 2 pilot subcarriers. Each large RU contains 234 data subcarriers and 8 pilot subcarriers.

When the 8 small RUs and 1 large RU are allocated to the same user equipment, and the system adopts 64QAM modulation, correspondingly, the user equipment is allocated 9 sub-resource block interleaving units, and the grouping unit will firstly be based on the size of the RUs. And the plurality of bits in the encoded data stream corresponding to the user equipment are grouped into a first bit group and a second bit group, and the first bit group corresponds to one large RU, that is, corresponding to one sub-resource interleaving unit, The two-bit group corresponds to eight small RUs, that is, corresponding to eight sub-resource block interleaving units.

As shown in FIG. 6, since the size of the RU corresponding to the first bit group is larger than the second bit group, consecutive N ₁ bits are allocated to the first bit group in each allocation period of one allocation cycle, and The second bit group is allocated consecutive N ₂ bits, where N ₁ =[RU ₁ /RU ₂ ]·M ₁ =[234/24]·1=10, N ₂ =M ₂ =8, ie at each During the allocation period, consecutive 10 bits are allocated to the first bit group, and consecutive 8 bits are allocated to the second bit group.

Optionally, in S202, the grouping unit divides the multiple bits in the encoded data stream corresponding to the user equipment into the first bit group and the first according to the size and quantity of the resource block RU to which the user equipment is currently allocated. a group of bits, in particular, the grouping unit may alternately allocate a plurality of bits to the first group of bits and the second group of bits; when the first group of bits is allocated with N ₁ bits, stopping to the second group a bit allocation bit, where N ₁ =[RU ₁ /RU ₂ ]·M ₁ , N ₂ =M ₂ , and RU ₁ represents the RU of each sub-resource block interleaving unit corresponding to the first bit group that needs to be processed Size, RU ₂ indicates the size of the RU that each sub-resource block interleaving unit corresponding to the second bit group needs to process, [] represents a rounding operation; when the second bit group is allocated N ₂ bits, the a bit allocation bit, where N ₂ = M ₂ ; when the first bit group is allocated N ₁ bit, and the second bit group is allocated N ₂ bits, then alternately to the first a bit group and a code corresponding to the user equipment allocated in the second bit group According to the bitstream the plurality of the first bit group and the second bit group, the bits are allocated to continue the reception.

As an embodiment, as shown in FIG. 7, for an OFDMA-based system, it is assumed that the size of the system FFT in the 40M bandwidth is 256 points, and at this time, the 40M bandwidth is divided into 8 small RUs and 1 large RU, wherein Each small RU contains 24 data subcarriers and 2 pilot subcarriers, and each large RU contains 234 data subcarriers and 8 pilot subcarriers.

When the 8 small RUs and 1 large RU are allocated to the same user equipment, and the system adopts 64QAM modulation, correspondingly, the user equipment is allocated 9 sub-resource block interleaving units, and the grouping unit will firstly be based on the size of the RUs. And the plurality of bits in the encoded data stream corresponding to the user equipment are grouped into a first bit group and a second bit group, and the first bit group corresponds to one large RU, that is, corresponding to one sub-resource interleaving unit, The two-bit group corresponds to eight small RUs, that is, corresponding to eight sub-resource block interleaving units.

As shown in FIG. 7, since the size of the RU corresponding to the first bit group is larger than the second bit group, the grouping unit may alternately move to the first bit group and the second bit group through a combination of a conventional bit interleaver and a selection switch. A kind of allocation bit. Specifically, the conventional bit interleaver is configured to allocate a single bit to each group of bit groups in turn, and the selection switch of the first bit group is turned off after receiving the N ₁ bit, that is, the bit is allocated to the first bit group; the second bit group is The selection switch, once closed after receiving N ₂ bits, stops assigning bits to the second bit group, where N ₁ =[RU ₁ /RU ₂ ]·M ₁ =[234/24]·1=10, N ₂ =M ₂ =8. The selection switch of the two bit groups adopts centralized control, and restarts after the selection switches of both bit groups are turned off, and continues to receive the bits transmitted by the conventional bit interleaving.

Optionally, in S202, the grouping unit divides the multiple bits in the encoded data stream corresponding to the user equipment into the first bit group and the first according to the size and quantity of the resource block RU to which the user equipment is currently allocated. a packet, in particular, the packet unit may further generate a random driving code, where the random driving code includes a plurality of indicator bits, and the plurality of indicator bits are in one-to-one correspondence with a plurality of bits in the encoded data stream corresponding to the user equipment, Each of the plurality of indicator bits is used to allocate a bit corresponding to each indicator bit to the first bit group or the second bit group, wherein the number of bits allocated to the first bit group is The ratio of the number of bits allocated to the second bit group is N ₁ /N ₂ , where N ₁ =[RU ₁ /RU ₂ ]·M ₁ , N ₂ =M ₂ , and RU ₁ represents the first bit group corresponding The sub-resource block interleaving unit currently needs to process the size of the RU, and RU ₂ indicates the size of the RU that the sub-resource block interleaving unit corresponding to the second bit group currently needs to process, and [] represents the rounding operation.

Optionally, the random driving code may include a first indicator bit and a second indicator bit, where the first indicator bit is used to allocate a bit corresponding to the first indicator bit to the first bit group, the second indication The bit is used to allocate the bit corresponding to the first indicator bit to the second bit group.

As an embodiment, as shown in FIG. 8, for an OFDMA-based system, it is assumed that the size of the system FFT in the 40M bandwidth is 256 points, and at this time, the 40M bandwidth is divided into 8 small RUs and 1 large RU, wherein Each small RU contains 24 data subcarriers and 2 pilot subcarriers Waves, each large RU contains 234 data subcarriers and 8 pilot subcarriers.

When the 8 small RUs and 1 large RU are allocated to the same user equipment, and the system adopts 64QAM modulation, correspondingly, the user equipment is allocated 9 sub-resource block interleaving units, and the grouping unit will firstly be based on the size of the RUs. And the plurality of bits in the encoded data stream corresponding to the user equipment are grouped into a first bit group and a second bit group, and the first bit group corresponds to one large RU, that is, corresponding to one sub-resource interleaving unit, The two-bit group corresponds to eight small RUs, that is, corresponding to eight sub-resource block interleaving units.

As shown in FIG. 8, the grouping unit may generate a random driving code by using a random bit interleaver, where the random driving code includes a plurality of indicator bits, and the plurality of indicator bits are a plurality of bits in the encoded data stream corresponding to the user equipment. Correspondingly, the random driving code may include a first indicator bit “0”, a second indicator bit “1”, and the random driver code may be “01101110011101000101...”, wherein the first indicator bit “0” is used to indicate the indication. The bit corresponding to the bit is allocated to the first bit group; the second indicator bit "1" is used to indicate that the bit corresponding to the indicator bit is allocated to the second bit group. The ratio of the number of bits allocated to the first bit group to the number of bits allocated to the second bit group is N ₁ /N ₂ , where N is greater than the second bit group. ₁ = [RU ₁ /RU ₂ ]·M ₁ =[234/24]·1=10, N ₂ =M ₂ =8.

Optionally, the random driving code may include a first indicator bit and a second indicator bit, where the first indicator bit is “00”, and is used to indicate that the bit corresponding to the indicator bit is allocated to the first bit group; The second indication bit is "11" for indicating that the bit corresponding to the indication bit is allocated to the second bit group, and the present invention is not limited thereto.

In the embodiment of the present invention, for an OFDMA-based system, it is assumed that N RUs are allocated to the same user equipment together, and after S202, in S203, the xth bit group is taken as an example, and the group corresponds to at least Two sub-resource block interleaving units, the bits of the xth bit group may be interleaved in the following manner:

Each bit of the xth bit group is interleaved to a plurality of RUs corresponding to the user equipment in the xth bit group. Let m=log ₂ M be the system modulation order, and M be the constellation size, then the bit shunting unit can be allocated to RU1 to RUn bit by bit. Let s=max{1,m/2}, s denote the number of bits allocated continuously for each resource block interleaving unit, the bit shunt unit input is y _j , and the i th _RUs corresponding to the xth bit group are allocated The corresponding relationship of the bit number to j is as follows:

j=(i _RU -1)+n×k

Where 1 ≤ i _RU ≤ n, k represents the input bit number of each resource block interleaving unit, and k is a non-negative integer, and the value ranges from k=0, 1, .

It is further assumed that the xth bit group corresponds to 4 sub resource block interleaving units, and also corresponds to 4 RUs, or it is assumed that 4 simultaneous RUs of the same size are allocated to a single user equipment, and the number of data subcarriers in each RU For three, the modulation mode of the system is 64QAM, and there are 72 bits in the data stream of one OFDMA symbol bit. According to the above decomposition manner, the order of the bit data streams is (0, 1, ..., 71), and is decomposed into 4 RUs as shown in Table 1 above, and details are not described herein again.

The S203 may assign a set of interlaces to the RU1 to the RUn, and the corresponding relationship of the bit number assigned to the i-th _RU of the xth bit group is as follows:

Where k represents the input bit number of each resource block interleaving unit, k is a non-negative integer, s represents the number of bits allocated consecutively for each resource block interleaving unit, and n is the sub-resource block interleaving unit corresponding to the xth bit group The number.

According to the above decomposition method and the above assumption, the order of the bit data stream is (0, 1, ..., 71), and at least two bits can be decomposed into four RUs as shown in Table 2 above, and details are not described herein again.

Wherein S203 is not limited to the allocation of s bit sequences in the data stream to RU1 to RUn. For example, q RUs may be selected for alternate allocation. In this case, the i th _RUs corresponding to the xth bit group are allocated. The bit number to be obtained is j, and the corresponding relationship is:

among them

It is guaranteed to return to the beginning of the RU set when it is alternately allocated to the end of the RU set, so that the bits are allocated to all RUs, where k represents the bit number input by each resource block interleaving unit, k is a non-negative integer, and s represents continuous for each resource block. The number of bits allocated by the interleaving unit.

According to the above decomposition method and the above assumption, the order of the bit data stream is (0, 1, ..., 71), and q = 2, and at least two bits can be decomposed into 4 RUs as shown in Table 3 above. No longer:

The n RU interleaving units include an RU1 interleaving unit, an RU2 interleaving unit, an RU3 interleaving unit, and a RUn interleaving unit. The interleaving manner of each RU interleaving unit may adopt the following implementation manner:

Embodiment 1

In S204, each sub-resource block interleaving unit inputs the input bits in the order of the rows. The input and output are performed in a column manner, and each of the sub-resource block interleaving units after the discrete interleaving is serially output in a certain order or each sub-resource block interleaving unit after the discrete interleaving is output in parallel.

Each of the n RU interleaving units corresponding to the xth bit group adopts a row and column interleaver, that is, a travel list, and the parameter is (N _ROW , N _COL ). Let the bits before and after the interleaving be x _k and w _{i respectively} , where k is the bit position number before interleaving, the number before the x _k interleaving is the bit corresponding to the k bit position, i is the bit position number after the interleaving, and the number after w _i interleaving is For the bit corresponding to the position of the i bit, the specific interleaving formula is:

Where N _COL and N _ROW are the interleaving parameters processed by the known first interleaving processing unit.

Taking RU1 as an example, it is assumed that the number of data subcarriers in the RU is 12, and the modulation mode adopted by the system is 16QAM, so that N _COL = 4, N _ROW = 2 × 4 = 8, and the bit order before interleaving in RU1 is ( 0, 1, ..., 32), the bit sequence in the first RU after the interleaving is as shown in Table 4 above, and details are not described herein again.

After reading the bits in columns, the order of bits in RU1 is: (0,4,8,12,16,20,24,28,1,5,9,13,17,21,25,29,2,6, ...,27,31).

Embodiment 2

In S204, each sub-resource block interleaving unit cyclically shifts its inner bit according to the order of each sub-resource block interleaving unit, and the cyclically shifted bits are serially output in a certain order in each sub-resource block interleaving unit. Or parallel output after discrete interleaving. For the interleaving method of the specific implementation, refer to FIG. 9 above:

Each of the bit interleaving units alternately maps adjacent coded bits to low significant bits and high significant bits in the constellation. Let the bits before and after the interleaving be w _i and y _{j respectively} , where i is the bit position number before the interleaving, the number before the w _i interleaving is the bit corresponding to the i bit position, j is the bit position number after the interleaving, and the number after the interleaving is y _j The bit corresponding to the j-bit position, N _{CBPSS is} the number of bits after encoding the data stream, and the specific interleaving formula is:

Where N _CBPSS is the number of coded bits per spatial data stream.

Taking RU1 as an example, assuming that the number of data subcarriers in the RU is 12, the modulation mode adopted by the system is BPSK, and N _COL = 4, N _ROW = 3, and the above table is followed, the bit order in the RU1 after the interleaving is as above Table 5 shows that this is not repeated here.

The above-mentioned Embodiment 1 and Embodiment 2 can perform independent interleaving, that is, only interleaving once, or can be interleaved in combination, that is, interleaving according to Embodiment 1 and performing Interleaving 2, that is, interleaving twice.

Embodiment 3

In S204, each sub-resource block interleaving unit per sub-resource block interleaving unit alternately maps the bits output according to the column to the low-significant bits and the high-significant bits in the constellation diagram, and the cyclically shifted bits are in each sub-resource block interleaving unit. Each of the sub-resource block interleaving units serially output or discretely interleaved in a certain order is output in parallel.

In the third embodiment of the present invention, each of the sub-resource block interleaving units may also adopt an RU I/Q interleaving manner, in particular, each of the RUs respectively performs a rotation operation on the I/Q path bits corresponding to the constellation points, so as to prevent the coding bits from being continuously mapped to the constellation. For the medium and low effective bits, the specific interleaving method can refer to Figure 10 above.

FIG. 10 shows an example of an RU I/Q interleaving unit. If the modulation mode is 64QAM, all bit positions in the RU1 are unchanged, and the RU2 data s=m/2=3 bits are cyclically shifted to the right. Bit, RU3 data 3 bits are cyclically shifted to the right by 2 bits, and so on.

So s = max {1, m / 2}, the first I RU _RU th input bits

The RU I/Q interleaving unit outputs

Then the corresponding relationship is:

Where 1 ≤ i _RU ≤ n, k = 0, 1, ..., n is the number of RUs currently allocated by the user equipment in the xth bit group, m is the modulation order, and k is the i-th _RU RU The bit position number input before /Q interleaving, and j is the bit position number output after I/Q interleaving in the i-th _RU RU.

It is assumed that the xth bit group corresponds to 4 sub resource block interleaving units, and also corresponds to 4 RUs, or it is assumed that 4 same size RUs are allocated to a single user equipment, and the number of data subcarriers in each RU is 3 The modulation mode of the system is 64QAM, and there are 72 bits in the data stream of one OFDMA symbol bit. According to the above decomposition method, the sequence of each bit in the first and second RUs is as shown in Table 6 above, and details are not described herein again.

At the same time, the cyclic shift in the RU I/Q interleaving unit can also be performed to the left, at this time:

Where 1 ≤ i _RU ≤ n, k = 0, 1, 2, ....

The third embodiment of the present invention can be interleaved independently, and only interleaved once, or can be interleaved in combination with the first embodiment. That is, according to the first embodiment, the third embodiment is interleaved, that is, interleaved twice.

The total number of corresponding sub-resource block interleave units in all the bit groups in the embodiment of the present invention is N, that is, the number of RUs allocated by the user equipment. The total RU interleaving unit is located between the N sub-resource block interleaving units and the constellation mapper. Each of the N sub-resource block interleaving units is configured to discretely interleave the input bits and output the data to the total resource block in parallel. In the interleaving unit; S205 performs discrete interleaving on at least two sub-resource block interleaving units in the sub-resource block interleaving units in each bit group.

The S205 does not interleave the internal bits of each sub-RU interleaving unit, and performs an overall replacement operation only between the RUs corresponding to each bit group, thereby improving the frequency diversity coding gain of the system when the implementation complexity is low. The size of the total RU interleaving unit is much smaller than that of the conventional bit interleaver, so the interleaving rule can be pre-stored as a list, and the list is queried when performing the interleaving operation. At the same time, the RU interleaver can also perform interleaving using simple interleaving rules, such as a row and column interleaver. When the row and column interleaver is used, the number of rows and columns interleaver columns can be fixed first, and the number of rows can be gradually increased as the interleaving elements increase. At the same time, the number of rows and columns of interleaver rows can also be fixed first, and the number of columns can be gradually increased as the interleaving elements increase.

Wherein, when the number of the row and column interleaver columns is fixed to be 2, the interleaving rules are as shown in the following Table 7 when the elements to be interleaved are even and odd, and details are not described herein again. Where n is an even number and p is an even number. The table in the left table indicates that each row and column of the row and column interleaver can be filled when the number of elements to be interleaved is n, and the last element of the last row of the row and column interleaver is filled when the element to be interleaved is p. Empty, this element can be ignored during write and read operations.

It is assumed that the xth bit group corresponds to 4 sub resource block interleaving units, and also corresponds to 4 RUs, or it is assumed that 4 RUs of the same size are simultaneously allocated to a single user equipment, and the number of data subcarriers in each RU is Three, the modulation mode of the system is 64QAM, then there are 72 bits in the data stream of one OFDMA symbol bit. According to the above decomposition method, the sequence of each bit in the four RUs is as shown in Table 8 above, and details are not described herein again.

In addition, as described above, S204 and S205 can use independent interleavers, and can be processed by an interleaver.

In addition, in the foregoing embodiment, S205 is a parallel interleaving unit of each sub-resource block after discrete interleaving. Outputting to the total RU interleaving unit for interleaving between the RUs, the embodiment of the present invention may also adopt a total RU interleaving unit, and each sub-resource block interleaving unit is serially outputted to the constellation mapping unit in a certain order, specifically serial The output may be alternated or otherwise discrete, and the present invention will not be described in detail.

The OFDMAA-based WLAN system in the embodiment of the present invention adopts the above system architecture, not only solves the problem that the bit interleaver cannot be reused, but also the interleaver length based on the design is more flexible. When a single user equipment is allocated multiple RUs, the above The designed interleaving scheme requires excellent performance and is simple to implement.

For an OFDMA-based system, it is assumed that there are currently N RUs allocated to user equipments, and packet grouping, wherein the xth bit group corresponds to n sub-resource block interleaving units, and n sub-resource block interleaving units currently need to process n For the solution of the above problem, FIG. 14 is a schematic flowchart diagram of a third implementation manner of an interleaving method for a WLAN device according to the present invention; as shown in FIG. 14, the method includes:

S301: Perform error control coding (or channel coding) on the bit data stream to obtain a channel-coded data bit stream, where the step of performing may be an FEC encoder;

S302: The packet unit divides, according to the resource block RU to which the user equipment is currently allocated, the plurality of bits in the encoded data stream corresponding to the user equipment into multiple sets of input bits, and each group of the input bits of the plurality of input bits The number is determined by the size and number of the RU.

The same input bit group corresponds to at least one RU, and the at least one RU corresponds to the same number of sub-resource block interleave units, and the RUs corresponding to the same input bit group have the same size.

Optionally, S302 may further allocate the S301 processed single bit stream to the iss spatial data stream by using a bit splitter, and then group by the grouping unit, and in S302, execute the iss spatial data streams in a certain order. Assigned to each bit group separately. Assuming that the data sender has an iss spatial data stream, the splitter or processor allocates the channel-coded single-bit stream to the iss spatial data stream;

S303: The bit splitting unit inputs the bits of each bit group into the total bit shunting unit in units of r bits.

S304: The total bit splitting unit interleaves the r bits and allocates them to the plurality of sub-resource block interleaving units corresponding to each bit group in a certain order;

S305: Each of the plurality of sub-resource block interleaving units performs discrete interleaving on a plurality of bits input to each of the sub-resource block interleaving units.

S306: Mapping the interleaved bit stream to a constellation point in the modulation constellation to obtain a constellation symbol data stream;

S307: The cyclic shift delay unit performs a cyclic shift delay operation on each spatial data stream.

The method is different from the second embodiment of the interleaving method of the WLAN device in the embodiment of the present invention in FIG. 13 is:

S303, the output bit stream of the shunt is sequentially input into the total bit shunting unit in units of r bits, and S304 interleaves the r bits into a plurality of resource block interleaving units, and the processing flow of the plurality of resource block interleaving units in S305 The previous scheme is the same, wherein S304 can be performed by a total bit splitting unit or by a processor.

Suppose the xth bit group corresponds to 4 sub-resource block interleaving units, and also corresponds to 4 RUs, or assumes that 4 simultaneous RUs of the same size are allocated to a single user equipment, then the bit shunt unit will output the shunt at this time. The bit stream is input to the total bit stream unit in units of every 8 bits. For example, if the output bits of the bit shunting unit are (0, 1, 2, 3, 4, 5, 6, 7), the total bit shunting unit is interleaved as shown in Table 9 above, and the output bit order is from top to bottom. It is (0, 2, 4, 6, 1, 3, 5, 7). The 8 bits are written to the respective resource blocks, and then the 8 bits are read in to repeat the above process until each resource block is filled.

The OFDMAA-based WLAN system in the above embodiment adopts the above system architecture, not only solves the problem that the bit interleaver cannot be reused, but also the interleaver length based on the design is more flexible. When a single user equipment is allocated multiple RUs, the above design The interleaving scheme requires excellent performance and is simple to implement.

The WLAN device in the foregoing embodiment may be a base station or a user terminal or a processor or a chip that performs the foregoing method. The method in the foregoing embodiment is not limited to being executed by a physical device, and may be executed by software.

It should be understood that, in various embodiments of the present invention, the size of the sequence numbers of the above processes does not mean the order of execution, and the order of execution of each process should be determined by its function and internal logic, and should not be taken to the embodiments of the present invention. The implementation process constitutes any limitation.

Therefore, the method of the interleaving process in the embodiment of the present invention is applied to the OFDMA-based WLAN system, and the plurality of bits in the encoded data stream corresponding to the user equipment are used by the grouping unit according to the size and number of the RUs allocated by the current user equipment. Dividing into a plurality of sets of input bits; the bit shunting unit assigns bits included in each of the plurality of input bit groups to the order in a certain order Each sub-resource block interleave unit corresponding to each bit group; each sub-resource block interleave unit of the plurality of sub-resource block interleave units discretely interleaves a plurality of bits input to each of the sub-resource block interleave units, the interleaving scheme is applicable When a single user equipment is allocated multiple RUs, and the performance is excellent, the implementation is simple, thereby improving the performance of the system without increasing the complexity of the system.

The embodiment of the invention provides a schematic diagram of another WLAN device, as shown in FIG. The WLAN device includes an access point (AP) and a terminal, wherein the access point includes a transmitter and a processor 1. The terminal includes a receiver and a processor 2. The processor 1 can handle the functions of all the specific embodiments in FIG. 4 to FIG. 10. Similarly, the processor 2 performs corresponding processing according to the processing of the processing one. This is described in detail in the foregoing embodiment, and details are not described herein again.

In order to better present the effects of the design of the present invention, the advantages of the design of the present invention are compared by simulation in the following. Taking the FFT size of 256 points in the 20M bandwidth of the OFMDA system as an example, the 20M bandwidth is divided into 8 RUs, each of which contains 24 data subcarriers and 2 pilot subcarriers, and the 8 RUs are simultaneously Assigned to the same user device. Let SingleInt denote a prior art-interleaving scheme in which the parameter of the bit interleaver is (N _ROW , N _COL )=(8m, 24). BP + IntPerRU represents a prior art one interleaving scheme, and the second stage processing unit bit interleaver 1 has a parameter of (N _ROW , N _COL )=(3m, 8). PIS1 and PIS2 are respectively the second embodiment and the third embodiment of the present invention. When the user equipment is allocated to different RUs of the same size and number, the required module parameters of the interleaving scheme of the present invention are very simple, so The low hardware implementation complexity, as shown in Figure 16, compares the performance of the four interleaving schemes when encoding and modulating to MCS0 under the Channel D NLOS channel.

Those of ordinary skill in the art will appreciate that the elements and algorithm steps of the various examples described in connection with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both, for clarity of hardware and software. Interchangeability, the composition and steps of the various examples have been generally described in terms of function in the above description. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the solution. A person skilled in the art can use different methods for implementing the described functions for each particular application, but such implementation should not be considered to be beyond the scope of the present invention.

A person skilled in the art can clearly understand that, for the convenience and brevity of the description, the specific working process of the system, the device and the unit described above can refer to the corresponding process in the foregoing method embodiment, and details are not described herein again.

In the several embodiments provided herein, it should be understood that the disclosed systems, devices, and The method can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the unit is only a logical function division. In actual implementation, there may be another division manner, for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, or an electrical, mechanical or other form of connection.

The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the embodiments of the present invention.

In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above integrated unit can be implemented in the form of hardware or in the form of a software functional unit.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a standalone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention contributes in essence or to the prior art, or all or part of the technical solution may be embodied in the form of a software product stored in a storage medium. A number of instructions are included to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and the like. .

The above is only the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any equivalent person can be easily conceived within the technical scope of the present invention by any person skilled in the art. Modifications or substitutions are intended to be included within the scope of the invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims (32)

1. An interleaving processing apparatus is applied to an OFMDA-based WLAN system, and includes: a packet unit, a bit offloading unit, and a plurality of sub-resource block interleaving units, where

   The grouping unit is configured to divide, according to the resource block RU to which the user equipment is currently allocated, a plurality of bits in the encoded data stream corresponding to the user equipment into a plurality of groups of input bits, each of the plurality of groups of input bits The number of input bits is determined by the size and number of the RUs;

   The bit-splitting unit is configured to allocate each group of input bits of the plurality of groups of bits to at least one sub-resource block interleave unit corresponding to each group of input bits in a certain order;

   Each of the plurality of sub-resource block interleaving units is configured to discretely interleave a plurality of bits input into each sub-resource block interleaving unit.
2. The device according to claim 1, wherein the grouping unit is specifically configured to:

   Dividing the bit into a first bit group and a second bit group, where the first bit group corresponds to M ₁ sub-resource block interleaving units, and the second bit group corresponds to M ₂ sub-resource block interleave units, The size of the RU that needs to be processed by the sub-resource block interleaving unit corresponding to the first bit group is greater than the size of the RU currently required to be processed by the sub-resource block interleave unit corresponding to the second bit group, and M ₁ and M ₂ are positive integers. And M=M ₁ +M ₂ , where M is the number of RUs to which the user equipment is currently assigned.
3. The device according to claim 2, wherein the grouping unit is specifically configured to:

   Each of the allocation cycles of an allocation cycle allocates consecutive N ₁ bits to the first group of bits and allocates consecutive N ₂ bits to the second group of bits, where N ₁ =[RU ₁ /RU ₂ ··M ₁ , N ₂ =M ₂ , RU ₁ represents the size of the RU that the sub-resource block interleaving unit corresponding to the first bit group needs to process, and RU ₂ represents the sub-bit corresponding to the second bit group The size of the RU that the resource block interleaving unit currently needs to process, and [] represents the rounding operation.
4. The device according to claim 2, wherein the grouping unit is specifically configured to:

   Allocating a plurality of bits in the encoded data stream corresponding to the user equipment to the first bit group and the second bit group alternately;

   Stop assigning bits to the first bit group when the first bit group is allocated N ₁ bits, where N ₁ =[RU ₁ /RU ₂ ]·M ₁ , and RU ₁ represents the first bit The size of the RU that the sub-resource block interleaving unit corresponding to the bit group needs to process, the RU ₂ indicates the size of the RU that the sub-resource block interleave unit corresponding to the second bit group needs to process, and [] represents a rounding operation;

   When the second bit group is allocated N ₂ bits, stopping allocating bits into the second bit group, where N ₂ = M ₂ ;

   When the first bit group is allocated N ₁ bits and the second bit group is allocated N ₂ bits, the first bit group and the second bit group are alternately allocated A plurality of bits in the encoded data stream corresponding to the user equipment.
5. The device according to claim 2, wherein the grouping unit is specifically configured to:

   Generating a random driving code, where the random driving code includes a plurality of indicator bits, the plurality of indicator bits are in one-to-one correspondence with a plurality of bits in the encoded data stream corresponding to the user equipment, and each of the plurality of indicator bits The indicator bit is configured to allocate a bit corresponding to each indicator bit to the first bit group or the second bit group, wherein a number of bits allocated to the first bit group is allocated to the The ratio of the number of bits of the second bit group is N ₁ /N ₂ , where N ₁ =[RU ₁ /RU ₂ ]·M ₁ , N ₂ =M ₂ , and RU ₁ represents the child corresponding to the first bit group The size of the RU that the resource block interleaving unit currently needs to process, the RU ₂ indicates the size of the RU that the sub-resource block interleaving unit corresponding to the second bit group needs to process, and [] represents the rounding operation.
6. The apparatus according to claim 5, wherein the random driving code comprises a first indicator bit and a second indicator bit, wherein the first indicator bit is used to allocate a bit corresponding to the first indicator bit To the first bit group, the second indicator bit is used to allocate a bit corresponding to the first indicator bit to the second bit group.
7. The apparatus according to any one of claims 1 to 6, wherein the bit shunting unit is configured to sequentially or alternately allocate every s bits in each of the input bit groups to each of the input bits The at least two sub-resource block interleaving units corresponding to the group, where s is a positive integer greater than zero.
8. The device of claim 7 wherein:

   If s is 1, the output sequence number of the bit allocated by the ith _{RU RU} corresponding to the xth bit group is expressed as:

   j=(i _RU -1)+n·k

   If s is greater than 1, the output sequence number of the bit allocated by the ith _{RU RU} corresponding to the xth bit group is expressed as:

   

   Where k is the input number of the bit to which the ith _RU RU is allocated, k is a non-negative integer, and n is the number of sub-resource block interleaving units corresponding to the x-th bit group.
9. Apparatus according to any one of claims 1 to 8, wherein said apparatus A total bit splitting unit is further included, wherein an output bit stream of the bit shunting unit is sequentially input to a total bit shunting unit in units of r bits, and the total bit shunting unit is configured to interleave the r bits Allocating to the plurality of sub-resource block interleaving units in a certain order, where r is a positive integer.
10. The apparatus according to any one of claims 1 to 8, wherein the apparatus further comprises a total resource block interleaving unit, wherein the plurality of sub-resource block interleaving units input the output bits to the total resource block interleaving unit The total resource block interleaving unit is configured to perform discrete interleaving on at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group.
11. The apparatus according to claim 10, wherein the total resource block interleaving unit is specifically configured to:

    Performing discrete interleaving on at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group according to a preset list; or

    And interleaving at least two sub-resource block interleave units in the sub-resource block interleaving unit corresponding to each bit group according to a row-column rule.
12. The apparatus according to claim 11, wherein the total resource block interleaving unit is further configured to:

    When the number of sub-resource block interleaving units corresponding to the xth bit group is an odd number greater than 1, the last position of the interleaved unit of the total resource block is vacated.
13. The apparatus according to any one of claims 1 to 12, wherein the plurality of resource block interleaving units are further configured to:

    The discretely interleaved plurality of bits are serially outputted or output in parallel in a certain order.
14. The apparatus according to claim 13, wherein each of the plurality of sub-resource block interleaving units is specifically configured to:

    The bits in each of the sub-resource block interleaving units are cyclically shifted according to the order of each of the sub-resource block interleaving units.
15. The apparatus according to claim 14, wherein each of the sub-resource block interleaving units is specifically configured to:

    The bits in each of the sub-resource block interleaving units are cyclically shifted by s bits to the right or left according to the order of the RUs that each sub-resource block interleaving unit currently needs to process.
16. The device of claim 15 wherein:

    And according to the sequence of the RUs that each of the sub-resource block interleaving units currently need to process, the bits in each of the sub-resource block interleaving units are cyclically shifted to the right by s bits, and the ith _RU- th RU corresponding to the x-th bit group is The correspondence between the input bit and the output bit j is:

    

    The order of the interleaving block of each sub-resource unit is currently in need of treatment of RU, the interleaved bits of each sub-resource blocks in the unit s-bit left cyclic shift is the x-th bit group corresponding to the first _RU I The correspondence between the RU input bits and the output bits j is:

    

    Where 1 ≤ i _RU ≤ n, k = 0, 1, ..., n is the number of RUs currently allocated by the user equipment, m is a modulation order, and k is the position of the input bits of the ith _RU RUs a sequence number, j is a position number of an output bit of the i-th _RU unit, and n is a number of sub-resource block interleave units corresponding to the x-th bit group.
17. An interleaving processing method is applied to an OFMDA-based WLAN system, and includes:

    The grouping unit divides a plurality of bits in the encoded data stream corresponding to the user equipment into a plurality of sets of input bits according to the resource block RU to which the user equipment is currently allocated, and each of the plurality of input bits of the plurality of input bits The number is determined by the size and number of the RUs;

    The bit splitting unit allocates each of the plurality of sets of bits to the at least one sub-resource block interleaving unit corresponding to each set of input bits in a certain order;

    The sub-resource block interleaving unit discretely interleaves a plurality of bits input into each sub-resource block interleaving unit.
18. The apparatus according to claim 17, wherein the grouping unit divides a plurality of bits in the encoded data stream corresponding to the user equipment into a plurality of groups of input bits according to the resource block RU to which the user equipment is currently allocated. ,include:

    The grouping unit divides the plurality of bits into a first bit group and a second bit group, where the first bit group corresponds to M ₁ sub-resource block interleaving units, and the second bit group corresponds to M ₂ sub-resources a block interleaving unit, the size of the RU that needs to be processed by the sub-resource block interleaving unit corresponding to the first bit group is larger than the size of the RU currently required to be processed by the sub-resource block interleave unit corresponding to the second bit group, M ₁ and M ₂ is a positive integer, and M = M ₁ + M ₂ , where M is the number of RUs to which the user equipment is currently assigned.
19. The apparatus according to claim 18, wherein the grouping unit divides a plurality of bits in the encoded data stream corresponding to the user equipment into a plurality of sets of input bits according to the resource block RU to which the user equipment is currently allocated. ,include:

    Each of the allocation cycles of an allocation cycle allocates consecutive N ₁ bits to the first group of bits and allocates consecutive N ₂ bits to the second group of bits, where N ₁ =[RU ₁ /RU ₂ ··M ₁ , N ₂ =M ₂ , RU ₁ represents the size of the RU that the sub-resource block interleaving unit corresponding to the first bit group needs to process, and RU ₂ represents the sub-bit corresponding to the second bit group The size of the RU that the resource block interleaving unit currently needs to process, and [] represents the rounding operation.
20. The apparatus according to claim 18, wherein the grouping unit divides a plurality of bits in the encoded data stream corresponding to the user equipment into a plurality of sets of input bits according to the resource block RU to which the user equipment is currently allocated. ,include:

    Allocating a plurality of bits in the encoded data stream corresponding to the user equipment to the first bit group and the second bit group alternately;

    Stop assigning bits to the first bit group when the first bit group is allocated N ₁ bits, where N ₁ =[RU ₁ /RU ₂ ]·M ₁ , and RU ₁ represents the first bit The size of the RU that the sub-resource block interleaving unit corresponding to the bit group needs to process, the RU ₂ indicates the size of the RU that the sub-resource block interleave unit corresponding to the second bit group needs to process, and [] represents a rounding operation;

    When the second set of bits is allocated N ₂ bits, stopping allocating bits into the second set of bits, where N ₂ = M ₂ ;

    When the first bit group is allocated N ₁ bits and the second bit group is allocated N ₂ bits, the first bit group and the second bit group are alternately allocated A plurality of bits in the encoded data stream corresponding to the user equipment.
21. The apparatus according to claim 18, wherein the grouping unit divides a plurality of bits in the encoded data stream corresponding to the user equipment into a plurality of sets of input bits according to the resource block RU to which the user equipment is currently allocated. ,include:

    Generating a random driving code, where the random driving code includes a plurality of indicator bits, the plurality of indicator bits are in one-to-one correspondence with a plurality of bits in the encoded data stream corresponding to the user equipment, and each of the plurality of indicator bits The indicator bit is configured to allocate a bit corresponding to each indicator bit to the first bit group or the second bit group, wherein a number of bits allocated to the first bit group is allocated to the The ratio of the number of bits of the second bit group is N ₁ /N ₂ , where N ₁ =[RU ₁ /RU ₂ ]·M ₁ , N ₂ =M ₂ , and RU ₁ represents the child corresponding to the first bit group The size of the RU that the resource block interleaving unit currently needs to process, the RU ₂ indicates the size of the RU that the sub-resource block interleaving unit corresponding to the second bit group needs to process, and [] represents the rounding operation.
22. The apparatus according to claim 21, wherein the random driving code comprises a first indicator bit and a second indicator bit, wherein the first indicator bit is used to allocate a bit corresponding to the first indicator bit To the first bit group, the second indicator bit is used to allocate a bit corresponding to the first indicator bit to the second bit group.
23. The method according to any one of claims 17 to 22, wherein the bit splitting unit sequentially or alternately assigns every s bits in each of the input bit groups to each of the input bit groups. Of at least two sub-resource block interleaving units, where s is a positive integer greater than zero.
24. The device according to claim 23, wherein

    If s is 1, the output sequence number of the bit allocated by the ith _{RU RU} corresponding to the xth bit group is expressed as:

    j=(i _RU -1)+n·k

    If s is greater than 1, the output sequence number of the bit allocated by the ith _{RU RU} corresponding to the xth bit group is expressed as:

    

    Where k is the input number of the bit to which the ith _RU RU is allocated, k is a non-negative integer, and n is the number of sub-resource block interleaving units corresponding to the x-th bit group.
25. The method according to any one of claims 17 to 24, wherein the method further comprises:

    The output bit stream of the bit shunting unit is sequentially input to the total bit shunting unit in units of r bits;

    The total bit offloading unit interleaves the r bits and respectively allocates them to the plurality of sub-resource block interleaving units in a certain order, where r is a positive integer.
26. The method according to any one of claims 17 to 24, wherein the method further comprises:

    The plurality of sub-resource block interleaving units input the output bits into the total resource block interleaving unit;

    The total resource block interleaving unit performs discrete interleaving on at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group.
27. The method of claim 26, wherein said total resource block interleaving list Performing discrete interleaving on at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group, including:

    And the total resource block interleaving unit performs discrete interleaving on at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group according to a preset list; or

    The total resource block interleaving unit interleaves at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group according to a row-column rule.
28. The apparatus according to claim 27, wherein the total resource block interleaving unit interleaves at least two sub-resource block interleaving units in the sub-resource block interleaving unit corresponding to each bit group according to a row-column rule, including :

    When the number of sub-resource block interleaving units corresponding to the xth bit group is an odd number greater than 1, the last position of the interleaved unit of the total resource block is vacated.
29. The apparatus according to any one of claims 17 to 28, wherein each of the plurality of sub-resource block interleaving units discretizes a plurality of bits input to each of the sub-resource block interleaving units Interwoven, including:

    The discretely interleaved plurality of bits are serially outputted or output in parallel in a certain order.
30. The method according to claim 29, wherein each of the plurality of sub-resource block interleaving units discretely interleaves a plurality of bits input to each of the sub-resource block interleaving units, including:

    Each of the plurality of sub-resource block interleaving units cyclically shifts bits in each of the sub-resource block interleaving units according to an order of the each sub-resource block interleaving unit.
31. The method according to claim 30, wherein each of the plurality of sub-resource block interleaving units is configured to interleave each sub-resource block according to an order of each of the sub-resource block interleaving units The bits are cyclically shifted, including:

    Each of the sub-resource block interleaving units cyclically shifts bits in each of the sub-resource block interleaving units to the right or left by s bits according to the order of the RUs that each sub-resource block interleave unit currently needs to process.
32. The method of claim 31, wherein

    According to the sequence of the RUs that each sub-resource block interleaving unit currently needs to process, the bits in each of the sub-resource block interleaving units are cyclically shifted to the right by s bits, and the ith _RU- th RU corresponding to the x-th bit group is The correspondence between the input bit and the output bit j is:

    

    According to the order of the RUs that each sub-resource block interleaving unit currently needs to process, the bits in each of the sub-resource block interleaving units are cyclically shifted to the left by s bits, and the ith _RU- th RU corresponding to the x-th bit group is The correspondence between the input bit and the output bit j is:

    

    Where 1 ≤ i _RU ≤ n, k = 0, 1, ..., n is the number of RUs currently allocated by the user equipment, m is a modulation order, and k is the position of the input bits of the ith _RU RUs a sequence number, j is a position number of an output bit of the i-th _RU unit, and n is a number of sub-resource block interleave units corresponding to the x-th bit group.

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