WO2016132434A1 - Circuit device, display device, and wiring correction method - Google Patents
Circuit device, display device, and wiring correction method Download PDFInfo
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- WO2016132434A1 WO2016132434A1 PCT/JP2015/054136 JP2015054136W WO2016132434A1 WO 2016132434 A1 WO2016132434 A1 WO 2016132434A1 JP 2015054136 W JP2015054136 W JP 2015054136W WO 2016132434 A1 WO2016132434 A1 WO 2016132434A1
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- wiring
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- spare
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
Definitions
- the present invention relates to a circuit device including a spare wiring for correcting a defect in a signal line, a display device including the circuit device, and a wiring correction method for the circuit device.
- a display device such as an active matrix type liquid crystal display device or an organic EL display device includes a TFT substrate on which a TFT (Thin-Film-Transistor) is formed, and a plurality of source signal lines and gate signal lines are arranged in a matrix on the TFT substrate. It is arranged in.
- a pixel electrode is connected to the drain electrode of each TFT, a source signal line is connected to the source electrode, and a gate signal line is connected to the gate electrode.
- a source signal generation circuit is connected to the source signal line, and a gate signal generation circuit is connected to the gate signal line.
- the TFT is controlled to be turned on or off by supplying a gate signal from the gate signal generation circuit to the gate signal line. By supplying a source signal from the source signal generation circuit to the source electrode of each TFT that is turned on, the potential of the pixel electrode is controlled and an image is displayed.
- the source signal line or the gate signal line has a defect such as a disconnection or a short circuit due to dust entrainment at the time of film formation of the TFT substrate or etching using a resist mask in which a pinhole is generated May occur.
- a defect occurs in the source signal line or the gate signal line, the signal is not correctly transmitted prior to the defective portion, so that a display defect occurs on the display screen.
- Patent Document 1 discloses a display device capable of bypassing a signal and transmitting it before a defective portion by connecting a signal line in which a defect has occurred and a spare wiring intersecting the signal line. Yes. Specifically, in the display device of Patent Document 1, the above-described display defect can be corrected by short-circuiting the signal line and the spare wiring in which the defect has occurred at two places before and after the defective place.
- the number of signal lines that can be corrected among a plurality of signal lines connected to the same signal generation circuit is limited to one per spare wiring.
- the circuit device crosses a plurality of signal lines that transmit signals and the signal lines in an insulated state, and reserve wiring for transmitting the signals when the signal lines are defective is arranged. And a plurality of signal generation circuits for generating the signals, wherein the plurality of signal lines are divided into a plurality of groups and connected to the signal generation circuits different for each of the groups.
- the spare wiring is electrically connected to the first spare wiring arranged on the circuit board so as to intersect the signal lines included in at least two of the groups, and the circuit
- a second auxiliary wiring arranged to intersect the signal line in an insulated state on the substrate, and at least one of the first auxiliary wirings is provided for each of the groups, and the first auxiliary wiring is provided.
- Wiring and Characterized in that it comprises a connection line for electrically connecting the serial second preliminary wiring.
- the first spare wiring is arranged so as to intersect with the signal lines connected to the plurality of signal generation circuits, the plurality of signals in the group connected to the same signal generation circuit. Even when a defect occurs in a line, it is possible to cope with the defect correction of up to two signal lines in the same group for each first spare wiring.
- the circuit device according to the present invention is characterized in that the first spare wiring is further connected to the connection line at an end.
- connection line is also connected to the end portion of one first spare wiring, even in the group of signal lines arranged at both ends, one first spare wiring is in the same group. It is possible to cope with the correction of defects of up to two signal lines.
- the first short circuit portion in which the signal line having the disconnection portion and the first spare wiring are short-circuited, and the signal line having the disconnection portion and the second preliminary wiring are short-circuited. And a second short circuit portion, wherein a part of the first spare wiring is cut off.
- the signal line having a defect and the first spare wiring that is short-circuited are disconnected, and the signal is transmitted. Therefore, even when a plurality of signal lines have defects, it is possible to prevent signals from being mixed due to disconnection, and to transmit signals by bypassing each defect.
- the first auxiliary wiring is cut between the two first short-circuit portions in the same group and is closest to the first short-circuit portion and is electrically connected to the first short-circuit portion. It is cut
- a different signal flows through each of the pieces of the first spare wiring that is short-circuited with two of the plurality of signal lines having the disconnection portion in the same group. Therefore, even when a plurality of signal lines in a group connected to the same signal generation circuit are defective, a defect of up to two signal lines in the same group per one first spare wiring Can be bypassed to transmit a signal.
- a display device includes any one of the circuit devices described above, and the signal line transmits an image signal.
- the display device since the display device includes the circuit device, even if a defect occurs in a plurality of signal lines in the same group, two display devices in the same group per one first spare wiring. It is possible to cope with the correction of the defect of the signal line up to this point.
- the circuit device wiring correction method when a plurality of the signal lines belonging to the same group of the circuit device according to any one of the above are defective, the plurality of the signals having the defect Two of the lines and the first spare wiring intersecting with the two signal lines are short-circuited at the first short-circuit portion, and the first spare wiring is cut between the two first short-circuit portions. And a connection point between the closest connection line electrically connected to the first short-circuit portion and a connection point closest to the connection point on the opposite side of the first short-circuit portion. The first spare wiring is cut between the first and second wirings.
- FIG. 1 is a perspective view showing a display device according to Embodiment 1.
- FIG. 1 is a schematic diagram illustrating a circuit device according to a first embodiment.
- FIG. 3 is a schematic diagram illustrating a wiring correction method for the circuit device according to the first embodiment.
- FIG. 3 is a schematic diagram illustrating a wiring correction method for the circuit device according to the first embodiment.
- FIG. 3 is a schematic diagram illustrating a wiring correction method for the circuit device according to the first embodiment.
- FIG. 3 is a schematic diagram illustrating a wiring correction method for the circuit device according to the first embodiment. It is a schematic diagram which shows the circuit device which concerns on Embodiment 2, and the correction method of the wiring.
- FIG. 1 is a perspective view showing a display device 100 according to the first embodiment.
- the display device 100 is, for example, an active matrix liquid crystal display device.
- the display device 100 includes a circuit device 200 including a rectangular display panel 300 on which an image is displayed.
- the display device 100 further includes a television tuner 20 that receives a television broadcast signal.
- a television broadcast signal received by the television tuner 20 that is, an image signal is processed by the circuit device 200, and an image is displayed on the display panel 300.
- the display device 100 may further include an image signal input terminal (not shown) and display an image based on an image signal input to the image signal input terminal.
- a glass-made rectangular TFT substrate 1 (see FIG. 2) and a glass color filter substrate (not shown) having substantially the same shape as the TFT substrate 1 are opposed to each other. And the color filter substrate are filled with a liquid crystal material.
- FIG. 2 is a schematic diagram showing the circuit device 200 according to the first embodiment.
- a plurality of source signal lines 8 and gate signal lines (not shown) formed of a metal such as copper or aluminum are formed in a matrix.
- the plurality of source signal lines 8 are arranged in parallel to the short side of the TFT substrate 1.
- the plurality of gate signal lines are arranged in parallel to the long side of the TFT substrate 1.
- the source signal line 8 and the gate signal line are orthogonal to each other in the display area 1a.
- the gate signal line is formed in a lower layer separated from the source signal line 8 by a gate insulating film.
- the gate signal line and the source signal line 8 transmit a gate signal and a source signal for displaying an image on the display panel 300, respectively.
- a TFT is formed in the vicinity of each intersection of the source signal line 8 and the gate signal line.
- the source electrode of each TFT is connected to the source signal line 8
- the gate electrode is connected to the gate signal line
- the drain electrode is connected to the pixel electrode.
- the pixel electrode is formed in each rectangular region separated by the gate signal line and the source signal line 8 on the TFT substrate 1 by a transparent conductive film such as ITO (Indium Tin Oxide), and is paired with the drain electrode of each TFT. Connected with one.
- One common electrode facing each pixel electrode is formed on the color filter substrate by a transparent conductive film such as ITO.
- the gate signal lines, TFTs, and pixel electrodes are not shown, and only a part of the source signal lines 8 is shown.
- a plurality of source-side flexible printed circuit boards 2a and gate-side flexible printed circuit boards 2b are connected to the TFT substrate 1, respectively.
- a strip-shaped source control board 4 on which a control circuit (not shown) for controlling a source signal is mounted via the plurality of source-side flexible printed circuit boards 2a is arranged such that the longitudinal direction is one long side of the TFT substrate 1.
- a strip-shaped gate control substrate 5 on which a control circuit (not shown) for controlling a gate signal is mounted via a plurality of gate-side flexible printed circuit boards 2b has a longitudinal direction shorter than that of the TFT substrate 1. Connected along the side.
- the source side flexible printed circuit board 2a, the gate side flexible printed circuit board 2b, and the TFT substrate 1 are bonded to each other by an adhesive film such as an anisotropic conductive film.
- the source side flexible printed circuit board 2a and the gate side flexible printed circuit board 2b are bonded to the source control board 4 and the gate control board 5 by an adhesive film such as an anisotropic conductive film.
- a wiring connection portion 11 is formed on a portion of the source side flexible printed circuit board 2a to be bonded to the TFT substrate 1. Wirings such as the source signal line 8 are connected between the source-side flexible printed circuit board 2a and the TFT substrate 1 via the wiring connecting part 11.
- the gate side flexible printed circuit board 2b and the TFT substrate 1 are also connected by the same method.
- a source driver chip 3 indicated by a dotted line incorporating a source driver 30 is mounted, for example, by a COF (chip-on-film) system.
- gate driver chips each incorporating a gate driver are mounted on each gate side flexible printed circuit board 2b by the COF method.
- a plurality of source signal lines 8 are connected to the output terminal of the source driver 30. That is, a part of the source signal line 8 is arranged on the source side flexible printed circuit board 2a.
- all the source signal lines 8 are divided into a plurality of groups, with a plurality of source signal lines 8 connected to the same source driver 30 as one group.
- a gate signal line is connected to each output terminal of the gate driver.
- the gate driver generates a gate signal in accordance with a gate driver control signal input from the control circuit on the gate control substrate 5, and supplies the generated gate signal to each connected gate signal line.
- the source driver 30 generates a source signal according to the source driver control signal input from the control circuit on the source control board 4 and supplies the generated source signal to each connected source signal line 8.
- the source control board 4 and the gate control board 5 are connected to a signal circuit board 6 on which a controller chip 7 is mounted.
- the controller chip 7 is connected to the television tuner 20 or an external circuit (not shown), and an image signal is input from the television tuner 20 or the external circuit.
- the controller chip 7 generates a source control signal and a gate control signal according to the input image signal, and outputs them to the control circuits of the source control board 4 and the gate control board 5, respectively.
- the TFT device 1, the source side flexible printed circuit board 2a, the gate side flexible printed circuit board 2b, the source control board 4, the gate control board 5, and the signal circuit board 6 constitute a circuit device 200.
- the circuit device 200 includes a spare wiring 9 for the source signal line 8.
- the spare wiring 9 is made of a metal such as copper or aluminum, and is arranged so that when the source signal line 8 has a defect, the source signal can be transmitted around the defective portion.
- the spare wiring 9 includes a first spare wiring 90 and a second spare wiring 91.
- the first auxiliary wiring 90 is arranged along the long side of the TFT substrate 1 on the side where the source-side flexible printed circuit board 2a is connected to the peripheral region 1b outside the display region 1a on the TFT substrate 1, for example, Two are arranged.
- the first spare wiring 90 is arranged so as to cross all the source signal lines 8 across the spare wiring insulating film from end to end of the long side.
- the source-side flexible printed circuit board 2a side is the upper first spare wire 90a, and the other is the lower first spare wire 90b.
- second auxiliary wirings 91 are arranged in the peripheral region 1b along the long side opposite to the side where the source side flexible printed circuit board 2a of the TFT substrate 1 is connected.
- the second spare wiring 91 is arranged so as to intersect all the source signal lines 8 across the spare wiring insulating film across the long side.
- the first spare wiring 90 and the second spare wiring 91 are electrically connected via the spare wiring connecting line 92, the first relay wiring 93, and the second relay wiring 94.
- the spare wiring connection lines 92 are arranged at both ends in the long side direction of the TFT substrate 1 on the source side flexible printed circuit board 2a so as to be perpendicular to the long side.
- the spare wiring connection lines 92 are arranged from the peripheral region 1b to the source-side flexible printed circuit board 2a via the spare wiring connection terminals 12 provided at the left and right ends on each wiring connection portion 11.
- One end of the right auxiliary wiring connecting line 92 on each source-side flexible printed circuit board 2a is electrically connected to the upper first auxiliary wiring 90a at the connection point 13, for example.
- one end of the left auxiliary wiring connection line 92 on each source-side flexible printed circuit board 2a is electrically connected to the lower first auxiliary wiring 90b at the connection point 13, respectively.
- a buffer amplifier 10 that amplifies a signal current is mounted on the source driver chip 3 in the middle of the spare wiring connection line 92. That is, a part of the spare wiring connection line 92 is arranged in the source driver chip 3.
- the same number of first relay wirings 93 as the second auxiliary wirings 91 are arranged on the source control board 4 from end to end in the longitudinal direction.
- the other end of the spare wiring connection line 92 is connected to the first relay wiring 93.
- the two spare wiring connection lines 92 on the same source-side flexible printed circuit board 2a are connected to different first relay wirings 93, respectively.
- the spare wiring connection lines 92 arranged on the adjacent source-side flexible printed circuit boards 2 a are connected to different first relay wirings 93.
- the same number of second relay wirings 94 as the second preliminary wirings 91 are arranged on the gate control substrate 5 from end to end in the longitudinal direction.
- the second relay wiring 94 is connected one-to-one to the first relay wiring 93 at one end and to the second spare wiring 91 at the other end.
- signals can be transmitted from each first spare wiring 90 to each second spare wiring 91.
- the first spare wiring 90, the second spare wiring 91, the spare wiring connecting line 92, the first relay wiring 93, and the second relay wiring 94 are each formed of a metal such as copper or aluminum.
- the controller chip 7 generates a gate driver control signal and a source driver control signal according to the input image signal, and generates the generated gate driver control signal and source driver control signal, respectively. Output to the gate driver and source driver 30.
- the gate driver selects one of the connected gate signal lines according to the gate driver control signal, and supplies a gate signal to the selected gate signal line. As a result, all the TFTs in a row in the left-right direction connected to the gate signal line, that is, in the longitudinal direction of the TFT substrate 1 are turned on.
- the source signal is input from the source driver 30 to the source terminal of the TFT turned on by the gate signal.
- the voltage between the pixel electrode connected to the drain electrode of the TFT turned on and the common electrode is controlled by the input source signal, and the arrangement of liquid crystal molecules between the pixel electrode and the common electrode is controlled.
- the Therefore, the light transmittance of each pixel of the display panel 300 is controlled.
- a backlight not shown
- an image according to the image signal is displayed on the display panel 300.
- a circuit may be formed in a state where the source signal line 8 has a defect such as disconnection or short circuit.
- a defect occurs due to dust entrainment during film formation of the TFT substrate 1 or use during etching of a resist mask in which pinholes are generated.
- a defect occurs in the source signal line 8
- a signal is not correctly supplied to the TFT connected to the defective source signal line 8, so that the voltage between the pixel electrode and the common electrode is not correctly controlled, and the display screen is displayed. Display defect occurs.
- a spare wiring 9 for correcting a defect of the source signal line 8 is provided.
- the wiring can be corrected in the wiring correction process to prevent a display defect due to the defect.
- FIG. 3 is a schematic diagram showing a wiring correction method of the circuit device 200 according to the first embodiment.
- the four source signal lines 8 in three groups have the disconnection point X, and the maximum number of source signal lines 8 in which the disconnection per group occurs is two.
- the source signal from the source driver 30 is not transmitted before the disconnection point X of the source signal line 8 having the disconnection point X.
- the preliminary wiring insulating film is melted and removed by a laser, and at the same time, the wiring is melted.
- the first auxiliary wiring 90a is short-circuited to form a first short-circuit portion Y1.
- the source signal line 8 and the lower first spare wiring 90b are short-circuited to form the first short circuit portion Y2. Form.
- each source signal line is short-circuited with a different first spare wiring 90.
- the upper first spare wiring 90a is cut at a cutting point Z1 between the group having the source signal line 8 having the first short-circuit portion Y1 and the groups on both sides thereof. More specifically, the upper first auxiliary wiring 90a is connected to the connection point 13 with the auxiliary wiring connecting line 92 arranged on the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y1 is arranged, It cut
- the lower first spare wiring 90b has a connection point 13 with a spare wiring connection line 92 arranged on the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y2 is arranged, It is cut at a cutting point Z2 between the connection point 13 on the left side. Further, the lower first auxiliary wiring 90b is cut at a cutting point Z2 between the first short-circuit portion Y2 and the connection point 13 on the right side of the first short-circuit portion Y2.
- the cut portions Z1 and Z2 form independent pieces of the upper first spare wire 90a and the lower first spare wire 90b for each group having the source signal line 8 having the broken portion X.
- the source signal line 8 having the disconnection point X and the upper first spare wiring 90a connected to the source signal line 8 which crosses the source signal line 8 below the disconnection point X and is short-circuited by the first short-circuit portions Y1 and Y2 are connected.
- the second auxiliary wiring 91 electrically connected to the side first auxiliary wiring 90b is short-circuited at the second short-circuit portion Y3.
- the source signal is sent from the upper side of the disconnection point X of the source signal line 8 to the second spare line 91 through the first spare line 90 short-circuited to the source signal line 8 by the first short-circuit portions Y1 and Y2. Is transmitted. Further, the source signal is transmitted to the lower side of the disconnection point X of the source signal line 8 through the second short-circuit portion Y3. At this time, since the current of the source signal is amplified by the buffer amplifier 10 provided in the middle of the spare wiring connection line 92, the source transmitted by the spare wiring 9 which is longer and has a higher load than the source signal line 8. Signal attenuation is prevented. Therefore, even when the source signal line 8 has the broken portion X, it is possible to prevent display defects from occurring on the display screen.
- the first spare wiring 90 is divided into independent pieces for each group of the source signal lines 8 by the cut portions Z1 and Z2, a plurality of different source signals can be prevented from interfering on the first spare wiring 90. .
- the first short-circuit portion Y1, Y2 needs to be selected.
- the upper limit of the number of source signal lines 8 whose disconnection can be corrected in the entire TFT substrate 1 is equal to the number of second spare wirings 91 provided.
- FIG. 3 shows a case where the number of source signal lines 8 in which the disconnection per same group has occurred is two at the maximum, but each first spare wiring 90 has a disconnection point X in the same group. Modifications corresponding to up to two source signal lines 8 are possible.
- FIG. 4 is a schematic diagram illustrating a wiring correction method for the circuit device 200 according to the first embodiment.
- disconnection portions X are generated in the three source signal lines 8 in the leftmost group.
- the upper first spare wiring 90a is short-circuited by the laser at one of the source signal lines 8 having the disconnection point X and the first short-circuit portion Y4.
- the other lower first spare wiring 90b is short-circuited by a laser at the remaining two of the source signal lines 8 having the disconnection point X and the two first short-circuit portions Y5.
- the upper first auxiliary wiring 90a is connected to the connection point 13 of the auxiliary wiring connecting line 92 arranged on the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y4 is arranged, and the connection on the right side thereof. It is cut at a cutting point Z3 between the point 13 and the point 13. The cut source Z3 prevents the same source signal from being transmitted to the plurality of spare wiring connection lines 92.
- the lower first auxiliary wiring 90b is cut at a cutting point Z4 between the two first short-circuit portions Y5. Further, the lower first auxiliary wiring 90b is connected to the connection point 13 of the closest auxiliary wiring connecting line 92 that is electrically connected to the first short-circuit part Y5, and the first short-circuit part Y5 is connected to the connection point 13. It is cut at a cutting point Z5 between the connection point 13 and the spare wiring connection line 92 that is closest to the opposite side. In other words, the lower first auxiliary wiring 90b is connected to the auxiliary wiring connecting line 92 on the flexible printed circuit board 2a on the right side of the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y5 is arranged. It is cut at a cutting point Z5 between the connection point 13 and the connection point 13 on the right side.
- the fragment of the lower first spare wiring 90b on the left side of the cut portion Z4 is the end of the lower first spare wiring 90b. Therefore, the fragment is the connection point 92 on the flexible printed circuit board 2a on which the source signal line 8 short-circuited at the first short-circuit portion Y5 is arranged at the connection point 13 at the end of the lower first spare wiring 90b. It is connected to the.
- a fragment on the right side of the cut portion Z4 is connected to a spare wiring connection line 92 on the flexible printed circuit board 2a adjacent to the flexible printed circuit board 2a on which the source signal line 8 short-circuited at the first short-circuit portion Y5 is arranged. 13 is connected.
- the second auxiliary wiring 91 electrically connected to the side first auxiliary wiring 90b is short-circuited at the second short-circuit portion Y3.
- Three pieces connected to one different spare wiring connection line 92 are made by the cut portions Z3, Z4, and Z5. Since the spare wiring connection lines 92 connected to the respective pieces are connected to different first relay wirings 93, the source signal is sent to the source signal line 8 below the disconnection point X via the different second spare wirings 91. Is transmitted. Therefore, even when the three source signal lines 8 having the disconnection point X are in the same group, the wiring can be corrected to prevent display defects.
- FIG. 4 shows a correction method in the case where the disconnection point X is generated in the three source signal lines 8 in the left end group. However, in the groups other than the left end or the right end, the disconnection occurs in the same group. Even if there are four source signal lines 8 having the location X, the correction is possible.
- FIG. 5 is a schematic diagram illustrating a wiring correction method for the circuit device 200 according to the first embodiment.
- a disconnection point X occurs in the four source signal lines 8 in the group that is not the left end or the right end.
- the disconnection point X occurs in the four source signal lines 8 in the same group
- two of the four signal lines 8 are respectively the upper first spare wiring 90a and the lower first spare wiring 90b. And are short-circuited and connected by the first short-circuit portions Y4 and Y5. Subsequently, the upper first spare wiring 90a is cut at a cutting point Z4 between the two first short-circuit portions Y4. Similarly, the lower first spare wiring 90b is cut at a cutting point Z4 between the two first short-circuit portions Y5.
- the upper first spare wiring 90a and the lower first spare wiring 90b are both connected to the connection point 13 with the closest spare wiring connecting line 92 electrically connected to the first short-circuit portions Y4 and Y5, and the connection.
- the point 13 is cut at a cutting point Z5 between the point 13 and the connection point 13 with the auxiliary wiring connecting line 92 that is closest to the first short-circuit part Y4, Y5 on the opposite side.
- the upper first auxiliary wiring 90a is connected to the connection point 13 with the auxiliary wiring connecting line 92 on the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y4 is arranged, and the connection on the right side thereof.
- the lower first auxiliary wiring 90b is connected to the auxiliary wiring connecting line 92 on the flexible printed circuit board 2a on the right side of the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y5 is arranged. And a further cutting point Z5 between the connection point 13 on the right side.
- the lower first spare wiring 90b is connected to the connection point 13 with the spare wiring connecting line 92 on the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y5 is arranged, and further to the left. It is cut at a cutting point Z5 between the point 13 and the point 13.
- the source signal line 8 having the disconnection point X and the upper first spare line that crosses the source signal line 8 below the disconnection point X and is short-circuited and connected by the first short-circuit portions Y4 and Y5.
- the second auxiliary wiring 91 connected to the wiring 90a and the lower first auxiliary wiring 90b is short-circuited at the second short-circuit portion Y6.
- the wiring is corrected for the two source signal lines 8 having the disconnection portion X in the same group with respect to the one upper first spare wiring 90a and the lower first spare wiring 90b. Is possible. Therefore, even if the four source signal lines 8 having the disconnection point X are in the same group, it is possible to correct the wiring and prevent display defects.
- the wiring can be corrected even when a plurality of adjacent source signal lines 8 are short-circuited by a method similar to the above-described correction of the disconnection location.
- FIG. 6 is a schematic diagram showing a wiring correction method for the circuit device according to the first embodiment.
- short-circuit portions X ′ are generated in four adjacent source signal lines 8 in the leftmost group. In the leftmost group, disconnection of up to three source signal lines 8 can be corrected. Therefore, even when up to four adjacent source signal lines 8 are short-circuited, the shorted source signal lines 8 are connected.
- the wiring can be corrected by cutting before and after the short-circuit portion X ′.
- the other source signal line 8 is cut before and after the short-circuit portion X ′, leaving one.
- one source signal line 8 that has not been disconnected is independent of the other source signal lines 8.
- the wiring can be corrected by applying the correction for the disconnection already described. According to the above method, the wiring can be corrected even when up to four adjacent source signal lines 8 are short-circuited.
- FIG. 7 is a schematic diagram showing a circuit device 200 according to the second embodiment and a method for correcting the wiring thereof.
- a spare wiring connection line 92 for the third and the spare wiring connection line 92 and the first spare wiring 90 are connected to both ends of the plurality of source side flexible printed circuit boards 2a.
- a wiring connection terminal 12 is further provided. More specifically, the spare wiring connection line 92 added in the present embodiment is connected to the left end portion of the upper first spare wiring 90 a via the connection point 13. Similarly, the auxiliary wiring connection line 92 added in the present embodiment is connected to the right end portion of the lower first auxiliary wiring 90b through the connection point 13 (not shown).
- the disconnection point X occurs in the four source signal lines 8 in the leftmost group, the disconnection point X occurs in each of the upper first spare wiring 90a and the lower spare wiring 90b.
- Two source signal lines 8 are connected to each other by being short-circuited by the first short-circuit portions Y7 and Y8.
- the upper first spare wiring 90a is cut at a cutting point Z6 between the two first short-circuit portions Y7. Further, the upper first spare wiring 90a is connected to the connection point 13 with the spare wiring connecting line 92 arranged on the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y7 is arranged, and to the right of the connection point 13. It is cut at a cutting point Z7 between the connection point 13.
- the lower first auxiliary wiring 90b is cut at a cutting point Z8 between the two first short-circuit portions Y8, as in FIG.
- the lower first auxiliary wiring 90b is connected to the auxiliary wiring connecting line 92 on the flexible printed circuit board 2a on the right side of the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y8 is arranged. It is cut at a cutting point Z9 between the connection point 13 and the connection point 13 on the right side.
- the second auxiliary wiring 91 electrically connected to the lower auxiliary wiring 90b is short-circuited at the second short-circuit portion Y9.
- Cut pieces Z6, Z7, Z8, and Z9 form four pieces connected only to the source signal line 8 and the spare wiring connection line 92 each having one different disconnection point X.
- the left fragment of the upper first spare wiring 90a is connected to the third spare wiring connecting line 92 added to the source-side flexible printed circuit board 2a in the present embodiment.
- the source signal is transmitted to the source signal line 8 ahead of the disconnection point X from the four divided pieces of the first spare line 90 via the different second spare line 91. Therefore, even if the four source signal lines 8 having the disconnection point X are in the same group, it is possible to correct the wiring and prevent display defects.
- the third spare wiring connection line 92 and the buffer amplifier 10 are added to both ends of the plurality of source-side flexible printed circuit boards 2a, the end group among the plurality of groups. Even in the case where the disconnection portion X occurs in the four source signal lines 8, the wiring can be corrected.
- the same spare wiring is provided to correct the defect of the gate signal line. It is also possible to provide it.
- the first spare wiring for the gate signal line is arranged in the peripheral region on the TFT substrate along the short side of the TFT substrate on the side where the gate side flexible printed circuit board is connected.
- the second spare wiring for the gate signal line is arranged in the peripheral region along the short side of the TFT substrate opposite to the side where the gate side flexible printed circuit board is connected.
- the first relay wiring and the second relay wiring for the gate signal line are respectively disposed on the gate side flexible printed circuit board and the source side flexible printed circuit board.
- connection between the TFT substrate and the source control substrate and the gate control substrate is not limited to the method using the flexible printed circuit board, and the source driver and the gate driver are mounted on the TFT substrate by the COG (Chip on Glass) method. It may be a thing.
- the peripheral circuit may be mounted on the TFT substrate by a monolithic method.
- the first spare wiring is arranged so as to intersect all the source signal lines across the spare wiring insulating film from the end to the end of the peripheral region of the TFT substrate. It is not limited to examples.
- the first spare wiring may be arranged separately for each block composed of two or more groups of source signal lines. Even in this case, the upper limit of the number of source signal lines whose disconnection can be corrected in the entire TFT substrate is equal to the number of second spare wirings provided.
- only one spare wiring on the FPCB and one spare wiring connection terminal are provided for each source signal line of one group for each first spare wiring. Not limited. A plurality of spare wirings on the FPCB and spare wiring connection terminals may be provided for each first spare wiring for one group of source signal lines.
- the display device is not limited to an active matrix liquid crystal display device.
- the display device may be an active matrix organic electroluminescence (EL) display device.
- EL organic electroluminescence
- the display device may be a passive matrix liquid crystal display device or an organic EL display device.
- the application of the circuit device of the present invention is not limited to the TFT substrate of the display device. Any circuit board provided with a large number of signal lines can be applied.
- the order of short-circuiting and cutting of the wiring is not limited.
- DESCRIPTION OF SYMBOLS 100 Display apparatus 200 Circuit apparatus 300 Display panel 1 TFT substrate 1a Display area 1b Peripheral area 2a Source side flexible printed circuit board 2b Gate side flexible printed circuit board 3 Source driver 4 Source control board 5 Gate control board 6 Signal circuit board 7 Controller chip 8 source signal line 9 spare wiring 90 first spare wiring 90a upper first spare wiring 90b lower first spare wiring 91 second spare wiring 92 spare wiring connecting line 93 first relay wiring 94 second relay wiring 10 buffer amplifier 11 wiring Connection part 12 Spare wiring connection terminal 13 Connection point 20 Television tuner
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Abstract
Provided is a circuit device 200 that comprises a circuit substrate 1 having a plurality of signal lines 8 disposed thereon for transmitting a signal and spare lines 9 intersecting with the signal lines 8 insulated therefrom for transmitting a signal when the signal lines 8 are defective, and a plurality of signal generation circuits 30 for generating a signal, the plurality of signal lines 8 divided into a plurality of groups with each group connected a different signal generation circuit 30. The spare lines 9 includes first spare lines 90 disposed on the circuit substrate 1 so as to intersect with the signal lines 8 included in at least two groups, and second spare lines 91 electrically connected to the first spare lines 90, and disposed on the circuit substrate 1 insulated from but intersecting with the signal lines 8. For each group, at least one connection line 92 is provided for each first spare line 90 for electrically connecting the first spare line 90 and the second spare line 91. Also provided are a display device, and a wiring correction method for the circuit device 200.
Description
本発明は、信号線の欠陥を修正する予備配線を備える回路装置、該回路装置を備える表示装置、及び該回路装置の配線修正方法に関する。
The present invention relates to a circuit device including a spare wiring for correcting a defect in a signal line, a display device including the circuit device, and a wiring correction method for the circuit device.
アクティブマトリクス型の液晶表示装置又は有機EL表示装置等の表示装置は、TFT(Thin Film Transistor)が形成されたTFT基板を備え、該TFT基板上に複数のソース信号線及びゲート信号線がマトリクス状に配されている。各TFTのドレイン電極には画素電極が接続され、ソース電極にはソース信号線が接続され、ゲート電極にはゲート信号線が接続されている。ソース信号線にはソース信号生成回路が接続されており、ゲート信号線にはゲート信号生成回路が接続されている。ゲート信号生成回路からゲート信号線にゲート信号を供給することにより、TFTはオン又はオフに制御される。オンとなった各TFTのソース電極にソース信号生成回路からソース信号を供給することにより、画素電極の電位が制御され、画像が表示される。
A display device such as an active matrix type liquid crystal display device or an organic EL display device includes a TFT substrate on which a TFT (Thin-Film-Transistor) is formed, and a plurality of source signal lines and gate signal lines are arranged in a matrix on the TFT substrate. It is arranged in. A pixel electrode is connected to the drain electrode of each TFT, a source signal line is connected to the source electrode, and a gate signal line is connected to the gate electrode. A source signal generation circuit is connected to the source signal line, and a gate signal generation circuit is connected to the gate signal line. The TFT is controlled to be turned on or off by supplying a gate signal from the gate signal generation circuit to the gate signal line. By supplying a source signal from the source signal generation circuit to the source electrode of each TFT that is turned on, the potential of the pixel electrode is controlled and an image is displayed.
このような表示装置の製造過程において、TFT基板の成膜時における塵埃の巻き込み、又はピンホールが生じたレジストマスクを使用したエッチングにより、ソース信号線又はゲート信号線に断線又は短絡等の欠陥が発生することがある。ソース信号線又はゲート信号線に欠陥が生じた場合、欠陥箇所より先に信号が正しく伝送されなくなるため、表示画面上に表示欠陥が発生する。
In the manufacturing process of such a display device, the source signal line or the gate signal line has a defect such as a disconnection or a short circuit due to dust entrainment at the time of film formation of the TFT substrate or etching using a resist mask in which a pinhole is generated May occur. When a defect occurs in the source signal line or the gate signal line, the signal is not correctly transmitted prior to the defective portion, so that a display defect occurs on the display screen.
特許文献1には、欠陥が生じた信号線と、該信号線と交差する予備配線とを接続することにより、信号を迂回させて欠陥箇所より先に伝送することができる表示装置が開示されている。具体的には、特許文献1の表示装置においては、欠陥が生じた信号線と予備配線とを、欠陥箇所の前後2箇所で短絡することにより、上述の表示欠陥を修正することができる。
Patent Document 1 discloses a display device capable of bypassing a signal and transmitting it before a defective portion by connecting a signal line in which a defect has occurred and a spare wiring intersecting the signal line. Yes. Specifically, in the display device of Patent Document 1, the above-described display defect can be corrected by short-circuiting the signal line and the spare wiring in which the defect has occurred at two places before and after the defective place.
しかしながら、特許文献1の表示装置においては、同一の信号生成回路に接続された複数の信号線のうち、欠陥が修正され得る本数は、予備配線1本につき1本に限られる。
However, in the display device of Patent Document 1, the number of signal lines that can be corrected among a plurality of signal lines connected to the same signal generation circuit is limited to one per spare wiring.
本発明は斯かる事情に鑑みてなされたものであり、その目的は、1本の予備配線につき、同一の信号生成回路に接続された欠陥が生じた信号線が2本まで修正され得る回路装置、該回路装置を備える表示装置、及び該回路装置の配線修正方法を提供することにある。
The present invention has been made in view of such circumstances, and an object of the present invention is to provide a circuit device in which up to two defective signal lines connected to the same signal generation circuit can be corrected per spare wiring. Another object of the present invention is to provide a display device including the circuit device and a wiring correction method for the circuit device.
本発明に係る回路装置は、信号を伝送する複数の信号線、及び該信号線と絶縁された状態で交差しており、前記信号線に欠陥がある場合に前記信号を伝送する予備配線が配された回路基板と、前記信号を生成する複数の信号生成回路とを備え、前記複数の信号線は複数のグループに分けられて夫々の前記グループ毎に異なる前記信号生成回路に接続された回路装置において、前記予備配線は、少なくとも2つの前記グループに含まれる前記信号線と交差するように前記回路基板に配された第1予備配線と、該第1予備配線と電気的に接続され、前記回路基板に前記信号線と絶縁された状態で交差するように配された第2予備配線とを含み、前記グループ夫々に、1本の前記第1予備配線につき少なくとも1つ設けられ、前記第1予備配線と前記第2予備配線とを電気的に接続するための接続線を備えていることを特徴とする。
The circuit device according to the present invention crosses a plurality of signal lines that transmit signals and the signal lines in an insulated state, and reserve wiring for transmitting the signals when the signal lines are defective is arranged. And a plurality of signal generation circuits for generating the signals, wherein the plurality of signal lines are divided into a plurality of groups and connected to the signal generation circuits different for each of the groups. The spare wiring is electrically connected to the first spare wiring arranged on the circuit board so as to intersect the signal lines included in at least two of the groups, and the circuit A second auxiliary wiring arranged to intersect the signal line in an insulated state on the substrate, and at least one of the first auxiliary wirings is provided for each of the groups, and the first auxiliary wiring is provided. Wiring and Characterized in that it comprises a connection line for electrically connecting the serial second preliminary wiring.
本発明にあっては、第1予備配線は、複数の信号生成回路に接続された信号線と交差するように配されているため、同一の信号生成回路に接続されたグループ内の複数の信号線に欠陥が生じた場合であっても、1本の第1予備配線につき同一のグループ内の2本までの信号線の欠陥の修正に対応することができる。
In the present invention, since the first spare wiring is arranged so as to intersect with the signal lines connected to the plurality of signal generation circuits, the plurality of signals in the group connected to the same signal generation circuit. Even when a defect occurs in a line, it is possible to cope with the defect correction of up to two signal lines in the same group for each first spare wiring.
本発明に係る回路装置は、前記第1予備配線は更に端部で前記接続線に接続されていることを特徴とする。
The circuit device according to the present invention is characterized in that the first spare wiring is further connected to the connection line at an end.
本発明にあっては、第1予備配線1本の端部にも接続線が接続されているため、両端に配された信号線のグループにおいても1本の第1予備配線につき同一のグループ内の2本までの信号線の欠陥の修正に対応することができる。
In the present invention, since the connection line is also connected to the end portion of one first spare wiring, even in the group of signal lines arranged at both ends, one first spare wiring is in the same group. It is possible to cope with the correction of defects of up to two signal lines.
本発明に係る回路装置は、断線箇所を有する前記信号線と前記第1予備配線とが短絡された第1短絡部と、前記断線箇所を有する前記信号線と前記第2予備配線とが短絡された第2短絡部とを備え、前記第1予備配線の一部が切断されてあることを特徴とする。
In the circuit device according to the present invention, the first short circuit portion in which the signal line having the disconnection portion and the first spare wiring are short-circuited, and the signal line having the disconnection portion and the second preliminary wiring are short-circuited. And a second short circuit portion, wherein a part of the first spare wiring is cut off.
本発明にあっては、欠陥を有する信号線と短絡された第1予備配線が断線され、信号を伝送する。したがって、複数の信号線が欠陥を有する場合であっても、断線により信号が混在することが防がれ、夫々の欠陥を迂回されて信号が伝送され得る。
In the present invention, the signal line having a defect and the first spare wiring that is short-circuited are disconnected, and the signal is transmitted. Therefore, even when a plurality of signal lines have defects, it is possible to prevent signals from being mixed due to disconnection, and to transmit signals by bypassing each defect.
本発明に係る回路装置は、第1予備配線は、同一のグループ内の2つの前記第1短絡部の間で切断されてあり、且つ前記第1短絡部に電気的に接続された最近接した接続線との接続点と、該接続点に前記第1短絡部とは反対側で最近接した接続線との接続点との間で切断されてあることを特徴とする。
In the circuit device according to the present invention, the first auxiliary wiring is cut between the two first short-circuit portions in the same group and is closest to the first short-circuit portion and is electrically connected to the first short-circuit portion. It is cut | disconnected between the connection point with a connection line, and the connection point with the connection line nearest to the connection point on the opposite side to the said 1st short circuit part, It is characterized by the above-mentioned.
本発明にあっては、同一のグループ内の断線箇所を有する複数の信号線のうちの2本と短絡された第1予備配線の断片夫々には、異なる信号が流れる。したがって、同一の信号生成回路に接続されたグループ内の複数の信号線に欠陥が生じた場合であっても、1本の第1予備配線につき同一のグループ内の2本までの信号線の欠陥を迂回されて信号が伝送され得る。
In the present invention, a different signal flows through each of the pieces of the first spare wiring that is short-circuited with two of the plurality of signal lines having the disconnection portion in the same group. Therefore, even when a plurality of signal lines in a group connected to the same signal generation circuit are defective, a defect of up to two signal lines in the same group per one first spare wiring Can be bypassed to transmit a signal.
本発明に係る表示装置は、上述のいずれか一つに記載の回路装置を備え、前記信号線は画像信号を伝送することを特徴とする。
A display device according to the present invention includes any one of the circuit devices described above, and the signal line transmits an image signal.
本発明にあっては、表示装置は前記回路装置を備えるため、同一のグループ内の複数の信号線に欠陥が生じた場合であっても、1本の第1予備配線につき同一グループ内の2本までの信号線の欠陥の修正に対応することができる。
In the present invention, since the display device includes the circuit device, even if a defect occurs in a plurality of signal lines in the same group, two display devices in the same group per one first spare wiring. It is possible to cope with the correction of the defect of the signal line up to this point.
本発明に係る回路装置の配線修正方法は、上述のいずれか一つに記載の回路装置の同一の前記グループに属する複数の前記信号線に欠陥がある場合に、該欠陥を有する複数の前記信号線のうちの2本と、該2本の信号線と交差する前記第1予備配線とを第1短絡部で夫々短絡し、2つの該第1短絡部の間で前記第1予備配線を切断し、更に前記第1短絡部に電気的に接続された最近接した前記接続線との接続点と、該接続点に前記第1短絡部とは反対側で最近接した接続線との接続点との間で、前記第1予備配線を切断することを特徴とする。
In the circuit device wiring correction method according to the present invention, when a plurality of the signal lines belonging to the same group of the circuit device according to any one of the above are defective, the plurality of the signals having the defect Two of the lines and the first spare wiring intersecting with the two signal lines are short-circuited at the first short-circuit portion, and the first spare wiring is cut between the two first short-circuit portions. And a connection point between the closest connection line electrically connected to the first short-circuit portion and a connection point closest to the connection point on the opposite side of the first short-circuit portion. The first spare wiring is cut between the first and second wirings.
本発明にあっては、同一のグループ内の2つの第1短絡部の間で第1予備配線を切断することにより、同一の第1予備配線に接続された2つの異なる接続線に異なる信号を出力することができる。したがって、同一のグループ内の複数の信号線に欠陥が生じた場合であっても、1本の第1予備配線につき同一のグループ内の2本までの信号線の欠陥を修正することができる。
In the present invention, by cutting the first spare wiring between the two first short-circuit portions in the same group, different signals are sent to two different connection lines connected to the same first spare wiring. Can be output. Therefore, even when a defect occurs in a plurality of signal lines in the same group, defects of up to two signal lines in the same group can be corrected for each first spare wiring.
本発明によれば、1本の予備配線につき、同一の信号生成回路に接続された欠陥が生じた信号線が2本まで修正され得る。
According to the present invention, up to two signal lines having defects connected to the same signal generation circuit can be corrected per spare wiring.
以下、本発明をその実施の形態を示す図面に基づいて詳述する。
Hereinafter, the present invention will be described in detail with reference to the drawings showing embodiments thereof.
(実施の形態1)
図1は実施の形態1に係る表示装置100を示す斜視図である。表示装置100は例えば、アクティブマトリクス型の液晶表示装置である。表示装置100は、画像が表示される矩形状の表示パネル300を含む回路装置200を備える。表示装置100は更に、テレビジョン放送信号を受信するテレビジョンチューナ20を備える。表示装置100においては、例えばテレビジョンチューナ20により受信されたテレビジョン放送信号、すなわち画像信号が、回路装置200により処理され、表示パネル300に画像が表示される。表示装置100は、他に図示しない画像信号入力端子を備え、該画像信号入力端子に入力される画像信号に基づいて画像を表示してもよい。 (Embodiment 1)
FIG. 1 is a perspective view showing adisplay device 100 according to the first embodiment. The display device 100 is, for example, an active matrix liquid crystal display device. The display device 100 includes a circuit device 200 including a rectangular display panel 300 on which an image is displayed. The display device 100 further includes a television tuner 20 that receives a television broadcast signal. In the display device 100, for example, a television broadcast signal received by the television tuner 20, that is, an image signal is processed by the circuit device 200, and an image is displayed on the display panel 300. The display device 100 may further include an image signal input terminal (not shown) and display an image based on an image signal input to the image signal input terminal.
図1は実施の形態1に係る表示装置100を示す斜視図である。表示装置100は例えば、アクティブマトリクス型の液晶表示装置である。表示装置100は、画像が表示される矩形状の表示パネル300を含む回路装置200を備える。表示装置100は更に、テレビジョン放送信号を受信するテレビジョンチューナ20を備える。表示装置100においては、例えばテレビジョンチューナ20により受信されたテレビジョン放送信号、すなわち画像信号が、回路装置200により処理され、表示パネル300に画像が表示される。表示装置100は、他に図示しない画像信号入力端子を備え、該画像信号入力端子に入力される画像信号に基づいて画像を表示してもよい。 (Embodiment 1)
FIG. 1 is a perspective view showing a
表示パネル300は、ガラス製で矩形状のTFT基板1(図2参照)と、該TFT基板1と略同じ形状を有するガラス製のカラーフィルタ基板(不図示)とが対向させられ、TFT基板1とカラーフィルタ基板との隙間に液晶材料が充填されて構成されている。
In the display panel 300, a glass-made rectangular TFT substrate 1 (see FIG. 2) and a glass color filter substrate (not shown) having substantially the same shape as the TFT substrate 1 are opposed to each other. And the color filter substrate are filled with a liquid crystal material.
図2は実施の形態1に係る回路装置200を示す模式図である。回路装置200に含まれるTFT基板1上には、銅又はアルミニウム等の金属で形成された複数のソース信号線8及びゲート信号線(不図示)がマトリクス状に形成されている。複数のソース信号線8は、TFT基板1の短辺に対して平行に配されている。複数のゲート信号線は、TFT基板1の長辺に対して平行に配されている。ソース信号線8とゲート信号線は表示領域1a内で直交している。ゲート信号線はソース信号線8に対してゲート絶縁膜により隔たれた下層に形成されている。ゲート信号線及びソース信号線8は夫々、表示パネル300に画像を表示するためのゲート信号及びソース信号を伝送する。
FIG. 2 is a schematic diagram showing the circuit device 200 according to the first embodiment. On the TFT substrate 1 included in the circuit device 200, a plurality of source signal lines 8 and gate signal lines (not shown) formed of a metal such as copper or aluminum are formed in a matrix. The plurality of source signal lines 8 are arranged in parallel to the short side of the TFT substrate 1. The plurality of gate signal lines are arranged in parallel to the long side of the TFT substrate 1. The source signal line 8 and the gate signal line are orthogonal to each other in the display area 1a. The gate signal line is formed in a lower layer separated from the source signal line 8 by a gate insulating film. The gate signal line and the source signal line 8 transmit a gate signal and a source signal for displaying an image on the display panel 300, respectively.
ソース信号線8とゲート信号線との各交点の近傍には、TFTが形成されている。各TFTのソース電極はソース信号線8に、ゲート電極はゲート信号線に、ドレイン電極は画素電極に夫々接続されている。画素電極は、ITO(Indium Tin Oxide)等の透明導電膜により、TFT基板1上のゲート信号線とソース信号線8とにより区切られた各矩形領域内に形成され、各TFTのドレイン電極と一対一で接続されている。各画素電極と対向する一枚の共通電極が、ITO等の透明導電膜によりカラーフィルタ基板上に形成されている。
A TFT is formed in the vicinity of each intersection of the source signal line 8 and the gate signal line. The source electrode of each TFT is connected to the source signal line 8, the gate electrode is connected to the gate signal line, and the drain electrode is connected to the pixel electrode. The pixel electrode is formed in each rectangular region separated by the gate signal line and the source signal line 8 on the TFT substrate 1 by a transparent conductive film such as ITO (Indium Tin Oxide), and is paired with the drain electrode of each TFT. Connected with one. One common electrode facing each pixel electrode is formed on the color filter substrate by a transparent conductive film such as ITO.
尚、図2においては、簡略化のため、ゲート信号線、TFT、及び画素電極の図示を省略してあり、ソース信号線8については一部のみを示している。
In FIG. 2, for simplification, the gate signal lines, TFTs, and pixel electrodes are not shown, and only a part of the source signal lines 8 is shown.
TFT基板1には、夫々複数のソース側フレキシブルプリント回路基板2a、及びゲート側フレキシブルプリント回路基板2bが接続されている。該複数のソース側フレキシブルプリント回路基板2aを介して、ソース信号を制御する制御回路(不図示)が実装された短冊状のソース制御基板4が、長手方向をTFT基板1の一の長辺に沿わせて接続されている。同様に、複数のゲート側フレキシブルプリント回路基板2bを介して、ゲート信号を制御する制御回路(不図示)が実装された短冊状のゲート制御基板5が、長手方向をTFT基板1の一の短辺に沿わせて接続されている。
A plurality of source-side flexible printed circuit boards 2a and gate-side flexible printed circuit boards 2b are connected to the TFT substrate 1, respectively. A strip-shaped source control board 4 on which a control circuit (not shown) for controlling a source signal is mounted via the plurality of source-side flexible printed circuit boards 2a is arranged such that the longitudinal direction is one long side of the TFT substrate 1. Connected alongside. Similarly, a strip-shaped gate control substrate 5 on which a control circuit (not shown) for controlling a gate signal is mounted via a plurality of gate-side flexible printed circuit boards 2b has a longitudinal direction shorter than that of the TFT substrate 1. Connected along the side.
ソース側フレキシブルプリント回路基板2a及びゲート側フレキシブルプリント回路基板2bとTFT基板1とは、例えば異方性導電膜等の接着フィルムにより接着されている。同様に、ソース側フレキシブルプリント回路基板2a及びゲート側フレキシブルプリント回路基板2bとソース制御基板4及びゲート制御基板5とは、異方性導電膜等の接着フィルムにより接着されている。ソース側フレキシブルプリント回路基板2aのTFT基板1と接着される部分には配線接続部11が形成されている。配線接続部11を介してソース信号線8等の配線が、ソース側フレキシブルプリント回路基板2aとTFT基板1との間で接続される。ゲート側フレキシブルプリント回路基板2bとTFT基板1とも同様の方法で接続される。
The source side flexible printed circuit board 2a, the gate side flexible printed circuit board 2b, and the TFT substrate 1 are bonded to each other by an adhesive film such as an anisotropic conductive film. Similarly, the source side flexible printed circuit board 2a and the gate side flexible printed circuit board 2b are bonded to the source control board 4 and the gate control board 5 by an adhesive film such as an anisotropic conductive film. A wiring connection portion 11 is formed on a portion of the source side flexible printed circuit board 2a to be bonded to the TFT substrate 1. Wirings such as the source signal line 8 are connected between the source-side flexible printed circuit board 2a and the TFT substrate 1 via the wiring connecting part 11. The gate side flexible printed circuit board 2b and the TFT substrate 1 are also connected by the same method.
各ソース側フレキシブルプリント回路基板2a上には夫々、ソースドライバ30を内蔵した点線で示すソースドライバチップ3が、例えばCOF(chip-on-film)方式で実装されている。同様に、各ゲート側フレキシブルプリント回路基板2b上には夫々、ゲートドライバを内蔵したゲートドライバチップがCOF方式で実装されている。ソースドライバ30の出力端子には複数のソース信号線8が接続されている。すなわち、ソース信号線8の一部はソース側フレキシブルプリント回路基板2a上に配されている。ここで、全ソース信号線8は、同一のソースドライバ30に接続された複数のソース信号線8を1つのグループとして、複数のグループに分けられている。同様にして、ゲートドライバの出力端子にはゲート信号線が夫々接続されている。
On each source-side flexible printed circuit board 2a, a source driver chip 3 indicated by a dotted line incorporating a source driver 30 is mounted, for example, by a COF (chip-on-film) system. Similarly, gate driver chips each incorporating a gate driver are mounted on each gate side flexible printed circuit board 2b by the COF method. A plurality of source signal lines 8 are connected to the output terminal of the source driver 30. That is, a part of the source signal line 8 is arranged on the source side flexible printed circuit board 2a. Here, all the source signal lines 8 are divided into a plurality of groups, with a plurality of source signal lines 8 connected to the same source driver 30 as one group. Similarly, a gate signal line is connected to each output terminal of the gate driver.
ゲートドライバは、ゲート制御基板5上の制御回路から入力されたゲートドライバ制御信号に従ってゲート信号を生成し、生成したゲート信号を接続されている各ゲート信号線に供給する。ソースドライバ30は、ソース制御基板4上の制御回路から入力されたソースドライバ制御信号に従ってソース信号を生成し、生成したソース信号を接続されている各ソース信号線8に供給する。
The gate driver generates a gate signal in accordance with a gate driver control signal input from the control circuit on the gate control substrate 5, and supplies the generated gate signal to each connected gate signal line. The source driver 30 generates a source signal according to the source driver control signal input from the control circuit on the source control board 4 and supplies the generated source signal to each connected source signal line 8.
ソース制御基板4及びゲート制御基板5は、コントローラチップ7が実装された信号回路基板6と接続されている。コントローラチップ7は、テレビジョンチューナ20、又は図示しない外部の回路と接続されており、テレビジョンチューナ20、又は前記外部の回路から画像信号が入力される。コントローラチップ7は、入力された画像信号に従って、ソース制御信号及びゲート制御信号を生成し、夫々ソース制御基板4及びゲート制御基板5の制御回路に出力する。
The source control board 4 and the gate control board 5 are connected to a signal circuit board 6 on which a controller chip 7 is mounted. The controller chip 7 is connected to the television tuner 20 or an external circuit (not shown), and an image signal is input from the television tuner 20 or the external circuit. The controller chip 7 generates a source control signal and a gate control signal according to the input image signal, and outputs them to the control circuits of the source control board 4 and the gate control board 5, respectively.
TFT基板1、ソース側フレキシブルプリント回路基板2a、ゲート側フレキシブルプリント回路基板2b、ソース制御基板4、ゲート制御基板5、及び信号回路基板6により、回路装置200が構成されている。
The TFT device 1, the source side flexible printed circuit board 2a, the gate side flexible printed circuit board 2b, the source control board 4, the gate control board 5, and the signal circuit board 6 constitute a circuit device 200.
回路装置200は、ソース信号線8に対する予備配線9を備える。予備配線9は、銅又はアルミニウム等の金属で形成されており、ソース信号線8に欠陥がある場合に、当該欠陥箇所を迂回してソース信号を伝送できるように配されている。予備配線9は、第1予備配線90と第2予備配線91とを含む。
The circuit device 200 includes a spare wiring 9 for the source signal line 8. The spare wiring 9 is made of a metal such as copper or aluminum, and is arranged so that when the source signal line 8 has a defect, the source signal can be transmitted around the defective portion. The spare wiring 9 includes a first spare wiring 90 and a second spare wiring 91.
第1予備配線90は、TFT基板1上の表示領域1aの外側にある周辺領域1bに、TFT基板1のソース側フレキシブルプリント回路基板2aが接続された側の長辺に沿うようにして、例えば2本配されている。第1予備配線90は、該長辺の端から端まですべてのソース信号線8と予備配線絶縁膜を挟んで交差するようにして配されている。2本の第1予備配線90のうち、ソース側フレキシブルプリント回路基板2a側が上側第1予備配線90aであり、他方が下側第1予備配線90bである。
The first auxiliary wiring 90 is arranged along the long side of the TFT substrate 1 on the side where the source-side flexible printed circuit board 2a is connected to the peripheral region 1b outside the display region 1a on the TFT substrate 1, for example, Two are arranged. The first spare wiring 90 is arranged so as to cross all the source signal lines 8 across the spare wiring insulating film from end to end of the long side. Of the two first spare wires 90, the source-side flexible printed circuit board 2a side is the upper first spare wire 90a, and the other is the lower first spare wire 90b.
第2予備配線91は、周辺領域1bに、TFT基板1のソース側フレキシブルプリント回路基板2aが接続された側とは反対側の長辺に沿うように、例えば4本配されている。第2予備配線91は、該長辺の端から端まですべてのソース信号線8と予備配線絶縁膜を挟んで交差するようにして配されている。
For example, four second auxiliary wirings 91 are arranged in the peripheral region 1b along the long side opposite to the side where the source side flexible printed circuit board 2a of the TFT substrate 1 is connected. The second spare wiring 91 is arranged so as to intersect all the source signal lines 8 across the spare wiring insulating film across the long side.
第1予備配線90と第2予備配線91とは、予備配線接続線92、第1中継配線93、及び第2中継配線94を介して電気的に接続されている。
The first spare wiring 90 and the second spare wiring 91 are electrically connected via the spare wiring connecting line 92, the first relay wiring 93, and the second relay wiring 94.
予備配線接続線92は、ソース側フレキシブルプリント回路基板2a上のTFT基板1の長辺方向の両端に、該長辺に垂直になるようにして配されている。予備配線接続線92は、各配線接続部11上の左右両端に設けられた予備配線接続端子12を介して周辺領域1bからソース側フレキシブルプリント回路基板2aまで配されている。各ソース側フレキシブルプリント回路基板2a上の右側の予備配線接続線92の一端は例えば、上側第1予備配線90aに、接続点13で夫々電気的に接続されている。同様に、各ソース側フレキシブルプリント回路基板2a上の左側の予備配線接続線92の一端は、下側第1予備配線90bに、接続点13で夫々電気的に接続されている。予備配線接続線92の中途には信号の電流を増幅する緩衝増幅器10が夫々、ソースドライバチップ3上に実装されて設けられている。すなわち、予備配線接続線92の一部はソースドライバチップ3内に配されている。
The spare wiring connection lines 92 are arranged at both ends in the long side direction of the TFT substrate 1 on the source side flexible printed circuit board 2a so as to be perpendicular to the long side. The spare wiring connection lines 92 are arranged from the peripheral region 1b to the source-side flexible printed circuit board 2a via the spare wiring connection terminals 12 provided at the left and right ends on each wiring connection portion 11. One end of the right auxiliary wiring connecting line 92 on each source-side flexible printed circuit board 2a is electrically connected to the upper first auxiliary wiring 90a at the connection point 13, for example. Similarly, one end of the left auxiliary wiring connection line 92 on each source-side flexible printed circuit board 2a is electrically connected to the lower first auxiliary wiring 90b at the connection point 13, respectively. A buffer amplifier 10 that amplifies a signal current is mounted on the source driver chip 3 in the middle of the spare wiring connection line 92. That is, a part of the spare wiring connection line 92 is arranged in the source driver chip 3.
第1中継配線93は、ソース制御基板4上に長手方向の端から端まで第2予備配線91と同本数配されている。第1中継配線93には、予備配線接続線92の他端が接続されている。ここで、同一のソース側フレキシブルプリント回路基板2a上の2本の予備配線接続線92は夫々、異なる第1中継配線93に接続されている。更に、互いに隣り合うソース側フレキシブルプリント回路基板2a上に配された予備配線接続線92同士は、異なる第1中継配線93に接続されている。
The same number of first relay wirings 93 as the second auxiliary wirings 91 are arranged on the source control board 4 from end to end in the longitudinal direction. The other end of the spare wiring connection line 92 is connected to the first relay wiring 93. Here, the two spare wiring connection lines 92 on the same source-side flexible printed circuit board 2a are connected to different first relay wirings 93, respectively. Further, the spare wiring connection lines 92 arranged on the adjacent source-side flexible printed circuit boards 2 a are connected to different first relay wirings 93.
第2中継配線94は、ゲート制御基板5上に長手方向の端から端まで第2予備配線91と同本数配されている。第2中継配線94は、一方の端で第1中継配線93に、他方の端で第2予備配線91に、夫々一対一で接続されている。
The same number of second relay wirings 94 as the second preliminary wirings 91 are arranged on the gate control substrate 5 from end to end in the longitudinal direction. The second relay wiring 94 is connected one-to-one to the first relay wiring 93 at one end and to the second spare wiring 91 at the other end.
以上の電気的接続により、各第1予備配線90から各第2予備配線91まで信号が伝送され得る。
With the above electrical connection, signals can be transmitted from each first spare wiring 90 to each second spare wiring 91.
尚、第1予備配線90、第2予備配線91、予備配線接続線92、第1中継配線93、及び第2中継配線94は夫々、銅又はアルミニウム等の金属で形成されている。
The first spare wiring 90, the second spare wiring 91, the spare wiring connecting line 92, the first relay wiring 93, and the second relay wiring 94 are each formed of a metal such as copper or aluminum.
以上のように構成された回路装置200において、コントローラチップ7は、入力された画像信号に従って、ゲートドライバ制御信号及びソースドライバ制御信号を生成し、生成したゲートドライバ制御信号及びソースドライバ制御信号を夫々ゲートドライバ及びソースドライバ30に出力する。
In the circuit device 200 configured as described above, the controller chip 7 generates a gate driver control signal and a source driver control signal according to the input image signal, and generates the generated gate driver control signal and source driver control signal, respectively. Output to the gate driver and source driver 30.
ゲートドライバはゲートドライバ制御信号に従って、接続されたゲート信号線の中から1本を選択し、選択したゲート信号線にゲート信号を供給する。これにより、該ゲート信号線に接続された左右方向、すなわちTFT基板1の長手方向に一列のTFTがすべてオンになる。
The gate driver selects one of the connected gate signal lines according to the gate driver control signal, and supplies a gate signal to the selected gate signal line. As a result, all the TFTs in a row in the left-right direction connected to the gate signal line, that is, in the longitudinal direction of the TFT substrate 1 are turned on.
ゲート信号によってオンになったTFTのソース端子に、ソースドライバ30からソース信号が入力される。オンになったTFTのドレイン電極に接続された画素電極と共通電極との間の電圧が、入力されたソース信号により制御され、当該画素電極と共通電極との間の液晶分子の配列が制御される。よって、表示パネル300の各画素の光の透過率が制御される。光の透過率が画素単位で制御された表示パネル300にバックライト(不図示)から光が照射されることにより、表示パネル300に画像信号に従った画像が表示される。
The source signal is input from the source driver 30 to the source terminal of the TFT turned on by the gate signal. The voltage between the pixel electrode connected to the drain electrode of the TFT turned on and the common electrode is controlled by the input source signal, and the arrangement of liquid crystal molecules between the pixel electrode and the common electrode is controlled. The Therefore, the light transmittance of each pixel of the display panel 300 is controlled. By irradiating light from a backlight (not shown) to the display panel 300 whose light transmittance is controlled in units of pixels, an image according to the image signal is displayed on the display panel 300.
このような表示パネル300のTFT基板1の製造時に、ソース信号線8に断線又は短絡等の欠陥が生じた状態で回路が形成されることがある。このような欠陥は、TFT基板1の成膜時における塵埃の巻き込み、又はピンホールが生じているレジストマスクのエッチング時における使用等に起因して生じる。ソース信号線8に欠陥が生じた場合、欠陥があるソース信号線8に接続されたTFTに正しく信号が供給されないために画素電極と共通電極との間の電圧が正しく制御されず、表示画面に表示欠陥が生ずる。
When the TFT substrate 1 of the display panel 300 is manufactured, a circuit may be formed in a state where the source signal line 8 has a defect such as disconnection or short circuit. Such a defect occurs due to dust entrainment during film formation of the TFT substrate 1 or use during etching of a resist mask in which pinholes are generated. When a defect occurs in the source signal line 8, a signal is not correctly supplied to the TFT connected to the defective source signal line 8, so that the voltage between the pixel electrode and the common electrode is not correctly controlled, and the display screen is displayed. Display defect occurs.
本発明に係る表示装置100においては、ソース信号線8の欠陥を修正するための予備配線9が配されている。予備配線9により、表示パネル300の製造時の検査工程においてソース信号線8の欠陥が発見された場合、配線修正工程において配線を修正して該欠陥に起因する表示欠陥を防ぐことができる。
In the display device 100 according to the present invention, a spare wiring 9 for correcting a defect of the source signal line 8 is provided. When a defect of the source signal line 8 is found by the preliminary wiring 9 in the inspection process at the time of manufacturing the display panel 300, the wiring can be corrected in the wiring correction process to prevent a display defect due to the defect.
図3は、実施の形態1に係る回路装置200の配線の修正方法を示す模式図である。図3においては、3つのグループの4本のソース信号線8に断線箇所Xを有し、且つ1グループあたりの断線が生じたソース信号線8が最大で2本である。断線箇所Xを有するソース信号線8の断線箇所Xより先には、ソースドライバ30からのソース信号が伝送されない。
FIG. 3 is a schematic diagram showing a wiring correction method of the circuit device 200 according to the first embodiment. In FIG. 3, the four source signal lines 8 in three groups have the disconnection point X, and the maximum number of source signal lines 8 in which the disconnection per group occurs is two. The source signal from the source driver 30 is not transmitted before the disconnection point X of the source signal line 8 having the disconnection point X.
断線箇所Xを有するソース信号線8と上側第1予備配線90aとの交差箇所において、例えばレーザにより予備配線絶縁膜を融解して除去すると同時に配線を融解することにより、当該ソース信号線8と上側第1予備配線90aとを短絡させて第1短絡部Y1を形成する。同様に、断線箇所Xを有するソース信号線8と下側第1予備配線90bとの交差箇所において、当該ソース信号線8と下側第1予備配線90bとを短絡させて第1短絡部Y2を形成する。同一のグループ内に2つの断線を有するソース信号線8がある場合、夫々のソース信号線は異なる第1予備配線90と短絡される。
At the intersection of the source signal line 8 having the disconnection point X and the upper first preliminary wiring 90a, for example, the preliminary wiring insulating film is melted and removed by a laser, and at the same time, the wiring is melted. The first auxiliary wiring 90a is short-circuited to form a first short-circuit portion Y1. Similarly, at the intersection of the source signal line 8 having the disconnection point X and the lower first spare wiring 90b, the source signal line 8 and the lower first spare wiring 90b are short-circuited to form the first short circuit portion Y2. Form. When there are source signal lines 8 having two disconnections in the same group, each source signal line is short-circuited with a different first spare wiring 90.
その後、第1短絡部Y1を有するソース信号線8を有するグループとその両側のグループとの間の切断箇所Z1で、上側第1予備配線90aが切断される。より詳しくは、上側第1予備配線90aは、第1短絡部Y1を有するソース信号線8が配されたフレキシブルプリント回路基板2a上に配された予備配線接続線92との接続点13と、その右隣の接続点13との間の切断箇所Z1で切断される。更に上側第1予備配線90aは、第1短絡部Y1と、該第1短絡部Y1の左隣の接続点13との間の切断箇所Z1で切断される。斯かる切断は、例えばレーザにより行われる。同様に、下側第1予備配線90bは、第1短絡部Y2を有するソース信号線8が配されたフレキシブルプリント回路基板2a上に配された予備配線接続線92との接続点13と、その左隣の接続点13との間の切断箇所Z2で切断される。更に下側第1予備配線90bは、第1短絡部Y2と、該第1短絡部Y2の右隣の接続点13との間の切断箇所Z2で切断される。切断箇所Z1、Z2により、断線箇所Xを有するソース信号線8を有するグループ毎に独立した上側第1予備配線90a及び下側第1予備配線90bの断片が形成される。
Thereafter, the upper first spare wiring 90a is cut at a cutting point Z1 between the group having the source signal line 8 having the first short-circuit portion Y1 and the groups on both sides thereof. More specifically, the upper first auxiliary wiring 90a is connected to the connection point 13 with the auxiliary wiring connecting line 92 arranged on the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y1 is arranged, It cut | disconnects at the cutting | disconnection location Z1 between the connection points 13 on the right side. Further, the upper first spare wiring 90a is cut at a cutting point Z1 between the first short-circuit portion Y1 and the connection point 13 on the left side of the first short-circuit portion Y1. Such cutting is performed by, for example, a laser. Similarly, the lower first spare wiring 90b has a connection point 13 with a spare wiring connection line 92 arranged on the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y2 is arranged, It is cut at a cutting point Z2 between the connection point 13 on the left side. Further, the lower first auxiliary wiring 90b is cut at a cutting point Z2 between the first short-circuit portion Y2 and the connection point 13 on the right side of the first short-circuit portion Y2. The cut portions Z1 and Z2 form independent pieces of the upper first spare wire 90a and the lower first spare wire 90b for each group having the source signal line 8 having the broken portion X.
更に、断線箇所Xを有するソース信号線8と、断線箇所Xの下側で該ソース信号線8と交差し第1短絡部Y1、Y2で短絡されて接続された上側第1予備配線90a又は下側第1予備配線90bと電気的に接続されている第2予備配線91とが、第2短絡部Y3で夫々短絡される。
Further, the source signal line 8 having the disconnection point X and the upper first spare wiring 90a connected to the source signal line 8 which crosses the source signal line 8 below the disconnection point X and is short-circuited by the first short-circuit portions Y1 and Y2 are connected. The second auxiliary wiring 91 electrically connected to the side first auxiliary wiring 90b is short-circuited at the second short-circuit portion Y3.
以上の修正により、ソース信号線8の断線箇所Xの上側から、第1短絡部Y1、Y2でソース信号線8と短絡された第1予備配線90を介して第2予備配線91までソース信号が伝送される。更に、第2短絡部Y3を介してソース信号線8の断線箇所Xの下側にソース信号が伝送される。このとき、予備配線接続線92の中途に設けられた緩衝増幅器10によって、ソース信号の電流が増幅されるため、ソース信号線8と比較して長大で高負荷な予備配線9により伝送されるソース信号の減衰が防止される。したがって、ソース信号線8が断線箇所Xを有する場合であっても、表示画面に表示欠陥が生じることを防ぐことができる。
With the above correction, the source signal is sent from the upper side of the disconnection point X of the source signal line 8 to the second spare line 91 through the first spare line 90 short-circuited to the source signal line 8 by the first short-circuit portions Y1 and Y2. Is transmitted. Further, the source signal is transmitted to the lower side of the disconnection point X of the source signal line 8 through the second short-circuit portion Y3. At this time, since the current of the source signal is amplified by the buffer amplifier 10 provided in the middle of the spare wiring connection line 92, the source transmitted by the spare wiring 9 which is longer and has a higher load than the source signal line 8. Signal attenuation is prevented. Therefore, even when the source signal line 8 has the broken portion X, it is possible to prevent display defects from occurring on the display screen.
切断箇所Z1、Z2によって、第1予備配線90がソース信号線8のグループ毎に独立した断片に分割されるため、複数の異なるソース信号が第1予備配線90上で混信することが防がれる。但し、同一の第2予備配線91上で複数の異なるソース信号が混信することを防ぐため、同一の第2予備配線91に複数の異なるソース信号線8が接続されないように第1短絡部Y1、Y2が選ばれる必要がある。また、同じ理由で、TFT基板1全体で断線が修正可能なソース信号線8の本数の上限は、設けられた第2予備配線91の本数に等しい。
Since the first spare wiring 90 is divided into independent pieces for each group of the source signal lines 8 by the cut portions Z1 and Z2, a plurality of different source signals can be prevented from interfering on the first spare wiring 90. . However, in order to prevent a plurality of different source signals from interfering on the same second spare wiring 91, the first short-circuit portion Y1, Y2 needs to be selected. For the same reason, the upper limit of the number of source signal lines 8 whose disconnection can be corrected in the entire TFT substrate 1 is equal to the number of second spare wirings 91 provided.
図3においては同一のグループあたりの断線が生じたソース信号線8が最大で2本である場合を示したが、1本の第1予備配線90あたり、同一のグループ内の断線箇所Xを有する2本までのソース信号線8に対応した修正が可能である。
FIG. 3 shows a case where the number of source signal lines 8 in which the disconnection per same group has occurred is two at the maximum, but each first spare wiring 90 has a disconnection point X in the same group. Modifications corresponding to up to two source signal lines 8 are possible.
図4は、実施の形態1に係る回路装置200の配線の修正方法を示す模式図である。図4においては、左端のグループ内の3本のソース信号線8に断線箇所Xが生じている。
FIG. 4 is a schematic diagram illustrating a wiring correction method for the circuit device 200 according to the first embodiment. In FIG. 4, disconnection portions X are generated in the three source signal lines 8 in the leftmost group.
斯かる場合、上側第1予備配線90aは、断線箇所Xを有するソース信号線8のうちの1本と、第1短絡部Y4でレーザによって短絡される。他方の下側第1予備配線90bは、断線箇所Xを有するソース信号線8のうちの残り2本と2箇所の第1短絡部Y5でレーザにより短絡される。
In such a case, the upper first spare wiring 90a is short-circuited by the laser at one of the source signal lines 8 having the disconnection point X and the first short-circuit portion Y4. The other lower first spare wiring 90b is short-circuited by a laser at the remaining two of the source signal lines 8 having the disconnection point X and the two first short-circuit portions Y5.
上側第1予備配線90aは、第1短絡部Y4を有するソース信号線8が配されたフレキシブルプリント回路基板2a上に配された予備配線接続線92との接続点13と、その右隣の接続点13との間の切断箇所Z3で切断される。切断箇所Z3により、同一のソース信号が複数の予備配線接続線92に伝送されることが防がれる。
The upper first auxiliary wiring 90a is connected to the connection point 13 of the auxiliary wiring connecting line 92 arranged on the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y4 is arranged, and the connection on the right side thereof. It is cut at a cutting point Z3 between the point 13 and the point 13. The cut source Z3 prevents the same source signal from being transmitted to the plurality of spare wiring connection lines 92.
下側第1予備配線90bは、2箇所の第1短絡部Y5の間の切断箇所Z4で切断される。更に、下側第1予備配線90bは、第1短絡部Y5と電気的に接続された最近接した予備配線接続線92との接続点13と、該接続点13に第1短絡部Y5とは反対側で最近接した予備配線接続線92との接続点13との間の切断箇所Z5で切断される。換言すると、下側第1予備配線90bは、第1短絡部Y5を有するソース信号線8が配されたフレキシブルプリント回路基板2aの右隣のフレキシブルプリント回路基板2a上の予備配線接続線92との接続点13と、その更に右隣の接続点13との間の切断箇所Z5で切断される。
The lower first auxiliary wiring 90b is cut at a cutting point Z4 between the two first short-circuit portions Y5. Further, the lower first auxiliary wiring 90b is connected to the connection point 13 of the closest auxiliary wiring connecting line 92 that is electrically connected to the first short-circuit part Y5, and the first short-circuit part Y5 is connected to the connection point 13. It is cut at a cutting point Z5 between the connection point 13 and the spare wiring connection line 92 that is closest to the opposite side. In other words, the lower first auxiliary wiring 90b is connected to the auxiliary wiring connecting line 92 on the flexible printed circuit board 2a on the right side of the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y5 is arranged. It is cut at a cutting point Z5 between the connection point 13 and the connection point 13 on the right side.
切断箇所Z4より左側の下側第1予備配線90bの断片は、下側第1予備配線90bの端である。そのため、該断片は、下側第1予備配線90b端部の接続点13で、第1短絡部Y5で短絡されたソース信号線8が配されたフレキシブルプリント回路基板2a上の予備配線接続線92に接続されている。切断箇所Z4より右側の断片は、第1短絡部Y5で短絡されたソース信号線8が配されたフレキシブルプリント回路基板2aの隣のフレキシブルプリント回路基板2a上の予備配線接続線92に、接続点13で接続されている。
The fragment of the lower first spare wiring 90b on the left side of the cut portion Z4 is the end of the lower first spare wiring 90b. Therefore, the fragment is the connection point 92 on the flexible printed circuit board 2a on which the source signal line 8 short-circuited at the first short-circuit portion Y5 is arranged at the connection point 13 at the end of the lower first spare wiring 90b. It is connected to the. A fragment on the right side of the cut portion Z4 is connected to a spare wiring connection line 92 on the flexible printed circuit board 2a adjacent to the flexible printed circuit board 2a on which the source signal line 8 short-circuited at the first short-circuit portion Y5 is arranged. 13 is connected.
切断箇所Z4、Z5によって、夫々1本の異なる予備配線接続線92及び断線箇所Xを有するソース信号線8とのみ接続された2本の独立した断片が作られる。したがって、夫々の予備配線接続線92に異なるソース信号が混信することが防がれる。
By the cut points Z4 and Z5, two independent pieces connected to only the source signal line 8 having one different spare wiring connection line 92 and the broken point X are formed. Therefore, it is possible to prevent different source signals from interfering with each spare wiring connection line 92.
更に、断線箇所Xを有するソース信号線8と、断線箇所Xの下側で該ソース信号線8と交差し第1短絡部Y4、Y5で短絡されて接続された上側第1予備配線90a又は下側第1予備配線90bと電気的に接続されている第2予備配線91とが、第2短絡部Y3で夫々短絡される。
Further, the source signal line 8 having the disconnection point X and the upper first spare wiring 90a connected to the source signal line 8 at the lower side of the disconnection point X crossing the source signal line 8 and short-circuited by the first short-circuit portions Y4 and Y5. The second auxiliary wiring 91 electrically connected to the side first auxiliary wiring 90b is short-circuited at the second short-circuit portion Y3.
切断箇所Z3、Z4、Z5によって、夫々1本の異なる予備配線接続線92に接続された3本の断片が作られる。夫々の断片に接続された予備配線接続線92は異なる第1中継配線93に接続されているため、異なる第2予備配線91を介して、断線箇所Xより下側のソース信号線8にソース信号が伝送される。したがって、断線箇所Xを有する3本のソース信号線8が同一のグループ内にある場合であっても、配線を修正して表示欠陥を防ぐことが可能である。
Three pieces connected to one different spare wiring connection line 92 are made by the cut portions Z3, Z4, and Z5. Since the spare wiring connection lines 92 connected to the respective pieces are connected to different first relay wirings 93, the source signal is sent to the source signal line 8 below the disconnection point X via the different second spare wirings 91. Is transmitted. Therefore, even when the three source signal lines 8 having the disconnection point X are in the same group, the wiring can be corrected to prevent display defects.
尚、図4においては、左端のグループ内の3本のソース信号線8に断線箇所Xが生じている場合の修正方法を示したが、左端又は右端以外のグループにおいては、同一グループ内に断線箇所Xを有するソース信号線8が4本ある場合であっても修正が可能である。
FIG. 4 shows a correction method in the case where the disconnection point X is generated in the three source signal lines 8 in the left end group. However, in the groups other than the left end or the right end, the disconnection occurs in the same group. Even if there are four source signal lines 8 having the location X, the correction is possible.
図5は、実施の形態1に係る回路装置200の配線の修正方法を示す模式図である。図5においては、左端又は右端ではないグループ内の4本のソース信号線8に断線箇所Xが生じている。
FIG. 5 is a schematic diagram illustrating a wiring correction method for the circuit device 200 according to the first embodiment. In FIG. 5, a disconnection point X occurs in the four source signal lines 8 in the group that is not the left end or the right end.
同一のグループ内の4本のソース信号線8に断線箇所Xが生じている場合、該4本の信号線8の2本ずつが夫々、上側第1予備配線90a及び下側第1予備配線90bと、第1短絡部Y4、Y5で短絡されて接続される。続けて、上側第1予備配線90aは、2箇所の第1短絡部Y4の間の切断箇所Z4で切断される。同様に、下側第1予備配線90bは、2箇所の第1短絡部Y5の間の切断箇所Z4で切断される。
When the disconnection point X occurs in the four source signal lines 8 in the same group, two of the four signal lines 8 are respectively the upper first spare wiring 90a and the lower first spare wiring 90b. And are short-circuited and connected by the first short-circuit portions Y4 and Y5. Subsequently, the upper first spare wiring 90a is cut at a cutting point Z4 between the two first short-circuit portions Y4. Similarly, the lower first spare wiring 90b is cut at a cutting point Z4 between the two first short-circuit portions Y5.
その後、上側第1予備配線90a及び下側第1予備配線90bは共に、第1短絡部Y4、Y5と電気的に接続された最近接した予備配線接続線92との接続点13と、該接続点13に第1短絡部Y4、Y5とは反対側で最近接した予備配線接続線92との接続点13との間の切断箇所Z5で切断される。換言すると、上側第1予備配線90aは、第1短絡部Y4を有するソース信号線8が配されたフレキシブルプリント回路基板2a上の予備配線接続線92との接続点13と、その右隣の接続点13との間の切断箇所Z5で切断される。下側第1予備配線90bは、第1短絡部Y5を有するソース信号線8が配されたフレキシブルプリント回路基板2aの右隣のフレキシブルプリント回路基板2a上の予備配線接続線92との接続点13と、その更に右隣の接続点13との間の切断箇所Z5で切断される。更に下側第1予備配線90bは、第1短絡部Y5を有するソース信号線8が配されたフレキシブルプリント回路基板2a上の予備配線接続線92との接続点13と、その更に左隣の接続点13との間の切断箇所Z5で切断される。切断箇所Z4、Z5によって、夫々1本の異なる断線箇所Xを有するソース信号線8及び予備配線接続線92とのみ接続された4本の独立した断片が作られる。
Thereafter, the upper first spare wiring 90a and the lower first spare wiring 90b are both connected to the connection point 13 with the closest spare wiring connecting line 92 electrically connected to the first short-circuit portions Y4 and Y5, and the connection. The point 13 is cut at a cutting point Z5 between the point 13 and the connection point 13 with the auxiliary wiring connecting line 92 that is closest to the first short-circuit part Y4, Y5 on the opposite side. In other words, the upper first auxiliary wiring 90a is connected to the connection point 13 with the auxiliary wiring connecting line 92 on the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y4 is arranged, and the connection on the right side thereof. It is cut at a cutting point Z5 between the point 13 and the point 13. The lower first auxiliary wiring 90b is connected to the auxiliary wiring connecting line 92 on the flexible printed circuit board 2a on the right side of the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y5 is arranged. And a further cutting point Z5 between the connection point 13 on the right side. Further, the lower first spare wiring 90b is connected to the connection point 13 with the spare wiring connecting line 92 on the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y5 is arranged, and further to the left. It is cut at a cutting point Z5 between the point 13 and the point 13. By the cut points Z4 and Z5, four independent pieces connected only to the source signal line 8 and the spare wiring connection line 92 each having one different disconnection point X are formed.
図4と同様に、断線箇所Xを有するソース信号線8と、断線箇所Xの下側で該ソース信号線8と交差し第1短絡部Y4、Y5で短絡されて接続された上側第1予備配線90a及び下側第1予備配線90bと接続された第2予備配線91とが、第2短絡部Y6において夫々短絡される。
As in FIG. 4, the source signal line 8 having the disconnection point X and the upper first spare line that crosses the source signal line 8 below the disconnection point X and is short-circuited and connected by the first short-circuit portions Y4 and Y5. The second auxiliary wiring 91 connected to the wiring 90a and the lower first auxiliary wiring 90b is short-circuited at the second short-circuit portion Y6.
以上の工程により、1本の上側第1予備配線90a及び下側第1予備配線90bに対して、同一のグループ内にある断線箇所Xを有する2本のソース信号線8に対して配線を修正することが可能である。したがって、断線箇所Xを有する4本のソース信号線8が同一のグループ内にある場合であっても、配線を修正して表示欠陥を防ぐことが可能である。
Through the above steps, the wiring is corrected for the two source signal lines 8 having the disconnection portion X in the same group with respect to the one upper first spare wiring 90a and the lower first spare wiring 90b. Is possible. Therefore, even if the four source signal lines 8 having the disconnection point X are in the same group, it is possible to correct the wiring and prevent display defects.
また、本実施の形態においては、上述の断線箇所の修正と類似の方法により、隣接する複数のソース信号線8が短絡された場合であっても、配線を修正することができる。
In the present embodiment, the wiring can be corrected even when a plurality of adjacent source signal lines 8 are short-circuited by a method similar to the above-described correction of the disconnection location.
図6は、実施の形態1に係る回路装置の配線の修正方法を示す模式図である。図6においては、左端のグループ内の隣接する4本のソース信号線8に短絡部X’が生じている。左端のグループ内では3本までのソース信号線8の断線が修正可能であるため、隣接する4本までのソース信号線8が短絡された場合であっても、短絡されたソース信号線8を短絡部X’の前後で切断することにより配線が修正可能である。
FIG. 6 is a schematic diagram showing a wiring correction method for the circuit device according to the first embodiment. In FIG. 6, short-circuit portions X ′ are generated in four adjacent source signal lines 8 in the leftmost group. In the leftmost group, disconnection of up to three source signal lines 8 can be corrected. Therefore, even when up to four adjacent source signal lines 8 are short-circuited, the shorted source signal lines 8 are connected. The wiring can be corrected by cutting before and after the short-circuit portion X ′.
具体的には、短絡部X’で短絡されたソース信号線8のうち、1本を残して他のソース信号線8を短絡部X’の前後で切断する。斯かる切断により、切断されなかった1本のソース信号線8が他のソース信号線8から独立する。切断された残りのソース信号線8に対しては、既に述べた断線に対する修正を適用することにより、配線の修正が可能である。以上の方法により、隣接する4本までのソース信号線8が短絡された場合であっても配線が修正可能である。
Specifically, among the source signal lines 8 short-circuited by the short-circuit portion X ′, the other source signal line 8 is cut before and after the short-circuit portion X ′, leaving one. By such disconnection, one source signal line 8 that has not been disconnected is independent of the other source signal lines 8. With respect to the remaining cut source signal line 8, the wiring can be corrected by applying the correction for the disconnection already described. According to the above method, the wiring can be corrected even when up to four adjacent source signal lines 8 are short-circuited.
右端又は左端でないグループに対しては、4本までのソース信号線8が断線を有する場合であっても修正が可能であるため、隣接する5本までのソース信号線8が短絡されている場合であっても配線の修正が可能である。
For a group that is not the right end or the left end, correction is possible even when up to four source signal lines 8 have a disconnection, so that up to five adjacent source signal lines 8 are short-circuited. Even so, the wiring can be corrected.
(実施の形態2)
図7は、実施の形態2に係る回路装置200及びその配線の修正方法を示す模式図である。本実施の形態においては、複数のソース側フレキシブルプリント回路基板2aのうち両端のものに、3本目の予備配線接続線92、及び該予備配線接続線92と第1予備配線90とを接続する予備配線接続端子12が更に設けられている。より具体的には、上側第1予備配線90aの左側の端部には、本実施の形態において追加された予備配線接続線92が接続点13を介して接続されている。同様に、下側第1予備配線90bの右側の端部には、本実施の形態において追加された予備配線接続線92が接続点13を介して接続されている(不図示)。 (Embodiment 2)
FIG. 7 is a schematic diagram showing acircuit device 200 according to the second embodiment and a method for correcting the wiring thereof. In the present embodiment, a spare wiring connection line 92 for the third and the spare wiring connection line 92 and the first spare wiring 90 are connected to both ends of the plurality of source side flexible printed circuit boards 2a. A wiring connection terminal 12 is further provided. More specifically, the spare wiring connection line 92 added in the present embodiment is connected to the left end portion of the upper first spare wiring 90 a via the connection point 13. Similarly, the auxiliary wiring connection line 92 added in the present embodiment is connected to the right end portion of the lower first auxiliary wiring 90b through the connection point 13 (not shown).
図7は、実施の形態2に係る回路装置200及びその配線の修正方法を示す模式図である。本実施の形態においては、複数のソース側フレキシブルプリント回路基板2aのうち両端のものに、3本目の予備配線接続線92、及び該予備配線接続線92と第1予備配線90とを接続する予備配線接続端子12が更に設けられている。より具体的には、上側第1予備配線90aの左側の端部には、本実施の形態において追加された予備配線接続線92が接続点13を介して接続されている。同様に、下側第1予備配線90bの右側の端部には、本実施の形態において追加された予備配線接続線92が接続点13を介して接続されている(不図示)。 (Embodiment 2)
FIG. 7 is a schematic diagram showing a
図7に示すように、左端のグループ内の4本のソース信号線8に断線箇所Xが生じている場合、上側第1予備配線90a及び下側予備配線90b夫々は、断線箇所Xが生じているソース信号線8のうち2本ずつと第1短絡部Y7、Y8で短絡されて接続される。
As shown in FIG. 7, when the disconnection point X occurs in the four source signal lines 8 in the leftmost group, the disconnection point X occurs in each of the upper first spare wiring 90a and the lower spare wiring 90b. Two source signal lines 8 are connected to each other by being short-circuited by the first short-circuit portions Y7 and Y8.
上側第1予備配線90aは、2箇所の第1短絡部Y7の間の切断箇所Z6で切断される。更に上側第1予備配線90aは、第1短絡部Y7を有するソース信号線8が配されたフレキシブルプリント回路基板2a上に配された予備配線接続線92との接続点13と、その右隣の接続点13との間の切断箇所Z7で切断される。下側第1予備配線90bは図4と同様に、2箇所の第1短絡部Y8の間の切断箇所Z8で切断される。その上、下側第1予備配線90bは、第1短絡部Y8を有するソース信号線8が配されたフレキシブルプリント回路基板2aの右隣のフレキシブルプリント回路基板2a上の予備配線接続線92との接続点13と、その更に右隣の接続点13との間の切断箇所Z9で切断される。
The upper first spare wiring 90a is cut at a cutting point Z6 between the two first short-circuit portions Y7. Further, the upper first spare wiring 90a is connected to the connection point 13 with the spare wiring connecting line 92 arranged on the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y7 is arranged, and to the right of the connection point 13. It is cut at a cutting point Z7 between the connection point 13. The lower first auxiliary wiring 90b is cut at a cutting point Z8 between the two first short-circuit portions Y8, as in FIG. In addition, the lower first auxiliary wiring 90b is connected to the auxiliary wiring connecting line 92 on the flexible printed circuit board 2a on the right side of the flexible printed circuit board 2a on which the source signal line 8 having the first short-circuit portion Y8 is arranged. It is cut at a cutting point Z9 between the connection point 13 and the connection point 13 on the right side.
加えて、断線箇所Xを有するソース信号線8と、断線箇所Xの下側で該ソース信号線8と交差し第1短絡部Y7、Y8で短絡されて接続された上側第1予備配線90a又は下側予備配線90bと電気的に接続されている第2予備配線91とが、第2短絡部Y9において夫々短絡される。
In addition, the source signal line 8 having the disconnection point X and the upper first spare wiring 90a connected to the source signal line 8 below the disconnection point X and connected by being short-circuited by the first short-circuit portions Y7 and Y8. The second auxiliary wiring 91 electrically connected to the lower auxiliary wiring 90b is short-circuited at the second short-circuit portion Y9.
切断箇所Z6、Z7、Z8、Z9によって、夫々1本の異なる断線箇所Xを有するソース信号線8及び予備配線接続線92とのみ接続された4本の断片が作られる。このうち、上側第1予備配線90aの左側の断片は、ソース側フレキシブルプリント回路基板2aに本実施の形態において追加された3本目の予備配線接続線92に接続されている。
Cut pieces Z6, Z7, Z8, and Z9 form four pieces connected only to the source signal line 8 and the spare wiring connection line 92 each having one different disconnection point X. Among these, the left fragment of the upper first spare wiring 90a is connected to the third spare wiring connecting line 92 added to the source-side flexible printed circuit board 2a in the present embodiment.
以上の工程により、第1予備配線90の分割された4本の断片から異なる第2予備配線91を介して、断線箇所Xより先のソース信号線8にソース信号が伝送される。したがって、断線箇所Xを有する4本のソース信号線8が同一のグループ内にある場合であっても、配線を修正して表示欠陥を防ぐことが可能である。
Through the above steps, the source signal is transmitted to the source signal line 8 ahead of the disconnection point X from the four divided pieces of the first spare line 90 via the different second spare line 91. Therefore, even if the four source signal lines 8 having the disconnection point X are in the same group, it is possible to correct the wiring and prevent display defects.
本実施の形態においては、複数のソース側フレキシブルプリント回路基板2aのうち両端のものに、3本目の予備配線接続線92及び緩衝増幅器10が追加されているため、複数のグループのうち端のグループの4本のソース信号線8に断線箇所Xが生じている場合であっても、配線を修正することができる。
In the present embodiment, since the third spare wiring connection line 92 and the buffer amplifier 10 are added to both ends of the plurality of source-side flexible printed circuit boards 2a, the end group among the plurality of groups. Even in the case where the disconnection portion X occurs in the four source signal lines 8, the wiring can be corrected.
本実施の形態における他の実施の形態と同様の部分については、同一の符号を付して詳細な説明を省略する。
In the present embodiment, the same parts as those in the other embodiments are denoted by the same reference numerals, and detailed description thereof is omitted.
上述の実施の形態においては、説明を簡単にするためにソース信号線の欠陥を修正するための構成についてのみ図示して述べたが、ゲート信号線の欠陥を修正するために同様の予備配線を設けることも可能である。斯かる場合、ゲート信号線に対する第1予備配線は、TFT基板上の周辺領域に、TFT基板のゲート側フレキシブルプリント回路基板が接続された側の短辺に沿うようにして配される。また、ゲート信号線に対する第2予備配線は、周辺領域に、TFT基板のゲート側フレキシブルプリント回路基板が接続された側とは反対側の短辺に沿うように配される。ゲート信号線に対する第1中継配線及び第2中継配線は、ゲート側フレキシブルプリント回路基板及びソース側フレキシブルプリント回路基板に夫々配される。
In the above-described embodiment, only the configuration for correcting the defect of the source signal line has been illustrated and described for the sake of simplicity. However, the same spare wiring is provided to correct the defect of the gate signal line. It is also possible to provide it. In such a case, the first spare wiring for the gate signal line is arranged in the peripheral region on the TFT substrate along the short side of the TFT substrate on the side where the gate side flexible printed circuit board is connected. The second spare wiring for the gate signal line is arranged in the peripheral region along the short side of the TFT substrate opposite to the side where the gate side flexible printed circuit board is connected. The first relay wiring and the second relay wiring for the gate signal line are respectively disposed on the gate side flexible printed circuit board and the source side flexible printed circuit board.
尚、TFT基板とソース制御基板及びゲート制御基板との接続は、フレキシブルプリント回路基板を用いた方式に限られず、COG(Chip on Glass)方式によりソースドライバ及びゲートドライバがTFT基板上に実装されたものであってもよい。または、モノリシック方式により、周辺回路がTFT基板上に実装されたものであってもよい。
The connection between the TFT substrate and the source control substrate and the gate control substrate is not limited to the method using the flexible printed circuit board, and the source driver and the gate driver are mounted on the TFT substrate by the COG (Chip on Glass) method. It may be a thing. Alternatively, the peripheral circuit may be mounted on the TFT substrate by a monolithic method.
また、上述の実施の形態において、第1予備配線は、TFT基板の周辺領域の端から端まですべてのソース信号線と予備配線絶縁膜を挟んで交差するようにして配されているが、この例に限られない。第1予備配線は、2つ以上のグループのソース信号線からなるブロック毎に、分けられて配されていてもよい。この場合であっても、TFT基板全体で断線が修正可能なソース信号線の本数の上限は、設けられた第2予備配線の本数に等しい。
In the above-described embodiment, the first spare wiring is arranged so as to intersect all the source signal lines across the spare wiring insulating film from the end to the end of the peripheral region of the TFT substrate. It is not limited to examples. The first spare wiring may be arranged separately for each block composed of two or more groups of source signal lines. Even in this case, the upper limit of the number of source signal lines whose disconnection can be corrected in the entire TFT substrate is equal to the number of second spare wirings provided.
更に、上述の実施の形態において、FPCB上予備配線及び予備配線接続端子は夫々、1つのグループのソース信号線に対して第1予備配線1本あたり1つのみ設けられているが、この例に限られない。1つのグループのソース信号線に対して第1予備配線1本あたり、複数のFPCB上予備配線及び予備配線接続端子が夫々設けられてあってもよい。
Further, in the above-described embodiment, only one spare wiring on the FPCB and one spare wiring connection terminal are provided for each source signal line of one group for each first spare wiring. Not limited. A plurality of spare wirings on the FPCB and spare wiring connection terminals may be provided for each first spare wiring for one group of source signal lines.
加えて、本発明において、表示装置はアクティブマトリクス型の液晶表示装置に限定されない。例えば表示装置はアクティブマトリクス型有機エレクトロルミネッセンス(EL)表示装置であってもよい。または、パッシブマトリックス型の液晶表示装置若しくは有機EL表示装置であってもよい。
In addition, in the present invention, the display device is not limited to an active matrix liquid crystal display device. For example, the display device may be an active matrix organic electroluminescence (EL) display device. Alternatively, it may be a passive matrix liquid crystal display device or an organic EL display device.
尚、本発明の回路装置の適用は表示装置のTFT基板のみには限られない。多数の信号線が配された回路基板であれば、いずれのものであっても適用が可能である。
The application of the circuit device of the present invention is not limited to the TFT substrate of the display device. Any circuit board provided with a large number of signal lines can be applied.
また、本発明の配線修正方法において、配線の短絡と切断の順序は問われない。
Moreover, in the wiring correction method of the present invention, the order of short-circuiting and cutting of the wiring is not limited.
今回開示された実施の形態はすべての点で例示であって、制限的なものではないと考えられるべきである。本発明の範囲は、上記した意味ではなく、請求の範囲によって示され、請求の範囲と均等の意味及び範囲内でのすべての変更が含まれることが意図される。
It should be considered that the embodiment disclosed this time is illustrative in all respects and not restrictive. The scope of the present invention is defined not by the above-described meaning but by the scope of claims, and is intended to include all modifications within the meaning and scope equivalent to the scope of claims.
100 表示装置
200 回路装置
300 表示パネル
1 TFT基板
1a 表示領域
1b 周辺領域
2a ソース側フレキシブルプリント回路基板
2b ゲート側フレキシブルプリント回路基板
3 ソースドライバ
4 ソース制御基板
5 ゲート制御基板
6 信号回路基板
7 コントローラチップ
8 ソース信号線
9 予備配線
90 第1予備配線
90a 上側第1予備配線
90b 下側第1予備配線
91 第2予備配線
92 予備配線接続線
93 第1中継配線
94 第2中継配線
10 緩衝増幅器
11 配線接続部
12 予備配線接続端子
13 接続点
20 テレビジョンチューナ DESCRIPTION OFSYMBOLS 100 Display apparatus 200 Circuit apparatus 300 Display panel 1 TFT substrate 1a Display area 1b Peripheral area 2a Source side flexible printed circuit board 2b Gate side flexible printed circuit board 3 Source driver 4 Source control board 5 Gate control board 6 Signal circuit board 7 Controller chip 8 source signal line 9 spare wiring 90 first spare wiring 90a upper first spare wiring 90b lower first spare wiring 91 second spare wiring 92 spare wiring connecting line 93 first relay wiring 94 second relay wiring 10 buffer amplifier 11 wiring Connection part 12 Spare wiring connection terminal 13 Connection point 20 Television tuner
200 回路装置
300 表示パネル
1 TFT基板
1a 表示領域
1b 周辺領域
2a ソース側フレキシブルプリント回路基板
2b ゲート側フレキシブルプリント回路基板
3 ソースドライバ
4 ソース制御基板
5 ゲート制御基板
6 信号回路基板
7 コントローラチップ
8 ソース信号線
9 予備配線
90 第1予備配線
90a 上側第1予備配線
90b 下側第1予備配線
91 第2予備配線
92 予備配線接続線
93 第1中継配線
94 第2中継配線
10 緩衝増幅器
11 配線接続部
12 予備配線接続端子
13 接続点
20 テレビジョンチューナ DESCRIPTION OF
Claims (6)
- 信号を伝送する複数の信号線、及び該信号線と絶縁された状態で交差しており、前記信号線に欠陥がある場合に前記信号を伝送する予備配線が配された回路基板と、前記信号を生成する複数の信号生成回路とを備え、前記複数の信号線は複数のグループに分けられて夫々の前記グループ毎に異なる前記信号生成回路に接続された回路装置において、
前記予備配線は、少なくとも2つの前記グループに含まれる前記信号線と交差するように前記回路基板に配された第1予備配線と、該第1予備配線と電気的に接続され、前記回路基板に前記信号線と絶縁された状態で交差するように配された第2予備配線とを含み、
前記グループ夫々に、1本の前記第1予備配線につき少なくとも1つ設けられ、前記第1予備配線と前記第2予備配線とを電気的に接続するための接続線を備えていること
を特徴とする回路装置。 A plurality of signal lines that transmit signals, and a circuit board that intersects with the signal lines in an insulated state, and is provided with spare wiring for transmitting the signals when the signal lines are defective; and A plurality of signal generation circuits, wherein the plurality of signal lines are divided into a plurality of groups and connected to the signal generation circuits different for each of the groups,
The spare wiring is electrically connected to the first spare wiring disposed on the circuit board so as to intersect the signal lines included in at least two of the groups, and is connected to the circuit board. A second auxiliary wiring arranged to intersect the signal line in an insulated state,
Each group includes at least one connection line for each of the first spare lines, and a connection line for electrically connecting the first spare line and the second spare line. Circuit device to do. - 前記第1予備配線は更に端部で前記接続線に接続されていることを特徴とする請求項1に記載の回路装置。 2. The circuit device according to claim 1, wherein the first spare wiring is further connected to the connection line at an end portion.
- 断線箇所を有する前記信号線と前記第1予備配線とが短絡された第1短絡部と、
前記断線箇所を有する前記信号線と前記第2予備配線とが短絡された第2短絡部と
を備え、
前記第1予備配線の一部が切断されてあること
を特徴とする請求項1又は2に記載の回路装置。 A first short-circuit portion in which the signal line having the disconnection point and the first spare wiring are short-circuited;
A second short-circuit portion in which the signal line having the disconnection portion and the second auxiliary wiring are short-circuited,
The circuit device according to claim 1, wherein a part of the first spare wiring is cut. - 第1予備配線は、同一のグループ内の2つの前記第1短絡部の間で切断されてあり、且つ前記第1短絡部に電気的に接続された最近接した接続線との接続点と、該接続点に前記第1短絡部とは反対側で最近接した接続線との接続点との間で切断されてあること
を特徴とする請求項1から3のいずれか一つに記載の回路装置。 The first auxiliary wiring is cut between the two first short-circuit portions in the same group and connected to the nearest connection line electrically connected to the first short-circuit portion; The circuit according to any one of claims 1 to 3, wherein the connection point is cut between a connection point with a connection line closest to the connection point on the opposite side of the first short-circuit portion. apparatus. - 請求項1から4のいずれか一つに記載の回路装置を備え、前記信号線は画像信号を伝送することを特徴とする表示装置。 A display device comprising the circuit device according to any one of claims 1 to 4, wherein the signal line transmits an image signal.
- 請求項1又は2に記載の回路装置の同一の前記グループに属する複数の前記信号線に欠陥がある場合に、該欠陥を有する複数の前記信号線のうちの2本と、該2本の信号線と交差する前記第1予備配線とを第1短絡部で夫々短絡し、2つの該第1短絡部の間で前記第1予備配線を切断し、更に前記第1短絡部に電気的に接続された最近接した前記接続線との接続点と、該接続点に前記第1短絡部とは反対側で最近接した接続線との接続点との間で、前記第1予備配線を切断することを特徴とする回路装置の配線修正方法。 3. When two or more of the signal lines belonging to the same group of the circuit device according to claim 1 have a defect, two of the plurality of signal lines having the defect and the two signals The first spare wiring intersecting with the line is short-circuited at each first short-circuit portion, the first spare wiring is cut between the two first short-circuit portions, and further electrically connected to the first short-circuit portion. The first spare wiring is cut between a connection point to the connection line that is closest to the connection point and a connection point to the connection line that is closest to the connection point on the side opposite to the first short-circuit portion. A wiring correction method for a circuit device.
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