WO2016122655A1 - Validation de données dans un réseau de stockage - Google Patents

Validation de données dans un réseau de stockage Download PDF

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Publication number
WO2016122655A1
WO2016122655A1 PCT/US2015/013954 US2015013954W WO2016122655A1 WO 2016122655 A1 WO2016122655 A1 WO 2016122655A1 US 2015013954 W US2015013954 W US 2015013954W WO 2016122655 A1 WO2016122655 A1 WO 2016122655A1
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WO
WIPO (PCT)
Prior art keywords
data
crc
written
character
crc character
Prior art date
Application number
PCT/US2015/013954
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English (en)
Inventor
Melvin K. Benedict
Lidia Warnes
Patrick M. Schoeller
Original Assignee
Hewlett Packard Enterprise Development Lp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Enterprise Development Lp filed Critical Hewlett Packard Enterprise Development Lp
Priority to PCT/US2015/013954 priority Critical patent/WO2016122655A1/fr
Publication of WO2016122655A1 publication Critical patent/WO2016122655A1/fr

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum

Definitions

  • a memory controller is a digital circuit that manages the flow of data to and from storage elements of a system.
  • the flow may be executed by a memory command cycle.
  • the memory command cycle may include a number of commands such as a data payload command, an activate command, and a read command or a write command.
  • the write command may write the data to the storage elements.
  • the storage elements may be dynamic random-access memory (DRAM), synchronous dynamic random-access memory (SDRAM), non-volatile memory such as flash memory, other memory devices, or combinations thereof.
  • FIG. 1 is a diagram of a system for validating data in a storage array, according to one example of principles described herein.
  • FIG. 2 is a diagram of a system for validating data in a storage array, according to one example of principles described herein.
  • FIG. 3 is a diagram of a system for validating data in a storage array, according to one example of principles described herein. 84112767
  • Fig, 4 is a diagram of a system for validating data in a storage array via comparing cyclic redundancy check (CRC) characters, according to one example of principles described herein.
  • CRC cyclic redundancy check
  • FIG. 5 is a diagram of a system for validating data in a storage array via comparing data, according to one example of principles described herein.
  • FIG. 6 is a diagram of a system for validating data in a storage array, according to one example of principles described herein.
  • FIG. 7 is a flowchart of a method for validating data in a storage array, according to one example of principles described herein.
  • FIG. 8 is a flowchart of a method for validating data in a storage array, according to one example of principles described herein.
  • Fig. 9 is a diagram of a validating system, according to one example of principles described herein.
  • Fig. 10 is a diagram of a validating system, according to one example of principles described herein.
  • a memory controller is a digital circuit that manages the flow of data to and from storage elements. Further, the memory controller writes the data to a storage array of the storage element via a write command.
  • the data may be subjected to timing errors, power supply noise, or internal storage array nose. This may alter the data. As a result, errors may be introduced into the data while executing the write command. If errors are introduced into the data, incorrect data is stored in the storage elements. Further, when an error is detected in the data, the entire data is retransmitted to correct the error, if the data is large in size, this can 84112767
  • the principles described herein include a method for validating data in a storage array.
  • Such a method includes receiving, from a memory controller, a write command to write data to a storage array of a storage element, transferring the data with a cyclic redundancy check (CRC) characte to the storage element to create a transfer, writing, based on the transfer, the data with the CRC character to the storage array of the storage element to create written data and a written CRC character, validating, via a sense amplifier, the written data.
  • CRC cyclic redundancy check
  • the term "memory controller” means is a digital circuit that manages the flow of data to and from at least one storage element.
  • the flow may be executed by a memory command cycle.
  • the memory command cycle may include a number of commands such as a data payload command, an activate command, and a read command or a write command.
  • the read command may read data from the storage element.
  • the write command may write the data to the storage element.
  • the term "storage element” means a mechanism to store data.
  • the data may be stored in a storage array of a storage array.
  • the storage element may include dynamic random-access memory (DRAM), synchronous dynamic random- access memory (SDRAM), non-volatile memory such as flash memory, other memory devices or combinations thereof.
  • DRAM dynamic random-access memory
  • SDRAM synchronous dynamic random- access memory
  • non-volatile memory such as flash memory, other memory devices or combinations thereof.
  • write command means executable instructions to write data to a storage array of a storage element.
  • the write command may be issued via a memory controller.
  • CRC character means a mechanism used to detect accidental changes 84112767
  • a CRC character may be a short, fixed-length binary sequence that is concatenated to the data before the data is transferred to the storage element.
  • written CRC character means a mechanism used to detect accidental changes made to data while transferring the data from a storage element to a storage array of the storage element.
  • a written CRC character may be used for validation purposes to determine if the written data in the storage array is valid or invalid.
  • data means information that is to be transferred between a memory controller and a storage array of a storage element.
  • the data may be associated with a size.
  • written data means data that is stored in a storage array of a storage element.
  • the written data may be valid or invalid as determined by a validating system.
  • a number of or similar language is meant to be understood broadly as any positive number comprising 1 to infinity; zero not being a number, but the absence of a number.
  • FIG. 1 is a diagram of a system fo validating data in a storage array, according to one example of principles described herein. As will be described below, a validating system is in 84112767
  • the validating system transfers the data with a CRC character to the storage element to create a transfer. Further, the validating system writes, based on the transfer, the data with the CRC character to the storage array of the storage element to create written data and a written CRC character. The validating system validates, via a sense amplifier, the written data.
  • the system (100) includes a memory controller (102).
  • the memory controller (102) may be a digital circuit that manages the flow of a data to and from a storage element (106) of the system (100). The flow may be executed by a number of commands. The data may be transferred via a bus (108). More information about the memory controller (102) will be described in other parts of this specification.
  • the system (100) further includes the storage element (106).
  • the storage element (106) may include a number of types of memory technologies as long as the types of memory technologies use the same protocol.
  • the storage element (108) may be in communication with the memory controller (102) via the bus (108). More information about the storage elements (106) will be described in other parts of this specification
  • the system (100) further includes a validating system (104).
  • the validating system (104) is in communication with the memory controller (102) and the storage element (108).
  • the validating system (104) receives, from the memory controller (102), a write command to write data to a storage array of the storage element (108).
  • the write command may include a starting address associated with the storage array of storage element (106). The starting address determines a location in the storage array of storage element (106) to start writing the data.
  • the validating system (104) further transfers the data with a CRC character to the storage element (106) to create a transfer.
  • the CRC character may be used to detect accidental changes made to data while 84112767
  • the validating system (104) writes, based on the transfer, the data with the CRC character to the storage array of the storage element (108) to create written data and a written CRC character. As a result, the data is written to the storage array of the storage element (106).
  • a validating engine (1 14) of the validating system (104) further validates, via a sense amplifier, the written data.
  • the validating system (104) may validate the written data at an array storage level. Such a method allows the data to be validated without transferring the data back to the memory controller (102). As a result, the use of the memory controller's bandwidth is reduced. More information about the validating system (104) will be described later on in this specification.
  • the validating system may be located in any appropriate location according to the principles described herein.
  • the validating system may be located on the memory controller, the storage element, other locations, or combinations thereof.
  • Fig. 2 is a diagram of a system for validating data in a storage array, according to one example of principles described herein.
  • a validating system is in communication with a memory controller and a storage element to receive, from the memory controller, a write command to write data to a storage array of a storage element.
  • the validating system transfers the data with a CRC character to the storage element to create a transfer. Further, the validating system writes, based on the transfer, the data with the CRC character to the storage array of the storage element to create written data and a written CRC character.
  • the validating system validates, via a sense amplifier, the written data.
  • the system (200) includes a memory controller (202).
  • the memory controller (202) may be a digital circuit that manages the flow of a data to and from a storage element (206) of the 84112767
  • the flow may be executed by a number of commands.
  • a write command may write the data to the storage element (206).
  • the data may be written to the storage element (206) by the memory controller (202) via a bus (224).
  • the data may be transferred via the bus (224).
  • the memory controller (202) may include data (212).
  • the data (212) may be information that is to be transferred between the memory controller (202) and the storage element (206).
  • the data (212) includes data A (212-1 ), data B (212-2), and data C (212-3).
  • the size of the data (212) may vary based on the amount of information. The more information the larger the size of the data (212).
  • Data A (212-1 ) may be one-kilobyte.
  • Data B (212-2) may be sixty-four bytes.
  • Data C (212-3) may be thirty-two bytes.
  • the memory controller (202) may include a number of write commands (216).
  • the write commands (216) may be mechanisms to write the data (212) to a storage array (218) of the storage element (206).
  • the write commands (216) include write command A (216-1 ), write command B (216-2), and write command C (216-3).
  • Write command A (216-1 ) may be a write operation to write data A (212-1 ) to the storage array (218) of the storage element (206).
  • Write command B (216-2) may be a write operation to write data B (212-2) to the storage array (218) of the storage element (206).
  • Write command C (216-3) may be a write operation to write data C (212-3) to the storage array (218) of the storage element (206).
  • the write commands (216) may include a starting address.
  • the starting address determines a location in the storage array (218) of storage element (206) to start writing the data.
  • write command A (216-1 ) may indicate to write data A (212-1 ) to a start address of 0x002F for the storage array (218).
  • data A (212-1 ) is written to the start address of 0x002F of the storage array (218).
  • the system (200) further includes the storage element (206).
  • the storage element (206) may include a number of types of memory technologies.
  • the types of storage element (206) may include DRAM, SRAM, 84112767
  • the storage element (208) includes the storage array (218). As will be described below, the storage array (218) stores written data (220) and written CRC characters (222).
  • the system (200) further includes a validating system (204).
  • the validating system (204) includes a processor and computer program code.
  • the computer program code is communicatively coupled to the processor.
  • the computer program code includes a number of engines (214).
  • the engines (214) refer to program instructions designed to perform a designated function.
  • the computer program code causes the processor to execute the designated function of the engines (214).
  • the engines (214) refer to a combination of hardware and program instructions to perform a designated function.
  • Each of the engines (214) may include a processor and memory.
  • the program instructions are stored in the memory and cause the processor to execute the designated function of the engine.
  • the validating system (204) includes a receiving engine (214-1 ), a CRC determining engine (214-2), an adding engine (214-3), a transferring engine (214-4), a writing engine (214-5), and a validating engine (214-6).
  • the validating system (204) includes a receiving engine (214-1 ).
  • the receiving engine (214-1 ) receives, from the memory controller (202), a write command (216) to write data (212) to the storage array (218) of the storage element (206).
  • the receiving engine (214-1 ) may receive write command A (216-1 ), write command B (216-2), write command C (216-2), or combinations thereof.
  • each of the write commands (216) may be stored by the receiving engine (214-1 ) in a first in first out (FIFO) queue.
  • FIFO first in first out
  • the validating system (204) includes a CRC determining engine (214-2).
  • the CRC determining engine (214-2) determines a CRC character for the data.
  • the CRC character may be a short, 84112767
  • the CRC character may be eight bits.
  • the validating system (204) includes an adding engine (214-3).
  • the adding engine (214-3) adds the CRC character to the data.
  • the adding engine (214-3) adds the CRC character to the front of the data via concatenation.
  • the adding engine (214-3) adds the CRC character to the end of the data via concatenation.
  • the validating system (204) includes a transferring engine (214-4).
  • the transferring engine (214-4) transfers the data with a CRC character to the storage element (206) to create a transfer. For example, if write command A (216-1 ) is executing, data A (212-1 ) is transferred with a CRC character to the storage element (206).
  • the transferring engine (214-4) transfers the data with the CRC character to the storage element (206) to create the transfer by obtaining the CRC character associated with the data before the transfer before the transfer. Further, the transferring engine (214-4) recalculates the CRC character associated with the data after the transfer to create a recalculated CRC character.
  • the transferring engine (214-4) compares the CRC character with the recalculated CRC character to determine if an error has occurred while transferring the data. If the CRC character and the recalculated CRC character match, no errors have occurred while transferring the data from the memory controller (202) to the storage element (206). As a result, a writing engine (214-5) writes the data with the CRC character to the storage array (218) of the storage element (206) to create written data (220) and a written CRC character (222).
  • the validating system (204) may retransmit this data to the storage element (206).
  • the validating system (204) includes a validating engine (214-6).
  • the validating engine (214-6) validates, via a sense amplifier (210), the written data (220).
  • the validating engine (214-6) validates the written data (220) via CRC characters.
  • the validating engine (214-6) validates the written data (220) by obtaining the recalculated CRC character and obtaining the written CRC character (222).
  • the written CRC character (222) may be obtained via the sense amplifier (210).
  • the validating engine (214-6) validates the written data (220) by comparing the recalculated CRC character with the written CRC character (222) to create a CRC comparison.
  • the validating engine (214-6) determines, based on the CRC comparison, if the written data (220) is valid or invalid. If the CRC comparison illustrates that the recalculated CRC character and the written CRC character match, the written data (220) is valid. However, if the CRC comparison illustrates that the recalculated CRC character and the written CRC character (222) do not match, the written data (220) is invalid.
  • the validating engine (214-6) may validate the written data (220) via the data itself.
  • the validating engine (214-6) validates the written data (220) by obtaining the data and obtaining the written data (220).
  • the data may be the data (212) stored in the memory controller (212).
  • the written data (220) may be obtained via the sense amplifier (210).
  • the validating engine (214-6) validates the written data (220) by comparing the data (212) with the written data (220) to create a data comparison.
  • the validating engine (214-6) determines, based on the data comparison, if the written data (220) is valid or invalid.
  • the receiving engine (214-1 ) receives, from the memory contro!!er (202), write command A (218-1 ) to write data A (212-1 ) to the storage array (218) of the storage element (206).
  • the CRC determining engine (214-2) determines an eight bit CRC character for data A (212-1 ).
  • the adding engine adds the CRC characte to data A (212-1 ) via concatenation.
  • the transferring engine (214-4) transfers data A (212-1 ) with the CRC character to the storage element (206) to create a transfer.
  • the transferring engine (214-4) validates data A (212-1 ) via the CRC character and a recalculated CRC character.
  • the writing engine (214-5) writes data A (212-1 ) with the CRC characte to the storage array (218) of the storage element (206) to create written data (220) and a written CRC character (222).
  • the validating engine (214-6) validates, via the sense amplifier (210), the written data (220) as described above.
  • FIG. 3 is a diagram of a system for validating data in a storage array, according to one example of principles described herein.
  • a validating system is in communication with a memory controller and a storage element.
  • elements of the memory controller and the storage element may aid the validating system in validating written data in the storage array.
  • the system (300) includes a memory controller (302).
  • the memory controller (302) may include system interfaces (310).
  • the system interfaces (310) may allow the memory controller (302) to communicate with other elements in the system (300).
  • the memory controller (302) may include data path logic (312).
  • the data path logic (312) may allow the memory controller (312) to execute various functions.
  • the memory controller (302) may include a CRC character generator (314).
  • the CRC character generator (314) may include processors, memory, and instructions to aid the CRC determining engine of the validating system (304) in determining a CRC character for the data.
  • the system (300) includes a storage element (306).
  • the storage element (306) includes a storage array 84112767
  • the storage element (306) includes a CRC character checker (318).
  • the CRC character checker (318) may include processors, memory, and instructions to aid the validating engine of the validating system (304) in validating the written data. If the written data is invalid, an alert signal (320) may be triggered. The alert signal (320) may alert the memory controller (302) that the written data is invalid.
  • the system (300) may include other components to aid the validating system in determining if the written data in the storage array (316) is valid.
  • Fig. 4 is a diagram of a system for validating data in a storage array via comparing CRC characters, according to one example of principles described herein. As mentioned above, a validating system is in
  • elements of the memory controller and the storage element may aid the validating system in validating written data in the storage array via CRC characters.
  • the storage element (406) includes a CRC character checker (422).
  • the CRC character checker (422) may include processors, memory, and instructions to aid the transferring engine of the validating system (404) to determine if the data transferred to the storage element (406) is valid as described above.
  • the storage element (406) includes a CRC character comparer (418).
  • the CRC character comparer (418) may include processors, memory, and instructions to aid the validating engine of the validating system (404) to validate the written data.
  • the CRC character comparer (418) may validate the written data by obtaining a recalculated CRC character from the CRC character checker (422) and obtain the written CRC character via the sense amplifier of the storage array (416). Further, the CRC character comparer (418) may validate the written data by comparing the recalculated CRC character with the written CRC character to create a CRC comparison and determining, based on the CRC comparison, if the written data is valid as 84112767
  • an alert signal (420) may be triggered.
  • Fig. 5 is a diagram of a system for validating data in a storage array via comparing data, according to one example of principles described herein.
  • a validating system is in communication with a memory controller and a storage element.
  • elements of the memory controller and the storage element may aid the validating system in validating written data in the storage array via the data.
  • the storage element (506) includes a CRC character checker (522).
  • the CRC character checker (522) may include processors, memory, and instructions to aid the transferring engine of the validating system (504) to determine if the data transferred to the storage element (508) is valid.
  • the storage element (508) includes a data comparer (518).
  • the data comparer (518) may include processors, memory, and instructions to aid the validating engine of the validating system (504) to validate the written data.
  • the data comparer (518) may validate the written data by obtaining the data from the CRC character checker (522) and obtain the written data via the sense amplifier of the storage array (516). Further, the data comparer (518) may validate the written data by comparing the data with the written data to create a data comparison and determining, based on the data comparison, if the written data is valid as described above. If the written data is invalid, an alert signal (520) may be triggered.
  • Fig. 6 is a diagram of a system for validating data in a storage array, according to one example of principles described herein. As will be described below, a sense amplifie may be used to validate data written to a storage array after a write command has executed.
  • the system (600) includes a bus (602).
  • the bus (602) may be a bidirectional bus.
  • the bus (602) allows data to be transferred between the memory controller and a storage array (612). 84112767
  • the system (600) further includes a FIFO queue (604).
  • the FIFO queue (604) receives write commands, data, and a CRC character from a CRC character generator (606) as described above.
  • the system (600) includes a CRC character comparer (608) and a storage array (612) that function as described above.
  • the system (600) further includes a multiplexer (608).
  • the multiplexer (608) is used to allow a validating system to select information from the CRC character comparer (608) or select information from the FIFO queue (604).
  • the system (600) further includes a sense amplifier (610).
  • the sense amplifier (610) may be utilized to read written data from the storage array (612). As mentioned above, the sense amplifier (610) is used to validate the written data in the storage array (612).
  • Fig. 7 is a flowchart of a method for validating data in a storage array, according to one example of principles described herein. The method
  • the method (700) may be executed by the system (100) of Fig. 1.
  • the method (700) may be executed by other systems such as system 200, system 300, system 400, system 500, system 600, system 900, or system 1000.
  • the method (700) includes receiving (701 ), from a memory controller, a write command to write data to a storage array of a storage element, transferring (702) the data with a CRC character to the storage element to create a transfer, writing (703), based on the transfer, the data with the CRC character to the storage array of the storage element to create written data and a written CRC character, and validating (704), via a sense amplifier, the written data.
  • the method (700) includes receiving
  • a write command to write data to a storage array of a storage element.
  • the write command may be sent to a FIFO queue. As a result, each of the write commands is executed in the order that they are received. Further, the write command may specify a storage array to write the data to.
  • the method (700) includes transferring
  • the method (702) may validate the data in the transfer to determine if the data 84112767
  • the method (700) may validate the data via CRC characters or the method (700) may validate the data the data directly.
  • the method (700) includes writing (703), based on the transfer, the data with the CRC character to the storage array of the storage element to create written data and a written CRC character, if the data is valid when transferred from the memory controller to the storage element, the data is written to a storage array of the storage element. If the data is invalid when transferred from the memory controller to the storage element, the data is not written to the storage array of the storage element. If the data is invalid, the data may be retransmitted by the memory controller to the storage element.
  • the method (700) includes validating (704), via a sense amplifier, the written data.
  • the data may be validated via CRC characters or by the data directly.
  • Fig. 8 is a flowchart of a method for validating data in a storage array, according to one example of principles described herein.
  • the method (800) may be executed by the system (100) of Fig. 1.
  • the method (800) may be executed by other systems such as system 200, system 300, system 400, system 500, system 600, system 900, or system 1000.
  • the method (800) includes receiving (801 ), from a memory controller, a write command to write data to a storage array of a storage element, determining (802) a CRC character for the data, adding (803) the CRC character to the data, transferring (804) the data with a CRC character to the storage element to create a transfer, writing (805), based on the transfer, the data with the CRC character to the storage array of the storage element to create written data and a written CRC character, and validating (806), via a sense amplifier, the written data.
  • the method (800) includes determining (802) a CRC character for the data.
  • the method (800) may determine the size of the CRC character.
  • the size of the CRC character may be eight bits. However, the size of the CRC character may vary based on the write command, the size of the data, or combinations thereof. 84112767
  • the method (800) includes adding (803) the CRC character to the data.
  • the CRC character may be added, via concatenation, to the data before the data and the CRC character are transferred from the memory controller to the storage element.
  • the CRC character before the transfer and the CRC character after the transfer may be compared to determine if any errors were introduced to the data during the transfer.
  • Fig. 9 is a diagram of a validating system, according to one example of principles described herein.
  • the validating system (900) includes an adding engine (914-1 ), a transferring engine (914-2), a writing engine (914- 3), and a validating engine (914-4).
  • the engines (914) refer to a combination of hardware and program instructions to perform a designated function.
  • the engines (914) may be implemented in the form of electronic circuitry (e.g., hardware).
  • Each of the engines (914) may include a processor and memory.
  • one processor may execute the designated function of each of the engines (914).
  • the program instructions are stored in the memory and cause the processor to execute the designated function of the engine.
  • the adding engine (914-1 ) adds the CRC character to the data.
  • the adding engine (914-1 ) adds one CRC characte to the data.
  • the adding engine (914-1 ) may add several CRC characters to the data.
  • the transferring engine (914-2) transfers the data with the CRC character to the storage element to create a transfer.
  • the transferring engine (914-2) may validate the transfer via the data or the CRC character as described above.
  • the writing engine (914-3) writes, based on the transfer, the data with the CRC character to the storage array of the storage element to create written data and a written CRC character. If the transfer is valid, the writing engine (914-3) writes the data. If the data is invalid, the writing engine (914-3) does not write the data. 84112767
  • the validating engine (914-4) validates, via a sense amplifier, the written data.
  • the validating engine (914-4) validates the written data based on CRC characters or the data.
  • Fig. 10 is a diagram of a validating system, according to one example of principles described herein.
  • validating system (1000) includes resource(s) (1002) that are in communication with a machine- readable storage medium (1004).
  • Resource(s) (802) may include one processor.
  • the resource(s) (602) may furthe include at least one processor and other resources used to process instructions.
  • the machine-readable storage medium (1004) represent generally any memory capable of storing data such as instructions or data structures used by the validating system (1000).
  • the instructions shown stored in the machine- readable storage medium (1004) include determining instructions (1008), transferring instructions (1008), writing instructions (1010), and validating instructions (1012).
  • the machine-readable storage medium (1004) contains computer readable program code to cause tasks to be executed by the resource(s) (1002).
  • the machine-readable storage medium (1004) may be tangible and/or physical storage medium.
  • the machine-readable storage medium (1004) may be any appropriate storage medium that is not a transmission storage medium.
  • a non-exhaustive list of machine-readable storage medium types includes non-volatile memory, volatile memory, random access memory, write only memory, flash memory, electrically erasable program read only memory, or types of memory, or combinations thereof.
  • the determining instructions (1006) represents instructions that, when executed, cause the resource(s) (1002) to determine a CRC character for the data.
  • the transferring instructions (1008) represents instructions that, when executed, cause the resource(s) (1002) to transfer the data with the CRC character to the storage element to create a transfer.
  • the writing instructions (1010) represents instructions that, when executed, cause the resource(s) (1002) to write, based on the transfer, the data with the CRC character to the storage array of the storage element to 84112767
  • the validating instructions (1012) represents instructions that, when executed, cause the resource(s) (1002) to validate, via a sense amplifier, the written data.
  • the machine-readable storage medium (1004) may be part of an installation package.
  • the instructions of the machine-readable storage medium (1004) may be downloaded from the installation package's source, such as a portable medium, a server, a remote network location, another location, or combinations thereof.
  • Portable memory media that are compatible with the principles described herein include DVDs, CDs, flash memory, portable disks, magnetic disks, optical disks, other forms of portable memory, or combinations thereof.
  • the program instructions are already installed.
  • the memory resources can include integrated memory such as a hard drive, a solid state hard drive, or the like.
  • the resource(s) (1002) and the machine- readable storage medium (1004) are located within the same physical component, such as a server, or a network component.
  • the machine-readable storage medium (1004) may be part of the physical component's main memory, caches, registers, non-volatile memory, or elsewhere in the physical component's memory hierarchy.
  • the machine-readable storage medium (1004) may be in communication with the resource(s) (1002) over a network.
  • the data structures, such as the libraries may be accessed from a remote location over a network connection while the programmed instructions are located locally.
  • the validating system (1000) may be implemented on a user device, on a server, on a collection of servers, or combinations thereof.
  • the validating system (1000) of Fig. 10 may be part of a general purpose computer. However, in alternative examples, the validating system (1000) is part of an application specific integrated circuit. 84112767

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

L'invention concerne une validation de données dans un réseau de stockage qui comprend les étapes consistant : à recevoir, en provenance d'un contrôleur de mémoire, une commande d'écriture pour écrire des données sur un réseau de stockage d'un élément de stockage, à transférer les données avec un caractère de contrôle de redondance cyclique (CRC) vers l'élément de stockage pour créer un transfert, à écrire, sur la base du transfert, les données avec le caractère CRC sur la matrice de stockage de l'élément de stockage pour créer des données écrites et un caractère CRC écrit, et à valider, par l'intermédiaire d'un amplificateur de détection, les données écrites.
PCT/US2015/013954 2015-01-30 2015-01-30 Validation de données dans un réseau de stockage WO2016122655A1 (fr)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001001581A1 (fr) * 1999-06-29 2001-01-04 Emc Corporation Gestion d'integrite de donnees pour systemes de stockage de donnees
US6182266B1 (en) * 1997-09-12 2001-01-30 Lucent Technologies, Inc. Self-auditing protection method for sorted arrays
US20050081085A1 (en) * 2003-09-29 2005-04-14 Ellis Robert M. Memory buffer device integrating ECC
US6901551B1 (en) * 2001-12-17 2005-05-31 Lsi Logic Corporation Method and apparatus for protection of data utilizing CRC
US6968478B1 (en) * 2003-12-18 2005-11-22 Xilinx, Inc. Method and apparatus for data transfer validation

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6182266B1 (en) * 1997-09-12 2001-01-30 Lucent Technologies, Inc. Self-auditing protection method for sorted arrays
WO2001001581A1 (fr) * 1999-06-29 2001-01-04 Emc Corporation Gestion d'integrite de donnees pour systemes de stockage de donnees
US6901551B1 (en) * 2001-12-17 2005-05-31 Lsi Logic Corporation Method and apparatus for protection of data utilizing CRC
US20050081085A1 (en) * 2003-09-29 2005-04-14 Ellis Robert M. Memory buffer device integrating ECC
US6968478B1 (en) * 2003-12-18 2005-11-22 Xilinx, Inc. Method and apparatus for data transfer validation

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