WO2016122524A1 - Transparent memristive device - Google Patents
Transparent memristive device Download PDFInfo
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- WO2016122524A1 WO2016122524A1 PCT/US2015/013502 US2015013502W WO2016122524A1 WO 2016122524 A1 WO2016122524 A1 WO 2016122524A1 US 2015013502 W US2015013502 W US 2015013502W WO 2016122524 A1 WO2016122524 A1 WO 2016122524A1
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- Prior art keywords
- elements
- transparent
- glass material
- spin
- memristive
- Prior art date
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- 239000000463 material Substances 0.000 claims abstract description 54
- 239000011521 glass Substances 0.000 claims abstract description 34
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 239000011229 interlayer Substances 0.000 claims abstract description 19
- 239000011370 conductive nanoparticle Substances 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 claims description 29
- 239000002105 nanoparticle Substances 0.000 claims description 7
- 238000000151 deposition Methods 0.000 claims description 5
- 239000003989 dielectric material Substances 0.000 claims description 5
- 238000009987 spinning Methods 0.000 claims description 4
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 3
- 229920003209 poly(hydridosilsesquioxane) Polymers 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims description 2
- 125000002496 methyl group Chemical group [H]C([H])([H])* 0.000 claims description 2
- -1 polydimethylsiloxane Polymers 0.000 description 7
- 239000010410 layer Substances 0.000 description 6
- 239000002019 doping agent Substances 0.000 description 5
- 230000005684 electric field Effects 0.000 description 5
- 239000012780 transparent material Substances 0.000 description 5
- 229920001609 Poly(3,4-ethylenedioxythiophene) Polymers 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000004697 Polyetherimide Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000004205 dimethyl polysiloxane Substances 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 229920000435 poly(dimethylsiloxane) Polymers 0.000 description 2
- 229920000728 polyester Polymers 0.000 description 2
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- 229920001721 polyimide Polymers 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 210000000009 suboesophageal ganglion Anatomy 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229920000144 PEDOT:PSS Polymers 0.000 description 1
- 239000004698 Polyethylene Substances 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- CXKCTMHTOKXKQT-UHFFFAOYSA-N cadmium oxide Inorganic materials [Cd]=O CXKCTMHTOKXKQT-UHFFFAOYSA-N 0.000 description 1
- CFEAAQFZALKQPA-UHFFFAOYSA-N cadmium(2+);oxygen(2-) Chemical compound [O-2].[Cd+2] CFEAAQFZALKQPA-UHFFFAOYSA-N 0.000 description 1
- 239000002041 carbon nanotube Substances 0.000 description 1
- 229910021393 carbon nanotube Inorganic materials 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000002322 conducting polymer Substances 0.000 description 1
- 229920001940 conductive polymer Polymers 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229920001467 poly(styrenesulfonates) Polymers 0.000 description 1
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- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/061—Shaping switching materials
- H10N70/063—Shaping switching materials by etching of pre-deposited switching material layers, e.g. lithography
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
Definitions
- Integrated circuit technology continues to be developed to have ever-increasing applications.
- One of these applications is in transparent and flexible systems.
- the transparent and flexible systems may be contoured to the curved surface of a structure, such as a mobile telephone.
- the transparent and flexible systems may be used in clothing or other flexible items.
- FIG. 1 shows a simplified cross-sectional view of a portion of a transparent memristive device, according to an example of the present disclosure
- FIG. 2 shows a simplified isometric view of a portion of the bottom conductive elements, the switching elements, and the top conductive elements of the transparent memristive device depicted in FIG. 1 , according to an example of the present disclosure
- FIG. 3 shows a flow diagram of a method for fabricating a transparent memristive device, according to an example of the present disclosure.
- FIGS. 4A-4F show various stages of a process of fabricating a transparent memristive device, according to an example of the present disclosure.
- the transparent memristive device may include a transparent substrate on which conductive elements, switching elements, and inter-layer dielectric sections may be provided.
- the switching elements may be formed of a spin on glass material that is doped with electrically conductive nanoparticles.
- the doped spin on glass material may provide the switching behavior of a memristive element because movement of the dopants in the spin on glass material may occur in the presence of a sufficiently strong electrical field.
- the doped spin on glass material may be formed into the transparent memristive device in a relatively simple manner, e.g., through a spin on process. As such, the transparent memristive device disclosed herein may be relatively simpler and cost less to fabricate as compared with conventional memristive device fabrication techniques.
- the conductive elements and the inter- layer dielectric sections may also be transparent to enhance the transparency of the transparent memristive device.
- at least some of the components of the transparent memristive device may be flexible such that the transparent memristive device may be implemented in various applications that traditional memristive devices may not be implemented.
- the transparent memristive device disclosed herein may be used in clothing, curved electronic devices, etc.
- FIG. 1 there is shown a simplified cross- sectional view of a portion of a transparent memristive device 100, according to an example.
- the apparatus 100 depicted in FIG. 1 may include additional components and that some of the components described herein may be removed and/or modified without departing from a scope of the transparent memristive device 100.
- the transparent memristive device 100 may include any number of components that are similarly configured as shown in FIG. 1 .
- the transparent memristive device 100 includes a substrate 1 10, a bottom conductive element 1 12, a plurality of switching elements 1 14, a plurality of inter-layer dielectric sections 1 16, and a top conductive element 1 18.
- the transparent memristive device 100 may also include controlling circuitry 120 integrated into the substrate 1 10.
- the controlling circuitry 120 may include thin film transistors (TFTs).
- TFTs thin film transistors
- varying levels of voltages may be applied between the bottom conductive element 1 12 and the top conductive element 1 18 through the controlling circuitry 120.
- the varying levels of voltages may include, for instance, a writing voltage, a reading voltage, and a resetting voltage.
- controlling circuitry 120 may detect currents flowing through the switching elements 1 14 to determine the respective states of the switching elements 1 14.
- the switching elements 1 14 along with corresponding sections of the bottom conductive element 1 12 and the top conductive element 1 18 may be considered as forming respective memristors.
- the substrate 1 10 may be formed of a transparent material.
- the substrate 1 10 may be formed of a flexible and transparent material.
- the substrate 1 10 may be formed of any suitable material that is transparent and flexible, such as various types of commercially available polymers including polydimethylsiloxane (PDMS), polyimide (PI) polyester (PET), polyethylene napthalate (PEN), polyetherimide (PEI), or the like.
- PDMS polydimethylsiloxane
- PI polyimide
- PET polyethylene napthalate
- PEI polyetherimide
- most or all of the components of the controlling circuitry 120 that are integrated into the substrate 1 10 may be formed of flexible and transparent materials.
- the controlling circuitry 120 may be formed of electrically conductive and transparent materials, including carbon nanotubes thin films, transparent conducting oxides (TCO) such as indium tin oxide (ITO), fluorine-doped tin oxide (FTO), aluminum-doped zinc oxide (AZO) and indium-doped cadmium oxide and transparent conducting polymers such as poly(3,4- ethylenedioxythiophene) (PEDOT), poly(3,4-ethylenedioxythiophene) poly(styrene sulfonate) PEDOT:PSS or poly(4,4-dioctylcyclopentadithiophene).
- TCO transparent conducting oxides
- ITO indium tin oxide
- FTO fluorine-doped tin oxide
- AZO aluminum-doped zinc oxide
- transparent conducting polymers such as poly(3,4- ethylenedioxythiophene) (PEDOT), poly(3,4-ethylenedioxythiophene) poly(
- the bottom conductive element 1 12 and the top conductive element 1 18 may also be formed of a transparent and electrically conductive material or transparent conductive oxides (TCOs), such as ITO or the like.
- TCOs transparent conductive oxides
- the materials employed to form the controlling circuitry 120, the bottom conductive element 1 12, and the top conductive element 1 18 may further be of sufficient flexibility to withstand predetermined levels of bending in the substrate 1 10.
- the inter-layer dielectric layer (ILD) sections 1 16 may be formed of dielectric material, such as silicon dioxide (Si0 2 ). In addition, the ILD sections 1 16 may be formed of transparent or transparent and flexible dielectric materials. Generally speaking, the ILD sections 1 16 may prevent or inhibit current flow between the switching elements 1 14.
- the switching elements 1 14, which may also be referred to herein as memristive elements, may each generally be defined as an electrically actuated switching element whose resistance is changed in response to various programming conditions and are able to exhibit a memory of past electrical conditions. That is, the resistances of the switching elements 1 14 may be changed through application of a current, in which the current may cause mobile dopants in the switching elements 1 14 to move, which may alter the electrical operations of the switching elements 1 14. After removal of the current, the locations and characteristics of the dopants remain stable until the application of another programming electrical field.
- the states of the switching elements 1 14 may be read by applying a lower reading voltage across the switching element which allows the internal electrical resistance of the switching elements 1 14 to be sensed but does not generate a sufficiently high electrical field to cause significant dopant motion.
- the switching elements 1 14 may each be programmed to respectively represent a logical "1 " or ON while in a low resistance state and a logical "0" or OFF while in a high resistance state and may retain these resistance states following withdraw of the programming electrical field.
- the switching elements 1 14 are formed of transparent materials.
- the switching elements 1 14 are made of a spin on glass material that is doped with electrically conductive nanoparticles.
- the doped spin on glass material may be applied onto the bottom conductive element 1 12 via a spin on process.
- the spin on glass material may be doped with the electrically conductive nanoparticles prior to undergoing the spin on process or following the spin on process.
- Suitable spin on glass materials include methyl silsesquioxane (MSQ), hydrogen silsesquioxane (HSQ), and the like.
- suitable electrically conductive nanoparticles include metallic nanoparticles, such as silver (Ag) nanoparticles, titanium (Ti) particles, etc., ITO nanoparticles, or the like.
- concentration of electrically conductive nanoparticles doped into the spin on glass material may be selected such that the transparency of the switching element 1 14 is above a predefined transparency level while providing at least a predetermined level of switching behavior.
- the predefined transparency level and the predetermined level of switching behavior may be based upon various applications of the transparent memristive device 100 and may thus differ for different applications.
- FIG. 2 there is shown a simplified isometric view of the bottom conductive elements 1 12, the switching elements 1 14, and the top conductive elements 1 18 of the transparent memristive device 100 depicted in FIG. 1 , according to an example.
- FIG. 2 depicts the transparent memristive device 100 depicted in FIG. 1 with the inter-layer dielectric sections 1 16 and the substrate 1 10 removed.
- the bottom conductive elements 1 12 may form a first layer 210 and the top conductive elements 1 18 may form a second layer 220.
- the bottom conductive elements 1 12 are depicted as extending along a first plane and the top conductive elements 1 18 are depicted as extending along a second plane, in which the second plane is parallel or nearly parallel to the first plane.
- the bottom conductive elements 1 12 and the top conductive elements 1 18 are also depicted as being in a crossed relationship with respect to each other such that junctions 230 are formed at intersections between respective pairs of the bottom conductive elements 1 12 and the top conductive elements 1 18. That is, the bottom conductive elements 1 12 are depicted as extending in a direction that is perpendicular to the direction in which the top conductive elements 1 18 extend.
- the top conductive elements 1 18 may be substantially perpendicular to the bottom conductive elements 1 12, e.g., there may be less than about a 5° of rotation difference between the bottom conductive elements 1 12 and the top conductive elements 1 18.
- the top conductive elements 1 18 are further depicted as being in a spaced relationship with respect to the bottom conductive elements 1 12 such that gaps exist between the bottom conductive elements 1 12 and the top conductive elements 1 18 into which switching elements 1 14 may be provided.
- the switching elements 1 14 and the sections of the bottom conductive elements 1 12 and the top conductive elements 1 18 around the switching elements 1 14 may form respective memristors 240, which may also referred to as memory devices.
- memristors 240 which may also referred to as memory devices.
- each of the switching elements 1 14 may be individually addressed through application of a current through a respective pair of bottom and top conductive elements 1 12, 1 18.
- FIG. 3 there is shown a flow diagram of a method 300 for fabricating a transparent memristive device 100, according to an example. It should be understood that the method 300 depicted in FIG. 3 may include additional operations and that some of the operations described herein may be removed and/or modified without departing from the scope of the method 300. The description of the method 300 is made with reference to various features depicted in FIGS. 1 and 4A-4F for purposes of illustration and thus, it should be understood that the method 300 may be implemented to fabricate a transparent memristive device 100 in a manner that differs from that shown in FIGS. 1 and 4A-4F.
- a spin on glass material may be doped with electrically conductive nanoparticles.
- An example of a doping process is depicted in FIG. 4A.
- a dopant (electrically conductive nanoparticles) 402 may be doped into a spin on glass material as represented by the arrow 404 to produce doped spin on glass (SOG) 406.
- bottom conductive elements 1 12 may be formed on a transparent substrate 1 10.
- the transparent substrate 1 10, which may be a polymer, may be positioned on a silicon or glass wafer (not shown).
- the bottom conductive elements 1 12, which may be formed of a bottom conductive element material 410, e.g., an ITO film, may be sputtered onto the transparent substrate 1 10, as shown in FIG. 4B.
- a process such as a photolithographic process, may be performed on the bottom conductive element material 410 to form the bottom conductive element material 410 into the strips of bottom conductive elements 1 14 as shown in FIG. 2.
- the bottom conductive element material 410 may be formed into the bottom conductive elements 1 12 following deposition of the doped SOG 406.
- doped spin on glass material 406 may be deposited onto the bottom conductive elements 1 12. For instance, as shown in FIG. 4C, an amount of the doped spin on glass material 406 that is sufficient to form a switching element 1 14 layer having a desired thickness may be deposited onto the bottom conductive element 1 12 (or the bottom conductive element material 410 layer). The doped spin on glass material 406 may be in liquid or gel form when the doped spin on glass material 406 is deposited onto the bottom conductive elements 1 12 (or the bottom conductive element material 410). [0024] At block 308, the transparent substrate 1 10 may be spun to spread the doped spin on glass material 406 on the bottom conductive elements 1 12. As shown in FIG.
- the transparent substrate 1 10 may be spun as indicated by the arrow 412 to cause the doped SOG material 406 to be spread out evenly over the bottom conductive element material 410 (or the bottom conductive elements 1 12).
- the transparent substrate 1 10 may be spun by spinning the silicon or glass wafer on which the transparent substrate 1 10 is supported.
- the switching elements 1 14, which are formed from the doped SOG material 406, may be formed in a relatively simple and efficient manner through the spinning of the doped SOG material 406.
- the doped SOG material 406 may be cured 414 to harden the doped SOG material 406.
- the doped SOG material 406 may be cured through application of ultraviolet light, infrared light, etc.
- the curing may be controlled to harden the doped SOG material 406 without solidifying the doped SOG material 406 to a point that prevents movement of the electrically conductive nanoparticles upon application of a sufficient electrical field.
- interlayer dielectric sections 1 16 may be formed in the doped spin on glass material 406.
- the interlayer dielectric sections 1 16 may be formed into the spaces formed between the doped SOG material 406. For instance, as shown in FIG. 4E, portions of the doped SOG material 406 may be removed through etching 416 at locations at which the interlayer dielectric sections 1 16 are to be formed. Additionally, in instances in which the bottom conductive elements 1 12 (or the bottom conductive element material 410 layer as shown in FIG. 4D) have not been formed into strips, block 310 may also include the removal of portions of the bottom conductive elements 1 12. Portions of the bottom conductive elements 1 12 may be removed 416 through a photolithographic process.
- the interlayer dielectric sections 1 16 may be formed in the locations between the doped SOGs 406 (switching elements 1 14) in which the doped SOGs 406 have been removed.
- the interlayer dielectric sections 1 16 may be formed through deposition of dielectric material into the locations. For instance, dielectric material may be deposited through chemical vapor deposition.
- top conductive elements 1 18 may be formed on the switching elements 1 14.
- the top conductive elements 1 18 may be formed of top conductive element material 420, e.g., an ITO film, which may be sputtered onto the switching elements 1 14 and the inter-layer dielectric sections 1 16, as shown in FIG. 4F.
- a process such as a photolithographic process, may be performed on the top conductive element material 420 to form the top conductive element material 420 into the top conducive elements 1 18 as shown in FIG. 2. That is, the top conductive element material 420 may be formed into the top conductive elements 1 18 as shown in FIGS. 1 and 2.
- the top surfaces of the switching elements 1 14 and the inter-layer dielectric sections 1 16 may be planarized to provide a planar surface upon which the top conductive elements 1 18 may be formed.
- the switching elements 1 14 and the inter-layer dielectric sections 1 16 may be planarized through any suitable planarizing process.
- a portion of the transparent memristive device 100 may have the configuration shown in FIG. 1 .
- the transparent memristive device 100 may be removed from the silicon or glass wafer.
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Abstract
In an example, a transparent memristive device may include a transparent substrate, a plurality of bottom conductive elements positioned on the transparent substrate, a plurality of switching elements positioned on the plurality of bottom conductive elements, wherein each of the plurality of switching elements is formed of a spin on glass material that is doped with electrically conductive nanoparticles, a plurality of inter-layer dielectric (ILD) sections formed between the plurality of switching elements, and a plurality of top conductive elements positioned on top of the plurality of switching elements and the plurality of ILD sections.
Description
TRANSPARENT M EM R I STIVE DEVICE
BACKGROUND
[0001] Integrated circuit technology continues to be developed to have ever-increasing applications. One of these applications is in transparent and flexible systems. In these applications, the transparent and flexible systems may be contoured to the curved surface of a structure, such as a mobile telephone. As another example, the transparent and flexible systems may be used in clothing or other flexible items.
BRIEF DESCRIPTION OF THE DRAWINGS
[0002] Features of the present disclosure are illustrated by way of example and not limited in the following figure(s), in which like numerals indicate like elements, in which:
[0003] FIG. 1 shows a simplified cross-sectional view of a portion of a transparent memristive device, according to an example of the present disclosure;
[0004] FIG. 2 shows a simplified isometric view of a portion of the bottom conductive elements, the switching elements, and the top conductive elements of the transparent memristive device depicted in FIG. 1 , according to an example of the present disclosure;
[0005] FIG. 3 shows a flow diagram of a method for fabricating a transparent memristive device, according to an example of the present disclosure; and
[0006] FIGS. 4A-4F show various stages of a process of fabricating a transparent memristive device, according to an example of the present disclosure.
DETAILED DESCRIPTION
[0007] For simplicity and illustrative purposes, the present disclosure is described by referring mainly to an example thereof. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. It will be readily apparent however, that the present disclosure may be practiced without limitation to these specific details. In other instances, some methods and structures have not been described in detail so as not to unnecessarily obscure the present disclosure. As used herein, the terms "a" and "an" are intended to denote at least one of a particular element, the term "includes" means includes but not limited to, the term "including" means including but not limited to, and the term "based on" means based at least in part on.
[0008] Disclosed herein is a transparent memristive device. The transparent memristive device may include a transparent substrate on which conductive elements, switching elements, and inter-layer dielectric sections may be provided. The switching elements may be formed of a spin on glass material that is doped with electrically conductive nanoparticles. In one regard, the doped spin on glass material may provide the switching behavior of a memristive element because movement of the dopants in the spin on glass material may occur in the presence of a sufficiently strong electrical field. In another regard, the doped spin on glass material may be formed into the transparent memristive device in a relatively simple manner, e.g., through a spin on process. As such, the transparent memristive device disclosed herein may be relatively simpler and cost less to fabricate as compared with conventional memristive device fabrication techniques.
[0009] As also disclosed herein, the conductive elements and the inter- layer dielectric sections may also be transparent to enhance the transparency of the transparent memristive device. Additionally, at least some of the components of the transparent memristive device may be flexible such that the transparent memristive device may be implemented in various applications that traditional memristive devices may not be implemented. For instance, the
transparent memristive device disclosed herein may be used in clothing, curved electronic devices, etc.
[0010] With reference first to FIG. 1 , there is shown a simplified cross- sectional view of a portion of a transparent memristive device 100, according to an example. It should be understood that the apparatus 100 depicted in FIG. 1 may include additional components and that some of the components described herein may be removed and/or modified without departing from a scope of the transparent memristive device 100. For instance, it should be understood that the transparent memristive device 100 may include any number of components that are similarly configured as shown in FIG. 1 .
[0011] As shown in FIG. 1 , the transparent memristive device 100 includes a substrate 1 10, a bottom conductive element 1 12, a plurality of switching elements 1 14, a plurality of inter-layer dielectric sections 1 16, and a top conductive element 1 18. The transparent memristive device 100 may also include controlling circuitry 120 integrated into the substrate 1 10. The controlling circuitry 120 may include thin film transistors (TFTs). According to an example, varying levels of voltages may be applied between the bottom conductive element 1 12 and the top conductive element 1 18 through the controlling circuitry 120. The varying levels of voltages may include, for instance, a writing voltage, a reading voltage, and a resetting voltage. In addition, the controlling circuitry 120 may detect currents flowing through the switching elements 1 14 to determine the respective states of the switching elements 1 14. As used herein, the switching elements 1 14 along with corresponding sections of the bottom conductive element 1 12 and the top conductive element 1 18 may be considered as forming respective memristors.
[0012] The substrate 1 10 may be formed of a transparent material. In addition, or alternatively, the substrate 1 10 may be formed of a flexible and transparent material. The substrate 1 10 may be formed of any suitable material that is transparent and flexible, such as various types of commercially available polymers including polydimethylsiloxane (PDMS), polyimide (PI) polyester (PET), polyethylene napthalate (PEN), polyetherimide (PEI), or the like. In
addition, most or all of the components of the controlling circuitry 120 that are integrated into the substrate 1 10 may be formed of flexible and transparent materials. The controlling circuitry 120 may be formed of electrically conductive and transparent materials, including carbon nanotubes thin films, transparent conducting oxides (TCO) such as indium tin oxide (ITO), fluorine-doped tin oxide (FTO), aluminum-doped zinc oxide (AZO) and indium-doped cadmium oxide and transparent conducting polymers such as poly(3,4- ethylenedioxythiophene) (PEDOT), poly(3,4-ethylenedioxythiophene) poly(styrene sulfonate) PEDOT:PSS or poly(4,4-dioctylcyclopentadithiophene). The bottom conductive element 1 12 and the top conductive element 1 18 may also be formed of a transparent and electrically conductive material or transparent conductive oxides (TCOs), such as ITO or the like. The materials employed to form the controlling circuitry 120, the bottom conductive element 1 12, and the top conductive element 1 18 may further be of sufficient flexibility to withstand predetermined levels of bending in the substrate 1 10.
[0013] The inter-layer dielectric layer (ILD) sections 1 16 may be formed of dielectric material, such as silicon dioxide (Si02). In addition, the ILD sections 1 16 may be formed of transparent or transparent and flexible dielectric materials. Generally speaking, the ILD sections 1 16 may prevent or inhibit current flow between the switching elements 1 14.
[0014] The switching elements 1 14, which may also be referred to herein as memristive elements, may each generally be defined as an electrically actuated switching element whose resistance is changed in response to various programming conditions and are able to exhibit a memory of past electrical conditions. That is, the resistances of the switching elements 1 14 may be changed through application of a current, in which the current may cause mobile dopants in the switching elements 1 14 to move, which may alter the electrical operations of the switching elements 1 14. After removal of the current, the locations and characteristics of the dopants remain stable until the application of another programming electrical field. The states of the switching elements 1 14 may be read by applying a lower reading voltage across the switching element
which allows the internal electrical resistance of the switching elements 1 14 to be sensed but does not generate a sufficiently high electrical field to cause significant dopant motion. In this regard, the switching elements 1 14 may each be programmed to respectively represent a logical "1 " or ON while in a low resistance state and a logical "0" or OFF while in a high resistance state and may retain these resistance states following withdraw of the programming electrical field.
[0015] According to an example, the switching elements 1 14 are formed of transparent materials. For instance, the switching elements 1 14 are made of a spin on glass material that is doped with electrically conductive nanoparticles. In this example, the doped spin on glass material may be applied onto the bottom conductive element 1 12 via a spin on process. In addition, the spin on glass material may be doped with the electrically conductive nanoparticles prior to undergoing the spin on process or following the spin on process.
[0016] Examples of suitable spin on glass materials include methyl silsesquioxane (MSQ), hydrogen silsesquioxane (HSQ), and the like. Examples of suitable electrically conductive nanoparticles include metallic nanoparticles, such as silver (Ag) nanoparticles, titanium (Ti) particles, etc., ITO nanoparticles, or the like. In addition, the concentration of electrically conductive nanoparticles doped into the spin on glass material may be selected such that the transparency of the switching element 1 14 is above a predefined transparency level while providing at least a predetermined level of switching behavior. The predefined transparency level and the predetermined level of switching behavior may be based upon various applications of the transparent memristive device 100 and may thus differ for different applications.
[0017] Turning now to FIG. 2, there is shown a simplified isometric view of the bottom conductive elements 1 12, the switching elements 1 14, and the top conductive elements 1 18 of the transparent memristive device 100 depicted in FIG. 1 , according to an example. In other words, FIG. 2 depicts the transparent memristive device 100 depicted in FIG. 1 with the inter-layer dielectric sections 1 16 and the substrate 1 10 removed.
[0018] As shown in FIG. 2, the bottom conductive elements 1 12 may form a first layer 210 and the top conductive elements 1 18 may form a second layer 220. The bottom conductive elements 1 12 are depicted as extending along a first plane and the top conductive elements 1 18 are depicted as extending along a second plane, in which the second plane is parallel or nearly parallel to the first plane. The bottom conductive elements 1 12 and the top conductive elements 1 18 are also depicted as being in a crossed relationship with respect to each other such that junctions 230 are formed at intersections between respective pairs of the bottom conductive elements 1 12 and the top conductive elements 1 18. That is, the bottom conductive elements 1 12 are depicted as extending in a direction that is perpendicular to the direction in which the top conductive elements 1 18 extend. According to an example, the top conductive elements 1 18 may be substantially perpendicular to the bottom conductive elements 1 12, e.g., there may be less than about a 5° of rotation difference between the bottom conductive elements 1 12 and the top conductive elements 1 18.
[0019] The top conductive elements 1 18 are further depicted as being in a spaced relationship with respect to the bottom conductive elements 1 12 such that gaps exist between the bottom conductive elements 1 12 and the top conductive elements 1 18 into which switching elements 1 14 may be provided. The switching elements 1 14 and the sections of the bottom conductive elements 1 12 and the top conductive elements 1 18 around the switching elements 1 14 may form respective memristors 240, which may also referred to as memory devices. Through the cross-bar arrangement shown in FIG. 2, each of the switching elements 1 14 may be individually addressed through application of a current through a respective pair of bottom and top conductive elements 1 12, 1 18.
[0020] Turning now to FIG. 3, there is shown a flow diagram of a method 300 for fabricating a transparent memristive device 100, according to an example. It should be understood that the method 300 depicted in FIG. 3 may include additional operations and that some of the operations described herein
may be removed and/or modified without departing from the scope of the method 300. The description of the method 300 is made with reference to various features depicted in FIGS. 1 and 4A-4F for purposes of illustration and thus, it should be understood that the method 300 may be implemented to fabricate a transparent memristive device 100 in a manner that differs from that shown in FIGS. 1 and 4A-4F.
[0021] At block 302, a spin on glass material may be doped with electrically conductive nanoparticles. An example of a doping process is depicted in FIG. 4A. As shown in that figure, a dopant (electrically conductive nanoparticles) 402 may be doped into a spin on glass material as represented by the arrow 404 to produce doped spin on glass (SOG) 406.
[0022] At block 304, bottom conductive elements 1 12 may be formed on a transparent substrate 1 10. The transparent substrate 1 10, which may be a polymer, may be positioned on a silicon or glass wafer (not shown). The bottom conductive elements 1 12, which may be formed of a bottom conductive element material 410, e.g., an ITO film, may be sputtered onto the transparent substrate 1 10, as shown in FIG. 4B. According to an example, a process, such as a photolithographic process, may be performed on the bottom conductive element material 410 to form the bottom conductive element material 410 into the strips of bottom conductive elements 1 14 as shown in FIG. 2. In other examples, the bottom conductive element material 410 may be formed into the bottom conductive elements 1 12 following deposition of the doped SOG 406.
[0023] At block 306, doped spin on glass material 406 may be deposited onto the bottom conductive elements 1 12. For instance, as shown in FIG. 4C, an amount of the doped spin on glass material 406 that is sufficient to form a switching element 1 14 layer having a desired thickness may be deposited onto the bottom conductive element 1 12 (or the bottom conductive element material 410 layer). The doped spin on glass material 406 may be in liquid or gel form when the doped spin on glass material 406 is deposited onto the bottom conductive elements 1 12 (or the bottom conductive element material 410).
[0024] At block 308, the transparent substrate 1 10 may be spun to spread the doped spin on glass material 406 on the bottom conductive elements 1 12. As shown in FIG. 4D, the transparent substrate 1 10 may be spun as indicated by the arrow 412 to cause the doped SOG material 406 to be spread out evenly over the bottom conductive element material 410 (or the bottom conductive elements 1 12). The transparent substrate 1 10 may be spun by spinning the silicon or glass wafer on which the transparent substrate 1 10 is supported. In one regard, the switching elements 1 14, which are formed from the doped SOG material 406, may be formed in a relatively simple and efficient manner through the spinning of the doped SOG material 406.
[0025] As also shown in FIG. 4D, the doped SOG material 406 may be cured 414 to harden the doped SOG material 406. By way of example, the doped SOG material 406 may be cured through application of ultraviolet light, infrared light, etc. In addition, the curing may be controlled to harden the doped SOG material 406 without solidifying the doped SOG material 406 to a point that prevents movement of the electrically conductive nanoparticles upon application of a sufficient electrical field.
[0026] At block 310, interlayer dielectric sections 1 16 may be formed in the doped spin on glass material 406. The interlayer dielectric sections 1 16 may be formed into the spaces formed between the doped SOG material 406. For instance, as shown in FIG. 4E, portions of the doped SOG material 406 may be removed through etching 416 at locations at which the interlayer dielectric sections 1 16 are to be formed. Additionally, in instances in which the bottom conductive elements 1 12 (or the bottom conductive element material 410 layer as shown in FIG. 4D) have not been formed into strips, block 310 may also include the removal of portions of the bottom conductive elements 1 12. Portions of the bottom conductive elements 1 12 may be removed 416 through a photolithographic process.
[0027] In addition, as shown in FIG. 4F, the interlayer dielectric sections 1 16 may be formed in the locations between the doped SOGs 406 (switching elements 1 14) in which the doped SOGs 406 have been removed. The
interlayer dielectric sections 1 16 may be formed through deposition of dielectric material into the locations. For instance, dielectric material may be deposited through chemical vapor deposition.
[0028] At block 312, top conductive elements 1 18 may be formed on the switching elements 1 14. The top conductive elements 1 18 may be formed of top conductive element material 420, e.g., an ITO film, which may be sputtered onto the switching elements 1 14 and the inter-layer dielectric sections 1 16, as shown in FIG. 4F. According to an example, a process, such as a photolithographic process, may be performed on the top conductive element material 420 to form the top conductive element material 420 into the top conducive elements 1 18 as shown in FIG. 2. That is, the top conductive element material 420 may be formed into the top conductive elements 1 18 as shown in FIGS. 1 and 2.
[0029] According to an example, the top surfaces of the switching elements 1 14 and the inter-layer dielectric sections 1 16 may be planarized to provide a planar surface upon which the top conductive elements 1 18 may be formed. The switching elements 1 14 and the inter-layer dielectric sections 1 16 may be planarized through any suitable planarizing process.
[0030] Following block 310, a portion of the transparent memristive device 100 may have the configuration shown in FIG. 1 . In addition, the transparent memristive device 100 may be removed from the silicon or glass wafer.
[0031] Although described specifically throughout the entirety of the instant disclosure, representative examples of the present disclosure have utility over a wide range of applications, and the above discussion is not intended and should not be construed to be limiting, but is offered as an illustrative discussion of aspects of the disclosure.
[0032] What has been described and illustrated herein are examples of the disclosure along with some variations. The terms, descriptions and figures used herein are set forth by way of illustration only and are not meant as
limitations. Many variations are possible within the scope of the disclosure, which is intended to be defined by the following claims - and their equivalents - in which all terms are meant in their broadest reasonable sense unless otherwise indicated.
Claims
1 . A transparent memristive device comprising:
a transparent substrate;
a plurality of bottom conductive elements positioned on the transparent substrate;
a plurality of switching elements positioned on the plurality of bottom conductive elements, wherein each of the plurality of switching elements is formed of a spin on glass material that is doped with electrically conductive nanoparticles;
a plurality of inter-layer dielectric (ILD) sections formed between the plurality of switching elements; and
a plurality of top conductive elements positioned on top of the plurality of switching elements and the plurality of ILD sections.
2. The transparent memristive device according to claim 1 , wherein the transparent substrate, the plurality of bottom conductive elements, and the plurality of top conductive elements are flexible.
3. The transparent memristive device according to claim 1 , wherein the electrically conductive nanoparticles are one of indium tin oxide (ITO) nanoparticles and metallic nanoparticles.
4. The transparent memristive device according to claim 1 , wherein the spin on glass material is one of methyl silsesquioxane and hydrogen silsesquioxane.
5. The transparent memristive device according to claim 1 , further comprising:
controlling circuitry for controlling the plurality of switching elements, wherein components of the controlling circuitry is transparent.
6. The transparent memristive device according to claim 1 , wherein the plurality of bottom conductive elements are in a crossed arrangement with the plurality of top conductive elements and wherein the bottom conductive elements and the top conductive elements are formed of transparent conductive oxides.
7. A method for fabricating a transparent memristive device, said method comprising:
doping spin on glass material with electrically conductive nanoparticles; forming bottom conductive elements on a transparent substrate;
depositing the doped spin on glass material onto the bottom conductive elements;
spinning the transparent substrate to spread the doped spin on glass material on the bottom conductive elements;
forming interlayer dielectric sections in the doped spin on glass material, wherein memristive elements are formed by the doped spin on glass material between the formed interlayer dielectric sections; and
forming top conductive elements on the memristive elements.
8. The method according to claim 7, wherein forming the interlayer dielectric sections further comprises removing portions of the doped spin on glass material and depositing dielectric material into the removed portions.
9. The method according to claim 7, wherein the transparent substrate, the bottom conductive element, and the top conductive element are flexible.
10. The method according to claim 7, wherein the bottom conductive element and the top conductive element are formed of transparent conductive oxides.
1 1 . The method according to claim 7, wherein the electrically conductive nanoparticles are one of indium tin oxide nanoparticles and metallic nanoparticles.
12. The method according to claim 7, further comprising forming the bottom conductive elements into a plurality of first strips and the top transparent conductive material into a plurality of second strips, wherein the first strips cross the second strips in a cross-bar array, and wherein the memristive elements are formed at junctions in the cross-bar array.
13. The method according to claim 12, further comprising:
curing the doped spin on glass material following spinning of the transparent substrate; and
forming the bottom conductive elements into the plurality of first strips following curing of the doped spin on glass material.
14. The method according to claim 12, further comprising:
forming the bottom conductive elements into the plurality of first strips prior to depositing the doped spin on glass material onto the bottom conductive elements.
15. A transparent and flexible apparatus comprising:
a transparent substrate;
controlling electronics incorporated into the transparent substrate;
a plurality of bottom transparent conductive oxide (TCO) elements positioned on the transparent substrate;
a plurality of memristive elements positioned on the plurality of bottom TCO elements, wherein each of the plurality of memristive elements is formed of a spin on glass material that is doped with electrically conductive nanoparticles; a plurality of inter-layer dielectric (ILD) sections formed between the plurality of memristive elements; and
a plurality of top TCO elements positioned on top of the plurality of switching elements and the plurality of ILD sections, wherein the plurality of top TCO elements, wherein the plurality of top TCO elements are arranged in a crossed arrangement with respect to the plurality of bottom TCO elements and the plurality of memristive elements are positioned at intersections of the plurality of top TCO elements and the plurality of bottom TCO elements.
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