WO2016110088A1

WO2016110088A1 - Method and apparatus for clearing power failure alarm information

Info

Publication number: WO2016110088A1
Application number: PCT/CN2015/085233
Authority: WO
Inventors: 邱蓉
Original assignee: 中兴通讯股份有限公司
Priority date: 2015-01-06
Filing date: 2015-07-27
Publication date: 2016-07-14

Abstract

A method and apparatus for clearing power failure alarm information. The method comprises: detecting an output voltage of an auxiliary power supply of a main power supply; when it is detected that the output voltage of the auxiliary power supply rises, clearing power failure alarm information of the power supply; alternatively, detecting an input voltage of the power supply; and when it is detected that the input voltage of the power supply rises and the rising amplitude satisfies a pre-set threshold value, clearing power failure alarm information of the power supply. The method and apparatus for clearing power failure alarm information solve the problems that a power supply alarm indicator lamp cannot be cleared in time after the power supply supplies power, the system load is increased, the power supply indicator lamp is turned on all the time or flickers as a reminder, and user experience is affected.

Description

Method and device for clearing power failure alarm information

Technical field

The present invention relates to the field of power supplies, and in particular, to a method and apparatus for clearing power failure alarm information.

Background technique

Communication Chassis Cabinet The power system protection and alarm function is an essential part of the communication power supply. This function can effectively prevent equipment damage and communication link interruption caused by power failure. Parallel is a common application scenario of power supply. The power supply redundancy backup is implemented by parallel to avoid the serious consequences of service interruption caused by system power failure.

The power-on sequence of the parallel power supply is divided into several steps. Take the 1+1 backup as an example. Assume that the main power supply is powered on first, and the power is turned on after the backup power supply. After the main power supply is powered on, the standby power supply has no input, but the processor obtains the voltage through the output of the main power supply, so that it reports the alarm information of the power failure and the output voltage failure to the main control. After the power supply is powered on, the processor's working status is unchanged. Therefore, the previous power failure alarm information will be retained and cannot be cleared in time. Therefore, the standby power alarm indicator will be on or blinking, which will seriously affect the user. Experience; and the backup power alarm information is not cleared in time, which also increases the system's additional burden and risk of failure.

At present, in the related art, the method for clearing the power failure alarm information of the parallel power supply is: the power supply itself has two processors to complete the real-time clearing of the power failure alarm information, and the solution has a large limitation, and is not applicable to only one The power supply of the processor is not conducive to cost savings.

Summary of the invention

In order to overcome the deficiencies of the prior art, the embodiment of the present invention provides a method and a device for clearing the power failure alarm information, so as to at least solve the application limitation caused by requiring two processors in the related art to clear the power failure alarm information. Sexual problem.

In order to solve at least the above technical problem, an embodiment of the present invention provides a method for clearing a power failure alarm information, including: detecting an output voltage of an auxiliary power source of a main power source; and detecting an increase in an output voltage of the auxiliary power source, clearing Power failure alarm information of the power supply.

In order to solve at least the above technical problem, the embodiment of the present invention further provides a power-off alarm information clearing method, including: detecting an input voltage of a power source; detecting that an input voltage of the power source rises, and the rising amplitude meets a preset threshold In this case, clear the power failure alarm information of the power supply.

In order to solve at least the above technical problem, an embodiment of the present invention further provides a power failure alarm information clearing apparatus, including: a first detecting module configured to detect an output voltage of an auxiliary power source of a main power source; and a first clearing module configured to be When the output voltage of the auxiliary power source is detected to rise, the power failure alarm information of the power source is cleared.

In order to solve at least the above technical problem, the embodiment of the present invention further provides a power failure alarm information clearing apparatus, including: a second detecting module configured to detect an input voltage of the power source; and a second clearing module configured to detect the When the input voltage of the power supply rises and the rising amplitude meets the preset threshold, the power failure alarm information of the power supply is cleared.

Compared with the related art, the embodiment of the present invention adopts an output voltage for detecting the auxiliary power source of the main power source; when detecting that the output voltage of the auxiliary power source rises, the power-off alarm information of the auxiliary power source is cleared; The processor can realize the application limitation caused by the power-off alarm information clearing, and expands the practicability.

DRAWINGS

FIG. 1 is a schematic structural diagram of a power supply of a first embodiment of a power failure alarm information clearing apparatus according to the present invention.

2 is a schematic diagram of a power structure of a second embodiment of a power failure alarm information clearing apparatus according to the present invention.

3 is a flow chart of a preferred embodiment of a method for clearing power failure alarm information according to the present invention.

detailed description

Parallel is a common application scenario of power supply. The power supply redundancy backup is implemented by parallel to avoid the serious consequences of system power failure. In this application scenario, there are usually 1+1 backups, 2+2 backups, or 3+3 backups. For the 2, 4 or 6 power supplies plugged into the system chassis, the order of power-on must be sequential. For the backup power supply after power-on, the processor takes power through the bus. At this time, the backup power supply will report the alarm information of input power failure and output voltage failure. When the input power to the backup power supply is provided, since the processor is already The working status cannot be cleared automatically.

As shown in FIG. 1 , the power supply structure of the first preferred embodiment of the power-off alarm information device of the present invention is shown. The power input voltage is converted into a DC voltage and a PFC (Power Factor Check) through the rectifier module 102. That is, the power factor correction module 103 boosts the DC voltage to a DC voltage of 400V, and then splits into two parts of the output, and a part of the output is stepped down by the main power conversion module 104, filtered by the rectification and filtering module 106, and converted into an output voltage of the power supply; A portion of the output is converted to an auxiliary source output voltage by the auxiliary source conversion module 107.

The output voltage of the power source is transformed by the second rectifier module 101 of the DC/DC-2 (dc dc converter), and the output voltage of the auxiliary power source is changed by the first rectifier module 101 of the DC/DC-1 (dc dc converter). Voltage, these two voltages pass through the DC/DC-3 (dc dc converter), the third rectifier module 101 becomes the input voltage required by the processor, and is connected to the control chip I/O pin (input/output pin) 40 Power is supplied to the processor 4.

The detecting module 3 is configured to detect a change of the auxiliary power output voltage, and when detecting that the output voltage of the auxiliary power source generates a rising waveform edge, send a signal set to clear the power failure alarm information to the processor 4 The processor 4 clears the power failure alarm information 2 of the power supply.

Take the 1+1 power backup as an example. The two power supplies are used in parallel. The main power supply and the backup power supply are respectively recorded, and the output of the main power supply and the backup power supply are connected together. When the main power supply is powered by the input of the main power supply, it is assumed that the output voltage of the main power supply is 12V. At this time, the output voltage of the backup power supply is connected to the output voltage of the main power supply, so the output voltage of the backup power supply also has 12V. Then, the processor 4 connected to the standby power source is powered by the output voltage of 12V, and starts to work. At this time, the backup power supply itself has no input voltage, so the backup power supply reports an alarm information 2 for input power failure to the processor 4. If the input to the standby power supply is supplied, the power supply is powered on. At this time, since the processor 4 does not receive the command to clear the alarm information 2, the previously input power-off alarm information is maintained. Therefore, the alarms reported by the standby power supply are inconsistent with the actual status of the backup power supply.

As shown in FIG. 2, the power supply structure of the second preferred embodiment of the power-off alarm information device of the present invention is shown. The power input voltage is converted into a DC voltage and a PFC (Power Factor Check) through the rectifier module 102. That is, the power factor correction module 103 boosts the DC voltage to a DC voltage of 400V, and then splits into two parts of the output, and a part of the output is stepped down by the main power conversion module 104, filtered by the rectification and filtering module 106, and converted into an output voltage of the power supply; A portion of the output is converted to an auxiliary source output voltage by the auxiliary source conversion module 107.

Wherein, the output voltage of the power source is transformed by the DC/DC-2 module 101, and the auxiliary power output voltage is transformed by the DC/DC-1 module 101, and the two voltages become the processor through the DC/DC-3 module 101. The required input voltage is supplied to the processor 4 by connecting the control chip I/O pin (input/output pin) 40.

The detecting module 3 is configured to detect a change of the power input voltage, detect that there is a rising edge of the waveform of the input voltage of the power source, and the rising edge amplitude exceeds the preset threshold, and send the power-down alarm information set to clear the power source. The signal is sent to the processor 4 to clear the power failure alarm information 2 of the power supply.

Referring to FIG. 3, it is a flowchart of a preferred embodiment of the method for clearing power failure alarm information according to the present invention. It should be noted that steps S1-S3 in the following description are for convenience of description only and are not used as reference numerals.

Step S1, supplying power to the power supply. The power input voltage is divided into two parts by the rectifier module 102 and the PFC power factor correction module 103, and a part of the output is converted into the output voltage of the power source after being converted by the main power conversion module 104 and the rectification and filtering module 105; A portion of the output passes through the auxiliary source conversion module 106 and becomes an auxiliary source output voltage.

Wherein, the output voltage of the power source is transformed by the DC/DC-2 module 101, and the auxiliary power output voltage is transformed by the DC/DC-1 module 101, and the two voltages become the processor through the DC/DC-3 module 101. The required input voltage is supplied to the processor 4 by connecting a control chip I/O pin (input/output pin) 40.

In step S2, the detecting module 3 is arranged to detect a rising edge of the output voltage change of the auxiliary power source or to detect a change of the power source input voltage, detecting that the voltage is on a rising edge and conforming to a preset threshold.

Specifically, when it is detected that the input voltage rising amplitude of the power supply exceeds the preset threshold, or the rising edge of the output voltage of the auxiliary power source is detected, the signal of the power-down alarm information 2 of the clear power source is sent to the processor to clear the power source. Power failure alarm information.

If the rising edge of the power input voltage change is not detected, or the input voltage change does not meet the preset threshold, it can be considered that the auxiliary power supply has been in the output voltage stable state before, that is, the power is not actually re-powered; in this case, It can be considered that the power supply is in the input undervoltage protection state. If there is power failure alarm information, it is not caused by the power supply, that is, the power failure alarm information should be retained.

Step S3, clearing the power failure alarm information 2, after detecting the rising edge of the auxiliary power supply output voltage change, the detecting module 3 sends a signal set to clear the power failure alarm information 2 of the auxiliary power source to the processor to clear the auxiliary power supply. Electrical alarm information.

As long as the power supply is supplied, the input terminal is connected to the input voltage. Then the output voltage of the auxiliary power supply changes, and the output voltage of the auxiliary power supply has a rising edge of the waveform. Detection module 3 detects the rising edge of this voltage and passes it to I/O pin 40 that is sent to the processor. At this point, the I/O pin 40 of the processor 4 captures this rising edge and jumps to the corresponding processing function. In the corresponding processing function, a clear alarm instruction is executed. At this point, the power clearing alarm is completed. The power supply starts working normally. The function is executed and returns to the main loop. This does not affect the user experience, while reducing the additional burden of system processing and the risk of failure.

The above description is only the preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes can be made to the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and scope of the present invention are intended to be included within the scope of the present invention.

Industrial applicability

As described above, the method and apparatus for clearing the power failure alarm information provided by the embodiment of the present invention have the following beneficial effects: using an output voltage of the auxiliary power source for detecting the main power source; and detecting an increase of the output voltage of the auxiliary power source, The power-off alarm information of the auxiliary power supply is cleared; the problem of application limitation caused by the need of two processors in the related art to clear the power-down alarm information is solved, and the practicality is expanded.

Claims

A method for clearing power failure alarm information, including:

Detecting the output voltage of the auxiliary power source of the main power source;

When it is detected that the output voltage of the auxiliary power source rises, the power failure alarm information of the power source is cleared.
The method of claim 1, wherein when detecting that the output voltage of the auxiliary power source rises, clearing the power failure alarm information of the power source includes:

A rising edge is detected in the waveform of the output voltage of the auxiliary power source;

Sending a signal set to clear the power failure alarm information of the power source to the processor to clear the power failure alarm information of the power source.
A method for clearing power failure alarm information, including:

Detecting the input voltage of the power supply;

When it is detected that the input voltage of the power source rises and the rising amplitude meets the preset threshold, the power failure alarm information of the power source is cleared.
The method of claim 3, wherein, when it is detected that the input voltage of the power source rises and the rising amplitude meets a preset threshold, clearing the power failure alarm information of the power source includes:

A rising edge is detected in the waveform of the input voltage of the power source;

Detecting that the input voltage rise of the power source exceeds the preset threshold;

Sending a signal set to clear the power failure alarm information of the power source to the processor to clear the power failure alarm information of the power source.
A power failure alarm information clearing device includes:

a first detecting module configured to detect an output voltage of the auxiliary power source of the main power source;

The first clearing module is configured to clear the power failure alarm information of the power source when detecting that the output voltage of the auxiliary power source rises.
The apparatus of claim 5 wherein said first clearing module comprises:

a first detecting unit configured to detect a rising edge of a waveform of an output voltage of the auxiliary power source;

The first sending unit is configured to send a signal that is set to clear the power failure alarm information of the power source to the processor to clear the power failure alarm information of the power source.
A power failure alarm information clearing device includes:

a second detecting module configured to detect an input voltage of the power source;

The second clearing module is configured to clear the power failure alarm information of the power source when detecting that the input voltage of the power source rises and the rising amplitude meets a preset threshold.
The apparatus of claim 7, wherein the second clearing module comprises:

a second detecting unit configured to detect that a waveform of an input voltage of the power source has a rising edge;

a third detecting unit, configured to detect that an increase in an input voltage of the power source exceeds the preset threshold;

The second sending unit is configured to send a signal that is set to clear the power failure alarm information of the power source to the processor to clear the power failure alarm information of the power source.