WO2016105773A1 - Appareils et procédés pour fournir une tension de charge sélectionnable - Google Patents

Appareils et procédés pour fournir une tension de charge sélectionnable Download PDF

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Publication number
WO2016105773A1
WO2016105773A1 PCT/US2015/062123 US2015062123W WO2016105773A1 WO 2016105773 A1 WO2016105773 A1 WO 2016105773A1 US 2015062123 W US2015062123 W US 2015062123W WO 2016105773 A1 WO2016105773 A1 WO 2016105773A1
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WO
WIPO (PCT)
Prior art keywords
frequency
output voltage
voltage
power management
power
Prior art date
Application number
PCT/US2015/062123
Other languages
English (en)
Inventor
Anil Baby
Satish Prathaban
Original Assignee
Intel Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corporation filed Critical Intel Corporation
Priority to CN201580064238.3A priority Critical patent/CN107005074B/zh
Priority to JP2017533451A priority patent/JP6612350B2/ja
Priority to KR1020177013790A priority patent/KR102496919B1/ko
Priority to EP15873979.7A priority patent/EP3238321A4/fr
Publication of WO2016105773A1 publication Critical patent/WO2016105773A1/fr

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/02—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from ac mains by converters
    • H02J7/04—Regulation of charging current or voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/263—Arrangements for using multiple switchable power supplies, e.g. battery and AC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/44—Methods for charging or discharging
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/007—Regulation of charging or discharging current or voltage
    • H02J7/00712—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters
    • H02J7/007182—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J2207/00—Indexing scheme relating to details of circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J2207/30—Charge provided using DC bus or data bus of a computer
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/00032—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries characterised by data exchange
    • H02J7/00034—Charger exchanging data with an electronic device, i.e. telephone, whose internal battery is under charge
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10—Energy storage using batteries

Definitions

  • Portable devices such as tablet computers and mobile phones may use a micro-universal serial bus (USB) port or a type-C USB port for charging as well as data transfer.
  • USB micro-universal serial bus
  • charging through micro-USB or type-C USB ports may be done at 5V, 1 .5A (e.g., 7.5W) and may require a long time to charge.
  • the charging time may be longer than if the device is not active during charging.
  • FIG. 1 is a block diagram of an apparatus, according to embodiments of the present invention.
  • FIG. 2 is a block diagram of an apparatus, according to another embodiment of the present invention.
  • FIG. 3 is a flow diagram of method, according to an embodiment of the present invention.
  • FIG. 4 is a flow diagram of a method, according to another embodiment of the present invention.
  • an alternating current (AC) power adapter may include a detection apparatus that may enable charging of a portable device by power source at a selectable rate, e.g., at a standard (also "normal” herein) rate (e.g., 5V, 1 .5 amperes), and at a higher rate than the standard rate.
  • a selectable rate e.g., at a standard (also "normal” herein) rate (e.g., 5V, 1 .5 amperes)
  • Embodiments may enable charging at the higher rate than the standard rate with a relatively low cost
  • a USB dedicated charging AC adapter that may utilize a portable device handshake and may enable an increase in USB charging voltage from a first voltage level, e.g., 5V, to a second voltage level (e.g., 12V), which may result in faster charging of the portable device via USB port.
  • Detection of the compatible portable device by the AC adapter may be realized via an inductor- capacitor (L-C) tank circuit that is resonant at a defined frequency.
  • L-C tank circuit for identification of the compatible portable device may be implemented at a lower cost than, e.g., use of a dedicated integrated circuit (IC) in the AC adapter to identify the compatible portable device.
  • IC dedicated integrated circuit
  • multiple L-C tank circuits may be employed to enable charging at any of a plurality of voltage levels, e.g., without affecting USB communication. Charging at the higher voltage level may be enabled whether the portable system is in shut down mode or in active mode.
  • Use of one or more L-C tank circuits may be compatible with, e.g., USB BC1 .2 and USB power delivery (PD) specifications.
  • FIG. 1 is a block diagram of an apparatus 100, according to an embodiment of the present invention.
  • the apparatus 100 includes a USB AC adapter 1 10 and a portable device 150 that includes power management logic 120 and a system on a chip (SOC) 130.
  • the USB AC adapter 1 10 is to connect to the portable device 150 via a USB connector 140.
  • the USB AC adapter 1 10 includes an AC/DC converter 1 12 and a detector 1 14.
  • the power management logic 120 includes a USB charger interface 122, status/configuration registers 124, USB switches 126, signal generator logic 152, a current meter 154 (e.g., current measurement logic), and a USB port 140.
  • the USB port 140 may be, e.g., a micro-AB port, a Type-C port, or another USB port.
  • a change of charging voltage from a first charging voltage to a second (e.g., higher) charging voltage through the USB port 140 may occur as follows. (In other embodiments, an order in which actions are executed may vary.)
  • the USB adapter 1 10 may be coupled to an AC source 102.
  • the USB adapter 1 10 may drive a first voltage (e.g., 5V) to the USB port 140.
  • a power conduit VBUS 122 can be enabled only after an upstream facing port (UFP) pull down is detected on a CC pin of the USB adapter 1 10 (e.g., detected at line 142 output from the USB port 140).
  • UFP upstream facing port
  • the USB adapter 1 10 behaves like a BC1 .2 DCP adapter and complies with a BC1 .2 DCP adapter Specification.
  • the portable device 150 may detect that the USB adapter 1 10 is a
  • D+/D- lines 1 18/1 19 may be available for a voltage negotiation.
  • a Type-C USB port such as USB port 160 is used, one of D+, D-, CC, SBU1 , SBU2, RX1 +, RX1 -, RX2+, RX2-, TX1 +, TX1 - , TX2+, or TX2- may be available for voltage negotiation.
  • the portable device 150 begins to charge at a normal charging voltage. In some embodiments, the normal charging voltage is approximately 5 volts.
  • the signal generator logic 152 may generate a signal (e.g., square wave signal), and send the signal, via the charger interface 122, to an available line (e.g., for type B or type AB, either of D+ 1 18 or D- lines 1 19; for Type-C, any available line from the lines listed above) at a signal frequency that may be incremented within a defined frequency band.
  • the signal may be communicated to the USB Adapter 1 10.
  • the signal frequency may start from a minimum frequency and the frequency may be increased in incremental steps (e.g., frequency sweep or frequency drive herein).
  • the portable device 150 may detect a resonant load during the frequency sweep, e.g., via a change in current supplied by the signal generator logic 152, as detected by the current meter 154.
  • the portable device 150 may fine tune and lock the signal frequency at or near a resonant frequency of a tank circuit located within the detector 1 14 of the USB adapter. If a resonant load is not found, the portable device 150 will continue normal charging, e.g., at the normal charging voltage.
  • an L-C tank circuit voltage at the USB AC adapter 1 10 may increase to multiple times of a driven voltage (e.g. from 3.3V, increase to over 5V). This increase in voltage may occur at or close to the resonant frequency of the tank circuit.
  • the increased voltage may be used to activate a field effect transistor (FET), e.g., within the detector 1 14 to change AC adapter output voltage.
  • FET field effect transistor
  • the higher voltage at resonance may serve as an indicator that charging voltage may change (e.g., to a higher output voltage).
  • the resonance and resultant higher resonant circuit voltage may be a distinct behavior that is not easily confused by other communication waveforms.
  • Distinct resonant frequencies can be assigned to each of a plurality of high voltage levels, each of which may have a corresponding L-C tank circuit within the detector 1 14.
  • the AC USB adapter 1 10 can support multiple output voltage levels.
  • the portable device 150 may check for a desired output voltage from the AC adapter 1 10 (e.g., higher charging voltage) on VBUS 122/142. If the desired output voltage is available from the AC adapter 1 10 via the USB port 140 prior to expiration of a blank time interval, charging of the portable device 150 at a higher rate is enabled. If the desired output voltage is not available prior to expiration of the blank time interval, the portable device 150 may cease the frequency sweep and may continue with normal charging, e.g., at the normal charging voltage. In one embodiment, the normal charging voltage is approximately 5 volts.
  • the adapter output voltage may be reduced to the regular voltage (e.g., 5V), as the signal is disconnected from the USB AC adapter 1 10. There may be a time out delay before reducing the charging voltage to the initial voltage.
  • the regular voltage e.g., 5V
  • the time out delay may be shorter than a shortest practical time needed to remove a connector (e.g., USB connector 140) from one device and plug to another device compatible with the BC1 .2 specification.
  • a connector e.g., USB connector 140
  • the portable device 150 may disconnect the signal (e.g., square wave signal), and normal port function may resume.
  • the signal e.g., square wave signal
  • FIG. 2 is a block diagram of a USB AC adapter 200, according to another embodiment of the present invention.
  • the USB AC adapter 200 may include an AC/DC converter 210 and a detector 220. Also shown are lines D+ 232, D- 234, VBUS 236, and CC 238. (In other embodiments, e.g., for use with type-C USB port, an available line from the type-C USB port may be utilized in voltage negotiation.)
  • the USB AC adapter 200 may be adapted/configured to couple to a portable device (not shown) via a USB plug 240, e.g., AB USB port, or micro/Type-C plug, or another USB plug.
  • a signal e.g., square wave signal
  • the signal received may have a frequency fsignai that changes with time, e.g., sweeps within a determined frequency band (e.g., sweep from a lowest frequency to a highest frequency of the frequency band).
  • An L-C tank circuit 222 within the detector 220 may "see" the signal.
  • the L- C tank circuit 222 may be tuned to a resonant frequency f, e.g. determined by values of the inductor L and the capacitor C. As the varying frequency f S i gn ai approaches the resonant frequency f, a voltage across the L-C tank circuit 222 may rise, and as the frequency fsignai changes to values that are increasingly distant from the resonant frequency f, the voltage across the L-C tank circuit 222 may fall to a steady value.
  • the portable device can detect a resonance in the L-C tank circuit 222 by measuring current output from signal generator logic (e.g., within the portable device 150) and when resonance is detected, the signal generator logic within the portable device 150 may return to a frequency range within which the resonance has been detected, and may lock in on or near the resonant frequency f (e.g., within a determined frequency differential of the resonant frequency f , the determined frequency differential forming a frequency band that includes frequencies below the resonant frequency f and frequencies above the frequency f).
  • signal generator logic e.g., within the portable device 150
  • the signal generator logic within the portable device 150 may return to a frequency range within which the resonance has been detected, and may lock in on or near the resonant frequency f (e.g., within a determined frequency differential of the resonant frequency f , the determined frequency differential forming a frequency band that includes frequencies below the resonant frequency f and frequencies above the frequency f).
  • a diode 224 may rectify AC voltage to a DC signal, and a resistor-capacitor (R-C) circuit 226 may ensure that the voltage at the resonant frequency f persists for a minimum R-C time constant before a field effect transistor (FET) 228 is activated.
  • the AC/DC logic 210 may switch from a first charging voltage to a second charging voltage, e.g., the second charging voltage may be higher than the first charging voltage.
  • the charging voltage may be provided to the portable device via the VBUS 236.
  • Other embodiments may include a plurality of L-C tank circuits, each L-C tank circuit tuned to a corresponding resonant frequency.
  • Each resonant frequency may be associated with a distinct charging voltage to be provided by the AC/DC logic 210, and a particular charging voltage may be activated by locking a signal frequency (e.g., provided by the portable device) to a frequency value f S i gn ai that is substantially the same (or close to) the corresponding resonant frequency of the L-C tank circuit that is associated with the desired charging voltage.
  • FIG. 3 is a flow diagram 300 of a method, according to an embodiment of the present invention.
  • a portable device detects that a USB port VBUS (e.g., charging line) of a USB port is valid, continuing to block 304, detection is started (e.g., according to BC 1 .2 specification) by the portable device.
  • a dedicated charger e.g., multi-level voltage
  • moving to block 310 normal portable device functions are continued for the portable device (PD) coupled to a fixed output voltage charger.
  • a dedicated (e.g., multi-level voltage) charger is detected, moving to block 310, a signal (e.g., square wave signal) is applied to a free pin of the USB port.
  • the signal has an associated frequency that may be swept through a frequency band. For example, a sweep may be from a minimum frequency of the frequency band to a maximum frequency of the frequency band.
  • VBUS is supplying the desired charging voltage
  • a desired rate e.g., faster rate than normal rate
  • VBUS is monitored to ensure that the desired charging voltage is being provided via the VBUS. If the desired charging voltage is not being provided, proceeding to block 326, the signal is stopped, charging is halted, and an interrupt is generated and sent to, e.g., a system on a chip (SOC) of the portable device to indicate that a fault has occurred.
  • SOC system on a chip
  • FIG. 4 is a flow diagram of a method 400, according to another embodiment of the present invention.
  • the USB AC adapter is to drive a standard (e.g., normal) voltage (e.g., 5 V) to VBUS, which is an outgoing bus line that is to carry charging voltage to a USB port coupled to a portable device.
  • a standard (e.g., normal) voltage e.g., 5 V
  • a resonant frequency of a signal e.g., square wave signal
  • the signal e.g., square wave signal
  • a portable device e.g., D+, D-, or another available pin
  • decision diamond 408 if a blank time interval is expired, continuing to block 410 a desired charging voltage (e.g., high charging voltage) is enabled on VBUS. If the blank time has not yet expired, returning to decision diamond 408, when the blank time expires, proceeding to block 410 the desired charging voltage is enabled on VBUS.
  • the resonant frequency e.g., signal whose frequency is at, or close to the resonant frequency and received at the USB AC charger from the portable device
  • the desired charging voltage e.g., high voltage
  • the resonant frequency or signal whose frequency is close to the resonant frequency
  • the USB AC adapter continues to determine whether the resonant frequency is on the selected pin. If the blank time interval is expired, returning to block 404, standard voltage is again provided via the VBUS for charging of the portable device.
  • an apparatus in a first embodiment, includes detector logic having a first resonant frequency.
  • the detector logic is to receive a power management signal having a power management signal frequency and to provide an indication of whether the power management signal frequency is within a first frequency differential of the first resonant frequency.
  • the apparatus also includes switch signal logic to, responsive to the indication that the power management signal frequency is within the first frequency differential of the first resonant frequency, activate a first switching signal to cause power adapter circuitry to change an output voltage from a first voltage to a second voltage that is distinct from the first voltage.
  • a second embodiment includes elements of the 1 st embodiment, and further includes the power adapter circuitry to input alternating current (A.C.) and to output direct current (D.C.) at an output voltage selected from a plurality of selectable output voltages. Responsive to receipt of the first switching signal the power adapter circuitry is to change the output voltage from the first voltage to the second voltage.
  • A.C. alternating current
  • D.C. direct current
  • a 3 rd embodiment includes elements of the 2 nd embodiment. Additionally, the power adapter circuitry is to provide the output voltage to a universal serial bus (USB) connector. [0035] A 4 th embodiment includes elements of the 3 rd embodiment, and further includes the USB connector.
  • USB universal serial bus
  • a 5 th embodiment includes elements of the 1 st embodiment. Additionally, responsive to a change in the power management signal frequency from a first frequency that is within the first differential frequency of the resonant frequency, to a second frequency that is outside of the first frequency differential of the resonant frequency, the switch signal logic is to deactivate the first switching signal. Upon deactivation of the first switching signal the output voltage is to change from the second voltage to the first voltage.
  • a 6 th embodiment includes elements of the 1 st embodiment, where the second voltage is greater than the first voltage.
  • a 7 th embodiment includes elements of the 6 th embodiment, where the first voltage is approximately 5 volts and the second voltage is approximately 12 volts.
  • An 8 th embodiment includes elements of the 1 st embodiment, where the detector logic has a second resonant frequency, the detector logic is to provide an indication of whether the power management signal frequency is within a second frequency differential of the second resonant frequency, and where responsive to the indication that the management signal frequency is within the second frequency differential of the second resonant frequency, the switch signal logic is to activate a second switching signal to cause the power adapter circuitry to output a third voltage that is distinct from the first voltage and distinct from the second voltage.
  • a 9 th embodiment includes elements of the 1 st embodiment, where upon recognition of the indication that the power management signal frequency is within the first frequency differential of the first resonant frequency, the switch signal logic is to cause the power adapter circuitry to change the output voltage from the first voltage to the second voltage after expiration of a blank time interval that begins when the detector logic is enabled to detect the power management signal.
  • a 10 th embodiment includes elements of the 1 st embodiment, where the detector logic includes resonant circuitry with a resonant frequency that is the first resonant frequency.
  • An 1 1 th embodiment includes elements of the 10 th embodiment, where the resonant circuitry includes an inductor-capacitor (L-C) tank circuit.
  • L-C inductor-capacitor
  • a 12 th embodiment is a method that includes receiving at detector logic, a power management signal having a power management signal frequency, determining whether the power management signal frequency is within a first frequency differential of a first resonant frequency, and responsive to the power management signal frequency being within the first frequency differential of the first resonant frequency, providing a first indication that is to cause an output voltage of power circuitry to be switched from a first output voltage to a second output voltage that is distinct from the first output voltage.
  • a 13 th embodiment includes elements of the 12 th embodiment, and further includes, after the output voltage of the power logic is switched to the second output voltage, responsive to the power management signal frequency changing to a second power management signal frequency that is outside of the first frequency differential of the first resonant frequency, providing a second indication that is to cause the output voltage of the power circuitry to be switched to the first output voltage.
  • a 14 th embodiment includes elements of the 12 th embodiment, where when the power management signal frequency is within the first frequency differential of the first resonant frequency, the output voltage of the power circuitry is to be switched from the first output voltage to the second output voltage upon expiration of a blank time interval.
  • a 15 th embodiment includes elements of the 12 th embodiment, where the second output voltage is higher than the first output voltage.
  • a 16 th embodiment includes elements of the 12 th embodiment, further including determining whether the power management signal frequency is within a second frequency differential of a second resonant frequency, and responsive to the power management signal frequency being within the second frequency differential of the second resonant frequency, providing a second indication that is to cause the output voltage of power circuitry to be changed to a third output voltage that is distinct from the first output voltage and the second output voltage.
  • a 17 th embodiment is an apparatus to perform the method of any one of embodiments 12-16.
  • An 18 th embodiment is an apparatus including means for performing the method of any one of embodiments 12-16.
  • a 19 th embodiment is a computer-readable medium storing processor executable instructions that, when executed by a processor, causes the processor to receive, at power management logic, a power management signal having a power management signal frequency, determine whether the power management signal frequency is within a first frequency differential of a first resonant frequency, and responsive to the power management signal frequency being within the first frequency differential of the first resonant frequency, switch an output voltage of power circuitry from a first output voltage to a second output voltage that is distinct from the first output voltage.
  • a 20 th embodiment includes elements of the 19 th embodiment, and further including instructions to, after the output voltage of the power logic is switched to the second output voltage and responsive to the power management signal frequency having a second power management signal frequency that is outside of the first frequency differential of the first resonant frequency, switch the output voltage of the power circuitry to the first output voltage.
  • a 21 st embodiment includes elements of the 19 th embodiment, and further includes instructions to wait for a blank time interval to expire before switching the output voltage of the power circuitry to the second output voltage when the power management signal frequency is within the first frequency differential of the first resonant frequency, where the blank time interval begins at an initial time of determination that the power management signal frequency is within the first frequency differential of the first resonant frequency.
  • a 22 nd embodiment includes elements of the 19 th embodiment, further including instructions to determine whether the power management signal frequency is within a second frequency differential a second resonant frequency, and
  • a 23 rd embodiment is an apparatus that includes means for receiving a power management signal having a power management signal frequency, means for determining whether the power management signal frequency is within a first frequency differential of a first resonant frequency, and means for, responsive to the power management signal frequency being within the first frequency differential of the first resonant frequency, providing a first indication that is to cause an output voltage of power circuitry to be switched from a first output voltage to a second output voltage that is distinct from the first output voltage.
  • a 24 th embodiment includes elements of the 23 rd embodiment, further including means for providing a second indication that is to cause the output voltage of the power circuitry to be switched to the first output voltage after the output voltage of the power logic is switched to the second output voltage responsive to the power management signal frequency changing to a second power management signal frequency that is outside of the first frequency differential of the first resonant frequency.
  • a 25 th embodiment includes elements of the 23 rd embodiment, further including means for switching the output voltage of the power circuitry from the first output voltage to the second output voltage upon expiration of a blank time interval when the power management signal frequency is within the first frequency
  • a 26 th embodiment includes elements of the 23 rd embodiment, where the second output voltage is higher than the first output voltage.
  • a 27 th embodiment includes elements of the 23 rd embodiment, and further includes means for determining whether the power management signal frequency is within a second frequency differential of a second resonant frequency, and means for providing a second indication that is to cause the output voltage of power circuitry to be changed to a third output voltage that is distinct from the first output voltage and the second output voltage responsive to the power management signal frequency being within the second frequency differential of the second resonant frequency.
  • a 28 th embodiment is an apparatus that includes frequency generation logic to generate a signal having a signal frequency that is selectable within a band of frequencies, a first pin to output the signal to a power source, a second pin to receive first power at a first voltage from the power source, and current measurement logic to measure a current provided by the frequency generation logic to the first pin.
  • the frequency generation logic is to vary the signal frequency within the band of frequencies, and responsive to a first increase in current detected by the current measurement logic when the signal frequency is proximate to a first frequency of the band of frequencies, the frequency generation logic is to lock the signal frequency at a first lock frequency that is approximately the first frequency and upon locking the signal frequency at the first lock frequency, the second pin is to receive second power at a second voltage from the power source.
  • a 29 th embodiment includes elements of the 28 th embodiment, and further includes a universal serial bus (USB) port that includes the first pin and the second pin, the USB port to couple to a USB connector of the power source.
  • USB universal serial bus
  • a 30 th embodiment includes elements of the 28 th embodiment. Additionally, responsive to a second increase in current detected by the current measurement logic when the signal frequency is proximate to a second frequency of the band of frequencies, the frequency generation logic is to lock the signal frequency at a second lock frequency that is approximately the second frequency and upon locking the signal frequency at the second lock frequency, the second pin is to receive third power at a third voltage from the power source.
  • a 31 st embodiment is a method that includes generating, by a signal generation logic of a device, a signal having a signal frequency that is selectable within a band of frequencies, outputting the signal to a power source, receiving by the device, first power at a first voltage from the power source, measuring, by current measurement logic of the device, a current provided by the frequency generation logic to the power source, varying the signal frequency within the band of
  • a 32 nd embodiment includes elements of the 31 st embodiment, and further includes, responsive to detection of a second increase in the current when the signal frequency is proximate to a second frequency of the band of frequencies, locking the signal frequency at a second lock frequency that is approximately the second frequency, where upon locking the signal frequency at the second lock frequency, third power at a third voltage is to be received from the power source.
  • Embodiments may be used in many different types of systems.
  • a communication device can be arranged to perform the various methods and techniques described herein.
  • the scope of the present invention is not limited to a communication device, and instead other embodiments can be directed to other types of apparatus for processing instructions, or one or more machine readable media including instructions that in response to being executed on a computing device, cause the device to carry out one or more of the methods and techniques described herein.
  • Embodiments may be implemented in code and may be stored on a non- transitory storage medium having stored thereon instructions which can be used to program a system to perform the instructions. Embodiments also may be
  • the storage medium may include, but is not limited to, any type of disk including floppy disks, optical disks, solid state drives (SSDs), compact disk read-only memories (CD-ROMs), compact disk rewritables (CD-RWs), and magneto-optical disks, semiconductor devices such as read-only memories (ROMs), random access memories (RAMs) such as dynamic random access memories (DRAMs), static random access memories (SRAMs), erasable programmable read-only memories (EPROMs), flash memories, electrically erasable programmable read-only memories (EEPROMs), magnetic or optical cards, or any other type of media suitable for storing electronic instructions.
  • ROMs read-only memories
  • RAMs random access memories
  • DRAMs dynamic random access memories
  • SRAMs static random access memories
  • EPROMs erasable programmable read-only memories
  • flash memories electrically erasable programmable read-only memories (EEPROMs), magnetic or optical cards, or any other type of media suitable for storing electronic

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
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  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
  • Power Sources (AREA)
  • Direct Current Feeding And Distribution (AREA)
  • Rectifiers (AREA)

Abstract

Selon un mode de réalisation, l'invention concerne un appareil qui comprend une logique de détection ayant une première fréquence de résonance. La logique de détection est destinée à recevoir un signal de gestion de puissance ayant une fréquence de signal de gestion de puissance, et à fournir une indication indiquant si la fréquence de signal de gestion de puissance est à moins d'un premier différentiel de fréquence de la première fréquence de résonance. L'appareil comprend également une logique de signal de commutation pour, en réponse à l'indication que la fréquence du signal de gestion est à moins du premier différentiel de fréquence de la première fréquence de résonance, activer un premier signal de commutation afin d'amener un circuit adaptateur de puissance à changer une tension de sortie, d'une première tension à une seconde tension qui est distincte de la première tension. D'autres modes de réalisation sont décrits et revendiqués.
PCT/US2015/062123 2014-12-23 2015-11-23 Appareils et procédés pour fournir une tension de charge sélectionnable WO2016105773A1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CN201580064238.3A CN107005074B (zh) 2014-12-23 2015-11-23 用于提供可选充电电压的装置和方法
JP2017533451A JP6612350B2 (ja) 2014-12-23 2015-11-23 選択可能な充電電圧を供給する装置及び方法
KR1020177013790A KR102496919B1 (ko) 2014-12-23 2015-11-23 선택가능한 충전 전압을 제공하기 위한 장치 및 방법들
EP15873979.7A EP3238321A4 (fr) 2014-12-23 2015-11-23 Appareils et procédés pour fournir une tension de charge sélectionnable

Applications Claiming Priority (2)

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IN6509/CHE/2014 2014-12-23
IN6509CH2014 2014-12-23

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WO2016105773A1 true WO2016105773A1 (fr) 2016-06-30

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EP (1) EP3238321A4 (fr)
JP (1) JP6612350B2 (fr)
KR (1) KR102496919B1 (fr)
CN (1) CN107005074B (fr)
WO (1) WO2016105773A1 (fr)

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JP2019017184A (ja) * 2017-07-06 2019-01-31 ローム株式会社 ワイヤレス送電装置およびそれを用いたワイヤレス充電器
CN114128084A (zh) * 2019-07-31 2022-03-01 三星电子株式会社 电子装置及其频率干扰消除方法

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KR102577748B1 (ko) * 2018-11-29 2023-09-14 에스케이하이닉스 주식회사 전원 제어 회로 및 이를 이용하는 반도체 장치
CN114069777A (zh) * 2021-10-30 2022-02-18 深圳天德钰科技股份有限公司 充电装置、系统及充电方法

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CN114128084A (zh) * 2019-07-31 2022-03-01 三星电子株式会社 电子装置及其频率干扰消除方法
CN114128084B (zh) * 2019-07-31 2024-05-03 三星电子株式会社 电子装置及其频率干扰消除方法

Also Published As

Publication number Publication date
EP3238321A4 (fr) 2018-08-08
CN107005074A (zh) 2017-08-01
KR20170097624A (ko) 2017-08-28
JP6612350B2 (ja) 2019-11-27
CN107005074B (zh) 2021-07-06
KR102496919B1 (ko) 2023-02-08
EP3238321A1 (fr) 2017-11-01
JP2018509121A (ja) 2018-03-29

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