WO2016101541A1 - 时钟恢复均衡装置与方法、计算机存储介质 - Google Patents

时钟恢复均衡装置与方法、计算机存储介质 Download PDF

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WO2016101541A1
WO2016101541A1 PCT/CN2015/080562 CN2015080562W WO2016101541A1 WO 2016101541 A1 WO2016101541 A1 WO 2016101541A1 CN 2015080562 W CN2015080562 W CN 2015080562W WO 2016101541 A1 WO2016101541 A1 WO 2016101541A1
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signal
polarization
polarization signal
interpolated
unit
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PCT/CN2015/080562
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English (en)
French (fr)
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姚扬中
黄源良
蔡轶
曹南山
顾国华
曾文琪
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深圳市中兴微电子技术有限公司
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/002—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation
    • H04L7/0029—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation interpolation of received data signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
    • H04L7/0058—Detection of the synchronisation error by features other than the received signal transition detection of error based on equalizer tap values

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  • the present invention relates to clock technologies in the field of optical communications, and in particular, to a clock recovery equalization apparatus and method, and a computer storage medium.
  • digital coherent reception technology Compared with non-coherent technology, digital coherent reception technology has the following advantages: optical signal-to-noise ratio (OSNR) gain of about 3 decibels (dB); it can be easily used to cope with channel changes and reduce costs. Etc.; more efficient modulation techniques and polarization multiplexing can be used to increase transmission capacity. Therefore, digital coherence technology is considered to be a key technology for high-speed optical communication systems.
  • OSNR optical signal-to-noise ratio
  • dB decibels
  • Etc. more efficient modulation techniques and polarization multiplexing can be used to increase transmission capacity. Therefore, digital coherence technology is considered to be a key technology for high-speed optical communication systems.
  • the optical coherent receiver by mixing the signal light and the local oscillator light, the amplitude and phase information of the signal light is moved to the baseband signal, so the optical coherent detection preserves all the information of the optical field, and the digital signal processing technology can be utilized.
  • the advantages of features and performance can almost completely compensate the linear distortion of the optical signal, such as compensation for CD (Color Dispersion), Polarization Mode Dispersion (PMD), and the like.
  • Embodiments of the present invention provide a clock recovery equalization apparatus and method, and a computer storage medium, which solve the problem of residual chromatic dispersion and polarization mode dispersion affecting clock recovery, and solve the main tap position of the adaptive equalizer x polarization coefficient and the main tap of the y polarization coefficient.
  • the problem of positional deviation from the center of the filter is a clock recovery equalization apparatus and method, and a computer storage medium, which solve the problem of residual chromatic dispersion and polarization mode dispersion affecting clock recovery, and solve the main tap position of the adaptive equalizer x polarization coefficient and the main tap of the y polarization coefficient.
  • An embodiment of the present invention provides a clock recovery equalization apparatus, including: a clock pre-filtering unit, a first timing error extracting unit, a second timing error extracting unit, a first point interpolation unit, a second sample interpolation unit, and an equalization filtering unit. And coefficient update unit;
  • the clock pre-filtering unit is configured to pre-filter the polarization signals of the two polarization directions of the first polarization signal and the second polarization signal by using adaptive filter coefficients, and correspondingly obtain a pre-filtered first polarization signal and a pre-filtered second polarization signal.
  • the first timing error extraction unit is configured to output a first timing error according to the pre-filtered first polarization signal
  • the second timing error extraction unit is configured to output a second timing error according to the pre-filtered second polarization signal
  • the first point interpolation unit is configured to perform two polarizations on the first polarization signal and the second polarization signal input to the first point interpolation unit according to the first timing error output by the first timing error extraction unit
  • the signal of the direction is correspondingly interpolated, and the first interpolated polarization signal and the second interpolated polarization signal obtained after the interpolation are output;
  • the second sample interpolation unit is configured to perform two polarizations on the first polarization signal and the second polarization signal input to the second sample interpolation unit according to the second timing error output by the second timing error extraction unit
  • the signal of the direction is correspondingly interpolated, and the third interpolated polarization signal and the fourth interpolated polarization signal obtained after the interpolation are output;
  • the equalization filtering unit is configured to perform first interpolation on the output of the first point interpolation unit
  • the polarization signal and the second interpolation polarization signal are filtered to output an x-channel equalization filter signal; the third interpolation polarization signal and the fourth interpolation polarization signal output by the second sample interpolation unit are filtered, and the y channel is output Equalize the filtered signal.
  • the equalization filtering unit comprises:
  • the x-channel equalization filter sub-unit is configured to filter the first interpolated polarization signal and the second interpolated polarization signal output by the first point interpolation unit, and obtain the x-channel equalization filter signal after adding the output filtering results;
  • the y-channel equalization filter sub-unit is configured to filter the third interpolated polarization signal and the fourth interpolated polarization signal output by the second sample interpolation unit, and output the y-channel equalization filter signal obtained by adding the filtering results .
  • the device further comprises:
  • a coefficient updating unit configured to be configured according to the x-channel equalization filter signal, the average-y-way filter signal, the first interpolated polarization signal and the second interpolated polarization signal output by the first-point interpolation unit according to the equalization filtering unit And a third interpolated signal polarization signal and a fourth interpolated polarization signal output by the second sample interpolation unit, and the adaptive filter coefficients are updated.
  • the coefficient updating unit is further configured to calculate, according to the x-way equalized filtered signal output by the equalization filtering unit, and the first interpolated polarized signal and the second interpolated polarized signal output by the first point interpolating unit.
  • the updated value of the x-polarization coefficient, the updated x-polarization coefficient obtained by superimposing the updated value of the x-polarization coefficient to the original x-polarization coefficient is used as the x-channel adaptive filter coefficient, and the x-channel adaptive filter coefficient is updated;
  • the device further comprises:
  • a time-frequency converting unit configured to be a time domain signal between the first polarized signal and the second polarized signal And performing fast Fourier transform FFT on the first polarization signal and the second polarization signal to obtain a frequency domain first polarization signal and a frequency domain second polarization signal, and the frequency domain first polarization signal and frequency a domain second polarization signal is output to the clock pre-filtering unit;
  • the clock pre-filtering unit is further configured to pre-filter the polarization signals of the two polarization directions of the frequency domain first polarization signal and the frequency domain second polarization signal by using adaptive filter coefficients, and correspondingly obtain a pre-filtered first polarization signal. And pre-filtering the second polarized signal.
  • the device further comprises:
  • a coefficient FFT unit configured to convert the adaptive filter coefficients output by the coefficient update unit from the time domain to the frequency domain, and output the converted adaptive filter coefficients to the clock pre-filtering unit, where the conversion is obtained
  • the adaptive filter coefficient is configured to cause the clock pre-filtering unit to pre-filter the frequency domain first polarization signal and the frequency domain second polarization signal, correspondingly obtaining the pre-filtered first polarization signal and pre-filtering the second polarization signal.
  • the first timing error extracting unit is further configured to perform low-pass filtering denoising on the first timing error, and output the filtered first timing error;
  • the second timing error extracting unit is further configured to perform low-pass filtering and denoising on the second timing error, and output the filtered second timing error.
  • the embodiment of the invention provides a clock recovery equalization method, including:
  • pre-filtering the polarization signals of the two polarization directions of the first polarization signal and the second polarization signal by using adaptive filter coefficients, correspondingly obtaining a pre-filtered first polarization signal and a pre-filtering second polarization signal;
  • the signal in the vibration direction is interpolated correspondingly, and the third interpolated polarization signal and the fourth interpolated polarization signal obtained after the interpolation are output;
  • the first interpolating polarized signal and the second interpolated polarized signal are filtered and output an x-way equalized filtered signal; and the third interpolated polarized signal and the fourth interpolated polarized signal are filtered and output y
  • the road equalization filtering signal includes:
  • the third interpolated polarization signal and the fourth interpolated polarization signal are filtered, and the y-channel equalization filtered signal obtained by adding the filtering results is output.
  • the method further includes:
  • the updating the self according to the x-channel equalization filter signal, the y-channel equalization filter signal, the first interpolated polarization signal, the second interpolated polarization signal, the third interpolated polarization signal, and the fourth interpolated polarization signal Adapt to the filter coefficients, including:
  • the y-polarization coefficient is used as the y-channel adaptive filter coefficient to realize the y-path self- Adapt to the filter coefficient update.
  • the pre-filtering the polarization signals of the two polarization directions of the first polarization signal and the second polarization signal by using the adaptive filter coefficients comprises:
  • the first polarization signal and the second polarization signal are time domain signals
  • the first polarization signal and the second polarization signal are respectively subjected to fast Fourier transform FFT to obtain a frequency domain first polarization signal and a frequency domain second.
  • Polarized signal
  • the polarization signal of the two polarization directions of the frequency domain first polarization signal and the frequency domain second polarization signal is pre-filtered by using the adaptive filter coefficient, and the pre-filtered first polarization signal and the pre-filtered second polarization signal are correspondingly obtained.
  • the pre-filtering the polarization signals of the two polarization directions of the frequency domain first polarization signal and the frequency domain second polarization signal by using the adaptive filter coefficient comprises:
  • the method further includes:
  • the second timing error is low pass filtered and denoised before the second timing error is output.
  • the embodiment of the invention further provides a computer storage medium, wherein the computer storage medium stores executable instructions, and the executable instructions are used to execute the clock recovery equalization method.
  • the pre-filtering technique of clock recovery is adopted, and the pre-filtering balance effect of the clock recovery is good, and the timing error processing can extract a strong clock signal, thereby overcoming the residual chromatic dispersion and the polarization mode dispersion affecting the clock recovery problem. ;
  • the feedforward open-loop clock recovery method is adopted, that is, the polarization signal is not subjected to the interpolation of the sample value before the timing error is extracted, so that no loop delay is generated, thereby enabling clock recovery timing.
  • the strong tracking ability of the jitter overcomes the feedback method of the clock recovery method in the related art (that is, the polarization signal extracted by the timing error passes through the sample in advance)
  • the value of the interpolation process causes a large loop delay and cannot track the problem of high frequency jitter.
  • Figure 1 is a block diagram of a typical digital coherent receiver
  • Figure 2 is an adaptive filter coefficient map
  • 3a to 3d are schematic structural diagrams of a clock recovery equalization apparatus in an embodiment of the present invention.
  • FIG. 4 is a flowchart of implementing a clock recovery equalization method in an embodiment of the present invention.
  • FIG. 1 is a block diagram of a typical digital coherent receiver.
  • the received optical signal is split into two mutually orthogonal polarization signals by a polarizing beam splitter (PBS).
  • the PBS outputs a polarized optical signal through a 90° optical mixer (hybid).
  • hybid 90° optical mixer
  • the four-channel signal does not correspond to the original four-way signal, because after the transmission channel, there is crosstalk between the two polarization states, and the polarization state also rotates, so the two polarization states and each polarization state at the receiving end here.
  • the photoelectrically converted electrical signals are converted into digital signals by an analog-to-digital converter (ADC, Analog Digital Converter), and the digital signal processing technology can be used to process the ADC into digital signals.
  • ADC Analog Digital Converter
  • CD chromatic dispersion
  • PMD polarization mode dispersion
  • Residual chromatic dispersion and polarization mode dispersion compensation is achieved by an adaptive equalizer that uses an adaptive algorithm to update the coefficients to track the polarization mode dispersion that compensates dynamically over time.
  • the input signal of the adaptive equalizer needs to satisfy a stable sampling phase, and a clock recovery module is required before the adaptive equalization filter is required.
  • Clock recovery estimate the sampling time error of the input symbol, and interpolate the sampling time of the symbol, or adjust the sampling frequency of the ADC through a voltage-controlled oscillator (VCO, Voltage-Controlled Oscillator) to ensure stable symbol sampling phase;
  • VCO Voltage-Controlled Oscillator
  • the clock recovery algorithms provided by the technology such as the square clock recovery algorithm, Gardner clock recovery algorithm, etc., will be affected by link distortion such as polarization mode dispersion (PMD), and the clock will resume normal operation; some methods are for the clock recovery interpolation module.
  • the timing error extraction feedback timing error is used to control the clock recovery interpolation module. In this way, due to the large loop delay, faster clock jitter cannot be tracked.
  • the equalization filtering unit of the adaptive equalizer of the polarization multiplexing optical communication system is a butterfly structure filter, which is filtered according to formula (1)(2):
  • h(m), v(m) are the two polarization states of the input of the equalization filter unit; x(n), y(n) are equalized filtered output signals; a xh , a xv is the x-channel equalization filter coefficient , a yh , a yv is the y-way equalization filter coefficient; from the structure diagram, it can be seen that the structure of the x-way and the y-way are completely consistent, and the data processing is relatively opposite; in the case of blind equalization, it is easy to cause x and y.
  • the coefficient obtained by the coefficient update of the adaptive equalizer may have a large coefficient value and the main tap position deviates from the filter.
  • the central area of the device as shown in Figure 2, the x-polarization coefficient is to the left and the y-polarization coefficient is to the right.
  • the main tap positions of the four sets of filter coefficients can be moved in one direction at the same time.
  • the scheme can move the x-polarization coefficient main tap position and the y-polarization coefficient main tap position in opposite directions. At this time, the adaptive equalizer cannot compensate for the channel distortion well.
  • an embodiment of the present invention describes a clock recovery equalization apparatus and method, and a computer storage medium, which solves the problem of residual chromatic dispersion and polarization mode dispersion affecting clock recovery, and solves the main tap position and y of the adaptive equalizer x polarization coefficient.
  • Polarization factor The problem that the main tap position deviates from the center of the filter.
  • the clock recovery equalization apparatus includes: a clock pre-filtering unit 20, a first timing error extracting unit 40, a second timing error extracting unit 50, a first point interpolation unit 60, and a second Sample interpolation unit 70 and equalization filtering unit 80;
  • the polarization signal of the two polarization directions of the input clock recovery equalization device may be a time domain signal or a frequency domain signal.
  • the time domain signal is identified by a lowercase letter, and the frequency domain signal is identified by a capital letter;
  • Figure 3a it is assumed that the input polarization signals of the two polarization directions are frequency domain signals;
  • the clock pre-filtering unit 20 is configured to use the adaptive filter coefficients to pre-polarize the polarization signals of the polarization signal H (corresponding to the first polarization signal in the frequency domain) and the polarization signal V (corresponding to the second polarization signal in the frequency domain) Filtering, corresponding to obtaining a pre-filtered first polarized signal X and a pre-filtered second polarized signal Y in the frequency domain (pre-filtering the polarized signal H to obtain a pre-filtered first polarized signal X, pre-filtering the polarized signal V to obtain a pre-filtering a polarization signal Y);
  • the first timing error extraction unit 40 is configured to acquire a first timing error u1 according to the pre-filtered first polarization signal X;
  • the second timing error extraction unit 50 is configured to acquire a second timing error u2 according to the pre-filtered second polarization signal Y;
  • the first point interpolation unit 60 is configured to, according to the first timing error u1 output by the first timing error extraction unit 40, the polarization signals H and the polarization signals of the two polarization directions input to the first point interpolation unit 60.
  • V performs interpolation (fractional delay adjustment filtering), and outputs the polarization signal H1 and the polarization signal V1 obtained after interpolation (the polarization signal H1 obtained by interpolating the polarization signal H, corresponding to the first interpolation polarization signal, and the polarization signal V Performing the interpolated polarization signal V1 corresponding to the second interpolated polarization signal));
  • the second sample interpolation unit 70 is configured to perform the corresponding two polarization directions of the polarization signal H and the polarization signal V input to the second sample interpolation unit 70 according to the second timing error u2 output by the second timing error extraction unit 50. Inserting (fractional delay adjustment filtering), outputting a polarization signal H2 (corresponding to a third interpolated polarization signal) and a polarization signal V2 (corresponding to a fourth interpolated polarization signal) obtained after interpolation;
  • the equalization filtering unit 80 is configured to filter the polarization signal H1 and the polarization signal B1 output by the first point interpolation unit 60, and output the equalized filtered signal X obtained by adding the filtering results; the y-channel equalization filtering unit is paired with the second The polarization signal H2 and the polarization signal V2 outputted by the sample interpolation unit 70 are filtered, and the obtained equalization filtered signal Y obtained by adding the filtered results is output.
  • the clock pre-filtering unit 20 pre-filters the polarization signals of the two polarization directions of the polarization signal h (corresponding to the time domain first polarization signal) and the polarization signal v (corresponding to the time domain second polarization signal) using the adaptive filter coefficients.
  • Domain pre-filtered first polarization signal x and pre-filtered second polarization Signal y pre-filtering the polarization signal h to obtain a pre-filtered first polarization signal h1, corresponding to the first interpolated polarization signal, pre-filtering the polarization signal v to obtain a pre-filtered first polarization signal v1, corresponding to the second interpolated polarization signal );
  • the first timing error extracting unit 40 acquires the first timing error u1 according to the pre-filtering the first polarization signal x;
  • the second timing error extraction unit 50 acquires the second timing error u2 according to the pre-filtered second polarization signal y;
  • the first point interpolation unit 60 performs on the polarization signals h and the polarization signals v of the polarization directions of the two polarization directions input to the first point interpolation unit 60 according to the first timing error u1 output by the first timing error extraction unit 40. Insertion (fractional delay adjustment filtering), outputting the polarization signal h1 and the polarization signal v1 obtained after interpolation (the polarization signal h1 obtained by interpolating the polarization signal h, corresponding to the first interpolation polarization signal, and interpolating the polarization signal v The obtained polarization signal v1 corresponds to the second interpolated polarization signal);
  • the second sample interpolation unit 70 interpolates the two polarization directions of the polarization signal h and the polarization signal v input to the second sample interpolation unit 70 according to the second timing error u2 output by the second timing error extraction unit 50 (score Delay adjustment filtering), outputting the polarization signal h2 (corresponding to the third interpolated polarization signal) and the polarization signal v2 (corresponding to the fourth interpolated polarization signal) obtained after interpolation;
  • the equalization filtering unit 80 filters the polarization signal h1 and the polarization signal v1 output by the first point interpolation unit 60, and outputs the equalized filtered signal x obtained by adding the filtering results; the y-way equalization filtering unit interpolates the second sample The polarization signal h2 and the polarization signal v2 outputted by the unit 70 are filtered, and the equalized filtered signal y obtained by adding the filtered results is output.
  • the equalized filtered signals x and y output by the equalization filtering unit 80 can be represented by the formula (3) (4):
  • h(m), v(m) are two polarization signals of the input equalization filtering unit 80; x(n), y(n) are equalization filtered output signals; a xh , a xv are x-way equalization filter coefficients, a yh , a yv is the y-channel equalization filter coefficient, and M is the filter tap number.
  • the equalization filtering unit 80 includes: an x-channel equalization filter sub-unit 801 and a y-channel equalization filter sub-unit 802;
  • the filtering sub-unit 801 is configured to filter the polarization signal h1 (corresponding to the first polarization signal) and the polarization signal h2 (corresponding to the second interpolation polarization signal) output by the first point interpolation unit 60, and output the filtered result.
  • the obtained equalized filtered signal x; y-channel equalization filtering sub-unit 802 is configured to filter the polarization signal h2 (corresponding to the third polarization signal) and the polarization signal v2 (corresponding to the fourth polarization signal) output by the second sample interpolation unit 70 , the output equalization filtered signal y obtained by adding the filtered results;
  • the x-channel equalization filter is input.
  • the subunit 801 is configured to filter the polarization signal H1 (corresponding to the first polarization signal) and the polarization signal H2 (corresponding to the second interpolation polarization signal) output by the first point interpolation unit 60, and obtain the filtered result
  • the y-channel equalization filtering sub-unit 802 is configured to filter the polarization signal H2 (corresponding to the third polarization signal) and the polarization signal V2 (corresponding to the fourth polarization signal) output by the second sample interpolation unit 70,
  • the obtained equalized filtered signal Y obtained by adding the filtered results is output.
  • the clock recovery equalization device can also To include a coefficient update unit 90;
  • the coefficient update unit 90 When the first polarization signal and the second polarization signal input to the clock recovery equalization device shown in FIG. 3c are time domain signals (signals of two polarization directions of the first polarization signal h and the second polarization signal v), the coefficient update unit 90, according to the x-channel equalization filter signal, the y-channel equalization filter signal output by the equalization filtering unit 80, the polarization signal h1 and the polarization signal v1 output by the first point interpolation unit 60, and the signal polarization signal output by the second sample interpolation unit 70. H2, the polarization signal v2, updating the adaptive filter coefficient;
  • the coefficient updating unit 90 calculates an updated value of the x-polarization coefficient based on the equalized filtered signal x output from the equalization filtering unit 80 and the signals (polarized signal h1 and polarized signal v1) output from the first point interpolating unit 60, and the x-polarized
  • the updated value of the coefficient is superimposed on the original x-polarization coefficient to obtain the updated x-polarization coefficient as the x-channel adaptive filter coefficient, and the x-channel adaptive filter coefficient is updated
  • the output signal y is output according to the equalization filtering unit 80, and the second sample interpolation unit 70 output signals (polarization signal h2 and polarization signal v2), calculate the updated value of the y polarization coefficient, and superimpose the updated value of the y polarization coefficient to the original y polarization coefficient to obtain the updated y polarization coefficient as the y-channel adaptive filter coefficient , to achieve y-channel adaptive filter coefficient update;
  • the coefficient update unit 90 When the first polarization signal and the second polarization signal input to the clock recovery equalization device shown in FIG. 3c are frequency domain signals (signals of two polarization directions of the first polarization signal H and the second polarization signal V), the coefficient update unit 90, according to the x-channel equalization filter signal, the y-channel equalization filter signal output by the equalization filtering unit 80, the polarization signal H1 and the polarization signal V1 output by the first-point interpolation unit 60, and the signal polarization signal output by the second sample interpolation unit 70. H2, the polarization signal V2, updates the adaptive filter coefficient.
  • the coefficient updating unit 90 calculates an updated value of the x-polarization coefficient based on the equalized filtered signal X output from the equalization filtering unit 80 and the signals (polarized signal H1 and polarized signal V1) output from the first point interpolating unit 60, and the x-polarized
  • the updated value of the coefficient is superimposed on the updated x-polarization coefficient obtained by the original x-polarization coefficient as the x-channel adaptive filter coefficient, and the x-channel adaptive filter coefficient is updated; the output signal Y is output according to the equalization filtering unit 80, and the second sample interpolation is performed.
  • Unit 70 lose Output signal (polarization signal H2 and polarization signal V2), calculate the updated value of y polarization coefficient, and superimpose the updated value of y polarization coefficient to the original y polarization coefficient to obtain the updated y polarization coefficient as y-channel adaptive filter coefficient.
  • Y-channel adaptive filter coefficient update
  • the coefficient updating unit 90 may adopt a coefficient updating method including a norm blind equalization algorithm, a Constant Modulus Algorithm (CMA), and a decision assisted minimum mean square error method (DDLMS, Decision-Directed Least-Mean-Square). And multi-mode blind equalization algorithms.
  • the clock recovery equalization apparatus may further include a time-frequency conversion unit 10 and a Fast Fourier Transformation (FFT) unit 30, as shown in FIG. 3c.
  • FFT Fast Fourier Transformation
  • the time-frequency conversion unit 10 restores the input clock to the time domain polarization of the equalization device.
  • the signal h and the time domain polarization signal v two polarization directions of the signal are FFT transformed, corresponding to the frequency domain polarization signal H and the frequency domain polarization signal V and output to the clock pre-filtering unit 20;
  • the clock pre-filtering unit 20 pre-filters the polarization signals of the two polarization directions of the polarization signal H and the polarization signal V by using the adaptive filter coefficients of the frequency domain output by the FFT unit 30, correspondingly obtaining the pre-filtered first polarization in the frequency domain.
  • a signal X and a pre-filtered second polarization signal Y pre-filtering the polarization signal H to obtain a pre-filtered first polarization signal X, pre-filtering the polarization signal V to obtain a pre-filtered first polarization signal Y;
  • the clock pre-filtering unit 20 pre-filters the polarization signal H and the polarization signal V in the frequency domain, it is necessary to convert the adaptive filter coefficients of the time domain output by the coefficient updating unit 90 into a frequency by using a fast Fourier transform for clock pre-
  • the filtering unit 20 performs pre-filtering processing; that is, when the clock recovery equalizing device shown in FIG. 3c is input to the polarization signal h and the polarization signal v in the time domain, the clock pre-filtering unit 20 can still process at the frequency, thereby saving system resource;
  • the clock pre-filtering unit 20 can be tuned by a finite impulse with a butterfly structure.
  • the (FIR) filter is implemented.
  • the clock pre-filtering unit 20 can implement pre-filtering in the time domain based on the structure shown in FIG. 3c; when the input clock is restored to the equalization device
  • the clock pre-filtering unit 20 can implement pre-filtering in the frequency domain based on the structure shown in FIG. 3c;
  • the signal input to the signal clock pre-filtering unit 20 is a time domain signal
  • the signal can be converted from the time domain to the frequency domain by the video conversion unit 10 based on the structure shown in FIG. 3d, so that the clock pre-filtering unit 20 is implemented in the frequency domain. Pre-filtering to receive computing resources.
  • the first timing error extraction unit 40 and the second timing error extraction unit 50 may employ a square timing algorithm, and for frequency domain timing recovery, a Godard algorithm may be employed.
  • the first timing error extraction unit 40 may include a first mode angle calculation module configured to low pass filter the first timing error to remove noise and output the filtered first timing error.
  • the second timing error extraction unit 50 may include a second mode angle calculation module configured to low pass filter the second timing error to remove noise and output the filtered second timing error.
  • the first point interpolation unit 60 according to the first timing error u1 output by the first timing error extraction unit 40, that is, the interpolated decimal pointer, the two polarization directions of the first polarization signal and the second polarization signal Polarizing the signal to perform digital interpolation, corresponding to obtaining the first interpolated polarized signal and the second interpolated polarized signal;
  • the first point interpolation unit 60 implements digital interpolation in the time domain, and the interpolation coefficient algorithm may use a general fractional interpolation algorithm, such as three Lagrangian interpolation;
  • the first The sample interpolation unit 60 implements interpolation in the frequency domain.
  • the second sample interpolation unit 70 according to the first timing error u2 output by the first timing error extraction unit 50, that is, the interpolated decimal pointer, the two polarization directions of the first polarization signal and the second polarization signal Polarizing the signal to perform digital interpolation, correspondingly obtaining a third interpolated polarized signal and a fourth interpolated polarized signal;
  • the second sample interpolation unit 70 When inputting the polarization signal h (corresponding to the first polarization signal in the time domain) and the polarization signal v (corresponding to the second polarization signal in the time domain) of the time domain of the clock recovery equalization device shown in FIG. 3a, the second sample interpolation unit 70 When digital interpolation is implemented in the time domain, the interpolation coefficient algorithm may use a general fractional interpolation algorithm, such as three Lagrangian interpolation;
  • the second sample interpolation unit 70 is interpolated in the frequency domain.
  • the clock recovery equalization device described in the embodiment of the present invention adopts a clock recovery pre-filtering technique, and the adaptive filter coefficient of the clock recovery is directly fed back by the coefficient update unit, and the pre-filtering balance effect of the clock recovery is good, and the timing error processing can be extracted. Strong clock signal to overcome residual chromatic dispersion and polarization mode dispersion affecting clock recovery issues;
  • the clock recovery equalization device described in the embodiment of the present invention is a feedforward open-loop clock recovery system, that is, the polarization signal is not subjected to the interpolation of the sample value before the timing error is extracted, so that no loop delay is generated, and thus the implementation can be realized.
  • the clock recovers the strong tracking capability of the timing jitter, and the clock recovery mode of the related art has a large loop delay and cannot track the high frequency jitter;
  • the clock recovery equalization device described in the embodiment of the invention can track the timing frequency offset and has the advantages of the closed loop system; the pre-filtering of the clock recovery, the two-way timing error extraction, and the two-way sample interpolation processing, the adaptive equalizer (corresponding to equalization filtering unit 80 and system updating unit 90 in Fig. 3d) x polarization coefficient main tap position is close to the boundary position of the filter (corresponding to equalization filtering unit 80 in Fig.
  • the adaptive equalizer y polarization coefficient is the main tap position
  • the main tap position of the y-polarization coefficient can be moved toward the center position of the filter by the coupling of the system, effectively solving the main tap position of the adaptive equalizer x polarization coefficient and the main tap of the y-polarization coefficient.
  • the position deviation is large, and the main tap position is at two different boundaries, which in turn affects the equalizer filtering effect.
  • the embodiment of the present invention further describes a clock recovery equalization method, as shown in FIG. 4, including the following steps:
  • Step 101 Pre-filtering the polarization signals of the two polarization directions of the first polarization signal and the second polarization signal by using adaptive filter coefficients, correspondingly obtaining a pre-filtered first polarization signal and a pre-filtering second polarization signal.
  • Step 102 Output a first timing error according to the pre-filtering the first polarization signal, and output a second timing error according to the pre-filtering the second polarization signal.
  • Step 103 Interpolate the signal corresponding to the two polarization directions of the first polarization signal and the second polarization signal according to the first timing error, and output the first interpolation polarization signal and the second interpolation polarization signal obtained after the interpolation.
  • Step 104 Interpolate the signal corresponding to the two polarization directions of the first polarization signal and the second polarization signal according to the second timing error, and output the third interpolation polarization signal and the fourth interpolation polarization signal obtained after the interpolation.
  • Step 105 Filter the first interpolated polarized signal and the second interpolated polarized signal and output an x-channel equalized filtered signal; filter the third interpolated polarized signal and the fourth interpolated polarized signal, and output a y-channel equalized filtered signal.
  • the first interpolated polarized signal and the second interpolated polarized signal are filtered and the x-channel equalized filtered signal is output;
  • the third interpolated polarized signal and the fourth interpolated polarized signal are filtered and output y-way equalized Filtered signals, including:
  • the method further includes:
  • the updated value of the x-polarization coefficient is calculated, and the updated value of the x-polarization coefficient is superimposed on the original x-polarization coefficient to obtain the updated
  • the x-polarization coefficient is used as the x-channel adaptive filter coefficient to realize the x-channel adaptive filter coefficient update;
  • the y-channel adaptive filter coefficient update is implemented.
  • the adaptive filtering coefficient is used to pre-filter the polarization signals of the two polarization directions of the first polarization signal and the second polarization signal, including:
  • the first polarization signal and the second polarization signal are time domain signals
  • the first polarization signal and the second polarization signal are respectively subjected to fast Fourier transform to obtain a frequency domain first polarization signal and a frequency domain second polarization signal
  • the polarization signal of the two polarization directions of the frequency domain first polarization signal and the frequency domain second polarization signal is pre-filtered by using adaptive filter coefficients, correspondingly obtaining a pre-filtered first polarization signal and a pre-filtering second polarization signal.
  • the adaptive filtering coefficient is used to pre-filter the polarization signals of the two polarization directions of the frequency domain first polarization signal and the frequency domain second polarization signal, including:
  • the updated adaptive filter coefficients are transferred from the time domain to the frequency domain, and the polarization coefficients obtained by converting the first polarization signal and the frequency domain second polarization signal are pre-filtered by using the adaptive filter coefficients obtained after the conversion. .
  • the method further includes:
  • the second timing error is low pass filtered and denoised before the second timing error is output.
  • the clock recovery equalization process is performed when the clock recovery equalization device inputs the time domain polarization signal h and the time domain polarization signal v.
  • the clock recovery equalization device shown in FIG. 3d includes:
  • Time-frequency conversion unit 10 clock pre-filtering unit 20, coefficient FFT unit 30, first timing error extraction unit 40, second timing error extraction unit 50, first point interpolation unit 60, second sample interpolation unit 70, equalization Filter unit 80 and coefficient update unit 90;
  • the time-frequency converting unit 10 is configured to receive signals of two polarization directions of the time domain polarization signal h and the time domain polarization signal v, and perform FFT transformation on the time domain polarization signal h and the time domain polarization signal v to obtain a frequency domain polarization signal H and Frequency domain polarization signal V, and frequency domain polarization signal H and frequency domain polarization signal V output to the clock pre-filtering unit 20;
  • the coefficient FFT unit 30 is configured to receive the adaptive filter coefficients a xh , a xv , a yh , a yv fed back by the coefficient updating unit 90, and use the fast Fourier transform technique to transfer the adaptive filter coefficients from the time domain to the frequency domain, and The adaptive filter coefficients A xh , A xv , A yh , A yv obtained after conversion are output to the clock pre-filtering unit 20;
  • the clock pre-filtering unit 20 is configured to perform frequency domain pre-filtering by using the adaptive filter coefficients output by the coefficient FFT unit 30, the frequency domain polarization signal H output by the time-frequency converting unit 10, and the frequency domain polarization signal V, and pre-frequency domain
  • the filtered pre-filtered first polarized signal X is output to the first timing error extracting unit 40, and the pre-filtered first polarized signal Y obtained by frequency domain pre-filtering is output to the second timing error extracting unit 50;
  • the frequency domain pre-filtering of the frequency domain polarization signal H and the frequency domain polarization signal V may be performed according to the formula (5) (6):
  • the first timing error extraction unit 40 is configured to perform timing error extraction using a timing error extraction algorithm to obtain a first timing error based on the received pre-filtered first polarization signal X.
  • a timing error extraction algorithm For example, the Godard algorithm is used to perform timing error extraction, and the corresponding calculation formula is as follows. Formula (7):
  • the mode angle of the clock signal C1 represents the value of the first timing error
  • the first mode angle calculation module (set in the first timing error extraction unit 40) calculates the first timing error u1 according to the formula (8):
  • the first mode angle calculation module may perform low-pass filtering on the first timing error u1 to reduce the influence of noise, and output the low-pass filtering result to the first point interpolation unit 40.
  • the second timing error extraction unit 50 is configured to use the timing error extraction algorithm to perform timing error extraction to obtain a second timing error value, for example, a Godard algorithm may be used for timing error extraction, and the Godard algorithm corresponds to the second timing signal extraction unit.
  • the calculation formula is as shown in formula (9):
  • the mode angle of the clock signal C2 represents the value of the second timing error
  • the second mode angle calculation module calculates the second timing error u2 according to the formula (10):
  • the second mode angle calculation module may perform low-pass filtering on u2 to reduce the influence of noise, and output the filtering result to the second sample interpolation unit 50.
  • the first point interpolation unit 60 is configured to time-domain polarized signals of the two polarization directions of the input And the time domain polarization signal v, performing fractional delay adjustment filtering (interpolation), and outputting the time domain polarization signal h1 and the time domain polarization signal v1 obtained after the fractional delay adjustment filtering (interpolation), and performing fractional delay adjustment filtering
  • the interpolation pointer is a first timing error value output by the first timing error extraction unit 40;
  • the second sample interpolation unit 70 is configured to perform fractional delay adjustment filtering on the time domain signal h and the time domain polarization signal v input to the two polarization directions, and output the signals h2 and v2 obtained by the fractional delay adjustment filtering to perform the score.
  • the interpolation pointer used for the delay adjustment filtering is the second timing error value output by the second timing error extraction unit 50.
  • the interpolation filter used by the first point interpolation unit 60 and the second sample interpolation unit 70 may use a finite impulse response filter or a Farrow structure filter.
  • the technology is mature and flexible. , no longer here.
  • the equalization filtering unit 80 includes an x-channel equalization filtering sub-unit 801 and a y-way equalization filtering sub-unit 802; an x-channel equalization filtering sub-unit, and a signal time-domain polarized signal h1 and a time-domain polarized signal outputted by the first-point interpolation unit 60.
  • V1 performs filtering, and the output filtering result is added to obtain an equalized filtered signal x output; the equalized filtered signal x; the y-way equalizing filtering unit is configured to output a signal of the time domain polarized signal h2 and the time domain polarized signal to the second sample interpolating unit 60.
  • V2 performs filtering, adds the filtering results to obtain an equalized filtered signal y and outputs; the equalized filtered signals x and y can be correspondingly represented by formulas (11) and (12):
  • h(m) and v(m) are two polarization states input by the equalization filtering unit 80; x(n) and y(n) are equalized filtered signals; a xh , a xv are x-way equalization filter coefficients, a yh , a yv is the y-channel equalization filter coefficient, and M is the filter tap number.
  • the coefficient updating unit 90 is configured to obtain the equalized filtered signal x output by the equalization filtering unit 80 and the signal output by the first point interpolation unit 60 (that is, after performing fractional delay adjustment filtering) Signals h1, v1), calculate the updated value of the x-polarization coefficient, and superimpose the updated value of the x-polarization coefficient to the original x-polarization coefficient to obtain the updated x-polarization coefficient, to realize the x-channel adaptive filter coefficient update; according to the equalization filtering unit
  • the output signal y, and the output signal of the second sample interpolation unit that is, the signals h2 and v2 obtained after performing fractional delay adjustment filtering
  • calculate the updated value of the y polarization coefficient and superimpose the updated value of the y polarization coefficient to the original y.
  • the polarization coefficient obtains the updated y-polarization coefficient, and the y-channel adaptive filter coefficient is updated.
  • the coefficient updating method that the coefficient updating unit 90 can adopt includes: a constant mode blind equalization algorithm (CMA), a decision assisted minimum mean square error method (DDLMS, Decision-Directed Least-Mean-Square), and many more.
  • CMA constant mode blind equalization algorithm
  • DDLMS decision assisted minimum mean square error method
  • DDLMS Decision-Directed Least-Mean-Square
  • the coefficient updating unit may select more algorithms, which is not limited in the embodiment of the present invention.
  • the adaptive filter coefficient updated by the coefficient updating unit 90 is output to the equalization filtering unit 80, and is converted into a frequency coefficient by the coefficient FFT unit 30, and then output to the clock pre-filtering unit 20. Due to the coupling effect of the system, when the x-channel equalizing filter coefficient is mainly tapped When the position is close to the edge of the filter, but the link distortion increases, the main tap position of the x-channel equalization filter coefficient will gradually move to the central region without moving out of the filter boundary position; similarly, when the y-channel equalization filter coefficient When the main tap position is close to the edge of the filter, but the link distortion increases, the main tap position of the y-channel equalization filter coefficient will gradually move toward the center area without moving out of the filter boundary position.
  • Time-frequency conversion unit 10 clock pre-filtering unit 20, coefficient FFT unit 30, first timing error extraction unit 40, second timing error extraction unit 50, first point interpolation unit 60, second sample interpolation unit 70, equalization
  • the filtering unit 80 and the coefficient updating unit 90 can be implemented by a microprocessor (MCU, Micro Control Unit), a Field-Programmable Gate Array (FPGA), or an application-specific integrated circuit (ASIC, Application Specific) in the clock recovery equalization device. Integrated Circuit) implementation.
  • MCU Micro Control Unit
  • FPGA Field-Programmable Gate Array
  • ASIC Application Specific
  • the embodiment of the invention further describes a computer storage medium, wherein the computer storage medium stores executable instructions, and the executable instructions are used to execute the clock recovery equalization method shown in FIG. 4.
  • the clock recovery equalization method provided by the related art is more difficult to solve in optical fiber communication.
  • the effect of inter-symbol interference such as polarization mode dispersion on clock recovery, the traditional closed-loop clock recovery, the traditional closed-loop clock recovery loop delay is large, and it is impossible to track the phase jitter of the uplink input signal time.
  • the clock recovery equalization device compared with the related art, the clock recovery pre-filtering and the feedforward open-loop clock recovery structure solve the problem of residual chromatic dispersion and polarization mode dispersion affecting clock recovery, and fast tracking.
  • the foregoing program may be stored in a computer readable storage medium, and the program is executed when executed.
  • the foregoing storage medium includes: a mobile storage device, a random access memory (RAM), a read-only memory (ROM), a magnetic disk, or an optical disk.
  • RAM random access memory
  • ROM read-only memory
  • magnetic disk or an optical disk.
  • optical disk A medium that can store program code.
  • the above-described integrated unit of the present invention may be stored in a computer readable storage medium if it is implemented in the form of a software function module and sold or used as a standalone product.
  • the technical solution of the embodiments of the present invention may be embodied in the form of a software product in essence or in the form of a software product, which is stored in a storage medium and includes a plurality of instructions for making
  • a computer device which may be a personal computer, server, or network device, etc.
  • the foregoing storage medium includes various media that can store program codes, such as a mobile storage device, a RAM, a ROM, a magnetic disk, or an optical disk.

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Abstract

本发明公开一种时钟恢复均衡装置及方法、计算机存储介质，方法包括：进行预滤波获得预滤波第一偏振信号和预滤波第二偏振信号；根据预滤波第一偏振信号输出第一定时误差，根据预滤波第二偏振信号输出第二定时误差；根据第一定时误差对第一偏振信号与第二偏振信号对应进行内插，输出内插后得到的第一内插偏振信号与第二内插偏振信号；根据第二定时误差对第一偏振信号与第二偏振信号对应进行内插，输出内插后得到的第三内插偏振信号和第四内插偏振信号；进行滤波并输出x路均衡滤波信号和y路均衡滤波信号。

Description

时钟恢复均衡装置与方法、计算机存储介质 技术领域
本发明涉及光通信领域的时钟技术，尤其涉及一种时钟恢复均衡装置与方法、计算机存储介质。
背景技术
随着互联网流量的增加，在干线系统的光通信系统中需要更大的容量，当每波长比特率增加时，在传输路径上的色度色散，偏振模色散以及各种非线性效应的波形失真而导致信息质量的退化变得很严重。
和非相干技术相比，数字相干接收技术有如下优点：大约3分贝(dB)的光信噪比(OSNR，Optical Signal Noise Ratio)增益；可以方便地采用电均衡技术来应对信道变化，降低成本等；可以采用更高效的调制技术以及偏振复用来提高传输容量。因此数字相干技术被认为是高速光通信系统的关键技术。
光相干接收机中，通过将信号光和本振光进行混频，信号光的幅度和相位信息被搬移到基带信号中，因而光相干检测保留了光场的所有信息，可以发挥数字信号处理技术的功能和性能上的优势。采用电均衡技术能够近乎完全地补偿光信号的线性失真，如补偿色度色散(CD，Color Dispersion)，偏振模色散(PMD，Polarization Mode Dispersion)等。
相关技术提供的光相干接收机技术中，对于实现跟踪定时抖动的时钟恢复慢、以及自适应均衡器x偏振系数主要抽头位置与y偏振系数主要抽头位置偏离滤波器中心位置的问题，尚无有效解决方案。
发明内容
本发明实施例提供一种时钟恢复均衡装置及方法、计算机存储介质，解决残余色度色散及偏振模色散影响时钟恢复问题，并解决自适应均衡器x偏振系数主要抽头位置与y偏振系数主要抽头位置偏离滤波器中心位置的问题。
本发明实施例的技术方案是这样实现的：
本发明实施例提供一种时钟恢复均衡装置，包括：时钟预滤波单元、第一定时误差提取单元、第二定时误差提取单元、第一样点插值单元、第二样点插值单元、均衡滤波单元和系数更新单元；其中，
所述时钟预滤波单元，配置为使用自适应滤波系数对第一偏振信号与第二偏振信号两个偏振方向的偏振信号进行预滤波，对应获得预滤波第一偏振信号和预滤波第二偏振信号；
所述第一定时误差提取单元，配置为根据所述预滤波第一偏振信号，输出第一定时误差；
所述第二定时误差提取单元，配置为根据所述预滤波第二偏振信号，输出第二定时误差；
所述第一样点插值单元，配置为根据所述第一定时误差提取单元输出的第一定时误差，对输入所述第一样点插值单元的第一偏振信号与第二偏振信号两个偏振方向的信号对应进行内插，输出内插后得到的第一内插偏振信号和第二内插偏振信号；
所述第二样点插值单元，配置为根据所述第二定时误差提取单元输出的第二定时误差，对输入所述第二样点插值单元的第一偏振信号与第二偏振信号两个偏振方向的信号对应进行内插，输出内插后得到的第三内插偏振信号和第四内插偏振信号；
所述均衡滤波单元，配置为对所述第一样点插值单元输出的第一内插 偏振信号、第二内插偏振信号进行滤波并输出x路均衡滤波信号；对所述第二样点插值单元输出的第三内插偏振信号和第四内插偏振信号进行滤波，并输出y路均衡滤波信号。
优选地，所述均衡滤波单元，包括：
x路均衡滤波子单元，配置为对所述第一样点插值单元输出的第一内插偏振信号、第二内插偏振信号进行滤波，输出滤波结果相加后的得到x路均衡滤波信号；
y路均衡滤波子单元，配置为对所述第二样点插值单元输出的第三内插偏振信号和第四内插偏振信号进行滤波，输出滤波结果相加后的得到的y路均衡滤波信号。
优选地，所述装置还包括：
系数更新单元，配置为根据所述均衡滤波单元输出的x路均衡滤波信号、均y路衡滤波信号、所述第一样点插值单元输出的第一内插偏振信号和第二内插偏振信号、所述第二样点插值单元输出的第三内插信号偏振信号、第四内插偏振信号，更新所述自适应滤波系数。
优选地，所述系数更新单元，还配置为根据所述均衡滤波单元输出的x路均衡滤波信号，以及第一样点插值单元输出的第一内插偏振信号和第二内插偏振信号，计算x偏振系数的更新值，将x偏振系数的更新值叠加到原x偏振系数得到的更新后的x偏振系数作为x路自适应滤波系数，实现x路自适应滤波系数更新；
根据所述均衡滤波单元输出均衡滤波信号y，以及所述第二样点插值单元输出的第三内插偏振信号和第四内插偏振信号，计算y偏振系数的更新值，并将y偏振系数的更新值叠加到原y偏振系数得到的更新后的y偏振系数作为y路自适应滤波系数，实现y路自适应滤波系数更新。
优选地，所述装置还包括：
时频转换单元，配置为在所述第一偏振信号与第二偏振信号为时域信 号时，将所述第一偏振信号与第二偏振信号对应进行快速傅里叶变换FFT得到频域第一偏振信号与频域第二偏振信号，并将所述频域第一偏振信号与频域第二偏振信号输出至所述时钟预滤波单元；
所述时钟预滤波单元，还配置为使用自适应滤波系数对所述频域第一偏振信号与频域第二偏振信号两个偏振方向的偏振信号进行预滤波，对应获得预滤波第一偏振信号和预滤波第二偏振信号。
优选地，所述装置还包括：
系数FFT单元，配置为将所述系数更新单元输出的自适应滤波系数从时域转到频域，并将转换后得到的自适应滤波系数输出至所述时钟预滤波单元，所述转换后得到的自适应滤波系数配置为使所述时钟预滤波单元对所述频域第一偏振信号与频域第二偏振信号进行预滤波，对应获得所述预滤波第一偏振信号和预滤波第二偏振信号。
优选地，所述第一定时误差提取单元，还配置为对所述第一定时误差进行低通滤波去噪，输出滤波后的第一定时误差；
所述第二定时误差提取单元，还配置为对所述第二定时误差进行低通滤波去噪，输出滤波后的第二定时误差。
本发明实施例提供一种时钟恢复均衡方法，包括：
使用自适应滤波系数对第一偏振信号与第二偏振信号两个偏振方向的偏振信号进行预滤波，对应获得预滤波第一偏振信号和预滤波第二偏振信号；
根据所述预滤波第一偏振信号，输出第一定时误差，根据所述预滤波第二偏振信号，输出第二定时误差；
根据所述第一定时误差，对所述第一偏振信号与第二偏振信号两个偏振方向的信号对应进行内插，输出内插后得到的第一内插偏振信号和第二内插偏振信号；
根据所述第二定时误差，对所述第一偏振信号与第二偏振信号两个偏 振方向的信号对应进行内插，输出内插后得到的第三内插偏振信号和第四内插偏振信号；
对所述第一内插偏振信号、第二内插偏振信号进行滤波并输出x路均衡滤波信号；对所述第三内插偏振信号、第四内插偏振信号进行滤波并输出y路均衡滤波信号。
优选地，所述对第一内插偏振信号、第二内插偏振信号进行滤波并输出x路均衡滤波信号；对所述第三内插偏振信号、第四内插偏振信号进行滤波并输出y路均衡滤波信号，包括：
对所述第一内插偏振信号、第二内插偏振信号进行滤波，输出滤波结果相加后得到的x路均衡滤波信号；
对所述第三内插偏振信号、第四内插偏振信号进行滤波，输出滤波结果相加后得到的y路均衡滤波信号。
优选地，所述方法还包括：
根据所述x路均衡滤波信号、y路均衡滤波信号、第一内插偏振信号、第二内插偏振信号、第三内插偏振信号、第四内插偏振信号，更新所述自适应滤波系数。
优选地，所述根据x路均衡滤波信号、y路均衡滤波信号、第一内插偏振信号、第二内插偏振信号、第三内插偏振信号、第四内插偏振信号，更新所述自适应滤波系数，包括：
根据所述x路均衡滤波信号，以及所述第一内插偏振信号和第二内插偏振信号，计算x偏振系数的更新值，将x偏振系数的更新值叠加到原x偏振系数得到的更新后的x偏振系数作为x路自适应滤波系数，实现x路自适应滤波系数更新；
根据所述y路均衡滤波信号，以及所述第三偏振信号、第四内插偏振信号，计算y偏振系数的更新值，并将y偏振系数的更新值叠加到原y偏振系数得到的更新后的y偏振系数作为y路自适应滤波系数，实现y路自 适应滤波系数更新。
优选地，所述使用自适应滤波系数对第一偏振信号与第二偏振信号两个偏振方向的偏振信号进行预滤波，包括：
在所述第一偏振信号与第二偏振信号为时域信号时，将所述第一偏振信号与第二偏振信号对应进行快速傅里叶变换FFT得到频域第一偏振信号与频域第二偏振信号；
使用所述自适应滤波系数对所述频域第一偏振信号与频域第二偏振信号两个偏振方向的偏振信号进行预滤波，对应获得预滤波第一偏振信号和预滤波第二偏振信号。
优选地，所述使用所述自适应滤波系数对所述频域第一偏振信号与频域第二偏振信号两个偏振方向的偏振信号进行预滤波，包括：
将所述更新后的自适应滤波系数从时域转到频域，并利用转换后得到的自适应滤波系数对所述频域第一偏振信号与频域第二偏振信号两个偏振方向的偏振信号进行预滤波。
优选地，所述方法还包括：
输出所述第一定时误差之前，对所述第一定时误差进行低通滤波去噪；
输出所述第二定时误差之前，对所述第二定时误差进行低通滤波去噪。
本发明实施例还提供一种计算机存储介质，所述计算机存储介质中存储有可执行指令，所述可执行指令用于执行上述的时钟恢复均衡方法。
本发明实施例中，采用时钟恢复的预滤波技术，时钟恢复的预滤波的均衡效果好，定时误差处理能提取到较强的时钟信号，从而克服残余色度色散及偏振模色散影响时钟恢复问题；
本发明实施例中采用前馈开环时钟恢复的方式，也即偏振信号在进行定时误差提取之前，没有先经过样点值插值处理，这就不会产生环路延迟，从而能够实现时钟恢复定时抖动的强跟踪能力，克服了相关技术中时钟恢复方式的采用反馈的方式(也即定时误差提取的偏振信号事先经过了样点 值插值处理)时导致的环路延迟较大，无法跟踪高频抖动的问题。
附图说明
图1是典型的数字相干接收机框图；
图2自适应滤波系数图；
图3a至图3d本发明实施例中时钟恢复均衡装置的结构示意图；
图4本发明实施例中时钟恢复均衡方法的实现流程图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
相关技术提供的光相干接收机技术中，对于实现跟踪定时抖动的时钟恢复慢、以及自适应均衡器x偏振系数主要抽头位置与y偏振系数主要抽头位置偏离滤波器中心位置的问题，尚无有效解决方案，以下进行详细说明。
图1为典型的数字相干接收机框图，接收光信号被偏振分光器(PBS，Polarizing Beam Splitter)分成相互正交的两个偏振态信号，PBS输出偏振光信号通过90°光混频器(hybid)与本振光信号进行混频；混频后的光信号通过平衡光电检测器(PD，Photo electronic Detector)转换为基带电信号；光电转换后的电信号为每个偏振态有两路信号，但这4路信号与原始的4路信号并不对应，因为经过传输信道后，两个偏振态之间有串扰、偏振态也有旋转，所以接收端此处的两个偏振态、每个偏振态有两路正交信号与发射信号没有对应关系；光电转换后的电信号通过模数转换器(ADC，Analog Digital Converter)转换为数字信号，可以通用数字信号处理技术对ADC转换为数字信号进行处理。
色度色散(CD)的值一般较大，色度色散和偏振模色散(PMD)的均衡一般分两部分完成，首先，补偿静态色散，这里的均衡器通常不能使用标准的自适应算法进行更新系数，如补偿40000ps/nm色度色散，则滤波器抽头数要达到大几百甚至上千，通常利用快速傅立叶变换技术进行频域快速卷积。
残余的色度色散和偏振模色散的补偿通过自适应均衡器来实现，自适应均衡器采用自适应算法对系数进行更新，以跟踪补偿随时间动态变化的偏振模色散。自适应均衡器的输入信号需要满足稳定的采样相位，需要自适应均衡滤波器之前放一个时钟恢复模块。
时钟恢复，估计输入符号的采样时间误差，并对符号的采样时间进行插值调整，或者通过压控振荡器(VCO，Voltage-Controlled Oscillator)调整ADC采样频率，以保证提供稳定的符号采样相位；相关技术提供的时钟恢复算法，如平方时钟恢复算法，Gardner时钟恢复算法等，会受到偏振模色散(PMD)等链路失真影响，会时钟恢复正常工作；有的方法为时钟恢复插值模块放着自适应均衡器之前，而定时误差提取放着自适应均衡器之后，定时误差提取反馈定时误差用于控制时钟恢复插值模块。此种方法，由于环路延迟较大，不能跟踪较快的时钟抖动.
另一方面，偏振复用光通信系统的自适应均衡器的均衡滤波单元为一个蝶形结构滤波器，根据公式(1)(2)进行滤波：
Figure PCTCN2015080562-appb-000001
Figure PCTCN2015080562-appb-000002
其中，h(m)，v(m)为均衡滤波单元的输入的两个偏振态信号；x(n)，y(n)为均衡滤波输出信号；axh ,axv为x路均衡滤波系数，ayh,ayv为y路均衡滤波系数；从结构图可以看出，x路和y路的结构完全一致，且数据 处理相对对立；在盲均衡的情况下，很容易导致x和y两路收敛到同一偏振源的退化情况；针对这一问题，相关技术已经提供解决方案，但是，发明人发现，自适应均衡器的系数更新得到的系数，可能存在系数值较大主要抽头位置偏离滤波器中心区域问题，如图2所示，x偏振系数偏左，y偏振系数偏右，通过调整时钟恢复样点插值的速率可以使得4组滤波器系数主要抽头位置同时往一个方向移动，没有解决方案能够使得x偏振系数主要抽头位置与y偏振系数主要抽头位置往相反方向移动，这时，自适应均衡器不能很好地补偿信道失真。
针对上述问题，本发明实施例记载一种时钟恢复均衡装置与方法、计算机存储介质，解决残余色度色散及偏振模色散影响时钟恢复问题，并解决自适应均衡器x偏振系数主要抽头位置与y偏振系数主要抽头位置偏离滤波器中心位置的问题。
如图3a所示，本发明实施例记载的时钟恢复均衡装置包括：时钟预滤波单元20、第一定时误差提取单元40、第二定时误差提取单元50、第一样点插值单元60、第二样点插值单元70和均衡滤波单元80；
输入时钟恢复均衡装置的两个偏振方向的偏振信号可以为时域信号，也可以为频域信号；本发明实施例中，时域的信号用小写字母标识，频域信号使用大写字母标识；在图3a中，设输入的两个偏振方向的偏振信号为频域信号；其中，
时钟预滤波单元20，配置为使用自适应滤波系数对偏振信号H(对应频域的第一偏振信号)与偏振信号V(对应频域的第二偏振信号)两个偏振方向的偏振信号进行预滤波，对应获得频域的预滤波第一偏振信号X和预滤波第二偏振信号Y(对偏振信号H进行预滤波获得预滤波第一偏振信号X，对偏振信号V进行预滤波获得预滤波第一偏振信号Y)；
第一定时误差提取单元40，配置为根据预滤波第一偏振信号X，获取第一定时误差u1；
第二定时误差提取单元50，配置为根据预滤波第二偏振信号Y，获取第二定时误差u2；
第一样点插值单元60，配置为根据第一定时误差提取单元40输出的第一定时误差u1，对输入第一样点插值单元60的两个偏振方向的偏振信号即偏振信号H与偏振信号V进行内插(分数延迟调整滤波)，输出内插后得到的偏振信号H1和偏振信号V1(对偏振信号H进行内插得到的偏振信号H1，对应第一内插偏振信号，对偏振信号V进行内插得到的偏振信号V1，对应第二内插偏振信号))；
第二样点插值单元70，配置为根据第二定时误差提取单元50输出的第二定时误差u2，对输入第二样点插值单元70的偏振信号H与偏振信号V两个偏振方向对应进行内插(分数延迟调整滤波)，输出内插后得到的偏振信号H2(对应第三内插偏振信号)和偏振信号V2(对应第四内插偏振信号)；
均衡滤波单元80，配置为对第一样点插值单元60输出的偏振信号H1、偏振信号B1进行滤波，输出滤波结果相加后的得到的均衡滤波信号X；y路均衡滤波单元，对第二样点插值单元70输出的偏振信号H2和偏振信号V2进行滤波，输出滤波结果相加后的得到的均衡滤波信号Y。
输入图3a所示的时钟恢复均衡装置的为时域的偏振信号h(对应时域的第一偏振信号)和偏振信号v(对应时域的第二偏振信号)，各单元的处理流程类似，下面进行说明：
时钟预滤波单元20使用自适应滤波系数对偏振信号h(对应时域第一偏振信号)与偏振信号v(对应时域第二偏振信号)两个偏振方向的偏振信号进行预滤波，对应获得时域的预滤波第一偏振信号x和预滤波第二偏振 信号y(对偏振信号h进行预滤波获得预滤波第一偏振信号h1，对应第一内插偏振信号，对偏振信号v进行预滤波获得预滤波第一偏振信号v1，对应第二内插偏振信号)；
第一定时误差提取单元40根据预滤波第一偏振信号x，获取第一定时误差u1；
第二定时误差提取单元50根据预滤波第二偏振信号y，获取第二定时误差u2；
第一样点插值单元60根据第一定时误差提取单元40输出的第一定时误差u1，对输入第一样点插值单元60的两个偏振方向的偏振信号即偏振信号h与偏振信号v进行内插(分数延迟调整滤波)，输出内插后得到的偏振信号h1和偏振信号v1(对偏振信号h进行内插得到的偏振信号h1，对应第一内插偏振信号，对偏振信号v进行内插得到的偏振信号v1，对应第二内插偏振信号)；
第二样点插值单元70根据第二定时误差提取单元50输出的第二定时误差u2，对输入第二样点插值单元70的偏振信号h与偏振信号v两个偏振方向对应进行内插(分数延迟调整滤波)，输出内插后得到的偏振信号h2(对应第三内插偏振信号)和偏振信号v2(对应第四内插偏振信号)；
均衡滤波单元80对第一样点插值单元60输出的偏振信号h1、偏振信号v1进行滤波，输出滤波结果相加后的得到的均衡滤波信号x；y路均衡滤波单元，对第二样点插值单元70输出的偏振信号h2和偏振信号v2进行滤波，输出滤波结果相加后的得到的均衡滤波信号y。
均衡滤波单元80输出的均衡滤波信号x与y可以对应采用公式(3)(4)表示：
Figure PCTCN2015080562-appb-000003
Figure PCTCN2015080562-appb-000004
其中，h(m)，v(m)为输入均衡滤波单元80的两个偏振信号；x(n)，y(n)为均衡滤波输出信号；axh ,axv为x路均衡滤波系数，ayh ,ayv为y路均衡滤波系数，M为滤波器抽头数。
作为一个实施方式，如图3b所示，基于图3a，均衡滤波单元80包括：x路均衡滤波子单元801与y路均衡滤波子单元802；
输入图3b所示的时钟恢复均衡装置的第一偏振信号和第二偏振信号为时域信号(设为第一偏振信号h和第二偏振信号v两个偏振方向的信号)时，x路均衡滤波子单元801，配置为对第一样点插值单元60输出的偏振信号h1(对应第一偏振信号)、偏振信号h2(对应第二内插偏振信号)进行滤波，输出滤波结果相加后的得到的均衡滤波信号x；y路均衡滤波子单元802，配置为对第二样点插值单元70输出的偏振信号h2(对应第三偏振信号)和偏振信号v2(对应第四偏振信号)进行滤波，输出滤波结果相加后的得到的均衡滤波信号y；
输入图3b所示的时钟恢复均衡装置的第一偏振信号和第二偏振信号为频域信号(设为第一偏振信号H和第二偏振信号两个偏振方向的信号)时，x路均衡滤波子单元801，配置为对第一样点插值单元60输出的偏振信号H1(对应第一偏振信号)、偏振信号H2(对应第二内插偏振信号)进行滤波，输出滤波结果相加后的得到的均衡滤波信号X；y路均衡滤波子单元802，配置为对第二样点插值单元70输出的偏振信号H2(对应第三偏振信号)和偏振信号V2(对应第四偏振信号)进行滤波，输出滤波结果相加后的得到的均衡滤波信号Y。
作为一个实施方式，如图3c所示，基于图3b，时钟恢复均衡装置还可 以包括系数更新单元90；
输入图3c所示的时钟恢复均衡装置的第一偏振信号和第二偏振信号为时域信号(设为第一偏振信号h和第二偏振信号v两个偏振方向的信号)时，系数更新单元90，根据均衡滤波单元80输出的x路均衡滤波信号、y路均衡滤波信号、第一样点插值单元60输出的偏振信号h1和偏振信号v1、第二样点插值单元70输出的信号偏振信号h2、偏振信号v2，更新自适应滤波系数；
例如，系数更新单元90根据均衡滤波单元80输出的均衡滤波信号x，以及第一样点插值单元60输出的信号(偏振信号h1和偏振信号v1)，计算x偏振系数的更新值，将x偏振系数的更新值叠加到原x偏振系数得到更新后的x偏振系数作为x路自适应滤波系数，实现x路自适应滤波系数更新；根据均衡滤波单元80输出信号y，以及第二样点插值单元70输出信号(偏振信号h2和偏振信号v2)，计算y偏振系数的更新值，并将y偏振系数的更新值叠加到原y偏振系数得到的更新后的y偏振系数作为y路自适应滤波系数，实现y路自适应滤波系数更新；
输入图3c所示的时钟恢复均衡装置的第一偏振信号和第二偏振信号为频域信号(设为第一偏振信号H和第二偏振信号V两个偏振方向的信号)时，系数更新单元90，根据均衡滤波单元80输出的x路均衡滤波信号、y路均衡滤波信号、第一样点插值单元60输出的偏振信号H1和偏振信号V1、第二样点插值单元70输出的信号偏振信号H2、偏振信号V2，更新自适应滤波系数。
例如，系数更新单元90根据均衡滤波单元80输出的均衡滤波信号X，以及第一样点插值单元60输出的信号(偏振信号H1和偏振信号V1)，计算x偏振系数的更新值，将x偏振系数的更新值叠加到原x偏振系数得到的更新后的x偏振系数作为x路自适应滤波系数，实现x路自适应滤波系数更新；根据均衡滤波单元80输出信号Y，以及第二样点插值单元70输 出信号(偏振信号H2和偏振信号V2)，计算y偏振系数的更新值，并将y偏振系数的更新值叠加到原y偏振系数得到更新后的y偏振系数作为y路自适应滤波系数，实现y路自适应滤波系数更新；
系数更新单元90，可以采用的系数更新方法包括：常模盲均衡算法、恒模算法(CMA，Constant Modulus Algorithm)、判决辅助最小均方误差法算法(DDLMS，Decision-Directed Least-Mean-Square)、以及多模盲均衡算法。
作为一个实施方式，如图3d所示，基于图3c，时钟恢复均衡装置还可以包括时频转换单元10和系数快速傅里叶变换(FFT，Fast Fourier Transformation)单元30，当输入图3c所示的时钟恢复均衡装置为偏振信号h(对应时域的第一偏振信号)和偏振信号v(对应时域的第二偏振信号)时，时频转换单元10将输入时钟恢复均衡装置的时域偏振信号h与时域偏振信号v两个偏振方向的信号进行FFT变换，对应得到频域偏振信号H与频域偏振信号V并输出至时钟预滤波单元20；
相应地，时钟预滤波单元20使用FFT单元30输出的频域的自适应滤波系数对偏振信号H与偏振信号V两个偏振方向的偏振信号进行预滤波，对应获得频域的预滤波第一偏振信号X和预滤波第二偏振信号Y(对偏振信号H进行预滤波获得预滤波第一偏振信号X，对偏振信号V进行预滤波获得预滤波第一偏振信号Y)；
由于时钟预滤波单元20对频域的对偏振信号H与偏振信号V进行预滤波，因此需要将系数更新单元90输出的时域的自适应滤波系数利用快速傅立叶变换转换到频率，以供时钟预滤波单元20进行预滤波处理；也就是说，在输入图3c所示的时钟恢复均衡装置为时域的偏振信号h和偏振信号v时，时钟预滤波单元20仍然能够在频率进行处理，节省了系统资源；
需要指出的是，时钟预滤波单元20可以由具有蝶形结构的有限脉冲响 应(FIR)滤波器实现，当输入时钟恢复均衡装置的信号为时域偏振信号时，时钟预滤波单元20可以基于图3c所示的结构在时域实现预滤波；当输入时钟恢复均衡装置的信号为频域偏振信号时，时钟预滤波单元20可以基于图3c所示的结构在频域实现预滤波；
当输入信号时钟预滤波单元20的信号为时域信号时，可以基于图3d所示的结构，由视频转换单元10将信号从时域转换为频域，使时钟预滤波单元20在频域实现预滤波以接收计算资源。
作为一个实施方式，第一定时误差提取单元40，以及第二定时误差提取单元50可采用平方定时算法，对于频域定时恢复，则可采用Godard算法。
作为一个实施方式，第一定时误差提取单元40可以包括第一模角计算模块，配置为对第一定时误差进行低通滤波以去除噪声，输出滤波后的第一定时误差。
作为一个实施方式，第二定时误差提取单元50可以包括第二模角计算模块，配置为对第二定时误差进行低通滤波以去除噪声，输出滤波后的第二定时误差。
作为一个实施方式，第一样点插值单元60，根据第一定时误差提取单元40输出的第一定时误差u1，即插值的小数指针，对第一偏振信号与第二偏振信号两个偏振方向的偏振信号进行数字内插，对应获得第一内插偏振信号与第二内插偏振信号；
当输入图3a所示的时钟恢复均衡装置的为时域的偏振信号h(对应时域的第一偏振信号)和偏振信号v(对应时域的第二偏振信号)，第一样点插值单元60在时域实现数字内插，插值系数算法可选用一般的分数插值算法，如三次拉格朗日内插法；
当输入图3a所示的时钟恢复均衡装置的信号为频域的偏振信号H(对应频域的第一偏振信号)和偏振信号V(对应频域的第二偏振信号)，第一 样点插值单元60在频域实现内插。
作为一个实施方式，第二样点插值单元70，根据第一定时误差提取单元50输出的第一定时误差u2，即插值的小数指针，对第一偏振信号与第二偏振信号两个偏振方向的偏振信号进行数字内插，对应获得第三内插偏振信号与第四内插偏振信号；
当输入图3a所示的时钟恢复均衡装置的为时域的偏振信号h(对应时域的第一偏振信号)和偏振信号v(对应时域的第二偏振信号)，第二样点插值单元70在时域实现数字内插时，插值系数算法可选用一般的分数插值算法，如三次拉格朗日内插法；
当输入图3a所示的时钟恢复均衡装置的为频域的偏振信号H(对应频域的第一偏振信号)和偏振信号V(对应频域的第二偏振信号)，第二样点插值单元70在在频域实现内插。
本发明实施例记载的时钟恢复均衡装置，采用时钟恢复的预滤波技术，时钟恢复的自适应滤波系数直接由系数更新单元反馈，时钟恢复的预滤波的均衡效果好，定时误差处理能提取到较强的时钟信号，从而克服残余色度色散及偏振模色散影响时钟恢复问题；
本发明实施例记载的时钟恢复均衡装置，为前馈开环时钟恢复系统，也即偏振信号在进行定时误差提取之前没有先经过样点值插值处理，从而不会产生环路延迟，进而能够实现时钟恢复定时抖动的强跟踪能力，而相关技术的时钟恢复方式中环路延迟较大，无法跟踪高频抖动；
本发明实施例记载的时钟恢复均衡装置，能够跟踪定时频偏，兼有闭环系统的优点；而时钟恢复的预滤波，两路分别定时误差提取，以及两路样点插值处理，自适应均衡器(对应图3d中的均衡滤波单元80和系统更新单元90)x偏振系数主要抽头位置在靠近滤波器(对应图3d中的均衡滤波单元80)边界位置时，依靠系统的耦合作用下，使得x偏振系数主要抽头位置向滤波器中心位置方向移动；自适应均衡器y偏振系数主要抽头位 置在靠近滤波器边界位置时，依靠系统的耦合作用下，能够使得y偏振系数主要抽头位置向滤波器中心位置方向移动，有效解决自适应均衡器x偏振系数主要抽头位置与y偏振系数主要抽头位置偏离较大，而导致主要抽头位置在不同的两个边界处，进而影响均衡器滤波效果问题。
与上述时钟恢复均衡装置的处理相对应，本发明实施例还记载一种时钟恢复均衡方法，如图4所示，包括以下步骤：
步骤101，使用自适应滤波系数对第一偏振信号与第二偏振信号两个偏振方向的偏振信号进行预滤波，对应获得预滤波第一偏振信号和预滤波第二偏振信号。
步骤102，根据预滤波第一偏振信号，输出第一定时误差，根据预滤波第二偏振信号，输出第二定时误差。
步骤103，根据第一定时误差，对第一偏振信号与第二偏振信号两个偏振方向的信号对应进行内插，输出内插后得到的第一内插偏振信号和第二内插偏振信号。
步骤104，根据第二定时误差，对第一偏振信号与第二偏振信号两个偏振方向的信号对应进行内插，输出内插后得到的第三内插偏振信号和第四内插偏振信号。
步骤105，对第一内插偏振信号、第二内插偏振信号进行滤波并输出x路均衡滤波信号；对第三内插偏振信号、第四内插偏振信号进行滤波并输出y路均衡滤波信号。
作为一个实施方式，对第一内插偏振信号、第二内插偏振信号进行滤波并输出x路均衡滤波信号；对第三内插偏振信号、第四内插偏振信号进行滤波并输出y路均衡滤波信号，包括：
对第一内插偏振信号、第二内插偏振信号进行滤波，输出滤波结果相加后得到的x路均衡滤波信号；
对第三内插偏振信号、第四内插偏振信号进行滤波，输出滤波结果相 加后得到的y路均衡滤波信号。
作为一个实施方式，所述方法还包括：
根据所述x路均衡滤波信号、y路均衡滤波信号、第一内插偏振信号、第二内插偏振信号、第三内插偏振信号、第四内插偏振信号，更新自适应滤波系数；
例如，根据x路均衡滤波信号，以及第一内插偏振信号和第二内插偏振信号，计算x偏振系数的更新值，将x偏振系数的更新值叠加到原x偏振系数得到的更新后的x偏振系数作为x路自适应滤波系数，实现x路自适应滤波系数更新；
根据y路均衡滤波信号，以及第三偏振信号、第四内插偏振信号，计算y偏振系数的更新值，并将y偏振系数的更新值叠加到原y偏振系数得到的更新后的y偏振系数作为y路自适应滤波系数，实现y路自适应滤波系数更新。
作为一个实施方式，使用自适应滤波系数对第一偏振信号与第二偏振信号两个偏振方向的偏振信号进行预滤波，包括：
在第一偏振信号与第二偏振信号为时域信号时，将第一偏振信号与第二偏振信号对应进行快速傅里叶变换得到频域第一偏振信号与频域第二偏振信号；
使用自适应滤波系数对所述频域第一偏振信号与频域第二偏振信号两个偏振方向的偏振信号进行预滤波，对应获得预滤波第一偏振信号和预滤波第二偏振信号。
作为一个实施方式，使用所述自适应滤波系数对频域第一偏振信号与频域第二偏振信号两个偏振方向的偏振信号进行预滤波，包括：
将更新后的自适应滤波系数从时域转到频域，并利用转换后得到的自适应滤波系数对频域第一偏振信号与频域第二偏振信号两个偏振方向的偏振信号进行预滤波。
作为一个实施方式，所述方法还包括：
输出所述第一定时误差之前，对所述第一定时误差进行低通滤波去噪；
输出所述第二定时误差之前，对所述第二定时误差进行低通滤波去噪。
下面结合图3d，对时钟恢复均衡装置输入时域偏振信号h与时域偏振信号v时，实施时钟恢复均衡的处理进行说明：如图3d所示的时钟恢复均衡装置包括：
时频转换单元10、时钟预滤波单元20，系数FFT单元30、第一定时误差提取单元40、第二定时误差提取单元50、第一样点插值单元60、第二样点插值单元70、均衡滤波单元80和系数更新单元90；
时频转换单元10，配置为接收时域偏振信号h与时域偏振信号v两个偏振方向的信号，将时域偏振信号h与时域偏振信号v对应进行FFT变换得到频域偏振信号H与频域偏振信号V，并将频域偏振信号H与频域偏振信号V输出至时钟预滤波单元20；
系数FFT单元30，配置为接收系数更新单元90反馈的自适应滤波系数axh ,axv，ayh ,ayv，利用快速傅立叶变换技术将自适应滤波系数从时域转到频域，并将转换后得到的自适应滤波系数Axh ,Axv，Ayh ,Ayv输出至时钟预滤波单元20；
时钟预滤波单元20，配置为利用系数FFT单元30输出的自适应滤波系数、以及时频转换单元10输出的频域偏振信号H与频域偏振信号V进行频域预滤波，并将频域预滤波后得到的预滤波第一偏振信号X，输出至第一定时误差提取单元40，将频域预滤波后得到的预滤波第一偏振信号Y，输出至第二定时误差提取单元50；
其中，对频域偏振信号H与频域偏振信号V进行频域预滤波可以对应根据公式(5)(6)进行处理实现：
X(k)＝Axh (k)H(k)＋Axv(k)V(k)   (5)
Y(k)＝Ayh (k)H(k)+Ayv(k)V(k)   (6)
第一定时误差提取单元40，配置为基于接收到的预滤波第一偏振信号X，利用定时误差提取算法进行定时误差提取得到第一定时误差，例如采用Godard算法进行定时误差提取，对应计算公式如公式(7)所示：
Figure PCTCN2015080562-appb-000005
时钟信号C1的模角表示第一定时误差的值，第一模角计算模块(设置于第一定时误差提取单元40中)计算根据公式(8)计算第一定时误差u1：
Figure PCTCN2015080562-appb-000006
作为一个实施方式，第一模角计算模块可以对第一定时误差u1进行低通滤波，以减小噪声的影响，并将低通滤波结果输出给第一样点插值单元40。
第二定时误差提取单元50，配置为将接收到的第二偏振信号Y，利用定时误差提取算法进行定时误差提取得到第二定时误差值，例如可以采用Godard算法进行定时误差提取，Godard算法对应的计算公式如公式(9)所示：
Figure PCTCN2015080562-appb-000007
时钟信号C2的模角表示第二定时误差的值，第二模角计算模块根据公式(10)计算第二定时误差u2：
Figure PCTCN2015080562-appb-000008
作为一个实施方式，第二模角计算模块可以对u2进行低通滤波，以减小噪声的影响，并将滤波结果输出给第二样点插值单元50。
第一样点插值单元60，配置为对输入的两个偏振方向的时域偏振信号 h与时域偏振信号v，进行分数延迟调整滤波(内插)，并输出分数延迟调整滤波(内插)后得到的时域偏振信号h1与时域偏振信号v1，进行分数延迟调整滤波所使用的插值指针为第一定时误差提取单元40输出的第一定时误差值；
第二样点插值单元70，配置为对两个偏振方向输入的时域信号h与时域偏振信号v，进行分数延迟调整滤波，并输出分数延迟调整滤波后得到的信号h2、v2，进行分数延迟调整滤波所使用的插值指针为第二定时误差提取单元50输出的第二定时误差值。
需要指出的是，第一样点插值单元60、第二样点插值单元70所使用的内插滤波器可以选用有限脉冲响应滤波器，也可选用Farrow结构滤波器，技术较为成熟，实现较为灵活，这里不再累述。
均衡滤波单元80，包括x路均衡滤波子单元801与y路均衡滤波子单元802；x路均衡滤波子单元，对第一样点插值单元60输出的信号时域偏振信号h1、时域偏振信号v1进行滤波，输出滤波结果相加得到均衡滤波信号x输出；均衡滤波信号x；y路均衡滤波单元，配置为对第二样点插值单元60输出的信号时域偏振信号h2、时域偏振信号v2进行滤波，将滤波结果相加得到均衡滤波信号y并输出；均衡滤波信号x与y可以对应采用公式(11)(12)表示：
Figure PCTCN2015080562-appb-000009
Figure PCTCN2015080562-appb-000010
其中，h(m)、v(m)为均衡滤波单元80输入的两个偏振态信号；x(n)、y(n)为均衡滤波信号；axh ,axv为x路均衡滤波系数，ayh ,ayv为y路均衡滤波系数，M为滤波器抽头数。
系数更新单元90，配置为根据均衡滤波单元80输出的均衡滤波信号x，以及第一样点插值单元60输出的信号(也即进行分数延迟调整滤波后得到 的信号h1、v1)，计算x偏振系数的更新值，并将x偏振系数的更新值叠加到原x偏振系数得到更新后的x偏振系数，实现x路自适应滤波系数更新；根据均衡滤波单元输出信号y，以及第二样点插值单元输出信号(也即进行分数延迟调整滤波后得到的信号h2、v2)，计算y偏振系数的更新值，并将y偏振系数的更新值叠加到原y偏振系数得到更新后的y偏振系数，实现y路自适应滤波系数更新。
系数更新单元90可以采用的系数更新方法包括：常模盲均衡算法恒模算法(CMA，Constant Modulus Algorithm)、判决辅助最小均方误差法算法(DDLMS，Decision-Directed Least-Mean-Square)和多模盲均衡算法，系数更新单元可以选择的算法较多，本发明实施例中不做限定。
系数更新单元90更新的自适应滤波系数输出至均衡滤波单元80，并经过系数FFT单元30转换为频率系数后输出至时钟预滤波单元20，由于系统的耦合作用，当x路均衡滤波系数主要抽头位置靠近滤波器边上时，但链路失真增大时，x路均衡滤波系数主要抽头位置会逐渐往中心区域移动，而不会移动出滤波器边界位置；同理，当y路均衡滤波系数主要抽头位置靠近滤波器边上时，但链路失真增大时，y路均衡滤波系数主要抽头位置会逐渐往中心区域移动，而不会移动出滤波器边界位置。
时频转换单元10、时钟预滤波单元20，系数FFT单元30、第一定时误差提取单元40、第二定时误差提取单元50、第一样点插值单元60、第二样点插值单元70、均衡滤波单元80和系数更新单元90可由时钟恢复均衡装置中的微处理器(MCU，Micro Control Unit)、逻辑可编程门阵列(FPGA，Field－Programmable Gate Array)实现或专用集成电路(ASIC，Application Specific Integrated Circuit)实现。
本发明实施例还记载一种计算机存储介质，所述计算机存储介质中存储有可执行指令，所述可执行指令用于执行图4所示的时钟恢复均衡方法。
综上所述，相关技术提供的时钟恢复均衡方法，较难解决光纤通信中 偏振模色散等码间干扰对时钟恢复的影响，传统的闭环时钟恢复，传统的闭环时钟恢复环路延迟大，无法跟踪上链路输入信号时间较快的相位抖动；
而采用本发明记载的时钟恢复均衡装置，与相关技术相比，时钟恢复的预滤波，以及前馈开环时钟恢复结构，解决了残余色度色散及偏振模色散影响时钟恢复问题，以及快速跟踪抖动问题；两路分别插值，能够避免x偏振系数主要抽头位置与y偏振系数主要抽头位置偏离较大，而导致主要抽头位置，在不同的两个边界处，而影响均衡器滤波效果问题。
本领域普通技术人员可以理解：实现上述方法实施例的全部或部分步骤可以通过程序指令相关的硬件来完成，前述的程序可以存储于一计算机可读取存储介质中，该程序在执行时，执行包括上述方法实施例的步骤；而前述的存储介质包括：移动存储设备、随机存取存储器(RAM，Random Access Memory)、只读存储器(ROM，Read-Only Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
或者，本发明上述集成的单元如果以软件功能模块的形式实现并作为独立的产品销售或使用时，也可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明实施例的技术方案本质上或者说对相关技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机、服务器、或者网络设备等)执行本发明各个实施例所述方法的全部或部分。而前述的存储介质包括：移动存储设备、RAM、ROM、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (15)

  1. 一种时钟恢复均衡装置，包括：时钟预滤波单元、第一定时误差提取单元、第二定时误差提取单元、第一样点插值单元、第二样点插值单元、均衡滤波单元和系数更新单元；其中，
    所述时钟预滤波单元，配置为使用自适应滤波系数对第一偏振信号与第二偏振信号两个偏振方向的偏振信号进行预滤波，对应获得预滤波第一偏振信号和预滤波第二偏振信号；
    所述第一定时误差提取单元，配置为根据所述预滤波第一偏振信号，输出第一定时误差；
    所述第二定时误差提取单元，配置为根据所述预滤波第二偏振信号，输出第二定时误差；
    所述第一样点插值单元，配置为根据所述第一定时误差提取单元输出的第一定时误差，对输入所述第一样点插值单元的第一偏振信号与第二偏振信号两个偏振方向的信号对应进行内插，输出内插后得到的第一内插偏振信号和第二内插偏振信号；
    所述第二样点插值单元，配置为根据所述第二定时误差提取单元输出的第二定时误差，对输入所述第二样点插值单元的第一偏振信号与第二偏振信号两个偏振方向的信号对应进行内插，输出内插后得到的第三内插偏振信号和第四内插偏振信号；
    所述均衡滤波单元，配置为对所述第一样点插值单元输出的第一内插偏振信号、第二内插偏振信号进行滤波并输出x路均衡滤波信号；对所述第二样点插值单元输出的第三内插偏振信号和第四内插偏振信号进行滤波，并输出y路均衡滤波信号。
  2. 如权利要求1所述的装置，其中，所述均衡滤波单元，包括：
    x路均衡滤波子单元，配置为对所述第一样点插值单元输出的第一内插 偏振信号、第二内插偏振信号进行滤波，输出滤波结果相加后的得到x路均衡滤波信号；
    y路均衡滤波子单元，配置为对所述第二样点插值单元输出的第三内插偏振信号和第四内插偏振信号进行滤波，输出滤波结果相加后的得到的y路均衡滤波信号。
  3. 如权利要求1所述的装置，其中，所述装置还包括：
    系数更新单元，配置为根据所述均衡滤波单元输出的x路均衡滤波信号、均y路衡滤波信号、所述第一样点插值单元输出的第一内插偏振信号和第二内插偏振信号、所述第二样点插值单元输出的第三内插信号偏振信号、第四内插偏振信号，更新所述自适应滤波系数。
  4. 如权利要求3所述的装置，其中，
    所述系数更新单元，还配置为根据所述均衡滤波单元输出的x路均衡滤波信号，以及第一样点插值单元输出的第一内插偏振信号和第二内插偏振信号，计算x偏振系数的更新值，将x偏振系数的更新值叠加到原x偏振系数得到的更新后的x偏振系数作为x路自适应滤波系数，实现x路自适应滤波系数更新；
    根据所述均衡滤波单元输出均衡滤波信号y，以及所述第二样点插值单元输出的第三内插偏振信号和第四内插偏振信号，计算y偏振系数的更新值，并将y偏振系数的更新值叠加到原y偏振系数得到的更新后的y偏振系数作为y路自适应滤波系数，实现y路自适应滤波系数更新。
  5. 如权利要求1所述的装置，其中，所述装置还包括：
    时频转换单元，配置为在所述第一偏振信号与第二偏振信号为时域信号时，将所述第一偏振信号与第二偏振信号对应进行快速傅里叶变换FFT得到频域第一偏振信号与频域第二偏振信号，并将所述频域第一偏振信号与频域第二偏振信号输出至所述时钟预滤波单元；
    所述时钟预滤波单元，还配置为使用自适应滤波系数对所述频域第一 偏振信号与频域第二偏振信号两个偏振方向的偏振信号进行预滤波，对应获得预滤波第一偏振信号和预滤波第二偏振信号。
  6. 如权利要求5所述的装置，其中，所述装置还包括：
    系数FFT单元，配置为将所述系数更新单元输出的自适应滤波系数从时域转到频域，并将转换后得到的自适应滤波系数输出至所述时钟预滤波单元，所述转换后得到的自适应滤波系数配置为使所述时钟预滤波单元对所述频域第一偏振信号与频域第二偏振信号进行预滤波，对应获得所述预滤波第一偏振信号和预滤波第二偏振信号。
  7. 如权利要求1至6任一项所述的装置，其中，
    所述第一定时误差提取单元，还配置为对所述第一定时误差进行低通滤波去噪，输出滤波后的第一定时误差；
    所述第二定时误差提取单元，还配置为对所述第二定时误差进行低通滤波去噪，输出滤波后的第二定时误差。
  8. 一种时钟恢复均衡方法，包括：
    使用自适应滤波系数对第一偏振信号与第二偏振信号两个偏振方向的偏振信号进行预滤波，对应获得预滤波第一偏振信号和预滤波第二偏振信号；
    根据所述预滤波第一偏振信号，输出第一定时误差，根据所述预滤波第二偏振信号，输出第二定时误差；
    根据所述第一定时误差，对所述第一偏振信号与第二偏振信号两个偏振方向的信号对应进行内插，输出内插后得到的第一内插偏振信号和第二内插偏振信号；
    根据所述第二定时误差，对所述第一偏振信号与第二偏振信号两个偏振方向的信号对应进行内插，输出内插后得到的第三内插偏振信号和第四内插偏振信号；
    对所述第一内插偏振信号、第二内插偏振信号进行滤波并输出x路均 衡滤波信号；对所述第三内插偏振信号、第四内插偏振信号进行滤波并输出y路均衡滤波信号。
  9. 如权利要求8所述的方法，其中，所述对第一内插偏振信号、第二内插偏振信号进行滤波并输出x路均衡滤波信号；对所述第三内插偏振信号、第四内插偏振信号进行滤波并输出y路均衡滤波信号，包括：
    对所述第一内插偏振信号、第二内插偏振信号进行滤波，输出滤波结果相加后得到的x路均衡滤波信号；
    对所述第三内插偏振信号、第四内插偏振信号进行滤波，输出滤波结果相加后得到的y路均衡滤波信号。
  10. 如权利要求8所述的方法，其中，所述方法还包括：
    根据所述x路均衡滤波信号、y路均衡滤波信号、第一内插偏振信号、第二内插偏振信号、第三内插偏振信号、第四内插偏振信号，更新所述自适应滤波系数。
  11. 如权利要求10所述的方法，其中，所述根据x路均衡滤波信号、y路均衡滤波信号、第一内插偏振信号、第二内插偏振信号、第三内插偏振信号、第四内插偏振信号，更新所述自适应滤波系数，包括：
    根据所述x路均衡滤波信号，以及所述第一内插偏振信号和第二内插偏振信号，计算x偏振系数的更新值，将x偏振系数的更新值叠加到原x偏振系数得到的更新后的x偏振系数作为x路自适应滤波系数，实现x路自适应滤波系数更新；
    根据所述y路均衡滤波信号，以及所述第三偏振信号、第四内插偏振信号，计算y偏振系数的更新值，并将y偏振系数的更新值叠加到原y偏振系数得到的更新后的y偏振系数作为y路自适应滤波系数，实现y路自适应滤波系数更新。
  12. 如权利要求10所述的方法，其中，所述使用自适应滤波系数对第一偏振信号与第二偏振信号两个偏振方向的偏振信号进行预滤波，包括：
    在所述第一偏振信号与第二偏振信号为时域信号时，将所述第一偏振信号与第二偏振信号对应进行快速傅里叶变换FFT得到频域第一偏振信号与频域第二偏振信号；
    使用所述自适应滤波系数对所述频域第一偏振信号与频域第二偏振信号两个偏振方向的偏振信号进行预滤波，对应获得预滤波第一偏振信号和预滤波第二偏振信号。
  13. 如权利要求12所述的方法，其中，所述使用所述自适应滤波系数对所述频域第一偏振信号与频域第二偏振信号两个偏振方向的偏振信号进行预滤波，包括：
    将所述更新后的自适应滤波系数从时域转到频域，并利用转换后得到的自适应滤波系数对所述频域第一偏振信号与频域第二偏振信号两个偏振方向的偏振信号进行预滤波。
  14. 如权利要求8至13任一项所述的方法，其中，所述方法还包括：
    输出所述第一定时误差之前，对所述第一定时误差进行低通滤波去噪；
    输出所述第二定时误差之前，对所述第二定时误差进行低通滤波去噪。
  15. 一种计算机存储介质，所述计算机存储介质中存储有可执行指令，所述可执行指令用于执行权利要求8至14任一项所述的时钟恢复均衡方法。
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