WO2016099565A1

WO2016099565A1 - Photonic chip for continuous variable quantum key distribution

Info

Publication number: WO2016099565A1
Application number: PCT/US2014/071634
Authority: WO
Inventors: Hongwei Li; David BITAULD
Original assignee: Nokia Technologies Oy; Nokia Usa Inc.
Priority date: 2014-12-19
Filing date: 2014-12-19
Publication date: 2016-06-23

Abstract

In some example embodiments, there is provided an apparatus. The apparatus may include a beam splitter comprising an input, a first output, and a second output, wherein the input is configured to receive a laser pulse, the first output provides a signal of interest and the second output provides a reference signal; a modulator coupled to the first output, wherein the modulator modulates the signal of interest with coherent state information from which quantum key information is derivable; and a combiner including a first combiner input, a second combiner input, and a combiner output, wherein the first combiner input receives the reference signal and the second combiner input receives the signal of interest modulated with the coherent state information, wherein the combiner output provides an optical signal carrying the reference signal and the signal of interest modulated with the coherent state information.

Description

PHOTONIC CHIP FOR CONTINUOUS VARIABLE QUANTUM KEY

DISTRIBUTION

FIELD

[001 ] The subject matter described herein relates to quantum key distribution.

BACKGROUND

[002] Quantum key distribution refers to the use of quantum mechanics to produce and distribute an encryption key. In a quantum key distribution system, two parties can produce a shared, random secret key known only to the two parties, and the shared, random secret key can be used to encrypt and decrypt messages. In a quantum key distribution system, the two parties can detect the presence of a third party observing, or trying to detect the presence of, the key. As quantum mechanics finds that an observation of the key disturbs the key, the third party observation/eavesdropping on the key disturbs the key and thus introduces detectable anomalies.

SUMMARY

[003] In some example embodiments, there is provided an apparatus. The apparatus may include a beam splitter comprising an input, a first output, and a second output, wherein the input is configured to receive a laser pulse, the first output provides a signal of interest and the second output provides a reference signal; a modulator coupled to the first output, wherein the modulator modulates the signal of interest with coherent state information from which quantum key information is derivable; and a combiner including a first combiner input, a second combiner input, and a combiner output, wherein the first combiner input receives the reference signal and the second combiner input receives the signal of interest modulated with the coherent state information, wherein the combiner output provides an optical signal carrying the reference signal and the signal of interest modulated with the coherent state information.

[004] In some variations, one or more of the features disclosed herein including the following features can optionally be included in any feasible combination. The coherent state information may include a first random number, X, and a second random number, P, wherein first and second random numbers are selected from within a continuous Gaussian distribution having a zero mean and a predefined variance. The apparatus may further include a laser diode coupled to the input of the beam splitter . The apparatus may further include a pulse modulator coupled to the laser diode and the input of the beam splitter . The beam splitter may include a 99-to-l beam splitter . The modulator may include at least one of an in-phase and quadrature phase modulator or an intensity and phase modulator. The combiner may include a polarization rotator combiner. The apparatus may further include a delay line to provide a delay with respect to the signal of interest modulated with the coherent state information. The laser pulse may include a weak laser coherent laser pulse and a strong reference signal. The apparatus may further include a first detector to measure the signal of interest and a second detector to measure the reference signal. The reference signal may include a local oscillator signal. The beam splitter may comprise a tunable beam splitter. [005] In some example embodiments, there is provided an apparatus. The apparatus may include a polarization controller to correct polarization drift; a polarizing beam splitter, wherein the polarizing beam splitter includes a polarizing beam splitter input, a first polarizing beam splitter output, and a second polarizing beam splitter output, wherein the polarizing beam splitter input is coupled to an output of the polarization controller, and wherein the first polarizing beam splitter output provides a reference signal and the second polarizing beam splitter output provides a signal of interest; and an optical homodyne detection receiver including a first receiver input to receive the reference signal and a second receiver input to receive the signal of interest carrying the coherent state information, wherein the optical homodyne detection receiver measures at least one of the amplitude quadrature or the phase quadrature to provide quantum key information.

[006] In some variations, one or more of the features disclosed herein including the following features can optionally be included in any feasible combination. The signal of interest carrying the coherent state information may be delayed, such that the reference signal and the signal of interest enter the optical homodyne detection receiver at substantially the same time. The polarization controller may include a polarization compensator. The optical homodyne detection receiver may include a 90-degree hybrid coupled to at least one balance detector and at least one variable attenuator. The optical homodyne detection receiver may include a tunable beam splitter coupled to at least one balance detector. The apparatus may further include phase modulator coupled to the first polarizing beam splitter output, wherein the phase modulator measures at least the amplitude quadrature or the phase quadrature.

[007] The above-noted aspects and features may be implemented in systems, apparatuses, methods, and/or computer-readable media depending on the desired configuration. The details of one or more variations of the subject matter described herein are set forth in the accompanying drawings and the description below. Features and advantages of the subject matter described herein will be apparent from the description and drawings, and from the claims. In some exemplary embodiments, one of more variations may be made as well as described in the detailed description below and/or as described in the following features.

DESCRIPTION OF DRAWINGS

[008] In the drawings,

[009] FIG. 1 depicts an example of a system for continuous variable quantum key distribution, in accordance with some example embodiments;

[010] FIG. 2 depicts an example of an emitter photonic integrated circuit for continuous variable quantum key distribution, in accordance with some example embodiments;

[011] FIG. 3 depicts another example of an emitter photonic integrated circuit for continuous variable quantum key distribution, in accordance with some example embodiments; [012] FIG. 4 depicts an example of a receiver photonic integrated circuit for continuous variable quantum key distribution, in accordance with some example embodiments;

[013] FIGs. 5A-5B depict another example of a receiver photonic integrated circuit for continuous variable quantum key distribution, in accordance with some example embodiments;

[014] FIG. 6 depicts an example of a Mach-Zehnder Interferometer (MZI) modulator, in accordance with some example embodiments;

[015] FIGs. 7A-B depict example beam splitters, in accordance with some example embodiments;

[016] FIG. 8 depicts an example of a polarization compensator, in accordance with some example embodiments;

[017] FIG. 9 A depicts an example of an I and Q modulator, in accordance with some example embodiments;

[018] FIG. 9B depicts an example of an intensity and phase modulator, in accordance with some example embodiments;

[019] FIG. 10 depicts examples of an amplitude modulator and a phase modulator, in accordance with some example embodiments;

[020] FIG. 11 depicts examples of a polarization rotator combiners, in accordance with some example embodiments; [021 ] FIG. 12 depicts a block diagram of a homodyne detection system, in accordance with some example embodiments; and

[022] FIG. 13 another example of an apparatus, in accordance with some example embodiments.

[023] Like labels are used to refer to the same or similar items in the drawings.

DETAILED DESCRIPTION

[024] Continuous variable quantum key distribution (CV-QKD) technology may be used to distribute keys optically, such as over fiber or free space. However, some implementations of CV-QKD rely on discrete optical components, rather than integrated photonic circuits. When compared to integrated photonic circuits, discrete optical components implementations of CV-QKD may be sensitive to temperature variations (for example, uneven air flows in the vicinity of the container for the discrete devices), vibration, and background electromagnetic radiation, all of which can negatively contribute to the noise level of the CV-QKD system. Moreover, CV-QKD implementations using integrated photonic circuits may be more practical for mobile and/or hand-held devices, when compared to bulkier, discrete optical components system implementations.

[025] In some example embodiments, the subject matter disclosed herein relates to integrated photonic chip circuitry for quantum cryptography based on a CV-QKD protocol-based system. In CV-QKD, a quantum signal (the Signal) may be carried by a modulated weak coherent state (or squeezed states) via a weak laser. On the receiver side of CV-QKD, the quantum signal may be detected with optical coherent homodyne detection techniques by mixing the quantum signal and a reference signal, such as a local oscillator (LO). This creates correlated random data from which raw keying material/information may be derived.

[026] In some example embodiments, there is provided integrated photonic chip circuitry that includes tunable components, such as tunable couplers and attenuators to precisely balance the CV-QKD circuit, to at least compensate for fabrication variations and/or imperfections.

[027] In some example embodiments, the integrated photonic chip circuitry may include modulators that convert parallel electronic bit streams into an analog modulation of the Signal. Moreover, the analog phase/amplitude values of the modulated Signal may be produced at the clock rate of the parallel bit streams. This may, in some implementations, produce a large speed enhancement by reducing the bottlenecks associated with bit serialization and digital-to-analog conversion.

[028] To illustrate the CV-QKD protocol, the following provides an example process flow that can be implemented in the integrated photonic chip circuitry, in accordance with some example embodiments.

[029] In CV-QKD, key information may be carried with quantum state that can only be described with continuous variables. An example implementation of a CV-QKD protocol is the Gaussian Modulated Coherent State (GMCS) protocol. [030] In GMCS protocol, Alice (which refers to a sending user equipment) may generate two random numbers of X and P within a continuous Gaussian distribution having a zero mean and a predefined variance, V_A. A coherent laser pulse, such as a weak coherent laser pulse, may be generated with modulators, and may be encoded with a state, |X + iP>. The weak coherent laser pulse encoded with the state is the signal of interest (also referred to herein as the Signal). Alice sends via laser pulse this state to Bob (which refers to a receiving user equipment) along with a strong reference signal, such as a local oscillator. On the receiver side, Bob may measure either the X or P quadrature of the weak coherent state randomly with for example optical homodyne detection, although the X and P quadratures may be measured at the same time as well. This creates correlated random data, from which raw keying material information may be derived.

[031] Next, Bob informs Alice about the quadrature Bob picked for the measurement. This is referred to as a reverse reconciliation protocol, which may be more efficient than direct reconciliation at low channel transmission efficiency. Direct reconciliation refers to the case when Alice informs Bob about the quadrature. Alice and Bob now each have (or share) a set of correlated Gaussian variables, which form the key information. Subsequent communication between Alice and Bob over an authenticated open channel may be required to evaluate channel parameters, such as the noise level of the communication, and to further derive secure key based on the those channel parameters. [032] In some example embodiments, integrated photonic chip CV-QKD circuitry may include an optical emitter (for example, for Alice) and/or an optical receiver (for example, for Bob).

[033] FIG. 1 depicts an example of a system 100, in accordance with some example embodiments. The system 100 may include a first user equipment 1 10 (labeled Alice), which may further include controlling electronics 112 to control and/or drive photonic chip circuitry 114 for transmitting via optical fiber 107. System 100 may further include a second user equipment 160 (labeled Bob). Second user equipment 160 may include controlling electronics 162 to control/drive a photonic chip 164 for receiving via optical fiber 107. The channel 105 (labeled classic channel) may be required for QKD systems in order to provide for key reconciliation (for example, Bob may use this channel to inform Alice regarding the quadrature he measured, the noise level, and/or the like) and/or for error correction (for example, Alice may also exchange error correction information over channel 105).

[034] Although Alice/user equipment 1 10 is described in some of the examples described herein as a transmitter/emitter, Alice/user equipment 110 may also include a receiver as well. Moreover, although Bob/user equipment 160 is described in some of the examples described herein as a receiver, Bob/user equipment 160 may also include a transmitter/emitter as well.

[035] User equipment 1 10 and 160 may be mobile and/or portable, although stationary implementations may be used as well. The photonic chips 1 14 and 164 may process optical signals in accordance with the CV-QKD protocol, in accordance with some example embodiments. Additional driving and/or controlling circuitry may be provided by controlling circuitry 112 and/or controlling circuitry 162. Portions of controlling circuitry 112 may be implemented on the same or different chip as photonic chip 114, and portions of controlling circuitry 162 may be implemented on the same or different chip as photonic chip 164. Each of user equipment 1 10 and 160 may include (or be coupled to) a random number generator, such as a quantum random number generator. Each of user equipment 110 and 160 may include (or be coupled to) a central processing unit (CPU), The CPU may provide control of user equipment 1 10/160 and enable execution of the CV-QKD protocol with parameter analysis and key generation.

[036] FIG. 2 depicts an example of an emitter 200, in accordance with some example embodiments. The emitter 200 may be used as Alice's transmitter at photonic chip circuitry 114, although the emitter may also be included in photonic chip circuitry 164 to enable transmission at user equipment 160 to user equipment 110 as well.

[037] Emitter 200 may include a laser diode 205, a laser pulse modulator 210, one or more beam splitters 230A-C (labeled BS), a variable attenuator 260, an in-phase and quadrature phase (I and Q) modulator 265, photodiode detectors 272 and 274, a delay line 280, and a polarization rotator combiner 285.

[038] Laser diode 205 may generate a laser that is modulated by pulse modulator 210 to provide laser pulses with a given strength, pulse length, and repetition rate. In the case of the CV-QKD protocol for example, the pulse strength output by the pulse modulator 210 may be in the range of about 10⁷ to 10⁸ photons/pulse for a pulse width of 0.5 nanoseconds (ns). Moreover, the optical power for the laser diode 205 may be in the range of about 2.5 to 25 milliwatts (mW) for a 1550 nanometer (nm) laser, although other powers and/or wavelengths may be used as well. In the example of FIG. 2, pulse modulator may operate at a frequency of 1 GHz.

[039] Although the example of FIG. 2 refers to the pulse modulator 210, laser diode 205 may also be driven directly in pulse mode. When this is the case, the pulse modulator 210 may be omitted from the emitter 200 of FIG. 2.

[040] The maximum pulse width for system 200 may be limited by (or dependent upon) the length of the delay line 280. For a 10 nanosecond laser pulse, a delay line of 3.4 meters may be required for a silicon (Si) transmission line/optical waveguide, and 8.3 meters may be required for a silicon nitride transmission line/optical waveguide in for example a chip of about 5 centimeters. If long laser pulses of about 50 to 200 nanosecond are used, the delay line 280 chip circuitry may be replaced, or augmented with, for example a length of actual optical fiber to obtain the desired time delay.

[041] In some example embodiments, pulse modulator 210 and/or variable attenuator 260 may be implemented on integrated photonic chip circuitry comprising a Mach-Zehnder Interferometer (MZI) modulator, examples of which are described further below with respect to FIG. 6. [042] Emitter 200 may include a tunable beam splitter, such as tunable 99/1 beam splitter 230A, to provide separation between the local oscillator (LO) path including the LO 290 and the signal path including the Signal 292. This separation may have a separation ratio of about 99 to 1, although other values may be used as well to provide a portion to the LO path and another portion to the signal path.

[043] An output of tunable 99/1 beam splitter 230A may be coupled to the variable attenuator 260, IQ modulator 265, and beam splitter 230C, which has a first output coupled to the detector 274 and a second output coupled to the delay line 280. This path represents the Signal path as noted above.

[044] An output of the tunable 99/1 beam splitter 23 OA may couple to beam splitter 230B, outputs of which couple to detector 272 and polarization rotator combiner 285. This path represents the LO path, as noted above.

[045] Although FIG. 2 depicts a tunable 99/1 beam splitter, other types of beam splitter may be used as well as other types of devices, such as a fixed 99/1 directional coupler described below with respect to FIG. 3.

[046] Beam splitters 230B and 230C may be implemented as fixed directional couplers to split a portion of the laser light (for example, 10% although other values may be implemented as well) to the corresponding coupled detector 272 or 274. The first detector 272 (which is coupled to the output of beam splitter 230B) and the second detector 274 (which is coupled to the output of beam splitter 230C) may be used to monitor the power of the LO (by detector 272) and the Signal (by detector 274). The photodiode detectors 272 and 274 may monitor the Signal 292 and LO 290. The photodiode detectors 272 and 274 may provide feedback in order control the laser diode, pulse modulator, variable attenuator, and/or beam splitters via control lines 296A-B.

[047] Beam splitters 230B and 230C may also be implemented as tunable beam splitters, such as a tunable 50/50 beam splitter as shown at FIG. 7B, although other rations may be implemented at the tunable beam splitter. When this is the case, only one input will be connected and the splitting ratio of the tunable 50/50 BS can be continuously tuned from 100/0 to 0/100.

[048] IQ modulator 265 may modulate the Signal pulse with the desired X and P quadratures as noted above. The X and P values may be picked randomly for each pulse from a Gaussian distribution with zero mean and predefined variance, V_A- FIG. 9A (which is described below) depicts an example implementation of the IQ modulator.

[049] Delay line 280 may introduce a temporal separation between the Signal 292 and LO 290. The length of the delay line 280 may range from 10 centimeters to several meters (for example, 5 meters), which may introduce a time delay of about 1 to 50 nanosecond with a silicon waveguide and about 0.5 to 25 nanoseconds with silicon nitride waveguide. For running the CV-QKD protocol at low leakage between the LO and the Signal, the time delay may need to be no less than 4 times of the laser pulse width. For example, if the laser pulse is modulated at 1 GHz, then the pulse width will be about 0.5 nanoseconds and the time delay between LO and Signal will be at least 2 nanoseconds. The delay line 280 may be in this example about 17 centimeters with a silicon waveguide and about 42 centimeters with a silicon nitride waveguide. FIG. 3 described further below depicts an example implementation for the delay line 280.

[050] Polarization rotator combiner 285 may combine the Signal 292 and LO 290 into a single optical waveguide for transmission via fiber, free space, and/or the like. The polarization rotator combiner 285 may rotate the polarization of one of the inputs (for example, either Signal 292 or LO 290) by 90 degrees and then combine the two inputs (for example, Signal 292 and LO 290) together into a single output. FIG. 11 described further below depicts example implementations of the polarization rotator combiner 285.

[051] FIG. 3 depicts another example of an emitter 300, in accordance with some example embodiments. The emitter 300 may be similar to emitter 200 in some respects but may include additional features as described below.

[052] Emitter 300 may include an intensity phase modulator 305 for modulating the output of the tunable beam splitter 230. Emitter 300 may also include a dual-rail polarization compensator 310. Moreover, the emitter 300 may place some of the circuitry in separate chips 390, 392, or 394. For example, polarization rotator combiner 285 (may be placed on chip 390 that is separate from delay line 280 chip 392 and/or chip 394. The separate chip may allow the photonics portions to be manufactured in a different process than the polarization rotator combiner and/or delay line.

[053] In the example of FIG. 3, intensity phase modulator 305 may generate the Signal. For example, the X and P values may be converted to intensity and phase information according to the CV-QKD protocol, in accordance with some example embodiments. Intensity phase modulator 305 may include an amplitude modulator and a phase modulator for intensity and phase modulation for phase. An example implementation of the intensity phase modulator 305 is described below with respect to FIG. 9B.

[054] Dual-rail polarization compensator 310 may be employed to pre- compensate polarization changes over the transmission path. An example on-chip implementation of dual-rail polarization compensator 310 is shown at FIG. 8, where a Mach-Zehnder Interferometer polarization compensator is shown.

[055] Although FIG. 3 depicts the laser diode 205 on the same chip 394 as other components, such as the pulse modulator and the like, laser diode 205 may be implemented on separate chip (for example, using the same or different semiconductor process technology) and thus coupled to the other components, such as the pulse modulator, beam splitter, and the like. For example, if laser diode 205 may be separated to reduce the impact of heat (which a laser diode can generate) on other components. This separated arrangement may provide enhanced temperature stability and/or low noise performance.

[056] In the example of FIG. 3, a separate delay line chip 392 may extend the length of the line and thus the delay. For instance, if a long delay line is not available in an indium phosphide -based material system due to high attenuation, then a separate delay line chip may be fabricated with chips based on for example silicon, silicon oxide, silicon nitride, and/or other material, which may be less lossy when compared to indium phosphide. Additional delay may be provided by actual lengths of fiber as noted above.

[057] FIG. 4 depicts an example of a receiver 400, in accordance with some example embodiments. The receiver 400 may be used as a receiver at photonic chip circuitry 1 14, although the receiver may also be included in photonic chip circuitry 164 to enable reception at user equipment 160 as well. Receiver 400 chip may be used in connection with CV-QKD protocol in accordance with some example embodiments.

[058] Receiver 400 may include a polarization controller 405 and a polarizing beam splitter 410 (PBS). On the LO path, the receiver may further include a phase modulator 420, a delay line 430, a beam splitter 435 (BS 3), and a detector 440 (Detector 3). On the Signal path, the receiver may further include a 50/50 beam splitter 450 for mixing the LO and the Signal. The outputs of the 50/50 beam splitter 450 may be coupled to variable attenuators 455/456, whose outputs couple to photodiode detectors 465 and 466 (labeled balanced detectors).

[059] Polarization controller 405 may correct polarization drift in the optical fiber that may have occur prior to feeding the received pulse(s) to polarizing beam splitter 410 for separation. The detector 440 may provide feedback for applying a proper amount of this polarization correction. Although FIG. 4 depicts a polarization controller 405, a dual-rail polarization compensator 510 (as described below with respect to FIG. 5A) may be used instead for compensation. Moreover, polarization compensation may be performed at the receiver, transmitter, or a combination of both. [060] Polarizing beam splitter 410 may separate the LO and the Signal according to their polarization. The delay line 430 may be configured to provide the same or similar amount of delay as the delay provided by delay line 280 at the transmitter/emitter. As such, both the LO and the Signal will enter, at substantially the same time, the homodyne detection portion of receiver 400, such as beam splitter 450, two variable attenuators455/456, and balanced detectors 465/466. The timing accuracy may be determined by the length difference of the delay lines between the emitter chip and the receiver chip. It may be on the order of about less than 2% of the pulse width, with 0.5% length difference between emitter and receiver chip. The tolerance with respect to the time difference (between the LO and Signal) entering at substantially the same time may be about less than 10% of the pulse width. Examples of polarizing beam splitter on chip are described Opt. Express 19, page 18614, (201 1), Optics Express, 19, page 10940 (2011). The phase modulator 420 in the LO path may electrically vary phase continuously from for example 0 to 2π. A random selection of phase values between 0 and π/2 may thus enable Bob/receiver to measure randomly either the X or P quadrature.

[061] The delay line 430 on the LO path at receiver 400 may have the same or substantially similar length as that on the signal path at the emitter side, as noted above.

[062] The homodyne detection portion may include the 50/50 beam splitter 450, two variable attenuators 455/456, and balanced detectors 465/466. The two variable attenuators may compensate for any fabrication imperfections of 50/50 beam splitters. The difference of the balanced detectors may be taken and then fed into an amplifier system 470 for processing, which is described further below with respect to FIG. 12.

[063] Detector 440 may be used to synchronize the incoming signal with the receiver 400 (for example, Bob's) electronics circuitry and to monitor the incoming pulse(s) for system stability. Detector 440 may also enable feedback control of polarization controller 405, polarization compensator 510 (which is described below with respect to FIG. 5A), and/or polarization compensator 310 (which is on the emitter/ Alice's chip).

[064] FIG. 5A depicts another example of a receiver 500, in accordance with some example embodiments. The receiver 500 may be similar to receiver 400 in some respects but may include additional features as described below.

[065] Receiver 500 may include separate chips 594, the polarization beam splitter 590, and/or delay line 592. The use of separate chips 590-594 may enable fabrication using the same and/or different semiconductor manufacturing processes. Receiver 500 may also include a dual-rail polarization compensator 510 and a tunable 50/50 beam splitter 520 in place of the 50/50 beam splitter 450 and variable attenuator 455/456. The dual-rail polarization compensator may be used instead of the polarization controller 405. An example design of polarization compensator is depicted at FIG. 8 (which is described further below). The tunable 50/50 beam splitter 520 may be implemented as described below with respect to FIG. 7B, in which case the precise splitting ratio of 50/50 can be provided by controlling the phase shifter(s). [066] FIG. 5B depicts another example of a receiver 599, in accordance with some example embodiments. Receiver 599 may be similar to receiver 500 in some respects but may include additional features.

[067] Receiver 599 may include a 90° optical hybrid 530 and two pairs of balanced detectors 540 A-B and 542 A-B, in accordance with some example embodiments. The 90° optical hybrid 530 may be implemented on-chip as a 4x4 multimode interference (MMI) coupler. Each pair of balanced detectors may be similar to the balanced detectors 465/466 described above with respect to FIG. 4. In the example of FIG. 5B, there may be no need for a phase modulator on the LO path as the two pairs of balanced detectors (after 90° optical hybrid) may measure X and P quadratures simultaneously. With both X and P measured, the parameter assessment and key distillation algorithm in the CV-QKD protocol may be modified accordingly. Four variable attenuators may be employed to compensate the imperfection of the splitting ratios of the 4x4 MMI coupler. The four variable attenuators may also compensate for any unwanted light leakage from the LO to Signal.

[068] FIG. 6 depicts two examples 610A-B of a one -by-one (lxl) Mach-

Zehnder Interferometer (MZI) modulator, in accordance with some example embodiments. The MZI modulator may be implemented as a pulse modulator, a variable attenuator, and/or an amplitude modulator, in accordance with some example embodiments. Each of the MZI modulators 610A-B may include beam splitting and combining couplers, which may implemented as Y-branches, direct couplers (DCs), or 2x2 multimode interference (MMI) couplers. The splitting ratios of these internal couplers may be about 50/50. The phase difference (Δφ) may be configured between about 0 and 2π to control output intensity, and the phase difference (Δφ) may be introduced on one arm (as shown at 61 OA) or both arms (as shown at 61 OB). The phase changes may be based on either quantum-confined stark effect (indium phosphide) or traveling-wave linear phase modulation (indium phosphide and silicon).

[069] FIG. 7A depicts an example implementation of a tunable 99/1 beam splitter 700, in accordance with some example embodiments. The phase difference between the two arms (Δφ) may be continuously tuned and the splitting ratio may be controlled precisely from about 100/0 to about 96/4. The couplers inside may be 99/1 directional couplers (each labeled DC).

[070] FIG. 7B depicts an example implementation of a tunable 50/50 beam splitter 799, in accordance with some example embodiments. The tunable 50/50 beam splitter 799 may include couplers, such as 1x2 and/or 2x2 couplers, to provide the 50/50 splitting ratio. The couplers may be implemented as Y-branches, DCs, or MMI couplers. Phase difference (Δφ) between 0 and 2π can be introduced either on one arm or on both arms. The tunable 50/50 beam splitter 799 may also be used generally as a beam splitter.

[071] FIG. 8 depicts an example of an on-chip dual-rail polarization compensator 800, in accordance with some example embodiments. Dual-rail polarization compensator 800 may comprise a 2x2 MZI modulator including three phase shifters. The three phase shifters may be included on one or both arms. Dual-rail polarization compensator 800 may be deployed at the emitter or receiver, in accordance with some example embodiments. The couplers included in the dual-rail polarization compensator 800 may be direct couplers or 2x2 MMI couplers with splitting ratio of 50/50.

[072] FIG. 9A depicts an IQ modulator with two amplitude modulators and a π/2 phase modulator, in accordance with some example embodiments. The two amplitude modulators are used to modulate X and P respectively, and the π/2 phase modulator mixes the output signal.

[073] FIG. 9B depicts an intensity phase modulator with amplitude modulator and phase modulator for intensity and phase modulation, respectively.

[074] FIG. 10 depicts two examples of digital modulators 1 100A and 1100B, in accordance with some example embodiments. FIG. 10 may, in accordance with some example embodiments, provide modulators that convert parallel electronic bit streams into an analog modulation of the Signal. The analog phase/amplitude values of the modulated Signal may be produced at the clock rate of the parallel bit streams. To illustrate further, digital modulator 1100A comprises a digital-to-analog phase modulator, and digital modulator 1 100B comprises a digital-to-analog amplitude modulator. In digital modulators 1 100A and 1 100B, phase changes are introduced by multiple phase shifters. The numbers of phase shifters for each modulator may be increased according to the binary length of the driving digital signal. For example, level 1 may determine the minimum modulation resolution, and each additional level may double the on-chip physical length of the previous level for modulation effect of corresponding digital binary. The corresponding modulation plots on the right show examples having three binary numbers (which corresponds to three phase shifters). The modulators 1 100A-B may be driven with digital output directly, so there is no need for a digital-to-analog converter and voltage driver in the driving electronics. The modulators disclosed herein may be implemented as analog or digital ones.

[075] FIG. 11 depicts examples polarization rotator combiners 1200A-D, in accordance with some example embodiments. Examples of polarization rotator combiners are described at Hiroshi Yamazaki, Takashi Yamada, Takashi Goh, and Akimasa Kaneko, "PDM-QPSK Modulator With a Hybrid Configuration of Silica PLCs and LiNbO Phase Modulators," J. Lightwave Technol. 29, 721-727 (2011), Daoxin Dai and John E. Bowers, "Novel concept for ultracompact polarization splitter-rotator based on silicon nanowires," Opt. Express 19, 10940-10949 (201 1), and Taillaert, D, "A compact two-dimensional grating coupler used as a polarization splitter," Photonics Technology Letters, IEEE (Volume: 15, Issue: 9 ), 1249 - 1251 , September 2003.

[076] FIG. 12 depicts a block diagram of a homodyne detection system 1300, in accordance with some example embodiments. The two balanced detectors 1302A-B may be fabricated on an integrated photonic chip. The difference between the two balanced detectors may be provided to a transimpedance amplifier 1304 (TIA), which may provide an output to an operational amplifier 1306 (OP AMP). The amplifier 1306 (including associated circuitry/components) may be fabricated on chip in compatible foundries or fabricated into driver electronics together with analog-to-digital converter 1308 (ADC) and other digital signal processor circuitry 1310 (DSP). The amplifiers 1304 and 1306 may be implemented on the same chip as the optical components 1302A as well as other optical components disclosed herein.

[077] The CV-QKD protocol may be implemented between user equipment 110/Alice and user equipment 160/Bob with combined polarization and time multiplexing, which may provide an increase in signal-to-noise ratio. The time multiplexing may be provided by delay lines, in accordance with some example embodiments. Polarization multiplexing may be provided by polarization rotator combiner (on the emitter chip) and the polarization beam splitter (on the receiver chip).

[078] Although the emitter and receiver disclosed herein may be used for quantum key distribution, the emitter and receiver may enable communications for other reasons as well and carry other protocols including multi-level quadrature amplitude modulation, quadrature phase shift keying, differential quadrature phase shift keying, and/or the like. Moreover, some of the optical elements disclosed herein may be configured to operate in the GHz range (for example, about 1- 40 GHz). However, depending on the noise requirement and key processing speed, the clock frequency of the CV-QKD protocol may be in the range of 10 MHz - 10 GHz, although other rates may be implemented as well. For example, the optical homodyne detection system disclosed herein may be configured to have a bandwidth of 3 times of the clock frequency to minimize detector pulse overlapping, although other bandwidth to clock frequency rations maybe implemented as well. [079] Regarding free space transmission, the integrated photonic chip circuitry including the emitter may operate as a free space transmitter (for example, free space CV-QKD at visible wavelengths). For example, silicon nitride may be the material used for such free space transmission, although other materials may be implemented as well. In the free space case, an external collimator may collimate and focus the laser beam. On the receiver side, if high efficiency free-space-to-chip coupling is not available, discrete devices may be employed.

[080] FIG. 13 depicts an example of an apparatus 369, in accordance with some example embodiments. The apparatus 369 may comprise a user equipment, such as a smart phone, a cell phone, a wearable radio device, and/or any other radio based device including for example a wireless access point/base station.

[081] In some example embodiments, apparatus 369 may also include a radio communication link to a cellular network, or other wireless network. The apparatus 369 may include at least one antenna 12 in communication with a transmitter 14 and a receiver 16. Alternatively transmit and receive antennas may be separate.

[082] In some example embodiments, the transmitter 14 may include the integrated photonic chip circuitry for providing CV-QKD protocol-based transmission as disclosed herein. For example, photonic chip 1 14, emitter 200, and/or emitter 300 may be included in transmitter 14.

[083] In some example embodiments, the receiver 16 may include the integrated photonic chip circuitry for providing CV-QKD protocol-based reception as disclosed herein. For example, photonic chip 164, receiver 400, receiver 500, and/or receiver 599 may be included in receiver 16.

[084] The apparatus 369 may also include a processor 20 configured to provide signals to and from the transmitter and receiver, respectively, and to control the functioning of the apparatus. Processor 20 may be configured to control the functioning of the transmitter and receiver by effecting control signaling via electrical leads to the transmitter and receiver. Likewise, processor 20 may be configured to control other elements of apparatus 130 by effecting control signaling via electrical leads connecting processor 20 to the other elements, such as a display or a memory. The processor 20 may, for example, be embodied in a variety of ways including circuitry, at least one processing core, one or more microprocessors with accompanying digital signal processor(s), one or more processor(s) without an accompanying digital signal processor, one or more coprocessors, one or more multi-core processors, one or more controllers, processing circuitry, one or more computers, various other processing elements including integrated circuits (for example, an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), and/or the like), or some combination thereof. Apparatus 369 may include a location processor and/or an interface to obtain location information, such as positioning and/or navigation information. Accordingly, although illustrated in as a single processor, in some example embodiments the processor 20 may comprise a plurality of processors or processing cores. [085] Signals sent and received by the processor 20 may include signaling information in accordance with an air interface standard of an applicable cellular system, and/or any number of different wireline or wireless networking techniques, comprising but not limited to Wi-Fi, wireless local access network (WLAN) techniques, such as, Institute of Electrical and Electronics Engineers (IEEE) 802.11 , 802.16, and/or the like. In addition, these signals may include speech data, user generated data, user requested data, and/or the like.

[086] The apparatus 369 may be capable of operating with one or more air interface standards, communication protocols, modulation types, access types, and/or the like. For example, the apparatus 369 and/or a cellular modem therein may be capable of operating in accordance with various first generation (1G) communication protocols, second generation (2G or 2.5G) communication protocols, third-generation (3G) communication protocols, fourth-generation (4G) communication protocols, Internet Protocol Multimedia Subsystem (IMS) communication protocols (for example, session initiation protocol (SIP) and/or the like. For example, the apparatus 369 may be capable of operating in accordance with 2G wireless communication protocols IS- 136, Time Division Multiple Access TDMA, Global System for Mobile communications, GSM, IS- 95, Code Division Multiple Access, CDMA, and/or the like. In addition, for example, the apparatus 369 may be capable of operating in accordance with 2.5G wireless communication protocols General Packet Radio Service (GPRS), Enhanced Data GSM Environment (EDGE), and/or the like. Further, for example, the apparatus 369 may be capable of operating in accordance with 3G wireless communication protocols, such as, Universal Mobile Telecommunications System (UMTS), Code Division Multiple Access 2000 (CDMA2000), Wideband Code Division Multiple Access (WCDMA), Time Division-Synchronous Code Division Multiple Access (TD-SCDMA), and/or the like. The apparatus 130 may be additionally capable of operating in accordance with 3.9G wireless communication protocols, such as, Long Term Evolution (LTE), Evolved Universal Terrestrial Radio Access Network (E-UTRAN), and/or the like. Additionally, for example, the apparatus 369 may be capable of operating in accordance with 4G wireless communication protocols, such as LTE Advanced and/or the like as well as similar wireless communication protocols that may be subsequently developed.

[087] It is understood that the processor 20 may include circuitry for implementing audio/video and logic functions of apparatus 369. For example, the processor 20 may comprise a digital signal processor device, a microprocessor device, an analog-to-digital converter, a digital-to-analog converter, and/or the like. Control and signal processing functions of the apparatus 369 may be allocated between these devices according to their respective capabilities. The processor 20 may additionally comprise an internal voice coder (VC) 20a, an internal data modem (DM) 20b, and/or the like. Further, the processor 20 may include functionality to operate one or more software programs, which may be stored in memory. In general, processor 20 and stored software instructions may be configured to cause apparatus 369 to perform actions. For example, processor 20 may be capable of operating a connectivity program, such as, a web browser. The connectivity program may allow the apparatus 369 to transmit and receive web content, such as location-based content, according to a protocol, such as, wireless application protocol, wireless access point, hypertext transfer protocol, HTTP, and/or the like.

[088] Apparatus 369 may also comprise a user interface including, for example, an earphone or speaker 24, a ringer 22, a microphone 26, a display 28, a user input interface, and/or the like, which may be operationally coupled to the processor 20. The display 28 may, as noted above, include a touch sensitive display, where a user may touch and/or gesture to make selections, enter values, and/or the like. The processor 20 may also include user interface circuitry configured to control at least some functions of one or more elements of the user interface, such as, the speaker 24, the ringer 22, the microphone 26, the display 28, and/or the like. The processor 20 and/or user interface circuitry comprising the processor 20 may be configured to control one or more functions of one or more elements of the user interface through computer program instructions, for example, software and/or firmware, stored on a memory accessible to the processor 20, for example, volatile memory 40, non-volatile memory 42, and/or the like. The apparatus 369 may include a battery for powering various circuits related to the mobile terminal, for example, a circuit to provide mechanical vibration as a detectable output. The user input interface may comprise devices allowing the apparatus 369 to receive data, such as, a keypad 30 (which can be a virtual keyboard presented on display 28 or an externally coupled keyboard) and/or other input devices. [089] Moreover, the apparatus 369 may include a short-range radio frequency (RF) transceiver and/or interrogator 64, so data may be shared with and/or obtained from electronic devices in accordance with RF techniques. The apparatus 369 may include other short-range transceivers, such as an infrared (IR) transceiver 66, a Bluetooth (BT) transceiver 68 operating using Bluetooth wireless technology, a wireless universal serial bus (USB) transceiver 70, and/or the like. The Bluetooth transceiver 68 may be capable of operating according to low power or ultra-low power Bluetooth technology, for example, Wibree, Bluetooth Low-Energy, and other radio standards. In this regard, the apparatus 369 and, in particular, the short-range transceiver may be capable of transmitting data to and/or receiving data from electronic devices within proximity of the apparatus, such as within 10 meters. The apparatus 369 including the Wi-Fi or wireless local area networking modem may also be capable of transmitting and/or receiving data from electronic devices according to various wireless networking techniques, including 6LoWpan, Wi-Fi, Wi-Fi low power, WLAN techniques such as IEEE 802.11 techniques, IEEE 802.15 techniques, IEEE 802.16 techniques, and/or the like.

[090] The apparatus 369 may comprise memory, such as, a subscriber identity module (SIM) 38, a removable user identity module (R-UIM), and/or the like, which may store information elements related to a mobile subscriber. In addition to the SIM, the apparatus 369 may include other removable and/or fixed memory. The apparatus 369 may include volatile memory 40 and/or non- volatile memory 42. For example, volatile memory 40 may include Random Access Memory (RAM) including dynamic and/or static RAM, on-chip or off-chip cache memory, and/or the like. Non-volatile memory 42, which may be embedded and/or removable, may include, for example, read-only memory, flash memory, magnetic storage devices, for example, hard disks, floppy disk drives, magnetic tape, optical disc drives and/or media, non-volatile random access memory (NVRAM), and/or the like. Like volatile memory 40, non-volatile memory 42 may include a cache area for temporary storage of data. At least part of the volatile and/or non-volatile memory may be embedded in processor 20. The memories may store one or more software programs, instructions, pieces of information, data, and/or the like which may be used by the apparatus for performing the CV-QKD-protocol operations described herein. The memories may comprise an identifier, such as an international mobile equipment identification (IMEI) code, capable of uniquely identifying apparatus 369. The functions may include one or more of the operations disclosed herein with respect to the receiver or emitter. The memories may comprise an identifier, such as an international mobile equipment identification (IMEI) code, capable of uniquely identifying apparatus 369. In the example embodiment, the processor 20 may be configured using computer code stored at memory 40 and/or 42 to provide the CV-QKD- protocol operations described herein.

[091] Some of the embodiments disclosed herein may be implemented in software, hardware, application logic, or a combination of software, hardware, and application logic. The software, application logic, and/or hardware may reside in memory 40, the control apparatus 20, or electronic components disclosed herein, for example. In some example embodiments, the application logic, software or an instruction set is maintained on any one of various conventional computer-readable media. In the context of this document, a "computer-readable medium" may be any non- transitory media that can contain, store, communicate, propagate or transport the instructions for use by or in connection with an instruction execution system, apparatus, or device, such as a computer or data processor circuitry. A computer-readable medium may comprise a non-transitory computer-readable storage medium that may be any media that can contain or store the instructions for use by or in connection with an instruction execution system, apparatus, or device, such as a computer. Furthermore, some of the embodiments disclosed herein include computer programs configured to cause the CV- QKD-protocol operations described herein.

[092] Without in any way limiting the scope, interpretation, or application of the claims appearing below, a technical effect of one or more of the example embodiments disclosed herein is a compact on chip design, smaller foot print, and/or lower noise.

[093] The subject matter described herein may be embodied in systems, apparatus, methods, and/or articles depending on the desired configuration. For example, the systems, apparatus, methods, and/or articles described herein can be implemented using one or more of the following: electronic components such as transistors, inductors, capacitors, resistors, and the like, a processor executing program code, an application- specific integrated circuit (ASIC), a digital signal processor (DSP), an embedded processor, a field programmable gate array (FPGA), and/or combinations thereof. These various example embodiments may include implementations in one or more computer programs that are executable and/or interpretable on a programmable system including at least one programmable processor, which may be special or general purpose, coupled to receive data and instructions from, and to transmit data and instructions to, a storage system, at least one input device, and at least one output device. These computer programs (also known as programs, software, software applications, applications, components, program code, or code) include machine instructions for a programmable processor, and may be implemented in a high-level procedural and/or object-oriented programming language, and/or in assembly/machine language. As used herein, the term "machine -readable medium" refers to any computer program product, computer-readable medium, computer-readable storage medium, apparatus and/or device (for example, magnetic discs, optical disks, memory, Programmable Logic Devices (PLDs)) used to provide machine instructions and/or data to a programmable processor, including a machine-readable medium that receives machine instructions. Similarly, systems are also described herein that may include a processor and a memory coupled to the processor. The memory may include one or more programs that cause the processor to perform one or more of the operations described herein.

[094] Although a few variations have been described in detail above, other modifications or additions are possible. In particular, further features and/or variations may be provided in addition to those set forth herein. Moreover, the example embodiments described above may be directed to various combinations and subcombinations of the disclosed features and/or combinations and subcombinations of several further features disclosed above. In addition, the logic flow depicted in the accompanying figures and/or described herein does not require the particular order shown, or sequential order, to achieve desirable results. Other embodiments may be within the scope of the following claims.

Claims

WHAT IS CLAIMED:

1. An apparatus comprising:

a beam splitter comprising an input, a first output, and a second output, wherein the input is configured to receive a laser pulse, the first output provides a signal of interest and the second output provides a reference signal;

a modulator coupled to the first output, wherein the modulator modulates the signal of interest with coherent state information from which quantum key information is derivable; and

a combiner including a first combiner input, a second combiner input, and a combiner output, wherein the first combiner input receives the reference signal and the second combiner input receives the signal of interest modulated with the coherent state information, wherein the combiner output provides an optical signal carrying the reference signal and the signal of interest modulated with the coherent state information.

2. The apparatus of claim 1 , wherein the coherent state information comprises a first random number, X, and a second random number, P, wherein first and second random numbers are selected from within a continuous Gaussian distribution having a zero mean and a predefined variance.

3. The apparatus of claims 1-2 further comprising:

a laser diode coupled to the input of the beam splitter .

4. The apparatus of claims 1-3 further comprising:

a pulse modulator coupled to the laser diode and the input of the beam splitter.

5. The apparatus of claims 1-4, wherein the beam splitter comprises a 99-to-l beam splitter.

6. The apparatus of claims 1-5, wherein the modulator comprises at least one of an in-phase and quadrature phase modulator or an intensity and phase modulator.

7. The apparatus of claims 1-6, wherein the combiner comprises a polarization rotator combiner.

8. The apparatus of claims 1-7 further comprising:

a delay line to provide a delay with respect to the signal of interest modulated with the coherent state information.

9. The apparatus of claims 1-8, wherein the laser pulse comprises a weak laser coherent laser pulse and a strong reference signal.

10. The apparatus of claims 1-9 further comprising:

a first detector to measure the signal of interest; and

a second detector to measure the reference signal.

11. The apparatus of claims 1-10, wherein the reference signal comprises a local oscillator signal.

12. The apparatus of claims 1-11, wherein the beam splitter comprises a tunable beam splitter.

13. An apparatus comprising:

a polarization controller to correct polarization drift; a polarizing beam splitter, wherein the polarizing beam splitter includes a polarizing beam splitter input, a first polarizing beam splitter output, and a second polarizing beam splitter output, wherein the polarizing beam splitter input is coupled to an output of the polarization controller, and wherein the first polarizing beam splitter output provides a reference signal and the second polarizing beam splitter output provides a signal of interest; and

an optical homodyne detection receiver including a first receiver input to receive the reference signal and a second receiver input to receive the signal of interest carrying coherent state information, wherein the optical homodyne detection receiver measures at least one of the amplitude quadrature or the phase quadrature to provide quantum key information.

14. The apparatus of claim 13, wherein the signal of interest carrying the coherent state information is delayed, such that the reference signal and the signal of interest enter the optical homodyne detection receiver at substantially the same time.

15. The apparatus of claims 13-14, wherein the polarization controller comprises a polarization compensator.

16. The apparatus of claims 13-15, wherein the optical homodyne detection receiver comprises a 90-degree hybrid coupled to at least one balance detector and at least one variable attenuator.

17. The apparatus of claims 13-16, wherein the optical homodyne detection receiver comprises a tunable beam splitter coupled to at least one balance detector.

18. The apparatus of claims 13-17 further comprising:

a phase modulator coupled to the first polarizing beam splitter output, wherein the phase modulator measures at least the amplitude quadrature or the phase quadrature.

19. A method comprising:

receiving, at an input of a beam splitter, a laser pulse, wherein the beam splitter further comprises a first output and a second output, wherein the first output provides a signal of interest and the second output provides a reference signal;

modulating, by a modulator coupled to the first output, a signal of interest, wherein the modulator modulates the signal of interest with coherent state information from which quantum key information is derivable; and

combining, by a combiner including a first combiner input, a second combiner input, and a combiner output, the reference signal received via the first combiner input and the signal of interest received via the second combiner input, wherein the combiner output provides an optical signal carrying the reference signal and the signal of interest modulated with the coherent state information.

20. The method of claim 19, wherein the coherent state information comprises a first random number, X, and a second random number, P, wherein first and second random numbers are selected from within a continuous Gaussian distribution having a zero mean and a predefined variance.

21. The method of claims 19-20, wherein the receiving further comprises: receiving the laser pulse from a laser diode coupled to the input of the beam splitter.

22. The method of claims 19-20, wherein the modulator comprises a pulse modulator coupled to the laser diode and the input of the beam splitter .

23. The method of claims 19-22, wherein the beam splitter comprises a 99-to-l beam splitter .

24. The method of claims 19-23, wherein the modulator comprises at least one of an in-phase and quadrature phase modulator or an intensity and phase modulator.

25. The method of claims 19-24, wherein the combiner comprises a polarization rotator combiner.

26. The method of claims 19-25 further comprising:

delaying, by a delay line, the signal of interest modulated with the coherent state information.

27. The method of claims 19-26, wherein the laser pulse comprises a weak laser coherent laser pulse and a strong reference signal.

28. The method of claims 19-27 further comprising:

measuring, by a first detector, the signal of interest; and

measuring, by a second detector, the reference signal.

29. The method of claims 19-28, wherein the reference signal comprises a local oscillator signal.

30. The method of claims 19-28, wherein the beam splitter comprises a tunable beam splitter.

31. A method comprising:

correcting, by a polarization controller, polarization drift;

splitting, by a polarizing beam splitter having a polarizing beam splitter input, a first polarizing beam splitter output, and a second polarizing beam splitter output, a corrected optical output generated by the polarization controller into a reference signal and a signal of interest, wherein the first polarizing beam splitter output provides the reference signal and the second polarizing beam splitter output provides the signal of interest; and

detecting, by an optical homodyne detection receiver, at least one of the amplitude quadrature or the phase quadrature to provide quantum key information, wherein the optical homodyne detection receiver includes a first receiver input to receive the reference signal and a second receiver input to receive the signal of interest carrying coherent state information.

32. The method of claim 31, wherein the signal of interest carrying the coherent state information is delayed, such that the reference signal and the signal of interest enter the optical homodyne detection receiver at substantially the same time.

33. The method of claims 31-32, wherein the polarization controller comprises a polarization compensator.

34. The method of claims 31-33, wherein the optical homodyne detection receiver comprises a 90-degree hybrid coupled to at least one balance detector and at least one variable attenuator.

35. The method of claims 31-34, wherein the optical homodyne detection receiver comprises a tunable beam splitter coupled to at least one balance detector.

36. The method of claims 31 -35, a phase modulator coupled to the first polarizing beam splitter output measures at least the amplitude quadrature or the phase quadrature.

37. An apparatus method comprising:

means for receiving, at an input of a beam splitter, a laser pulse, wherein the beam splitter further comprises a first output and a second output, wherein the first output provides a signal of interest and the second output provides a reference signal;

means for modulating, by a modulator coupled to the first output, a signal of interest, wherein the modulator modulates the signal of interest with coherent state information from which quantum key information is derivable; and

means for combining, by a combiner including a first combiner input, a second combiner input, and a combiner output, the reference signal received via the first combiner input and the signal of interest received via the second combiner input, wherein the combiner output provides an optical signal carrying the reference signal and the signal of interest modulated with the coherent state information.

38. The apparatus of claim 37, wherein the beam splitter comprises a tunable beam splitter.

39. An apparatus method comprising:

means for correcting, by a polarization controller, polarization drift; means for splitting, by a polarizing beam splitter having a polarizing beam splitter input, a first polarizing beam splitter output, and a second polarizing beam splitter output, a corrected optical output generated by the polarization controller into a reference signal and a signal of interest, wherein the first polarizing beam splitter output provides the reference signal and the second polarizing beam splitter output provides the signal of interest; and

means for detecting, by an optical homodyne detection receiver, the amplitude and phase quadratures to provide quantum key information, wherein the optical homodyne detection receiver includes a first receiver input to receive the reference signal and a second receiver input to receive the signal of interest carrying coherent state information.

40. A non-transitory computer-readable storage medium including program code which when executed by at least one processor causes operations comprising:

modulating, by a modulator coupled to the first output, a signal of interest, wherein the modulator modulates the signal of interest with coherent state information from which quantum key information is derivable; and combining, by a combiner including a first combiner input, a second combiner input, and a combiner output, the reference signal received via the first combiner input and the signal of interest received via the second combiner input, wherein the combiner output provides an optical signal carrying the reference signal and the signal of interest modulated with the coherent state information.

41. The non-transitory computer-readable storage medium of claim 40, wherein the beam splitter comprises a tunable beam splitter.

42. A non-transitory computer-readable storage medium including program code which when executed by at least one processor causes operations comprising:

correcting, by a polarization controller, polarization drift;

detecting, by an optical homodyne detection receiver, the amplitude and phase quadratures to provide quantum key information, wherein the optical homodyne detection receiver includes a first receiver input to receive the reference signal and a second receiver input to receive the signal of interest carrying coherent state information.