WO2016078715A1 - Procédé et dispositif pour vérifier une propriété de persistance d'un système technique dynamique - Google Patents

Procédé et dispositif pour vérifier une propriété de persistance d'un système technique dynamique Download PDF

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Publication number
WO2016078715A1
WO2016078715A1 PCT/EP2014/075152 EP2014075152W WO2016078715A1 WO 2016078715 A1 WO2016078715 A1 WO 2016078715A1 EP 2014075152 W EP2014075152 W EP 2014075152W WO 2016078715 A1 WO2016078715 A1 WO 2016078715A1
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WIPO (PCT)
Prior art keywords
technical system
polytope
optimization problem
mixed integer
integer optimization
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Application number
PCT/EP2014/075152
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English (en)
Inventor
Jan Richter
Original Assignee
Siemens Aktiengesellschaft
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Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Priority to PCT/EP2014/075152 priority Critical patent/WO2016078715A1/fr
Publication of WO2016078715A1 publication Critical patent/WO2016078715A1/fr

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/20—Design optimisation, verification or simulation

Definitions

  • the present invention relates to a method for automatically verifying a persistence property of a design of a dynamical technical system.
  • This invention addresses the process of verifying the satisfaction of formal requirements within the Systems
  • This invention tries to contribute to making this complexity manageable.
  • a typical design validation technique used today is the numerical simulation of sets of test scenarios, e.g. using simulation tools such as LMS Amesim, MATLAB Simulink, Dymola, etc.
  • simulation process for design validation consists the following steps:
  • Tests either automatically generated scenarios or manually selected test scenarios (See also the paper "Model-based Requirement Verification”) . Sufficiently many design/test loops.
  • Involved methods are: logical equivalence checking, finite state machine (FSM) equivalence checking, model checking and theorem proving.
  • FSM finite state machine
  • the object of the present invention is to provide a method which facilitates verification of a persistence property of a design of a dynamical technical system. Furthermore, a corresponding engineering system shall be provided.
  • this object is solved by a method for automatically verifying a persistence property of a design of a dynamical technical system, the method
  • a method for automatically verifying a persistence property of a design of a dynamical technical system including the steps of
  • the at least one formal requirement separating allowed states and forbidden states of the technical system in the state space
  • the current invention addresses the behavioral verification of liveness properties on an infinite time horizon preferably in mixed-logical dynamical (MLD) models.
  • MLD mixed-logical dynamical
  • This invention is helpful for creating a dedicated Systems Engineering product that allows top-down engineering
  • the discrete-time state model is a mixed-logical dynamical model.
  • a mixed-logical dynamical model can be expressed with few state equations and inequations.
  • the discrete-time state model may be formulated in the language HYSDEL.
  • HYSDEL is a higher-level language so that the models do not need to be expressed directly in the MLD format (Mixed-Logical Dynamical) .
  • temporal logic with signal abstraction.
  • Such temporal logic allows for unambiguously formulating
  • an engineering system designed to perform one of the methods described above.
  • Such engineering system can provide a behavioural verification of liveness properties on an infinite time horizon.
  • FIG 1 a counter example of a positive invariant set of solutions of a mixed integer optimization problem
  • FIG 2 a production system as example
  • FIG 3 an automotive drivetrain as further example.
  • E x x(t) + E u u(t) + E aux w(t) ⁇ E aff (index sets) J X ,J U ,J W ,J ,J ineq x is the state vector of a system
  • y is the output vector and the discrete time period is given by t e Z
  • u represents a control signal, i.e. an input signal including noise
  • w represents an auxiliary signal vector for expressing certain classes of non-linear functions.
  • the fixed parameters A, B., C., D., E. with different indices usually have the form of matrices .
  • obeying dynamics (1) reaches a polytope target set PP in finite time and stays within ° forever. Such a set is called positive invariant under dynamics (1) .
  • the polytope set P is described as an intersection of half- spaces with matrix HH and vector ⁇ , each of compatible
  • the rows of W describe the orientation of facets of , and rows of ⁇ describe corresponding offsets from the origin .
  • Step 2 of the verification serves for checking whether each state of the polytope P remains within in the polytope P, so that the system is positive (for the future) invariant.
  • This step 2 is expressed by the following problem, which can be checked completely independently of Step 1 . Note that it is logically negated by asking whether there exist initial state conditions - ⁇ (1) *O)within ⁇ that leave P in one step (see right side of FIG 1 ) . Note that one time step is sufficient, since all initial conditions in P are checked.
  • a barrier certificate helps verifying a safety property by establishing a reliable barrier between possible evolutions of the system variables and forbidden areas.
  • the key advantage of this approach is the strong degree of abstraction from the details of possible variable evolutions.
  • Such barrier certificate are known from the article of S. Prajna et al . : “Safety Verification of Hybrid Systems Using Barrier Certificates" in "Hybrid Systems:
  • the present invention thus allows an unbounded model checki procedure without the need for repetitive cycles through positive invariant sets .
  • An integration into a tool set for systems engineering is possible.
  • the models for the components of the technical system are expressed not directly by discrete-time mixed-logical dynamical (MLD) models, but in higher-level language such as HYSDEL.
  • MLD discrete-time mixed-logical dynamical
  • FIG 2. A concrete example referring to a simple production system is shown in FIG 2.
  • the system consists of two tanks 8, 9 filled by inputs ui and U2, which deposit material on a transport belt 10 in a desired proportion, adjustable by means of the outlet valves.
  • the packer unit 11 will then combine the material mix into packages 12, which shall come out of the production system at a desired rate.
  • the objective would be, from startup conditions, to exceed a minimum required production rate fttt _ n bounded time
  • a verification method not presented here might confirm that the desired production rate can be achieved.
  • the method of the present invention can show that the region
  • Additional application domains may include embedded systems verification, especially mixed-signal designs: although formal methods originate from microprocessor design dominated by discrete behaviors, this invention may be attractive for that domain, at least as far as mixed signal designs are concerned.
  • Mixed signals digital/analogue or, in

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)

Abstract

Selon l'invention, un procédé pour vérifier si un système reste ou non dans une partie pré-donnée d'un espace d'état doit être fourni, c'est-à-dire le système doit s'avérer être un invariant positif. Par conséquent, un procédé pour vérifier automatiquement une propriété de persistance d'une conception d'un système technique dynamique est suggéré, comprenant les étapes consistant à fournir un modèle d'état en temps discret du système technique, à fournir au moins une exigence formelle pour le système technique, à formuler un problème d'optimisation à nombres entiers mélangés sur la base du modèle d'état en temps discret et de l'exigence formelle, à vérifier si toutes les solutions du problème d'optimisation à nombres entiers mélangés atteignent ou non un polytope (P) pré-donné dans un espace d'état dans un temps pré-donné, chaque solution représentant un état du système technique, et à vérifier si une solution du problème d'optimisation à nombres entiers mélangés dans le polytope (P) laisse ou non le polytope après une étape de temps pré-donné, et à distribuer un résultat respectif.
PCT/EP2014/075152 2014-11-20 2014-11-20 Procédé et dispositif pour vérifier une propriété de persistance d'un système technique dynamique WO2016078715A1 (fr)

Priority Applications (1)

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PCT/EP2014/075152 WO2016078715A1 (fr) 2014-11-20 2014-11-20 Procédé et dispositif pour vérifier une propriété de persistance d'un système technique dynamique

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PCT/EP2014/075152 WO2016078715A1 (fr) 2014-11-20 2014-11-20 Procédé et dispositif pour vérifier une propriété de persistance d'un système technique dynamique

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018157999A1 (fr) 2017-02-28 2018-09-07 Renault S.A.S Dispositif de controle de trajectoire d'un vehicule
US11467575B2 (en) 2019-06-27 2022-10-11 Toyota Motor Engineering & Manufacturing North America, Inc. Systems and methods for safety-aware training of AI-based control systems

Non-Patent Citations (10)

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Title
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A. BEMPORAD; M. MORARI: "Control of systems integrating logic, dynamics and constrains", AUTOMATICA, vol. 35, 1999, pages 407 - 427, XP055203994, DOI: doi:10.1016/S0005-1098(98)00178-2
BEMPORAD A ET AL: "HYSDEL-A Tool for Generating Computational Hybrid Models for Analysis and Synthesis Problems", IEEE TRANSACTIONS ON CONTROL SYSTEMS TECHNOLOGY, IEEE SERVICE CENTER, NEW YORK, NY, US, vol. 12, no. 2, 1 March 2004 (2004-03-01), pages 235 - 249, XP011109974, ISSN: 1063-6536, DOI: 10.1109/TCST.2004.824309 *
F. LIANG; W. SCHAMAI; O. ROGOVCHENKO; S. SADEGHI; M. NYBERG; P. FRITZSON: "Model-based requirement verification: a case study", PROC. 9TH MODELICA CONFERENCE MUNICH, 2012, pages 385 - 392, XP055203993, DOI: doi:10.3384/ecp12076385
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018157999A1 (fr) 2017-02-28 2018-09-07 Renault S.A.S Dispositif de controle de trajectoire d'un vehicule
KR20190123736A (ko) 2017-02-28 2019-11-01 르노 에스.아.에스. 차량의 궤도를 제어하는 장치
US11467575B2 (en) 2019-06-27 2022-10-11 Toyota Motor Engineering & Manufacturing North America, Inc. Systems and methods for safety-aware training of AI-based control systems

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