WO2016070461A1 - 液晶面板及其驱动方法、液晶显示器 - Google Patents

液晶面板及其驱动方法、液晶显示器 Download PDF

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Publication number
WO2016070461A1
WO2016070461A1 PCT/CN2014/091339 CN2014091339W WO2016070461A1 WO 2016070461 A1 WO2016070461 A1 WO 2016070461A1 CN 2014091339 W CN2014091339 W CN 2014091339W WO 2016070461 A1 WO2016070461 A1 WO 2016070461A1
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Prior art keywords
voltage
liquid crystal
chamfer
crystal panel
picture
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PCT/CN2014/091339
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English (en)
French (fr)
Inventor
赵文勤
陈宥烨
谭小平
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US14/426,757 priority Critical patent/US9905186B2/en
Publication of WO2016070461A1 publication Critical patent/WO2016070461A1/zh
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/066—Waveforms comprising a gently increasing or decreasing portion, e.g. ramp
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0219—Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G09G2320/0276—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction

Definitions

  • the present invention relates to the field of liquid crystal display technologies, and in particular, to a liquid crystal panel and a driving method thereof, and to a liquid crystal display including the liquid crystal panel.
  • LCD Liquid Crystal Display
  • TFT Thin Film Transistor
  • FIG. 1 is a schematic structural view of a conventional liquid crystal panel.
  • the liquid crystal panel includes a display area 1 including a pixel unit px array, a source controller 2, a gate controller 3, a GAMMA voltage control unit 4, and a chamfer voltage control unit 5.
  • the chamfering voltage control unit 5 supplies a chamfer voltage to the gate controller 4 to cause the gate controller 4 to generate a corresponding scan signal to be supplied to the pixel unit px
  • the GAMMA voltage control unit 3 supplies the source controller 2 with the GAMMA voltage.
  • the source controller 2 generates a corresponding data signal to the pixel unit px.
  • the pixel unit px of the liquid crystal panel includes a thin film transistor, and an equivalent circuit diagram of the pixel unit px is as shown in FIG. 2 .
  • Vgh is the turn-on voltage supplied to the thin film transistor by the gate controller 4
  • Vgl is the turn-off voltage supplied to the thin film transistor by the gate controller 4
  • Cgs is the parasitic capacitance Cgs
  • Cst is the storage capacitor
  • Ccl is the liquid crystal capacitor. Due to the presence of the parasitic capacitance Cgs, a thin-film transistor is repeatedly turned on and off to generate a feed through voltage ⁇ V. among them, The presence of ⁇ V affects the display quality of the liquid crystal panel, for example, affecting the flicker phenomenon.
  • the chamfer voltage control section 5 generates a chamfered voltage input to the gate controller 4, whereby the waveform diagram of the scan signal supplied from the gate controller 4 to the thin film transistor is as shown in FIG.
  • the difference between the voltage Vgh and the off voltage Vgl achieves the purpose of reducing ⁇ V.
  • the chamfering voltage control unit 5 outputs a fixed chamfer voltage, that is, The picture signal of the same gray scale value has the same difference between the turn-on voltage Vgh and the turn-off voltage Vgl.
  • the liquid crystal capacitance Clc is inconsistent.
  • ⁇ V also gradually increases.
  • the relationship between ⁇ V and gray scale value is shown in Fig. 4. The larger the difference in ⁇ V between the high and low gray scale values, the more unbalanced the common voltage Vcom of the pixel unit px, and the worse the display effect of the liquid crystal panel.
  • one of the objects of the present invention is to provide a liquid crystal panel which can reduce the ⁇ V between high and low gray scale values while reducing the feed through voltage ⁇ V. The difference improves the display quality of the liquid crystal panel.
  • a liquid crystal panel comprising:
  • a display area provided with an array of pixel cells
  • a gate controller for providing a scan signal to the pixel unit
  • a source controller configured to provide a data signal to the pixel unit
  • a chamfering voltage control portion comprising n chamfering voltage circuits, configured to provide a chamfer voltage to the gate controller, so that the gate controller generates a corresponding scan signal;
  • a GAMMA voltage control unit comprising n GAMMA voltage circuits for providing a GAMMA voltage to the source controller to cause the source controller to generate a corresponding data signal;
  • the liquid crystal panel further includes a picture detecting unit, and the picture detecting unit divides the picture into n classes according to the received picture signal according to the order of the gray level value of the picture signal;
  • the chamfer voltage control unit supplies the chamfering voltage to the gate controller by the mth chamfering voltage circuit, and the GAMMA voltage control Providing a GAMMA voltage to the source controller by the mth GAMMA voltage circuit;
  • n an integer greater than 1
  • m 1, 2, ..., n.
  • the chamfer voltage control unit outputs a smaller chamfer voltage when the grayscale value of the picture signal detected by the picture detecting unit is higher.
  • the chamfer voltage circuit is a 3-step circuit.
  • the GAMMA voltage generated by the mth GAMMA voltage circuit is modulated according to the chamfer voltage generated by the mth chamfer voltage circuit.
  • a driving method of a liquid crystal panel as described above comprising:
  • the picture detection unit receives the picture signal, and divides the picture into n classes according to the order of the gray level value of the picture signal;
  • the GAMMA voltage control unit Controlling, by the GAMMA voltage control unit, one of the n GAMMA voltage circuits to provide a GAMMA voltage to the source controller according to the type of the picture, so that the source controller generates a data signal to be provided to the pixel unit;
  • n is an integer greater than one.
  • the chamfer voltage control unit outputs a smaller chamfer voltage when the grayscale value of the picture signal detected by the picture detecting unit is higher.
  • the chamfer voltage circuit is a 3-step circuit.
  • the n GAMMA voltage circuits are in one-to-one correspondence with the n chamfer voltage circuits, and the GAMMA voltage generated by each GAMMA voltage circuit is modulated according to the chamfer voltage generated by the corresponding chamfer voltage circuit.
  • a liquid crystal display including a liquid crystal panel and a backlight module.
  • the liquid crystal panel is disposed opposite to the backlight module, and the backlight module provides a display light source to the liquid crystal panel, so that The liquid crystal panel displays an image, wherein the liquid crystal panel adopts a liquid crystal panel as described above.
  • the pictures are classified according to the input picture signal according to the order of the gray level values, and then the corresponding chamfer voltage and the GAMMA voltage are selected according to the type of the picture, and are reduced. While feeding through the voltage ⁇ V, the difference of ⁇ V between the high and low gray scale values can be reduced, and the display quality of the liquid crystal panel is improved.
  • FIG. 1 is a schematic structural view of a conventional liquid crystal panel.
  • FIG. 2 is an equivalent circuit diagram of a pixel unit px in a liquid crystal panel.
  • FIG. 3 is a waveform diagram of a scan signal provided by a gate controller in the prior art.
  • FIG. 5 is a schematic structural diagram of a liquid crystal display according to an embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of a liquid crystal panel according to an embodiment of the present invention.
  • FIG. 7 is a diagram of classifying pictures according to the order of grayscale values in an embodiment of the present invention.
  • FIG. 8 is a graph showing the relationship between the feedthrough voltage ⁇ V and the grayscale value in the embodiment of the present invention.
  • FIG. 9 is a circuit diagram of a chamfering circuit according to an embodiment of the present invention.
  • Fig. 10 is a signal waveform diagram showing the operation of the chamfering circuit as shown in Fig. 9.
  • the liquid crystal display provided by the embodiment includes a liquid crystal panel 100 and a backlight module 200.
  • the liquid crystal panel 100 is disposed opposite to the backlight module 200, and the backlight module 200 provides a display light source.
  • the liquid crystal panel 100 is described such that the liquid crystal panel 100 displays an image.
  • the liquid crystal panel 100 in the present embodiment includes a display region 10 provided with an array of pixel cells px (only a part of which is exemplarily shown in the drawing), a source controller 20, and a GAMMA voltage control portion. 30.
  • the gate controller 40 and the chamfer voltage control unit 50 supplies the chamfer voltage to the gate controller 40 to cause the gate controller 40 to generate a corresponding scan signal to be supplied to the pixel unit px
  • the GAMMA voltage control unit 30 supplies the GAMMA voltage to the source controller 20 to The source controller 20 is caused to generate a corresponding data signal to be supplied to the pixel unit px.
  • the liquid crystal panel 100 of the present embodiment further includes a picture detecting unit 60.
  • the chamfering voltage control unit 50 includes n chamfering voltage circuits 51.
  • the GAMMA voltage control unit 30 includes n GAMMA voltage circuits 31. Where n is an integer greater than one.
  • the driving method of the liquid crystal panel provided above includes the steps of:
  • the picture signal is received by the picture detecting unit 60, and the pictures are classified into n types in order of the gray level value of the picture signal. As shown in FIG. 7, the pictures are classified into class_1, class_2, ..., class_n-1, and class_n in the order of low-to-high signal grayscale values. If there is a frame in the picture Some of the higher grayscale pixels and some of the lower grayscale pixels, if there are more pixels of higher grayscale, the frame image is classified as a higher grayscale type, if there are more pixels of lower grayscale , the frame image is classified as a lower grayscale type.
  • the chamfering voltage control unit 50 controls one of the n chamfer voltage circuits 51 to supply a chamfer voltage to the gate controller 40 according to the type of the picture, so that the gate controller 40 generates a scan signal to the pixel.
  • Unit px For example, when the picture detected by the picture detecting unit 60 belongs to the mth class, the chamfer voltage control unit 50 supplies the chamfer voltage to the gate controller 40 by the mth chamfer voltage circuit.
  • the GAMMA voltage control section 30 controls one of the n GAMMA voltage circuits 31 to supply the GAMMA voltage to the source controller 20 in accordance with the type of the picture, so that the source controller 20 generates a data signal to be supplied to the pixel unit px. For example, when the picture detected by the picture detecting unit 60 belongs to the mth class, the GAMMA voltage is supplied from the m-th GAMMA voltage circuit to the source controller 20 in the GAMMA voltage control unit 30.
  • n an integer greater than 1
  • m 1, 2, ..., n.
  • the chamfer voltage control unit 50 outputs a smaller chamfer when the grayscale value of the picture signal detected by the picture detecting unit 60 is higher (that is, when the picture belongs to a classification in which the gray level value is higher). Voltage. Therefore, when the grayscale value of the picture to be displayed is high, the smaller the chamfering voltage supplied from the chamfering voltage control unit 50, the smaller the difference between the turn-on voltage Vgh and the turn-off voltage Vgl; and when the grayscale of the displayed picture is small When the value is low, the chamfering voltage provided by the chamfering voltage control unit 50 is relatively large, and the difference between the opening voltage Vgh and the closing voltage Vgl is relatively large, by controlling the opening voltage Vgh and the closing voltage Vgl of different gray scales.
  • the difference value is obtained by reducing the difference of ⁇ V between the high and low gray scale values in the full gray scale range, and the relationship between the obtained ⁇ V and the gray scale value is as shown in FIG. 8 .
  • the n GAMMA voltage circuits 31 are in one-to-one correspondence with the n chamfer voltage circuits 51.
  • modulating the GAMMA voltage generated by each GAMMA voltage circuit 31 it is necessary to refer to the corresponding chamfer voltage circuit 51.
  • Chamfering voltage it is necessary to refer to the corresponding chamfer voltage circuit 51.
  • the chamfer voltage circuit 51 can be selected as a 3-step circuit. Specifically, the 3-step circuit provided in this embodiment is as shown in FIG. 9.
  • the circuit comprises a Zener diode ZD1, a first N-type MOS transistor Q1, a second N-type MOS transistor Q2 and a P-type MOS transistor Q3.
  • the source of the first N-type MOS transistor Q1 is electrically connected to the ground, and the gate is connected.
  • a driving signal GVOFF there is a driving signal GVOFF, the drain thereof is connected to the source of the P-type MOS transistor Q3 via the first resistor R1 and the second resistor R2, and receives the reference voltage signal VGHP; the drain of the P-type MOS transistor Q3 is connected with a connecting line A, The gate of the P-type MOS transistor Q3 is connected between the first resistor R1 and the second resistor R2; the source of the second N-type MOS transistor Q2 is electrically connected to the ground, and the gate thereof is connected with an inverted signal GVON of the driving signal.
  • the drain is connected to the positive terminal of the Zener diode ZD1, and the negative terminal of the Zener diode ZD1 is connected to the drain of the P-type MOS transistor Q3 through the third resistor R3; the connection line A is also electrically connected to the ground through a capacitor C1.
  • the chamfering voltage VGH is output from the connection line A.
  • the pictures are classified according to the input picture signal according to the order of the gray level values, and then the corresponding chamfer voltage and GAMMA are selected according to the type of the picture.
  • the voltage while reducing the feed through voltage ⁇ V, can reduce the difference of ⁇ V between the high and low gray scale values, and improve the display quality of the liquid crystal panel.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
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  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
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Abstract

一种液晶面板（100），包括设置有像素单元（px）阵列的显示区域（10）、源控制器（20）、GAMMA电压控制部（30）、栅控制器（40）、削角电压控制部（50）以及图片检测部（60）；图片检测部（60）将图片按照灰阶值高低的顺序分为n类，削角电压控制部（50）根据图片的类别，控制n个削角电压电路（51）的其中之一向栅控制器（40）提供削角电压，GAMMA电压控制部（30）根据图片的类别，控制n个GAMMA电压电路（31）的其中之一向源控制器（20）提供GAMMA电压；其中，n为大于1的整数。还提供了该液晶面板（100）的驱动方法以及包含该液晶面板（100）的液晶显示器。该液晶面板（100）在减小馈通电压ΔV的同时，可以减小高低灰阶值之间ΔV的差异，提高了显示质量。

Description

液晶面板及其驱动方法、液晶显示器 技术领域
本发明涉及液晶显示器技术领域,尤其涉及一种液晶面板及其驱动方法，还涉及包含该液晶面板的液晶显示器。
背景技术
液晶显示器(Liquid Crystal Display，LCD)，为平面超薄的显示设备，它由一定数量的彩色或黑白像素组成，放置于光源或者反射面前方。液晶显示器功耗很低，并且具有高画质、体积小、重量轻的特点，因此倍受大家青睐，成为显示器的主流。目前液晶显示器是以薄膜晶体管(Thin Film Transistor，TFT)液晶显示器为主，液晶面板是液晶显示器的主要组件。
图1为一种现有的液晶面板的结构示意图。如图1所示，该液晶面板包括包括设置有像素单元px阵列的显示区域1、源控制器2、栅控制器3、GAMMA电压控制部4以及削角电压控制部5。其中，削角电压控制部5向栅控制器4提供一削角电压，以使栅控制器4生成相应的扫描信号提供给像素单元px，GAMMA电压控制部3向源控制器2提供GAMMA电压，以使源控制器2生成相应的数据信号提供给像素单元px。液晶面板的像素单元px包含有薄膜晶体管，像素单元px的等效电路图如图2所示。参阅图2，图中Vgh为栅控制器4提供给薄膜晶体管的开启电压，Vgl为栅控制器4提供给薄膜晶体管的关闭电压，Cgs为寄生电容Cgs，Cst为储存电容，Ccl为液晶电容。由于寄生电容Cgs的存在，薄膜晶体管不断的重复开启和关闭后会产生一个馈通(feed through)电压ΔV。其中，
Figure PCTCN2014091339-appb-000001
ΔV的存在会影响液晶面板的显示质量，例如会产生影响残留(flicker)现象。如上的液晶面板中采用削角电压控制部5产生一削角电压输入给栅控制器4，由此栅控制器4提供给薄膜晶体管的扫描信号的波形图如图3所示，通过减小开启电压Vgh和关闭电压Vgl的差值，达到减小ΔV的目的。
如上提供的液晶面板中，削角电压控制部5输出固定的削角电压，即对于不 同的灰阶值的图片信号，开启电压Vgh和关闭电压Vgl的差值相同。然而在不同灰阶值下，液晶电容Clc不一致，随着灰阶值增大，ΔV也逐渐增大，ΔV与灰阶值之间的关系曲线图如图4所示。高低灰阶值之间ΔV差异越大，像素单元px的公共电压Vcom越不平衡，液晶面板的显示效果越差。
发明内容
鉴于现有技术存在的不足，本发明目的之一是提供了一种液晶面板，该液晶面板可以在减小馈通(feed through)电压ΔV的同时，可以减小高低灰阶值之间ΔV的差异，提高了液晶面板的显示质量。
为了实现上述目的，本发明采用了如下的技术方案：
一种液晶面板，其中，包括：
设置有像素单元阵列的显示区域；
栅控制器，用于向所述像素单元提供扫描信号；
源控制器，用于向所述像素单元提供数据信号；
削角电压控制部，包括n个削角电压电路，用于向所述栅控制器提供削角电压，以使所述栅控制器生成相应的扫描信号；
GAMMA电压控制部，包括n个GAMMA电压电路用于向所述源控制器提供GAMMA电压，以使所述源控制器生成相应的数据信号；
所述液晶面板还包括一图片检测部，所述图片检测部根据接收到的图片信号，按照该图片信号灰阶值高低的顺序将图片分为n类；
其中，当所述图片检测部检测到的图片为第m类时，所述削角电压控制部中由第m个削角电压电路向所述栅控制器提供削角电压,所述GAMMA电压控制部中由第m个GAMMA电压电路向所述源控制器提供GAMMA电压；
其中，n为大于1的整数，m＝1、2、…、n。
其中，当所述图片检测部检测到的图片信号的灰阶值越高时，所述削角电压控制部输出越小的削角电压。
其中，所述削角电压电路为3-step电路。
其中，第m个GAMMA电压电路产生的GAMMA电压根据第m个削角电压电路产生的削角电压进行调制获取。
如上所述的液晶面板的驱动方法，其中，包括：
由图片检测部接收图片信号，并按照该图片信号灰阶值高低的顺序将图片分为n类；
由削角电压控制部根据图片的类别，控制n个削角电压电路的其中之一向栅控制器提供削角电压，以使所述栅控制器产生扫描信号提供给像素单元；
由GAMMA电压控制部根据图片的类别，控制n个GAMMA电压电路的其中之一向源控制器提供GAMMA电压，以使所述源控制器产生数据信号提供给像素单元；
其中，n为大于1的整数。
其中，当所述图片检测部检测到的图片信号的灰阶值越高时，所述削角电压控制部输出越小的削角电压。
其中，所述削角电压电路为3-step电路。
其中，所述n个GAMMA电压电路与n个削角电压电路一一对应，每一GAMMA电压电路产生的GAMMA电压根据对应的削角电压电路产生的削角电压进行调制获取。
本发明的另一方面是提供一种液晶显示器，包括液晶面板及背光模组，所述液晶面板与所述背光模组相对设置，所述背光模组提供显示光源给所述液晶面板，以使所述液晶面板显示影像，其中，所述液晶面板采用如上所述的液晶面板。
相比于现有技术，本发明提供的液晶面板中，根据输入的图片信号对图片按照灰阶值高低的顺序进行分类，再根据图片的类别选择相应的削角电压和GAMMA电压，在减小馈通(feed through)电压ΔV的同时，可以减小高低灰阶值之间ΔV的差异，提高了液晶面板的显示质量。
附图说明
图1为一种现有的液晶面板的结构示意图。
图2为液晶面板中像素单元px的等效电路图。
图3为现有技术中栅控制器提供的扫描信号的波形图。
图4为现有技术中馈通电压ΔV与灰阶值之间的关系曲线图。
图5为本发明实施例提供的液晶显示器的结构示意图。
图6为本发明实施例提供的液晶面板的结构示意图。
图7为本发明实施例中按照灰阶值高低的顺序将图片分类的图示。
图8为本发明实施例中馈通电压ΔV与灰阶值之间的关系曲线图。
图9为本发明实施例提供的削角电路的电路图。
图10为如9所示的削角电路工作过程的信号波形图。
具体实施方式
为了使本发明的目的、技术方案以及优点更加清楚明白，下面将结合附图用实施例对本发明做进一步说明。
如图5所示，本实施例提供的液晶显示器，包括液晶面板100及背光模组200，所述液晶面板100与所述背光模组200相对设置，所述背光模组200提供显示光源给所述液晶面板100，以使所述液晶面板100显示影像。
如图6所示，本实施例中的液晶面板100包括设置有像素单元px阵列(附图中只是示例性的示出了其中的一部分)的显示区域10、源控制器20、GAMMA电压控制部30、栅控制器40以及削角电压控制部50。其中，削角电压控制部50向栅控制器40提供削角电压，以使栅控制器40生成相应的扫描信号提供给像素单元px，GAMMA电压控制部30向源控制器20提供GAMMA电压，以使源控制器20生成相应的数据信号提供给像素单元px。参阅图6，本实施例中的液晶面板100还包括一图片检测部60，削角电压控制部50包括n个削角电压电路51，GAMMA电压控制部30包括n个GAMMA电压电路31。其中，n为大于1的整数。
如上提供的液晶面板的驱动方法包括步骤：
(a)由图片检测部60接收图片信号，并按照该图片信号灰阶值高低的顺序将图片分为n类。如图7所示的，将图片按照信号灰阶值从低到高的顺序分为class_1、class_2、…、class_n-1、class_n共n类。如果一帧图片中具有 部分较高灰阶的像素和部分较低灰阶的像素，若较高灰阶的像素较多，则将该帧图片归类为较高灰阶的类型，若较低灰阶的像素较多，则将该帧图片归类为较低灰阶的类型。
(b)由削角电压控制部50根据图片的类别，控制n个削角电压电路51的其中之一向栅控制器40提供削角电压，以使所述栅控制器40产生扫描信号提供给像素单元px。例如，当图片检测部60检测到的图片属于第m类时，削角电压控制部50中由第m个削角电压电路向栅控制器40提供削角电压。
(c)由GAMMA电压控制部30根据图片的类别，控制n个GAMMA电压电路31的其中之一向源控制器20提供GAMMA电压，以使所述源控制器20产生数据信号提供给像素单元px。例如，当图片检测部60检测到的图片属于第m类时，GAMMA电压控制部30中由第m个GAMMA电压电路向源控制器20提供GAMMA电压。
其中，n为大于1的整数，m＝1、2、…、n。
其中，当所述图片检测部60检测到的图片信号的灰阶值越高时(即当图片属于灰阶值越高的分类时)，所述削角电压控制部50输出越小的削角电压。由此，需要显示的图片的灰阶值较高时，削角电压控制部50提供的削角电压越小，开启电压Vgh和关闭电压Vgl的差值较小；而当显示的图片的灰阶值较低时，削角电压控制部50提供的削角电压相对较大，开启电压Vgh和关闭电压Vgl的差值也相对较大，通过控制不同的灰阶下开启电压Vgh和关闭电压Vgl的差值，实现了在全灰阶范围内减小高低灰阶值之间ΔV的差异，得到的ΔV与灰阶值之间的关系曲线图如图8所示。
在本实施例中，n个GAMMA电压电路31与n个削角电压电路51一一对应，在调制每一GAMMA电压电路31产生的GAMMA电压时，需要参考对应的削角电压电路51所产生的削角电压。
其中，削角电压电路51可以选择为3-step电路。具体地，本实施例提供的3-step电路如图9所示。该电路包括稳压二极管ZD1、第一N型MOS管Q1、第二N型MOS管Q2和P型MOS管Q3,第一N型MOS管Q1的源极与地电性连接，其栅极连接有驱动信号GVOFF,其漏极经第一电阻R1和第二电阻R2连接到P型MOS管Q3的源极，并接收基准电压信号VGHP；P型MOS管Q3的漏极连接有一连接线A,P型MOS管Q3的栅极连接到第一电阻R1和第二电阻R2之间；第二N型MOS管Q2的源极与地电性连接，其栅极连接有驱动信号的反相信号GVON,其 漏极连接到稳压二极管ZD1的正端，稳压二极管ZD1的负端通过第三电阻R3连接到P型MOS管Q3的漏极；连接线A还通过一电容C1与地电性连接。该电路中，从连接线A输出削角电压VGH。
参阅图9并结合图10所示的信号波形图，如图9所示的3-step电路的工作过程如下：
(1)当驱动信号GVOFF为高电平，第一N型MOS管Q1导通，P型MOS管Q3导通；此时驱动信号的反相信号GVON为低电平，第二N型MOS管Q2截止，即输出的削角电压VGH＝VGHP，不进行削角处理。
(2)当驱动信号GVOFF为低电平，第一N型MOS管Q1截止，P型MOS管Q3截止；此时驱动信号的反相信号GVON为高电平，第二N型MOS管Q2导通使得稳压二极管ZD1的正端接地，储存于电容C1中的电压经过稳压二极管ZD1放电，对输出的削角电压VGH进行削角处理，VGH<VGHP。其中，第三电阻R3的大小可以控制电容C1的放电速度，通过调节稳压二极管ZD1的参数可以限制削角电压VGH下降的底线值。因此，对于不同的削角电压电路51，通过改变稳压二极管ZD1的参数，从而获得不同的削角电压。
综上所述，相比于现有技术，本发明提供的液晶面板中，根据输入的图片信号对图片按照灰阶值高低的顺序进行分类，再根据图片的类别选择相应的削角电压和GAMMA电压，在减小馈通(feed through)电压ΔV的同时，可以减小高低灰阶值之间ΔV的差异，提高了液晶面板的显示质量。
以上所述仅是本申请的具体实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本申请原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本申请的保护范围。

Claims (18)

  1. 一种液晶面板，其中，包括：
    设置有像素单元阵列的显示区域；
    栅控制器，用于向所述像素单元提供扫描信号；
    源控制器，用于向所述像素单元提供数据信号；
    削角电压控制部，包括n个削角电压电路，用于向所述栅控制器提供削角电压，以使所述栅控制器生成相应的扫描信号；
    GAMMA电压控制部，包括n个GAMMA电压电路用于向所述源控制器提供GAMMA电压，以使所述源控制器生成相应的数据信号；
    所述液晶面板还包括一图片检测部，所述图片检测部根据接收到的图片信号，按照该图片信号灰阶值高低的顺序将图片分为n类；
    其中，当所述图片检测部检测到的图片为第m类时，所述削角电压控制部中由第m个削角电压电路向所述栅控制器提供削角电压,所述GAMMA电压控制部中由第m个GAMMA电压电路向所述源控制器提供GAMMA电压；
    其中，n为大于1的整数，m＝1、2、…、n。
  2. 根据权利要求1所述的液晶面板，其中，当所述图片检测部检测到的图片信号的灰阶值越高时，所述削角电压控制部输出越小的削角电压。
  3. 根据权利要求1所述的液晶面板，其中，所述削角电压电路为3-step电路。
  4. 根据权利要求2所述的液晶面板，其中，所述削角电压电路为3-step电路。
  5. 根据权利要求1所述的液晶面板，其中，第m个GAMMA电压电路产生的GAMMA电压根据第m个削角电压电路产生的削角电压进行调制获取。
  6. 根据权利要求2所述的液晶面板，其中，第m个GAMMA电压电路产生的GAMMA电压根据第m个削角电压电路产生的削角电压进行调制获取。
  7. 权利要求1所述的液晶面板的驱动方法，其中，包括：
    由图片检测部接收图片信号，并按照该图片信号灰阶值高低的顺序将图片分为n类；
    由削角电压控制部根据图片的类别，控制n个削角电压电路的其中之一向栅控制器提供削角电压，以使所述栅控制器产生扫描信号提供给像素单元；
    由GAMMA电压控制部根据图片的类别，控制n个GAMMA电压电路的其中之一向源控制器提供GAMMA电压，以使所述源控制器产生数据信号提供给像素单元；
    其中，n为大于1的整数。
  8. 根据权利要求7所述的液晶面板的驱动方法，其中，当所述图片检测部检测到的图片信号的灰阶值越高时，所述削角电压控制部输出越小的削角电压。
  9. 根据权利要求7所述的液晶面板的驱动方法，其中，所述削角电压电路为3-step电路。
  10. 根据权利要求8所述的液晶面板的驱动方法，其中，所述削角电压电路为3-step电路。
  11. 根据权利要求7所述的液晶面板的驱动方法，其中，所述n个GAMMA电压电路与n个削角电压电路一一对应，每一GAMMA电压电路产生的GAMMA电压根据对应的削角电压电路产生的削角电压进行调制获取。
  12. 根据权利要求8所述的液晶面板的驱动方法，其中，所述n个GAMMA电压电路与n个削角电压电路一一对应，每一GAMMA电压电路产生的GAMMA电压根据对应的削角电压电路产生的削角电压进行调制获取。
  13. 一种液晶显示器，包括液晶面板及背光模组，所述液晶面板与所述背光模组相对设置，所述背光模组提供显示光源给所述液晶面板，以使所述液晶面板显示影像，其中，所述液晶面板包括：
    设置有像素单元阵列的显示区域；
    栅控制器，用于向所述像素单元提供扫描信号；
    源控制器，用于向所述像素单元提供数据信号；
    削角电压控制部，包括n个削角电压电路，用于向所述栅控制器提供削角电压，以使所述栅控制器生成相应的扫描信号；
    GAMMA电压控制部，包括n个GAMMA电压电路用于向所述源控制器提供GAMMA电压，以使所述源控制器生成相应的数据信号；
    所述液晶面板还包括一图片检测部，所述图片检测部根据接收到的图片信号，按照该图片信号灰阶值高低的顺序将图片分为n类；
    其中，当所述图片检测部检测到的图片为第m类时，所述削角电压控制部中由第m个削角电压电路向所述栅控制器提供削角电压,所述GAMMA电压控制部中由第m个GAMMA电压电路向所述源控制器提供GAMMA电压；
    其中，n为大于1的整数，m＝1、2、…、n。
  14. 根据权利要求13所述的液晶显示器，其中，当所述图片检测部检测到的图片信号的灰阶值越高时，所述削角电压控制部输出越小的削角电压。
  15. 根据权利要求13所述的液晶显示器，其中，所述削角电压电路为3-step电路。
  16. 根据权利要求14所述的液晶显示器，其中，所述削角电压电路为3-step电路。
  17. 根据权利要求13所述的液晶显示器，其中，第m个GAMMA电压电路产生的GAMMA电压根据第m个削角电压电路产生的削角电压进行调制获取。
  18. 根据权利要求14所述的液晶显示器，其中，第m个GAMMA电压电路产生的GAMMA电压根据第m个削角电压电路产生的削角电压进行调制获取。
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