WO2016064563A1 - Display incorporating dynamic saturation compensating gamut mapping - Google Patents
Display incorporating dynamic saturation compensating gamut mapping Download PDFInfo
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- WO2016064563A1 WO2016064563A1 PCT/US2015/054006 US2015054006W WO2016064563A1 WO 2016064563 A1 WO2016064563 A1 WO 2016064563A1 US 2015054006 W US2015054006 W US 2015054006W WO 2016064563 A1 WO2016064563 A1 WO 2016064563A1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2003—Display of colours
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/3433—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices
- G09G3/3466—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices based on interferometric effect
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/02—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/46—Colour picture communication systems
- H04N1/56—Processing of colour picture signals
- H04N1/60—Colour correction or control
- H04N1/6058—Reduction of colour to a range of reproducible colours, e.g. to ink- reproducible colour gamut
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/46—Colour picture communication systems
- H04N1/56—Processing of colour picture signals
- H04N1/60—Colour correction or control
- H04N1/6058—Reduction of colour to a range of reproducible colours, e.g. to ink- reproducible colour gamut
- H04N1/6063—Reduction of colour to a range of reproducible colours, e.g. to ink- reproducible colour gamut dependent on the contents of the image to be reproduced
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0235—Field-sequential colour display
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/06—Adjustment of display parameters
- G09G2320/066—Adjustment of display parameters for control of contrast
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/06—Adjustment of display parameters
- G09G2320/0666—Adjustment of display parameters for control of colour parameters, e.g. colour temperature
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/06—Adjustment of display parameters
- G09G2320/0673—Adjustment of display parameters for control of gamma adjustment, e.g. selecting another gamma curve
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2340/00—Aspects of display data processing
- G09G2340/06—Colour space transformation
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2360/00—Aspects of the architecture of display systems
- G09G2360/16—Calculation or use of calculated indices related to luminance levels in display data
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/02—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
- G09G5/06—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed using colour palettes, e.g. look-up tables
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/46—Colour picture communication systems
- H04N1/52—Circuits or arrangements for halftone screening
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/46—Colour picture communication systems
- H04N1/54—Conversion of colour picture signals to a plurality of signals some of which represent particular mixed colours, e.g. for textile printing
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/12—Picture reproducers
- H04N9/31—Projection devices for colour picture display, e.g. using electronic spatial light modulators [ESLM]
- H04N9/3102—Projection devices for colour picture display, e.g. using electronic spatial light modulators [ESLM] using two-dimensional electronic spatial light modulators
- H04N9/3111—Projection devices for colour picture display, e.g. using electronic spatial light modulators [ESLM] using two-dimensional electronic spatial light modulators for displaying the colours sequentially, e.g. by using sequentially activated light sources
Definitions
- This disclosure relates to the field of imaging displays, and in particular to image formation processes for multi-primary displays.
- Electromechanical systems include devices having electrical and mechanical elements, actuators, transducers, sensors, optical components such as mirrors and optical films, and electronics. EMS devices or elements can be manufactured at a variety of scales including, but not limited to, microscales and nanoscales.
- microelectromechanical systems (MEMS) devices can include structures having sizes ranging from about a micron to hundreds of microns or more.
- Nanoelectromechanical systems (NEMS) devices can include structures having sizes smaller than a micron including, for example, sizes smaller than several hundred nanometers.
- Electromechanical elements may be created using deposition, etching, lithography, and/or other micromachining processes that etch away parts of substrates and/or deposited material layers, or that add layers to form electrical and
- control logic is capable of receiving an input image frame, which includes, for each of a plurality a pixels, a first set of color parameter values. For each of the plurality of pixels, the control logic is further capable of applying a content adaptive gamut mapping process to the first set of color parameter values associated with the pixel.
- the content adaptive gamut mapping process is based at least in part on the content of the image frame and is configured to map the first set of color parameter values to a second set of color parameter values.
- control logic is further configured to collectively dither the color subfields using a vector error diffusion process.
- the content adaptive gamut mapping process further maps, for each pixel, the first set of color parameter values to the second set of color parameter values based at least in part on a power management parameter.
- the power management parameter can include an inactivity period timer value, a target saturation parameter value or a battery level.
- the first set of color parameter values includes red, green, and blue pixel intensity values and the second set of color parameter values includes XYZ tristimulus values.
- the method further includes determining a saturation level parameter for the input image frame and adapting the gamut mapping process based on the determined color saturation parameter of the input image frame.
- adapting the gamut mapping process includes generating an image saturation level-dependent gamut mapping lookup table.
- generating the image saturation level-dependent gamut mapping lookup table includes interpolating between at least two stored gamut mapping lookup tables based on the determined image saturation parameter.
- the method further includes collectively dithering the color subfields using a vector error diffusion process.
- the content adaptive gamut mapping process further maps, for each pixel, the first set of color parameter values to the second set of color parameter values based at least in part on a power management parameter.
- the power management parameter can include an inactivity period timer value, a target saturation parameter value or a battery level.
- control logic is further configured to derive a decomposition matrix based at least in part on the saturation parameter and apply the decomposition matrix in decomposing the XYZ tristimulus values.
- Figure IB shows a block diagram of an example host device.
- Figure 4 shows a block diagram of example control logic suitable for use as, for example, the control logic in the display apparatus shown in Figure 3.
- the control logic can employ an image saturation dependent gamut mapping when converting input image pixel values into the XYZ color tristimulus space.
- the control logic can implement the image saturation dependent gamut mapping by generating a saturation level dependent gamut mapping lookup table (LUT).
- the saturation level is represented by a parameter Q.
- the saturation level dependent gamut mapping LUT can be formed by interpolating values between at least two stored saturation level dependent (i.e., Q-dependent) gamut mapping LUTs.
- the control logic can decompose the XYZ tristimulus values into the multi-primary color subfields using a saturation level dependent decomposition matrix.
- FIG. 1 A shows a schematic diagram of an example direct-view MEMS- based display apparatus 100.
- the display apparatus 100 includes a plurality of light modulators 102a-102d (generally light modulators 102) arranged in rows and columns.
- the light modulators 102a and 102d are in the open state, allowing light to pass.
- the light modulators 102b and 102c are in the closed state, obstructing the passage of light.
- the display apparatus 100 can be utilized to form an image 104 for a backlit display, if illuminated by a lamp or lamps 105.
- the apparatus 100 may form an image by reflection of ambient light originating from the front of the apparatus. In another implementation, the apparatus 100 may form an image by reflection of light from a lamp or lamps positioned in the front of the display, i.e., by use of a front light.
- the display apparatus 100 can generate a color pixel 106 in the image 104.
- the display apparatus 100 includes two or more light modulators 102 per pixel 106 to provide a luminance level in an image
- Direct-view displays may operate in either a transmissive or reflective mode.
- the light modulators filter or selectively block light which originates from a lamp or lamps positioned behind the display. The light from the lamps is optionally injected into a lightguide or backlight so that each pixel can be uniformly illuminated.
- Transmissive direct-view displays are often built onto transparent substrates to facilitate a sandwich assembly arrangement where one substrate, containing the light modulators, is positioned over the backlight.
- the transparent substrate can be a glass substrate (sometimes referred to as a glass plate or panel), or a plastic substrate.
- the glass substrate may be or include, for example, a borosilicate glass, wine glass, fused silica, a soda lime glass, quartz, artificial quartz, Pyrex, or other suitable glass material.
- Each light modulator 102 can include a shutter 108 and an aperture 109.
- the shutter 108 To illuminate a pixel 106 in the image 104, the shutter 108 is positioned such that it allows light to pass through the aperture 109. To keep a pixel 106 unlit, the shutter 108 is positioned such that it obstructs the passage of light through the aperture 109.
- the aperture 109 is defined by an opening patterned through a reflective or light-absorbing material in each light modulator 102.
- the display apparatus also includes a control matrix coupled to the substrate and to the light modulators for controlling the movement of the shutters.
- the control matrix includes a series of electrical interconnects (such as interconnects 110, 112 and 1 14), including at least one write-enable interconnect 110 (also referred to as a scan line interconnect) per row of pixels, one data interconnect 112 for each column of pixels, and one common interconnect 1 14 providing a common voltage to all pixels, or at least to pixels from both multiple columns and multiples rows in the display apparatus 100.
- VWE write-enabling voltage
- the data interconnects 1 12 communicate the new movement instructions in the form of data voltage pulses.
- the data voltage pulses applied to the data interconnects 112 directly contribute to an electrostatic movement of the shutters.
- the data voltage pulses control switches, such as transistors or other non-linear circuit elements that control the application of separate drive voltages, which are typically higher in magnitude than the data voltages, to the light modulators 102. The application of these drive voltages results in the electrostatic driven movement of the shutters 108.
- the control matrix also may include, without limitation, circuitry, such as a transistor and a capacitor associated with each shutter assembly.
- circuitry such as a transistor and a capacitor associated with each shutter assembly.
- the gate of each transistor can be electrically connected to a scan line interconnect.
- the source of each transistor can be electrically connected to a corresponding data interconnect.
- the drain of each transistor may be electrically connected in parallel to an electrode of a corresponding capacitor and to an electrode of a corresponding actuator.
- the other electrode of the capacitor and the actuator associated with each shutter assembly may be connected to a common or ground potential.
- the transistor can be replaced with a semiconducting diode, or a metal-insulator-metal switching element.
- Figure IB shows a block diagram of an example host device 120 (i.e., cell phone, smart phone, PDA, MP3 player, tablet, e-reader, netbook, notebook, watch, wearable device, laptop, television, or other electronic device).
- the host device 120 includes a display apparatus 128 (such as the display apparatus 100 shown in Figure 1A), a host processor 122, environmental sensors 124, a user input module 126, and a power source.
- the display apparatus 128 includes a plurality of scan drivers 130 (also referred to as write enabling voltage sources), a plurality of data drivers 132 (also referred to as data voltage sources), a controller 134, common drivers 138, lamps 140-146, lamp drivers 148 and an array of display elements 150, such as the light modulators 102 shown in Figure 1A.
- the scan drivers 130 apply write enabling voltages to scan line interconnects 131.
- the data drivers 132 apply data voltages to the data interconnects 133.
- the data drivers 132 are capable of providing analog data voltages to the array of display elements 150, especially where the luminance level of the image is to be derived in analog fashion.
- the display elements are designed such that when a range of intermediate voltages is applied through the data interconnects 133, there results a range of intermediate illumination states or luminance levels in the resulting image.
- the data drivers 132 are capable of applying a reduced set, such as 2, 3 or 4, of digital voltage levels to the data interconnects 133.
- the display elements are shutter-based light modulators, such as the light modulators 102 shown in Figure 1A
- these voltage levels are designed to set, in digital fashion, an open state, a closed state, or other discrete state to each of the shutters 108.
- the drivers are capable of switching between analog and digital modes.
- the display apparatus optionally includes a set of common drivers 138, also referred to as common voltage sources.
- the common drivers 138 provide a DC common potential to all display elements within the array 150 of display elements, for instance by supplying voltage to a series of common interconnects 139.
- the common drivers 138 following commands from the controller 134, issue voltage pulses or signals to the array of display elements 150, for instance global actuation pulses which are capable of driving and/or initiating simultaneous actuation of all display elements in multiple rows and columns of the array.
- Each of the drivers (such as scan drivers 130, data drivers 132 and common drivers 138) for different display functions can be time-synchronized by the controller 134.
- the human visual system HVS
- the lamps can employ primary colors other than red, green, blue and white.
- fewer than four, or more than four lamps with primary colors can be employed in the display apparatus 128.
- the data for an image state is loaded by the controller 134 to the array of display elements 150 by a sequential addressing of individual rows, also referred to as scan lines.
- the scan driver 130 applies a write-enable voltage to the write enable interconnect 131 for that row of the array of display elements 150, and subsequently the data driver 132 supplies data voltages, corresponding to desired shutter states, for each column in the selected row of the array. This addressing process can repeat until data has been loaded for all rows in the array of display elements 150.
- the addressing process for loading image data to the array of display elements 150 is separated in time from the process of actuating the display elements.
- the array of display elements 150 may include data memory elements for each display element, and the control matrix may include a global actuation interconnect for carrying trigger signals, from the common driver 138, to initiate simultaneous actuation of the display elements according to data stored in the memory elements.
- FIGs 2A and 2B show views of an example dual actuator shutter assembly 200.
- the dual actuator shutter assembly 200 as depicted in Figure 2A, is in an open state.
- Figure 2B shows the dual actuator shutter assembly 200 in a closed state.
- the shutter assembly 200 includes actuators 202 and 204 on either side of a shutter 206.
- Each actuator 202 and 204 is independently controlled.
- a second opposing actuator, the shutter- close actuator 204 serves to close the shutter 206.
- Each of the actuators 202 and 204 can be implemented as compliant beam electrode actuators.
- the electrostatic actuators 202 and 204 are designed so that their voltage- displacement behavior provides a bi-stable characteristic to the shutter assembly 200.
- For each of the shutter-open and shutter-close actuators there exists a range of voltages below the actuation voltage, which if applied while that actuator is in the closed state (with the shutter being either open or closed), will hold the actuator closed and the shutter in position, even after a drive voltage is applied to the opposing actuator.
- the minimum voltage needed to maintain a shutter's position against such an opposing force is referred to as a maintenance voltage V m .
- the display module 304 further includes control logic 306, a frame buffer 308, an array of display elements 310, display drivers 312 and a backlight 314.
- the control logic 306 serves to process image data received from the host device 302 and controls the display drivers 312, array of display elements 310 and backlight 314 to together produce the images encoded in the image data.
- the control logic 306, frame buffer 308, array of display elements 310, and display drivers 312 shown in Figure 3 can be similar, in some implementations, to the driver controller 29, frame buffer 28, display array 30, and array drivers 22 shown in Figures 11 A and 1 IB, below.
- the functionality of the control logic 306 is described further below in relation to Figures 5- 10.
- Each image subframe can be associated with a color and a weight, and includes desired states of each of the display elements in the array of display elements 310.
- the microprocessor 316 also can be configured to determine the number of image subframes to display to produce a given image frame, the order in which the image subframes are to be displayed, timing parameters associated with addressing the display elements in each subframe, and parameters associated with implementing the appropriate weight for each of the image subframes. These parameters may include, in various implementations, the duration for which each of the respective image subframes is to be illuminated and the intensity of such illumination.
- the collection of these parameters i.e., the number of subframes, the order and timing of their output, and their weight implementation parameters for each subframe
- output sequence i.e., the number of subframes, the order and timing of their output, and their weight implementation parameters for each subframe
- the interface chip 318 can be capable of carrying out more routine operations of the display module 304.
- the operations may include retrieving image subframes from the frame buffer 308 and outputting control signals to the display drivers 312 and the backlight 314 in response to the retrieved image subframe and the output sequence determined by the microprocessor 316.
- the functionality of the microprocessor 316 and the interface chip 318 are combined into a single logic device, which may take the form of a microprocessor, an ASIC, a field programmable gate array (FPGA) or other programmable logic device.
- the functionality of the microprocessor 316 and the interface chip 318 can be implemented by a processor 21 shown in Figure 1 IB.
- the functionality of the microprocessor 316 and the interface chip 318 may be divided in other ways between multiple logic devices, including one or more microprocessors, ASICs, FPGAs, digital signal processors (DSPs) or other logic devices.
- the frame buffer 308 can be any volatile or non-volatile integrated circuit memory, such as DRAM, high-speed cache memory, or flash memory (for example, the frame buffer 308 can be similar to the frame buffer 28 shown in Figure 1 IB).
- the interface chip 318 causes the frame buffer 308 to output data signals directly to the display drivers 312.
- the frame buffer 308 has sufficient capacity to store color subfield data and subframe data associated with at least one image frame. In some implementations, the frame buffer 308 has sufficient capacity to store color subfield data and subframe data associated with a single image frame. In some other implementations, the frame buffer 308 has sufficient capacity to store color subfield data and subframe data associated with at least two image frames. Such extra memory capacity allows for additional processing by the microprocessor 316 of image data associated with a more recently received image frame while a previously received image frame is being displayed via the array of display elements 310.
- the display module 304 includes multiple memory devices.
- the display module 304 may include one memory device, such as a memory directly associated with the microprocessor 316, for storing subfield data, and the frame buffer 308 is reserved for storage of subframe data.
- the display drivers 312 can include a variety of drivers depending on the specific control matrix used to control the display elements in the array of display elements 310.
- the display drivers 312 include a plurality of scan drivers similar to the scan drivers 130, a plurality of data drivers similar to the data drivers 132, and a set of common drivers similar to the common drivers 138, as shown in Figure IB.
- the scan drivers output write enabling voltages to rows of display elements, while the data drivers output data signals along columns of display elements.
- the common drivers output signals to display elements in multiple rows and multiple columns of display elements.
- the backlight 314 can include a light guide, one or more light sources (such as LEDs), and light source drivers.
- the light sources can include light sources of multiple colors, such as red, green, blue, and in some implementations white.
- the light source drivers are capable of individually driving the light sources to a plurality of discrete light levels to enable illumination gray scale and/or content adaptive backlight control (CABC) in the backlight.
- CABC content adaptive backlight control
- lights of multiple colors can be illuminated simultaneously at various intensity levels to adjust the chromaticities of the component colors used by the display, for example to match a desired color gamut.
- Lights of multiple colors also can be illuminated to form composite colors. For displays employing red, green, and blue component colors, the display may utilize a composite color white, yellow, cyan, magenta, or any other color formed from a combination of two or more of the component colors.
- X b i ⁇ b ' ⁇ & ⁇ b ⁇ & correspond to the XYZ tristimulus values oi the color of the light used to illuminated subframes associated with the blue subfield
- the XYZ values referred to above for each of the display primaries, red, green, blue and white sum up to XYZ tristimulus values of the white point of the gamut being displayed.
- the code word LUT may store code words using base-3, base-4, base- 10, or some other base number scheme.
- the set of input RGB color subfields are analyzed to determine the maximum white intensity value that can be extracted from all pixels in the image frame without introducing color error.
- Q is calculated as follows:
- RGB values can be converted to the XYZ color space by multiplying a set of RGB pixel values by a Q-dependent color transform matrix.
- three- dimensional Q-dependent RGB ->XYZ LUTs can be stored by (or may be accessible by) the saturation compensation logic 408, indexed by ⁇ R,G,B ⁇ triplet values. Storing a large number of such LUTs, may, for some implementations, become prohibitive from a memory capacity standpoint.
- the saturation compensation logic 408 stores, or has access to, a set of decomposition matrices for a large range of Q values.
- the control logic 400 can store or access a more limited set of decomposition matrices, MQ, with matrices for other values being calculated via interpolation.
- the control logic may store or access a first decomposition matrix, M Q _ m i n 620 and a second decomposition matrix, M Q _ MAX 622.
- Decomposition matrices for values of Q between Q m i n and Q max can be calculated as follows:
- the subfield derivation logic 404 can then generate a frame- specific XYZ- RGBW LUT for the image frame based on its corresponding Q value through a similar interpolation process used to generate a Q-specific RGB- XYZ LUT.
- a LUT may not be used at all, and the XYZ to RGBW decomposition is derived directly first multiplying the XYZ pixel values by a matrix M' to obtain virtual primaries R' G' B' that enclose the display gamut for all Q.
- Intensity values for R,G,B and W are then obtained by by calculating:
- the generated RGBW subframes are output to display an image (stage 614).
- the subframe output stage (stage 614) includes a light source intensity calculation process to adjust the intensities of the light sources based on the value of Q selected for the image frame.
- the selection of Q results in a modification to the display gamut, as such the light source intensities for each of the RGB subfields are adjusted to be less saturated as Q increases and the intensity of the white light source for the white subfield is increased as Q increases.
- the light source intensities are scaled linearly based on the value of Q. For example, with a Q of 0.5, the light source intensity values for each non- white subfield are multiplied by 0.5. If Q were 0.2, the light source intensity values for each non- white subfield would be multiplied by 0.8, and so forth.
- the light source intensity calculation can be carried out earlier in the process 600.
- FIG. 7 shows a flow diagram of an example process 700 of forming an image on a display.
- the process 700 includes receiving an input image frame encoded in a first color space, in which the input image frame includes, for each of a plurality a pixels, a set of color intensity values (stage 702). Examples of such processing stages are discussed above as stages 502 and 602 shown in Figures 5 and 6, respectively.
- the process 700 includes applying a gamut mapping process to the color intensity values associated with the plurality of pixels in the received input image frame to convert the color intensity values associated with the respective pixels into corresponding tristimulus values in the XYZ color space (stage 704). Examples of this processing stage are discussed above as stages 504 and 606, also shown in Figures 5 and 6.
- the process 700 further includes decomposing the XYZ tristimulus values associated with the plurality of pixels to form respective color subfields associated with at least four different colors (stage 706).
- Each color subfield includes intensity values for a corresponding color for respective pixels from the input image.
- Examples of the processing stage 706 are discussed above in relation to stages 506 and 608 shown in Figures 5 and 6.
- Display element state information is generated for display elements in an array of display elements based on the color subfields (stage 708).
- the display element state information can include, in some implementations, subframes. Examples of generating subframes are discussed in relation to stages 510 and 612.
- the process 700 further includes outputting display element state information associated with the at least four color subfields to the array of display elements to form an image (stage 710). Examples of the processing stage 710 are described above in relation to stages 512 and 614, shown in Figures 5 and 6, respectively.
- Q values for the segments are determined collectively to ensure that the Q values of two adjacent segments do not differ too greatly from one another, thereby avoiding image artifacts that might result from a rapid change in color saturation between two adjacent segments.
- the collective Q value determination for the segments can be implemented using various constraint-based optimization algorithms known to a person of ordinary skill in the art.
- Displays that vary the saturation level they employ in forming images by transferring image data into a white color subfield as described above can implement power management features that help extend battery life.
- Q opt corresponds to a level of image data that can be transferred to the white subfield without unduly impacting color fidelity.
- Q opt corresponds to a Q value that introduces an amount of average color error into an output image that is approximately equal to a threshold color error beyond which the color error becomes noticeable to the human visual system (i.e., an acceptably low loss).
- the power consumption of the display decreases.
- FIG. 9 shows a flow diagram of a second example process 900 of reducing power consumption in a display.
- the process 900 adjusts the value of Q used to display an image based on a remaining battery level of a host device in which the display is included.
- the process 900 includes displaying images using Q opt (stage 902).
- the process 900 checks the host device battery level (904) and compares the battery level to a first threshold P I, such as 25% of the battery life remaining (decision block 906). If the battery level is above PI, the display device continues to display images using Q opt (stage 902). If the battery level is between PI and a second threshold P2 (decision block
- the display displays images using a Q value that is scaled relative to the remaining battery life, referred to a Q sca i ed (stage
- the display device can output images using a Q value that is determined via a linear interpolation (or other suitable ramping function) between two Q values, such as about 0.25, and about 1.0. If the battery life falls below P2 (decision block 909), the display outputs images in black and white, using a Q value of 1.0 (stage 910).
- the threshold percentages are merely illustrative in nature and other percentage thresholds can be used in other implementations.
- the process 1000 includes receiving an image frame (stage 1002) and determining Q opt (stage 1004).
- the display device compares the difference between the average Q value it had been using to display images in the past, Q avg , to a Q value, Qtarget, that corresponds to the specified power consumption target. If the absolute value of that difference falls below a threshold (decision block 1006), the display device outputs the image using the Q op t value determined for the image (stage 1008), updates Q aV g (stage 1010), and processes the next image frame. If the absolute value of the difference exceeds the threshold (decision block 1006), the display device determines if Q aV g is greater than Qtarget (decision block 1012).
- the image is displayed with an increased value of Q (stage 1014), Q avg is updated (stage 1010), and a next image frame is received (stage 1002).
- the increased value of Q is selected to be greater than Q ta rget to begin moving Q avg closer to Qtarget-
- a limit is placed on the amount Q is increased above Qopt to avoid excessive deterioration in image fidelity. If Q avg is greater than Q ta rget the image can be displayed with Q op t.
- the display updates Qavg (stage 1010) and processes the next image frame upon receipt (stage 1002).
- Q op t can be selected based on data other than the color content of the image being displayed.
- Q op t can be selected based on an application or content type associated with an image in conjunction with a selected battery life setting.
- images output by word processing or e-reader applications can be displayed using relatively high Q values without much deterioration in image fidelity, whereas images generated by photography or video applications often suffer from image deterioration when output with higher Q values.
- the battery life settings can be adjusted, for example, by a graphical user interface provided by the display device or by a host device in which the display device is incorporated.
- the display apparatus can maintain a two dimensional LUT.
- the LUT is keyed to the application or content type of the image and to possible battery life settings.
- the LUT stores a corresponding Q value for each
- Q values for each application generally increase as the desired battery life setting increases.
- Qtarget can also be varied based on the battery life setting.
- the Q values in the above table can be constant for all battery life settings.
- one or more additional power management features may be implemented.
- the control logic such as the control logic 306 shown in Figure 3
- the control logic 306 shown in Figure 3 can reduce the number of subframes the display apparatus uses to output each image frame. Reducing the number of subframes reduces the amount of power consumed by reducing the amount of power expended in loading data into the display for the subframes that will no longer be displayed. It also allows the remaining subframes that are displayed to be illuminated for longer at a lower intensity, allowing the display light sources to operate more efficiently.
- the display apparatus may display an image frame using between four and eight subframes for each of the red, green, and blue color subfields and using between three and five subframes for the white color subfield.
- the display apparatus can reduce the number of red, green, and blue subfields used to between three and five - unless the display switches to a monochrome mode, as discussed in relation to stages 816 and 910 in Figures 8 and 9, in which case, the display does not output any red, green, or blue subframes at all.
- the same number of white subframes can be displayed regardless of battery level.
- the number of subframes used to display the white color subfield can increase as Q increases.
- the number of subframes used to display the red, green, and blue subfields can be generally inversely proportional to the value of Q used to display the image frame, regardless of the battery level of the display apparatus.
- the control logic when the number of subframes used to display an image frame is reduced, the control logic causes the display to omit display of lower weighted subframes before omitting higher weighted subframes.
- the control logic can implement different subframe weighting schemes for a color subfield depending on the number of subframes used to display the color subfield.
- the control logic may implement additional or different dithering operations in response to a reduction in the number of subframes used to display a color subfield to account for quantization errors the reduction might introduce.
- additional power savings can be obtained by selectively powering down portions of the display apparatus's frame buffer when fewer subframes are used, as less image data needs to be stored.
- additional display hardware can be powered down to save additional power. For example, the drivers and logic associated with the red, green, and blue light sources can be powered down, if they will not be used for a given image frame.
- the control logic can be capable of adjusting the complexity of the image processing operations it executes based on the battery level of the display apparatus. For example, the control logic can vary the number of pixels in an image frame it takes into account during its dithering operations. To determine a value of a pixel, a dithering algorithm takes into account the values of pixels within a configurable distance around the pixel in question. For example, a dithering algorithm may take into account only the values of immediately adjacent pixels, or it may take into account the values of all pixels two, three, four, or more pixels away. A dithering process that takes into account a greater number of pixels requires more processor cycles to execute than a process that takes into account fewer pixels. As such, the control logic can be configured, responsive to a decrease in battery level, to reduce the number of pixels it takes into account in its dithering operations to reduce the number of processor cycles needed to complete the operation, thereby saving power.
- FIGS 11A and 1 IB show system block diagrams of an example display device 40 that includes a plurality of display elements.
- the display device 40 can be, for example, a smart phone, a cellular or mobile telephone.
- the same components of the display device 40 or slight variations thereof are also illustrative of various types of display devices such as televisions, computers, tablets, e-readers, handheld devices and portable media devices.
- the display device 40 includes a housing 41, a display 30, an antenna 43, a speaker 45, an input device 48 and a microphone 46.
- the housing 41 can be formed from any of a variety of manufacturing processes, including injection molding, and vacuum forming.
- the housing 41 may be made from any of a variety of materials, including, but not limited to: plastic, metal, glass, rubber and ceramic, or a combination thereof.
- the housing 41 can include removable portions (not shown) that may be interchanged with other removable portions of different color, or containing different logos, pictures, or symbols.
- the display 30 may be any of a variety of displays, including a bi-stable or analog display, as described herein.
- the display 30 also can be capable of including a flat-panel display, such as plasma, electroluminescent (EL) displays, OLED, super twisted nematic (STN) display, LCD, or thin-film transistor (TFT) LCD, or a non-flat- panel display, such as a cathode ray tube (CRT) or other tube device.
- the display 30 can include a mechanical light modulator-based display, as described herein.
- the components of the display device 40 are schematically illustrated in Figure 1 IB.
- the display device 40 includes a housing 41 and can include additional components at least partially enclosed therein.
- the display device 40 includes a network interface 27 that includes an antenna 43 which can be coupled to a transceiver 47.
- the network interface 27 may be a source for image data that could be displayed on the display device 40. Accordingly, the network interface 27 is one example of an image source module, but the processor 21 and the input device 48 also may serve as an image source module.
- the transceiver 47 is connected to a processor 21, which is connected to conditioning hardware 52.
- the conditioning hardware 52 may be configured to condition a signal (such as filter or otherwise manipulate a signal).
- the conditioning hardware 52 can be connected to a speaker 45 and a microphone 46.
- the processor 21 also can be connected to an input device 48 and a driver controller 29.
- the driver controller 29 can be coupled to a frame buffer 28, and to an array driver 22, which in turn can be coupled to a display array 30.
- One or more elements in the display device 40 including elements not specifically depicted in Figure 11 A, can be capable of functioning as a memory device and be capable of communicating with the processor 21.
- a power supply 50 can provide power to substantially all components in the particular display device 40 design.
- the network interface 27 includes the antenna 43 and the transceiver 47 so that the display device 40 can communicate with one or more devices over a network.
- the network interface 27 also may have some processing capabilities to relieve, for example, data processing requirements of the processor 21.
- the antenna 43 can transmit and receive signals.
- the antenna 43 transmits and receives RF signals according to any of the IEEE 16.11 standards, or any of the IEEE 802.1 1 standards.
- the antenna 43 transmits and receives RF signals according to the Bluetooth® standard.
- the antenna 43 can be designed to receive code division multiple access (CDMA), frequency division multiple access (FDMA), time division multiple access (TDMA), Global System for Mobile communications (GSM), GSM/General Packet Radio Service (GPRS), Enhanced Data GSM Environment (EDGE), Terrestrial Trunked Radio (TETRA), Wideband-CDMA (W-CDMA), Evolution Data Optimized (EV-DO), lxEV- DO, EV-DO Rev A, EV-DO Rev B, High Speed Packet Access (HSPA), High Speed Downlink Packet Access (HSDPA), High Speed Uplink Packet Access (HSUPA), Evolved High Speed Packet Access (HSPA+), Long Term Evolution (LTE), AMPS, or other known signals that are used to communicate within a wireless network, such as a system utilizing 3G, 4G or 5G, or further implementations thereof, technology.
- CDMA code division multiple access
- FDMA frequency division multiple access
- TDMA Time division multiple access
- GSM Global System for Mobile communications
- the transceiver 47 can pre-process the signals received from the antenna 43 so that they may be received by and further manipulated by the processor 21.
- the transceiver 47 also can process signals received from the processor 21 so that they may be transmitted from the display device 40 via the antenna 43.
- the transceiver 47 can be replaced by a receiver.
- the network interface 27 can be replaced by an image source, which can store or generate image data to be sent to the processor 21.
- the processor 21 can control the overall operation of the display device 40.
- the processor 21 receives data, such as compressed image data from the network interface 27 or an image source, and processes the data into raw image data or into a format that can be readily processed into raw image data.
- the processor 21 can send the processed data to the driver controller 29 or to the frame buffer 28 for storage.
- Raw data typically refers to the information that identifies the image characteristics at each location within an image. For example, such image characteristics can include color, saturation and gray-scale level.
- the processor 21 can include a microcontroller, CPU, or logic unit to control operation of the display device 40.
- the conditioning hardware 52 may include amplifiers and filters for transmitting signals to the speaker 45, and for receiving signals from the microphone 46.
- the conditioning hardware 52 may be discrete components within the display device 40, or may be incorporated within the processor 21 or other components.
- the array driver 22 can receive the formatted information from the driver controller 29 and can re-format the video data into a parallel set of waveforms that are applied many times per second to the hundreds, and sometimes thousands (or more), of leads coming from the display's x-y matrix of display elements. In some
- the array driver 22 and the display array 30 are a part of a display module.
- the driver controller 29, the array driver 22, and the display array 30 are a part of the display module.
- the driver controller 29, the array driver 22, and the display array 30 are appropriate for any of the types of displays described herein.
- the driver controller 29 can be a conventional display controller or a bi-stable display controller (such as a mechanical light modulator display element controller).
- the array driver 22 can be a conventional driver or a bi-stable display driver (such as a mechanical light modulator display element controller).
- the display array 30 can be a conventional display array or a bi-stable display array (such as a display including an array of mechanical light modulator display elements).
- the driver controller 29 can be integrated with the array driver 22. Such an implementation can be useful in highly integrated systems, for example, mobile phones, portable-electronic devices, watches or small-area displays.
- the input device 48 can be configured to allow, for example, a user to control the operation of the display device 40.
- the input device 48 can include a keypad, such as a QWERTY keyboard or a telephone keypad, a button, a switch, a rocker, a touch-sensitive screen, a touch-sensitive screen integrated with the display array 30, or a pressure- or heat-sensitive membrane.
- the microphone 46 can be configured as an input device for the display device 40. In some implementations, voice commands through the microphone 46 can be used for controlling operations of the display device 40. Additionally, in some implementations, voice commands can be used for controlling display parameters and settings.
- the power supply 50 can include a variety of energy storage devices.
- the power supply 50 can be a rechargeable battery, such as a nickel-cadmium battery or a lithium-ion battery.
- the rechargeable battery may be chargeable using power coming from, for example, a wall socket or a photovoltaic device or array.
- the rechargeable battery can be wirelessly chargeable.
- the power supply 50 also can be a renewable energy source, a capacitor, or a solar cell, including a plastic solar cell or solar-cell paint.
- the power supply 50 also can be configured to receive power from a wall outlet.
- control programmability resides in the driver controller 29 which can be located in several places in the electronic display system. In some other implementations, control programmability resides in the array driver 22.
- the above-described optimization may be implemented in any number of hardware and/or software components and in various configurations.
- a phrase referring to "at least one of a list of items refers to any combination of those items, including single members.
- "at least one of: a, b, or c” is intended to cover: a, b, c, a-b, a-c, b-c, and a-b-c.
- the hardware and data processing apparatus used to implement the various illustrative logics, logical blocks, modules and circuits described in connection with the aspects disclosed herein may be implemented or performed with a general purpose single- or multi-chip processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein.
- a general purpose processor may be a microprocessor, or, any conventional processor, controller, microcontroller, or state machine.
- a processor also may be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
- a processor also may be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
- the functions described may be implemented in hardware, digital electronic circuitry, computer software, firmware, including the structures disclosed in this specification and their structural equivalents thereof, or in any combination thereof. Implementations of the subject matter described in this specification also can be implemented as one or more computer programs, i.e., one or more modules of computer program instructions, encoded on a computer storage media for execution by, or to control the operation of, data processing apparatus.
- the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium.
- the processes of a method or algorithm disclosed herein may be implemented in a processor-executable software module which may reside on a computer-readable medium.
- Computer- readable media includes both computer storage media and communication media including any medium that can be enabled to transfer a computer program from one place to another.
- a storage media may be any available media that may be accessed by a computer.
- Such computer-readable media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that may be used to store desired program code in the form of instructions or data structures and that may be accessed by a computer.
- any connection can be properly termed a computer- readable medium.
- Disk and disc includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk, and blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer- readable media.
- the claimed combination may be directed to a subcombination or variation of a subcombination.
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Priority Applications (3)
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| CN201580055352.XA CN107077814A (zh) | 2014-10-22 | 2015-10-05 | 并入动态饱和补偿色域映射的显示器 |
| JP2017521511A JP6371003B2 (ja) | 2014-10-22 | 2015-10-05 | 動的飽和補償ガマットマッピングを組み込んだディスプレイ |
| KR1020177010515A KR20170071504A (ko) | 2014-10-22 | 2015-10-05 | 동적 채도 보상 색 영역 맵핑을 포함하는 디스플레이 |
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| US14/521,019 US9858845B2 (en) | 2014-10-22 | 2014-10-22 | Display incorporating dynamic saturation compensating gamut mapping |
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| US9693427B2 (en) * | 2014-01-06 | 2017-06-27 | Fibar Group S.A. | RGBW controller |
| CN105263009B (zh) * | 2015-09-14 | 2017-12-15 | 深圳市华星光电技术有限公司 | 一种图像的自适应转换方法 |
| TWI588814B (zh) * | 2016-08-18 | 2017-06-21 | 友達光電股份有限公司 | 像素驅動方法 |
| EP3367659A1 (en) * | 2017-02-28 | 2018-08-29 | Thomson Licensing | Hue changing color gamut mapping |
| WO2019118390A1 (en) * | 2017-12-12 | 2019-06-20 | Interdigital Vc Holdings, Inc. | Processing an image |
| CN109461418B (zh) * | 2018-12-17 | 2021-03-23 | 惠科股份有限公司 | 三色数据到四色数据的转换方法及装置 |
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| JP2007108249A (ja) * | 2005-10-11 | 2007-04-26 | Sony Corp | 表示装置及びその駆動方法 |
| US20140118388A1 (en) * | 2012-10-30 | 2014-05-01 | Pixtronix, Inc. | Display apparatus employing frame specific composite contributing colors |
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| DE60227531D1 (de) * | 2001-07-30 | 2008-08-21 | Koninkl Philips Electronics Nv | Bewegungskompensation für plasmaanzeige |
| US7042521B2 (en) * | 2002-08-29 | 2006-05-09 | Samsung Electronics Co., Ltd. | Method for color saturation adjustment in an RGB color system |
| JP2004325628A (ja) * | 2003-04-23 | 2004-11-18 | Seiko Epson Corp | 表示装置、及びその画像処理方法 |
| US7619637B2 (en) * | 2004-04-09 | 2009-11-17 | Samsung Electronics Co., Ltd. | Systems and methods for improved gamut mapping from one image data set to another |
| US7301543B2 (en) | 2004-04-09 | 2007-11-27 | Clairvoyante, Inc. | Systems and methods for selecting a white point for image displays |
| CN1882103B (zh) | 2005-04-04 | 2010-06-23 | 三星电子株式会社 | 实现改进的色域对映演算的系统及方法 |
| KR100760943B1 (ko) * | 2006-01-25 | 2007-09-21 | 엘지.필립스 엘시디 주식회사 | 모바일용 표시장치의 구동장치 및 구동방법 |
| JP2008268322A (ja) * | 2007-04-17 | 2008-11-06 | Seiko Epson Corp | 表示装置、表示装置の駆動方法および電子機器 |
| KR101273468B1 (ko) | 2007-10-01 | 2013-06-14 | 삼성전자주식회사 | 화이트값 추출을 이용한 rgb-to-rgbw 변환 시스템및 방법 |
| EP2180461A1 (en) * | 2008-10-23 | 2010-04-28 | TPO Displays Corp. | Method of color gamut mapping of color input values of input image pixels of an input image to RGBW output values for an RGBW display, display module, display controller and apparatus using such method |
| WO2010131499A1 (ja) * | 2009-05-15 | 2010-11-18 | シャープ株式会社 | 画像処理装置および画像処理方法 |
| KR101588336B1 (ko) | 2009-12-17 | 2016-01-26 | 삼성디스플레이 주식회사 | 데이터 처리 방법 및 이를 수행하기 위한 표시 장치 |
| US9049410B2 (en) | 2009-12-23 | 2015-06-02 | Samsung Display Co., Ltd. | Color correction to compensate for displays' luminance and chrominance transfer characteristics |
| US9417479B2 (en) * | 2011-05-13 | 2016-08-16 | Samsung Display Co., Ltd. | Method for reducing simultaneous contrast error |
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- 2015-10-05 CN CN201580055352.XA patent/CN107077814A/zh active Pending
- 2015-10-05 WO PCT/US2015/054006 patent/WO2016064563A1/en not_active Ceased
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| JP2007108249A (ja) * | 2005-10-11 | 2007-04-26 | Sony Corp | 表示装置及びその駆動方法 |
| US20140118388A1 (en) * | 2012-10-30 | 2014-05-01 | Pixtronix, Inc. | Display apparatus employing frame specific composite contributing colors |
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| KR20170071504A (ko) | 2017-06-23 |
| US20160117968A1 (en) | 2016-04-28 |
| JP2017533468A (ja) | 2017-11-09 |
| CN107077814A (zh) | 2017-08-18 |
| JP6371003B2 (ja) | 2018-08-08 |
| US9858845B2 (en) | 2018-01-02 |
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