WO2016048470A1 - Photomultiplicateur à semi-conducteurs à lecture de forme d'impulsion améliorée - Google Patents

Photomultiplicateur à semi-conducteurs à lecture de forme d'impulsion améliorée Download PDF

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Publication number
WO2016048470A1
WO2016048470A1 PCT/US2015/045007 US2015045007W WO2016048470A1 WO 2016048470 A1 WO2016048470 A1 WO 2016048470A1 US 2015045007 W US2015045007 W US 2015045007W WO 2016048470 A1 WO2016048470 A1 WO 2016048470A1
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WO
WIPO (PCT)
Prior art keywords
buffer
buffer amplifier
buffer amplifiers
gain
coupled
Prior art date
Application number
PCT/US2015/045007
Other languages
English (en)
Inventor
Sergei Dolinsky
Jianjun Guo
David Leo Mcdaniel
Ravindra Mohan Manjeshwar
Geng Fu
Original Assignee
General Electric Company
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US14/688,008 external-priority patent/US9851455B2/en
Application filed by General Electric Company filed Critical General Electric Company
Priority to CN201580051138.7A priority Critical patent/CN106716993B/zh
Publication of WO2016048470A1 publication Critical patent/WO2016048470A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/67—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response
    • H04N25/671—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response for non-uniformity detection or correction
    • H04N25/672—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response for non-uniformity detection or correction between adjacent sensors or output registers for reading a single image
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H04N25/778—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself

Definitions

  • SSPMs Solid state photomultipliers
  • MPC MicroPixel Photon Counters
  • MPD MicroPixel Avalanche Photodiodes
  • SiPMs Silicon Photomultipliers
  • the Silicon Photomultiplier (SiPM) is a multipixel array of avalanche photodiodes with a number up to a few thousand independent micropixels (with typical size of 10-100 microns) joined together on common substrate and working on common load. Each pixel detects the photoelectrons with a gain of about 10 6 .
  • the output of an SSPM pixel is connected to a front end buffer amplifier, which can be implemented as a transimpedance amplifier.
  • a readout pulse from the SSPM having a readout pulse shape that exhibits a fast rise time (e.g., ⁇ 1 ns) and a relatively slow fall time (e.g., 10-50 ns).
  • a fast rise time e.g., ⁇ 1 ns
  • a relatively slow fall time e.g. 10-50 ns.
  • the inventors have observed that as the size of the SSPM increases, the readout pulse shape response degrades significantly due to increased parasitic capacitance and inductance in combination with intrinsic impedance of each SSPM pixel.
  • a solid state photomultiplier may include a plurality of pixels, wherein each pixel of the plurality of pixels comprises a plurality of subpixels; and a first set of buffer amplifiers, wherein each buffer amplifier of the first set of buffer amplifiers is respectively coupled to a subpixel of the plurality of subpixels.
  • a silicon photomultiplier array may include a plurality of subpixels arranged in groups to form a pixel; a plurality of buffer amplifiers respectively coupled to the plurality of subpixels; and a plurality of secondary buffer amplifiers, wherein each group of subpixels is coupled to a secondary buffer amplifier of the plurality of secondary buffer amplifiers.
  • a method for monitoring a solid state photomultiplier may include monitoring a parameter of a plurality of subpixels of a solid state photomultiplier, wherein the plurality of subpixels are arranged in groups to form a pixel, and wherein each subpixel has a buffer amplifier coupled thereto; determining whether a disablement of a subpixel of the plurality of subpixels or an adjustment of at least one of a V b i as or gain of the buffer amplifier of the subpixel is needed; and providing a signal to the buffer amplifier to disable the subpixel or adjust at least one of the V b i as or gain of the buffer amplifier.
  • Figure 1 illustrates a portion of an exemplary solid state photomultiplier (SSPM) array in accordance with some embodiments of the present invention.
  • Figure 2 illustrates a block diagram of an exemplary embodiment of an SSPM-based detector in accordance with some embodiments of the present invention.
  • Figure 3 illustrates a portion of an exemplary SSPM in accordance with some embodiments of the present invention.
  • Figure 4 illustrates a partial electrical schematic of the portion of the SSPM illustrated in figure 3.
  • Figure 5 illustrates a portion of an exemplary SSPM in accordance with some embodiments of the present invention.
  • Figure 6 illustrates a partial electrical schematic of the portion of the SSPM illustrated in figure 5.
  • Figure 7 illustrates a portion of an exemplary SSPM in accordance with some embodiments of the present invention.
  • Figure 8 is a flow diagram depicting an adjustment of a voltage and/or bias of a buffer amplifier in accordance with some aspects of the present invention.
  • Figure 9 is a graphical depiction of a first temperature curve (Tl) and a second temperature curve (T2) of gain as a function Vbi as -
  • Figure 10 illustrates an exemplary feedback loop for a portion of a SSPM in accordance with some embodiments of the present invention.
  • Exemplary embodiments of the present invention are directed to improving functionality of a solid state photomultiplier (SSPM).
  • the inventive SSPM may include one or more buffer amplifiers at subpixel levels.
  • the buffer amplifiers may be multiplexed, thereby providing the above benefits without increasing a number of readout electronics or complexity of the system.
  • the buffer amplifiers may be monitored and/or adjusted to compensate for temperature and process nonuniformity or disabled to turn off failed or malfunctioning subpixels.
  • FIG. 1 illustrates a portion of an exemplary SSPM array 110 (e.g., an SiPM) in accordance with some embodiments of the present invention.
  • the array 110 can include pixel areas 112 and each pixel area 112 can include an SSPM (pixel 114).
  • Each pixel 114 can be formed of an array of microcells 116.
  • the microcells 116 that form the pixels 114 can be implemented as a two dimensional array having a specified dimension, e.g., from about 10 to about 100 microns, and a specified spatial density, e.g., about 100 to about 10,000/sq. mm.
  • the SSPM array 110 can be incorporated into a high energy detector, such as a scintillator-based detector or can be used for detecting single photons or any other light pulses (multiple photons).
  • Figure 2 illustrates an exemplary embodiment of a detector including one or more of the pixels 114 of Figure 1.
  • the detector can be implemented in a nuclear detector (e.g., X-ray imaging system) and/or an optical detector (e.g., a light detector).
  • Each microcell 116 of the pixel can be formed by an avalanche photodiode (APD) 218 operating in Geiger mode and a quenching element 220.
  • APD avalanche photodiode
  • the APDs 218 of the microcells 116 can be formed using one or more semiconductor materials, such as Silicon (Si), Silicon Carbide (SiC), Germanium (Ge), Indium Gallium Arsenide (InGaAs), Gallium nitride, Mercury Cadmium Telluride (HgCdTe), and/or any other suitable material(s).
  • the array of microcells 116 can be formed on a single semiconductor substrate to form the pixel 114.
  • Each APD 218 in the microcells 116 can have a breakdown voltage (V br ) of, for example, about 20 to about 2000 Volts and a bias voltage 224 can be applied to the microcells 116 to configure the APDs 218 in a reverse bias mode having an over voltage (V ov ) (i.e., the difference between the bias voltage Vbias and the breakdown voltage Vbr).
  • V ov over voltage
  • the reverse biased APDs 218 can have an internal current gain of about 100 to about 1000 resulting from an avalanche effect within the APDs at bias voltage below breakdown. When they operate in Geiger mode, the gain of each microcell 116 is proportional to the over voltage and capacitance of micro-cell.
  • the quenching element 220 in each microcell 116 can be disposed in series between the bias voltage and the APD 218 or between the APD 218 and a common readout bus 232 and can operate to ensure that the APD 218 transitions to the quiescent state after a photon is detected.
  • the quenching element can be a resistor, transistor, current controlled source, and/or any suitable device or devices for transitioning the APD 218 to the quiescent state after the APD 218 detects of a photon.
  • the microcells 116 are connected to each other in parallel and share a common bias voltage and a common readout terminal. The output of each microcell 116 is used to generate an output 222 of the pixel 114, which can be processed by readout electronics 230.
  • the output of the microcells 116 can output from the pixel 114 and processed via a buffer amplifier 226.
  • the output 222 of the pixel 114 can take the form of one or more electrical pulses ("readout pulses").
  • the readout pulses can have an associated discharge time for which a magnitude of the readout pulse increases and an associated recharge time for which the magnitude of the readout pulse decreases.
  • a rate at which the magnitude decreases during the recharge time can generally be determined by a capacitance associated with the APDs 218 of the SSPM and the impedance of the quenching elements 220.
  • the rate can be defined by the RC time constant formed by the capacitance of the APDs 218 and the resistance of the quenching resistors.
  • the time constant can cause the recharge portion of the readout pulse to have a long tail (e.g., about 10-50 ns).
  • a frequency dependent input impedance circuit 228 can be disposed between the output 222 of the pixel 114 and the input of the buffer amplifier 226 to provide a frequency dependent impedance.
  • the frequency dependent input impedance circuit 228 can be part of buffer amplifier 226.
  • the input impedance circuit 228 can be configured to shape the recharge portion of the readout pulse.
  • the input impedance circuit 228 can be used to control a voltage received at the input of the buffer amplifier 226 to minimize the amplification of the recharge portion of a readout pulse from the pixel 114.
  • the buffer amplifier 226 receives output from the pixel 114.
  • the buffer amplifier can be implemented as a transimpedance amplifier.
  • the buffer amplifier can output the amplified signal to readout electronics 230 downstream of the buffer amplifier 226 for further processing by the readout electronics 230, which can include amplifiers, analog-to-digital converters, and/or any other suitable electronics.
  • output of the microcells 116 can output from the pixel 114 to the buffer amplifier 226 in a single cumulative signal (e.g., such as described above with respect to FIGS. 1 and 2).
  • the inventors have observed that, as the size of the pixel 114 increases, the resultant readout pulse provided to the readout electronics degrades. While not intending to be bound by theory, the inventors believe that such degradation may be caused by an increased parasitic capacitance and inductance in combination with an intrinsic impedance of each pixel 114 and associated packaging.
  • each pixel 114 may be further divided into subpixels 302, wherein each subpixel 302 is coupled to a respective buffer amplifier 304, for example, such as shown in FIG. 3.
  • coupling of the subpixel 302 and buffer amplifier 304 may include any known coupling mechanism known in the art, for example a coupling via separate conductive element or integration of the buffer amplifier 304 into the subpixel 302 during the fabrication of the subpixel 302.
  • the pixel 114 may be divided into any number of subpixels 302 suitable to facilitate the improved pulse shape response of the pixel 114.
  • each pixel 114 may comprise four or more subpixels 302 each having a respective buffer amplifier 304 coupled thereto.
  • the buffer amplifiers 304 may be coupled to one another in parallel and having a single output 402 to provide the processed signal to, for example, one or more other components of the array (e.g., the, readout electronics 230, impedance circuit 228, array level buffer amplifier 226, or the like). Coupling the buffer amplifiers 304 in such a manner allows for the inclusion of the buffer amplifiers 304 without having to increase a number of readout electronics channels and system complexity.
  • the buffer amplifiers may be multiplexed or grouped together via one or more secondary or tertiary buffer amplifiers.
  • a group 502 of buffer amplifiers 304 may be coupled to a secondary buffer amplifier 504.
  • the buffer amplifiers 304 may be grouped in any manner suitable to facilitate improving the readout pulse shape of the array.
  • each group 502 of buffer amplifiers 304 may include buffer amplifiers 304 from one subpixel 302 or more than one subpixel 302.
  • the secondary buffer amplifiers 504 may be coupled to one another in parallel having a single output 602 to provide the processed signal to, for example, one or more other components of the array (e.g., the, readout electronics 230, impedance circuit 228, array level buffer amplifier 226 , or the like).
  • the array e.g., the, readout electronics 230, impedance circuit 228, array level buffer amplifier 226 , or the like.
  • buffer amplifiers 304 and secondary buffer amplifiers 504 may be grouped in a manner similar to the buffer amplifiers 304 and coupled to a tertiary buffer amplifier (shown in phantom at 604) or tertiary set of buffer amplifiers.
  • the buffer amplifiers e.g., buffer amplifiers 304, secondary buffer amplifiers 504, tertiary buffer amplifiers 604, or the like
  • each group 502 may comprise a plurality of buffer amplifiers 304 (e.g., more than 1, such as 2, 4 or the like) coupled to a secondary buffer amplifier 504, wherein a plurality of secondary buffer amplifiers 504 (e.g., more than 1, such as 2, 4 or the like) may be coupled to a tertiary buffer amplifier 604, such as shown in the figure.
  • a plurality of buffer amplifiers 304 e.g., more than 1, such as 2, 4 or the like
  • secondary buffer amplifier 504 e.g., more than 1, such as 2, 4 or the like
  • the buffer amplifiers may be fabricated via any process known in the art.
  • the buffer amplifiers will be produced during one or of the semiconductor fabrication processes (e.g, CMOS, MOSFET, or the like) typically utilized to fabricate one or more components of the SSPM array.
  • the desired placement and coupling of each of the buffer amplifiers may be accomplished through various features formed in one or more layers of the structure.
  • such fabrication techniques may facilitate the integration of the buffer amplifiers into the SSPM at subpixel, pixel or array level.
  • each of the buffer amplifiers e.g., buffer amplifiers 304, 504, 604 described above
  • the breakdown voltage (V br ) of the SSPM array 110 may vary, thereby introducing gain and signal response non-uniformities across the pixels and degradation of the pulse shape readout.
  • one or more parameters of each of SSPM subpixel and the buffer amplifiers may be monitored and/or adjusted to provide a substantially uniform gain and signal response between SSPM subpixels and the buffer amplifiers.
  • a substantially uniform gain between the SSPM (e.g., pixel 114 described above) / SPAD (e.g., breakdown voltage (V br )) and the buffer amplifiers may be desirable to facilitate an improved signal response uniformity.
  • gain adjustments may be facilitated either by varying anode voltages provided by the buffer amplifiers or direct adjustment of the gains of the buffer amplifiers. Such adjustments may be accomplished by any suitable mechanism known in the art.
  • the adjustments may be performed as a function of an integrated feedback loop (e.g., utilizing feedback circuitry) thus providing an automated system for providing uniformity between the SPPM and buffer amplifiers.
  • the gain after the gain for each buffer and sub pixel are calibrated, the gain may be maintained and local temperature changes may be monitored and compensated using components with a substantially similar temperature coefficient (TempCo) as V br in the feedback circuitry.
  • TempoCo substantially similar temperature coefficient
  • the V b i as and/or gain may be adjusted to compensate for temperature changes of the subpixels.
  • the temperature may be sensed via any mechanism suitable to accurately detect the temperature (e.g., sensor described below with respect to FIG. 10).
  • a feedback control circuit may automatically adjust the gain of the buffer amplifier to compensate the effects caused by the scintillator and Vt, r variation due to temperature change.
  • a shift from Tl to T2 may be facilitated, or compensated for, by adjusting the Vbi as (e.g., from VI to V2) while maintaining a constant gain (e.g., Gl) or adjusting the gain of amplifier (e.g., from Gl to G2) while maintaining a constant Vbias (e.g., VI).
  • Vbi e.g., from VI to V2
  • Gl constant gain
  • Vbias e.g., VI
  • the monitoring of the temperature and adjustment of the Vbi as and/or gain may be continuous, for example, such as part of a feedback loop.
  • a temperature of the pixel 114 may be continuously monitored via a sensor 1002 which in turn provides feedback to the buffer amplifier 304 to facilitate adjustments in the gain or Vbi as of the buffer amplifier 304, for example, such as discussed above.
  • one or more parameters of the pixel 114 or subpixel may be monitored (shown at 802).
  • the one or more parameters may include any parameter indicative of operation of the SSPM, for example such as the parameters described above (e.g., temperature, Vbias, gain or the like).
  • a determination is made as to whether an adjustment of the Vbias and/or gain of the pixel 114 is needed. If no such adjustment is needed the one or more parameters may be continuously monitored at 802. If an adjustment is needed, the magnitude of the adjustment is determined at 806 and provided to control circuitry 810.
  • the control circuitry 810 then processes the information related to the adjustment and provides a signal 808 that is indicative of such an adjustment. Based on the signal 808, the gain or Vbi as of the buffer amplifier 304,504,226/604 is adjusted.
  • the above described process flow may be continuous, for example, such as part of a feedback loop.
  • the control circuitry 810 may be integrated into the array at any level, for example, such as the pixel level, subpixel level, or the like.
  • the inventive SSPM may include one or more buffer amplifiers at subpixel levels that may advantageously improve the pulse shape readout of the SSPM as compared to conventionally configured SSPMs.
  • the buffer amplifiers may be monitored and/or adjusted to compensate for temperature and process nonuniformity.
  • Ranges disclosed herein are inclusive and combinable (e.g., ranges of "about 10-50 ns”, is inclusive of the endpoints and all intermediate values of the ranges of “about 10-50 ns”, etc.).
  • “Combination” is inclusive of blends, mixtures, alloys, reaction products, and the like.
  • first,” “second,” and the like, herein do not denote any order, quantity, or importance, but rather are used to distinguish one element from another, and the terms “a” and “an” herein do not denote a limitation of quantity, but rather denote the presence of at least one of the referenced item.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

Selon des modes de réalisation, l'invention concerne un photomultiplicateur à semi-conducteurs. Dans certains modes de réalisation, un photomultiplicateur à semi-conducteurs peut comprendre une pluralité de pixels, chaque pixel de la pluralité de pixels comprenant une pluralité de sous-pixels ; et un premier ensemble d'amplificateurs tampons, chaque amplificateur tampon du premier ensemble d'amplificateurs tampons étant respectivement couplé à un sous-pixel de la pluralité de sous-pixels.
PCT/US2015/045007 2014-09-22 2015-08-13 Photomultiplicateur à semi-conducteurs à lecture de forme d'impulsion améliorée WO2016048470A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201580051138.7A CN106716993B (zh) 2014-09-22 2015-08-13 具有改进的脉冲形状读出的固态光电倍增管

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201462053454P 2014-09-22 2014-09-22
US62/053,454 2014-09-22
US14/688,008 US9851455B2 (en) 2014-09-22 2015-04-16 Solid state photomultiplier with improved pulse shape readout
US14/688,008 2015-04-16

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WO2016048470A1 true WO2016048470A1 (fr) 2016-03-31

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999048282A1 (fr) * 1998-03-16 1999-09-23 Photon Vision Systems, Llc Detecteur lineaire actif
US20110019047A1 (en) * 2009-07-27 2011-01-27 Sony Corporation Solid-state imaging device and camera system
GB2487958A (en) * 2011-02-10 2012-08-15 St Microelectronics Res & Dev A multi-mode photodetector pixel

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999048282A1 (fr) * 1998-03-16 1999-09-23 Photon Vision Systems, Llc Detecteur lineaire actif
US20110019047A1 (en) * 2009-07-27 2011-01-27 Sony Corporation Solid-state imaging device and camera system
GB2487958A (en) * 2011-02-10 2012-08-15 St Microelectronics Res & Dev A multi-mode photodetector pixel

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